[PATCH 0/6] Add uSD and eMMC to iwg23s

[PATCH 0/6] Add uSD and eMMC to iwg23s

[Fabrizio Castro]

Dear All,

this series includes all that is necessary for uSD and
eMMC to work on the iwg23s board, powered by the RZ/G1C
(a.k.a. r8a77470).

This work applies on top of next-20181002

Thanks,
Fab

Fabrizio Castro (6):
  dt-bindings: mmc: renesas_sdhi: Add r8a77470 support
  pinctrl: sh-pfc: r8a77470: Add SDHI support
  mmc: renesas_sdhi: Add r8a77470 SDHI1 support
  ARM: dts: r8a77470: Add SDHI0 support
  ARM: dts: r8a77470: Add SDHI1 support
  ARM: dts: iwg23s-sbc: Add uSD and eMMC support

 Documentation/devicetree/bindings/mmc/tmio_mmc.txt |   6 +-
 arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts          |  76 ++++++++++
 arch/arm/boot/dts/r8a77470.dtsi                    |  28 +++-
 drivers/mmc/host/Kconfig                           |   4 +-
 drivers/mmc/host/renesas_sdhi_internal_dmac.c      |   6 +-
 drivers/pinctrl/sh-pfc/pfc-r8a77470.c              | 162 ++++++++++++++++++++-
 6 files changed, 273 insertions(+), 9 deletions(-)

-- 
2.7.4

[PATCH 1/6] dt-bindings: mmc: renesas_sdhi: Add r8a77470 support

[Fabrizio Castro]

The RZ/G1C (a.k.a. R8A77470) comes with three SDHI interfaces,
SDHI0 and SDHI2 are compatible with R-Car Gen2 SDHIs, and
SDHI1 is compatible with R-Car Gen3 SDHIs, as it comes with an
internal DMAC, therefore SDHI1 is fully compatible with driver
renesas_sdhi_internal_dmac driver. As a result, the compatible
strings for the R8A77470 SDHI interfaces are a little bit special.
Document SDHI support for the RZ/G1C SoC.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>

---
v1->v2:
* Added "renesas,sdhi-mmc-r8a77470"
* Using generic/fallback compatibilty only for SDHI[02]
* Reworked changelog
---
 Documentation/devicetree/bindings/mmc/tmio_mmc.txt | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
index d39d5e4..247abee 100644
--- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
+++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
@@ -19,6 +19,8 @@ Required properties:
 		"renesas,sdhi-r8a7744" - SDHI IP on R8A7744 SoC
 		"renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC
 		"renesas,sdhi-r8a774a1" - SDHI IP on R8A774A1 SoC
+		"renesas,sdhi-r8a77470" - SDHI IP on R8A77470 SoC (SDHI[02])
+		"renesas,sdhi-mmc-r8a77470" - SDHI IP on R8A77470 SoC (SDHI1)
 		"renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
 		"renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
 		"renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
@@ -35,8 +37,8 @@ Required properties:
 		"renesas,sdhi-r8a77995" - SDHI IP on R8A77995 SoC
 		"renesas,sdhi-shmobile" - a generic sh-mobile SDHI controller
 		"renesas,rcar-gen1-sdhi" - a generic R-Car Gen1 SDHI controller
-		"renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 or RZ/G1
-					   SDHI controller
+		"renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 and RZ/G1 (but
+					   not RZ/G1C SDHI1) SDHI controller
 		"renesas,rcar-gen3-sdhi" - a generic R-Car Gen3 or RZ/G2
 					   SDHI controller
 
-- 
2.7.4

[PATCH 2/6] pinctrl: sh-pfc: r8a77470: Add SDHI support

[Fabrizio Castro]

Add SH_PFC_PIN_CFG_IO_VOLTAGE definition for the SDHI pins
capable of switching voltage, also add pin groups and functions
for SDHI0 and SDHI1. Please note that with the RZ/G1C only 1
bit of the POC Control Register is used to control each interface.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>

---
v1->v2:
* Reworked implementation of r8a77470_pin_to_pocctrl as per Wolfram's
  and Geert's comments
* Added SDHI0 and SDHI1 pins and IO voltage control
* Added SDHI0 and SDHI1 pin groups and functions
* Reworked changelog and title
* Please note that there is some overlapping between mmc pin groups
  and sdhi1 pin groups
---
 drivers/pinctrl/sh-pfc/pfc-r8a77470.c | 162 +++++++++++++++++++++++++++++++++-
 1 file changed, 160 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77470.c b/drivers/pinctrl/sh-pfc/pfc-r8a77470.c
index 3d36e5f..fa0d42b 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a77470.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a77470.c
@@ -10,14 +10,45 @@
 #include "sh_pfc.h"
 
 #define CPU_ALL_PORT(fn, sfx)						\
-	PORT_GP_23(0, fn, sfx),						\
+	PORT_GP_4(0, fn, sfx),						\
+	PORT_GP_1(0, 4, fn, sfx),					\
+	PORT_GP_CFG_1(0,  5, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),	\
+	PORT_GP_CFG_1(0,  6, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),	\
+	PORT_GP_CFG_1(0,  7, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),	\
+	PORT_GP_CFG_1(0,  8, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),	\
+	PORT_GP_CFG_1(0,  9, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),	\
+	PORT_GP_CFG_1(0, 10, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),	\
+	PORT_GP_CFG_1(0, 11, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),	\
+	PORT_GP_CFG_1(0, 12, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),	\
+	PORT_GP_CFG_1(0, 13, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),	\
+	PORT_GP_CFG_1(0, 14, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),	\
+	PORT_GP_CFG_1(0, 15, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),	\
+	PORT_GP_CFG_1(0, 16, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),	\
+	PORT_GP_CFG_1(0, 17, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),	\
+	PORT_GP_CFG_1(0, 18, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),	\
+	PORT_GP_CFG_1(0, 19, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),	\
+	PORT_GP_CFG_1(0, 20, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),	\
+	PORT_GP_CFG_1(0, 21, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),	\
+	PORT_GP_CFG_1(0, 22, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),	\
 	PORT_GP_23(1, fn, sfx),						\
 	PORT_GP_32(2, fn, sfx),						\
 	PORT_GP_17(3, fn, sfx),						\
 	PORT_GP_1(3, 27, fn, sfx),					\
 	PORT_GP_1(3, 28, fn, sfx),					\
 	PORT_GP_1(3, 29, fn, sfx),					\
-	PORT_GP_26(4, fn, sfx),						\
+	PORT_GP_14(4, fn, sfx),						\
+	PORT_GP_CFG_1(4, 14, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),	\
+	PORT_GP_CFG_1(4, 15, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),	\
+	PORT_GP_CFG_1(4, 16, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),	\
+	PORT_GP_CFG_1(4, 17, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),	\
+	PORT_GP_CFG_1(4, 18, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),	\
+	PORT_GP_CFG_1(4, 19, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),	\
+	PORT_GP_1(4, 20, fn, sfx),					\
+	PORT_GP_1(4, 21, fn, sfx),					\
+	PORT_GP_1(4, 22, fn, sfx),					\
+	PORT_GP_1(4, 23, fn, sfx),					\
+	PORT_GP_1(4, 24, fn, sfx),					\
+	PORT_GP_1(4, 25, fn, sfx),					\
 	PORT_GP_32(5, fn, sfx)
 
 enum {
@@ -1619,6 +1650,81 @@ static const unsigned int scif_clk_b_pins[] = {
 static const unsigned int scif_clk_b_mux[] = {
 	SCIF_CLK_B_MARK,
 };
+/* - SDHI0 ------------------------------------------------------------------ */
+static const unsigned int sdhi0_data1_pins[] = {
+	/* D0 */
+	RCAR_GP_PIN(0, 7),
+};
+static const unsigned int sdhi0_data1_mux[] = {
+	SD0_DAT0_MARK,
+};
+static const unsigned int sdhi0_data4_pins[] = {
+	/* D[0:3] */
+	RCAR_GP_PIN(0, 7), RCAR_GP_PIN(0, 8),
+	RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 10),
+};
+static const unsigned int sdhi0_data4_mux[] = {
+	SD0_DAT0_MARK, SD0_DAT1_MARK, SD0_DAT2_MARK, SD0_DAT3_MARK,
+};
+static const unsigned int sdhi0_ctrl_pins[] = {
+	/* CLK, CMD */
+	RCAR_GP_PIN(0, 5), RCAR_GP_PIN(0, 6),
+};
+static const unsigned int sdhi0_ctrl_mux[] = {
+	SD0_CLK_MARK, SD0_CMD_MARK,
+};
+static const unsigned int sdhi0_cd_pins[] = {
+	/* CD */
+	RCAR_GP_PIN(0, 11),
+};
+static const unsigned int sdhi0_cd_mux[] = {
+	SD0_CD_MARK,
+};
+static const unsigned int sdhi0_wp_pins[] = {
+	/* WP */
+	RCAR_GP_PIN(0, 12),
+};
+static const unsigned int sdhi0_wp_mux[] = {
+	SD0_WP_MARK,
+};
+/* - SDHI1 ------------------------------------------------------------------ */
+static const unsigned int sdhi1_data1_pins[] = {
+	/* D0 */
+	RCAR_GP_PIN(0, 15),
+};
+static const unsigned int sdhi1_data1_mux[] = {
+	MMC0_D0_SDHI1_D0_MARK,
+};
+static const unsigned int sdhi1_data4_pins[] = {
+	/* D[0:3] */
+	RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 16),
+	RCAR_GP_PIN(0, 17), RCAR_GP_PIN(0, 18),
+};
+static const unsigned int sdhi1_data4_mux[] = {
+	MMC0_D0_SDHI1_D0_MARK, MMC0_D1_SDHI1_D1_MARK,
+	MMC0_D2_SDHI1_D2_MARK, MMC0_D3_SDHI1_D3_MARK,
+};
+static const unsigned int sdhi1_ctrl_pins[] = {
+	/* CLK, CMD */
+	RCAR_GP_PIN(0, 13), RCAR_GP_PIN(0, 14),
+};
+static const unsigned int sdhi1_ctrl_mux[] = {
+	MMC0_CLK_SDHI1_CLK_MARK, MMC0_CMD_SDHI1_CMD_MARK,
+};
+static const unsigned int sdhi1_cd_pins[] = {
+	/* CD */
+	RCAR_GP_PIN(0, 19),
+};
+static const unsigned int sdhi1_cd_mux[] = {
+	SD1_CD_MARK,
+};
+static const unsigned int sdhi1_wp_pins[] = {
+	/* WP */
+	RCAR_GP_PIN(0, 20),
+};
+static const unsigned int sdhi1_wp_mux[] = {
+	SD1_WP_MARK,
+};
 /* - SDHI2 ------------------------------------------------------------------ */
 static const unsigned int sdhi2_data1_pins[] = {
 	/* D0 */
@@ -1743,6 +1849,16 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
 	SH_PFC_PIN_GROUP(scif5_data_f),
 	SH_PFC_PIN_GROUP(scif_clk_a),
 	SH_PFC_PIN_GROUP(scif_clk_b),
+	SH_PFC_PIN_GROUP(sdhi0_data1),
+	SH_PFC_PIN_GROUP(sdhi0_data4),
+	SH_PFC_PIN_GROUP(sdhi0_ctrl),
+	SH_PFC_PIN_GROUP(sdhi0_cd),
+	SH_PFC_PIN_GROUP(sdhi0_wp),
+	SH_PFC_PIN_GROUP(sdhi1_data1),
+	SH_PFC_PIN_GROUP(sdhi1_data4),
+	SH_PFC_PIN_GROUP(sdhi1_ctrl),
+	SH_PFC_PIN_GROUP(sdhi1_cd),
+	SH_PFC_PIN_GROUP(sdhi1_wp),
 	SH_PFC_PIN_GROUP(sdhi2_data1),
 	SH_PFC_PIN_GROUP(sdhi2_data4),
 	SH_PFC_PIN_GROUP(sdhi2_ctrl),
@@ -1855,6 +1971,22 @@ static const char * const scif_clk_groups[] = {
 	"scif_clk_b",
 };
 
+static const char * const sdhi0_groups[] = {
+	"sdhi0_data1",
+	"sdhi0_data4",
+	"sdhi0_ctrl",
+	"sdhi0_cd",
+	"sdhi0_wp",
+};
+
+static const char * const sdhi1_groups[] = {
+	"sdhi1_data1",
+	"sdhi1_data4",
+	"sdhi1_ctrl",
+	"sdhi1_cd",
+	"sdhi1_wp",
+};
+
 static const char * const sdhi2_groups[] = {
 	"sdhi2_data1",
 	"sdhi2_data4",
@@ -1884,6 +2016,8 @@ static const struct sh_pfc_function pinmux_functions[] = {
 	SH_PFC_FUNCTION(scif4),
 	SH_PFC_FUNCTION(scif5),
 	SH_PFC_FUNCTION(scif_clk),
+	SH_PFC_FUNCTION(sdhi0),
+	SH_PFC_FUNCTION(sdhi1),
 	SH_PFC_FUNCTION(sdhi2),
 	SH_PFC_FUNCTION(usb0),
 	SH_PFC_FUNCTION(usb1),
@@ -2729,9 +2863,33 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
 	{ },
 };
 
+static int r8a77470_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin,
+				   u32 *pocctrl)
+{
+	int bit = -EINVAL;
+
+	*pocctrl = 0xe60600b0;
+
+	if (pin >= RCAR_GP_PIN(0, 5) && pin <= RCAR_GP_PIN(0, 10))
+		bit = 0;
+
+	if (pin >= RCAR_GP_PIN(0, 13) && pin <= RCAR_GP_PIN(0, 22))
+		bit = 2;
+
+	if (pin >= RCAR_GP_PIN(4, 14) && pin <= RCAR_GP_PIN(4, 19))
+		bit = 1;
+
+	return bit;
+}
+
+static const struct sh_pfc_soc_operations r8a77470_pinmux_ops = {
+	.pin_to_pocctrl = r8a77470_pin_to_pocctrl,
+};
+
 #ifdef CONFIG_PINCTRL_PFC_R8A77470
 const struct sh_pfc_soc_info r8a77470_pinmux_info = {
 	.name = "r8a77470_pfc",
+	.ops = &r8a77470_pinmux_ops,
 	.unlock_reg = 0xe6060000, /* PMMR */
 
 	.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
-- 
2.7.4

[PATCH 3/6] mmc: renesas_sdhi: Add r8a77470 SDHI1 support

[Fabrizio Castro]

The RZ/G1C (a.k.a. R8A77470) comes with three SDHI interfaces,
SDHI0 and SDHI2 are compatible with the R-Car Gen2 SDHIs, SDHI1
is compatible with R-Car Gen3 SDHIs and it can be used as
eMMC as well. This patch adds driver compatibility, and makes
sure both drivers get compiled for the R8A77470.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>

---
v2:
* New patch
---
 drivers/mmc/host/Kconfig                      | 4 ++--
 drivers/mmc/host/renesas_sdhi_internal_dmac.c | 6 ++++--
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 694d082..fb654cd 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -622,9 +622,9 @@ config MMC_SDHI_SYS_DMAC
 
 config MMC_SDHI_INTERNAL_DMAC
 	tristate "DMA for SDHI SD/SDIO controllers using on-chip bus mastering"
-	depends on ARM64 || COMPILE_TEST
+	depends on ARM64 || ARCH_R8A77470 || COMPILE_TEST
 	depends on MMC_SDHI
-	default MMC_SDHI if ARM64
+	default MMC_SDHI if (ARM64 || ARCH_R8A77470)
 	help
 	  This provides DMA support for SDHI SD/SDIO controllers
 	  using on-chip bus mastering. This supports the controllers
diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
index e5e5015..e729c39 100644
--- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c
+++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
@@ -113,6 +113,7 @@ static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = {
 };
 
 static const struct of_device_id renesas_sdhi_internal_dmac_of_match[] = {
+	{ .compatible = "renesas,sdhi-mmc-r8a77470", .data = &of_rcar_gen3_compatible, },
 	{ .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_r8a7795_compatible, },
 	{ .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_r8a7795_compatible, },
 	{ .compatible = "renesas,rcar-gen3-sdhi", .data = &of_rcar_gen3_compatible, },
@@ -288,7 +289,7 @@ static const struct tmio_mmc_dma_ops renesas_sdhi_internal_dmac_dma_ops = {
  * Whitelist of specific R-Car Gen3 SoC ES versions to use this DMAC
  * implementation as others may use a different implementation.
  */
-static const struct soc_device_attribute gen3_soc_whitelist[] = {
+static const struct soc_device_attribute soc_whitelist[] = {
 	/* specific ones */
 	{ .soc_id = "r8a7795", .revision = "ES1.*",
 	  .data = (void *)BIT(SDHI_INTERNAL_DMAC_ONE_RX_ONLY) },
@@ -296,6 +297,7 @@ static const struct soc_device_attribute gen3_soc_whitelist[] = {
 	  .data = (void *)BIT(SDHI_INTERNAL_DMAC_ONE_RX_ONLY) },
 	/* generic ones */
 	{ .soc_id = "r8a774a1" },
+	{ .soc_id = "r8a77470" },
 	{ .soc_id = "r8a7795" },
 	{ .soc_id = "r8a7796" },
 	{ .soc_id = "r8a77965" },
@@ -307,7 +309,7 @@ static const struct soc_device_attribute gen3_soc_whitelist[] = {
 
 static int renesas_sdhi_internal_dmac_probe(struct platform_device *pdev)
 {
-	const struct soc_device_attribute *soc = soc_device_match(gen3_soc_whitelist);
+	const struct soc_device_attribute *soc = soc_device_match(soc_whitelist);
 	struct device *dev = &pdev->dev;
 
 	if (!soc)
-- 
2.7.4

[PATCH 4/6] ARM: dts: r8a77470: Add SDHI0 support

[Fabrizio Castro]

RZ/G1C comes with two different types of IP for the SDHI
interfaces, SDHI0 and SDHI2 share the same IP type, and
such an IP is also compatible with the one found in R-Car
Gen2. SDHI1 IP on the other hand is compatible with R-Car
Gen3 with internal DMA.
This patch completes the SDHI support of the R-Car Gen2
compatible IPs, including fixing the max-frequency
definition of SDHI2, as it turns out there is a bug in
Section 1.3.9 of the RZ/G1C Hardware User's Manual (Rev.
1.00 Oct. 2017).

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>

---
v2:
* New patch
---
 arch/arm/boot/dts/r8a77470.dtsi | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index 9e7f86d..e01df9c 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -412,6 +412,21 @@
 			status = "disabled";
 		};
 
+		sdhi0: sd@ee100000 {
+			compatible = "renesas,sdhi-r8a77470",
+				     "renesas,rcar-gen2-sdhi";
+			reg = <0 0xee100000 0 0x328>;
+			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 314>;
+			dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+			       <&dmac1 0xcd>, <&dmac1 0xce>;
+			dma-names = "tx", "rx", "tx", "rx";
+			max-frequency = <156000000>;
+			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+			resets = <&cpg 314>;
+			status = "disabled";
+		};
+
 		sdhi2: sd@ee160000 {
 			compatible = "renesas,sdhi-r8a77470",
 				     "renesas,rcar-gen2-sdhi";
@@ -421,7 +436,7 @@
 			dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
 			       <&dmac1 0xd3>, <&dmac1 0xd4>;
 			dma-names = "tx", "rx", "tx", "rx";
-			max-frequency = <97500000>;
+			max-frequency = <78000000>;
 			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
 			resets = <&cpg 312>;
 			status = "disabled";
-- 
2.7.4

[PATCH 5/6] ARM: dts: r8a77470: Add SDHI1 support

[Fabrizio Castro]

Althought interface SDHI1 found on the RZ/G1C SoC (a.k.a.
r8a77470) is compatible with the R-Car Gen3 ones, its OF
compatibility is restricted to the SoC specific compatible
string to avoid confusion, as from a more generic perspective
the RZ/G1C is sharing the most similarities with the R-Car
Gen2 family of SoCs, and there is a combination of R-Car
Gen2 compatible SDHI IPs and R-Car Gen3 compatible SDHI IP
on this specific chip.
This patch adds the SoC specific part of SDHI1 support, and
since SDHI1 comes with internal DMA, its DT node looks fairly
different from SDHI0 and SDHI2.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>

---
v2:
* New patch
---
 arch/arm/boot/dts/r8a77470.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index e01df9c..3e39777 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -427,6 +427,17 @@
 			status = "disabled";
 		};
 
+		sdhi1: sd@ee300000 {
+			compatible = "renesas,sdhi-mmc-r8a77470";
+			reg = <0 0xee300000 0 0x2000>;
+			interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 313>;
+			max-frequency = <156000000>;
+			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+			resets = <&cpg 313>;
+			status = "disabled";
+		};
+
 		sdhi2: sd@ee160000 {
 			compatible = "renesas,sdhi-r8a77470",
 				     "renesas,rcar-gen2-sdhi";
-- 
2.7.4

[PATCH 6/6] ARM: dts: iwg23s-sbc: Add uSD and eMMC support

[Fabrizio Castro]

Add uSD card and eMMC support to the iwg23s single board
computer powered by the RZ/G1C SoC (a.k.a. r8a77470).

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>

---
v1->v2:
* Added eMMC support as well
* Reworked title and changelog
* Reworked voltage regulators for uSD card on sdhi2
---
 arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 76 +++++++++++++++++++++++++++++++
 1 file changed, 76 insertions(+)

diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
index 22da819..e5cfb50 100644
--- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
+++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
@@ -6,6 +6,7 @@
  */
 
 /dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
 #include "r8a77470.dtsi"
 / {
 	model = "iWave iW-RainboW-G23S single board computer based on RZ/G1C";
@@ -25,6 +26,37 @@
 		device_type = "memory";
 		reg = <0 0x40000000 0 0x20000000>;
 	};
+
+	reg_1p8v: reg-1p8v {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-1.8V";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	reg_3p3v: reg-3p3v {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-3.3V";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vccq_sdhi2: regulator-vccq-sdhi2 {
+		compatible = "regulator-gpio";
+
+		regulator-name = "SDHI2 VccQ";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <3300000>;
+
+		gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
+		gpios-states = <1>;
+		states = <3300000 1
+			  1800000 0>;
+	};
 };
 
 &avb {
@@ -46,10 +78,28 @@
 };
 
 &pfc {
+	mmc_pins_uhs: mmc_uhs {
+		groups = "mmc_data8", "mmc_ctrl";
+		function = "mmc";
+		power-source = <1800>;
+	};
+
 	scif1_pins: scif1 {
 		groups = "scif1_data_b";
 		function = "scif1";
 	};
+
+	sdhi2_pins: sd2 {
+		groups = "sdhi2_data4", "sdhi2_ctrl";
+		function = "sdhi2";
+		power-source = <3300>;
+	};
+
+	sdhi2_pins_uhs: sd2_uhs {
+		groups = "sdhi2_data4", "sdhi2_ctrl";
+		function = "sdhi2";
+		power-source = <1800>;
+	};
 };
 
 &scif1 {
@@ -58,3 +108,29 @@
 
 	status = "okay";
 };
+
+&sdhi1 {
+	pinctrl-0 = <&mmc_pins_uhs>;
+	pinctrl-names = "state_uhs";
+
+	vmmc-supply = <&reg_3p3v>;
+	vqmmc-supply = <&reg_1p8v>;
+	bus-width = <8>;
+	mmc-hs200-1_8v;
+	non-removable;
+	fixed-emmc-driver-type = <1>;
+	status = "okay";
+};
+
+&sdhi2 {
+	pinctrl-0 = <&sdhi2_pins>;
+	pinctrl-1 = <&sdhi2_pins_uhs>;
+	pinctrl-names = "default", "state_uhs";
+
+	vmmc-supply = <&reg_3p3v>;
+	vqmmc-supply = <&vccq_sdhi2>;
+	bus-width = <4>;
+	cd-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>;
+	sd-uhs-sdr50;
+	status = "okay";
+};
-- 
2.7.4

Re: [PATCH 1/6] dt-bindings: mmc: renesas_sdhi: Add r8a77470 support

[Simon Horman]

On Wed, Oct 03, 2018 at 12:05:39PM +0100, Fabrizio Castro wrote:
> The RZ/G1C (a.k.a. R8A77470) comes with three SDHI interfaces,
> SDHI0 and SDHI2 are compatible with R-Car Gen2 SDHIs, and
> SDHI1 is compatible with R-Car Gen3 SDHIs, as it comes with an
> internal DMAC, therefore SDHI1 is fully compatible with driver
> renesas_sdhi_internal_dmac driver. As a result, the compatible
> strings for the R8A77470 SDHI interfaces are a little bit special.
> Document SDHI support for the RZ/G1C SoC.
> 
> Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
> Reviewed-by: Biju Das <biju.das@bp.renesas.com>
> 
> ---
> v1->v2:
> * Added "renesas,sdhi-mmc-r8a77470"
> * Using generic/fallback compatibilty only for SDHI[02]
> * Reworked changelog
> ---
>  Documentation/devicetree/bindings/mmc/tmio_mmc.txt | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
> index d39d5e4..247abee 100644
> --- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
> +++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
> @@ -19,6 +19,8 @@ Required properties:
>  		"renesas,sdhi-r8a7744" - SDHI IP on R8A7744 SoC
>  		"renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC
>  		"renesas,sdhi-r8a774a1" - SDHI IP on R8A774A1 SoC
> +		"renesas,sdhi-r8a77470" - SDHI IP on R8A77470 SoC (SDHI[02])
> +		"renesas,sdhi-mmc-r8a77470" - SDHI IP on R8A77470 SoC (SDHI1)

I understand that SDHI[02] is different to SDHI1 on this SoC.
But I'm not clear on why SDHI1 is more "mmc" than SDHI[02].

>  		"renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
>  		"renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
>  		"renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
> @@ -35,8 +37,8 @@ Required properties:
>  		"renesas,sdhi-r8a77995" - SDHI IP on R8A77995 SoC
>  		"renesas,sdhi-shmobile" - a generic sh-mobile SDHI controller
>  		"renesas,rcar-gen1-sdhi" - a generic R-Car Gen1 SDHI controller
> -		"renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 or RZ/G1
> -					   SDHI controller
> +		"renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 and RZ/G1 (but
> +					   not RZ/G1C SDHI1) SDHI controller
>  		"renesas,rcar-gen3-sdhi" - a generic R-Car Gen3 or RZ/G2
>  					   SDHI controller

renesas,rcar-gen3-sdhi can be used with RZ/G1C SDHI1, right?
The naming is starting to break down at this point :(

>  
> -- 
> 2.7.4
> 

RE: [PATCH 1/6] dt-bindings: mmc: renesas_sdhi: Add r8a77470 support

[Fabrizio Castro]

Hello Simon,

Thank you for your feedback!

> Subject: Re: [PATCH 1/6] dt-bindings: mmc: renesas_sdhi: Add r8a77470 support
>
> On Wed, Oct 03, 2018 at 12:05:39PM +0100, Fabrizio Castro wrote:
> > The RZ/G1C (a.k.a. R8A77470) comes with three SDHI interfaces,
> > SDHI0 and SDHI2 are compatible with R-Car Gen2 SDHIs, and
> > SDHI1 is compatible with R-Car Gen3 SDHIs, as it comes with an
> > internal DMAC, therefore SDHI1 is fully compatible with driver
> > renesas_sdhi_internal_dmac driver. As a result, the compatible
> > strings for the R8A77470 SDHI interfaces are a little bit special.
> > Document SDHI support for the RZ/G1C SoC.
> >
> > Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
> > Reviewed-by: Biju Das <biju.das@bp.renesas.com>
> >
> > ---
> > v1->v2:
> > * Added "renesas,sdhi-mmc-r8a77470"
> > * Using generic/fallback compatibilty only for SDHI[02]
> > * Reworked changelog
> > ---
> >  Documentation/devicetree/bindings/mmc/tmio_mmc.txt | 6 ++++--
> >  1 file changed, 4 insertions(+), 2 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
> > index d39d5e4..247abee 100644
> > --- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
> > +++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
> > @@ -19,6 +19,8 @@ Required properties:
> >  "renesas,sdhi-r8a7744" - SDHI IP on R8A7744 SoC
> >  "renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC
> >  "renesas,sdhi-r8a774a1" - SDHI IP on R8A774A1 SoC
> > +"renesas,sdhi-r8a77470" - SDHI IP on R8A77470 SoC (SDHI[02])
> > +"renesas,sdhi-mmc-r8a77470" - SDHI IP on R8A77470 SoC (SDHI1)
>
> I understand that SDHI[02] is different to SDHI1 on this SoC.
> But I'm not clear on why SDHI1 is more "mmc" than SDHI[02].

Only SDHI1 can be used as MMC interface, from Section 40.1.1 of the SD Card
manual: " This LSI has three SD card interfaces (SDHI0 to SDHI2), one of which
can also be used as MMC interfaces (SDHI1)."

>
> >  "renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
> >  "renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
> >  "renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
> > @@ -35,8 +37,8 @@ Required properties:
> >  "renesas,sdhi-r8a77995" - SDHI IP on R8A77995 SoC
> >  "renesas,sdhi-shmobile" - a generic sh-mobile SDHI controller
> >  "renesas,rcar-gen1-sdhi" - a generic R-Car Gen1 SDHI controller
> > -"renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 or RZ/G1
> > -   SDHI controller
> > +"renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 and RZ/G1 (but
> > +   not RZ/G1C SDHI1) SDHI controller
> >  "renesas,rcar-gen3-sdhi" - a generic R-Car Gen3 or RZ/G2
> >     SDHI controller
>
> renesas,rcar-gen3-sdhi can be used with RZ/G1C SDHI1, right?

It can be used, but when we previously discussed about this I have received bad
feedbacks from both yourself and Geert:
Geert: "I'm a bit reluctant to add "renesas,rcar-gen3-sdhi", though"
You: "I am also reluctant to add "renesas,rcar-gen3-sdhi", because as we are
seeing things are not so simple wrt to compatible."

We need to make a final decision here, but automatically detecting the IP doesn't
seem to be great, so the final solution has to rely on compatible strings.

> The naming is starting to break down at this point :(

Personally, I am not too bothered about using "renesas,rcar-gen3-sdhi"
for this specific IP, as this chip "borrows" Gen3 implementation, but of course it
exposes some cross compatibility with other families of products which could result in
some confusion to the final user. Anyway, as long as we document things properly
there should be no confusion.

Thanks,
Fab

>
> >
> > --
> > 2.7.4
> >



Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.

Re: [PATCH 1/6] dt-bindings: mmc: renesas_sdhi: Add r8a77470 support

[Geert Uytterhoeven]

Hi Fabrizio,

On Wed, Oct 3, 2018 at 1:06 PM Fabrizio Castro
<fabrizio.castro@bp.renesas.com> wrote:
> The RZ/G1C (a.k.a. R8A77470) comes with three SDHI interfaces,
> SDHI0 and SDHI2 are compatible with R-Car Gen2 SDHIs, and
> SDHI1 is compatible with R-Car Gen3 SDHIs, as it comes with an
> internal DMAC, therefore SDHI1 is fully compatible with driver
> renesas_sdhi_internal_dmac driver. As a result, the compatible
> strings for the R8A77470 SDHI interfaces are a little bit special.
> Document SDHI support for the RZ/G1C SoC.
>
> Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
> Reviewed-by: Biju Das <biju.das@bp.renesas.com>
>
> ---
> v1->v2:
> * Added "renesas,sdhi-mmc-r8a77470"
> * Using generic/fallback compatibilty only for SDHI[02]
> * Reworked changelog

Thanks for the update!

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

> --- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
> +++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
> @@ -19,6 +19,8 @@ Required properties:
>                 "renesas,sdhi-r8a7744" - SDHI IP on R8A7744 SoC
>                 "renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC
>                 "renesas,sdhi-r8a774a1" - SDHI IP on R8A774A1 SoC
> +               "renesas,sdhi-r8a77470" - SDHI IP on R8A77470 SoC (SDHI[02])
> +               "renesas,sdhi-mmc-r8a77470" - SDHI IP on R8A77470 SoC (SDHI1)

I'm wondering if this would be clearer:

               "renesas,sdhi-r8a77470" - SDHI IP on R8A77470 SoC
               "renesas,sdhi-mmc-r8a77470" - SDHI/MMC IP on R8A77470 SoC

>                 "renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
>                 "renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
>                 "renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
> @@ -35,8 +37,8 @@ Required properties:
>                 "renesas,sdhi-r8a77995" - SDHI IP on R8A77995 SoC
>                 "renesas,sdhi-shmobile" - a generic sh-mobile SDHI controller
>                 "renesas,rcar-gen1-sdhi" - a generic R-Car Gen1 SDHI controller
> -               "renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 or RZ/G1
> -                                          SDHI controller
> +               "renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 and RZ/G1 (but
> +                                          not RZ/G1C SDHI1) SDHI controller

And:

               "renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 and RZ/G1 SDHI
                                          (not SDHI/MMC) controller

as it not only applies to RZ/G1C, but also to R-Car E2X (which is not yet
supported upstream).

>                 "renesas,rcar-gen3-sdhi" - a generic R-Car Gen3 or RZ/G2
>                                            SDHI controller

What do you think?

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

RE: [PATCH 1/6] dt-bindings: mmc: renesas_sdhi: Add r8a77470 support

[Fabrizio Castro]

Hello Geert,

Thank you for your feedback!

> Subject: Re: [PATCH 1/6] dt-bindings: mmc: renesas_sdhi: Add r8a77470 support
>
> Hi Fabrizio,
>
> On Wed, Oct 3, 2018 at 1:06 PM Fabrizio Castro
> <fabrizio.castro@bp.renesas.com> wrote:
> > The RZ/G1C (a.k.a. R8A77470) comes with three SDHI interfaces,
> > SDHI0 and SDHI2 are compatible with R-Car Gen2 SDHIs, and
> > SDHI1 is compatible with R-Car Gen3 SDHIs, as it comes with an
> > internal DMAC, therefore SDHI1 is fully compatible with driver
> > renesas_sdhi_internal_dmac driver. As a result, the compatible
> > strings for the R8A77470 SDHI interfaces are a little bit special.
> > Document SDHI support for the RZ/G1C SoC.
> >
> > Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
> > Reviewed-by: Biju Das <biju.das@bp.renesas.com>
> >
> > ---
> > v1->v2:
> > * Added "renesas,sdhi-mmc-r8a77470"
> > * Using generic/fallback compatibilty only for SDHI[02]
> > * Reworked changelog
>
> Thanks for the update!
>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> > --- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
> > +++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
> > @@ -19,6 +19,8 @@ Required properties:
> >                 "renesas,sdhi-r8a7744" - SDHI IP on R8A7744 SoC
> >                 "renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC
> >                 "renesas,sdhi-r8a774a1" - SDHI IP on R8A774A1 SoC
> > +               "renesas,sdhi-r8a77470" - SDHI IP on R8A77470 SoC (SDHI[02])
> > +               "renesas,sdhi-mmc-r8a77470" - SDHI IP on R8A77470 SoC (SDHI1)
>
> I'm wondering if this would be clearer:
>
>                "renesas,sdhi-r8a77470" - SDHI IP on R8A77470 SoC
>                "renesas,sdhi-mmc-r8a77470" - SDHI/MMC IP on R8A77470 SoC
>
> >                 "renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
> >                 "renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
> >                 "renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
> > @@ -35,8 +37,8 @@ Required properties:
> >                 "renesas,sdhi-r8a77995" - SDHI IP on R8A77995 SoC
> >                 "renesas,sdhi-shmobile" - a generic sh-mobile SDHI controller
> >                 "renesas,rcar-gen1-sdhi" - a generic R-Car Gen1 SDHI controller
> > -               "renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 or RZ/G1
> > -                                          SDHI controller
> > +               "renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 and RZ/G1 (but
> > +                                          not RZ/G1C SDHI1) SDHI controller
>
> And:
>
>                "renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 and RZ/G1 SDHI
>                                           (not SDHI/MMC) controller
>
> as it not only applies to RZ/G1C, but also to R-Car E2X (which is not yet
> supported upstream).
>
> >                 "renesas,rcar-gen3-sdhi" - a generic R-Car Gen3 or RZ/G2
> >                                            SDHI controller
>
> What do you think?

It makes sense to me, I will wait for Simon's reply and if he is happy as well I'll
send a new version incorporating your recommendations (and his, in case he
has any).

Thanks!

Fab

>
> Gr{oetje,eeting}s,
>
>                         Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds



Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.

RE: [PATCH 1/6] dt-bindings: mmc: renesas_sdhi: Add r8a77470 support

[Fabrizio Castro]

Hello Geert,

Thank you for your feedback!

> Subject: Re: [PATCH 1/6] dt-bindings: mmc: renesas_sdhi: Add r8a77470 support
>
> Hi Fabrizio,
>
> On Wed, Oct 3, 2018 at 1:06 PM Fabrizio Castro
> <fabrizio.castro@bp.renesas.com> wrote:
> > The RZ/G1C (a.k.a. R8A77470) comes with three SDHI interfaces,
> > SDHI0 and SDHI2 are compatible with R-Car Gen2 SDHIs, and
> > SDHI1 is compatible with R-Car Gen3 SDHIs, as it comes with an
> > internal DMAC, therefore SDHI1 is fully compatible with driver
> > renesas_sdhi_internal_dmac driver. As a result, the compatible
> > strings for the R8A77470 SDHI interfaces are a little bit special.
> > Document SDHI support for the RZ/G1C SoC.
> >
> > Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
> > Reviewed-by: Biju Das <biju.das@bp.renesas.com>
> >
> > ---
> > v1->v2:
> > * Added "renesas,sdhi-mmc-r8a77470"
> > * Using generic/fallback compatibilty only for SDHI[02]
> > * Reworked changelog
>
> Thanks for the update!
>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> > --- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
> > +++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
> > @@ -19,6 +19,8 @@ Required properties:
> >                 "renesas,sdhi-r8a7744" - SDHI IP on R8A7744 SoC
> >                 "renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC
> >                 "renesas,sdhi-r8a774a1" - SDHI IP on R8A774A1 SoC
> > +               "renesas,sdhi-r8a77470" - SDHI IP on R8A77470 SoC (SDHI[02])
> > +               "renesas,sdhi-mmc-r8a77470" - SDHI IP on R8A77470 SoC (SDHI1)
>
> I'm wondering if this would be clearer:
>
>                "renesas,sdhi-r8a77470" - SDHI IP on R8A77470 SoC
>                "renesas,sdhi-mmc-r8a77470" - SDHI/MMC IP on R8A77470 SoC
>
> >                 "renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
> >                 "renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
> >                 "renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
> > @@ -35,8 +37,8 @@ Required properties:
> >                 "renesas,sdhi-r8a77995" - SDHI IP on R8A77995 SoC
> >                 "renesas,sdhi-shmobile" - a generic sh-mobile SDHI controller
> >                 "renesas,rcar-gen1-sdhi" - a generic R-Car Gen1 SDHI controller
> > -               "renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 or RZ/G1
> > -                                          SDHI controller
> > +               "renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 and RZ/G1 (but
> > +                                          not RZ/G1C SDHI1) SDHI controller
>
> And:
>
>                "renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 and RZ/G1 SDHI
>                                           (not SDHI/MMC) controller
>
> as it not only applies to RZ/G1C, but also to R-Car E2X (which is not yet
> supported upstream).
>
> >                 "renesas,rcar-gen3-sdhi" - a generic R-Car Gen3 or RZ/G2
> >                                            SDHI controller
>
> What do you think?

It makes sense to me, I will wait for Simon's reply and if he is happy as well I'll
send a new version incorporating your recommendations (and his, in case he
has any).

Thanks!

Fab

>
> Gr{oetje,eeting}s,
>
>                         Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds



Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.

Re: [PATCH 1/6] dt-bindings: mmc: renesas_sdhi: Add r8a77470 support

[Simon Horman]

On Thu, Oct 04, 2018 at 11:08:10AM +0000, Fabrizio Castro wrote:
> Hello Geert,
> 
> Thank you for your feedback!
> 
> > Subject: Re: [PATCH 1/6] dt-bindings: mmc: renesas_sdhi: Add r8a77470 support
> >
> > Hi Fabrizio,
> >
> > On Wed, Oct 3, 2018 at 1:06 PM Fabrizio Castro
> > <fabrizio.castro@bp.renesas.com> wrote:
> > > The RZ/G1C (a.k.a. R8A77470) comes with three SDHI interfaces,
> > > SDHI0 and SDHI2 are compatible with R-Car Gen2 SDHIs, and
> > > SDHI1 is compatible with R-Car Gen3 SDHIs, as it comes with an
> > > internal DMAC, therefore SDHI1 is fully compatible with driver
> > > renesas_sdhi_internal_dmac driver. As a result, the compatible
> > > strings for the R8A77470 SDHI interfaces are a little bit special.
> > > Document SDHI support for the RZ/G1C SoC.
> > >
> > > Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
> > > Reviewed-by: Biju Das <biju.das@bp.renesas.com>
> > >
> > > ---
> > > v1->v2:
> > > * Added "renesas,sdhi-mmc-r8a77470"
> > > * Using generic/fallback compatibilty only for SDHI[02]
> > > * Reworked changelog
> >
> > Thanks for the update!
> >
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> >
> > > --- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
> > > +++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
> > > @@ -19,6 +19,8 @@ Required properties:
> > >                 "renesas,sdhi-r8a7744" - SDHI IP on R8A7744 SoC
> > >                 "renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC
> > >                 "renesas,sdhi-r8a774a1" - SDHI IP on R8A774A1 SoC
> > > +               "renesas,sdhi-r8a77470" - SDHI IP on R8A77470 SoC (SDHI[02])
> > > +               "renesas,sdhi-mmc-r8a77470" - SDHI IP on R8A77470 SoC (SDHI1)
> >
> > I'm wondering if this would be clearer:
> >
> >                "renesas,sdhi-r8a77470" - SDHI IP on R8A77470 SoC
> >                "renesas,sdhi-mmc-r8a77470" - SDHI/MMC IP on R8A77470 SoC
> >
> > >                 "renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
> > >                 "renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
> > >                 "renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
> > > @@ -35,8 +37,8 @@ Required properties:
> > >                 "renesas,sdhi-r8a77995" - SDHI IP on R8A77995 SoC
> > >                 "renesas,sdhi-shmobile" - a generic sh-mobile SDHI controller
> > >                 "renesas,rcar-gen1-sdhi" - a generic R-Car Gen1 SDHI controller
> > > -               "renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 or RZ/G1
> > > -                                          SDHI controller
> > > +               "renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 and RZ/G1 (but
> > > +                                          not RZ/G1C SDHI1) SDHI controller
> >
> > And:
> >
> >                "renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 and RZ/G1 SDHI
> >                                           (not SDHI/MMC) controller
> >
> > as it not only applies to RZ/G1C, but also to R-Car E2X (which is not yet
> > supported upstream).
> >
> > >                 "renesas,rcar-gen3-sdhi" - a generic R-Car Gen3 or RZ/G2
> > >                                            SDHI controller
> >
> > What do you think?
> 
> It makes sense to me, I will wait for Simon's reply and if he is happy as well I'll
> send a new version incorporating your recommendations (and his, in case he
> has any).

Hi,

thanks for the feedback here and elsewhere in this thread.
I am happy with the proposed bindings and Geert's proposed
documentation enhancements.