From: "A.s. Dong" <aisheng.dong@nxp.com> To: "linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org> Cc: "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>, "sboyd@kernel.org" <sboyd@kernel.org>, "mturquette@baylibre.com" <mturquette@baylibre.com>, "shawnguo@kernel.org" <shawnguo@kernel.org>, Fabio Estevam <fabio.estevam@nxp.com>, dl-linux-imx <linux-imx@nxp.com>, "kernel@pengutronix.de" <kernel@pengutronix.de>, "A.s. Dong" <aisheng.dong@nxp.com> Subject: [PATCH V4 04/11] clk: imx: scu: add scu clock gpr divider Date: Sun, 14 Oct 2018 08:07:52 +0000 [thread overview] Message-ID: <1539504194-28289-5-git-send-email-aisheng.dong@nxp.com> (raw) In-Reply-To: <1539504194-28289-1-git-send-email-aisheng.dong@nxp.com> Add scu based clock gpr divider. Unlike the normal scu divider, such dividers are controlled by GPR bits through SCU sc_misc_set_control API. Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> --- ChangeLog: v3->v4: * scu headfile path update v2->v3: * structures name and api use update v1->v2: * no changes except update headfile name --- drivers/clk/imx/scu/Makefile | 3 +- drivers/clk/imx/scu/clk-divider-gpr-scu.c | 129 ++++++++++++++++++++++++++++++ drivers/clk/imx/scu/clk-scu.h | 3 + 3 files changed, 134 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/imx/scu/clk-divider-gpr-scu.c diff --git a/drivers/clk/imx/scu/Makefile b/drivers/clk/imx/scu/Makefile index 7e360e2..9e7f4aa 100644 --- a/drivers/clk/imx/scu/Makefile +++ b/drivers/clk/imx/scu/Makefile @@ -2,4 +2,5 @@ obj-$(CONFIG_MXC_CLK_SCU) += \ clk-scu.o \ - clk-divider-scu.o + clk-divider-scu.o \ + clk-divider-gpr-scu.o diff --git a/drivers/clk/imx/scu/clk-divider-gpr-scu.c b/drivers/clk/imx/scu/clk-divider-gpr-scu.c new file mode 100644 index 0000000..95c76dc --- /dev/null +++ b/drivers/clk/imx/scu/clk-divider-gpr-scu.c @@ -0,0 +1,129 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017~2018 NXP + * Dong Aisheng <aisheng.dong@nxp.com> + */ + +#include <linux/clk-provider.h> +#include <linux/err.h> +#include <linux/io.h> +#include <linux/slab.h> + +#include "clk-scu.h" + +struct clk_divider_gpr_scu { + struct clk_hw hw; + u32 rsrc_id; + u8 gpr_id; +}; + +static inline struct clk_divider_gpr_scu *to_clk_divider_gpr_scu(struct clk_hw *hw) +{ + return container_of(hw, struct clk_divider_gpr_scu, hw); +} + +/* + * clk_divider_scu_recalc_rate - Get clock rate for a SCU clock + * @hw: clock to get rate for + * @parent_rate: parent rate provided by common clock framework + * + * Gets the current clock rate of a SCU clock. Returns the current + * clock rate, or zero in failure. + */ +static unsigned long clk_divider_gpr_scu_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct clk_divider_gpr_scu *clk = to_clk_divider_gpr_scu(hw); + u32 val; + int ret; + + ret = imx_sc_misc_get_control(ccm_ipc_handle, clk->rsrc_id, + clk->gpr_id, &val); + if (ret) { + pr_err("%s: failed to get clock rate %d\n", + clk_hw_get_name(hw), ret); + return 0; + } + + return val ? parent_rate / 2 : parent_rate; +} + +/* + * clk_divider_scu_round_rate - Round clock rate for a SCU clock + * @hw: clock to round rate for + * @rate: rate to round + * @parent_rate: parent rate provided by common clock framework + * + * Round clock rate for a SCU clock according to parent rate + */ +static long clk_divider_gpr_scu_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *prate) +{ + if (rate < *prate) + rate = *prate / 2; + else + rate = *prate; + + return rate; +} + +/* + * clk_divider_scu_set_rate - Set rate for a SCU clock + * @hw: clock to change rate for + * @rate: target rate for the clock + * @parent_rate: rate of the clock parent + * + * Sets a clock frequency for a SCU clock. Returns the SCU + * protocol status. + */ +static int clk_divider_gpr_scu_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + struct clk_divider_gpr_scu *clk = to_clk_divider_gpr_scu(hw); + uint32_t val; + + val = (rate < parent_rate) ? 1 : 0; + + return imx_sc_misc_set_control(ccm_ipc_handle, clk->rsrc_id, + clk->gpr_id, val); +} + +static const struct clk_ops clk_divider_gpr_scu_ops = { + .recalc_rate = clk_divider_gpr_scu_recalc_rate, + .round_rate = clk_divider_gpr_scu_round_rate, + .set_rate = clk_divider_gpr_scu_set_rate, +}; + +struct clk_hw *imx_clk_divider_gpr_scu(const char *name, const char *parent_name, + u32 rsrc_id, u8 gpr_id) +{ + struct clk_divider_gpr_scu *div; + struct clk_init_data init; + struct clk_hw *hw; + int ret; + + div = kzalloc(sizeof(*div), GFP_KERNEL); + if (!div) + return ERR_PTR(-ENOMEM); + + div->rsrc_id = rsrc_id; + div->gpr_id = gpr_id; + + init.name = name; + init.ops = &clk_divider_gpr_scu_ops; + init.flags = CLK_GET_RATE_NOCACHE; + init.parent_names = parent_name ? &parent_name : NULL; + init.num_parents = parent_name ? 1 : 0; + + div->hw.init = &init; + + hw = &div->hw; + ret = clk_hw_register(NULL, hw); + if (ret) { + kfree(div); + hw = ERR_PTR(ret); + } + + return hw; +} diff --git a/drivers/clk/imx/scu/clk-scu.h b/drivers/clk/imx/scu/clk-scu.h index e99af63..f0796f3 100644 --- a/drivers/clk/imx/scu/clk-scu.h +++ b/drivers/clk/imx/scu/clk-scu.h @@ -33,4 +33,7 @@ static inline struct clk_hw *imx_clk_divider2_scu(const char *name, return imx_clk_register_divider_scu(name, parent_name, rsrc_id, clk_type); } +struct clk_hw *imx_clk_divider_gpr_scu(const char *name, const char *parent_name, + u32 rsrc_id, u8 gpr_id); + #endif -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: aisheng.dong@nxp.com (A.s. Dong) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH V4 04/11] clk: imx: scu: add scu clock gpr divider Date: Sun, 14 Oct 2018 08:07:52 +0000 [thread overview] Message-ID: <1539504194-28289-5-git-send-email-aisheng.dong@nxp.com> (raw) In-Reply-To: <1539504194-28289-1-git-send-email-aisheng.dong@nxp.com> Add scu based clock gpr divider. Unlike the normal scu divider, such dividers are controlled by GPR bits through SCU sc_misc_set_control API. Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> --- ChangeLog: v3->v4: * scu headfile path update v2->v3: * structures name and api use update v1->v2: * no changes except update headfile name --- drivers/clk/imx/scu/Makefile | 3 +- drivers/clk/imx/scu/clk-divider-gpr-scu.c | 129 ++++++++++++++++++++++++++++++ drivers/clk/imx/scu/clk-scu.h | 3 + 3 files changed, 134 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/imx/scu/clk-divider-gpr-scu.c diff --git a/drivers/clk/imx/scu/Makefile b/drivers/clk/imx/scu/Makefile index 7e360e2..9e7f4aa 100644 --- a/drivers/clk/imx/scu/Makefile +++ b/drivers/clk/imx/scu/Makefile @@ -2,4 +2,5 @@ obj-$(CONFIG_MXC_CLK_SCU) += \ clk-scu.o \ - clk-divider-scu.o + clk-divider-scu.o \ + clk-divider-gpr-scu.o diff --git a/drivers/clk/imx/scu/clk-divider-gpr-scu.c b/drivers/clk/imx/scu/clk-divider-gpr-scu.c new file mode 100644 index 0000000..95c76dc --- /dev/null +++ b/drivers/clk/imx/scu/clk-divider-gpr-scu.c @@ -0,0 +1,129 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017~2018 NXP + * Dong Aisheng <aisheng.dong@nxp.com> + */ + +#include <linux/clk-provider.h> +#include <linux/err.h> +#include <linux/io.h> +#include <linux/slab.h> + +#include "clk-scu.h" + +struct clk_divider_gpr_scu { + struct clk_hw hw; + u32 rsrc_id; + u8 gpr_id; +}; + +static inline struct clk_divider_gpr_scu *to_clk_divider_gpr_scu(struct clk_hw *hw) +{ + return container_of(hw, struct clk_divider_gpr_scu, hw); +} + +/* + * clk_divider_scu_recalc_rate - Get clock rate for a SCU clock + * @hw: clock to get rate for + * @parent_rate: parent rate provided by common clock framework + * + * Gets the current clock rate of a SCU clock. Returns the current + * clock rate, or zero in failure. + */ +static unsigned long clk_divider_gpr_scu_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct clk_divider_gpr_scu *clk = to_clk_divider_gpr_scu(hw); + u32 val; + int ret; + + ret = imx_sc_misc_get_control(ccm_ipc_handle, clk->rsrc_id, + clk->gpr_id, &val); + if (ret) { + pr_err("%s: failed to get clock rate %d\n", + clk_hw_get_name(hw), ret); + return 0; + } + + return val ? parent_rate / 2 : parent_rate; +} + +/* + * clk_divider_scu_round_rate - Round clock rate for a SCU clock + * @hw: clock to round rate for + * @rate: rate to round + * @parent_rate: parent rate provided by common clock framework + * + * Round clock rate for a SCU clock according to parent rate + */ +static long clk_divider_gpr_scu_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *prate) +{ + if (rate < *prate) + rate = *prate / 2; + else + rate = *prate; + + return rate; +} + +/* + * clk_divider_scu_set_rate - Set rate for a SCU clock + * @hw: clock to change rate for + * @rate: target rate for the clock + * @parent_rate: rate of the clock parent + * + * Sets a clock frequency for a SCU clock. Returns the SCU + * protocol status. + */ +static int clk_divider_gpr_scu_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + struct clk_divider_gpr_scu *clk = to_clk_divider_gpr_scu(hw); + uint32_t val; + + val = (rate < parent_rate) ? 1 : 0; + + return imx_sc_misc_set_control(ccm_ipc_handle, clk->rsrc_id, + clk->gpr_id, val); +} + +static const struct clk_ops clk_divider_gpr_scu_ops = { + .recalc_rate = clk_divider_gpr_scu_recalc_rate, + .round_rate = clk_divider_gpr_scu_round_rate, + .set_rate = clk_divider_gpr_scu_set_rate, +}; + +struct clk_hw *imx_clk_divider_gpr_scu(const char *name, const char *parent_name, + u32 rsrc_id, u8 gpr_id) +{ + struct clk_divider_gpr_scu *div; + struct clk_init_data init; + struct clk_hw *hw; + int ret; + + div = kzalloc(sizeof(*div), GFP_KERNEL); + if (!div) + return ERR_PTR(-ENOMEM); + + div->rsrc_id = rsrc_id; + div->gpr_id = gpr_id; + + init.name = name; + init.ops = &clk_divider_gpr_scu_ops; + init.flags = CLK_GET_RATE_NOCACHE; + init.parent_names = parent_name ? &parent_name : NULL; + init.num_parents = parent_name ? 1 : 0; + + div->hw.init = &init; + + hw = &div->hw; + ret = clk_hw_register(NULL, hw); + if (ret) { + kfree(div); + hw = ERR_PTR(ret); + } + + return hw; +} diff --git a/drivers/clk/imx/scu/clk-scu.h b/drivers/clk/imx/scu/clk-scu.h index e99af63..f0796f3 100644 --- a/drivers/clk/imx/scu/clk-scu.h +++ b/drivers/clk/imx/scu/clk-scu.h @@ -33,4 +33,7 @@ static inline struct clk_hw *imx_clk_divider2_scu(const char *name, return imx_clk_register_divider_scu(name, parent_name, rsrc_id, clk_type); } +struct clk_hw *imx_clk_divider_gpr_scu(const char *name, const char *parent_name, + u32 rsrc_id, u8 gpr_id); + #endif -- 2.7.4
next prev parent reply other threads:[~2018-10-14 8:08 UTC|newest] Thread overview: 84+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-10-14 8:07 [PATCH V4 00/11] clk: imx: add imx8qxp clock support A.s. Dong 2018-10-14 8:07 ` A.s. Dong 2018-10-14 8:07 ` [PATCH V4 01/11] clk: imx: add configuration option for mmio clks A.s. Dong 2018-10-14 8:07 ` A.s. Dong 2018-10-14 8:07 ` [PATCH V4 02/11] clk: imx: scu: add scu clock common part A.s. Dong 2018-10-14 8:07 ` A.s. Dong 2018-10-16 21:31 ` Stephen Boyd 2018-10-16 21:31 ` Stephen Boyd 2018-10-17 9:11 ` A.s. Dong 2018-10-17 9:11 ` A.s. Dong 2018-10-17 15:07 ` Stephen Boyd 2018-10-17 15:07 ` Stephen Boyd 2018-10-17 15:27 ` A.s. Dong 2018-10-17 15:27 ` A.s. Dong 2018-10-14 8:07 ` [PATCH V4 03/11] clk: imx: scu: add scu clock divider A.s. Dong 2018-10-14 8:07 ` A.s. Dong 2018-10-16 21:26 ` Stephen Boyd 2018-10-16 21:26 ` Stephen Boyd 2018-10-17 8:56 ` A.s. Dong 2018-10-17 8:56 ` A.s. Dong 2018-10-17 15:17 ` Stephen Boyd 2018-10-17 15:17 ` Stephen Boyd 2018-10-17 15:45 ` A.s. Dong 2018-10-17 15:45 ` A.s. Dong 2018-10-17 16:05 ` Stephen Boyd 2018-10-17 16:05 ` Stephen Boyd 2018-10-18 2:35 ` A.s. Dong 2018-10-18 2:35 ` A.s. Dong 2018-10-14 8:07 ` A.s. Dong [this message] 2018-10-14 8:07 ` [PATCH V4 04/11] clk: imx: scu: add scu clock gpr divider A.s. Dong 2018-10-16 21:27 ` Stephen Boyd 2018-10-16 21:27 ` Stephen Boyd 2018-10-17 9:03 ` A.s. Dong 2018-10-17 9:03 ` A.s. Dong 2018-10-17 15:17 ` Stephen Boyd 2018-10-17 15:17 ` Stephen Boyd 2018-10-14 8:07 ` [PATCH V4 05/11] clk: imx: scu: add scu clock gate A.s. Dong 2018-10-14 8:07 ` A.s. Dong 2018-10-15 7:32 ` Sascha Hauer 2018-10-15 7:32 ` Sascha Hauer 2018-10-15 9:17 ` A.s. Dong 2018-10-15 9:17 ` A.s. Dong 2018-10-15 9:53 ` Sascha Hauer 2018-10-15 9:53 ` Sascha Hauer 2018-10-15 15:30 ` A.s. Dong 2018-10-15 15:30 ` A.s. Dong 2018-10-16 21:18 ` Stephen Boyd 2018-10-16 21:18 ` Stephen Boyd 2018-10-17 7:28 ` A.s. Dong 2018-10-17 7:28 ` A.s. Dong 2018-10-14 8:07 ` [PATCH V4 06/11] clk: imx: scu: add scu clock gpr gate A.s. Dong 2018-10-14 8:07 ` A.s. Dong 2018-10-14 8:08 ` [PATCH V4 07/11] clk: imx: scu: add scu clock mux A.s. Dong 2018-10-14 8:08 ` A.s. Dong 2018-10-14 8:08 ` [PATCH V4 08/11] clk: imx: scu: add scu clock gpr mux A.s. Dong 2018-10-14 8:08 ` A.s. Dong 2018-10-16 21:30 ` Stephen Boyd 2018-10-16 21:30 ` Stephen Boyd 2018-10-17 9:07 ` A.s. Dong 2018-10-17 9:07 ` A.s. Dong 2018-10-17 15:18 ` Stephen Boyd 2018-10-17 15:18 ` Stephen Boyd 2018-10-14 8:08 ` [PATCH V4 09/11] clk: imx: add common imx_clk_hw_fixed functions A.s. Dong 2018-10-14 8:08 ` A.s. Dong 2018-10-16 21:32 ` Stephen Boyd 2018-10-16 21:32 ` Stephen Boyd 2018-10-17 9:21 ` A.s. Dong 2018-10-17 9:21 ` A.s. Dong 2018-10-17 15:18 ` Stephen Boyd 2018-10-17 15:18 ` Stephen Boyd 2018-10-14 8:08 ` [PATCH V4 10/11] clk: imx: add imx_check_clk_hws helper function A.s. Dong 2018-10-14 8:08 ` A.s. Dong 2018-10-16 21:34 ` Stephen Boyd 2018-10-16 21:34 ` Stephen Boyd 2018-10-17 9:24 ` A.s. Dong 2018-10-17 9:24 ` A.s. Dong 2018-10-14 8:08 ` [PATCH V4 11/11] clk: imx: add imx8qxp clk driver A.s. Dong 2018-10-14 8:08 ` A.s. Dong 2018-10-16 21:38 ` Stephen Boyd 2018-10-16 21:38 ` Stephen Boyd 2018-10-17 9:43 ` A.s. Dong 2018-10-17 9:43 ` A.s. Dong 2018-10-17 15:20 ` Stephen Boyd 2018-10-17 15:20 ` Stephen Boyd
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