[PATCH 0/9] KFD upstreaming Nov 2018, part 1

[PATCH 0/9] KFD upstreaming Nov 2018, part 1

[Kuehling, Felix]

These are some recent patches that are easy to upstream (part 1). For
part 2 (hopefully still this month) I'll need to advance the merging
of KFD into amdgpu a little further to avoid upstreaming duplicated
data structures that no longer need to be duplicated.

Eric Huang (1):
  drm/amdkfd: change system memory overcommit limit

Felix Kuehling (2):
  drm/amdkfd: Fix and simplify sync object handling for KFD
  drm/amdgpu: Fix KFD doorbell SG BO mapping

Gang Ba (1):
  drm/amdkfd: Added Vega12 and Polaris12 for KFD.

Harish Kasiviswanathan (2):
  drm/amdgpu: Remove explicit wait after VM validate
  drm/amdgpu: KFD Restore process: Optimize waiting

Yong Zhao (3):
  drm/amdkfd: Replace mqd with mqd_mgr as the variable name for
    mqd_manager
  drm/amdkfd: Adjust the debug message in KFD ISR
  drm/amdkfd: Workaround PASID missing in gfx9 interrupt payload under
    non HWS

 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c         |   2 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c   | 171 ++++++++++++---------
 drivers/gpu/drm/amd/amdkfd/kfd_crat.c              |   6 +
 drivers/gpu/drm/amd/amdkfd/kfd_device.c            |  45 ++++++
 .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.c  |  14 +-
 drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c       |   2 +
 drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c    |  35 ++++-
 drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c      |   2 +
 drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c       |   2 +
 drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c    |   2 +
 drivers/gpu/drm/amd/amdkfd/kfd_topology.c          |   2 +
 11 files changed, 194 insertions(+), 89 deletions(-)

-- 
2.7.4

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[PATCH 1/9] drm/amdkfd: Replace mqd with mqd_mgr as the variable name for mqd_manager

[Kuehling, Felix]

From: Yong Zhao <yong.zhao@amd.com>

This will make reading code much easier. This fixes a few spots missed in a
previous commit with the same title.

Signed-off-by: Yong Zhao <yong.zhao@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
---
 drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
index fb9d66e..d38efbb 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
@@ -1547,7 +1547,7 @@ static int get_wave_state(struct device_queue_manager *dqm,
 			  u32 *ctl_stack_used_size,
 			  u32 *save_area_used_size)
 {
-	struct mqd_manager *mqd;
+	struct mqd_manager *mqd_mgr;
 	int r;
 
 	dqm_lock(dqm);
@@ -1558,19 +1558,19 @@ static int get_wave_state(struct device_queue_manager *dqm,
 		goto dqm_unlock;
 	}
 
-	mqd = dqm->ops.get_mqd_manager(dqm, KFD_MQD_TYPE_COMPUTE);
-	if (!mqd) {
+	mqd_mgr = dqm->ops.get_mqd_manager(dqm, KFD_MQD_TYPE_COMPUTE);
+	if (!mqd_mgr) {
 		r = -ENOMEM;
 		goto dqm_unlock;
 	}
 
-	if (!mqd->get_wave_state) {
+	if (!mqd_mgr->get_wave_state) {
 		r = -EINVAL;
 		goto dqm_unlock;
 	}
 
-	r = mqd->get_wave_state(mqd, q->mqd, ctl_stack, ctl_stack_used_size,
-				save_area_used_size);
+	r = mqd_mgr->get_wave_state(mqd_mgr, q->mqd, ctl_stack,
+			ctl_stack_used_size, save_area_used_size);
 
 dqm_unlock:
 	dqm_unlock(dqm);
-- 
2.7.4

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[PATCH 2/9] drm/amdkfd: Added Vega12 and Polaris12 for KFD.

[Kuehling, Felix]

From: Gang Ba <gaba@amd.com>

Add Vega12 and Polaris12 device info and device IDs to KFD.

Signed-off-by: Gang Ba <gaba@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c         |  2 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c   |  3 +-
 drivers/gpu/drm/amd/amdkfd/kfd_crat.c              |  6 +++
 drivers/gpu/drm/amd/amdkfd/kfd_device.c            | 45 ++++++++++++++++++++++
 .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.c  |  2 +
 drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c       |  2 +
 drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c      |  2 +
 drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c       |  2 +
 drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c    |  2 +
 drivers/gpu/drm/amd/amdkfd/kfd_topology.c          |  2 +
 10 files changed, 67 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
index 60f9a87..a9c7597 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
@@ -73,9 +73,11 @@ void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev)
 	case CHIP_FIJI:
 	case CHIP_POLARIS10:
 	case CHIP_POLARIS11:
+	case CHIP_POLARIS12:
 		kfd2kgd = amdgpu_amdkfd_gfx_8_0_get_functions();
 		break;
 	case CHIP_VEGA10:
+	case CHIP_VEGA12:
 	case CHIP_VEGA20:
 	case CHIP_RAVEN:
 		kfd2kgd = amdgpu_amdkfd_gfx_9_0_get_functions();
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index df0a059..9a1b2b2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -1199,7 +1199,8 @@ int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(
 	byte_align = (adev->family == AMDGPU_FAMILY_VI &&
 			adev->asic_type != CHIP_FIJI &&
 			adev->asic_type != CHIP_POLARIS10 &&
-			adev->asic_type != CHIP_POLARIS11) ?
+			adev->asic_type != CHIP_POLARIS11 &&
+			adev->asic_type != CHIP_POLARIS12) ?
 			VI_BO_SIZE_ALIGN : 1;
 
 	mapping_flags = AMDGPU_VM_PAGE_READABLE;
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
index 3783d12..c02adbb 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
@@ -133,6 +133,7 @@ static struct kfd_gpu_cache_info carrizo_cache_info[] = {
 #define fiji_cache_info  carrizo_cache_info
 #define polaris10_cache_info carrizo_cache_info
 #define polaris11_cache_info carrizo_cache_info
+#define polaris12_cache_info carrizo_cache_info
 /* TODO - check & update Vega10 cache details */
 #define vega10_cache_info carrizo_cache_info
 #define raven_cache_info carrizo_cache_info
@@ -647,7 +648,12 @@ static int kfd_fill_gpu_cache_info(struct kfd_dev *kdev,
 		pcache_info = polaris11_cache_info;
 		num_of_cache_types = ARRAY_SIZE(polaris11_cache_info);
 		break;
+	case CHIP_POLARIS12:
+		pcache_info = polaris12_cache_info;
+		num_of_cache_types = ARRAY_SIZE(polaris12_cache_info);
+		break;
 	case CHIP_VEGA10:
+	case CHIP_VEGA12:
 	case CHIP_VEGA20:
 		pcache_info = vega10_cache_info;
 		num_of_cache_types = ARRAY_SIZE(vega10_cache_info);
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
index c004647..9ed14a1 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
@@ -205,6 +205,22 @@ static const struct kfd_device_info polaris11_device_info = {
 	.num_sdma_queues_per_engine = 2,
 };
 
+static const struct kfd_device_info polaris12_device_info = {
+	.asic_family = CHIP_POLARIS12,
+	.max_pasid_bits = 16,
+	.max_no_of_hqd  = 24,
+	.doorbell_size  = 4,
+	.ih_ring_entry_size = 4 * sizeof(uint32_t),
+	.event_interrupt_class = &event_interrupt_class_cik,
+	.num_of_watch_points = 4,
+	.mqd_size_aligned = MQD_SIZE_ALIGNED,
+	.supports_cwsr = true,
+	.needs_iommu_device = false,
+	.needs_pci_atomics = true,
+	.num_sdma_engines = 2,
+	.num_sdma_queues_per_engine = 2,
+};
+
 static const struct kfd_device_info vega10_device_info = {
 	.asic_family = CHIP_VEGA10,
 	.max_pasid_bits = 16,
@@ -237,6 +253,22 @@ static const struct kfd_device_info vega10_vf_device_info = {
 	.num_sdma_queues_per_engine = 2,
 };
 
+static const struct kfd_device_info vega12_device_info = {
+	.asic_family = CHIP_VEGA12,
+	.max_pasid_bits = 16,
+	.max_no_of_hqd  = 24,
+	.doorbell_size  = 8,
+	.ih_ring_entry_size = 8 * sizeof(uint32_t),
+	.event_interrupt_class = &event_interrupt_class_v9,
+	.num_of_watch_points = 4,
+	.mqd_size_aligned = MQD_SIZE_ALIGNED,
+	.supports_cwsr = true,
+	.needs_iommu_device = false,
+	.needs_pci_atomics = false,
+	.num_sdma_engines = 2,
+	.num_sdma_queues_per_engine = 2,
+};
+
 static const struct kfd_device_info vega20_device_info = {
 	.asic_family = CHIP_VEGA20,
 	.max_pasid_bits = 16,
@@ -331,6 +363,14 @@ static const struct kfd_deviceid supported_devices[] = {
 	{ 0x67EB, &polaris11_device_info },	/* Polaris11 */
 	{ 0x67EF, &polaris11_device_info },	/* Polaris11 */
 	{ 0x67FF, &polaris11_device_info },	/* Polaris11 */
+	{ 0x6980, &polaris12_device_info },	/* Polaris12 */
+	{ 0x6981, &polaris12_device_info },	/* Polaris12 */
+	{ 0x6985, &polaris12_device_info },	/* Polaris12 */
+	{ 0x6986, &polaris12_device_info },	/* Polaris12 */
+	{ 0x6987, &polaris12_device_info },	/* Polaris12 */
+	{ 0x6995, &polaris12_device_info },	/* Polaris12 */
+	{ 0x6997, &polaris12_device_info },	/* Polaris12 */
+	{ 0x699F, &polaris12_device_info },	/* Polaris12 */
 	{ 0x6860, &vega10_device_info },	/* Vega10 */
 	{ 0x6861, &vega10_device_info },	/* Vega10 */
 	{ 0x6862, &vega10_device_info },	/* Vega10 */
@@ -340,6 +380,11 @@ static const struct kfd_deviceid supported_devices[] = {
 	{ 0x6868, &vega10_device_info },	/* Vega10 */
 	{ 0x686C, &vega10_vf_device_info },	/* Vega10  vf*/
 	{ 0x687F, &vega10_device_info },	/* Vega10 */
+	{ 0x69A0, &vega12_device_info },	/* Vega12 */
+	{ 0x69A1, &vega12_device_info },	/* Vega12 */
+	{ 0x69A2, &vega12_device_info },	/* Vega12 */
+	{ 0x69A3, &vega12_device_info },	/* Vega12 */
+	{ 0x69AF, &vega12_device_info },	/* Vega12 */
 	{ 0x66a0, &vega20_device_info },	/* Vega20 */
 	{ 0x66a1, &vega20_device_info },	/* Vega20 */
 	{ 0x66a2, &vega20_device_info },	/* Vega20 */
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
index d38efbb..8372556 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
@@ -1741,10 +1741,12 @@ struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev)
 	case CHIP_FIJI:
 	case CHIP_POLARIS10:
 	case CHIP_POLARIS11:
+	case CHIP_POLARIS12:
 		device_queue_manager_init_vi_tonga(&dqm->asic_ops);
 		break;
 
 	case CHIP_VEGA10:
+	case CHIP_VEGA12:
 	case CHIP_VEGA20:
 	case CHIP_RAVEN:
 		device_queue_manager_init_v9(&dqm->asic_ops);
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c b/drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c
index 3d66cec..213ea54 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c
@@ -397,9 +397,11 @@ int kfd_init_apertures(struct kfd_process *process)
 			case CHIP_FIJI:
 			case CHIP_POLARIS10:
 			case CHIP_POLARIS11:
+			case CHIP_POLARIS12:
 				kfd_init_apertures_vi(pdd, id);
 				break;
 			case CHIP_VEGA10:
+			case CHIP_VEGA12:
 			case CHIP_VEGA20:
 			case CHIP_RAVEN:
 				kfd_init_apertures_v9(pdd, id);
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c
index 6c31f73..f159688 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c
@@ -313,6 +313,7 @@ struct kernel_queue *kernel_queue_init(struct kfd_dev *dev,
 	case CHIP_FIJI:
 	case CHIP_POLARIS10:
 	case CHIP_POLARIS11:
+	case CHIP_POLARIS12:
 		kernel_queue_init_vi(&kq->ops_asic_specific);
 		break;
 
@@ -322,6 +323,7 @@ struct kernel_queue *kernel_queue_init(struct kfd_dev *dev,
 		break;
 
 	case CHIP_VEGA10:
+	case CHIP_VEGA12:
 	case CHIP_VEGA20:
 	case CHIP_RAVEN:
 		kernel_queue_init_v9(&kq->ops_asic_specific);
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c
index 6910028..aed9b9b 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c
@@ -38,8 +38,10 @@ struct mqd_manager *mqd_manager_init(enum KFD_MQD_TYPE type,
 	case CHIP_FIJI:
 	case CHIP_POLARIS10:
 	case CHIP_POLARIS11:
+	case CHIP_POLARIS12:
 		return mqd_manager_init_vi_tonga(type, dev);
 	case CHIP_VEGA10:
+	case CHIP_VEGA12:
 	case CHIP_VEGA20:
 	case CHIP_RAVEN:
 		return mqd_manager_init_v9(type, dev);
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
index c6080ed3..045a229 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
@@ -226,9 +226,11 @@ int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm)
 	case CHIP_FIJI:
 	case CHIP_POLARIS10:
 	case CHIP_POLARIS11:
+	case CHIP_POLARIS12:
 		pm->pmf = &kfd_vi_pm_funcs;
 		break;
 	case CHIP_VEGA10:
+	case CHIP_VEGA12:
 	case CHIP_VEGA20:
 	case CHIP_RAVEN:
 		pm->pmf = &kfd_v9_pm_funcs;
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
index c73b4ff..aa793fc 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
@@ -1272,12 +1272,14 @@ int kfd_topology_add_device(struct kfd_dev *gpu)
 	case CHIP_FIJI:
 	case CHIP_POLARIS10:
 	case CHIP_POLARIS11:
+	case CHIP_POLARIS12:
 		pr_debug("Adding doorbell packet type capability\n");
 		dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_1_0 <<
 			HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) &
 			HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK);
 		break;
 	case CHIP_VEGA10:
+	case CHIP_VEGA12:
 	case CHIP_VEGA20:
 	case CHIP_RAVEN:
 		dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_2_0 <<
-- 
2.7.4

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[PATCH 3/9] drm/amdkfd: Adjust the debug message in KFD ISR

[Kuehling, Felix]

From: Yong Zhao <Yong.Zhao@amd.com>

This makes debug message get printed even when there is early return.

Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
---
 drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c
index f836897..8497864 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c
@@ -39,20 +39,20 @@ static bool event_interrupt_isr_v9(struct kfd_dev *dev,
 	    vmid > dev->vm_info.last_vmid_kfd)
 		return 0;
 
-	/* If there is no valid PASID, it's likely a firmware bug */
-	pasid = SOC15_PASID_FROM_IH_ENTRY(ih_ring_entry);
-	if (WARN_ONCE(pasid == 0, "FW bug: No PASID in KFD interrupt"))
-		return 0;
-
 	source_id = SOC15_SOURCE_ID_FROM_IH_ENTRY(ih_ring_entry);
 	client_id = SOC15_CLIENT_ID_FROM_IH_ENTRY(ih_ring_entry);
+	pasid = SOC15_PASID_FROM_IH_ENTRY(ih_ring_entry);
 
-	pr_debug("client id 0x%x, source id %d, pasid 0x%x. raw data:\n",
-		 client_id, source_id, pasid);
+	pr_debug("client id 0x%x, source id %d, vmid %d, pasid 0x%x. raw data:\n",
+		 client_id, source_id, vmid, pasid);
 	pr_debug("%8X, %8X, %8X, %8X, %8X, %8X, %8X, %8X.\n",
 		 data[0], data[1], data[2], data[3],
 		 data[4], data[5], data[6], data[7]);
 
+	/* If there is no valid PASID, it's likely a firmware bug */
+	if (WARN_ONCE(pasid == 0, "FW bug: No PASID in KFD interrupt"))
+		return 0;
+
 	/* Interrupt types we care about: various signals and faults.
 	 * They will be forwarded to a work queue (see below).
 	 */
-- 
2.7.4

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[PATCH 4/9] drm/amdkfd: Workaround PASID missing in gfx9 interrupt payload under non HWS

[Kuehling, Felix]

From: Yong Zhao <Yong.Zhao@amd.com>

This is a known gfx9 HW issue, and this change can perfectly workaround
the issue.

Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
---
 drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c | 25 ++++++++++++++++++++++---
 1 file changed, 22 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c
index 8497864..a85904a 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c
@@ -23,7 +23,7 @@
 #include "kfd_priv.h"
 #include "kfd_events.h"
 #include "soc15_int.h"
-
+#include "kfd_device_queue_manager.h"
 
 static bool event_interrupt_isr_v9(struct kfd_dev *dev,
 					const uint32_t *ih_ring_entry,
@@ -43,14 +43,33 @@ static bool event_interrupt_isr_v9(struct kfd_dev *dev,
 	client_id = SOC15_CLIENT_ID_FROM_IH_ENTRY(ih_ring_entry);
 	pasid = SOC15_PASID_FROM_IH_ENTRY(ih_ring_entry);
 
+	/* This is a known issue for gfx9. Under non HWS, pasid is not set
+	 * in the interrupt payload, so we need to find out the pasid on our
+	 * own.
+	 */
+	if (!pasid && dev->dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS) {
+		const uint32_t pasid_mask = 0xffff;
+
+		*patched_flag = true;
+		memcpy(patched_ihre, ih_ring_entry,
+				dev->device_info->ih_ring_entry_size);
+
+		pasid = dev->kfd2kgd->get_atc_vmid_pasid_mapping_pasid(
+				dev->kgd, vmid);
+
+		/* Patch the pasid field */
+		patched_ihre[3] = cpu_to_le32((le32_to_cpu(patched_ihre[3])
+					& ~pasid_mask) | pasid);
+	}
+
 	pr_debug("client id 0x%x, source id %d, vmid %d, pasid 0x%x. raw data:\n",
 		 client_id, source_id, vmid, pasid);
 	pr_debug("%8X, %8X, %8X, %8X, %8X, %8X, %8X, %8X.\n",
 		 data[0], data[1], data[2], data[3],
 		 data[4], data[5], data[6], data[7]);
 
-	/* If there is no valid PASID, it's likely a firmware bug */
-	if (WARN_ONCE(pasid == 0, "FW bug: No PASID in KFD interrupt"))
+	/* If there is no valid PASID, it's likely a bug */
+	if (WARN_ONCE(pasid == 0, "Bug: No PASID in KFD interrupt"))
 		return 0;
 
 	/* Interrupt types we care about: various signals and faults.
-- 
2.7.4

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[PATCH 5/9] drm/amdgpu: Remove explicit wait after VM validate

[Kuehling, Felix]

From: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>

PD or PT might have to be moved during validation and this move has to be
completed before updating it. If page table updates are done using SDMA
then this serializing is done by SDMA command submission.

And if PD/PT updates are done by CPU, then explicit waiting for PD/PT
updates are done in amdgpu VM amdgpu_vm_wait_pd function.

Sync to PD BO moving fence to handle corner case where none of the PTs
are updated but PD is evicted.

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 31 ++++++++++++++++++------
 1 file changed, 24 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index 9a1b2b2..e124d2d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -901,6 +901,26 @@ static int process_validate_vms(struct amdkfd_process_info *process_info)
 	return 0;
 }
 
+static int process_sync_pds_resv(struct amdkfd_process_info *process_info,
+				 struct amdgpu_sync *sync)
+{
+	struct amdgpu_vm *peer_vm;
+	int ret;
+
+	list_for_each_entry(peer_vm, &process_info->vm_list_head,
+			    vm_list_node) {
+		struct amdgpu_bo *pd = peer_vm->root.base.bo;
+
+		ret = amdgpu_sync_resv(amdgpu_ttm_adev(pd->tbo.bdev),
+					sync, pd->tbo.resv,
+					AMDGPU_FENCE_OWNER_UNDEFINED, false);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
 static int process_update_pds(struct amdkfd_process_info *process_info,
 			      struct amdgpu_sync *sync)
 {
@@ -2045,13 +2065,10 @@ int amdgpu_amdkfd_gpuvm_restore_process_bos(void *info, struct dma_fence **ef)
 	if (ret)
 		goto validate_map_fail;
 
-	/* Wait for PD/PTs validate to finish */
-	/* FIXME: I think this isn't needed */
-	list_for_each_entry(peer_vm, &process_info->vm_list_head,
-			    vm_list_node) {
-		struct amdgpu_bo *bo = peer_vm->root.base.bo;
-
-		ttm_bo_wait(&bo->tbo, false, false);
+	ret = process_sync_pds_resv(process_info, &sync_obj);
+	if (ret) {
+		pr_debug("Memory eviction: Failed to sync to PD BO moving fence. Try again\n");
+		goto validate_map_fail;
 	}
 
 	/* Validate BOs and map them to GPUVM (update VM page tables). */
-- 
2.7.4

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[PATCH 6/9] drm/amdgpu: KFD Restore process: Optimize waiting

[Kuehling, Felix]

From: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>

Instead of waiting for each KFD BO after validation just wait for the
last BO moving fence.

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index e124d2d..d005371 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -2084,7 +2084,12 @@ int amdgpu_amdkfd_gpuvm_restore_process_bos(void *info, struct dma_fence **ef)
 			pr_debug("Memory eviction: Validate BOs failed. Try again\n");
 			goto validate_map_fail;
 		}
-
+		ret = amdgpu_sync_fence(amdgpu_ttm_adev(bo->tbo.bdev),
+					&sync_obj, bo->tbo.moving, false);
+		if (ret) {
+			pr_debug("Memory eviction: Sync BO fence failed. Try again\n");
+			goto validate_map_fail;
+		}
 		list_for_each_entry(bo_va_entry, &mem->bo_va_list,
 				    bo_list) {
 			ret = update_gpuvm_pte((struct amdgpu_device *)
@@ -2105,6 +2110,7 @@ int amdgpu_amdkfd_gpuvm_restore_process_bos(void *info, struct dma_fence **ef)
 		goto validate_map_fail;
 	}
 
+	/* Wait for validate and PT updates to finish */
 	amdgpu_sync_wait(&sync_obj, false);
 
 	/* Release old eviction fence and create new one, because fence only
@@ -2123,10 +2129,7 @@ int amdgpu_amdkfd_gpuvm_restore_process_bos(void *info, struct dma_fence **ef)
 	process_info->eviction_fence = new_fence;
 	*ef = dma_fence_get(&new_fence->base);
 
-	/* Wait for validate to finish and attach new eviction fence */
-	list_for_each_entry(mem, &process_info->kfd_bo_list,
-		validate_list.head)
-		ttm_bo_wait(&mem->bo->tbo, false, false);
+	/* Attach new eviction fence to all BOs */
 	list_for_each_entry(mem, &process_info->kfd_bo_list,
 		validate_list.head)
 		amdgpu_bo_fence(mem->bo,
-- 
2.7.4

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[PATCH 7/9] drm/amdkfd: Fix and simplify sync object handling for KFD

[Kuehling, Felix]

The adev parameter in amdgpu_sync_fence and amdgpu_sync_resv is only
needed for updating sync->last_vm_update. This breaks if different
adevs are passed to calls for the same sync object.

Always pass NULL for calls from KFD because sync objects used for
KFD don't belong to any particular device, and KFD doesn't need the
sync->last_vm_update fence.

This fixes kernel log warnings on multi-GPU systems after recent
changes in amdgpu_amdkfd_gpuvm_restore_process_bos.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 28 +++++-------------------
 1 file changed, 5 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index d005371..572ac5f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -395,23 +395,6 @@ static int vm_validate_pt_pd_bos(struct amdgpu_vm *vm)
 	return 0;
 }
 
-static int sync_vm_fence(struct amdgpu_device *adev, struct amdgpu_sync *sync,
-			 struct dma_fence *f)
-{
-	int ret = amdgpu_sync_fence(adev, sync, f, false);
-
-	/* Sync objects can't handle multiple GPUs (contexts) updating
-	 * sync->last_vm_update. Fortunately we don't need it for
-	 * KFD's purposes, so we can just drop that fence.
-	 */
-	if (sync->last_vm_update) {
-		dma_fence_put(sync->last_vm_update);
-		sync->last_vm_update = NULL;
-	}
-
-	return ret;
-}
-
 static int vm_update_pds(struct amdgpu_vm *vm, struct amdgpu_sync *sync)
 {
 	struct amdgpu_bo *pd = vm->root.base.bo;
@@ -422,7 +405,7 @@ static int vm_update_pds(struct amdgpu_vm *vm, struct amdgpu_sync *sync)
 	if (ret)
 		return ret;
 
-	return sync_vm_fence(adev, sync, vm->last_update);
+	return amdgpu_sync_fence(NULL, sync, vm->last_update, false);
 }
 
 /* add_bo_to_vm - Add a BO to a VM
@@ -826,7 +809,7 @@ static int unmap_bo_from_gpuvm(struct amdgpu_device *adev,
 	/* Add the eviction fence back */
 	amdgpu_bo_fence(pd, &vm->process_info->eviction_fence->base, true);
 
-	sync_vm_fence(adev, sync, bo_va->last_pt_update);
+	amdgpu_sync_fence(NULL, sync, bo_va->last_pt_update, false);
 
 	return 0;
 }
@@ -851,7 +834,7 @@ static int update_gpuvm_pte(struct amdgpu_device *adev,
 		return ret;
 	}
 
-	return sync_vm_fence(adev, sync, bo_va->last_pt_update);
+	return amdgpu_sync_fence(NULL, sync, bo_va->last_pt_update, false);
 }
 
 static int map_bo_to_gpuvm(struct amdgpu_device *adev,
@@ -911,7 +894,7 @@ static int process_sync_pds_resv(struct amdkfd_process_info *process_info,
 			    vm_list_node) {
 		struct amdgpu_bo *pd = peer_vm->root.base.bo;
 
-		ret = amdgpu_sync_resv(amdgpu_ttm_adev(pd->tbo.bdev),
+		ret = amdgpu_sync_resv(NULL,
 					sync, pd->tbo.resv,
 					AMDGPU_FENCE_OWNER_UNDEFINED, false);
 		if (ret)
@@ -2084,8 +2067,7 @@ int amdgpu_amdkfd_gpuvm_restore_process_bos(void *info, struct dma_fence **ef)
 			pr_debug("Memory eviction: Validate BOs failed. Try again\n");
 			goto validate_map_fail;
 		}
-		ret = amdgpu_sync_fence(amdgpu_ttm_adev(bo->tbo.bdev),
-					&sync_obj, bo->tbo.moving, false);
+		ret = amdgpu_sync_fence(NULL, &sync_obj, bo->tbo.moving, false);
 		if (ret) {
 			pr_debug("Memory eviction: Sync BO fence failed. Try again\n");
 			goto validate_map_fail;
-- 
2.7.4

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[PATCH 8/9] drm/amdgpu: Fix KFD doorbell SG BO mapping

[Kuehling, Felix]

This change prepares for adding SG BOs that will be used for mapping
doorbells into GPUVM address space.

This type of BO would be mistaken for an invalid userptr BO. Improve
that check to test that it's actually a userptr BO so that SG BOs that
are still in the CPU domain can be validated and mapped correctly.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index 572ac5f..84e4c1e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -1409,7 +1409,8 @@ int amdgpu_amdkfd_gpuvm_map_memory_to_gpu(
 	 * the queues are still stopped and we can leave mapping for
 	 * the next restore worker
 	 */
-	if (bo->tbo.mem.mem_type == TTM_PL_SYSTEM)
+	if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm) &&
+	    bo->tbo.mem.mem_type == TTM_PL_SYSTEM)
 		is_invalid_userptr = true;
 
 	if (check_if_add_bo_to_vm(avm, mem)) {
-- 
2.7.4

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[PATCH 9/9] drm/amdkfd: change system memory overcommit limit

[Kuehling, Felix]

From: Eric Huang <JinhuiEric.Huang@amd.com>

It is to improve system limit by:
1. replacing userptrlimit with a total memory limit that
conunts TTM memory usage and userptr usage.
2. counting acc size for all BOs.

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 99 ++++++++++++++----------
 1 file changed, 58 insertions(+), 41 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index 84e4c1e..f3129b9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -46,9 +46,9 @@
 /* Impose limit on how much memory KFD can use */
 static struct {
 	uint64_t max_system_mem_limit;
-	uint64_t max_userptr_mem_limit;
+	uint64_t max_ttm_mem_limit;
 	int64_t system_mem_used;
-	int64_t userptr_mem_used;
+	int64_t ttm_mem_used;
 	spinlock_t mem_limit_lock;
 } kfd_mem_limit;
 
@@ -90,8 +90,8 @@ static bool check_if_add_bo_to_vm(struct amdgpu_vm *avm,
 }
 
 /* Set memory usage limits. Current, limits are
- *  System (kernel) memory - 3/8th System RAM
- *  Userptr memory - 3/4th System RAM
+ *  System (TTM + userptr) memory - 3/4th System RAM
+ *  TTM memory - 3/8th System RAM
  */
 void amdgpu_amdkfd_gpuvm_init_mem_limits(void)
 {
@@ -103,48 +103,54 @@ void amdgpu_amdkfd_gpuvm_init_mem_limits(void)
 	mem *= si.mem_unit;
 
 	spin_lock_init(&kfd_mem_limit.mem_limit_lock);
-	kfd_mem_limit.max_system_mem_limit = (mem >> 1) - (mem >> 3);
-	kfd_mem_limit.max_userptr_mem_limit = mem - (mem >> 2);
-	pr_debug("Kernel memory limit %lluM, userptr limit %lluM\n",
+	kfd_mem_limit.max_system_mem_limit = (mem >> 1) + (mem >> 2);
+	kfd_mem_limit.max_ttm_mem_limit = (mem >> 1) - (mem >> 3);
+	pr_debug("Kernel memory limit %lluM, TTM limit %lluM\n",
 		(kfd_mem_limit.max_system_mem_limit >> 20),
-		(kfd_mem_limit.max_userptr_mem_limit >> 20));
+		(kfd_mem_limit.max_ttm_mem_limit >> 20));
 }
 
 static int amdgpu_amdkfd_reserve_system_mem_limit(struct amdgpu_device *adev,
-					      uint64_t size, u32 domain)
+		uint64_t size, u32 domain, bool sg)
 {
-	size_t acc_size;
+	size_t acc_size, system_mem_needed, ttm_mem_needed;
 	int ret = 0;
 
 	acc_size = ttm_bo_dma_acc_size(&adev->mman.bdev, size,
 				       sizeof(struct amdgpu_bo));
 
 	spin_lock(&kfd_mem_limit.mem_limit_lock);
+
 	if (domain == AMDGPU_GEM_DOMAIN_GTT) {
-		if (kfd_mem_limit.system_mem_used + (acc_size + size) >
-			kfd_mem_limit.max_system_mem_limit) {
-			ret = -ENOMEM;
-			goto err_no_mem;
-		}
-		kfd_mem_limit.system_mem_used += (acc_size + size);
-	} else if (domain == AMDGPU_GEM_DOMAIN_CPU) {
-		if ((kfd_mem_limit.system_mem_used + acc_size >
-			kfd_mem_limit.max_system_mem_limit) ||
-			(kfd_mem_limit.userptr_mem_used + (size + acc_size) >
-			kfd_mem_limit.max_userptr_mem_limit)) {
-			ret = -ENOMEM;
-			goto err_no_mem;
-		}
-		kfd_mem_limit.system_mem_used += acc_size;
-		kfd_mem_limit.userptr_mem_used += size;
+		/* TTM GTT memory */
+		system_mem_needed = acc_size + size;
+		ttm_mem_needed = acc_size + size;
+	} else if (domain == AMDGPU_GEM_DOMAIN_CPU && !sg) {
+		/* Userptr */
+		system_mem_needed = acc_size + size;
+		ttm_mem_needed = acc_size;
+	} else {
+		/* VRAM and SG */
+		system_mem_needed = acc_size;
+		ttm_mem_needed = acc_size;
+	}
+
+	if ((kfd_mem_limit.system_mem_used + system_mem_needed >
+		kfd_mem_limit.max_system_mem_limit) ||
+		(kfd_mem_limit.ttm_mem_used + ttm_mem_needed >
+		kfd_mem_limit.max_ttm_mem_limit))
+		ret = -ENOMEM;
+	else {
+		kfd_mem_limit.system_mem_used += system_mem_needed;
+		kfd_mem_limit.ttm_mem_used += ttm_mem_needed;
 	}
-err_no_mem:
+
 	spin_unlock(&kfd_mem_limit.mem_limit_lock);
 	return ret;
 }
 
 static void unreserve_system_mem_limit(struct amdgpu_device *adev,
-				       uint64_t size, u32 domain)
+		uint64_t size, u32 domain, bool sg)
 {
 	size_t acc_size;
 
@@ -154,14 +160,18 @@ static void unreserve_system_mem_limit(struct amdgpu_device *adev,
 	spin_lock(&kfd_mem_limit.mem_limit_lock);
 	if (domain == AMDGPU_GEM_DOMAIN_GTT) {
 		kfd_mem_limit.system_mem_used -= (acc_size + size);
-	} else if (domain == AMDGPU_GEM_DOMAIN_CPU) {
+		kfd_mem_limit.ttm_mem_used -= (acc_size + size);
+	} else if (domain == AMDGPU_GEM_DOMAIN_CPU && !sg) {
+		kfd_mem_limit.system_mem_used -= (acc_size + size);
+		kfd_mem_limit.ttm_mem_used -= acc_size;
+	} else {
 		kfd_mem_limit.system_mem_used -= acc_size;
-		kfd_mem_limit.userptr_mem_used -= size;
+		kfd_mem_limit.ttm_mem_used -= acc_size;
 	}
 	WARN_ONCE(kfd_mem_limit.system_mem_used < 0,
 		  "kfd system memory accounting unbalanced");
-	WARN_ONCE(kfd_mem_limit.userptr_mem_used < 0,
-		  "kfd userptr memory accounting unbalanced");
+	WARN_ONCE(kfd_mem_limit.ttm_mem_used < 0,
+		  "kfd TTM memory accounting unbalanced");
 
 	spin_unlock(&kfd_mem_limit.mem_limit_lock);
 }
@@ -171,16 +181,22 @@ void amdgpu_amdkfd_unreserve_system_memory_limit(struct amdgpu_bo *bo)
 	spin_lock(&kfd_mem_limit.mem_limit_lock);
 
 	if (bo->flags & AMDGPU_AMDKFD_USERPTR_BO) {
-		kfd_mem_limit.system_mem_used -= bo->tbo.acc_size;
-		kfd_mem_limit.userptr_mem_used -= amdgpu_bo_size(bo);
+		kfd_mem_limit.system_mem_used -=
+			(bo->tbo.acc_size + amdgpu_bo_size(bo));
+		kfd_mem_limit.ttm_mem_used -= bo->tbo.acc_size;
 	} else if (bo->preferred_domains == AMDGPU_GEM_DOMAIN_GTT) {
 		kfd_mem_limit.system_mem_used -=
 			(bo->tbo.acc_size + amdgpu_bo_size(bo));
+		kfd_mem_limit.ttm_mem_used -=
+			(bo->tbo.acc_size + amdgpu_bo_size(bo));
+	} else {
+		kfd_mem_limit.system_mem_used -= bo->tbo.acc_size;
+		kfd_mem_limit.ttm_mem_used -= bo->tbo.acc_size;
 	}
 	WARN_ONCE(kfd_mem_limit.system_mem_used < 0,
 		  "kfd system memory accounting unbalanced");
-	WARN_ONCE(kfd_mem_limit.userptr_mem_used < 0,
-		  "kfd userptr memory accounting unbalanced");
+	WARN_ONCE(kfd_mem_limit.ttm_mem_used < 0,
+		  "kfd TTM memory accounting unbalanced");
 
 	spin_unlock(&kfd_mem_limit.mem_limit_lock);
 }
@@ -1219,10 +1235,11 @@ int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(
 
 	amdgpu_sync_create(&(*mem)->sync);
 
-	ret = amdgpu_amdkfd_reserve_system_mem_limit(adev, size, alloc_domain);
+	ret = amdgpu_amdkfd_reserve_system_mem_limit(adev, size,
+						     alloc_domain, false);
 	if (ret) {
 		pr_debug("Insufficient system memory\n");
-		goto err_reserve_system_mem;
+		goto err_reserve_limit;
 	}
 
 	pr_debug("\tcreate BO VA 0x%llx size 0x%llx domain %s\n",
@@ -1270,10 +1287,10 @@ int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(
 allocate_init_user_pages_failed:
 	amdgpu_bo_unref(&bo);
 	/* Don't unreserve system mem limit twice */
-	goto err_reserve_system_mem;
+	goto err_reserve_limit;
 err_bo_create:
-	unreserve_system_mem_limit(adev, size, alloc_domain);
-err_reserve_system_mem:
+	unreserve_system_mem_limit(adev, size, alloc_domain, false);
+err_reserve_limit:
 	mutex_destroy(&(*mem)->lock);
 	kfree(*mem);
 	return ret;
-- 
2.7.4

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Re: [PATCH 1/9] drm/amdkfd: Replace mqd with mqd_mgr as the variable name for mqd_manager

[Alex Deucher]

On Mon, Nov 5, 2018 at 8:40 PM Kuehling, Felix <Felix.Kuehling@amd.com> wrote:
>
> From: Yong Zhao <yong.zhao@amd.com>
>
> This will make reading code much easier. This fixes a few spots missed in a
> previous commit with the same title.
>
> Signed-off-by: Yong Zhao <yong.zhao@amd.com>
> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

> ---
>  drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> index fb9d66e..d38efbb 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> @@ -1547,7 +1547,7 @@ static int get_wave_state(struct device_queue_manager *dqm,
>                           u32 *ctl_stack_used_size,
>                           u32 *save_area_used_size)
>  {
> -       struct mqd_manager *mqd;
> +       struct mqd_manager *mqd_mgr;
>         int r;
>
>         dqm_lock(dqm);
> @@ -1558,19 +1558,19 @@ static int get_wave_state(struct device_queue_manager *dqm,
>                 goto dqm_unlock;
>         }
>
> -       mqd = dqm->ops.get_mqd_manager(dqm, KFD_MQD_TYPE_COMPUTE);
> -       if (!mqd) {
> +       mqd_mgr = dqm->ops.get_mqd_manager(dqm, KFD_MQD_TYPE_COMPUTE);
> +       if (!mqd_mgr) {
>                 r = -ENOMEM;
>                 goto dqm_unlock;
>         }
>
> -       if (!mqd->get_wave_state) {
> +       if (!mqd_mgr->get_wave_state) {
>                 r = -EINVAL;
>                 goto dqm_unlock;
>         }
>
> -       r = mqd->get_wave_state(mqd, q->mqd, ctl_stack, ctl_stack_used_size,
> -                               save_area_used_size);
> +       r = mqd_mgr->get_wave_state(mqd_mgr, q->mqd, ctl_stack,
> +                       ctl_stack_used_size, save_area_used_size);
>
>  dqm_unlock:
>         dqm_unlock(dqm);
> --
> 2.7.4
>
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Re: [PATCH 2/9] drm/amdkfd: Added Vega12 and Polaris12 for KFD.

[Alex Deucher]

On Mon, Nov 5, 2018 at 8:41 PM Kuehling, Felix <Felix.Kuehling@amd.com> wrote:
>
> From: Gang Ba <gaba@amd.com>
>
> Add Vega12 and Polaris12 device info and device IDs to KFD.
>
> Signed-off-by: Gang Ba <gaba@amd.com>
> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c         |  2 +
>  drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c   |  3 +-
>  drivers/gpu/drm/amd/amdkfd/kfd_crat.c              |  6 +++
>  drivers/gpu/drm/amd/amdkfd/kfd_device.c            | 45 ++++++++++++++++++++++
>  .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.c  |  2 +
>  drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c       |  2 +
>  drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c      |  2 +
>  drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c       |  2 +
>  drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c    |  2 +
>  drivers/gpu/drm/amd/amdkfd/kfd_topology.c          |  2 +
>  10 files changed, 67 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> index 60f9a87..a9c7597 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> @@ -73,9 +73,11 @@ void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev)
>         case CHIP_FIJI:
>         case CHIP_POLARIS10:
>         case CHIP_POLARIS11:
> +       case CHIP_POLARIS12:
>                 kfd2kgd = amdgpu_amdkfd_gfx_8_0_get_functions();
>                 break;
>         case CHIP_VEGA10:
> +       case CHIP_VEGA12:
>         case CHIP_VEGA20:
>         case CHIP_RAVEN:
>                 kfd2kgd = amdgpu_amdkfd_gfx_9_0_get_functions();
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> index df0a059..9a1b2b2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> @@ -1199,7 +1199,8 @@ int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(
>         byte_align = (adev->family == AMDGPU_FAMILY_VI &&
>                         adev->asic_type != CHIP_FIJI &&
>                         adev->asic_type != CHIP_POLARIS10 &&
> -                       adev->asic_type != CHIP_POLARIS11) ?
> +                       adev->asic_type != CHIP_POLARIS11 &&
> +                       adev->asic_type != CHIP_POLARIS12) ?
>                         VI_BO_SIZE_ALIGN : 1;
>
>         mapping_flags = AMDGPU_VM_PAGE_READABLE;
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
> index 3783d12..c02adbb 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
> @@ -133,6 +133,7 @@ static struct kfd_gpu_cache_info carrizo_cache_info[] = {
>  #define fiji_cache_info  carrizo_cache_info
>  #define polaris10_cache_info carrizo_cache_info
>  #define polaris11_cache_info carrizo_cache_info
> +#define polaris12_cache_info carrizo_cache_info
>  /* TODO - check & update Vega10 cache details */
>  #define vega10_cache_info carrizo_cache_info
>  #define raven_cache_info carrizo_cache_info
> @@ -647,7 +648,12 @@ static int kfd_fill_gpu_cache_info(struct kfd_dev *kdev,
>                 pcache_info = polaris11_cache_info;
>                 num_of_cache_types = ARRAY_SIZE(polaris11_cache_info);
>                 break;
> +       case CHIP_POLARIS12:
> +               pcache_info = polaris12_cache_info;
> +               num_of_cache_types = ARRAY_SIZE(polaris12_cache_info);
> +               break;
>         case CHIP_VEGA10:
> +       case CHIP_VEGA12:
>         case CHIP_VEGA20:
>                 pcache_info = vega10_cache_info;
>                 num_of_cache_types = ARRAY_SIZE(vega10_cache_info);
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
> index c004647..9ed14a1 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
> @@ -205,6 +205,22 @@ static const struct kfd_device_info polaris11_device_info = {
>         .num_sdma_queues_per_engine = 2,
>  };
>
> +static const struct kfd_device_info polaris12_device_info = {
> +       .asic_family = CHIP_POLARIS12,
> +       .max_pasid_bits = 16,
> +       .max_no_of_hqd  = 24,
> +       .doorbell_size  = 4,
> +       .ih_ring_entry_size = 4 * sizeof(uint32_t),
> +       .event_interrupt_class = &event_interrupt_class_cik,
> +       .num_of_watch_points = 4,
> +       .mqd_size_aligned = MQD_SIZE_ALIGNED,
> +       .supports_cwsr = true,
> +       .needs_iommu_device = false,
> +       .needs_pci_atomics = true,
> +       .num_sdma_engines = 2,
> +       .num_sdma_queues_per_engine = 2,
> +};
> +
>  static const struct kfd_device_info vega10_device_info = {
>         .asic_family = CHIP_VEGA10,
>         .max_pasid_bits = 16,
> @@ -237,6 +253,22 @@ static const struct kfd_device_info vega10_vf_device_info = {
>         .num_sdma_queues_per_engine = 2,
>  };
>
> +static const struct kfd_device_info vega12_device_info = {
> +       .asic_family = CHIP_VEGA12,
> +       .max_pasid_bits = 16,
> +       .max_no_of_hqd  = 24,
> +       .doorbell_size  = 8,
> +       .ih_ring_entry_size = 8 * sizeof(uint32_t),
> +       .event_interrupt_class = &event_interrupt_class_v9,
> +       .num_of_watch_points = 4,
> +       .mqd_size_aligned = MQD_SIZE_ALIGNED,
> +       .supports_cwsr = true,
> +       .needs_iommu_device = false,
> +       .needs_pci_atomics = false,
> +       .num_sdma_engines = 2,
> +       .num_sdma_queues_per_engine = 2,
> +};
> +
>  static const struct kfd_device_info vega20_device_info = {
>         .asic_family = CHIP_VEGA20,
>         .max_pasid_bits = 16,
> @@ -331,6 +363,14 @@ static const struct kfd_deviceid supported_devices[] = {
>         { 0x67EB, &polaris11_device_info },     /* Polaris11 */
>         { 0x67EF, &polaris11_device_info },     /* Polaris11 */
>         { 0x67FF, &polaris11_device_info },     /* Polaris11 */
> +       { 0x6980, &polaris12_device_info },     /* Polaris12 */
> +       { 0x6981, &polaris12_device_info },     /* Polaris12 */
> +       { 0x6985, &polaris12_device_info },     /* Polaris12 */
> +       { 0x6986, &polaris12_device_info },     /* Polaris12 */
> +       { 0x6987, &polaris12_device_info },     /* Polaris12 */
> +       { 0x6995, &polaris12_device_info },     /* Polaris12 */
> +       { 0x6997, &polaris12_device_info },     /* Polaris12 */
> +       { 0x699F, &polaris12_device_info },     /* Polaris12 */
>         { 0x6860, &vega10_device_info },        /* Vega10 */
>         { 0x6861, &vega10_device_info },        /* Vega10 */
>         { 0x6862, &vega10_device_info },        /* Vega10 */
> @@ -340,6 +380,11 @@ static const struct kfd_deviceid supported_devices[] = {
>         { 0x6868, &vega10_device_info },        /* Vega10 */
>         { 0x686C, &vega10_vf_device_info },     /* Vega10  vf*/
>         { 0x687F, &vega10_device_info },        /* Vega10 */
> +       { 0x69A0, &vega12_device_info },        /* Vega12 */
> +       { 0x69A1, &vega12_device_info },        /* Vega12 */
> +       { 0x69A2, &vega12_device_info },        /* Vega12 */
> +       { 0x69A3, &vega12_device_info },        /* Vega12 */
> +       { 0x69AF, &vega12_device_info },        /* Vega12 */
>         { 0x66a0, &vega20_device_info },        /* Vega20 */
>         { 0x66a1, &vega20_device_info },        /* Vega20 */
>         { 0x66a2, &vega20_device_info },        /* Vega20 */
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> index d38efbb..8372556 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> @@ -1741,10 +1741,12 @@ struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev)
>         case CHIP_FIJI:
>         case CHIP_POLARIS10:
>         case CHIP_POLARIS11:
> +       case CHIP_POLARIS12:
>                 device_queue_manager_init_vi_tonga(&dqm->asic_ops);
>                 break;
>
>         case CHIP_VEGA10:
> +       case CHIP_VEGA12:
>         case CHIP_VEGA20:
>         case CHIP_RAVEN:
>                 device_queue_manager_init_v9(&dqm->asic_ops);
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c b/drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c
> index 3d66cec..213ea54 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c
> @@ -397,9 +397,11 @@ int kfd_init_apertures(struct kfd_process *process)
>                         case CHIP_FIJI:
>                         case CHIP_POLARIS10:
>                         case CHIP_POLARIS11:
> +                       case CHIP_POLARIS12:
>                                 kfd_init_apertures_vi(pdd, id);
>                                 break;
>                         case CHIP_VEGA10:
> +                       case CHIP_VEGA12:
>                         case CHIP_VEGA20:
>                         case CHIP_RAVEN:
>                                 kfd_init_apertures_v9(pdd, id);
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c
> index 6c31f73..f159688 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c
> @@ -313,6 +313,7 @@ struct kernel_queue *kernel_queue_init(struct kfd_dev *dev,
>         case CHIP_FIJI:
>         case CHIP_POLARIS10:
>         case CHIP_POLARIS11:
> +       case CHIP_POLARIS12:
>                 kernel_queue_init_vi(&kq->ops_asic_specific);
>                 break;
>
> @@ -322,6 +323,7 @@ struct kernel_queue *kernel_queue_init(struct kfd_dev *dev,
>                 break;
>
>         case CHIP_VEGA10:
> +       case CHIP_VEGA12:
>         case CHIP_VEGA20:
>         case CHIP_RAVEN:
>                 kernel_queue_init_v9(&kq->ops_asic_specific);
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c
> index 6910028..aed9b9b 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c
> @@ -38,8 +38,10 @@ struct mqd_manager *mqd_manager_init(enum KFD_MQD_TYPE type,
>         case CHIP_FIJI:
>         case CHIP_POLARIS10:
>         case CHIP_POLARIS11:
> +       case CHIP_POLARIS12:
>                 return mqd_manager_init_vi_tonga(type, dev);
>         case CHIP_VEGA10:
> +       case CHIP_VEGA12:
>         case CHIP_VEGA20:
>         case CHIP_RAVEN:
>                 return mqd_manager_init_v9(type, dev);
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
> index c6080ed3..045a229 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
> @@ -226,9 +226,11 @@ int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm)
>         case CHIP_FIJI:
>         case CHIP_POLARIS10:
>         case CHIP_POLARIS11:
> +       case CHIP_POLARIS12:
>                 pm->pmf = &kfd_vi_pm_funcs;
>                 break;
>         case CHIP_VEGA10:
> +       case CHIP_VEGA12:
>         case CHIP_VEGA20:
>         case CHIP_RAVEN:
>                 pm->pmf = &kfd_v9_pm_funcs;
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
> index c73b4ff..aa793fc 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
> @@ -1272,12 +1272,14 @@ int kfd_topology_add_device(struct kfd_dev *gpu)
>         case CHIP_FIJI:
>         case CHIP_POLARIS10:
>         case CHIP_POLARIS11:
> +       case CHIP_POLARIS12:
>                 pr_debug("Adding doorbell packet type capability\n");
>                 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_1_0 <<
>                         HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) &
>                         HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK);
>                 break;
>         case CHIP_VEGA10:
> +       case CHIP_VEGA12:
>         case CHIP_VEGA20:
>         case CHIP_RAVEN:
>                 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_2_0 <<
> --
> 2.7.4
>
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Re: [PATCH 3/9] drm/amdkfd: Adjust the debug message in KFD ISR

[Alex Deucher]

On Mon, Nov 5, 2018 at 8:40 PM Kuehling, Felix <Felix.Kuehling@amd.com> wrote:
>
> From: Yong Zhao <Yong.Zhao@amd.com>
>
> This makes debug message get printed even when there is early return.
>
> Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

> ---
>  drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c
> index f836897..8497864 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c
> @@ -39,20 +39,20 @@ static bool event_interrupt_isr_v9(struct kfd_dev *dev,
>             vmid > dev->vm_info.last_vmid_kfd)
>                 return 0;
>
> -       /* If there is no valid PASID, it's likely a firmware bug */
> -       pasid = SOC15_PASID_FROM_IH_ENTRY(ih_ring_entry);
> -       if (WARN_ONCE(pasid == 0, "FW bug: No PASID in KFD interrupt"))
> -               return 0;
> -
>         source_id = SOC15_SOURCE_ID_FROM_IH_ENTRY(ih_ring_entry);
>         client_id = SOC15_CLIENT_ID_FROM_IH_ENTRY(ih_ring_entry);
> +       pasid = SOC15_PASID_FROM_IH_ENTRY(ih_ring_entry);
>
> -       pr_debug("client id 0x%x, source id %d, pasid 0x%x. raw data:\n",
> -                client_id, source_id, pasid);
> +       pr_debug("client id 0x%x, source id %d, vmid %d, pasid 0x%x. raw data:\n",
> +                client_id, source_id, vmid, pasid);
>         pr_debug("%8X, %8X, %8X, %8X, %8X, %8X, %8X, %8X.\n",
>                  data[0], data[1], data[2], data[3],
>                  data[4], data[5], data[6], data[7]);
>
> +       /* If there is no valid PASID, it's likely a firmware bug */
> +       if (WARN_ONCE(pasid == 0, "FW bug: No PASID in KFD interrupt"))
> +               return 0;
> +
>         /* Interrupt types we care about: various signals and faults.
>          * They will be forwarded to a work queue (see below).
>          */
> --
> 2.7.4
>
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Re: [PATCH 4/9] drm/amdkfd: Workaround PASID missing in gfx9 interrupt payload under non HWS

[Alex Deucher]

On Mon, Nov 5, 2018 at 8:41 PM Kuehling, Felix <Felix.Kuehling@amd.com> wrote:
>
> From: Yong Zhao <Yong.Zhao@amd.com>
>
> This is a known gfx9 HW issue, and this change can perfectly workaround
> the issue.
>
> Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>

Acked-by: Alex Deucher <alexander.deucher@amd.com>

> ---
>  drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c | 25 ++++++++++++++++++++++---
>  1 file changed, 22 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c
> index 8497864..a85904a 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c
> @@ -23,7 +23,7 @@
>  #include "kfd_priv.h"
>  #include "kfd_events.h"
>  #include "soc15_int.h"
> -
> +#include "kfd_device_queue_manager.h"
>
>  static bool event_interrupt_isr_v9(struct kfd_dev *dev,
>                                         const uint32_t *ih_ring_entry,
> @@ -43,14 +43,33 @@ static bool event_interrupt_isr_v9(struct kfd_dev *dev,
>         client_id = SOC15_CLIENT_ID_FROM_IH_ENTRY(ih_ring_entry);
>         pasid = SOC15_PASID_FROM_IH_ENTRY(ih_ring_entry);
>
> +       /* This is a known issue for gfx9. Under non HWS, pasid is not set
> +        * in the interrupt payload, so we need to find out the pasid on our
> +        * own.
> +        */
> +       if (!pasid && dev->dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS) {
> +               const uint32_t pasid_mask = 0xffff;
> +
> +               *patched_flag = true;
> +               memcpy(patched_ihre, ih_ring_entry,
> +                               dev->device_info->ih_ring_entry_size);
> +
> +               pasid = dev->kfd2kgd->get_atc_vmid_pasid_mapping_pasid(
> +                               dev->kgd, vmid);
> +
> +               /* Patch the pasid field */
> +               patched_ihre[3] = cpu_to_le32((le32_to_cpu(patched_ihre[3])
> +                                       & ~pasid_mask) | pasid);
> +       }
> +
>         pr_debug("client id 0x%x, source id %d, vmid %d, pasid 0x%x. raw data:\n",
>                  client_id, source_id, vmid, pasid);
>         pr_debug("%8X, %8X, %8X, %8X, %8X, %8X, %8X, %8X.\n",
>                  data[0], data[1], data[2], data[3],
>                  data[4], data[5], data[6], data[7]);
>
> -       /* If there is no valid PASID, it's likely a firmware bug */
> -       if (WARN_ONCE(pasid == 0, "FW bug: No PASID in KFD interrupt"))
> +       /* If there is no valid PASID, it's likely a bug */
> +       if (WARN_ONCE(pasid == 0, "Bug: No PASID in KFD interrupt"))
>                 return 0;
>
>         /* Interrupt types we care about: various signals and faults.
> --
> 2.7.4
>
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Re: [PATCH 5/9] drm/amdgpu: Remove explicit wait after VM validate

[Alex Deucher]

On Mon, Nov 5, 2018 at 8:41 PM Kuehling, Felix <Felix.Kuehling@amd.com> wrote:
>
> From: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
>
> PD or PT might have to be moved during validation and this move has to be
> completed before updating it. If page table updates are done using SDMA
> then this serializing is done by SDMA command submission.
>
> And if PD/PT updates are done by CPU, then explicit waiting for PD/PT
> updates are done in amdgpu VM amdgpu_vm_wait_pd function.
>
> Sync to PD BO moving fence to handle corner case where none of the PTs
> are updated but PD is evicted.
>
> Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>

Acked-by: Alex Deucher <alexander.deucher@amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 31 ++++++++++++++++++------
>  1 file changed, 24 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> index 9a1b2b2..e124d2d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> @@ -901,6 +901,26 @@ static int process_validate_vms(struct amdkfd_process_info *process_info)
>         return 0;
>  }
>
> +static int process_sync_pds_resv(struct amdkfd_process_info *process_info,
> +                                struct amdgpu_sync *sync)
> +{
> +       struct amdgpu_vm *peer_vm;
> +       int ret;
> +
> +       list_for_each_entry(peer_vm, &process_info->vm_list_head,
> +                           vm_list_node) {
> +               struct amdgpu_bo *pd = peer_vm->root.base.bo;
> +
> +               ret = amdgpu_sync_resv(amdgpu_ttm_adev(pd->tbo.bdev),
> +                                       sync, pd->tbo.resv,
> +                                       AMDGPU_FENCE_OWNER_UNDEFINED, false);
> +               if (ret)
> +                       return ret;
> +       }
> +
> +       return 0;
> +}
> +
>  static int process_update_pds(struct amdkfd_process_info *process_info,
>                               struct amdgpu_sync *sync)
>  {
> @@ -2045,13 +2065,10 @@ int amdgpu_amdkfd_gpuvm_restore_process_bos(void *info, struct dma_fence **ef)
>         if (ret)
>                 goto validate_map_fail;
>
> -       /* Wait for PD/PTs validate to finish */
> -       /* FIXME: I think this isn't needed */
> -       list_for_each_entry(peer_vm, &process_info->vm_list_head,
> -                           vm_list_node) {
> -               struct amdgpu_bo *bo = peer_vm->root.base.bo;
> -
> -               ttm_bo_wait(&bo->tbo, false, false);
> +       ret = process_sync_pds_resv(process_info, &sync_obj);
> +       if (ret) {
> +               pr_debug("Memory eviction: Failed to sync to PD BO moving fence. Try again\n");
> +               goto validate_map_fail;
>         }
>
>         /* Validate BOs and map them to GPUVM (update VM page tables). */
> --
> 2.7.4
>
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Re: [PATCH 6/9] drm/amdgpu: KFD Restore process: Optimize waiting

[Alex Deucher]

On Mon, Nov 5, 2018 at 8:41 PM Kuehling, Felix <Felix.Kuehling@amd.com> wrote:
>
> From: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
>
> Instead of waiting for each KFD BO after validation just wait for the
> last BO moving fence.
>
> Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>

Acked-by: Alex Deucher <alexander.deucher@amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 13 ++++++++-----
>  1 file changed, 8 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> index e124d2d..d005371 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> @@ -2084,7 +2084,12 @@ int amdgpu_amdkfd_gpuvm_restore_process_bos(void *info, struct dma_fence **ef)
>                         pr_debug("Memory eviction: Validate BOs failed. Try again\n");
>                         goto validate_map_fail;
>                 }
> -
> +               ret = amdgpu_sync_fence(amdgpu_ttm_adev(bo->tbo.bdev),
> +                                       &sync_obj, bo->tbo.moving, false);
> +               if (ret) {
> +                       pr_debug("Memory eviction: Sync BO fence failed. Try again\n");
> +                       goto validate_map_fail;
> +               }
>                 list_for_each_entry(bo_va_entry, &mem->bo_va_list,
>                                     bo_list) {
>                         ret = update_gpuvm_pte((struct amdgpu_device *)
> @@ -2105,6 +2110,7 @@ int amdgpu_amdkfd_gpuvm_restore_process_bos(void *info, struct dma_fence **ef)
>                 goto validate_map_fail;
>         }
>
> +       /* Wait for validate and PT updates to finish */
>         amdgpu_sync_wait(&sync_obj, false);
>
>         /* Release old eviction fence and create new one, because fence only
> @@ -2123,10 +2129,7 @@ int amdgpu_amdkfd_gpuvm_restore_process_bos(void *info, struct dma_fence **ef)
>         process_info->eviction_fence = new_fence;
>         *ef = dma_fence_get(&new_fence->base);
>
> -       /* Wait for validate to finish and attach new eviction fence */
> -       list_for_each_entry(mem, &process_info->kfd_bo_list,
> -               validate_list.head)
> -               ttm_bo_wait(&mem->bo->tbo, false, false);
> +       /* Attach new eviction fence to all BOs */
>         list_for_each_entry(mem, &process_info->kfd_bo_list,
>                 validate_list.head)
>                 amdgpu_bo_fence(mem->bo,
> --
> 2.7.4
>
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Re: [PATCH 7/9] drm/amdkfd: Fix and simplify sync object handling for KFD

[Kuehling, Felix]

Hi Christian,

Would you review this patch? Just looking at the code, calling
amdgpu_sync_fence with adev=NULL should be OK for us. It's just a bit
unusual compared to amdgpu's usage of this function. We've had this
patch in kfd-staging for a while without problems. If you're OK with
this I'll go ahead and push this upstream as well.

Thanks,
  Felix

On 2018-11-05 8:40 p.m., Kuehling, Felix wrote:
> The adev parameter in amdgpu_sync_fence and amdgpu_sync_resv is only
> needed for updating sync->last_vm_update. This breaks if different
> adevs are passed to calls for the same sync object.
>
> Always pass NULL for calls from KFD because sync objects used for
> KFD don't belong to any particular device, and KFD doesn't need the
> sync->last_vm_update fence.
>
> This fixes kernel log warnings on multi-GPU systems after recent
> changes in amdgpu_amdkfd_gpuvm_restore_process_bos.
>
> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 28 +++++-------------------
>  1 file changed, 5 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> index d005371..572ac5f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> @@ -395,23 +395,6 @@ static int vm_validate_pt_pd_bos(struct amdgpu_vm *vm)
>  	return 0;
>  }
>  
> -static int sync_vm_fence(struct amdgpu_device *adev, struct amdgpu_sync *sync,
> -			 struct dma_fence *f)
> -{
> -	int ret = amdgpu_sync_fence(adev, sync, f, false);
> -
> -	/* Sync objects can't handle multiple GPUs (contexts) updating
> -	 * sync->last_vm_update. Fortunately we don't need it for
> -	 * KFD's purposes, so we can just drop that fence.
> -	 */
> -	if (sync->last_vm_update) {
> -		dma_fence_put(sync->last_vm_update);
> -		sync->last_vm_update = NULL;
> -	}
> -
> -	return ret;
> -}
> -
>  static int vm_update_pds(struct amdgpu_vm *vm, struct amdgpu_sync *sync)
>  {
>  	struct amdgpu_bo *pd = vm->root.base.bo;
> @@ -422,7 +405,7 @@ static int vm_update_pds(struct amdgpu_vm *vm, struct amdgpu_sync *sync)
>  	if (ret)
>  		return ret;
>  
> -	return sync_vm_fence(adev, sync, vm->last_update);
> +	return amdgpu_sync_fence(NULL, sync, vm->last_update, false);
>  }
>  
>  /* add_bo_to_vm - Add a BO to a VM
> @@ -826,7 +809,7 @@ static int unmap_bo_from_gpuvm(struct amdgpu_device *adev,
>  	/* Add the eviction fence back */
>  	amdgpu_bo_fence(pd, &vm->process_info->eviction_fence->base, true);
>  
> -	sync_vm_fence(adev, sync, bo_va->last_pt_update);
> +	amdgpu_sync_fence(NULL, sync, bo_va->last_pt_update, false);
>  
>  	return 0;
>  }
> @@ -851,7 +834,7 @@ static int update_gpuvm_pte(struct amdgpu_device *adev,
>  		return ret;
>  	}
>  
> -	return sync_vm_fence(adev, sync, bo_va->last_pt_update);
> +	return amdgpu_sync_fence(NULL, sync, bo_va->last_pt_update, false);
>  }
>  
>  static int map_bo_to_gpuvm(struct amdgpu_device *adev,
> @@ -911,7 +894,7 @@ static int process_sync_pds_resv(struct amdkfd_process_info *process_info,
>  			    vm_list_node) {
>  		struct amdgpu_bo *pd = peer_vm->root.base.bo;
>  
> -		ret = amdgpu_sync_resv(amdgpu_ttm_adev(pd->tbo.bdev),
> +		ret = amdgpu_sync_resv(NULL,
>  					sync, pd->tbo.resv,
>  					AMDGPU_FENCE_OWNER_UNDEFINED, false);
>  		if (ret)
> @@ -2084,8 +2067,7 @@ int amdgpu_amdkfd_gpuvm_restore_process_bos(void *info, struct dma_fence **ef)
>  			pr_debug("Memory eviction: Validate BOs failed. Try again\n");
>  			goto validate_map_fail;
>  		}
> -		ret = amdgpu_sync_fence(amdgpu_ttm_adev(bo->tbo.bdev),
> -					&sync_obj, bo->tbo.moving, false);
> +		ret = amdgpu_sync_fence(NULL, &sync_obj, bo->tbo.moving, false);
>  		if (ret) {
>  			pr_debug("Memory eviction: Sync BO fence failed. Try again\n");
>  			goto validate_map_fail;
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Re: [PATCH 7/9] drm/amdkfd: Fix and simplify sync object handling for KFD

[Koenig, Christian]

Hi Felix,

looks perfectly ok to me, patch is Reviewed-by: Christian König 
<christian.koenig@amd.com>.

But IIRC we once had a patch to remove the adev parameter from 
amdgpu_sync_fence(). I wonder why we have dropped that one.

Regards,
Christian.

Am 16.11.18 um 21:19 schrieb Kuehling, Felix:
> Hi Christian,
>
> Would you review this patch? Just looking at the code, calling
> amdgpu_sync_fence with adev=NULL should be OK for us. It's just a bit
> unusual compared to amdgpu's usage of this function. We've had this
> patch in kfd-staging for a while without problems. If you're OK with
> this I'll go ahead and push this upstream as well.
>
> Thanks,
>    Felix
>
> On 2018-11-05 8:40 p.m., Kuehling, Felix wrote:
>> The adev parameter in amdgpu_sync_fence and amdgpu_sync_resv is only
>> needed for updating sync->last_vm_update. This breaks if different
>> adevs are passed to calls for the same sync object.
>>
>> Always pass NULL for calls from KFD because sync objects used for
>> KFD don't belong to any particular device, and KFD doesn't need the
>> sync->last_vm_update fence.
>>
>> This fixes kernel log warnings on multi-GPU systems after recent
>> changes in amdgpu_amdkfd_gpuvm_restore_process_bos.
>>
>> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
>> ---
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 28 +++++-------------------
>>   1 file changed, 5 insertions(+), 23 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
>> index d005371..572ac5f 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
>> @@ -395,23 +395,6 @@ static int vm_validate_pt_pd_bos(struct amdgpu_vm *vm)
>>   	return 0;
>>   }
>>   
>> -static int sync_vm_fence(struct amdgpu_device *adev, struct amdgpu_sync *sync,
>> -			 struct dma_fence *f)
>> -{
>> -	int ret = amdgpu_sync_fence(adev, sync, f, false);
>> -
>> -	/* Sync objects can't handle multiple GPUs (contexts) updating
>> -	 * sync->last_vm_update. Fortunately we don't need it for
>> -	 * KFD's purposes, so we can just drop that fence.
>> -	 */
>> -	if (sync->last_vm_update) {
>> -		dma_fence_put(sync->last_vm_update);
>> -		sync->last_vm_update = NULL;
>> -	}
>> -
>> -	return ret;
>> -}
>> -
>>   static int vm_update_pds(struct amdgpu_vm *vm, struct amdgpu_sync *sync)
>>   {
>>   	struct amdgpu_bo *pd = vm->root.base.bo;
>> @@ -422,7 +405,7 @@ static int vm_update_pds(struct amdgpu_vm *vm, struct amdgpu_sync *sync)
>>   	if (ret)
>>   		return ret;
>>   
>> -	return sync_vm_fence(adev, sync, vm->last_update);
>> +	return amdgpu_sync_fence(NULL, sync, vm->last_update, false);
>>   }
>>   
>>   /* add_bo_to_vm - Add a BO to a VM
>> @@ -826,7 +809,7 @@ static int unmap_bo_from_gpuvm(struct amdgpu_device *adev,
>>   	/* Add the eviction fence back */
>>   	amdgpu_bo_fence(pd, &vm->process_info->eviction_fence->base, true);
>>   
>> -	sync_vm_fence(adev, sync, bo_va->last_pt_update);
>> +	amdgpu_sync_fence(NULL, sync, bo_va->last_pt_update, false);
>>   
>>   	return 0;
>>   }
>> @@ -851,7 +834,7 @@ static int update_gpuvm_pte(struct amdgpu_device *adev,
>>   		return ret;
>>   	}
>>   
>> -	return sync_vm_fence(adev, sync, bo_va->last_pt_update);
>> +	return amdgpu_sync_fence(NULL, sync, bo_va->last_pt_update, false);
>>   }
>>   
>>   static int map_bo_to_gpuvm(struct amdgpu_device *adev,
>> @@ -911,7 +894,7 @@ static int process_sync_pds_resv(struct amdkfd_process_info *process_info,
>>   			    vm_list_node) {
>>   		struct amdgpu_bo *pd = peer_vm->root.base.bo;
>>   
>> -		ret = amdgpu_sync_resv(amdgpu_ttm_adev(pd->tbo.bdev),
>> +		ret = amdgpu_sync_resv(NULL,
>>   					sync, pd->tbo.resv,
>>   					AMDGPU_FENCE_OWNER_UNDEFINED, false);
>>   		if (ret)
>> @@ -2084,8 +2067,7 @@ int amdgpu_amdkfd_gpuvm_restore_process_bos(void *info, struct dma_fence **ef)
>>   			pr_debug("Memory eviction: Validate BOs failed. Try again\n");
>>   			goto validate_map_fail;
>>   		}
>> -		ret = amdgpu_sync_fence(amdgpu_ttm_adev(bo->tbo.bdev),
>> -					&sync_obj, bo->tbo.moving, false);
>> +		ret = amdgpu_sync_fence(NULL, &sync_obj, bo->tbo.moving, false);
>>   		if (ret) {
>>   			pr_debug("Memory eviction: Sync BO fence failed. Try again\n");
>>   			goto validate_map_fail;

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