* [PATCH 1/2] drm/i915/gvt: Avoid use-after-free iterating the gtt list
@ 2018-11-20 20:24 Chris Wilson
2018-11-20 20:24 ` [PATCH 2/2] drm/i915/dp: Fix inconsistent indenting Chris Wilson
` (3 more replies)
0 siblings, 4 replies; 11+ messages in thread
From: Chris Wilson @ 2018-11-20 20:24 UTC (permalink / raw)
To: intel-gfx
Found by smatch:
drivers/gpu/drm/i915/gvt/gtt.c:2452 intel_vgpu_destroy_ggtt_mm() error: dereferencing freed memory 'pos'
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
---
drivers/gpu/drm/i915/gvt/gtt.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c
index 58e166effa45..c7103dd2d8d5 100644
--- a/drivers/gpu/drm/i915/gvt/gtt.c
+++ b/drivers/gpu/drm/i915/gvt/gtt.c
@@ -2447,10 +2447,11 @@ static void intel_vgpu_destroy_all_ppgtt_mm(struct intel_vgpu *vgpu)
static void intel_vgpu_destroy_ggtt_mm(struct intel_vgpu *vgpu)
{
- struct intel_gvt_partial_pte *pos;
+ struct intel_gvt_partial_pte *pos, *next;
- list_for_each_entry(pos,
- &vgpu->gtt.ggtt_mm->ggtt_mm.partial_pte_list, list) {
+ list_for_each_entry_safe(pos, next,
+ &vgpu->gtt.ggtt_mm->ggtt_mm.partial_pte_list,
+ list) {
gvt_dbg_mm("partial PTE update on hold 0x%lx : 0x%llx\n",
pos->offset, pos->data);
kfree(pos);
--
2.19.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 2/2] drm/i915/dp: Fix inconsistent indenting
2018-11-20 20:24 [PATCH 1/2] drm/i915/gvt: Avoid use-after-free iterating the gtt list Chris Wilson
@ 2018-11-20 20:24 ` Chris Wilson
2018-12-03 22:43 ` Srivatsa, Anusha
2018-12-03 22:55 ` Manasi Navare
2018-11-20 20:49 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/gvt: Avoid use-after-free iterating the gtt list Patchwork
` (2 subsequent siblings)
3 siblings, 2 replies; 11+ messages in thread
From: Chris Wilson @ 2018-11-20 20:24 UTC (permalink / raw)
To: intel-gfx
Always show the FEC capability as it is initialised to 0 before error.
Fixing,
drivers/gpu/drm/i915/intel_dp.c:3846 intel_dp_get_dsc_sink_cap() warn: inconsistent indenting
Fixes: 08cadae8e157 ("i915/dp/fec: Cache the FEC_CAPABLE DPCD register")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
drivers/gpu/drm/i915/intel_dp.c | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 7699f9b7b2d2..de6c982b1d1e 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3837,15 +3837,14 @@ static void intel_dp_get_dsc_sink_cap(struct intel_dp *intel_dp)
DRM_DEBUG_KMS("DSC DPCD: %*ph\n",
(int)sizeof(intel_dp->dsc_dpcd),
intel_dp->dsc_dpcd);
+
/* FEC is supported only on DP 1.4 */
- if (!intel_dp_is_edp(intel_dp)) {
- if (drm_dp_dpcd_readb(&intel_dp->aux, DP_FEC_CAPABILITY,
- &intel_dp->fec_capable) < 0)
- DRM_ERROR("Failed to read FEC DPCD register\n");
+ if (!intel_dp_is_edp(intel_dp) &&
+ drm_dp_dpcd_readb(&intel_dp->aux, DP_FEC_CAPABILITY,
+ &intel_dp->fec_capable) < 0)
+ DRM_ERROR("Failed to read FEC DPCD register\n");
- DRM_DEBUG_KMS("FEC CAPABILITY: %x\n",
- intel_dp->fec_capable);
- }
+ DRM_DEBUG_KMS("FEC CAPABILITY: %x\n", intel_dp->fec_capable);
}
}
--
2.19.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/gvt: Avoid use-after-free iterating the gtt list
2018-11-20 20:24 [PATCH 1/2] drm/i915/gvt: Avoid use-after-free iterating the gtt list Chris Wilson
2018-11-20 20:24 ` [PATCH 2/2] drm/i915/dp: Fix inconsistent indenting Chris Wilson
@ 2018-11-20 20:49 ` Patchwork
2018-11-21 2:29 ` [PATCH 1/2] " Zhenyu Wang
2018-11-21 7:52 ` ✓ Fi.CI.IGT: success for series starting with [1/2] " Patchwork
3 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2018-11-20 20:49 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915/gvt: Avoid use-after-free iterating the gtt list
URL : https://patchwork.freedesktop.org/series/52786/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5174 -> Patchwork_10870 =
== Summary - SUCCESS ==
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/52786/revisions/1/mbox/
== Known issues ==
Here are the changes found in Patchwork_10870 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b:
fi-byt-clapper: PASS -> FAIL (fdo#107362)
==== Possible fixes ====
igt@i915_selftest@live_execlists:
fi-apl-guc: DMESG-WARN (fdo#108622) -> PASS
igt@kms_flip@basic-flip-vs-dpms:
fi-skl-6700hq: DMESG-WARN (fdo#105998) -> PASS
fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#108622 https://bugs.freedesktop.org/show_bug.cgi?id=108622
== Participating hosts (52 -> 46) ==
Missing (6): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-u3
== Build changes ==
* Linux: CI_DRM_5174 -> Patchwork_10870
CI_DRM_5174: 0bfa7192170c039a271ebc27222b4b91516e73f6 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4722: fdcdfa1e220c5070072d5dac9523cd105e7406c2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10870: 295606f32d7a980ca03d0ad39aba1b2f13899bc0 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
295606f32d7a drm/i915/dp: Fix inconsistent indenting
23dd8701d720 drm/i915/gvt: Avoid use-after-free iterating the gtt list
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10870/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/2] drm/i915/gvt: Avoid use-after-free iterating the gtt list
2018-11-20 20:24 [PATCH 1/2] drm/i915/gvt: Avoid use-after-free iterating the gtt list Chris Wilson
2018-11-20 20:24 ` [PATCH 2/2] drm/i915/dp: Fix inconsistent indenting Chris Wilson
2018-11-20 20:49 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/gvt: Avoid use-after-free iterating the gtt list Patchwork
@ 2018-11-21 2:29 ` Zhenyu Wang
2018-11-21 2:46 ` Yuan, Hang
2018-11-21 9:20 ` Chris Wilson
2018-11-21 7:52 ` ✓ Fi.CI.IGT: success for series starting with [1/2] " Patchwork
3 siblings, 2 replies; 11+ messages in thread
From: Zhenyu Wang @ 2018-11-21 2:29 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx, Yuan, Hang
[-- Attachment #1.1: Type: text/plain, Size: 1416 bytes --]
On 2018.11.20 20:24:38 +0000, Chris Wilson wrote:
> Found by smatch:
>
> drivers/gpu/drm/i915/gvt/gtt.c:2452 intel_vgpu_destroy_ggtt_mm() error: dereferencing freed memory 'pos'
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> ---
> drivers/gpu/drm/i915/gvt/gtt.c | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c
> index 58e166effa45..c7103dd2d8d5 100644
> --- a/drivers/gpu/drm/i915/gvt/gtt.c
> +++ b/drivers/gpu/drm/i915/gvt/gtt.c
> @@ -2447,10 +2447,11 @@ static void intel_vgpu_destroy_all_ppgtt_mm(struct intel_vgpu *vgpu)
>
> static void intel_vgpu_destroy_ggtt_mm(struct intel_vgpu *vgpu)
> {
> - struct intel_gvt_partial_pte *pos;
> + struct intel_gvt_partial_pte *pos, *next;
>
> - list_for_each_entry(pos,
> - &vgpu->gtt.ggtt_mm->ggtt_mm.partial_pte_list, list) {
> + list_for_each_entry_safe(pos, next,
> + &vgpu->gtt.ggtt_mm->ggtt_mm.partial_pte_list,
> + list) {
> gvt_dbg_mm("partial PTE update on hold 0x%lx : 0x%llx\n",
> pos->offset, pos->data);
> kfree(pos);
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Thanks! I should really run check against each one when apply..
--
Open Source Technology Center, Intel ltd.
$gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 195 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/2] drm/i915/gvt: Avoid use-after-free iterating the gtt list
2018-11-21 2:29 ` [PATCH 1/2] " Zhenyu Wang
@ 2018-11-21 2:46 ` Yuan, Hang
2018-11-21 9:20 ` Chris Wilson
1 sibling, 0 replies; 11+ messages in thread
From: Yuan, Hang @ 2018-11-21 2:46 UTC (permalink / raw)
To: Zhenyu Wang, Chris Wilson; +Cc: intel-gfx
Sorry I missed it. Thanks for the correction!
Regards,
Henry
> -----Original Message-----
> From: Zhenyu Wang [mailto:zhenyuw@linux.intel.com]
> Sent: Wednesday, November 21, 2018 10:29 AM
> To: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: intel-gfx@lists.freedesktop.org; Zhenyu Wang
> <zhenyuw@linux.intel.com>; Yuan, Hang <hang.yuan@intel.com>
> Subject: Re: [PATCH 1/2] drm/i915/gvt: Avoid use-after-free iterating the gtt
> list
>
> On 2018.11.20 20:24:38 +0000, Chris Wilson wrote:
> > Found by smatch:
> >
> > drivers/gpu/drm/i915/gvt/gtt.c:2452 intel_vgpu_destroy_ggtt_mm() error:
> dereferencing freed memory 'pos'
> >
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/gvt/gtt.c | 7 ++++---
> > 1 file changed, 4 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gvt/gtt.c
> > b/drivers/gpu/drm/i915/gvt/gtt.c index 58e166effa45..c7103dd2d8d5
> > 100644
> > --- a/drivers/gpu/drm/i915/gvt/gtt.c
> > +++ b/drivers/gpu/drm/i915/gvt/gtt.c
> > @@ -2447,10 +2447,11 @@ static void
> > intel_vgpu_destroy_all_ppgtt_mm(struct intel_vgpu *vgpu)
> >
> > static void intel_vgpu_destroy_ggtt_mm(struct intel_vgpu *vgpu) {
> > - struct intel_gvt_partial_pte *pos;
> > + struct intel_gvt_partial_pte *pos, *next;
> >
> > - list_for_each_entry(pos,
> > - &vgpu->gtt.ggtt_mm->ggtt_mm.partial_pte_list, list) {
> > + list_for_each_entry_safe(pos, next,
> > + &vgpu->gtt.ggtt_mm-
> >ggtt_mm.partial_pte_list,
> > + list) {
> > gvt_dbg_mm("partial PTE update on hold 0x%lx : 0x%llx\n",
> > pos->offset, pos->data);
> > kfree(pos);
>
> Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
>
> Thanks! I should really run check against each one when apply..
>
> --
> Open Source Technology Center, Intel ltd.
>
> $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/gvt: Avoid use-after-free iterating the gtt list
2018-11-20 20:24 [PATCH 1/2] drm/i915/gvt: Avoid use-after-free iterating the gtt list Chris Wilson
` (2 preceding siblings ...)
2018-11-21 2:29 ` [PATCH 1/2] " Zhenyu Wang
@ 2018-11-21 7:52 ` Patchwork
3 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2018-11-21 7:52 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915/gvt: Avoid use-after-free iterating the gtt list
URL : https://patchwork.freedesktop.org/series/52786/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5174_full -> Patchwork_10870_full =
== Summary - SUCCESS ==
No regressions found.
== Known issues ==
Here are the changes found in Patchwork_10870_full that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@gem_ctx_isolation@vcs1-s3:
shard-apl: SKIP -> INCOMPLETE (fdo#103927)
igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
shard-glk: PASS -> FAIL (fdo#108145)
igt@kms_cursor_crc@cursor-128x128-suspend:
shard-skl: PASS -> INCOMPLETE (fdo#104108)
igt@kms_cursor_crc@cursor-256x256-suspend:
shard-skl: PASS -> FAIL (fdo#103232, fdo#103191)
igt@kms_cursor_crc@cursor-256x85-onscreen:
shard-apl: PASS -> FAIL (fdo#103232) +1
igt@kms_fbcon_fbt@psr:
shard-skl: NOTRUN -> FAIL (fdo#107882)
igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
shard-glk: PASS -> FAIL (fdo#105363)
igt@kms_flip@flip-vs-expired-vblank:
shard-skl: NOTRUN -> FAIL (fdo#105363)
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen:
shard-skl: NOTRUN -> FAIL (fdo#103167)
igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite:
shard-glk: PASS -> FAIL (fdo#103167) +2
igt@kms_plane@pixel-format-pipe-c-planes:
shard-apl: PASS -> FAIL (fdo#103166) +1
igt@kms_plane@plane-position-covered-pipe-a-planes:
shard-skl: NOTRUN -> FAIL (fdo#103166)
igt@kms_plane_alpha_blend@pipe-a-alpha-7efc:
shard-skl: NOTRUN -> FAIL (fdo#107815, fdo#108145) +2
igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
shard-skl: PASS -> FAIL (fdo#107815)
==== Possible fixes ====
igt@gem_pwrite@big-gtt-backwards:
shard-apl: INCOMPLETE (fdo#103927) -> PASS
igt@kms_cursor_crc@cursor-128x128-onscreen:
shard-apl: FAIL (fdo#103232) -> PASS
igt@kms_cursor_legacy@cursora-vs-flipa-toggle:
shard-glk: DMESG-WARN (fdo#106538, fdo#105763) -> PASS
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite:
shard-glk: FAIL (fdo#103167) -> PASS
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render:
shard-apl: FAIL (fdo#103167) -> PASS +1
igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
shard-skl: FAIL (fdo#107815) -> PASS
igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
shard-glk: FAIL (fdo#103166) -> PASS
igt@kms_plane_multiple@atomic-pipe-c-tiling-yf:
shard-apl: FAIL (fdo#103166) -> PASS
fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
fdo#105763 https://bugs.freedesktop.org/show_bug.cgi?id=105763
fdo#106538 https://bugs.freedesktop.org/show_bug.cgi?id=106538
fdo#107815 https://bugs.freedesktop.org/show_bug.cgi?id=107815
fdo#107882 https://bugs.freedesktop.org/show_bug.cgi?id=107882
fdo#108145 https://bugs.freedesktop.org/show_bug.cgi?id=108145
== Participating hosts (7 -> 6) ==
Missing (1): shard-iclb
== Build changes ==
* Linux: CI_DRM_5174 -> Patchwork_10870
CI_DRM_5174: 0bfa7192170c039a271ebc27222b4b91516e73f6 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4722: fdcdfa1e220c5070072d5dac9523cd105e7406c2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10870: 295606f32d7a980ca03d0ad39aba1b2f13899bc0 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10870/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/2] drm/i915/gvt: Avoid use-after-free iterating the gtt list
2018-11-21 2:29 ` [PATCH 1/2] " Zhenyu Wang
2018-11-21 2:46 ` Yuan, Hang
@ 2018-11-21 9:20 ` Chris Wilson
2018-11-21 9:21 ` Zhenyu Wang
1 sibling, 1 reply; 11+ messages in thread
From: Chris Wilson @ 2018-11-21 9:20 UTC (permalink / raw)
To: Zhenyu Wang; +Cc: intel-gfx, Yuan, Hang
Quoting Zhenyu Wang (2018-11-21 02:29:21)
> On 2018.11.20 20:24:38 +0000, Chris Wilson wrote:
> > Found by smatch:
> >
> > drivers/gpu/drm/i915/gvt/gtt.c:2452 intel_vgpu_destroy_ggtt_mm() error: dereferencing freed memory 'pos'
> >
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/gvt/gtt.c | 7 ++++---
> > 1 file changed, 4 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c
> > index 58e166effa45..c7103dd2d8d5 100644
> > --- a/drivers/gpu/drm/i915/gvt/gtt.c
> > +++ b/drivers/gpu/drm/i915/gvt/gtt.c
> > @@ -2447,10 +2447,11 @@ static void intel_vgpu_destroy_all_ppgtt_mm(struct intel_vgpu *vgpu)
> >
> > static void intel_vgpu_destroy_ggtt_mm(struct intel_vgpu *vgpu)
> > {
> > - struct intel_gvt_partial_pte *pos;
> > + struct intel_gvt_partial_pte *pos, *next;
> >
> > - list_for_each_entry(pos,
> > - &vgpu->gtt.ggtt_mm->ggtt_mm.partial_pte_list, list) {
> > + list_for_each_entry_safe(pos, next,
> > + &vgpu->gtt.ggtt_mm->ggtt_mm.partial_pte_list,
> > + list) {
> > gvt_dbg_mm("partial PTE update on hold 0x%lx : 0x%llx\n",
> > pos->offset, pos->data);
> > kfree(pos);
>
> Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
I presume you will take it via the gvt tree? Saves a backmerge for you.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/2] drm/i915/gvt: Avoid use-after-free iterating the gtt list
2018-11-21 9:20 ` Chris Wilson
@ 2018-11-21 9:21 ` Zhenyu Wang
0 siblings, 0 replies; 11+ messages in thread
From: Zhenyu Wang @ 2018-11-21 9:21 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx, Yuan, Hang
[-- Attachment #1.1: Type: text/plain, Size: 1809 bytes --]
On 2018.11.21 09:20:19 +0000, Chris Wilson wrote:
> Quoting Zhenyu Wang (2018-11-21 02:29:21)
> > On 2018.11.20 20:24:38 +0000, Chris Wilson wrote:
> > > Found by smatch:
> > >
> > > drivers/gpu/drm/i915/gvt/gtt.c:2452 intel_vgpu_destroy_ggtt_mm() error: dereferencing freed memory 'pos'
> > >
> > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > > Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> > > ---
> > > drivers/gpu/drm/i915/gvt/gtt.c | 7 ++++---
> > > 1 file changed, 4 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c
> > > index 58e166effa45..c7103dd2d8d5 100644
> > > --- a/drivers/gpu/drm/i915/gvt/gtt.c
> > > +++ b/drivers/gpu/drm/i915/gvt/gtt.c
> > > @@ -2447,10 +2447,11 @@ static void intel_vgpu_destroy_all_ppgtt_mm(struct intel_vgpu *vgpu)
> > >
> > > static void intel_vgpu_destroy_ggtt_mm(struct intel_vgpu *vgpu)
> > > {
> > > - struct intel_gvt_partial_pte *pos;
> > > + struct intel_gvt_partial_pte *pos, *next;
> > >
> > > - list_for_each_entry(pos,
> > > - &vgpu->gtt.ggtt_mm->ggtt_mm.partial_pte_list, list) {
> > > + list_for_each_entry_safe(pos, next,
> > > + &vgpu->gtt.ggtt_mm->ggtt_mm.partial_pte_list,
> > > + list) {
> > > gvt_dbg_mm("partial PTE update on hold 0x%lx : 0x%llx\n",
> > > pos->offset, pos->data);
> > > kfree(pos);
> >
> > Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
>
> I presume you will take it via the gvt tree? Saves a backmerge for you.
Sure, will take it.
thanks
--
Open Source Technology Center, Intel ltd.
$gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 195 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 2/2] drm/i915/dp: Fix inconsistent indenting
2018-11-20 20:24 ` [PATCH 2/2] drm/i915/dp: Fix inconsistent indenting Chris Wilson
@ 2018-12-03 22:43 ` Srivatsa, Anusha
2018-12-03 22:55 ` Manasi Navare
1 sibling, 0 replies; 11+ messages in thread
From: Srivatsa, Anusha @ 2018-12-03 22:43 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
>-----Original Message-----
>From: Chris Wilson [mailto:chris@chris-wilson.co.uk]
>Sent: Tuesday, November 20, 2018 12:25 PM
>To: intel-gfx@lists.freedesktop.org
>Cc: Chris Wilson <chris@chris-wilson.co.uk>; Jani Nikula
><jani.nikula@linux.intel.com>; Ville Syrjala <ville.syrjala@linux.intel.com>;
>Navare, Manasi D <manasi.d.navare@intel.com>; Srivatsa, Anusha
><anusha.srivatsa@intel.com>
>Subject: [PATCH 2/2] drm/i915/dp: Fix inconsistent indenting
>
>Always show the FEC capability as it is initialised to 0 before error.
>Fixing,
>
>drivers/gpu/drm/i915/intel_dp.c:3846 intel_dp_get_dsc_sink_cap() warn:
>inconsistent indenting
>
>Fixes: 08cadae8e157 ("i915/dp/fec: Cache the FEC_CAPABLE DPCD register")
>Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>Cc: Jani Nikula <jani.nikula@linux.intel.com>
>Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
>Cc: Manasi Navare <manasi.d.navare@intel.com>
>Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Thanks for the fix and the above mentioned changes. Looks good.
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
>---
> drivers/gpu/drm/i915/intel_dp.c | 13 ++++++-------
> 1 file changed, 6 insertions(+), 7 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
>index 7699f9b7b2d2..de6c982b1d1e 100644
>--- a/drivers/gpu/drm/i915/intel_dp.c
>+++ b/drivers/gpu/drm/i915/intel_dp.c
>@@ -3837,15 +3837,14 @@ static void intel_dp_get_dsc_sink_cap(struct
>intel_dp *intel_dp)
> DRM_DEBUG_KMS("DSC DPCD: %*ph\n",
> (int)sizeof(intel_dp->dsc_dpcd),
> intel_dp->dsc_dpcd);
>+
> /* FEC is supported only on DP 1.4 */
>- if (!intel_dp_is_edp(intel_dp)) {
>- if (drm_dp_dpcd_readb(&intel_dp->aux,
>DP_FEC_CAPABILITY,
>- &intel_dp->fec_capable) < 0)
>- DRM_ERROR("Failed to read FEC DPCD
>register\n");
>+ if (!intel_dp_is_edp(intel_dp) &&
>+ drm_dp_dpcd_readb(&intel_dp->aux, DP_FEC_CAPABILITY,
>+ &intel_dp->fec_capable) < 0)
>+ DRM_ERROR("Failed to read FEC DPCD register\n");
>
>- DRM_DEBUG_KMS("FEC CAPABILITY: %x\n",
>- intel_dp->fec_capable);
>- }
>+ DRM_DEBUG_KMS("FEC CAPABILITY: %x\n", intel_dp-
>>fec_capable);
> }
> }
>
>--
>2.19.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 2/2] drm/i915/dp: Fix inconsistent indenting
2018-11-20 20:24 ` [PATCH 2/2] drm/i915/dp: Fix inconsistent indenting Chris Wilson
2018-12-03 22:43 ` Srivatsa, Anusha
@ 2018-12-03 22:55 ` Manasi Navare
2018-12-04 9:31 ` Chris Wilson
1 sibling, 1 reply; 11+ messages in thread
From: Manasi Navare @ 2018-12-03 22:55 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
On Tue, Nov 20, 2018 at 08:24:39PM +0000, Chris Wilson wrote:
> Always show the FEC capability as it is initialised to 0 before error.
That is a good point, do you think we should do the same for DSC DPCD and print
that unconditionally?
Manasi
> Fixing,
>
> drivers/gpu/drm/i915/intel_dp.c:3846 intel_dp_get_dsc_sink_cap() warn: inconsistent indenting
>
> Fixes: 08cadae8e157 ("i915/dp/fec: Cache the FEC_CAPABLE DPCD register")
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
> drivers/gpu/drm/i915/intel_dp.c | 13 ++++++-------
> 1 file changed, 6 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 7699f9b7b2d2..de6c982b1d1e 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -3837,15 +3837,14 @@ static void intel_dp_get_dsc_sink_cap(struct intel_dp *intel_dp)
> DRM_DEBUG_KMS("DSC DPCD: %*ph\n",
> (int)sizeof(intel_dp->dsc_dpcd),
> intel_dp->dsc_dpcd);
> +
> /* FEC is supported only on DP 1.4 */
> - if (!intel_dp_is_edp(intel_dp)) {
> - if (drm_dp_dpcd_readb(&intel_dp->aux, DP_FEC_CAPABILITY,
> - &intel_dp->fec_capable) < 0)
> - DRM_ERROR("Failed to read FEC DPCD register\n");
> + if (!intel_dp_is_edp(intel_dp) &&
> + drm_dp_dpcd_readb(&intel_dp->aux, DP_FEC_CAPABILITY,
> + &intel_dp->fec_capable) < 0)
> + DRM_ERROR("Failed to read FEC DPCD register\n");
>
> - DRM_DEBUG_KMS("FEC CAPABILITY: %x\n",
> - intel_dp->fec_capable);
> - }
> + DRM_DEBUG_KMS("FEC CAPABILITY: %x\n", intel_dp->fec_capable);
> }
> }
>
> --
> 2.19.1
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 2/2] drm/i915/dp: Fix inconsistent indenting
2018-12-03 22:55 ` Manasi Navare
@ 2018-12-04 9:31 ` Chris Wilson
0 siblings, 0 replies; 11+ messages in thread
From: Chris Wilson @ 2018-12-04 9:31 UTC (permalink / raw)
To: Manasi Navare; +Cc: intel-gfx
Quoting Manasi Navare (2018-12-03 22:55:16)
> On Tue, Nov 20, 2018 at 08:24:39PM +0000, Chris Wilson wrote:
> > Always show the FEC capability as it is initialised to 0 before error.
>
> That is a good point, do you think we should do the same for DSC DPCD and print
> that unconditionally?
Yes, when looking for debug prints I don't always remember under what
conditions they don't get printed. So for something like link
capabilities explicitly telling me some feature is not present is more
foolproof.
It's your call though, you need to balance debug output so that you get
the information you need without too large of a haystack. :)
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2018-12-04 9:31 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-11-20 20:24 [PATCH 1/2] drm/i915/gvt: Avoid use-after-free iterating the gtt list Chris Wilson
2018-11-20 20:24 ` [PATCH 2/2] drm/i915/dp: Fix inconsistent indenting Chris Wilson
2018-12-03 22:43 ` Srivatsa, Anusha
2018-12-03 22:55 ` Manasi Navare
2018-12-04 9:31 ` Chris Wilson
2018-11-20 20:49 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/gvt: Avoid use-after-free iterating the gtt list Patchwork
2018-11-21 2:29 ` [PATCH 1/2] " Zhenyu Wang
2018-11-21 2:46 ` Yuan, Hang
2018-11-21 9:20 ` Chris Wilson
2018-11-21 9:21 ` Zhenyu Wang
2018-11-21 7:52 ` ✓ Fi.CI.IGT: success for series starting with [1/2] " Patchwork
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.