All of lore.kernel.org
 help / color / mirror / Atom feed
From: Chee, Tien Fong <tien.fong.chee@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 4/9] ARM: socfpga: Bundle U-Boot fitImage into SFP on Arria10
Date: Fri, 23 Nov 2018 09:54:19 +0000	[thread overview]
Message-ID: <1542966858.10129.30.camel@intel.com> (raw)
In-Reply-To: <ddba1a79-004f-5c85-0c66-a549498e1030@denx.de>

On Wed, 2018-11-21 at 15:21 +0100, Marek Vasut wrote:
> On 11/21/2018 11:41 AM, tien.fong.chee at intel.com wrote:
> > 
> > From: Tien Fong Chee <tien.fong.chee@intel.com>
> Did you change Author:ship of the patch ?
> 
> > 
> > Bundle U-Boot fitImage containing U-Boot and FPGA bitstream into
> > the
> > u-boot-with-spl.sfp on Arria10. This lets U-Boot operate in a very
> > similar fashion to Gen5, where the U-Boot binary got loaded by the
> > SPL from a uImage concatenated at the end of the SPL SFP image. On
> > Gen10, the U-Boot is in fitImage which contains the FPGA bitstream
> > as well. In this case, the SPL can load the FPGA bitstream first
> > and
> > load the U-Boot afterward in the same manner. This is nonetheless a
> > stopgap measure until there is a proper firmware loader in U-Boot.
> Right, this is a stopgap measure until FW loader is present. Why is
> this
> patch needed at all in this series ?
This patch is cherry picked from the sdmmc_next custodian, so this
patch is required for generating FIT image. I can remove the stopgap
comment to avoid confusing.
> 
> > 
> > Signed-off-by: Marek Vasut <marex@denx.de>
> > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
> > ---
> >  Makefile                         |    9 +++++++--
> >  include/configs/socfpga_common.h |    4 ++++
> >  2 files changed, 11 insertions(+), 2 deletions(-)
> > 
> > diff --git a/Makefile b/Makefile
> > index a55915d..4ecc19d 100644
> > --- a/Makefile
> > +++ b/Makefile
> > @@ -1212,9 +1212,14 @@ ifneq ($(CONFIG_ARCH_SOCFPGA),)
> >  quiet_cmd_socboot = SOCBOOT $@
> >  cmd_socboot = cat	spl/u-boot-spl.sfp spl/u-boot-spl.sfp	
> > \
> >  			spl/u-boot-spl.sfp spl/u-boot-spl.sfp	
> > \
> > -			u-boot.img > $@ || rm -f $@
> > +			$2 > $@ || rm -f $@
> > +ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
> > +u-boot-with-spl.sfp: spl/u-boot-spl.sfp u-boot.itb FORCE
> > +	$(call if_changed,socboot,u-boot.itb)
> > +else
> >  u-boot-with-spl.sfp: spl/u-boot-spl.sfp u-boot.img FORCE
> > -	$(call if_changed,socboot)
> > +	$(call if_changed,socboot,u-boot.img)
> > +endif
> >  endif
> >  
> >  ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy)
> > diff --git a/include/configs/socfpga_common.h
> > b/include/configs/socfpga_common.h
> > index bd8f5c8..ffdc6eb 100644
> > --- a/include/configs/socfpga_common.h
> > +++ b/include/configs/socfpga_common.h
> > @@ -268,7 +268,11 @@ unsigned int
> > cm_get_qspi_controller_clk_hz(void);
> >  /* SPL SDMMC boot support */
> >  #ifdef CONFIG_SPL_MMC_SUPPORT
> >  #if defined(CONFIG_SPL_FAT_SUPPORT) ||
> > defined(CONFIG_SPL_EXT_SUPPORT)
> > +#if CONFIG_SPL_FIT
> > +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-
> > boot.itb"
> > +#else
> >  #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot-
> > dtb.img"
> > +#endif
> >  #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
> >  #endif
> >  #else
> > 
> 

  reply	other threads:[~2018-11-23  9:54 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-21 10:41 [U-Boot] [PATCH 0/9] Add support for loading FPGA bitstream tien.fong.chee at intel.com
2018-11-21 10:41 ` [U-Boot] [PATCH 1/9] ARM: socfpga: Description on FPGA bitstream type and file name for Arria 10 tien.fong.chee at intel.com
2018-11-21 14:11   ` Marek Vasut
2018-11-23  9:19     ` Chee, Tien Fong
2018-11-23 12:23       ` Marek Vasut
2018-11-26  9:44         ` Chee, Tien Fong
2018-11-26 11:15           ` Marek Vasut
2018-11-27  8:45             ` Chee, Tien Fong
2018-11-27 12:07               ` Marek Vasut
2018-11-28 14:49                 ` Chee, Tien Fong
2018-11-28 15:10                   ` Marek Vasut
2018-11-28 15:36                     ` Chee, Tien Fong
2018-11-28 16:17                     ` Chee, Tien Fong
2018-11-28 17:55                       ` Marek Vasut
2018-12-14  8:07                         ` Chee, Tien Fong
2018-11-21 10:41 ` [U-Boot] [PATCH 2/9] ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading tien.fong.chee at intel.com
2018-11-21 14:18   ` Marek Vasut
2018-11-23  9:43     ` Chee, Tien Fong
2018-11-23 12:28       ` Marek Vasut
2018-11-26 10:09         ` Chee, Tien Fong
2018-11-26 11:18           ` Marek Vasut
2018-11-27  8:54             ` Chee, Tien Fong
2018-11-27 12:08               ` Marek Vasut
2018-11-28 14:53                 ` Chee, Tien Fong
2018-11-28 15:11                   ` Marek Vasut
2018-11-21 10:41 ` [U-Boot] [PATCH 3/9] spl : socfpga: Implement fpga bitstream loading with socfpga loadfs tien.fong.chee at intel.com
2018-11-21 14:19   ` Marek Vasut
2018-11-23  9:51     ` Chee, Tien Fong
2018-11-23 12:31       ` Marek Vasut
2018-11-26 10:10         ` Chee, Tien Fong
2018-11-26 11:20           ` Marek Vasut
2018-11-27  8:55             ` Chee, Tien Fong
2018-11-27 12:08               ` Marek Vasut
2018-11-21 10:41 ` [U-Boot] [PATCH 4/9] ARM: socfpga: Bundle U-Boot fitImage into SFP on Arria10 tien.fong.chee at intel.com
2018-11-21 14:21   ` Marek Vasut
2018-11-23  9:54     ` Chee, Tien Fong [this message]
2018-11-23 12:40       ` Marek Vasut
2018-11-26 10:30         ` Chee, Tien Fong
2018-11-26 11:22           ` Marek Vasut
2018-11-27  9:00             ` Chee, Tien Fong
2018-11-27 12:09               ` Marek Vasut
2018-11-28 14:43                 ` Chee, Tien Fong
2018-11-28 15:11                   ` Marek Vasut
2018-11-21 10:41 ` [U-Boot] [PATCH 5/9] ARM: socfpga: Add SPL fitImage config match tien.fong.chee at intel.com
2018-11-21 14:21   ` Marek Vasut
2018-11-23 10:05     ` Chee, Tien Fong
2018-11-23 12:34       ` Marek Vasut
2018-11-26 10:11         ` Chee, Tien Fong
2018-11-21 10:41 ` [U-Boot] [PATCH 6/9] ARM: socfpga: Set default DTB address on A10 tien.fong.chee at intel.com
2018-11-21 14:22   ` Marek Vasut
2018-11-23 10:10     ` Chee, Tien Fong
2018-11-23 12:39       ` Marek Vasut
2018-11-21 10:41 ` [U-Boot] [PATCH 7/9] ARM: socfpga: Use custom header target buffer in SPL tien.fong.chee at intel.com
2018-11-21 10:41 ` [U-Boot] [PATCH 8/9] ARM: socfpga: Add default fitImage for Arria10 SoCDK tien.fong.chee at intel.com
2018-11-21 10:41 ` [U-Boot] [PATCH 9/9] ARM: socfpga: Synchronize the configuration for A10 SoCDK tien.fong.chee at intel.com

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1542966858.10129.30.camel@intel.com \
    --to=tien.fong.chee@intel.com \
    --cc=u-boot@lists.denx.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.