* [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2
@ 2018-12-31 14:55 Aleksandar Markovic
2018-12-31 14:55 ` [Qemu-devel] [PULL v2 01/44] MAINTAINERS: target/mips: Add MIPS files under default-configs directory Aleksandar Markovic
` (44 more replies)
0 siblings, 45 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:55 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
The following changes since commit 9b2e891ec5ccdb4a7d583b77988848282606fdea:
Merge remote-tracking branch 'remotes/marcel/tags/rdma-pull-request' into staging (2018-12-22 11:25:31 +0000)
are available in the git repository at:
https://github.com/AMarkovic/qemu tags/mips-queue-dec-2018-v2
for you to fetch changes up to 96446398f47b70cf0998412314730709570e08c5:
tests/tcg: mips: Test R5900 three-operand MADDU1 (2018-12-31 15:47:28 +0100)
----------------------------------------------------------------
MIPS queue for December 2018 - v2
- this queue contains various amendments to MIPS code
- there are three checkpatch warnings that should be ingnored
in given circumstances
- most of the patches are not yet visible/noticeable to the end
user, just a single note related to Paul's patch will be added
to ChangeLog
v1->v2:
- added three patches that were meanwhile tested better
----------------------------------------------------------------
Aleksandar Markovic (36):
MAINTAINERS: target/mips: Add MIPS files under default-configs
directory
MAINTAINERS: target/mips: Add filter for mips in email subjects
MAINTAINERS: target/mips: Reorder items alphabetically
MAINTAINERS: Add Aleksandar Rikalo as a reviewer for MIPS content
target/mips: MXU: Add missing opcodes/decoding for LX* instructions
target/mips: MXU: Add generic naming for optn2 constants
target/mips: MXU: Improve the comment containing MXU overview
target/mips: MXU: Add handlers for logic instructions
target/mips: MXU: Add handlers for max/min instructions
target/mips: MXU: Add handler for an align instruction
disas: nanoMIPS: Fix preamble text in nanomips.* files
disas: nanoMIPS: Remove functions that are not used
disas: nanoMIPS: Fix a function misnomer
disas: nanoMIPS: Fix order of some invocations
disas: nanoMIPS: Name some functions in a more descriptive way
disas: nanoMIPS: Fix an FP-related misnomer 1
disas: nanoMIPS: Fix an FP-related misnomer 2
disas: nanoMIPS: Fix an FP-related misnomer 3
disas: nanoMIPS: Name more functions in a more descriptive way
disas: nanoMIPS: Fix order of more invocations
disas: nanoMIPS: Rename the decoder of 'gpr3' gpr encoding type
disas: nanoMIPS: Comment the decoder of 'gpr3' gpr encoding type
disas: nanoMIPS: Rename the decoder of 'gpr3.src.store' gpr encoding
type
disas: nanoMIPS: Comment the decoder of 'gpr3.src.store' gpr encoding
type
disas: nanoMIPS: Rename the decoder of 'gpr4' gpr encoding type
disas: nanoMIPS: Comment the decoder of 'gpr4' gpr encoding type
disas: nanoMIPS: Rename the decoder of 'gpr4.zero' gpr encoding type
disas: nanoMIPS: Comment the decoder of 'gpr4.zero' gpr encoding type
disas: nanoMIPS: Rename the decoder of 'gpr2.reg1' gpr encoding type
disas: nanoMIPS: Comment the decoder of 'gpr2.reg1' gpr encoding type
disas: nanoMIPS: Rename the decoder of 'gpr2.reg2' gpr encoding type
disas: nanoMIPS: Comment the decoder of 'gpr2.reg2' gpr encoding type
disas: nanoMIPS: Rename the decoder of 'gpr1' gpr encoding type
disas: nanoMIPS: Comment the decoder of 'gpr1' gpr encoding type
disas: nanoMIPS: Reorder declarations and definitions of gpr decoders
disas: nanoMIPS: Add a note on documentation
Fredrik Noring (5):
target/mips: Support R5900 three-operand MADD1 and MADDU1 instructions
tests/tcg: mips: Test R5900 three-operand MADD
tests/tcg: mips: Test R5900 three-operand MADD1
tests/tcg: mips: Test R5900 three-operand MADDU
tests/tcg: mips: Test R5900 three-operand MADDU1
Paul Burton (1):
atomics: Set ATOMIC_REG_SIZE=8 for MIPS n32
Philippe Mathieu-Daudé (1):
target/mips: Support R5900 three-operand MADD and MADDU instructions
Stefan Weil (1):
disas: nanoMIPS: Fix types and format strings
MAINTAINERS | 21 +-
disas/nanomips.cpp | 2155 ++++++++++++++++++-------------------
disas/nanomips.h | 125 +--
include/qemu/atomic.h | 5 +-
target/mips/translate.c | 1007 ++++++++++++++---
tests/tcg/mips/mipsr5900/Makefile | 2 +
tests/tcg/mips/mipsr5900/madd.c | 78 ++
tests/tcg/mips/mipsr5900/maddu.c | 70 ++
8 files changed, 2178 insertions(+), 1285 deletions(-)
create mode 100644 tests/tcg/mips/mipsr5900/madd.c
create mode 100644 tests/tcg/mips/mipsr5900/maddu.c
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 01/44] MAINTAINERS: target/mips: Add MIPS files under default-configs directory
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
@ 2018-12-31 14:55 ` Aleksandar Markovic
2018-12-31 14:55 ` [Qemu-devel] [PULL v2 02/44] MAINTAINERS: target/mips: Add filter for mips in email subjects Aleksandar Markovic
` (43 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:55 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Add following files as maintained within the main MIPS target
section in MAINTAINERS:
default-configs/mips64el-linux-user.mak
default-configs/mips64-linux-user.mak
default-configs/mipsn32el-linux-user.mak
default-configs/mipsn32-linux-user.mak
default-configs/mipsel-linux-user.mak
default-configs/mips-linux-user.mak
default-configs/mips64el-softmmu.mak
default-configs/mips64-softmmu.mak
default-configs/mipsel-softmmu.mak
default-configs/mips-softmmu.mak
default-configs/mips-softmmu-common.mak
Future nanoMIPS user mode will also have its .mak file, and
because of that "*mips*" was used instead of "mips*" as a
shorthand in the new item in MAINTAINERS.
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 180695f..374e4c2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -208,6 +208,7 @@ M: Aleksandar Markovic <amarkovic@wavecomp.com>
R: Stefan Markovic <smarkovic@wavecomp.com>
S: Maintained
F: target/mips/
+F: default-configs/*mips*
F: hw/mips/
F: hw/misc/mips_*
F: hw/intc/mips_gic.c
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 02/44] MAINTAINERS: target/mips: Add filter for mips in email subjects
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
2018-12-31 14:55 ` [Qemu-devel] [PULL v2 01/44] MAINTAINERS: target/mips: Add MIPS files under default-configs directory Aleksandar Markovic
@ 2018-12-31 14:55 ` Aleksandar Markovic
2018-12-31 14:55 ` [Qemu-devel] [PULL v2 03/44] MAINTAINERS: target/mips: Reorder items alphabetically Aleksandar Markovic
` (42 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:55 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Add ability to redirect mails (sent to qemu-devel) containing
"mips" in the subject line to MIPS maintainers and reviewers.
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 374e4c2..bf82eb3 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -221,6 +221,7 @@ F: tests/tcg/mips/
F: disas/mips.c
F: disas/nanomips.h
F: disas/nanomips.cpp
+K: ^Subject:.*(?i)mips
Moxie
M: Anthony Green <green@moxielogic.com>
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 03/44] MAINTAINERS: target/mips: Reorder items alphabetically
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
2018-12-31 14:55 ` [Qemu-devel] [PULL v2 01/44] MAINTAINERS: target/mips: Add MIPS files under default-configs directory Aleksandar Markovic
2018-12-31 14:55 ` [Qemu-devel] [PULL v2 02/44] MAINTAINERS: target/mips: Add filter for mips in email subjects Aleksandar Markovic
@ 2018-12-31 14:55 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 04/44] MAINTAINERS: Add Aleksandar Rikalo as a reviewer for MIPS content Aleksandar Markovic
` (41 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:55 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Reorder items alphabetically for better visibility.
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
MAINTAINERS | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index bf82eb3..39fb1ae 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -209,18 +209,18 @@ R: Stefan Markovic <smarkovic@wavecomp.com>
S: Maintained
F: target/mips/
F: default-configs/*mips*
+F: disas/mips.c
+F: disas/nanomips.cpp
+F: disas/nanomips.h
+F: hw/intc/mips_gic.c
F: hw/mips/
F: hw/misc/mips_*
-F: hw/intc/mips_gic.c
F: hw/timer/mips_gictimer.c
+F: include/hw/intc/mips_gic.h
F: include/hw/mips/
F: include/hw/misc/mips_*
-F: include/hw/intc/mips_gic.h
F: include/hw/timer/mips_gictimer.h
F: tests/tcg/mips/
-F: disas/mips.c
-F: disas/nanomips.h
-F: disas/nanomips.cpp
K: ^Subject:.*(?i)mips
Moxie
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 04/44] MAINTAINERS: Add Aleksandar Rikalo as a reviewer for MIPS content
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (2 preceding siblings ...)
2018-12-31 14:55 ` [Qemu-devel] [PULL v2 03/44] MAINTAINERS: target/mips: Reorder items alphabetically Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 05/44] atomics: Set ATOMIC_REG_SIZE=8 for MIPS n32 Aleksandar Markovic
` (40 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Add Aleksandar Rikalo as a reviewer for MIPS content. Aleksandar
brings to us more than six years of experience in working on a variety
of development tools for MIPS architectures, and will greatly help
QEMU community understand and support intricacies of MIPS better.
Acked-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
MAINTAINERS | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 39fb1ae..b06f534 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -205,6 +205,7 @@ F: disas/microblaze.c
MIPS
M: Aurelien Jarno <aurelien@aurel32.net>
M: Aleksandar Markovic <amarkovic@wavecomp.com>
+R: Aleksandar Rikalo <arikalo@wavecomp.com>
R: Stefan Markovic <smarkovic@wavecomp.com>
S: Maintained
F: target/mips/
@@ -362,6 +363,7 @@ F: target/arm/kvm.c
MIPS
M: James Hogan <jhogan@kernel.org>
+R: Aleksandar Rikalo <arikalo@wavecomp.com>
R: Stefan Markovic <smarkovic@wavecomp.com>
S: Maintained
F: target/mips/kvm.c
@@ -871,6 +873,7 @@ MIPS Machines
-------------
Jazz
M: Hervé Poussineau <hpoussin@reactos.org>
+R: Aleksandar Rikalo <arikalo@wavecomp.com>
R: Stefan Markovic <smarkovic@wavecomp.com>
S: Maintained
F: hw/mips/mips_jazz.c
@@ -879,12 +882,14 @@ F: hw/dma/rc4030.c
Malta
M: Aurelien Jarno <aurelien@aurel32.net>
+R: Aleksandar Rikalo <arikalo@wavecomp.com>
R: Stefan Markovic <smarkovic@wavecomp.com>
S: Maintained
F: hw/mips/mips_malta.c
Mipssim
M: Aleksandar Markovic <amarkovic@wavecomp.com>
+R: Aleksandar Rikalo <arikalo@wavecomp.com>
R: Stefan Markovic <smarkovic@wavecomp.com>
S: Odd Fixes
F: hw/mips/mips_mipssim.c
@@ -892,12 +897,14 @@ F: hw/net/mipsnet.c
R4000
M: Aurelien Jarno <aurelien@aurel32.net>
+R: Aleksandar Rikalo <arikalo@wavecomp.com>
R: Stefan Markovic <smarkovic@wavecomp.com>
S: Maintained
F: hw/mips/mips_r4k.c
Fulong 2E
M: Aleksandar Markovic <amarkovic@wavecomp.com>
+R: Aleksandar Rikalo <arikalo@wavecomp.com>
R: Stefan Markovic <smarkovic@wavecomp.com>
S: Odd Fixes
F: hw/mips/mips_fulong2e.c
@@ -907,6 +914,7 @@ F: include/hw/isa/vt82c686.h
Boston
M: Paul Burton <pburton@wavecomp.com>
+R: Aleksandar Rikalo <arikalo@wavecomp.com>
R: Stefan Markovic <smarkovic@wavecomp.com>
S: Maintained
F: hw/core/loader-fit.c
@@ -2163,6 +2171,7 @@ F: disas/i386.c
MIPS target
M: Aurelien Jarno <aurelien@aurel32.net>
+R: Aleksandar Rikalo <arikalo@wavecomp.com>
R: Stefan Markovic <smarkovic@wavecomp.com>
S: Maintained
F: tcg/mips/
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 05/44] atomics: Set ATOMIC_REG_SIZE=8 for MIPS n32
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (3 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 04/44] MAINTAINERS: Add Aleksandar Rikalo as a reviewer for MIPS content Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 06/44] target/mips: MXU: Add missing opcodes/decoding for LX* instructions Aleksandar Markovic
` (39 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Paul Burton <pburton@wavecomp.com>
ATOMIC_REG_SIZE is currently defined as the default sizeof(void *) for
all MIPS host builds, including those using the n32 ABI. n32 is the
MIPS64 ILP32 ABI and as such tcg/mips/tcg-target.h defines
TCG_TARGET_REG_BITS as 64 for n32 builds. If we attempt to build QEMU
for an n32 host with support for a 64b target architecture then
TCG_OVERSIZED_GUEST is 0 and accel/tcg/cputlb.c attempts to use
atomic_* functions. This fails because ATOMIC_REG_SIZE is 4, causing
the calls to QEMU_BUILD_BUG_ON(sizeof(*ptr) > ATOMIC_REG_SIZE) in the
various atomic_* functions to generate errors.
Fix this by defining ATOMIC_REG_SIZE as 8 for all MIPS64 builds, which
will cover both n32 (ILP32) & n64 (LP64) ABIs in much the same was as
we already do for x86_64/x32.
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Paul Burton <pburton@wavecomp.com>
---
include/qemu/atomic.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/include/qemu/atomic.h b/include/qemu/atomic.h
index f6993a8..a6ac188 100644
--- a/include/qemu/atomic.h
+++ b/include/qemu/atomic.h
@@ -99,9 +99,10 @@
* those few cases by hand.
*
* Note that x32 is fully detected with __x86_64__ + _ILP32, and that for
- * Sparc we always force the use of sparcv9 in configure.
+ * Sparc we always force the use of sparcv9 in configure. MIPS n32 (ILP32) &
+ * n64 (LP64) ABIs are both detected using __mips64.
*/
-#if defined(__x86_64__) || defined(__sparc__)
+#if defined(__x86_64__) || defined(__sparc__) || defined(__mips64)
# define ATOMIC_REG_SIZE 8
#else
# define ATOMIC_REG_SIZE sizeof(void *)
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 06/44] target/mips: MXU: Add missing opcodes/decoding for LX* instructions
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (4 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 05/44] atomics: Set ATOMIC_REG_SIZE=8 for MIPS n32 Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 07/44] target/mips: MXU: Add generic naming for optn2 constants Aleksandar Markovic
` (38 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Add missing opcodes and decoding engine for LXB, LXH, LXW, LXBU,
and LXHU instructions. They were for some reason forgotten in
previous commits. The MXU opcode list and decoding engine should
be now complete.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
target/mips/translate.c | 140 +++++++++++++++++++++++++++++++++++-------------
1 file changed, 102 insertions(+), 38 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index e9c23a5..e0c8d8c 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -1663,12 +1663,21 @@ enum {
* │ 20..18
* ├─ 100111 ─ OPC_MXU__POOL16 ─┬─ 000 ─ OPC_MXU_D32SARW
* │ ├─ 001 ─ OPC_MXU_S32ALN
- * ├─ 101000 ─ OPC_MXU_LXB ├─ 010 ─ OPC_MXU_S32ALNI
- * ├─ 101001 ─ <not assigned> ├─ 011 ─ OPC_MXU_S32NOR
- * ├─ 101010 ─ OPC_MXU_S16LDD ├─ 100 ─ OPC_MXU_S32AND
- * ├─ 101011 ─ OPC_MXU_S16STD ├─ 101 ─ OPC_MXU_S32OR
- * ├─ 101100 ─ OPC_MXU_S16LDI ├─ 110 ─ OPC_MXU_S32XOR
- * ├─ 101101 ─ OPC_MXU_S16SDI └─ 111 ─ OPC_MXU_S32LUI
+ * │ ├─ 010 ─ OPC_MXU_S32ALNI
+ * │ ├─ 011 ─ OPC_MXU_S32NOR
+ * │ ├─ 100 ─ OPC_MXU_S32AND
+ * │ ├─ 101 ─ OPC_MXU_S32OR
+ * │ ├─ 110 ─ OPC_MXU_S32XOR
+ * │ └─ 111 ─ OPC_MXU_S32LUI
+ * │
+ * │ 7..5
+ * ├─ 101000 ─ OPC_MXU__POOL17 ─┬─ 000 ─ OPC_MXU_LXB
+ * │ ├─ 001 ─ OPC_MXU_LXH
+ * ├─ 101001 ─ <not assigned> ├─ 011 ─ OPC_MXU_LXW
+ * ├─ 101010 ─ OPC_MXU_S16LDD ├─ 100 ─ OPC_MXU_LXBU
+ * ├─ 101011 ─ OPC_MXU_S16STD └─ 101 ─ OPC_MXU_LXHU
+ * ├─ 101100 ─ OPC_MXU_S16LDI
+ * ├─ 101101 ─ OPC_MXU_S16SDI
* ├─ 101110 ─ OPC_MXU_S32M2I
* ├─ 101111 ─ OPC_MXU_S32I2M
* ├─ 110000 ─ OPC_MXU_D32SLL
@@ -1678,15 +1687,15 @@ enum {
* ├─ 110100 ─ OPC_MXU_Q16SLL ├─ 010 ─ OPC_MXU_D32SARV
* ├─ 110101 ─ OPC_MXU_Q16SLR ├─ 011 ─ OPC_MXU_Q16SLLV
* │ ├─ 100 ─ OPC_MXU_Q16SLRV
- * ├─ 110110 ─ OPC_MXU__POOL17 ─┴─ 101 ─ OPC_MXU_Q16SARV
+ * ├─ 110110 ─ OPC_MXU__POOL18 ─┴─ 101 ─ OPC_MXU_Q16SARV
* │
* ├─ 110111 ─ OPC_MXU_Q16SAR
* │ 23..22
- * ├─ 111000 ─ OPC_MXU__POOL18 ─┬─ 00 ─ OPC_MXU_Q8MUL
+ * ├─ 111000 ─ OPC_MXU__POOL19 ─┬─ 00 ─ OPC_MXU_Q8MUL
* │ └─ 01 ─ OPC_MXU_Q8MULSU
* │
* │ 20..18
- * ├─ 111001 ─ OPC_MXU__POOL19 ─┬─ 000 ─ OPC_MXU_Q8MOVZ
+ * ├─ 111001 ─ OPC_MXU__POOL20 ─┬─ 000 ─ OPC_MXU_Q8MOVZ
* │ ├─ 001 ─ OPC_MXU_Q8MOVN
* │ ├─ 010 ─ OPC_MXU_D16MOVZ
* │ ├─ 011 ─ OPC_MXU_D16MOVN
@@ -1694,7 +1703,7 @@ enum {
* │ └─ 101 ─ OPC_MXU_S32MOV
* │
* │ 23..22
- * ├─ 111010 ─ OPC_MXU__POOL20 ─┬─ 00 ─ OPC_MXU_Q8MAC
+ * ├─ 111010 ─ OPC_MXU__POOL21 ─┬─ 00 ─ OPC_MXU_Q8MAC
* │ └─ 10 ─ OPC_MXU_Q8MACSU
* ├─ 111011 ─ OPC_MXU_Q16SCOP
* ├─ 111100 ─ OPC_MXU_Q8MADL
@@ -1750,7 +1759,7 @@ enum {
OPC_MXU_S8SDI = 0x25,
OPC_MXU__POOL15 = 0x26,
OPC_MXU__POOL16 = 0x27,
- OPC_MXU_LXB = 0x28,
+ OPC_MXU__POOL17 = 0x28,
/* not assigned 0x29 */
OPC_MXU_S16LDD = 0x2A,
OPC_MXU_S16STD = 0x2B,
@@ -1764,11 +1773,11 @@ enum {
OPC_MXU_D32SAR = 0x33,
OPC_MXU_Q16SLL = 0x34,
OPC_MXU_Q16SLR = 0x35,
- OPC_MXU__POOL17 = 0x36,
+ OPC_MXU__POOL18 = 0x36,
OPC_MXU_Q16SAR = 0x37,
- OPC_MXU__POOL18 = 0x38,
- OPC_MXU__POOL19 = 0x39,
- OPC_MXU__POOL20 = 0x3A,
+ OPC_MXU__POOL19 = 0x38,
+ OPC_MXU__POOL20 = 0x39,
+ OPC_MXU__POOL21 = 0x3A,
OPC_MXU_Q16SCOP = 0x3B,
OPC_MXU_Q8MADL = 0x3C,
OPC_MXU_S32SFL = 0x3D,
@@ -1941,6 +1950,17 @@ enum {
* MXU pool 17
*/
enum {
+ OPC_MXU_LXB = 0x00,
+ OPC_MXU_LXH = 0x01,
+ OPC_MXU_LXW = 0x03,
+ OPC_MXU_LXBU = 0x04,
+ OPC_MXU_LXHU = 0x05,
+};
+
+/*
+ * MXU pool 18
+ */
+enum {
OPC_MXU_D32SLLV = 0x00,
OPC_MXU_D32SLRV = 0x01,
OPC_MXU_D32SARV = 0x03,
@@ -1950,7 +1970,7 @@ enum {
};
/*
- * MXU pool 18
+ * MXU pool 19
*/
enum {
OPC_MXU_Q8MUL = 0x00,
@@ -1958,7 +1978,7 @@ enum {
};
/*
- * MXU pool 19
+ * MXU pool 20
*/
enum {
OPC_MXU_Q8MOVZ = 0x00,
@@ -1970,7 +1990,7 @@ enum {
};
/*
- * MXU pool 20
+ * MXU pool 21
*/
enum {
OPC_MXU_Q8MAC = 0x00,
@@ -25331,12 +25351,58 @@ static void decode_opc_mxu__pool16(CPUMIPSState *env, DisasContext *ctx)
* Decode MXU pool17
*
* 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * +-----------+---------+---------+---+---------+-----+-----------+
+ * | SPECIAL2 | rs | rt |0 0| rd |x x x|MXU__POOL15|
+ * +-----------+---------+---------+---+---------+-----+-----------+
+ *
+ */
+static void decode_opc_mxu__pool17(CPUMIPSState *env, DisasContext *ctx)
+{
+ uint32_t opcode = extract32(ctx->opcode, 6, 2);
+
+ switch (opcode) {
+ case OPC_MXU_LXW:
+ /* TODO: Implement emulation of LXW instruction. */
+ MIPS_INVAL("OPC_MXU_LXW");
+ generate_exception_end(ctx, EXCP_RI);
+ break;
+ case OPC_MXU_LXH:
+ /* TODO: Implement emulation of LXH instruction. */
+ MIPS_INVAL("OPC_MXU_LXH");
+ generate_exception_end(ctx, EXCP_RI);
+ break;
+ case OPC_MXU_LXHU:
+ /* TODO: Implement emulation of LXHU instruction. */
+ MIPS_INVAL("OPC_MXU_LXHU");
+ generate_exception_end(ctx, EXCP_RI);
+ break;
+ case OPC_MXU_LXB:
+ /* TODO: Implement emulation of LXB instruction. */
+ MIPS_INVAL("OPC_MXU_LXB");
+ generate_exception_end(ctx, EXCP_RI);
+ break;
+ case OPC_MXU_LXBU:
+ /* TODO: Implement emulation of LXBU instruction. */
+ MIPS_INVAL("OPC_MXU_LXBU");
+ generate_exception_end(ctx, EXCP_RI);
+ break;
+ default:
+ MIPS_INVAL("decode_opc_mxu");
+ generate_exception_end(ctx, EXCP_RI);
+ break;
+ }
+}
+/*
+ *
+ * Decode MXU pool18
+ *
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
* +-----------+---------+-----+-------+-------+-------+-----------+
- * | SPECIAL2 | rb |x x x| XRd | XRa |0 0 0 0|MXU__POOL17|
+ * | SPECIAL2 | rb |x x x| XRd | XRa |0 0 0 0|MXU__POOL18|
* +-----------+---------+-----+-------+-------+-------+-----------+
*
*/
-static void decode_opc_mxu__pool17(CPUMIPSState *env, DisasContext *ctx)
+static void decode_opc_mxu__pool18(CPUMIPSState *env, DisasContext *ctx)
{
uint32_t opcode = extract32(ctx->opcode, 18, 3);
@@ -25380,15 +25446,15 @@ static void decode_opc_mxu__pool17(CPUMIPSState *env, DisasContext *ctx)
/*
*
- * Decode MXU pool18
+ * Decode MXU pool19
*
* 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
* +-----------+---+---+-------+-------+-------+-------+-----------+
- * | SPECIAL2 |0 0|x x| XRd | XRc | XRb | XRa |MXU__POOL18|
+ * | SPECIAL2 |0 0|x x| XRd | XRc | XRb | XRa |MXU__POOL19|
* +-----------+---+---+-------+-------+-------+-------+-----------+
*
*/
-static void decode_opc_mxu__pool18(CPUMIPSState *env, DisasContext *ctx)
+static void decode_opc_mxu__pool19(CPUMIPSState *env, DisasContext *ctx)
{
uint32_t opcode = extract32(ctx->opcode, 22, 2);
@@ -25406,15 +25472,15 @@ static void decode_opc_mxu__pool18(CPUMIPSState *env, DisasContext *ctx)
/*
*
- * Decode MXU pool19
+ * Decode MXU pool20
*
* 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
* +-----------+---------+-----+-------+-------+-------+-----------+
- * | SPECIAL2 |0 0 0 0 0|x x x| XRc | XRb | XRa |MXU__POOL19|
+ * | SPECIAL2 |0 0 0 0 0|x x x| XRc | XRb | XRa |MXU__POOL20|
* +-----------+---------+-----+-------+-------+-------+-----------+
*
*/
-static void decode_opc_mxu__pool19(CPUMIPSState *env, DisasContext *ctx)
+static void decode_opc_mxu__pool20(CPUMIPSState *env, DisasContext *ctx)
{
uint32_t opcode = extract32(ctx->opcode, 18, 3);
@@ -25458,15 +25524,15 @@ static void decode_opc_mxu__pool19(CPUMIPSState *env, DisasContext *ctx)
/*
*
- * Decode MXU pool20
+ * Decode MXU pool21
*
* 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
* +-----------+---+---+-------+-------+-------+-------+-----------+
- * | SPECIAL2 |an2|x x| XRd | XRc | XRb | XRa |MXU__POOL20|
+ * | SPECIAL2 |an2|x x| XRd | XRc | XRb | XRa |MXU__POOL21|
* +-----------+---+---+-------+-------+-------+-------+-----------+
*
*/
-static void decode_opc_mxu__pool20(CPUMIPSState *env, DisasContext *ctx)
+static void decode_opc_mxu__pool21(CPUMIPSState *env, DisasContext *ctx)
{
uint32_t opcode = extract32(ctx->opcode, 22, 2);
@@ -25669,10 +25735,8 @@ static void decode_opc_mxu(CPUMIPSState *env, DisasContext *ctx)
case OPC_MXU__POOL16:
decode_opc_mxu__pool16(env, ctx);
break;
- case OPC_MXU_LXB:
- /* TODO: Implement emulation of LXB instruction. */
- MIPS_INVAL("OPC_MXU_LXB");
- generate_exception_end(ctx, EXCP_RI);
+ case OPC_MXU__POOL17:
+ decode_opc_mxu__pool17(env, ctx);
break;
case OPC_MXU_S16LDD:
/* TODO: Implement emulation of S16LDD instruction. */
@@ -25724,23 +25788,23 @@ static void decode_opc_mxu(CPUMIPSState *env, DisasContext *ctx)
MIPS_INVAL("OPC_MXU_Q16SLR");
generate_exception_end(ctx, EXCP_RI);
break;
- case OPC_MXU__POOL17:
- decode_opc_mxu__pool17(env, ctx);
+ case OPC_MXU__POOL18:
+ decode_opc_mxu__pool18(env, ctx);
break;
case OPC_MXU_Q16SAR:
/* TODO: Implement emulation of Q16SAR instruction. */
MIPS_INVAL("OPC_MXU_Q16SAR");
generate_exception_end(ctx, EXCP_RI);
break;
- case OPC_MXU__POOL18:
- decode_opc_mxu__pool18(env, ctx);
- break;
case OPC_MXU__POOL19:
decode_opc_mxu__pool19(env, ctx);
break;
case OPC_MXU__POOL20:
decode_opc_mxu__pool20(env, ctx);
break;
+ case OPC_MXU__POOL21:
+ decode_opc_mxu__pool21(env, ctx);
+ break;
case OPC_MXU_Q16SCOP:
/* TODO: Implement emulation of Q16SCOP instruction. */
MIPS_INVAL("OPC_MXU_Q16SCOP");
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 07/44] target/mips: MXU: Add generic naming for optn2 constants
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (5 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 06/44] target/mips: MXU: Add missing opcodes/decoding for LX* instructions Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 08/44] target/mips: MXU: Improve the comment containing MXU overview Aleksandar Markovic
` (37 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Add generic naming involving generig suffixes OPTN0, OPTN1, OPTN2,
OPTN3 for four optn2 constants. Existing suffixes WW, LW, HW, XW
are not quite appropriate for some instructions using optn2.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
target/mips/translate.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index e0c8d8c..74d16ce 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -24238,6 +24238,11 @@ static void decode_opc_special(CPUMIPSState *env, DisasContext *ctx)
#define MXU_EPTN2_SS 3
/* MXU operand getting pattern 'optn2' */
+#define MXU_OPTN2_PTN0 0
+#define MXU_OPTN2_PTN1 1
+#define MXU_OPTN2_PTN2 2
+#define MXU_OPTN2_PTN3 3
+/* alternative naming scheme for 'optn2' */
#define MXU_OPTN2_WW 0
#define MXU_OPTN2_LW 1
#define MXU_OPTN2_HW 2
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 08/44] target/mips: MXU: Improve the comment containing MXU overview
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (6 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 07/44] target/mips: MXU: Add generic naming for optn2 constants Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 09/44] target/mips: MXU: Add handlers for logic instructions Aleksandar Markovic
` (36 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Improve textual description of MXU extension. These are mostly
comment formatting changes.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
target/mips/translate.c | 74 +++++++++++++++++++++++++++++--------------------
1 file changed, 44 insertions(+), 30 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 74d16ce..e3a5a73 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -1399,10 +1399,12 @@ enum {
/*
- * AN OVERVIEW OF MXU EXTENSION INSTRUCTION SET
- * ============================================
*
- * MXU (full name: MIPS eXtension/enhanced Unit) is an SIMD extension of MIPS32
+ * AN OVERVIEW OF MXU EXTENSION INSTRUCTION SET
+ * ============================================
+ *
+ *
+ * MXU (full name: MIPS eXtension/enhanced Unit) is a SIMD extension of MIPS32
* instructions set. It is designed to fit the needs of signal, graphical and
* video processing applications. MXU instruction set is used in Xburst family
* of microprocessors by Ingenic.
@@ -1410,39 +1412,31 @@ enum {
* MXU unit contains 17 registers called X0-X16. X0 is always zero, and X16 is
* the control register.
*
- * The notation used in MXU assembler mnemonics
- * --------------------------------------------
*
- * Registers:
+ * The notation used in MXU assembler mnemonics
+ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ *
+ * Register operands:
*
* XRa, XRb, XRc, XRd - MXU registers
* Rb, Rc, Rd, Rs, Rt - general purpose MIPS registers
*
- * Subfields:
+ * Non-register operands:
*
- * aptn1 - 1-bit accumulate add/subtract pattern
- * aptn2 - 2-bit accumulate add/subtract pattern
- * eptn2 - 2-bit execute add/subtract pattern
- * optn2 - 2-bit operand pattern
- * optn3 - 3-bit operand pattern
- * sft4 - 4-bit shift amount
- * strd2 - 2-bit stride amount
+ * aptn1 - 1-bit accumulate add/subtract pattern
+ * aptn2 - 2-bit accumulate add/subtract pattern
+ * eptn2 - 2-bit execute add/subtract pattern
+ * optn2 - 2-bit operand pattern
+ * optn3 - 3-bit operand pattern
+ * sft4 - 4-bit shift amount
+ * strd2 - 2-bit stride amount
*
* Prefixes:
*
- * <Operation parallel level><Operand size>
- * S 32
- * D 16
- * Q 8
- *
- * Suffixes:
- *
- * E - Expand results
- * F - Fixed point multiplication
- * L - Low part result
- * R - Doing rounding
- * V - Variable instead of immediate
- * W - Combine above L and V
+ * Level of parallelism: Operand size:
+ * S - single operation at a time 32 - word
+ * D - two operations in parallel 16 - half word
+ * Q - four operations in parallel 8 - byte
*
* Operations:
*
@@ -1486,6 +1480,19 @@ enum {
* SCOP - Calculate x’s scope (-1, means x<0; 0, means x==0; 1, means x>0)
* XOR - Logical bitwise 'exclusive or' operation
*
+ * Suffixes:
+ *
+ * E - Expand results
+ * F - Fixed point multiplication
+ * L - Low part result
+ * R - Doing rounding
+ * V - Variable instead of immediate
+ * W - Combine above L and V
+ *
+ *
+ * The list of MXU instructions grouped by functionality
+ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ *
* Load/Store instructions Multiplication instructions
* ----------------------- ---------------------------
*
@@ -1563,6 +1570,13 @@ enum {
* Q16SAT XRa, XRb, XRc S32I2M XRa, Rb
*
*
+ * The opcode organization of MXU instructions
+ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ *
+ * The bits 31..26 of all MXU instructions are equal to 0x1C (also referred
+ * as opcode SPECIAL2 in the base MIPS ISA). The organization and meaning of
+ * other bits up to the instruction level is as follows:
+ *
* bits
* 05..00
*
@@ -1700,7 +1714,7 @@ enum {
* │ ├─ 010 ─ OPC_MXU_D16MOVZ
* │ ├─ 011 ─ OPC_MXU_D16MOVN
* │ ├─ 100 ─ OPC_MXU_S32MOVZ
- * │ └─ 101 ─ OPC_MXU_S32MOV
+ * │ └─ 101 ─ OPC_MXU_S32MOVN
* │
* │ 23..22
* ├─ 111010 ─ OPC_MXU__POOL21 ─┬─ 00 ─ OPC_MXU_Q8MAC
@@ -1712,10 +1726,10 @@ enum {
* └─ 111111 ─ <not assigned> (overlaps with SDBBP)
*
*
- * Compiled after:
+ * Compiled after:
*
* "XBurst® Instruction Set Architecture MIPS eXtension/enhanced Unit
- * Programming Manual", Ingenic Semiconductor Co, Ltd., 2017
+ * Programming Manual", Ingenic Semiconductor Co, Ltd., revision June 2, 2017
*/
enum {
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 09/44] target/mips: MXU: Add handlers for logic instructions
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (7 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 08/44] target/mips: MXU: Improve the comment containing MXU overview Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 10/44] target/mips: MXU: Add handlers for max/min instructions Aleksandar Markovic
` (35 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Add translation handlers for four logic MXU instructions.
It should be noted that there is an error in MXU documentation (dated
June 2017) regarding opcodes for this group of instructions. This was
confirmed by running tests on hardware, and also by looking up other
related public source trees (binutils, Android NDK). In initial MXU
patches to QEMU, opcodes for MXU logic instructions were created to
be in accordance with the MXU documentation, therefore the error from
was propagated. This patch corrects that, changing the involved code.
Besides that, as MXU was designed and implemented only for 32-bit
CPUs, corresponding preprosessor conditions were added around MXU
code, which allows more flexible implementation of MXU handlers.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
target/mips/translate.c | 239 +++++++++++++++++++++++++++++++++++++++++-------
1 file changed, 205 insertions(+), 34 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index e3a5a73..a339f72 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -1678,11 +1678,11 @@ enum {
* ├─ 100111 ─ OPC_MXU__POOL16 ─┬─ 000 ─ OPC_MXU_D32SARW
* │ ├─ 001 ─ OPC_MXU_S32ALN
* │ ├─ 010 ─ OPC_MXU_S32ALNI
- * │ ├─ 011 ─ OPC_MXU_S32NOR
- * │ ├─ 100 ─ OPC_MXU_S32AND
- * │ ├─ 101 ─ OPC_MXU_S32OR
- * │ ├─ 110 ─ OPC_MXU_S32XOR
- * │ └─ 111 ─ OPC_MXU_S32LUI
+ * │ ├─ 011 ─ OPC_MXU_S32LUI
+ * │ ├─ 100 ─ OPC_MXU_S32NOR
+ * │ ├─ 101 ─ OPC_MXU_S32AND
+ * │ ├─ 110 ─ OPC_MXU_S32OR
+ * │ └─ 111 ─ OPC_MXU_S32XOR
* │
* │ 7..5
* ├─ 101000 ─ OPC_MXU__POOL17 ─┬─ 000 ─ OPC_MXU_LXB
@@ -1953,11 +1953,11 @@ enum {
OPC_MXU_D32SARW = 0x00,
OPC_MXU_S32ALN = 0x01,
OPC_MXU_S32ALNI = 0x02,
- OPC_MXU_S32NOR = 0x03,
- OPC_MXU_S32AND = 0x04,
- OPC_MXU_S32OR = 0x05,
- OPC_MXU_S32XOR = 0x06,
- OPC_MXU_S32LUI = 0x07,
+ OPC_MXU_S32LUI = 0x03,
+ OPC_MXU_S32NOR = 0x04,
+ OPC_MXU_S32AND = 0x05,
+ OPC_MXU_S32OR = 0x06,
+ OPC_MXU_S32XOR = 0x07,
};
/*
@@ -2455,9 +2455,11 @@ static TCGv_i32 fpu_fcr0, fpu_fcr31;
static TCGv_i64 fpu_f64[32];
static TCGv_i64 msa_wr_d[64];
+#if !defined(TARGET_MIPS64)
/* MXU registers */
static TCGv mxu_gpr[NUMBER_OF_MXU_REGISTERS - 1];
static TCGv mxu_CR;
+#endif
#include "exec/gen-icount.h"
@@ -2581,10 +2583,12 @@ static const char * const msaregnames[] = {
"w30.d0", "w30.d1", "w31.d0", "w31.d1",
};
+#if !defined(TARGET_MIPS64)
static const char * const mxuregnames[] = {
"XR1", "XR2", "XR3", "XR4", "XR5", "XR6", "XR7", "XR8",
"XR9", "XR10", "XR11", "XR12", "XR13", "XR14", "XR15", "MXU_CR",
};
+#endif
#define LOG_DISAS(...) \
do { \
@@ -2667,6 +2671,7 @@ static inline void gen_store_srsgpr (int from, int to)
}
}
+#if !defined(TARGET_MIPS64)
/* MXU General purpose registers moves. */
static inline void gen_load_mxu_gpr(TCGv t, unsigned int reg)
{
@@ -2695,6 +2700,7 @@ static inline void gen_store_mxu_cr(TCGv t)
/* TODO: Add handling of RW rules for MXU_CR. */
tcg_gen_mov_tl(mxu_CR, t);
}
+#endif
/* Tests */
@@ -24235,6 +24241,8 @@ static void decode_opc_special(CPUMIPSState *env, DisasContext *ctx)
}
+#if !defined(TARGET_MIPS64)
+
/* MXU accumulate add/subtract 1-bit pattern 'aptn1' */
#define MXU_APTN1_A 0
#define MXU_APTN1_S 1
@@ -24650,6 +24658,172 @@ static void gen_mxu_s32ldd_s32lddr(DisasContext *ctx)
/*
+ * MXU instruction category: logic
+ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ *
+ * S32NOR S32AND S32OR S32XOR
+ */
+
+/*
+ * S32NOR XRa, XRb, XRc
+ * Update XRa with the result of logical bitwise 'nor' operation
+ * applied to the content of XRb and XRc.
+ *
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * +-----------+---------+-----+-------+-------+-------+-----------+
+ * | SPECIAL2 |0 0 0 0 0| opc | XRc | XRb | XRa |MXU__POOL16|
+ * +-----------+---------+-----+-------+-------+-------+-----------+
+ */
+static void gen_mxu_S32NOR(DisasContext *ctx)
+{
+ uint32_t pad, XRc, XRb, XRa;
+
+ pad = extract32(ctx->opcode, 21, 5);
+ XRc = extract32(ctx->opcode, 14, 4);
+ XRb = extract32(ctx->opcode, 10, 4);
+ XRa = extract32(ctx->opcode, 6, 4);
+
+ if (unlikely(pad != 0)) {
+ /* opcode padding incorrect -> do nothing */
+ } else if (unlikely(XRa == 0)) {
+ /* destination is zero register -> do nothing */
+ } else if (unlikely((XRb == 0) && (XRc == 0))) {
+ /* both operands zero registers -> just set destination to all 1s */
+ tcg_gen_movi_i32(mxu_gpr[XRa - 1], 0xFFFFFFFF);
+ } else if (unlikely(XRb == 0)) {
+ /* XRb zero register -> just set destination to the negation of XRc */
+ tcg_gen_not_i32(mxu_gpr[XRa - 1], mxu_gpr[XRc - 1]);
+ } else if (unlikely(XRc == 0)) {
+ /* XRa zero register -> just set destination to the negation of XRb */
+ tcg_gen_not_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]);
+ } else if (unlikely(XRb == XRc)) {
+ /* both operands same -> just set destination to the negation of XRb */
+ tcg_gen_not_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]);
+ } else {
+ /* the most general case */
+ tcg_gen_nor_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1], mxu_gpr[XRc - 1]);
+ }
+}
+
+/*
+ * S32AND XRa, XRb, XRc
+ * Update XRa with the result of logical bitwise 'and' operation
+ * applied to the content of XRb and XRc.
+ *
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * +-----------+---------+-----+-------+-------+-------+-----------+
+ * | SPECIAL2 |0 0 0 0 0| opc | XRc | XRb | XRa |MXU__POOL16|
+ * +-----------+---------+-----+-------+-------+-------+-----------+
+ */
+static void gen_mxu_S32AND(DisasContext *ctx)
+{
+ uint32_t pad, XRc, XRb, XRa;
+
+ pad = extract32(ctx->opcode, 21, 5);
+ XRc = extract32(ctx->opcode, 14, 4);
+ XRb = extract32(ctx->opcode, 10, 4);
+ XRa = extract32(ctx->opcode, 6, 4);
+
+ if (unlikely(pad != 0)) {
+ /* opcode padding incorrect -> do nothing */
+ } else if (unlikely(XRa == 0)) {
+ /* destination is zero register -> do nothing */
+ } else if (unlikely((XRb == 0) || (XRc == 0))) {
+ /* one of operands zero register -> just set destination to all 0s */
+ tcg_gen_movi_i32(mxu_gpr[XRa - 1], 0);
+ } else if (unlikely(XRb == XRc)) {
+ /* both operands same -> just set destination to one of them */
+ tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]);
+ } else {
+ /* the most general case */
+ tcg_gen_and_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1], mxu_gpr[XRc - 1]);
+ }
+}
+
+/*
+ * S32OR XRa, XRb, XRc
+ * Update XRa with the result of logical bitwise 'or' operation
+ * applied to the content of XRb and XRc.
+ *
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * +-----------+---------+-----+-------+-------+-------+-----------+
+ * | SPECIAL2 |0 0 0 0 0| opc | XRc | XRb | XRa |MXU__POOL16|
+ * +-----------+---------+-----+-------+-------+-------+-----------+
+ */
+static void gen_mxu_S32OR(DisasContext *ctx)
+{
+ uint32_t pad, XRc, XRb, XRa;
+
+ pad = extract32(ctx->opcode, 21, 5);
+ XRc = extract32(ctx->opcode, 14, 4);
+ XRb = extract32(ctx->opcode, 10, 4);
+ XRa = extract32(ctx->opcode, 6, 4);
+
+ if (unlikely(pad != 0)) {
+ /* opcode padding incorrect -> do nothing */
+ } else if (unlikely(XRa == 0)) {
+ /* destination is zero register -> do nothing */
+ } else if (unlikely((XRb == 0) && (XRc == 0))) {
+ /* both operands zero registers -> just set destination to all 0s */
+ tcg_gen_movi_i32(mxu_gpr[XRa - 1], 0);
+ } else if (unlikely(XRb == 0)) {
+ /* XRb zero register -> just set destination to the content of XRc */
+ tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRc - 1]);
+ } else if (unlikely(XRc == 0)) {
+ /* XRc zero register -> just set destination to the content of XRb */
+ tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]);
+ } else if (unlikely(XRb == XRc)) {
+ /* both operands same -> just set destination to one of them */
+ tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]);
+ } else {
+ /* the most general case */
+ tcg_gen_or_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1], mxu_gpr[XRc - 1]);
+ }
+}
+
+/*
+ * S32XOR XRa, XRb, XRc
+ * Update XRa with the result of logical bitwise 'xor' operation
+ * applied to the content of XRb and XRc.
+ *
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * +-----------+---------+-----+-------+-------+-------+-----------+
+ * | SPECIAL2 |0 0 0 0 0| opc | XRc | XRb | XRa |MXU__POOL16|
+ * +-----------+---------+-----+-------+-------+-------+-----------+
+ */
+static void gen_mxu_S32XOR(DisasContext *ctx)
+{
+ uint32_t pad, XRc, XRb, XRa;
+
+ pad = extract32(ctx->opcode, 21, 5);
+ XRc = extract32(ctx->opcode, 14, 4);
+ XRb = extract32(ctx->opcode, 10, 4);
+ XRa = extract32(ctx->opcode, 6, 4);
+
+ if (unlikely(pad != 0)) {
+ /* opcode padding incorrect -> do nothing */
+ } else if (unlikely(XRa == 0)) {
+ /* destination is zero register -> do nothing */
+ } else if (unlikely((XRb == 0) && (XRc == 0))) {
+ /* both operands zero registers -> just set destination to all 0s */
+ tcg_gen_movi_i32(mxu_gpr[XRa - 1], 0);
+ } else if (unlikely(XRb == 0)) {
+ /* XRb zero register -> just set destination to the content of XRc */
+ tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRc - 1]);
+ } else if (unlikely(XRc == 0)) {
+ /* XRc zero register -> just set destination to the content of XRb */
+ tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]);
+ } else if (unlikely(XRb == XRc)) {
+ /* both operands same -> just set destination to all 0s */
+ tcg_gen_movi_i32(mxu_gpr[XRa - 1], 0);
+ } else {
+ /* the most general case */
+ tcg_gen_xor_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1], mxu_gpr[XRc - 1]);
+ }
+}
+
+
+/*
* Decoding engine for MXU
* =======================
*/
@@ -25300,18 +25474,18 @@ static void decode_opc_mxu__pool15(CPUMIPSState *env, DisasContext *ctx)
* | SPECIAL2 | s3 |0 0|x x x| XRc | XRb | XRa |MXU__POOL16|
* +-----------+-----+---+-----+-------+-------+-------+-----------+
*
- * S32NOR, S32AND, S32OR, S32XOR:
- * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
- * +-----------+---------+-----+-------+-------+-------+-----------+
- * | SPECIAL2 |0 0 0 0 0|x x x| XRc | XRb | XRa |MXU__POOL16|
- * +-----------+---------+-----+-------+-------+-------+-----------+
- *
* S32LUI:
* 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
* +-----------+-----+---+-----+-------+---------------+-----------+
* | SPECIAL2 |optn3|0 0|x x x| XRc | s8 |MXU__POOL16|
* +-----------+-----+---+-----+-------+---------------+-----------+
*
+ * S32NOR, S32AND, S32OR, S32XOR:
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * +-----------+---------+-----+-------+-------+-------+-----------+
+ * | SPECIAL2 |0 0 0 0 0|x x x| XRc | XRb | XRa |MXU__POOL16|
+ * +-----------+---------+-----+-------+-------+-------+-----------+
+ *
*/
static void decode_opc_mxu__pool16(CPUMIPSState *env, DisasContext *ctx)
{
@@ -25333,30 +25507,22 @@ static void decode_opc_mxu__pool16(CPUMIPSState *env, DisasContext *ctx)
MIPS_INVAL("OPC_MXU_S32ALNI");
generate_exception_end(ctx, EXCP_RI);
break;
- case OPC_MXU_S32NOR:
- /* TODO: Implement emulation of S32NOR instruction. */
- MIPS_INVAL("OPC_MXU_S32NOR");
+ case OPC_MXU_S32LUI:
+ /* TODO: Implement emulation of S32LUI instruction. */
+ MIPS_INVAL("OPC_MXU_S32LUI");
generate_exception_end(ctx, EXCP_RI);
break;
+ case OPC_MXU_S32NOR:
+ gen_mxu_S32NOR(ctx);
+ break;
case OPC_MXU_S32AND:
- /* TODO: Implement emulation of S32AND instruction. */
- MIPS_INVAL("OPC_MXU_S32AND");
- generate_exception_end(ctx, EXCP_RI);
+ gen_mxu_S32AND(ctx);
break;
case OPC_MXU_S32OR:
- /* TODO: Implement emulation of S32OR instruction. */
- MIPS_INVAL("OPC_MXU_S32OR");
- generate_exception_end(ctx, EXCP_RI);
+ gen_mxu_S32OR(ctx);
break;
case OPC_MXU_S32XOR:
- /* TODO: Implement emulation of S32XOR instruction. */
- MIPS_INVAL("OPC_MXU_S32XOR");
- generate_exception_end(ctx, EXCP_RI);
- break;
- case OPC_MXU_S32LUI:
- /* TODO: Implement emulation of S32LUI instruction. */
- MIPS_INVAL("OPC_MXU_S32LUI");
- generate_exception_end(ctx, EXCP_RI);
+ gen_mxu_S32XOR(ctx);
break;
default:
MIPS_INVAL("decode_opc_mxu");
@@ -25854,6 +26020,8 @@ static void decode_opc_mxu(CPUMIPSState *env, DisasContext *ctx)
}
}
+#endif /* !defined(TARGET_MIPS64) */
+
static void decode_opc_special2_legacy(CPUMIPSState *env, DisasContext *ctx)
{
@@ -28098,8 +28266,10 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx)
case OPC_SPECIAL2:
if ((ctx->insn_flags & INSN_R5900) && (ctx->insn_flags & ASE_MMI)) {
decode_mmi(env, ctx);
+#if !defined(TARGET_MIPS64)
} else if (ctx->insn_flags & ASE_MXU) {
decode_opc_mxu(env, ctx);
+#endif
} else {
decode_opc_special2_legacy(env, ctx);
}
@@ -29108,7 +29278,7 @@ void mips_tcg_init(void)
fpu_fcr31 = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUMIPSState, active_fpu.fcr31),
"fcr31");
-
+#if !defined(TARGET_MIPS64)
for (i = 0; i < NUMBER_OF_MXU_REGISTERS - 1; i++) {
mxu_gpr[i] = tcg_global_mem_new(cpu_env,
offsetof(CPUMIPSState,
@@ -29119,6 +29289,7 @@ void mips_tcg_init(void)
mxu_CR = tcg_global_mem_new(cpu_env,
offsetof(CPUMIPSState, active_tc.mxu_cr),
mxuregnames[NUMBER_OF_MXU_REGISTERS - 1]);
+#endif
}
#include "translate_init.inc.c"
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 10/44] target/mips: MXU: Add handlers for max/min instructions
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (8 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 09/44] target/mips: MXU: Add handlers for logic instructions Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 11/44] target/mips: MXU: Add handler for an align instruction Aleksandar Markovic
` (34 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Add translation handlers for six max/min MXU instructions.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
target/mips/translate.c | 298 ++++++++++++++++++++++++++++++++++++++++++++----
1 file changed, 277 insertions(+), 21 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index a339f72..3b94521 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -24824,6 +24824,280 @@ static void gen_mxu_S32XOR(DisasContext *ctx)
/*
+ * MXU instruction category max/min
+ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ *
+ * S32MAX D16MAX Q8MAX
+ * S32MIN D16MIN Q8MIN
+ */
+
+/*
+ * S32MAX XRa, XRb, XRc
+ * Update XRa with the maximum of signed 32-bit integers contained
+ * in XRb and XRc.
+ *
+ * S32MIN XRa, XRb, XRc
+ * Update XRa with the minimum of signed 32-bit integers contained
+ * in XRb and XRc.
+ *
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * +-----------+---------+-----+-------+-------+-------+-----------+
+ * | SPECIAL2 |0 0 0 0 0| opc | XRc | XRb | XRa |MXU__POOL00|
+ * +-----------+---------+-----+-------+-------+-------+-----------+
+ */
+static void gen_mxu_S32MAX_S32MIN(DisasContext *ctx)
+{
+ uint32_t pad, opc, XRc, XRb, XRa;
+
+ pad = extract32(ctx->opcode, 21, 5);
+ opc = extract32(ctx->opcode, 18, 3);
+ XRc = extract32(ctx->opcode, 14, 4);
+ XRb = extract32(ctx->opcode, 10, 4);
+ XRa = extract32(ctx->opcode, 6, 4);
+
+ if (unlikely(pad != 0)) {
+ /* opcode padding incorrect -> do nothing */
+ } else if (unlikely(XRa == 0)) {
+ /* destination is zero register -> do nothing */
+ } else if (unlikely((XRb == 0) && (XRc == 0))) {
+ /* both operands zero registers -> just set destination to zero */
+ tcg_gen_movi_i32(mxu_gpr[XRa - 1], 0);
+ } else if (unlikely((XRb == 0) || (XRc == 0))) {
+ /* exactly one operand is zero register - find which one is not...*/
+ uint32_t XRx = XRb ? XRb : XRc;
+ /* ...and do max/min operation with one operand 0 */
+ if (opc == OPC_MXU_S32MAX) {
+ tcg_gen_smax_i32(mxu_gpr[XRa - 1], mxu_gpr[XRx - 1], 0);
+ } else {
+ tcg_gen_smin_i32(mxu_gpr[XRa - 1], mxu_gpr[XRx - 1], 0);
+ }
+ } else if (unlikely(XRb == XRc)) {
+ /* both operands same -> just set destination to one of them */
+ tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]);
+ } else {
+ /* the most general case */
+ if (opc == OPC_MXU_S32MAX) {
+ tcg_gen_smax_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1],
+ mxu_gpr[XRc - 1]);
+ } else {
+ tcg_gen_smin_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1],
+ mxu_gpr[XRc - 1]);
+ }
+ }
+}
+
+/*
+ * D16MAX
+ * Update XRa with the 16-bit-wise maximums of signed integers
+ * contained in XRb and XRc.
+ *
+ * D16MIN
+ * Update XRa with the 16-bit-wise minimums of signed integers
+ * contained in XRb and XRc.
+ *
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * +-----------+---------+-----+-------+-------+-------+-----------+
+ * | SPECIAL2 |0 0 0 0 0| opc | XRc | XRb | XRa |MXU__POOL00|
+ * +-----------+---------+-----+-------+-------+-------+-----------+
+ */
+static void gen_mxu_D16MAX_D16MIN(DisasContext *ctx)
+{
+ uint32_t pad, opc, XRc, XRb, XRa;
+
+ pad = extract32(ctx->opcode, 21, 5);
+ opc = extract32(ctx->opcode, 18, 3);
+ XRc = extract32(ctx->opcode, 14, 4);
+ XRb = extract32(ctx->opcode, 10, 4);
+ XRa = extract32(ctx->opcode, 6, 4);
+
+ if (unlikely(pad != 0)) {
+ /* opcode padding incorrect -> do nothing */
+ } else if (unlikely(XRc == 0)) {
+ /* destination is zero register -> do nothing */
+ } else if (unlikely((XRb == 0) && (XRa == 0))) {
+ /* both operands zero registers -> just set destination to zero */
+ tcg_gen_movi_i32(mxu_gpr[XRc - 1], 0);
+ } else if (unlikely((XRb == 0) || (XRa == 0))) {
+ /* exactly one operand is zero register - find which one is not...*/
+ uint32_t XRx = XRb ? XRb : XRc;
+ /* ...and do half-word-wise max/min with one operand 0 */
+ TCGv_i32 t0 = tcg_temp_new();
+ TCGv_i32 t1 = tcg_const_i32(0);
+
+ /* the left half-word first */
+ tcg_gen_andi_i32(t0, mxu_gpr[XRx - 1], 0xFFFF0000);
+ if (opc == OPC_MXU_D16MAX) {
+ tcg_gen_smax_i32(mxu_gpr[XRa - 1], t0, t1);
+ } else {
+ tcg_gen_smin_i32(mxu_gpr[XRa - 1], t0, t1);
+ }
+
+ /* the right half-word */
+ tcg_gen_andi_i32(t0, mxu_gpr[XRx - 1], 0x0000FFFF);
+ /* move half-words to the leftmost position */
+ tcg_gen_shli_i32(t0, t0, 16);
+ /* t0 will be max/min of t0 and t1 */
+ if (opc == OPC_MXU_D16MAX) {
+ tcg_gen_smax_i32(t0, t0, t1);
+ } else {
+ tcg_gen_smin_i32(t0, t0, t1);
+ }
+ /* return resulting half-words to its original position */
+ tcg_gen_shri_i32(t0, t0, 16);
+ /* finaly update the destination */
+ tcg_gen_or_i32(mxu_gpr[XRa - 1], mxu_gpr[XRa - 1], t0);
+
+ tcg_temp_free(t1);
+ tcg_temp_free(t0);
+ } else if (unlikely(XRb == XRc)) {
+ /* both operands same -> just set destination to one of them */
+ tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]);
+ } else {
+ /* the most general case */
+ TCGv_i32 t0 = tcg_temp_new();
+ TCGv_i32 t1 = tcg_temp_new();
+
+ /* the left half-word first */
+ tcg_gen_andi_i32(t0, mxu_gpr[XRb - 1], 0xFFFF0000);
+ tcg_gen_andi_i32(t1, mxu_gpr[XRc - 1], 0xFFFF0000);
+ if (opc == OPC_MXU_D16MAX) {
+ tcg_gen_smax_i32(mxu_gpr[XRa - 1], t0, t1);
+ } else {
+ tcg_gen_smin_i32(mxu_gpr[XRa - 1], t0, t1);
+ }
+
+ /* the right half-word */
+ tcg_gen_andi_i32(t0, mxu_gpr[XRb - 1], 0x0000FFFF);
+ tcg_gen_andi_i32(t1, mxu_gpr[XRc - 1], 0x0000FFFF);
+ /* move half-words to the leftmost position */
+ tcg_gen_shli_i32(t0, t0, 16);
+ tcg_gen_shli_i32(t1, t1, 16);
+ /* t0 will be max/min of t0 and t1 */
+ if (opc == OPC_MXU_D16MAX) {
+ tcg_gen_smax_i32(t0, t0, t1);
+ } else {
+ tcg_gen_smin_i32(t0, t0, t1);
+ }
+ /* return resulting half-words to its original position */
+ tcg_gen_shri_i32(t0, t0, 16);
+ /* finaly update the destination */
+ tcg_gen_or_i32(mxu_gpr[XRa - 1], mxu_gpr[XRa - 1], t0);
+
+ tcg_temp_free(t1);
+ tcg_temp_free(t0);
+ }
+}
+
+/*
+ * Q8MAX
+ * Update XRa with the 8-bit-wise maximums of signed integers
+ * contained in XRb and XRc.
+ *
+ * Q8MIN
+ * Update XRa with the 8-bit-wise minimums of signed integers
+ * contained in XRb and XRc.
+ *
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * +-----------+---------+-----+-------+-------+-------+-----------+
+ * | SPECIAL2 |0 0 0 0 0| opc | XRc | XRb | XRa |MXU__POOL00|
+ * +-----------+---------+-----+-------+-------+-------+-----------+
+ */
+static void gen_mxu_Q8MAX_Q8MIN(DisasContext *ctx)
+{
+ uint32_t pad, opc, XRc, XRb, XRa;
+
+ pad = extract32(ctx->opcode, 21, 5);
+ opc = extract32(ctx->opcode, 18, 3);
+ XRc = extract32(ctx->opcode, 14, 4);
+ XRb = extract32(ctx->opcode, 10, 4);
+ XRa = extract32(ctx->opcode, 6, 4);
+
+ if (unlikely(pad != 0)) {
+ /* opcode padding incorrect -> do nothing */
+ } else if (unlikely(XRa == 0)) {
+ /* destination is zero register -> do nothing */
+ } else if (unlikely((XRb == 0) && (XRc == 0))) {
+ /* both operands zero registers -> just set destination to zero */
+ tcg_gen_movi_i32(mxu_gpr[XRa - 1], 0);
+ } else if (unlikely((XRb == 0) || (XRc == 0))) {
+ /* exactly one operand is zero register - make it be the first...*/
+ uint32_t XRx = XRb ? XRb : XRc;
+ /* ...and do byte-wise max/min with one operand 0 */
+ TCGv_i32 t0 = tcg_temp_new();
+ TCGv_i32 t1 = tcg_const_i32(0);
+
+ /* the leftmost byte (byte 3) first */
+ tcg_gen_andi_i32(t0, mxu_gpr[XRx - 1], 0xFF000000);
+ if (opc == OPC_MXU_Q8MAX) {
+ tcg_gen_smax_i32(mxu_gpr[XRa - 1], t0, t1);
+ } else {
+ tcg_gen_smin_i32(mxu_gpr[XRa - 1], t0, t1);
+ }
+
+ /* bytes 2, 1, 0 */
+ for (int i = 2; i >= 0; i--) {
+ /* extract the byte */
+ tcg_gen_andi_i32(t0, mxu_gpr[XRx - 1], 0xFF << (8 * i));
+ /* move the byte to the leftmost position */
+ tcg_gen_shli_i32(t0, t0, 8 * (3 - i));
+ /* t0 will be max/min of t0 and t1 */
+ if (opc == OPC_MXU_Q8MAX) {
+ tcg_gen_smax_i32(t0, t0, t1);
+ } else {
+ tcg_gen_smin_i32(t0, t0, t1);
+ }
+ /* return resulting byte to its original position */
+ tcg_gen_shri_i32(t0, t0, 8 * (3 - i));
+ /* finaly update the destination */
+ tcg_gen_or_i32(mxu_gpr[XRa - 1], mxu_gpr[XRa - 1], t0);
+ }
+
+ tcg_temp_free(t1);
+ tcg_temp_free(t0);
+ } else if (unlikely(XRb == XRc)) {
+ /* both operands same -> just set destination to one of them */
+ tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]);
+ } else {
+ /* the most general case */
+ TCGv_i32 t0 = tcg_temp_new();
+ TCGv_i32 t1 = tcg_temp_new();
+
+ /* the leftmost bytes (bytes 3) first */
+ tcg_gen_andi_i32(t0, mxu_gpr[XRb - 1], 0xFF000000);
+ tcg_gen_andi_i32(t1, mxu_gpr[XRc - 1], 0xFF000000);
+ if (opc == OPC_MXU_Q8MAX) {
+ tcg_gen_smax_i32(mxu_gpr[XRa - 1], t0, t1);
+ } else {
+ tcg_gen_smin_i32(mxu_gpr[XRa - 1], t0, t1);
+ }
+
+ /* bytes 2, 1, 0 */
+ for (int i = 2; i >= 0; i--) {
+ /* extract corresponding bytes */
+ tcg_gen_andi_i32(t0, mxu_gpr[XRb - 1], 0xFF << (8 * i));
+ tcg_gen_andi_i32(t1, mxu_gpr[XRc - 1], 0xFF << (8 * i));
+ /* move the bytes to the leftmost position */
+ tcg_gen_shli_i32(t0, t0, 8 * (3 - i));
+ tcg_gen_shli_i32(t1, t1, 8 * (3 - i));
+ /* t0 will be max/min of t0 and t1 */
+ if (opc == OPC_MXU_Q8MAX) {
+ tcg_gen_smax_i32(t0, t0, t1);
+ } else {
+ tcg_gen_smin_i32(t0, t0, t1);
+ }
+ /* return resulting byte to its original position */
+ tcg_gen_shri_i32(t0, t0, 8 * (3 - i));
+ /* finaly update the destination */
+ tcg_gen_or_i32(mxu_gpr[XRa - 1], mxu_gpr[XRa - 1], t0);
+ }
+
+ tcg_temp_free(t1);
+ tcg_temp_free(t0);
+ }
+}
+
+
+/*
* Decoding engine for MXU
* =======================
*/
@@ -24844,34 +25118,16 @@ static void decode_opc_mxu__pool00(CPUMIPSState *env, DisasContext *ctx)
switch (opcode) {
case OPC_MXU_S32MAX:
- /* TODO: Implement emulation of S32MAX instruction. */
- MIPS_INVAL("OPC_MXU_S32MAX");
- generate_exception_end(ctx, EXCP_RI);
- break;
case OPC_MXU_S32MIN:
- /* TODO: Implement emulation of S32MIN instruction. */
- MIPS_INVAL("OPC_MXU_S32MIN");
- generate_exception_end(ctx, EXCP_RI);
+ gen_mxu_S32MAX_S32MIN(ctx);
break;
case OPC_MXU_D16MAX:
- /* TODO: Implement emulation of D16MAX instruction. */
- MIPS_INVAL("OPC_MXU_D16MAX");
- generate_exception_end(ctx, EXCP_RI);
- break;
case OPC_MXU_D16MIN:
- /* TODO: Implement emulation of D16MIN instruction. */
- MIPS_INVAL("OPC_MXU_D16MIN");
- generate_exception_end(ctx, EXCP_RI);
+ gen_mxu_D16MAX_D16MIN(ctx);
break;
case OPC_MXU_Q8MAX:
- /* TODO: Implement emulation of Q8MAX instruction. */
- MIPS_INVAL("OPC_MXU_Q8MAX");
- generate_exception_end(ctx, EXCP_RI);
- break;
case OPC_MXU_Q8MIN:
- /* TODO: Implement emulation of Q8MIN instruction. */
- MIPS_INVAL("OPC_MXU_Q8MIN");
- generate_exception_end(ctx, EXCP_RI);
+ gen_mxu_Q8MAX_Q8MIN(ctx);
break;
case OPC_MXU_Q8SLT:
/* TODO: Implement emulation of Q8SLT instruction. */
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 11/44] target/mips: MXU: Add handler for an align instruction
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (9 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 10/44] target/mips: MXU: Add handlers for max/min instructions Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 12/44] target/mips: Support R5900 three-operand MADD and MADDU instructions Aleksandar Markovic
` (33 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Add translation handler for S32ALNI MXU instruction.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
target/mips/translate.c | 197 +++++++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 194 insertions(+), 3 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 3b94521..4dcab34 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -25098,6 +25098,199 @@ static void gen_mxu_Q8MAX_Q8MIN(DisasContext *ctx)
/*
+ * MXU instruction category: align
+ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ *
+ * S32ALN S32ALNI
+ */
+
+/*
+ * S32ALNI XRc, XRb, XRa, optn3
+ * Arrange bytes from XRb and XRc according to one of five sets of
+ * rules determined by optn3, and place the result in XRa.
+ *
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * +-----------+-----+---+-----+-------+-------+-------+-----------+
+ * | SPECIAL2 |optn3|0 0|x x x| XRc | XRb | XRa |MXU__POOL16|
+ * +-----------+-----+---+-----+-------+-------+-------+-----------+
+ *
+ */
+static void gen_mxu_S32ALNI(DisasContext *ctx)
+{
+ uint32_t optn3, pad, XRc, XRb, XRa;
+
+ optn3 = extract32(ctx->opcode, 23, 3);
+ pad = extract32(ctx->opcode, 21, 2);
+ XRc = extract32(ctx->opcode, 14, 4);
+ XRb = extract32(ctx->opcode, 10, 4);
+ XRa = extract32(ctx->opcode, 6, 4);
+
+ if (unlikely(pad != 0)) {
+ /* opcode padding incorrect -> do nothing */
+ } else if (unlikely(XRa == 0)) {
+ /* destination is zero register -> do nothing */
+ } else if (unlikely((XRb == 0) && (XRc == 0))) {
+ /* both operands zero registers -> just set destination to all 0s */
+ tcg_gen_movi_i32(mxu_gpr[XRa - 1], 0);
+ } else if (unlikely(XRb == 0)) {
+ /* XRb zero register -> just appropriatelly shift XRc into XRa */
+ switch (optn3) {
+ case MXU_OPTN3_PTN0:
+ tcg_gen_movi_i32(mxu_gpr[XRa - 1], 0);
+ break;
+ case MXU_OPTN3_PTN1:
+ case MXU_OPTN3_PTN2:
+ case MXU_OPTN3_PTN3:
+ tcg_gen_shri_i32(mxu_gpr[XRa - 1], mxu_gpr[XRc - 1],
+ 8 * (4 - optn3));
+ break;
+ case MXU_OPTN3_PTN4:
+ tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRc - 1]);
+ break;
+ }
+ } else if (unlikely(XRc == 0)) {
+ /* XRc zero register -> just appropriatelly shift XRb into XRa */
+ switch (optn3) {
+ case MXU_OPTN3_PTN0:
+ tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]);
+ break;
+ case MXU_OPTN3_PTN1:
+ case MXU_OPTN3_PTN2:
+ case MXU_OPTN3_PTN3:
+ tcg_gen_shri_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1], 8 * optn3);
+ break;
+ case MXU_OPTN3_PTN4:
+ tcg_gen_movi_i32(mxu_gpr[XRa - 1], 0);
+ break;
+ }
+ } else if (unlikely(XRb == XRc)) {
+ /* both operands same -> just rotation or moving from any of them */
+ switch (optn3) {
+ case MXU_OPTN3_PTN0:
+ case MXU_OPTN3_PTN4:
+ tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]);
+ break;
+ case MXU_OPTN3_PTN1:
+ case MXU_OPTN3_PTN2:
+ case MXU_OPTN3_PTN3:
+ tcg_gen_rotli_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1], 8 * optn3);
+ break;
+ }
+ } else {
+ /* the most general case */
+ switch (optn3) {
+ case MXU_OPTN3_PTN0:
+ {
+ /* */
+ /* XRb XRc */
+ /* +---------------+ */
+ /* | A B C D | E F G H */
+ /* +-------+-------+ */
+ /* | */
+ /* XRa */
+ /* */
+
+ tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]);
+ }
+ break;
+ case MXU_OPTN3_PTN1:
+ {
+ /* */
+ /* XRb XRc */
+ /* +-------------------+ */
+ /* A | B C D E | F G H */
+ /* +---------+---------+ */
+ /* | */
+ /* XRa */
+ /* */
+
+ TCGv_i32 t0 = tcg_temp_new();
+ TCGv_i32 t1 = tcg_temp_new();
+
+ tcg_gen_andi_i32(t0, mxu_gpr[XRb - 1], 0x00FFFFFF);
+ tcg_gen_shli_i32(t0, t0, 8);
+
+ tcg_gen_andi_i32(t1, mxu_gpr[XRc - 1], 0xFF000000);
+ tcg_gen_shri_i32(t1, t1, 24);
+
+ tcg_gen_or_i32(mxu_gpr[XRa - 1], t0, t1);
+
+ tcg_temp_free(t1);
+ tcg_temp_free(t0);
+ }
+ break;
+ case MXU_OPTN3_PTN2:
+ {
+ /* */
+ /* XRb XRc */
+ /* +-------------------+ */
+ /* A B | C D E F | G H */
+ /* +---------+---------+ */
+ /* | */
+ /* XRa */
+ /* */
+
+ TCGv_i32 t0 = tcg_temp_new();
+ TCGv_i32 t1 = tcg_temp_new();
+
+ tcg_gen_andi_i32(t0, mxu_gpr[XRb - 1], 0x0000FFFF);
+ tcg_gen_shli_i32(t0, t0, 16);
+
+ tcg_gen_andi_i32(t1, mxu_gpr[XRc - 1], 0xFFFF0000);
+ tcg_gen_shri_i32(t1, t1, 16);
+
+ tcg_gen_or_i32(mxu_gpr[XRa - 1], t0, t1);
+
+ tcg_temp_free(t1);
+ tcg_temp_free(t0);
+ }
+ break;
+ case MXU_OPTN3_PTN3:
+ {
+ /* */
+ /* XRb XRc */
+ /* +-------------------+ */
+ /* A B C | D E F G | H */
+ /* +---------+---------+ */
+ /* | */
+ /* XRa */
+ /* */
+
+ TCGv_i32 t0 = tcg_temp_new();
+ TCGv_i32 t1 = tcg_temp_new();
+
+ tcg_gen_andi_i32(t0, mxu_gpr[XRb - 1], 0x000000FF);
+ tcg_gen_shli_i32(t0, t0, 24);
+
+ tcg_gen_andi_i32(t1, mxu_gpr[XRc - 1], 0xFFFFFF00);
+ tcg_gen_shri_i32(t1, t1, 8);
+
+ tcg_gen_or_i32(mxu_gpr[XRa - 1], t0, t1);
+
+ tcg_temp_free(t1);
+ tcg_temp_free(t0);
+ }
+ break;
+ case MXU_OPTN3_PTN4:
+ {
+ /* */
+ /* XRb XRc */
+ /* +---------------+ */
+ /* A B C D | E F G H | */
+ /* +-------+-------+ */
+ /* | */
+ /* XRa */
+ /* */
+
+ tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRc - 1]);
+ }
+ break;
+ }
+ }
+}
+
+
+/*
* Decoding engine for MXU
* =======================
*/
@@ -25759,9 +25952,7 @@ static void decode_opc_mxu__pool16(CPUMIPSState *env, DisasContext *ctx)
generate_exception_end(ctx, EXCP_RI);
break;
case OPC_MXU_S32ALNI:
- /* TODO: Implement emulation of S32ALNI instruction. */
- MIPS_INVAL("OPC_MXU_S32ALNI");
- generate_exception_end(ctx, EXCP_RI);
+ gen_mxu_S32ALNI(ctx);
break;
case OPC_MXU_S32LUI:
/* TODO: Implement emulation of S32LUI instruction. */
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 12/44] target/mips: Support R5900 three-operand MADD and MADDU instructions
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (10 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 11/44] target/mips: MXU: Add handler for an align instruction Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 13/44] target/mips: Support R5900 three-operand MADD1 and MADDU1 instructions Aleksandar Markovic
` (32 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
The three-operand MADD and MADDU are specific to Sony R5900 core,
and Toshiba TX19/TX39/TX79 cores as well.
The "32-Bit TX System RISC TX39 Family Architecture manual"
is available at https://wiki.qemu.org/File:DSAE0022432.pdf
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org>
Signed-off-by: Fredrik Noring <noring@nocrew.org>
Tested-by: Fredrik Noring <noring@nocrew.org>
---
target/mips/translate.c | 58 ++++++++++++++++++++++++++++++++++++++++++++-----
1 file changed, 53 insertions(+), 5 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 4dcab34..6c2d6fd 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -5033,8 +5033,8 @@ static void gen_muldiv(DisasContext *ctx, uint32_t opc,
}
/*
- * These MULT and MULTU instructions implemented in for example the
- * Toshiba/Sony R5900 and the Toshiba TX19, TX39 and TX79 core
+ * These MULT[U] and MADD[U] instructions implemented in for example
+ * the Toshiba/Sony R5900 and the Toshiba TX19, TX39 and TX79 core
* architectures are special three-operand variants with the syntax
*
* MULT[U][1] rd, rs, rt
@@ -5043,6 +5043,14 @@ static void gen_muldiv(DisasContext *ctx, uint32_t opc,
*
* (rd, LO, HI) <- rs * rt
*
+ * and
+ *
+ * MADD[U] rd, rs, rt
+ *
+ * such that
+ *
+ * (rd, LO, HI) <- (LO, HI) + rs * rt
+ *
* where the low-order 32-bits of the result is placed into both the
* GPR rd and the special register LO. The high-order 32-bits of the
* result is placed into the special register HI.
@@ -5099,8 +5107,48 @@ static void gen_mul_txx9(DisasContext *ctx, uint32_t opc,
tcg_temp_free_i32(t3);
}
break;
+ case MMI_OPC_MADD:
+ {
+ TCGv_i64 t2 = tcg_temp_new_i64();
+ TCGv_i64 t3 = tcg_temp_new_i64();
+
+ tcg_gen_ext_tl_i64(t2, t0);
+ tcg_gen_ext_tl_i64(t3, t1);
+ tcg_gen_mul_i64(t2, t2, t3);
+ tcg_gen_concat_tl_i64(t3, cpu_LO[acc], cpu_HI[acc]);
+ tcg_gen_add_i64(t2, t2, t3);
+ tcg_temp_free_i64(t3);
+ gen_move_low32(cpu_LO[acc], t2);
+ gen_move_high32(cpu_HI[acc], t2);
+ if (rd) {
+ gen_move_low32(cpu_gpr[rd], t2);
+ }
+ tcg_temp_free_i64(t2);
+ }
+ break;
+ case MMI_OPC_MADDU:
+ {
+ TCGv_i64 t2 = tcg_temp_new_i64();
+ TCGv_i64 t3 = tcg_temp_new_i64();
+
+ tcg_gen_ext32u_tl(t0, t0);
+ tcg_gen_ext32u_tl(t1, t1);
+ tcg_gen_extu_tl_i64(t2, t0);
+ tcg_gen_extu_tl_i64(t3, t1);
+ tcg_gen_mul_i64(t2, t2, t3);
+ tcg_gen_concat_tl_i64(t3, cpu_LO[acc], cpu_HI[acc]);
+ tcg_gen_add_i64(t2, t2, t3);
+ tcg_temp_free_i64(t3);
+ gen_move_low32(cpu_LO[acc], t2);
+ gen_move_high32(cpu_HI[acc], t2);
+ if (rd) {
+ gen_move_low32(cpu_gpr[rd], t2);
+ }
+ tcg_temp_free_i64(t2);
+ }
+ break;
default:
- MIPS_INVAL("mul TXx9");
+ MIPS_INVAL("mul/madd TXx9");
generate_exception_end(ctx, EXCP_RI);
goto out;
}
@@ -27318,6 +27366,8 @@ static void decode_mmi(CPUMIPSState *env, DisasContext *ctx)
break;
case MMI_OPC_MULT1:
case MMI_OPC_MULTU1:
+ case MMI_OPC_MADD:
+ case MMI_OPC_MADDU:
gen_mul_txx9(ctx, opc, rd, rs, rt);
break;
case MMI_OPC_DIV1:
@@ -27332,8 +27382,6 @@ static void decode_mmi(CPUMIPSState *env, DisasContext *ctx)
case MMI_OPC_MFHI1:
gen_HILO1_tx79(ctx, opc, rd);
break;
- case MMI_OPC_MADD: /* TODO: MMI_OPC_MADD */
- case MMI_OPC_MADDU: /* TODO: MMI_OPC_MADDU */
case MMI_OPC_PLZCW: /* TODO: MMI_OPC_PLZCW */
case MMI_OPC_MADD1: /* TODO: MMI_OPC_MADD1 */
case MMI_OPC_MADDU1: /* TODO: MMI_OPC_MADDU1 */
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 13/44] target/mips: Support R5900 three-operand MADD1 and MADDU1 instructions
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (11 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 12/44] target/mips: Support R5900 three-operand MADD and MADDU instructions Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 14/44] disas: nanoMIPS: Fix types and format strings Aleksandar Markovic
` (31 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Fredrik Noring <noring@nocrew.org>
The three-operand MADD and MADDU are specific to R5900 cores.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Fredrik Noring <noring@nocrew.org>
---
target/mips/translate.c | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 6c2d6fd..c4fed8d 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -5045,7 +5045,7 @@ static void gen_muldiv(DisasContext *ctx, uint32_t opc,
*
* and
*
- * MADD[U] rd, rs, rt
+ * MADD[U][1] rd, rs, rt
*
* such that
*
@@ -5107,6 +5107,9 @@ static void gen_mul_txx9(DisasContext *ctx, uint32_t opc,
tcg_temp_free_i32(t3);
}
break;
+ case MMI_OPC_MADD1:
+ acc = 1;
+ /* Fall through */
case MMI_OPC_MADD:
{
TCGv_i64 t2 = tcg_temp_new_i64();
@@ -5126,6 +5129,9 @@ static void gen_mul_txx9(DisasContext *ctx, uint32_t opc,
tcg_temp_free_i64(t2);
}
break;
+ case MMI_OPC_MADDU1:
+ acc = 1;
+ /* Fall through */
case MMI_OPC_MADDU:
{
TCGv_i64 t2 = tcg_temp_new_i64();
@@ -27368,6 +27374,8 @@ static void decode_mmi(CPUMIPSState *env, DisasContext *ctx)
case MMI_OPC_MULTU1:
case MMI_OPC_MADD:
case MMI_OPC_MADDU:
+ case MMI_OPC_MADD1:
+ case MMI_OPC_MADDU1:
gen_mul_txx9(ctx, opc, rd, rs, rt);
break;
case MMI_OPC_DIV1:
@@ -27383,8 +27391,6 @@ static void decode_mmi(CPUMIPSState *env, DisasContext *ctx)
gen_HILO1_tx79(ctx, opc, rd);
break;
case MMI_OPC_PLZCW: /* TODO: MMI_OPC_PLZCW */
- case MMI_OPC_MADD1: /* TODO: MMI_OPC_MADD1 */
- case MMI_OPC_MADDU1: /* TODO: MMI_OPC_MADDU1 */
case MMI_OPC_PMFHL: /* TODO: MMI_OPC_PMFHL */
case MMI_OPC_PMTHL: /* TODO: MMI_OPC_PMTHL */
case MMI_OPC_PSLLH: /* TODO: MMI_OPC_PSLLH */
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 14/44] disas: nanoMIPS: Fix types and format strings
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (12 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 13/44] target/mips: Support R5900 three-operand MADD1 and MADDU1 instructions Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 15/44] disas: nanoMIPS: Fix preamble text in nanomips.* files Aleksandar Markovic
` (30 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Stefan Weil <sw@weilnetz.de>
Use POSIX types and format strings.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Weil <sw@weilnetz.de>
---
disas/nanomips.cpp | 20 ++++++++++++--------
disas/nanomips.h | 10 +++++-----
2 files changed, 17 insertions(+), 13 deletions(-)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index 1238c2f..28d78d6 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -258,7 +258,7 @@ namespace img
std::string to_string(img::address a)
{
char buffer[256];
- sprintf(buffer, "0x%08llx", a);
+ sprintf(buffer, "0x%" PRIx64, a);
return buffer;
}
@@ -284,7 +284,8 @@ uint64 NMD::renumber_registers(uint64 index, uint64 *register_list,
}
throw std::runtime_error(img::format(
- "Invalid register mapping index %d, size of list = %d",
+ "Invalid register mapping index %" PRIu64
+ ", size of list = %zu",
index, register_list_size));
}
@@ -501,7 +502,8 @@ std::string NMD::GPR(uint64 reg)
return gpr_reg[reg];
}
- throw std::runtime_error(img::format("Invalid GPR register index %d", reg));
+ throw std::runtime_error(img::format("Invalid GPR register index %" PRIu64,
+ reg));
}
@@ -518,7 +520,8 @@ std::string NMD::FPR(uint64 reg)
return fpr_reg[reg];
}
- throw std::runtime_error(img::format("Invalid FPR register index %d", reg));
+ throw std::runtime_error(img::format("Invalid FPR register index %" PRIu64,
+ reg));
}
@@ -532,26 +535,27 @@ std::string NMD::AC(uint64 reg)
return ac_reg[reg];
}
- throw std::runtime_error(img::format("Invalid AC register index %d", reg));
+ throw std::runtime_error(img::format("Invalid AC register index %" PRIu64,
+ reg));
}
std::string NMD::IMMEDIATE(uint64 value)
{
- return img::format("0x%x", value);
+ return img::format("0x%" PRIx64, value);
}
std::string NMD::IMMEDIATE(int64 value)
{
- return img::format("%d", value);
+ return img::format("%" PRId64, value);
}
std::string NMD::CPR(uint64 reg)
{
/* needs more work */
- return img::format("CP%d", reg);
+ return img::format("CP%" PRIu64, reg);
}
diff --git a/disas/nanomips.h b/disas/nanomips.h
index 84cc9a6..71428b3 100644
--- a/disas/nanomips.h
+++ b/disas/nanomips.h
@@ -24,14 +24,14 @@
#include <string>
-typedef unsigned short uint16;
-typedef unsigned int uint32;
-typedef long long int64;
-typedef unsigned long long uint64;
+typedef int64_t int64;
+typedef uint64_t uint64;
+typedef uint32_t uint32;
+typedef uint16_t uint16;
namespace img
{
- typedef unsigned long long address;
+ typedef uint64_t address;
}
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 15/44] disas: nanoMIPS: Fix preamble text in nanomips.* files
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (13 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 14/44] disas: nanoMIPS: Fix types and format strings Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 16/44] disas: nanoMIPS: Remove functions that are not used Aleksandar Markovic
` (29 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Fix several mistakes in preambles of nanomips disassembler source
files.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
disas/nanomips.cpp | 7 ++++---
disas/nanomips.h | 7 ++++---
2 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index 28d78d6..e082a3f 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -1,13 +1,13 @@
/*
* Source file for nanoMIPS disassembler component of QEMU
*
- * Copyright (C) 2018 Wave Computing
+ * Copyright (C) 2018 Wave Computing, Inc.
* Copyright (C) 2018 Matthew Fortune <matthew.fortune@mips.com>
- * Copyright (C) 2018 Aleksandar Markovic <aleksandar.markovic@wavecomp.com>
+ * Copyright (C) 2018 Aleksandar Markovic <amarkovic@wavecomp.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
+ * the Free Software Foundation, either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
@@ -17,6 +17,7 @@
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <https://www.gnu.org/licenses/>.
+ *
*/
extern "C" {
diff --git a/disas/nanomips.h b/disas/nanomips.h
index 71428b3..c7477c2 100644
--- a/disas/nanomips.h
+++ b/disas/nanomips.h
@@ -1,13 +1,13 @@
/*
* Header file for nanoMIPS disassembler component of QEMU
*
- * Copyright (C) 2018 Wave Computing
+ * Copyright (C) 2018 Wave Computing, Inc.
* Copyright (C) 2018 Matthew Fortune <matthew.fortune@mips.com>
- * Copyright (C) 2018 Aleksandar Markovic <aleksandar.markovic@wavecomp.com>
+ * Copyright (C) 2018 Aleksandar Markovic <amarkovic@wavecomp.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
+ * the Free Software Foundation, either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
@@ -17,6 +17,7 @@
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <https://www.gnu.org/licenses/>.
+ *
*/
#ifndef NANOMIPS_DISASSEMBLER_H
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 16/44] disas: nanoMIPS: Remove functions that are not used
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (14 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 15/44] disas: nanoMIPS: Fix preamble text in nanomips.* files Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 17/44] disas: nanoMIPS: Fix a function misnomer Aleksandar Markovic
` (28 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Some functions were not used at all. Compiler doesn't complain
since they are class memebers. Remove them - no future usage is
planned.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
disas/nanomips.cpp | 208 -----------------------------------------------------
disas/nanomips.h | 25 -------
2 files changed, 233 deletions(-)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index e082a3f..4784530 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -856,23 +856,6 @@ uint64 NMD::extract_stripe_6(uint64 instruction)
}
-uint64 NMD::extr_xil17il0bs1Fmsb0(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 17, 1);
- return value;
-}
-
-
-uint64 NMD::extr_xil2il0bs1_il15il0bs1Fmsb0(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 2, 1);
- value |= extract_bits(instruction, 15, 1);
- return value;
-}
-
-
uint64 NMD::extract_ac_13_12(uint64 instruction)
{
uint64 value = 0;
@@ -923,14 +906,6 @@ uint64 NMD::extract_shift_5_4_3_2_1_0(uint64 instruction)
}
-uint64 NMD::extr_xil10il0bs6Fmsb5(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 10, 6);
- return value;
-}
-
-
uint64 NMD::extract_count_19_18_17_16(uint64 instruction)
{
uint64 value = 0;
@@ -947,15 +922,6 @@ uint64 NMD::extract_code_2_1_0(uint64 instruction)
}
-uint64 NMD::extr_xil10il0bs4_il22il0bs4Fmsb3(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 10, 4);
- value |= extract_bits(instruction, 22, 4);
- return value;
-}
-
-
uint64 NMD::extract_u_11_10_9_8_7_6_5_4_3_2_1_0(uint64 instruction)
{
uint64 value = 0;
@@ -980,14 +946,6 @@ uint64 NMD::extr_uil3il3bs18Fmsb20(uint64 instruction)
}
-uint64 NMD::extr_xil12il0bs1Fmsb0(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 12, 1);
- return value;
-}
-
-
uint64 NMD::extr_uil0il2bs4Fmsb5(uint64 instruction)
{
uint64 value = 0;
@@ -1012,14 +970,6 @@ uint64 NMD::extr_uil0il2bs3Fmsb4(uint64 instruction)
}
-uint64 NMD::extr_xil10il0bs1Fmsb0(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 10, 1);
- return value;
-}
-
-
uint64 NMD::extract_rd3_3_2_1(uint64 instruction)
{
uint64 value = 0;
@@ -1052,22 +1002,6 @@ uint64 NMD::extract_ru_7_6_5_4_3(uint64 instruction)
}
-uint64 NMD::extr_xil21il0bs5Fmsb4(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 21, 5);
- return value;
-}
-
-
-uint64 NMD::extr_xil9il0bs3Fmsb2(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 9, 3);
- return value;
-}
-
-
uint64 NMD::extract_u_17_to_0(uint64 instruction)
{
uint64 value = 0;
@@ -1076,15 +1010,6 @@ uint64 NMD::extract_u_17_to_0(uint64 instruction)
}
-uint64 NMD::extr_xil14il0bs1_il15il0bs1Fmsb0(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 14, 1);
- value |= extract_bits(instruction, 15, 1);
- return value;
-}
-
-
uint64 NMD::extract_rsz4_4_2_1_0(uint64 instruction)
{
uint64 value = 0;
@@ -1094,14 +1019,6 @@ uint64 NMD::extract_rsz4_4_2_1_0(uint64 instruction)
}
-uint64 NMD::extr_xil24il0bs1Fmsb0(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 24, 1);
- return value;
-}
-
-
int64 NMD::extr_sil0il21bs1_il1il1bs20Tmsb21(uint64 instruction)
{
int64 value = 0;
@@ -1154,15 +1071,6 @@ int64 NMD::extract_shift_21_20_19_18_17_16(uint64 instruction)
}
-uint64 NMD::extr_xil6il0bs3_il10il0bs1Fmsb2(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 6, 3);
- value |= extract_bits(instruction, 10, 1);
- return value;
-}
-
-
uint64 NMD::extract_rd2_3_8(uint64 instruction)
{
uint64 value = 0;
@@ -1172,14 +1080,6 @@ uint64 NMD::extract_rd2_3_8(uint64 instruction)
}
-uint64 NMD::extr_xil16il0bs5Fmsb4(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 16, 5);
- return value;
-}
-
-
uint64 NMD::extract_code_17_to_0(uint64 instruction)
{
uint64 value = 0;
@@ -1188,14 +1088,6 @@ uint64 NMD::extract_code_17_to_0(uint64 instruction)
}
-uint64 NMD::extr_xil0il0bs12Fmsb11(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 0, 12);
- return value;
-}
-
-
uint64 NMD::extract_size_20_19_18_17_16(uint64 instruction)
{
uint64 value = 0;
@@ -1264,15 +1156,6 @@ uint64 NMD::extract_hs_20_19_18_17_16(uint64 instruction)
}
-uint64 NMD::extr_xil10il0bs1_il14il0bs2Fmsb1(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 10, 1);
- value |= extract_bits(instruction, 14, 2);
- return value;
-}
-
-
uint64 NMD::extract_sel_13_12_11(uint64 instruction)
{
uint64 value = 0;
@@ -1289,14 +1172,6 @@ uint64 NMD::extract_lsb_4_3_2_1_0(uint64 instruction)
}
-uint64 NMD::extr_xil14il0bs2Fmsb1(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 14, 2);
- return value;
-}
-
-
uint64 NMD::extract_gp_2(uint64 instruction)
{
uint64 value = 0;
@@ -1337,14 +1212,6 @@ uint64 NMD::extract_cs_20_19_18_17_16(uint64 instruction)
}
-uint64 NMD::extr_xil16il0bs10Fmsb9(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 16, 10);
- return value;
-}
-
-
uint64 NMD::extract_rt4_9_7_6_5(uint64 instruction)
{
uint64 value = 0;
@@ -1370,14 +1237,6 @@ uint64 NMD::extr_uil0il2bs6Fmsb7(uint64 instruction)
}
-uint64 NMD::extr_xil17il0bs9Fmsb8(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 17, 9);
- return value;
-}
-
-
uint64 NMD::extract_sa_15_14_13(uint64 instruction)
{
uint64 value = 0;
@@ -1468,15 +1327,6 @@ uint64 NMD::extract_bit_16_15_14_13_12_11(uint64 instruction)
}
-uint64 NMD::extr_xil10il0bs1_il11il0bs5Fmsb4(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 10, 1);
- value |= extract_bits(instruction, 11, 5);
- return value;
-}
-
-
uint64 NMD::extract_mask_20_19_18_17_16_15_14(uint64 instruction)
{
uint64 value = 0;
@@ -1537,22 +1387,6 @@ uint64 NMD::extract_u_20_19_18_17_16_15_14_13(uint64 instruction)
}
-uint64 NMD::extr_xil15il0bs1Fmsb0(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 15, 1);
- return value;
-}
-
-
-uint64 NMD::extr_xil11il0bs5Fmsb4(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 11, 5);
- return value;
-}
-
-
uint64 NMD::extr_uil2il2bs16Fmsb17(uint64 instruction)
{
uint64 value = 0;
@@ -1595,15 +1429,6 @@ int64 NMD::extr_sil0il25bs1_il1il1bs24Tmsb25(uint64 instruction)
}
-uint64 NMD::extr_xil0il0bs3_il4il0bs1Fmsb2(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 0, 3);
- value |= extract_bits(instruction, 4, 1);
- return value;
-}
-
-
uint64 NMD::extract_u_1_0(uint64 instruction)
{
uint64 value = 0;
@@ -1621,15 +1446,6 @@ uint64 NMD::extr_uil3il3bs1_il8il2bs1Fmsb3(uint64 instruction)
}
-uint64 NMD::extr_xil9il0bs3_il16il0bs5Fmsb4(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 9, 3);
- value |= extract_bits(instruction, 16, 5);
- return value;
-}
-
-
uint64 NMD::extract_fd_10_9_8_7_6(uint64 instruction)
{
uint64 value = 0;
@@ -1638,14 +1454,6 @@ uint64 NMD::extract_fd_10_9_8_7_6(uint64 instruction)
}
-uint64 NMD::extr_xil6il0bs3Fmsb2(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 6, 3);
- return value;
-}
-
-
uint64 NMD::extr_uil0il2bs5Fmsb6(uint64 instruction)
{
uint64 value = 0;
@@ -1679,14 +1487,6 @@ uint64 NMD::extract_ct_25_24_23_22_21(uint64 instruction)
}
-uint64 NMD::extr_xil11il0bs1Fmsb0(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 11, 1);
- return value;
-}
-
-
uint64 NMD::extr_uil2il2bs19Fmsb20(uint64 instruction)
{
uint64 value = 0;
@@ -1713,14 +1513,6 @@ uint64 NMD::extr_uil0il1bs4Fmsb4(uint64 instruction)
}
-uint64 NMD::extr_xil9il0bs2Fmsb1(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 9, 2);
- return value;
-}
-
-
bool NMD::ADDIU_32__cond(uint64 instruction)
{
diff --git a/disas/nanomips.h b/disas/nanomips.h
index c7477c2..4defd35 100644
--- a/disas/nanomips.h
+++ b/disas/nanomips.h
@@ -245,31 +245,6 @@ private:
uint64 extr_uil3il3bs1_il8il2bs1Fmsb3(uint64 instruction);
uint64 extr_uil3il3bs9Fmsb11(uint64 instruction);
uint64 extr_uil4il4bs4Fmsb7(uint64 instruction);
- uint64 extr_xil0il0bs12Fmsb11(uint64 instruction);
- uint64 extr_xil0il0bs3_il4il0bs1Fmsb2(uint64 instruction);
- uint64 extr_xil10il0bs1Fmsb0(uint64 instruction);
- uint64 extr_xil10il0bs1_il11il0bs5Fmsb4(uint64 instruction);
- uint64 extr_xil10il0bs1_il14il0bs2Fmsb1(uint64 instruction);
- uint64 extr_xil10il0bs4_il22il0bs4Fmsb3(uint64 instruction);
- uint64 extr_xil10il0bs6Fmsb5(uint64 instruction);
- uint64 extr_xil11il0bs1Fmsb0(uint64 instruction);
- uint64 extr_xil11il0bs5Fmsb4(uint64 instruction);
- uint64 extr_xil12il0bs1Fmsb0(uint64 instruction);
- uint64 extr_xil14il0bs1_il15il0bs1Fmsb0(uint64 instruction);
- uint64 extr_xil14il0bs2Fmsb1(uint64 instruction);
- uint64 extr_xil15il0bs1Fmsb0(uint64 instruction);
- uint64 extr_xil16il0bs10Fmsb9(uint64 instruction);
- uint64 extr_xil16il0bs5Fmsb4(uint64 instruction);
- uint64 extr_xil17il0bs1Fmsb0(uint64 instruction);
- uint64 extr_xil17il0bs9Fmsb8(uint64 instruction);
- uint64 extr_xil21il0bs5Fmsb4(uint64 instruction);
- uint64 extr_xil24il0bs1Fmsb0(uint64 instruction);
- uint64 extr_xil2il0bs1_il15il0bs1Fmsb0(uint64 instruction);
- uint64 extr_xil6il0bs3Fmsb2(uint64 instruction);
- uint64 extr_xil6il0bs3_il10il0bs1Fmsb2(uint64 instruction);
- uint64 extr_xil9il0bs2Fmsb1(uint64 instruction);
- uint64 extr_xil9il0bs3Fmsb2(uint64 instruction);
- uint64 extr_xil9il0bs3_il16il0bs5Fmsb4(uint64 instruction);
bool ADDIU_32__cond(uint64 instruction);
bool ADDIU_RS5__cond(uint64 instruction);
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 17/44] disas: nanoMIPS: Fix a function misnomer
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (15 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 16/44] disas: nanoMIPS: Remove functions that are not used Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 18/44] disas: nanoMIPS: Fix order of some invocations Aleksandar Markovic
` (27 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Fix wrong function name. The convention in these files is that names of
extraction functions should reflect bit patterns they are extracting.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
disas/nanomips.cpp | 264 ++++++++++++++++++++++++++---------------------------
disas/nanomips.h | 2 +-
2 files changed, 133 insertions(+), 133 deletions(-)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index 4784530..2abf18d 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -1395,7 +1395,7 @@ uint64 NMD::extr_uil2il2bs16Fmsb17(uint64 instruction)
}
-uint64 NMD::extract_rd_20_19_18_17_16(uint64 instruction)
+uint64 NMD::extract_rd_15_14_13_12_11(uint64 instruction)
{
uint64 value = 0;
value |= extract_bits(instruction, 11, 5);
@@ -1583,7 +1583,7 @@ bool NMD::PREFE_cond(uint64 instruction)
bool NMD::SLTU_cond(uint64 instruction)
{
- uint64 rd = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd = extract_rd_15_14_13_12_11(instruction);
return rd != 0;
}
@@ -1731,7 +1731,7 @@ std::string NMD::ACLR(uint64 instruction)
std::string NMD::ADD(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -2043,7 +2043,7 @@ std::string NMD::ADDIUPC_48_(uint64 instruction)
std::string NMD::ADDQ_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -2067,7 +2067,7 @@ std::string NMD::ADDQ_PH(uint64 instruction)
std::string NMD::ADDQ_S_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -2091,7 +2091,7 @@ std::string NMD::ADDQ_S_PH(uint64 instruction)
std::string NMD::ADDQ_S_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -2116,7 +2116,7 @@ std::string NMD::ADDQ_S_W(uint64 instruction)
std::string NMD::ADDQH_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -2141,7 +2141,7 @@ std::string NMD::ADDQH_PH(uint64 instruction)
std::string NMD::ADDQH_R_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -2165,7 +2165,7 @@ std::string NMD::ADDQH_R_PH(uint64 instruction)
std::string NMD::ADDQH_R_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -2189,7 +2189,7 @@ std::string NMD::ADDQH_R_W(uint64 instruction)
std::string NMD::ADDQH_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -2213,7 +2213,7 @@ std::string NMD::ADDQH_W(uint64 instruction)
std::string NMD::ADDSC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -2260,7 +2260,7 @@ std::string NMD::ADDU_16_(uint64 instruction)
std::string NMD::ADDU_32_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -2306,7 +2306,7 @@ std::string NMD::ADDU_4X4_(uint64 instruction)
std::string NMD::ADDU_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -2330,7 +2330,7 @@ std::string NMD::ADDU_PH(uint64 instruction)
std::string NMD::ADDU_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -2354,7 +2354,7 @@ std::string NMD::ADDU_QB(uint64 instruction)
std::string NMD::ADDU_S_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -2378,7 +2378,7 @@ std::string NMD::ADDU_S_PH(uint64 instruction)
std::string NMD::ADDU_S_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -2403,7 +2403,7 @@ std::string NMD::ADDU_S_QB(uint64 instruction)
std::string NMD::ADDUH_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -2428,7 +2428,7 @@ std::string NMD::ADDUH_QB(uint64 instruction)
std::string NMD::ADDUH_R_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -2451,7 +2451,7 @@ std::string NMD::ADDUH_R_QB(uint64 instruction)
std::string NMD::ADDWC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -2518,7 +2518,7 @@ std::string NMD::AND_16_(uint64 instruction)
std::string NMD::AND_32_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -4725,7 +4725,7 @@ std::string NMD::CMP_UN_S(uint64 instruction)
std::string NMD::CMPGDU_EQ_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -4749,7 +4749,7 @@ std::string NMD::CMPGDU_EQ_QB(uint64 instruction)
std::string NMD::CMPGDU_LE_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -4773,7 +4773,7 @@ std::string NMD::CMPGDU_LE_QB(uint64 instruction)
std::string NMD::CMPGDU_LT_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -4797,7 +4797,7 @@ std::string NMD::CMPGDU_LT_QB(uint64 instruction)
std::string NMD::CMPGU_EQ_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -4821,7 +4821,7 @@ std::string NMD::CMPGU_EQ_QB(uint64 instruction)
std::string NMD::CMPGU_LE_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -4845,7 +4845,7 @@ std::string NMD::CMPGU_LE_QB(uint64 instruction)
std::string NMD::CMPGU_LT_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -5333,7 +5333,7 @@ std::string NMD::DADDIU_U12_(uint64 instruction)
std::string NMD::DADD(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -5357,7 +5357,7 @@ std::string NMD::DADD(uint64 instruction)
std::string NMD::DADDU(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -5425,7 +5425,7 @@ std::string NMD::DCLZ(uint64 instruction)
std::string NMD::DDIV(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -5449,7 +5449,7 @@ std::string NMD::DDIV(uint64 instruction)
std::string NMD::DDIVU(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -5673,7 +5673,7 @@ std::string NMD::DI(uint64 instruction)
std::string NMD::DIV(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -5745,7 +5745,7 @@ std::string NMD::DIV_S(uint64 instruction)
std::string NMD::DIVU(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -5769,7 +5769,7 @@ std::string NMD::DIVU(uint64 instruction)
std::string NMD::DLSA(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 u2_value = extract_u2_10_9(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
@@ -5909,7 +5909,7 @@ std::string NMD::DMFGC0(uint64 instruction)
std::string NMD::DMOD(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -5933,7 +5933,7 @@ std::string NMD::DMOD(uint64 instruction)
std::string NMD::DMODU(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -6069,7 +6069,7 @@ std::string NMD::DMT(uint64 instruction)
std::string NMD::DMUH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -6093,7 +6093,7 @@ std::string NMD::DMUH(uint64 instruction)
std::string NMD::DMUHU(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -6117,7 +6117,7 @@ std::string NMD::DMUHU(uint64 instruction)
std::string NMD::DMUL(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -6141,7 +6141,7 @@ std::string NMD::DMUL(uint64 instruction)
std::string NMD::DMULU(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -6597,7 +6597,7 @@ std::string NMD::DROTR32(uint64 instruction)
std::string NMD::DROTRV(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -6695,7 +6695,7 @@ std::string NMD::DSLL32(uint64 instruction)
std::string NMD::DSLLV(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -6767,7 +6767,7 @@ std::string NMD::DSRA32(uint64 instruction)
std::string NMD::DSRAV(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -6839,7 +6839,7 @@ std::string NMD::DSRL32(uint64 instruction)
std::string NMD::DSRLV(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -6863,7 +6863,7 @@ std::string NMD::DSRLV(uint64 instruction)
std::string NMD::DSUB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -6887,7 +6887,7 @@ std::string NMD::DSUB(uint64 instruction)
std::string NMD::DSUBU(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -7112,7 +7112,7 @@ std::string NMD::EXTD(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
uint64 shift_value = extract_shift_10_9_8_7_6(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -7138,7 +7138,7 @@ std::string NMD::EXTD32(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
uint64 shift_value = extract_shift_10_9_8_7_6(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -7453,7 +7453,7 @@ std::string NMD::EXTW(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
uint64 shift_value = extract_shift_10_9_8_7_6(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -7566,7 +7566,7 @@ std::string NMD::FLOOR_W_S(uint64 instruction)
std::string NMD::FORK(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -8018,7 +8018,7 @@ std::string NMD::LBUE(uint64 instruction)
std::string NMD::LBUX(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -8042,7 +8042,7 @@ std::string NMD::LBUX(uint64 instruction)
std::string NMD::LBX(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -8326,7 +8326,7 @@ std::string NMD::LDPC_48_(uint64 instruction)
std::string NMD::LDX(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -8350,7 +8350,7 @@ std::string NMD::LDX(uint64 instruction)
std::string NMD::LDXS(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -8610,7 +8610,7 @@ std::string NMD::LHUE(uint64 instruction)
std::string NMD::LHUX(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -8634,7 +8634,7 @@ std::string NMD::LHUX(uint64 instruction)
std::string NMD::LHUXS(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -8658,7 +8658,7 @@ std::string NMD::LHUXS(uint64 instruction)
std::string NMD::LHXS(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -8682,7 +8682,7 @@ std::string NMD::LHXS(uint64 instruction)
std::string NMD::LHX(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -8894,7 +8894,7 @@ std::string NMD::LLWPE(uint64 instruction)
std::string NMD::LSA(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 u2_value = extract_u2_10_9(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
@@ -9388,7 +9388,7 @@ std::string NMD::LWU_U12_(uint64 instruction)
std::string NMD::LWUX(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -9412,7 +9412,7 @@ std::string NMD::LWUX(uint64 instruction)
std::string NMD::LWUXS(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -9436,7 +9436,7 @@ std::string NMD::LWUXS(uint64 instruction)
std::string NMD::LWX(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -9484,7 +9484,7 @@ std::string NMD::LWXS_16_(uint64 instruction)
std::string NMD::LWXS_32_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -10172,7 +10172,7 @@ std::string NMD::MINA_S(uint64 instruction)
std::string NMD::MOD(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -10196,7 +10196,7 @@ std::string NMD::MOD(uint64 instruction)
std::string NMD::MODSUB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -10220,7 +10220,7 @@ std::string NMD::MODSUB(uint64 instruction)
std::string NMD::MODU(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -10388,7 +10388,7 @@ std::string NMD::MOVE(uint64 instruction)
std::string NMD::MOVN(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -10412,7 +10412,7 @@ std::string NMD::MOVN(uint64 instruction)
std::string NMD::MOVZ(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -10834,7 +10834,7 @@ std::string NMD::MTTR(uint64 instruction)
std::string NMD::MUH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -10858,7 +10858,7 @@ std::string NMD::MUH(uint64 instruction)
std::string NMD::MUHU(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -10882,7 +10882,7 @@ std::string NMD::MUHU(uint64 instruction)
std::string NMD::MUL_32_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -10952,7 +10952,7 @@ std::string NMD::MUL_D(uint64 instruction)
std::string NMD::MUL_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -10976,7 +10976,7 @@ std::string NMD::MUL_PH(uint64 instruction)
std::string NMD::MUL_S_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -11024,7 +11024,7 @@ std::string NMD::MUL_S(uint64 instruction)
std::string NMD::MULEQ_S_W_PHL(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -11048,7 +11048,7 @@ std::string NMD::MULEQ_S_W_PHL(uint64 instruction)
std::string NMD::MULEQ_S_W_PHR(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -11072,7 +11072,7 @@ std::string NMD::MULEQ_S_W_PHR(uint64 instruction)
std::string NMD::MULEU_S_PH_QBL(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -11096,7 +11096,7 @@ std::string NMD::MULEU_S_PH_QBL(uint64 instruction)
std::string NMD::MULEU_S_PH_QBR(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -11120,7 +11120,7 @@ std::string NMD::MULEU_S_PH_QBR(uint64 instruction)
std::string NMD::MULQ_RS_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -11144,7 +11144,7 @@ std::string NMD::MULQ_RS_PH(uint64 instruction)
std::string NMD::MULQ_RS_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -11168,7 +11168,7 @@ std::string NMD::MULQ_RS_W(uint64 instruction)
std::string NMD::MULQ_S_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -11192,7 +11192,7 @@ std::string NMD::MULQ_S_PH(uint64 instruction)
std::string NMD::MULQ_S_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -11312,7 +11312,7 @@ std::string NMD::MULTU_DSP_(uint64 instruction)
std::string NMD::MULU(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -11416,7 +11416,7 @@ std::string NMD::NOP_32_(uint64 instruction)
std::string NMD::NOR(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -11484,7 +11484,7 @@ std::string NMD::OR_16_(uint64 instruction)
std::string NMD::OR_32_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -11532,7 +11532,7 @@ std::string NMD::ORI(uint64 instruction)
std::string NMD::PACKRL_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -11574,7 +11574,7 @@ std::string NMD::PAUSE(uint64 instruction)
std::string NMD::PICK_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -11598,7 +11598,7 @@ std::string NMD::PICK_PH(uint64 instruction)
std::string NMD::PICK_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -11842,7 +11842,7 @@ std::string NMD::PRECEU_PH_QBR(uint64 instruction)
std::string NMD::PRECR_QB_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -11914,7 +11914,7 @@ std::string NMD::PRECR_SRA_R_PH_W(uint64 instruction)
std::string NMD::PRECRQ_PH_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -11938,7 +11938,7 @@ std::string NMD::PRECRQ_PH_W(uint64 instruction)
std::string NMD::PRECRQ_QB_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -11962,7 +11962,7 @@ std::string NMD::PRECRQ_QB_PH(uint64 instruction)
std::string NMD::PRECRQ_RS_PH_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -11986,7 +11986,7 @@ std::string NMD::PRECRQ_RS_PH_W(uint64 instruction)
std::string NMD::PRECRQU_S_QB_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -12486,7 +12486,7 @@ std::string NMD::ROTR(uint64 instruction)
std::string NMD::ROTRV(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -12856,7 +12856,7 @@ std::string NMD::SBE(uint64 instruction)
std::string NMD::SBX(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -13324,7 +13324,7 @@ std::string NMD::SDPC_48_(uint64 instruction)
std::string NMD::SDXS(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -13348,7 +13348,7 @@ std::string NMD::SDXS(uint64 instruction)
std::string NMD::SDX(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -13842,7 +13842,7 @@ std::string NMD::SHLL_S_W(uint64 instruction)
std::string NMD::SHLLV_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -13866,7 +13866,7 @@ std::string NMD::SHLLV_PH(uint64 instruction)
std::string NMD::SHLLV_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -13890,7 +13890,7 @@ std::string NMD::SHLLV_QB(uint64 instruction)
std::string NMD::SHLLV_S_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -13914,7 +13914,7 @@ std::string NMD::SHLLV_S_PH(uint64 instruction)
std::string NMD::SHLLV_S_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -14058,7 +14058,7 @@ std::string NMD::SHRA_R_W(uint64 instruction)
std::string NMD::SHRAV_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -14082,7 +14082,7 @@ std::string NMD::SHRAV_PH(uint64 instruction)
std::string NMD::SHRAV_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -14106,7 +14106,7 @@ std::string NMD::SHRAV_QB(uint64 instruction)
std::string NMD::SHRAV_R_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -14130,7 +14130,7 @@ std::string NMD::SHRAV_R_PH(uint64 instruction)
std::string NMD::SHRAV_R_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -14154,7 +14154,7 @@ std::string NMD::SHRAV_R_QB(uint64 instruction)
std::string NMD::SHRAV_R_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -14226,7 +14226,7 @@ std::string NMD::SHRL_QB(uint64 instruction)
std::string NMD::SHRLV_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -14250,7 +14250,7 @@ std::string NMD::SHRLV_PH(uint64 instruction)
std::string NMD::SHRLV_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -14274,7 +14274,7 @@ std::string NMD::SHRLV_QB(uint64 instruction)
std::string NMD::SHX(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -14298,7 +14298,7 @@ std::string NMD::SHX(uint64 instruction)
std::string NMD::SHXS(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -14390,7 +14390,7 @@ std::string NMD::SLL_32_(uint64 instruction)
std::string NMD::SLLV(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -14414,7 +14414,7 @@ std::string NMD::SLLV(uint64 instruction)
std::string NMD::SLT(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -14486,7 +14486,7 @@ std::string NMD::SLTIU(uint64 instruction)
std::string NMD::SLTU(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -14510,7 +14510,7 @@ std::string NMD::SLTU(uint64 instruction)
std::string NMD::SOV(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -14622,7 +14622,7 @@ std::string NMD::SRA(uint64 instruction)
std::string NMD::SRAV(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -14694,7 +14694,7 @@ std::string NMD::SRL_32_(uint64 instruction)
std::string NMD::SRLV(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -14718,7 +14718,7 @@ std::string NMD::SRLV(uint64 instruction)
std::string NMD::SUB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -14790,7 +14790,7 @@ std::string NMD::SUB_S(uint64 instruction)
std::string NMD::SUBQ_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -14815,7 +14815,7 @@ std::string NMD::SUBQ_PH(uint64 instruction)
std::string NMD::SUBQ_S_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -14840,7 +14840,7 @@ std::string NMD::SUBQ_S_PH(uint64 instruction)
std::string NMD::SUBQ_S_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -14865,7 +14865,7 @@ std::string NMD::SUBQ_S_W(uint64 instruction)
std::string NMD::SUBQH_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -14890,7 +14890,7 @@ std::string NMD::SUBQH_PH(uint64 instruction)
std::string NMD::SUBQH_R_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -14915,7 +14915,7 @@ std::string NMD::SUBQH_R_PH(uint64 instruction)
std::string NMD::SUBQH_R_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -14940,7 +14940,7 @@ std::string NMD::SUBQH_R_W(uint64 instruction)
std::string NMD::SUBQH_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -14988,7 +14988,7 @@ std::string NMD::SUBU_16_(uint64 instruction)
std::string NMD::SUBU_32_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -15012,7 +15012,7 @@ std::string NMD::SUBU_32_(uint64 instruction)
std::string NMD::SUBU_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -15036,7 +15036,7 @@ std::string NMD::SUBU_PH(uint64 instruction)
std::string NMD::SUBU_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -15060,7 +15060,7 @@ std::string NMD::SUBU_QB(uint64 instruction)
std::string NMD::SUBU_S_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -15084,7 +15084,7 @@ std::string NMD::SUBU_S_PH(uint64 instruction)
std::string NMD::SUBU_S_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -15109,7 +15109,7 @@ std::string NMD::SUBU_S_QB(uint64 instruction)
std::string NMD::SUBUH_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -15134,7 +15134,7 @@ std::string NMD::SUBUH_QB(uint64 instruction)
std::string NMD::SUBUH_R_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -15534,7 +15534,7 @@ std::string NMD::SWPC_48_(uint64 instruction)
std::string NMD::SWX(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -15558,7 +15558,7 @@ std::string NMD::SWX(uint64 instruction)
std::string NMD::SWXS(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
@@ -16287,7 +16287,7 @@ std::string NMD::XOR_16_(uint64 instruction)
std::string NMD::XOR_32_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
diff --git a/disas/nanomips.h b/disas/nanomips.h
index 4defd35..f04a1a8 100644
--- a/disas/nanomips.h
+++ b/disas/nanomips.h
@@ -191,7 +191,7 @@ private:
uint64 extract_rdl_25_24(uint64 instruction);
uint64 extract_rd2_3_8(uint64 instruction);
uint64 extract_rd3_3_2_1(uint64 instruction);
- uint64 extract_rd_20_19_18_17_16(uint64 instruction);
+ uint64 extract_rd_15_14_13_12_11(uint64 instruction);
uint64 extract_rs3_6_5_4(uint64 instruction);
uint64 extract_rs4_4_2_1_0(uint64 instruction);
uint64 extract_rs_4_3_2_1_0(uint64 instruction);
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 18/44] disas: nanoMIPS: Fix order of some invocations
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (16 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 17/44] disas: nanoMIPS: Fix a function misnomer Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 19/44] disas: nanoMIPS: Name some functions in a more descriptive way Aleksandar Markovic
` (26 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Fix order of extraction function invocations so that extraction
goes from MSB side to LSB side of the given instruction coding
content. This is desireable because of consistency and easier
visual spotting of errors.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
disas/nanomips.cpp | 776 ++++++++++++++++++++++++++---------------------------
1 file changed, 388 insertions(+), 388 deletions(-)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index 2abf18d..d8829f5 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -1601,8 +1601,8 @@ bool NMD::SLTU_cond(uint64 instruction)
*/
std::string NMD::ABS_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 fd_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string fs = FPR(copy(fs_value));
std::string fd = FPR(copy(fd_value));
@@ -1623,8 +1623,8 @@ std::string NMD::ABS_D(uint64 instruction)
*/
std::string NMD::ABS_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 fd_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string fs = FPR(copy(fs_value));
std::string fd = FPR(copy(fd_value));
@@ -1731,8 +1731,8 @@ std::string NMD::ACLR(uint64 instruction)
std::string NMD::ADD(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -1804,8 +1804,8 @@ std::string NMD::ADD_S(uint64 instruction)
std::string NMD::ADDIU_32_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extract_u_15_to_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 u_value = extract_u_15_to_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -1911,8 +1911,8 @@ std::string NMD::ADDIU_GP_W_(uint64 instruction)
std::string NMD::ADDIU_NEG_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -2043,8 +2043,8 @@ std::string NMD::ADDIUPC_48_(uint64 instruction)
std::string NMD::ADDQ_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -2067,8 +2067,8 @@ std::string NMD::ADDQ_PH(uint64 instruction)
std::string NMD::ADDQ_S_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -2091,8 +2091,8 @@ std::string NMD::ADDQ_S_PH(uint64 instruction)
std::string NMD::ADDQ_S_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -2116,8 +2116,8 @@ std::string NMD::ADDQ_S_W(uint64 instruction)
std::string NMD::ADDQH_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -2141,8 +2141,8 @@ std::string NMD::ADDQH_PH(uint64 instruction)
std::string NMD::ADDQH_R_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -2165,8 +2165,8 @@ std::string NMD::ADDQH_R_PH(uint64 instruction)
std::string NMD::ADDQH_R_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -2189,8 +2189,8 @@ std::string NMD::ADDQH_R_W(uint64 instruction)
std::string NMD::ADDQH_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -2213,8 +2213,8 @@ std::string NMD::ADDQH_W(uint64 instruction)
std::string NMD::ADDSC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -2260,8 +2260,8 @@ std::string NMD::ADDU_16_(uint64 instruction)
std::string NMD::ADDU_32_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -2283,8 +2283,8 @@ std::string NMD::ADDU_32_(uint64 instruction)
*/
std::string NMD::ADDU_4X4_(uint64 instruction)
{
- uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
uint64 rt4_value = extract_rt4_9_7_6_5(instruction);
+ uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
std::string rs4 = GPR(encode_gpr4(rs4_value));
std::string rt4 = GPR(encode_gpr4(rt4_value));
@@ -2306,8 +2306,8 @@ std::string NMD::ADDU_4X4_(uint64 instruction)
std::string NMD::ADDU_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -2330,8 +2330,8 @@ std::string NMD::ADDU_PH(uint64 instruction)
std::string NMD::ADDU_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -2354,8 +2354,8 @@ std::string NMD::ADDU_QB(uint64 instruction)
std::string NMD::ADDU_S_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -2378,8 +2378,8 @@ std::string NMD::ADDU_S_PH(uint64 instruction)
std::string NMD::ADDU_S_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -2403,8 +2403,8 @@ std::string NMD::ADDU_S_QB(uint64 instruction)
std::string NMD::ADDUH_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -2428,8 +2428,8 @@ std::string NMD::ADDUH_QB(uint64 instruction)
std::string NMD::ADDUH_R_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -2451,8 +2451,8 @@ std::string NMD::ADDUH_R_QB(uint64 instruction)
std::string NMD::ADDWC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -2518,8 +2518,8 @@ std::string NMD::AND_16_(uint64 instruction)
std::string NMD::AND_32_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -2565,8 +2565,8 @@ std::string NMD::ANDI_16_(uint64 instruction)
std::string NMD::ANDI_32_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -2589,8 +2589,8 @@ std::string NMD::ANDI_32_(uint64 instruction)
std::string NMD::APPEND(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -3382,8 +3382,8 @@ std::string NMD::CACHEE(uint64 instruction)
*/
std::string NMD::CEIL_L_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -3404,8 +3404,8 @@ std::string NMD::CEIL_L_D(uint64 instruction)
*/
std::string NMD::CEIL_L_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -3426,8 +3426,8 @@ std::string NMD::CEIL_L_S(uint64 instruction)
*/
std::string NMD::CEIL_W_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -3448,8 +3448,8 @@ std::string NMD::CEIL_W_D(uint64 instruction)
*/
std::string NMD::CEIL_W_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -3470,8 +3470,8 @@ std::string NMD::CEIL_W_S(uint64 instruction)
*/
std::string NMD::CFC1(uint64 instruction)
{
- uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
+ uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string cs = CPR(copy(cs_value));
@@ -3492,8 +3492,8 @@ std::string NMD::CFC1(uint64 instruction)
*/
std::string NMD::CFC2(uint64 instruction)
{
- uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
+ uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string cs = CPR(copy(cs_value));
@@ -3514,8 +3514,8 @@ std::string NMD::CFC2(uint64 instruction)
*/
std::string NMD::CLASS_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -3536,8 +3536,8 @@ std::string NMD::CLASS_D(uint64 instruction)
*/
std::string NMD::CLASS_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -3602,9 +3602,9 @@ std::string NMD::CLZ(uint64 instruction)
*/
std::string NMD::CMP_AF_D(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -3626,9 +3626,9 @@ std::string NMD::CMP_AF_D(uint64 instruction)
*/
std::string NMD::CMP_AF_S(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -3650,9 +3650,9 @@ std::string NMD::CMP_AF_S(uint64 instruction)
*/
std::string NMD::CMP_EQ_D(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -3696,9 +3696,9 @@ std::string NMD::CMP_EQ_PH(uint64 instruction)
*/
std::string NMD::CMP_EQ_S(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -3720,9 +3720,9 @@ std::string NMD::CMP_EQ_S(uint64 instruction)
*/
std::string NMD::CMP_LE_D(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -3766,9 +3766,9 @@ std::string NMD::CMP_LE_PH(uint64 instruction)
*/
std::string NMD::CMP_LE_S(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -3790,9 +3790,9 @@ std::string NMD::CMP_LE_S(uint64 instruction)
*/
std::string NMD::CMP_LT_D(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -3836,9 +3836,9 @@ std::string NMD::CMP_LT_PH(uint64 instruction)
*/
std::string NMD::CMP_LT_S(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -3860,9 +3860,9 @@ std::string NMD::CMP_LT_S(uint64 instruction)
*/
std::string NMD::CMP_NE_D(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -3884,9 +3884,9 @@ std::string NMD::CMP_NE_D(uint64 instruction)
*/
std::string NMD::CMP_NE_S(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -3908,9 +3908,9 @@ std::string NMD::CMP_NE_S(uint64 instruction)
*/
std::string NMD::CMP_OR_D(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -3932,9 +3932,9 @@ std::string NMD::CMP_OR_D(uint64 instruction)
*/
std::string NMD::CMP_OR_S(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -3956,9 +3956,9 @@ std::string NMD::CMP_OR_S(uint64 instruction)
*/
std::string NMD::CMP_SAF_D(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -3980,9 +3980,9 @@ std::string NMD::CMP_SAF_D(uint64 instruction)
*/
std::string NMD::CMP_SAF_S(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4004,9 +4004,9 @@ std::string NMD::CMP_SAF_S(uint64 instruction)
*/
std::string NMD::CMP_SEQ_D(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4028,9 +4028,9 @@ std::string NMD::CMP_SEQ_D(uint64 instruction)
*/
std::string NMD::CMP_SEQ_S(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4052,9 +4052,9 @@ std::string NMD::CMP_SEQ_S(uint64 instruction)
*/
std::string NMD::CMP_SLE_D(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4076,9 +4076,9 @@ std::string NMD::CMP_SLE_D(uint64 instruction)
*/
std::string NMD::CMP_SLE_S(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4100,9 +4100,9 @@ std::string NMD::CMP_SLE_S(uint64 instruction)
*/
std::string NMD::CMP_SLT_D(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4124,9 +4124,9 @@ std::string NMD::CMP_SLT_D(uint64 instruction)
*/
std::string NMD::CMP_SLT_S(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4148,9 +4148,9 @@ std::string NMD::CMP_SLT_S(uint64 instruction)
*/
std::string NMD::CMP_SNE_D(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4172,9 +4172,9 @@ std::string NMD::CMP_SNE_D(uint64 instruction)
*/
std::string NMD::CMP_SNE_S(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4196,9 +4196,9 @@ std::string NMD::CMP_SNE_S(uint64 instruction)
*/
std::string NMD::CMP_SOR_D(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4220,9 +4220,9 @@ std::string NMD::CMP_SOR_D(uint64 instruction)
*/
std::string NMD::CMP_SOR_S(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4244,9 +4244,9 @@ std::string NMD::CMP_SOR_S(uint64 instruction)
*/
std::string NMD::CMP_SUEQ_D(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4268,9 +4268,9 @@ std::string NMD::CMP_SUEQ_D(uint64 instruction)
*/
std::string NMD::CMP_SUEQ_S(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4292,9 +4292,9 @@ std::string NMD::CMP_SUEQ_S(uint64 instruction)
*/
std::string NMD::CMP_SULE_D(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4316,9 +4316,9 @@ std::string NMD::CMP_SULE_D(uint64 instruction)
*/
std::string NMD::CMP_SULE_S(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4340,9 +4340,9 @@ std::string NMD::CMP_SULE_S(uint64 instruction)
*/
std::string NMD::CMP_SULT_D(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4364,9 +4364,9 @@ std::string NMD::CMP_SULT_D(uint64 instruction)
*/
std::string NMD::CMP_SULT_S(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4388,9 +4388,9 @@ std::string NMD::CMP_SULT_S(uint64 instruction)
*/
std::string NMD::CMP_SUN_D(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4412,9 +4412,9 @@ std::string NMD::CMP_SUN_D(uint64 instruction)
*/
std::string NMD::CMP_SUNE_D(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4436,9 +4436,9 @@ std::string NMD::CMP_SUNE_D(uint64 instruction)
*/
std::string NMD::CMP_SUNE_S(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4460,9 +4460,9 @@ std::string NMD::CMP_SUNE_S(uint64 instruction)
*/
std::string NMD::CMP_SUN_S(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4484,9 +4484,9 @@ std::string NMD::CMP_SUN_S(uint64 instruction)
*/
std::string NMD::CMP_UEQ_D(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4508,9 +4508,9 @@ std::string NMD::CMP_UEQ_D(uint64 instruction)
*/
std::string NMD::CMP_UEQ_S(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4532,9 +4532,9 @@ std::string NMD::CMP_UEQ_S(uint64 instruction)
*/
std::string NMD::CMP_ULE_D(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4556,9 +4556,9 @@ std::string NMD::CMP_ULE_D(uint64 instruction)
*/
std::string NMD::CMP_ULE_S(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4580,9 +4580,9 @@ std::string NMD::CMP_ULE_S(uint64 instruction)
*/
std::string NMD::CMP_ULT_D(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4604,9 +4604,9 @@ std::string NMD::CMP_ULT_D(uint64 instruction)
*/
std::string NMD::CMP_ULT_S(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4628,9 +4628,9 @@ std::string NMD::CMP_ULT_S(uint64 instruction)
*/
std::string NMD::CMP_UN_D(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4652,9 +4652,9 @@ std::string NMD::CMP_UN_D(uint64 instruction)
*/
std::string NMD::CMP_UNE_D(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4676,9 +4676,9 @@ std::string NMD::CMP_UNE_D(uint64 instruction)
*/
std::string NMD::CMP_UNE_S(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4700,9 +4700,9 @@ std::string NMD::CMP_UNE_S(uint64 instruction)
*/
std::string NMD::CMP_UN_S(uint64 instruction)
{
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4725,8 +4725,8 @@ std::string NMD::CMP_UN_S(uint64 instruction)
std::string NMD::CMPGDU_EQ_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -4749,8 +4749,8 @@ std::string NMD::CMPGDU_EQ_QB(uint64 instruction)
std::string NMD::CMPGDU_LE_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -4773,8 +4773,8 @@ std::string NMD::CMPGDU_LE_QB(uint64 instruction)
std::string NMD::CMPGDU_LT_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -4797,8 +4797,8 @@ std::string NMD::CMPGDU_LT_QB(uint64 instruction)
std::string NMD::CMPGU_EQ_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -4821,8 +4821,8 @@ std::string NMD::CMPGU_EQ_QB(uint64 instruction)
std::string NMD::CMPGU_LE_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -4845,8 +4845,8 @@ std::string NMD::CMPGU_LE_QB(uint64 instruction)
std::string NMD::CMPGU_LT_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -4954,8 +4954,8 @@ std::string NMD::COP2_1(uint64 instruction)
*/
std::string NMD::CTC1(uint64 instruction)
{
- uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
+ uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string cs = CPR(copy(cs_value));
@@ -4976,8 +4976,8 @@ std::string NMD::CTC1(uint64 instruction)
*/
std::string NMD::CTC2(uint64 instruction)
{
- uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
+ uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string cs = CPR(copy(cs_value));
@@ -4998,8 +4998,8 @@ std::string NMD::CTC2(uint64 instruction)
*/
std::string NMD::CVT_D_L(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -5020,8 +5020,8 @@ std::string NMD::CVT_D_L(uint64 instruction)
*/
std::string NMD::CVT_D_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -5042,8 +5042,8 @@ std::string NMD::CVT_D_S(uint64 instruction)
*/
std::string NMD::CVT_D_W(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -5064,8 +5064,8 @@ std::string NMD::CVT_D_W(uint64 instruction)
*/
std::string NMD::CVT_L_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -5086,8 +5086,8 @@ std::string NMD::CVT_L_D(uint64 instruction)
*/
std::string NMD::CVT_L_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -5108,8 +5108,8 @@ std::string NMD::CVT_L_S(uint64 instruction)
*/
std::string NMD::CVT_S_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -5130,8 +5130,8 @@ std::string NMD::CVT_S_D(uint64 instruction)
*/
std::string NMD::CVT_S_L(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -5152,8 +5152,8 @@ std::string NMD::CVT_S_L(uint64 instruction)
*/
std::string NMD::CVT_S_PL(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -5174,8 +5174,8 @@ std::string NMD::CVT_S_PL(uint64 instruction)
*/
std::string NMD::CVT_S_PU(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -5196,8 +5196,8 @@ std::string NMD::CVT_S_PU(uint64 instruction)
*/
std::string NMD::CVT_S_W(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -5218,8 +5218,8 @@ std::string NMD::CVT_S_W(uint64 instruction)
*/
std::string NMD::CVT_W_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -5240,8 +5240,8 @@ std::string NMD::CVT_W_D(uint64 instruction)
*/
std::string NMD::CVT_W_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -5285,8 +5285,8 @@ std::string NMD::DADDIU_48_(uint64 instruction)
std::string NMD::DADDIU_NEG_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -5309,8 +5309,8 @@ std::string NMD::DADDIU_NEG_(uint64 instruction)
std::string NMD::DADDIU_U12_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -5333,8 +5333,8 @@ std::string NMD::DADDIU_U12_(uint64 instruction)
std::string NMD::DADD(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -5357,8 +5357,8 @@ std::string NMD::DADD(uint64 instruction)
std::string NMD::DADDU(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -5425,8 +5425,8 @@ std::string NMD::DCLZ(uint64 instruction)
std::string NMD::DDIV(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -5449,8 +5449,8 @@ std::string NMD::DDIV(uint64 instruction)
std::string NMD::DDIVU(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -5491,9 +5491,9 @@ std::string NMD::DERET(uint64 instruction)
std::string NMD::DEXTM(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
+ uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
- uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -5517,9 +5517,9 @@ std::string NMD::DEXTM(uint64 instruction)
std::string NMD::DEXT(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
+ uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
- uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -5543,9 +5543,9 @@ std::string NMD::DEXT(uint64 instruction)
std::string NMD::DEXTU(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
+ uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
- uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -5569,9 +5569,9 @@ std::string NMD::DEXTU(uint64 instruction)
std::string NMD::DINSM(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
+ uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
- uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -5597,9 +5597,9 @@ std::string NMD::DINSM(uint64 instruction)
std::string NMD::DINS(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
+ uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
- uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -5625,9 +5625,9 @@ std::string NMD::DINS(uint64 instruction)
std::string NMD::DINSU(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
+ uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
- uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -5673,8 +5673,8 @@ std::string NMD::DI(uint64 instruction)
std::string NMD::DIV(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -5696,8 +5696,8 @@ std::string NMD::DIV(uint64 instruction)
*/
std::string NMD::DIV_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
@@ -5720,8 +5720,8 @@ std::string NMD::DIV_D(uint64 instruction)
*/
std::string NMD::DIV_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
@@ -5745,8 +5745,8 @@ std::string NMD::DIV_S(uint64 instruction)
std::string NMD::DIVU(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -5769,9 +5769,9 @@ std::string NMD::DIVU(uint64 instruction)
std::string NMD::DLSA(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
+ uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 u2_value = extract_u2_10_9(instruction);
- uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -5862,8 +5862,8 @@ std::string NMD::DMFC1(uint64 instruction)
*/
std::string NMD::DMFC2(uint64 instruction)
{
- uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
+ uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string cs = CPR(copy(cs_value));
@@ -5909,8 +5909,8 @@ std::string NMD::DMFGC0(uint64 instruction)
std::string NMD::DMOD(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -5933,8 +5933,8 @@ std::string NMD::DMOD(uint64 instruction)
std::string NMD::DMODU(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -6002,8 +6002,8 @@ std::string NMD::DMTC1(uint64 instruction)
*/
std::string NMD::DMTC2(uint64 instruction)
{
- uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
+ uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string cs = CPR(copy(cs_value));
@@ -6069,8 +6069,8 @@ std::string NMD::DMT(uint64 instruction)
std::string NMD::DMUH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -6093,8 +6093,8 @@ std::string NMD::DMUH(uint64 instruction)
std::string NMD::DMUHU(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -6117,8 +6117,8 @@ std::string NMD::DMUHU(uint64 instruction)
std::string NMD::DMUL(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -6141,8 +6141,8 @@ std::string NMD::DMUL(uint64 instruction)
std::string NMD::DMULU(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -6165,8 +6165,8 @@ std::string NMD::DMULU(uint64 instruction)
std::string NMD::DPA_W_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -6189,8 +6189,8 @@ std::string NMD::DPA_W_PH(uint64 instruction)
std::string NMD::DPAQ_SA_L_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -6213,8 +6213,8 @@ std::string NMD::DPAQ_SA_L_W(uint64 instruction)
std::string NMD::DPAQ_S_W_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -6237,8 +6237,8 @@ std::string NMD::DPAQ_S_W_PH(uint64 instruction)
std::string NMD::DPAQX_SA_W_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -6261,8 +6261,8 @@ std::string NMD::DPAQX_SA_W_PH(uint64 instruction)
std::string NMD::DPAQX_S_W_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -6285,8 +6285,8 @@ std::string NMD::DPAQX_S_W_PH(uint64 instruction)
std::string NMD::DPAU_H_QBL(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -6309,8 +6309,8 @@ std::string NMD::DPAU_H_QBL(uint64 instruction)
std::string NMD::DPAU_H_QBR(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -6333,8 +6333,8 @@ std::string NMD::DPAU_H_QBR(uint64 instruction)
std::string NMD::DPAX_W_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -6357,8 +6357,8 @@ std::string NMD::DPAX_W_PH(uint64 instruction)
std::string NMD::DPS_W_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -6381,8 +6381,8 @@ std::string NMD::DPS_W_PH(uint64 instruction)
std::string NMD::DPSQ_SA_L_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -6405,8 +6405,8 @@ std::string NMD::DPSQ_SA_L_W(uint64 instruction)
std::string NMD::DPSQ_S_W_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -6429,8 +6429,8 @@ std::string NMD::DPSQ_S_W_PH(uint64 instruction)
std::string NMD::DPSQX_SA_W_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -6453,8 +6453,8 @@ std::string NMD::DPSQX_SA_W_PH(uint64 instruction)
std::string NMD::DPSQX_S_W_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -6477,8 +6477,8 @@ std::string NMD::DPSQX_S_W_PH(uint64 instruction)
std::string NMD::DPSU_H_QBL(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -6501,8 +6501,8 @@ std::string NMD::DPSU_H_QBL(uint64 instruction)
std::string NMD::DPSU_H_QBR(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -6525,8 +6525,8 @@ std::string NMD::DPSU_H_QBR(uint64 instruction)
std::string NMD::DPSX_W_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -6549,8 +6549,8 @@ std::string NMD::DPSX_W_PH(uint64 instruction)
std::string NMD::DROTR(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -6573,8 +6573,8 @@ std::string NMD::DROTR(uint64 instruction)
std::string NMD::DROTR32(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -6597,8 +6597,8 @@ std::string NMD::DROTR32(uint64 instruction)
std::string NMD::DROTRV(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -6621,9 +6621,9 @@ std::string NMD::DROTRV(uint64 instruction)
std::string NMD::DROTX(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 shift_value = extract_shift_5_4_3_2_1_0(instruction);
- uint64 shiftx_value = extract_shiftx_11_10_9_8_7_6(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 shiftx_value = extract_shiftx_11_10_9_8_7_6(instruction);
+ uint64 shift_value = extract_shift_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -6647,8 +6647,8 @@ std::string NMD::DROTX(uint64 instruction)
std::string NMD::DSLL(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -6671,8 +6671,8 @@ std::string NMD::DSLL(uint64 instruction)
std::string NMD::DSLL32(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -6695,8 +6695,8 @@ std::string NMD::DSLL32(uint64 instruction)
std::string NMD::DSLLV(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -6719,8 +6719,8 @@ std::string NMD::DSLLV(uint64 instruction)
std::string NMD::DSRA(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -6743,8 +6743,8 @@ std::string NMD::DSRA(uint64 instruction)
std::string NMD::DSRA32(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -6767,8 +6767,8 @@ std::string NMD::DSRA32(uint64 instruction)
std::string NMD::DSRAV(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -6791,8 +6791,8 @@ std::string NMD::DSRAV(uint64 instruction)
std::string NMD::DSRL(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -6815,8 +6815,8 @@ std::string NMD::DSRL(uint64 instruction)
std::string NMD::DSRL32(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -6839,8 +6839,8 @@ std::string NMD::DSRL32(uint64 instruction)
std::string NMD::DSRLV(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -6863,8 +6863,8 @@ std::string NMD::DSRLV(uint64 instruction)
std::string NMD::DSUB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -6887,8 +6887,8 @@ std::string NMD::DSUB(uint64 instruction)
std::string NMD::DSUBU(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -7112,8 +7112,8 @@ std::string NMD::EXTD(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
uint64 shift_value = extract_shift_10_9_8_7_6(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -7138,8 +7138,8 @@ std::string NMD::EXTD32(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
uint64 shift_value = extract_shift_10_9_8_7_6(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -7187,8 +7187,8 @@ std::string NMD::EXTPDP(uint64 instruction)
std::string NMD::EXTPDPV(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string rt = GPR(copy(rt_value));
std::string ac = AC(copy(ac_value));
@@ -7235,8 +7235,8 @@ std::string NMD::EXTP(uint64 instruction)
std::string NMD::EXTPV(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string rt = GPR(copy(rt_value));
std::string ac = AC(copy(ac_value));
@@ -7355,8 +7355,8 @@ std::string NMD::EXTR_W(uint64 instruction)
std::string NMD::EXTRV_RS_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string rt = GPR(copy(rt_value));
std::string ac = AC(copy(ac_value));
@@ -7379,8 +7379,8 @@ std::string NMD::EXTRV_RS_W(uint64 instruction)
std::string NMD::EXTRV_R_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string rt = GPR(copy(rt_value));
std::string ac = AC(copy(ac_value));
@@ -7403,8 +7403,8 @@ std::string NMD::EXTRV_R_W(uint64 instruction)
std::string NMD::EXTRV_S_H(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string rt = GPR(copy(rt_value));
std::string ac = AC(copy(ac_value));
@@ -7427,8 +7427,8 @@ std::string NMD::EXTRV_S_H(uint64 instruction)
std::string NMD::EXTRV_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string rt = GPR(copy(rt_value));
std::string ac = AC(copy(ac_value));
@@ -7453,8 +7453,8 @@ std::string NMD::EXTW(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
uint64 shift_value = extract_shift_10_9_8_7_6(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -7477,8 +7477,8 @@ std::string NMD::EXTW(uint64 instruction)
*/
std::string NMD::FLOOR_L_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -7499,8 +7499,8 @@ std::string NMD::FLOOR_L_D(uint64 instruction)
*/
std::string NMD::FLOOR_L_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -7521,8 +7521,8 @@ std::string NMD::FLOOR_L_S(uint64 instruction)
*/
std::string NMD::FLOOR_W_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -7543,8 +7543,8 @@ std::string NMD::FLOOR_W_D(uint64 instruction)
*/
std::string NMD::FLOOR_W_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -7566,8 +7566,8 @@ std::string NMD::FLOOR_W_S(uint64 instruction)
std::string NMD::FORK(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -7852,8 +7852,8 @@ std::string NMD::LB_S9_(uint64 instruction)
std::string NMD::LB_U12_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -7970,8 +7970,8 @@ std::string NMD::LBU_S9_(uint64 instruction)
std::string NMD::LBU_U12_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -8018,8 +8018,8 @@ std::string NMD::LBUE(uint64 instruction)
std::string NMD::LBUX(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -8042,8 +8042,8 @@ std::string NMD::LBUX(uint64 instruction)
std::string NMD::LBX(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -8112,8 +8112,8 @@ std::string NMD::LD_S9_(uint64 instruction)
std::string NMD::LD_U12_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -8326,8 +8326,8 @@ std::string NMD::LDPC_48_(uint64 instruction)
std::string NMD::LDX(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -8350,8 +8350,8 @@ std::string NMD::LDX(uint64 instruction)
std::string NMD::LDXS(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -8444,8 +8444,8 @@ std::string NMD::LH_S9_(uint64 instruction)
std::string NMD::LH_U12_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -8562,8 +8562,8 @@ std::string NMD::LHU_S9_(uint64 instruction)
std::string NMD::LHU_U12_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -8610,8 +8610,8 @@ std::string NMD::LHUE(uint64 instruction)
std::string NMD::LHUX(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -8634,8 +8634,8 @@ std::string NMD::LHUX(uint64 instruction)
std::string NMD::LHUXS(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -8658,8 +8658,8 @@ std::string NMD::LHUXS(uint64 instruction)
std::string NMD::LHXS(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -8682,8 +8682,8 @@ std::string NMD::LHXS(uint64 instruction)
std::string NMD::LHX(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -8798,8 +8798,8 @@ std::string NMD::LLD(uint64 instruction)
std::string NMD::LLDP(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
std::string rt = GPR(copy(rt_value));
std::string ru = GPR(copy(ru_value));
@@ -8846,8 +8846,8 @@ std::string NMD::LLE(uint64 instruction)
std::string NMD::LLWP(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
std::string rt = GPR(copy(rt_value));
std::string ru = GPR(copy(ru_value));
@@ -8870,8 +8870,8 @@ std::string NMD::LLWP(uint64 instruction)
std::string NMD::LLWPE(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
std::string rt = GPR(copy(rt_value));
std::string ru = GPR(copy(ru_value));
@@ -9080,8 +9080,8 @@ std::string NMD::LW_SP_(uint64 instruction)
std::string NMD::LW_U12_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -9364,8 +9364,8 @@ std::string NMD::LWU_S9_(uint64 instruction)
std::string NMD::LWU_U12_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -9388,8 +9388,8 @@ std::string NMD::LWU_U12_(uint64 instruction)
std::string NMD::LWUX(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -9412,8 +9412,8 @@ std::string NMD::LWUX(uint64 instruction)
std::string NMD::LWUXS(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -9436,8 +9436,8 @@ std::string NMD::LWUXS(uint64 instruction)
std::string NMD::LWX(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -9459,9 +9459,9 @@ std::string NMD::LWX(uint64 instruction)
*/
std::string NMD::LWXS_16_(uint64 instruction)
{
- uint64 rd3_value = extract_rd3_3_2_1(instruction);
uint64 rt3_value = extract_rt3_9_8_7(instruction);
uint64 rs3_value = extract_rs3_6_5_4(instruction);
+ uint64 rd3_value = extract_rd3_3_2_1(instruction);
std::string rd3 = GPR(encode_gpr3(rd3_value));
std::string rs3 = GPR(encode_gpr3(rs3_value));
@@ -9484,8 +9484,8 @@ std::string NMD::LWXS_16_(uint64 instruction)
std::string NMD::LWXS_32_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -9508,8 +9508,8 @@ std::string NMD::LWXS_32_(uint64 instruction)
std::string NMD::MADD_DSP_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -9531,8 +9531,8 @@ std::string NMD::MADD_DSP_(uint64 instruction)
*/
std::string NMD::MADDF_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
@@ -9555,8 +9555,8 @@ std::string NMD::MADDF_D(uint64 instruction)
*/
std::string NMD::MADDF_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
@@ -9580,8 +9580,8 @@ std::string NMD::MADDF_S(uint64 instruction)
std::string NMD::MADDU_DSP_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -9604,8 +9604,8 @@ std::string NMD::MADDU_DSP_(uint64 instruction)
std::string NMD::MAQ_S_W_PHL(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -9628,8 +9628,8 @@ std::string NMD::MAQ_S_W_PHL(uint64 instruction)
std::string NMD::MAQ_S_W_PHR(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -9652,8 +9652,8 @@ std::string NMD::MAQ_S_W_PHR(uint64 instruction)
std::string NMD::MAQ_SA_W_PHL(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -9676,8 +9676,8 @@ std::string NMD::MAQ_SA_W_PHL(uint64 instruction)
std::string NMD::MAQ_SA_W_PHR(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -9699,8 +9699,8 @@ std::string NMD::MAQ_SA_W_PHR(uint64 instruction)
*/
std::string NMD::MAX_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
@@ -9723,8 +9723,8 @@ std::string NMD::MAX_D(uint64 instruction)
*/
std::string NMD::MAX_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
@@ -9747,8 +9747,8 @@ std::string NMD::MAX_S(uint64 instruction)
*/
std::string NMD::MAXA_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
@@ -9771,8 +9771,8 @@ std::string NMD::MAXA_D(uint64 instruction)
*/
std::string NMD::MAXA_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
@@ -9841,8 +9841,8 @@ std::string NMD::MFC1(uint64 instruction)
*/
std::string NMD::MFC2(uint64 instruction)
{
- uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
+ uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string cs = CPR(copy(cs_value));
@@ -9933,8 +9933,8 @@ std::string NMD::MFHC1(uint64 instruction)
*/
std::string NMD::MFHC2(uint64 instruction)
{
- uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
+ uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string cs = CPR(copy(cs_value));
@@ -10075,8 +10075,8 @@ std::string NMD::MFTR(uint64 instruction)
*/
std::string NMD::MIN_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
@@ -10099,8 +10099,8 @@ std::string NMD::MIN_D(uint64 instruction)
*/
std::string NMD::MIN_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
@@ -10123,8 +10123,8 @@ std::string NMD::MIN_S(uint64 instruction)
*/
std::string NMD::MINA_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
@@ -10147,8 +10147,8 @@ std::string NMD::MINA_D(uint64 instruction)
*/
std::string NMD::MINA_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
@@ -10172,8 +10172,8 @@ std::string NMD::MINA_S(uint64 instruction)
std::string NMD::MOD(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -10196,8 +10196,8 @@ std::string NMD::MOD(uint64 instruction)
std::string NMD::MODSUB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -10220,8 +10220,8 @@ std::string NMD::MODSUB(uint64 instruction)
std::string NMD::MODU(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -10243,8 +10243,8 @@ std::string NMD::MODU(uint64 instruction)
*/
std::string NMD::MOV_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -10265,8 +10265,8 @@ std::string NMD::MOV_D(uint64 instruction)
*/
std::string NMD::MOV_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -10287,9 +10287,9 @@ std::string NMD::MOV_S(uint64 instruction)
*/
std::string NMD::MOVE_BALC(uint64 instruction)
{
+ uint64 rtz4_value = extract_rtz4_27_26_25_23_22_21(instruction);
uint64 rd1_value = extract_rdl_25_24(instruction);
int64 s_value = extr_sil0il21bs1_il1il1bs20Tmsb21(instruction);
- uint64 rtz4_value = extract_rtz4_27_26_25_23_22_21(instruction);
std::string rd1 = GPR(encode_rd1_from_rd(rd1_value));
std::string rtz4 = GPR(encode_gpr4_zero(rtz4_value));
@@ -10388,8 +10388,8 @@ std::string NMD::MOVE(uint64 instruction)
std::string NMD::MOVN(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -10412,8 +10412,8 @@ std::string NMD::MOVN(uint64 instruction)
std::string NMD::MOVZ(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -10436,8 +10436,8 @@ std::string NMD::MOVZ(uint64 instruction)
std::string NMD::MSUB_DSP_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -10459,8 +10459,8 @@ std::string NMD::MSUB_DSP_(uint64 instruction)
*/
std::string NMD::MSUBF_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
@@ -10483,8 +10483,8 @@ std::string NMD::MSUBF_D(uint64 instruction)
*/
std::string NMD::MSUBF_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
@@ -10508,8 +10508,8 @@ std::string NMD::MSUBF_S(uint64 instruction)
std::string NMD::MSUBU_DSP_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -10577,8 +10577,8 @@ std::string NMD::MTC1(uint64 instruction)
*/
std::string NMD::MTC2(uint64 instruction)
{
- uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
+ uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string cs = CPR(copy(cs_value));
@@ -10669,8 +10669,8 @@ std::string NMD::MTHC1(uint64 instruction)
*/
std::string NMD::MTHC2(uint64 instruction)
{
- uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
+ uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string cs = CPR(copy(cs_value));
@@ -10715,8 +10715,8 @@ std::string NMD::MTHGC0(uint64 instruction)
*/
std::string NMD::MTHI_DSP_(uint64 instruction)
{
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string rs = GPR(copy(rs_value));
std::string ac = AC(copy(ac_value));
@@ -10737,8 +10737,8 @@ std::string NMD::MTHI_DSP_(uint64 instruction)
*/
std::string NMD::MTHLIP(uint64 instruction)
{
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string rs = GPR(copy(rs_value));
std::string ac = AC(copy(ac_value));
@@ -10785,8 +10785,8 @@ std::string NMD::MTHTR(uint64 instruction)
*/
std::string NMD::MTLO_DSP_(uint64 instruction)
{
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string rs = GPR(copy(rs_value));
std::string ac = AC(copy(ac_value));
@@ -10834,8 +10834,8 @@ std::string NMD::MTTR(uint64 instruction)
std::string NMD::MUH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -10858,8 +10858,8 @@ std::string NMD::MUH(uint64 instruction)
std::string NMD::MUHU(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -10882,8 +10882,8 @@ std::string NMD::MUHU(uint64 instruction)
std::string NMD::MUL_32_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -10927,8 +10927,8 @@ std::string NMD::MUL_4X4_(uint64 instruction)
*/
std::string NMD::MUL_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
@@ -10952,8 +10952,8 @@ std::string NMD::MUL_D(uint64 instruction)
std::string NMD::MUL_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -10976,8 +10976,8 @@ std::string NMD::MUL_PH(uint64 instruction)
std::string NMD::MUL_S_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -10999,8 +10999,8 @@ std::string NMD::MUL_S_PH(uint64 instruction)
*/
std::string NMD::MUL_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
@@ -11024,8 +11024,8 @@ std::string NMD::MUL_S(uint64 instruction)
std::string NMD::MULEQ_S_W_PHL(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -11048,8 +11048,8 @@ std::string NMD::MULEQ_S_W_PHL(uint64 instruction)
std::string NMD::MULEQ_S_W_PHR(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -11072,8 +11072,8 @@ std::string NMD::MULEQ_S_W_PHR(uint64 instruction)
std::string NMD::MULEU_S_PH_QBL(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -11096,8 +11096,8 @@ std::string NMD::MULEU_S_PH_QBL(uint64 instruction)
std::string NMD::MULEU_S_PH_QBR(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -11120,8 +11120,8 @@ std::string NMD::MULEU_S_PH_QBR(uint64 instruction)
std::string NMD::MULQ_RS_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -11144,8 +11144,8 @@ std::string NMD::MULQ_RS_PH(uint64 instruction)
std::string NMD::MULQ_RS_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -11168,8 +11168,8 @@ std::string NMD::MULQ_RS_W(uint64 instruction)
std::string NMD::MULQ_S_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -11192,8 +11192,8 @@ std::string NMD::MULQ_S_PH(uint64 instruction)
std::string NMD::MULQ_S_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -11216,8 +11216,8 @@ std::string NMD::MULQ_S_W(uint64 instruction)
std::string NMD::MULSA_W_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -11240,8 +11240,8 @@ std::string NMD::MULSA_W_PH(uint64 instruction)
std::string NMD::MULSAQ_S_W_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -11264,8 +11264,8 @@ std::string NMD::MULSAQ_S_W_PH(uint64 instruction)
std::string NMD::MULT_DSP_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -11288,8 +11288,8 @@ std::string NMD::MULT_DSP_(uint64 instruction)
std::string NMD::MULTU_DSP_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string ac = AC(copy(ac_value));
std::string rs = GPR(copy(rs_value));
@@ -11312,8 +11312,8 @@ std::string NMD::MULTU_DSP_(uint64 instruction)
std::string NMD::MULU(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -11335,8 +11335,8 @@ std::string NMD::MULU(uint64 instruction)
*/
std::string NMD::NEG_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -11357,8 +11357,8 @@ std::string NMD::NEG_D(uint64 instruction)
*/
std::string NMD::NEG_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -11416,8 +11416,8 @@ std::string NMD::NOP_32_(uint64 instruction)
std::string NMD::NOR(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -11484,8 +11484,8 @@ std::string NMD::OR_16_(uint64 instruction)
std::string NMD::OR_32_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -11508,8 +11508,8 @@ std::string NMD::OR_32_(uint64 instruction)
std::string NMD::ORI(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -11532,8 +11532,8 @@ std::string NMD::ORI(uint64 instruction)
std::string NMD::PACKRL_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -11574,8 +11574,8 @@ std::string NMD::PAUSE(uint64 instruction)
std::string NMD::PICK_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -11598,8 +11598,8 @@ std::string NMD::PICK_PH(uint64 instruction)
std::string NMD::PICK_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -11842,8 +11842,8 @@ std::string NMD::PRECEU_PH_QBR(uint64 instruction)
std::string NMD::PRECR_QB_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -11914,8 +11914,8 @@ std::string NMD::PRECR_SRA_R_PH_W(uint64 instruction)
std::string NMD::PRECRQ_PH_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -11938,8 +11938,8 @@ std::string NMD::PRECRQ_PH_W(uint64 instruction)
std::string NMD::PRECRQ_QB_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -11962,8 +11962,8 @@ std::string NMD::PRECRQ_QB_PH(uint64 instruction)
std::string NMD::PRECRQ_RS_PH_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -11986,8 +11986,8 @@ std::string NMD::PRECRQ_RS_PH_W(uint64 instruction)
std::string NMD::PRECRQU_S_QB_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -12009,9 +12009,9 @@ std::string NMD::PRECRQU_S_QB_PH(uint64 instruction)
*/
std::string NMD::PREF_S9_(uint64 instruction)
{
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
uint64 hint_value = extract_hint_25_24_23_22_21(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
std::string hint = IMMEDIATE(copy(hint_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -12034,8 +12034,8 @@ std::string NMD::PREF_S9_(uint64 instruction)
std::string NMD::PREF_U12_(uint64 instruction)
{
uint64 hint_value = extract_hint_25_24_23_22_21(instruction);
- uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
std::string hint = IMMEDIATE(copy(hint_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -12195,8 +12195,8 @@ std::string NMD::RDPGPR(uint64 instruction)
*/
std::string NMD::RECIP_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -12217,8 +12217,8 @@ std::string NMD::RECIP_D(uint64 instruction)
*/
std::string NMD::RECIP_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -12372,8 +12372,8 @@ std::string NMD::RESTORE_JRC_16_(uint64 instruction)
*/
std::string NMD::RESTORE_JRC_32_(uint64 instruction)
{
- uint64 count_value = extract_count_19_18_17_16(instruction);
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
+ uint64 count_value = extract_count_19_18_17_16(instruction);
uint64 u_value = extr_uil3il3bs9Fmsb11(instruction);
uint64 gp_value = extract_gp_2(instruction);
@@ -12417,8 +12417,8 @@ std::string NMD::RESTOREF(uint64 instruction)
*/
std::string NMD::RINT_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -12439,8 +12439,8 @@ std::string NMD::RINT_D(uint64 instruction)
*/
std::string NMD::RINT_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -12462,8 +12462,8 @@ std::string NMD::RINT_S(uint64 instruction)
std::string NMD::ROTR(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -12486,8 +12486,8 @@ std::string NMD::ROTR(uint64 instruction)
std::string NMD::ROTRV(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -12510,10 +12510,10 @@ std::string NMD::ROTRV(uint64 instruction)
std::string NMD::ROTX(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
+ uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
uint64 shiftx_value = extr_shiftxil7il1bs4Fmsb4(instruction);
uint64 stripe_value = extract_stripe_6(instruction);
- uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -12538,8 +12538,8 @@ std::string NMD::ROTX(uint64 instruction)
*/
std::string NMD::ROUND_L_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -12560,8 +12560,8 @@ std::string NMD::ROUND_L_D(uint64 instruction)
*/
std::string NMD::ROUND_L_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -12582,8 +12582,8 @@ std::string NMD::ROUND_L_S(uint64 instruction)
*/
std::string NMD::ROUND_W_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -12604,8 +12604,8 @@ std::string NMD::ROUND_W_D(uint64 instruction)
*/
std::string NMD::ROUND_W_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -12626,8 +12626,8 @@ std::string NMD::ROUND_W_S(uint64 instruction)
*/
std::string NMD::RSQRT_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -12648,8 +12648,8 @@ std::string NMD::RSQRT_D(uint64 instruction)
*/
std::string NMD::RSQRT_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -12808,8 +12808,8 @@ std::string NMD::SB_S9_(uint64 instruction)
std::string NMD::SB_U12_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -12856,8 +12856,8 @@ std::string NMD::SBE(uint64 instruction)
std::string NMD::SBX(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -12928,8 +12928,8 @@ std::string NMD::SCD(uint64 instruction)
std::string NMD::SCDP(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
std::string rt = GPR(copy(rt_value));
std::string ru = GPR(copy(ru_value));
@@ -12976,8 +12976,8 @@ std::string NMD::SCE(uint64 instruction)
std::string NMD::SCWP(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
std::string rt = GPR(copy(rt_value));
std::string ru = GPR(copy(ru_value));
@@ -13000,8 +13000,8 @@ std::string NMD::SCWP(uint64 instruction)
std::string NMD::SCWPE(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
std::string rt = GPR(copy(rt_value));
std::string ru = GPR(copy(ru_value));
@@ -13070,8 +13070,8 @@ std::string NMD::SD_S9_(uint64 instruction)
std::string NMD::SD_U12_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -13324,8 +13324,8 @@ std::string NMD::SDPC_48_(uint64 instruction)
std::string NMD::SDXS(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -13348,8 +13348,8 @@ std::string NMD::SDXS(uint64 instruction)
std::string NMD::SDX(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -13415,8 +13415,8 @@ std::string NMD::SEH(uint64 instruction)
*/
std::string NMD::SEL_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
@@ -13439,8 +13439,8 @@ std::string NMD::SEL_D(uint64 instruction)
*/
std::string NMD::SEL_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
@@ -13463,8 +13463,8 @@ std::string NMD::SEL_S(uint64 instruction)
*/
std::string NMD::SELEQZ_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
@@ -13487,8 +13487,8 @@ std::string NMD::SELEQZ_D(uint64 instruction)
*/
std::string NMD::SELEQZ_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
@@ -13511,8 +13511,8 @@ std::string NMD::SELEQZ_S(uint64 instruction)
*/
std::string NMD::SELNEZ_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
@@ -13535,8 +13535,8 @@ std::string NMD::SELNEZ_D(uint64 instruction)
*/
std::string NMD::SELNEZ_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
@@ -13560,8 +13560,8 @@ std::string NMD::SELNEZ_S(uint64 instruction)
std::string NMD::SEQI(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -13654,8 +13654,8 @@ std::string NMD::SH_S9_(uint64 instruction)
std::string NMD::SH_U12_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -13842,8 +13842,8 @@ std::string NMD::SHLL_S_W(uint64 instruction)
std::string NMD::SHLLV_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rt = GPR(copy(rt_value));
@@ -13866,8 +13866,8 @@ std::string NMD::SHLLV_PH(uint64 instruction)
std::string NMD::SHLLV_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rt = GPR(copy(rt_value));
@@ -13890,8 +13890,8 @@ std::string NMD::SHLLV_QB(uint64 instruction)
std::string NMD::SHLLV_S_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rt = GPR(copy(rt_value));
@@ -13914,8 +13914,8 @@ std::string NMD::SHLLV_S_PH(uint64 instruction)
std::string NMD::SHLLV_S_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rt = GPR(copy(rt_value));
@@ -14058,8 +14058,8 @@ std::string NMD::SHRA_R_W(uint64 instruction)
std::string NMD::SHRAV_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rt = GPR(copy(rt_value));
@@ -14082,8 +14082,8 @@ std::string NMD::SHRAV_PH(uint64 instruction)
std::string NMD::SHRAV_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rt = GPR(copy(rt_value));
@@ -14106,8 +14106,8 @@ std::string NMD::SHRAV_QB(uint64 instruction)
std::string NMD::SHRAV_R_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rt = GPR(copy(rt_value));
@@ -14130,8 +14130,8 @@ std::string NMD::SHRAV_R_PH(uint64 instruction)
std::string NMD::SHRAV_R_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rt = GPR(copy(rt_value));
@@ -14154,8 +14154,8 @@ std::string NMD::SHRAV_R_QB(uint64 instruction)
std::string NMD::SHRAV_R_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rt = GPR(copy(rt_value));
@@ -14226,8 +14226,8 @@ std::string NMD::SHRL_QB(uint64 instruction)
std::string NMD::SHRLV_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rt = GPR(copy(rt_value));
@@ -14250,8 +14250,8 @@ std::string NMD::SHRLV_PH(uint64 instruction)
std::string NMD::SHRLV_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rt = GPR(copy(rt_value));
@@ -14274,8 +14274,8 @@ std::string NMD::SHRLV_QB(uint64 instruction)
std::string NMD::SHX(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -14298,8 +14298,8 @@ std::string NMD::SHX(uint64 instruction)
std::string NMD::SHXS(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -14366,8 +14366,8 @@ std::string NMD::SLL_16_(uint64 instruction)
std::string NMD::SLL_32_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -14390,8 +14390,8 @@ std::string NMD::SLL_32_(uint64 instruction)
std::string NMD::SLLV(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -14414,8 +14414,8 @@ std::string NMD::SLLV(uint64 instruction)
std::string NMD::SLT(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -14438,8 +14438,8 @@ std::string NMD::SLT(uint64 instruction)
std::string NMD::SLTI(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -14462,8 +14462,8 @@ std::string NMD::SLTI(uint64 instruction)
std::string NMD::SLTIU(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -14486,8 +14486,8 @@ std::string NMD::SLTIU(uint64 instruction)
std::string NMD::SLTU(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -14510,8 +14510,8 @@ std::string NMD::SLTU(uint64 instruction)
std::string NMD::SOV(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -14553,8 +14553,8 @@ std::string NMD::SPECIAL2(uint64 instruction)
*/
std::string NMD::SQRT_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -14575,8 +14575,8 @@ std::string NMD::SQRT_D(uint64 instruction)
*/
std::string NMD::SQRT_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -14622,8 +14622,8 @@ std::string NMD::SRA(uint64 instruction)
std::string NMD::SRAV(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -14670,8 +14670,8 @@ std::string NMD::SRL_16_(uint64 instruction)
std::string NMD::SRL_32_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -14694,8 +14694,8 @@ std::string NMD::SRL_32_(uint64 instruction)
std::string NMD::SRLV(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -14718,8 +14718,8 @@ std::string NMD::SRLV(uint64 instruction)
std::string NMD::SUB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -14741,8 +14741,8 @@ std::string NMD::SUB(uint64 instruction)
*/
std::string NMD::SUB_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
@@ -14765,8 +14765,8 @@ std::string NMD::SUB_D(uint64 instruction)
*/
std::string NMD::SUB_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
std::string fd = FPR(copy(fd_value));
@@ -14790,8 +14790,8 @@ std::string NMD::SUB_S(uint64 instruction)
std::string NMD::SUBQ_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -14815,8 +14815,8 @@ std::string NMD::SUBQ_PH(uint64 instruction)
std::string NMD::SUBQ_S_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -14840,8 +14840,8 @@ std::string NMD::SUBQ_S_PH(uint64 instruction)
std::string NMD::SUBQ_S_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -14865,8 +14865,8 @@ std::string NMD::SUBQ_S_W(uint64 instruction)
std::string NMD::SUBQH_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -14890,8 +14890,8 @@ std::string NMD::SUBQH_PH(uint64 instruction)
std::string NMD::SUBQH_R_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -14915,8 +14915,8 @@ std::string NMD::SUBQH_R_PH(uint64 instruction)
std::string NMD::SUBQH_R_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -14940,8 +14940,8 @@ std::string NMD::SUBQH_R_W(uint64 instruction)
std::string NMD::SUBQH_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -14963,9 +14963,9 @@ std::string NMD::SUBQH_W(uint64 instruction)
*/
std::string NMD::SUBU_16_(uint64 instruction)
{
- uint64 rd3_value = extract_rd3_3_2_1(instruction);
uint64 rt3_value = extract_rt3_9_8_7(instruction);
uint64 rs3_value = extract_rs3_6_5_4(instruction);
+ uint64 rd3_value = extract_rd3_3_2_1(instruction);
std::string rd3 = GPR(encode_gpr3(rd3_value));
std::string rs3 = GPR(encode_gpr3(rs3_value));
@@ -14988,8 +14988,8 @@ std::string NMD::SUBU_16_(uint64 instruction)
std::string NMD::SUBU_32_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -15012,8 +15012,8 @@ std::string NMD::SUBU_32_(uint64 instruction)
std::string NMD::SUBU_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -15036,8 +15036,8 @@ std::string NMD::SUBU_PH(uint64 instruction)
std::string NMD::SUBU_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -15060,8 +15060,8 @@ std::string NMD::SUBU_QB(uint64 instruction)
std::string NMD::SUBU_S_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -15084,8 +15084,8 @@ std::string NMD::SUBU_S_PH(uint64 instruction)
std::string NMD::SUBU_S_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -15109,8 +15109,8 @@ std::string NMD::SUBU_S_QB(uint64 instruction)
std::string NMD::SUBUH_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -15134,8 +15134,8 @@ std::string NMD::SUBUH_QB(uint64 instruction)
std::string NMD::SUBUH_R_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -15296,8 +15296,8 @@ std::string NMD::SW_SP_(uint64 instruction)
std::string NMD::SW_U12_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -15534,8 +15534,8 @@ std::string NMD::SWPC_48_(uint64 instruction)
std::string NMD::SWX(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -15558,8 +15558,8 @@ std::string NMD::SWX(uint64 instruction)
std::string NMD::SWXS(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -15943,8 +15943,8 @@ std::string NMD::TNE(uint64 instruction)
*/
std::string NMD::TRUNC_L_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -15965,8 +15965,8 @@ std::string NMD::TRUNC_L_D(uint64 instruction)
*/
std::string NMD::TRUNC_L_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -15987,8 +15987,8 @@ std::string NMD::TRUNC_L_S(uint64 instruction)
*/
std::string NMD::TRUNC_W_D(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -16009,8 +16009,8 @@ std::string NMD::TRUNC_W_D(uint64 instruction)
*/
std::string NMD::TRUNC_W_S(uint64 instruction)
{
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -16287,8 +16287,8 @@ std::string NMD::XOR_16_(uint64 instruction)
std::string NMD::XOR_32_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -16311,8 +16311,8 @@ std::string NMD::XOR_32_(uint64 instruction)
std::string NMD::XORI(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 19/44] disas: nanoMIPS: Name some functions in a more descriptive way
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (17 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 18/44] disas: nanoMIPS: Fix order of some invocations Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 20/44] disas: nanoMIPS: Fix an FP-related misnomer 1 Aleksandar Markovic
` (25 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Rename some functions that have names that are hard to understand.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
disas/nanomips.cpp | 112 ++++++++++++++++++++++++++---------------------------
disas/nanomips.h | 32 +++++++--------
2 files changed, 72 insertions(+), 72 deletions(-)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index d8829f5..281d8d9 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -687,7 +687,7 @@ uint64 NMD::extract_shift3_2_1_0(uint64 instruction)
}
-uint64 NMD::extr_uil3il3bs9Fmsb11(uint64 instruction)
+uint64 NMD::extract_u_11_10_9_8_7_6_5_4_3__s3(uint64 instruction)
{
uint64 value = 0;
value |= extract_bits(instruction, 3, 9) << 3;
@@ -711,7 +711,7 @@ uint64 NMD::extract_rtz3_9_8_7(uint64 instruction)
}
-uint64 NMD::extr_uil1il1bs17Fmsb17(uint64 instruction)
+uint64 NMD::extract_u_17_to_1__s1(uint64 instruction)
{
uint64 value = 0;
value |= extract_bits(instruction, 1, 17) << 1;
@@ -771,7 +771,7 @@ uint64 NMD::extract_shift_4_3_2_1_0(uint64 instruction)
}
-uint64 NMD::extr_shiftxil7il1bs4Fmsb4(uint64 instruction)
+uint64 NMD::extract_shiftx_10_9_8_7__s1(uint64 instruction)
{
uint64 value = 0;
value |= extract_bits(instruction, 7, 4) << 1;
@@ -840,7 +840,7 @@ uint64 NMD::extract_rs_20_19_18_17_16(uint64 instruction)
}
-uint64 NMD::extr_uil1il1bs2Fmsb2(uint64 instruction)
+uint64 NMD::extract_u_2_1__s1(uint64 instruction)
{
uint64 value = 0;
value |= extract_bits(instruction, 1, 2) << 1;
@@ -938,7 +938,7 @@ uint64 NMD::extract_rs_4_3_2_1_0(uint64 instruction)
}
-uint64 NMD::extr_uil3il3bs18Fmsb20(uint64 instruction)
+uint64 NMD::extract_u_20_to_3__s3(uint64 instruction)
{
uint64 value = 0;
value |= extract_bits(instruction, 3, 18) << 3;
@@ -946,7 +946,7 @@ uint64 NMD::extr_uil3il3bs18Fmsb20(uint64 instruction)
}
-uint64 NMD::extr_uil0il2bs4Fmsb5(uint64 instruction)
+uint64 NMD::extract_u_3_2_1_0__s2(uint64 instruction)
{
uint64 value = 0;
value |= extract_bits(instruction, 0, 4) << 2;
@@ -962,7 +962,7 @@ uint64 NMD::extract_cofun_25_24_23(uint64 instruction)
}
-uint64 NMD::extr_uil0il2bs3Fmsb4(uint64 instruction)
+uint64 NMD::extract_u_2_1_0__s2(uint64 instruction)
{
uint64 value = 0;
value |= extract_bits(instruction, 0, 3) << 2;
@@ -1229,7 +1229,7 @@ uint64 NMD::extract_msbt_10_9_8_7_6(uint64 instruction)
}
-uint64 NMD::extr_uil0il2bs6Fmsb7(uint64 instruction)
+uint64 NMD::extract_u_5_4_3_2_1_0__s2(uint64 instruction)
{
uint64 value = 0;
value |= extract_bits(instruction, 0, 6) << 2;
@@ -1263,7 +1263,7 @@ uint64 NMD::extract_rs3_6_5_4(uint64 instruction)
}
-uint64 NMD::extr_uil0il32bs32Fmsb63(uint64 instruction)
+uint64 NMD::extract_u_31_to_0__s32(uint64 instruction)
{
uint64 value = 0;
value |= extract_bits(instruction, 0, 32) << 32;
@@ -1311,7 +1311,7 @@ uint64 NMD::extract_op_25_24_23_22_21(uint64 instruction)
}
-uint64 NMD::extr_uil0il2bs7Fmsb8(uint64 instruction)
+uint64 NMD::extract_u_6_5_4_3_2_1_0__s2(uint64 instruction)
{
uint64 value = 0;
value |= extract_bits(instruction, 0, 7) << 2;
@@ -1343,7 +1343,7 @@ uint64 NMD::extract_eu_3_2_1_0(uint64 instruction)
}
-uint64 NMD::extr_uil4il4bs4Fmsb7(uint64 instruction)
+uint64 NMD::extract_u_7_6_5_4__s4(uint64 instruction)
{
uint64 value = 0;
value |= extract_bits(instruction, 4, 4) << 4;
@@ -1387,7 +1387,7 @@ uint64 NMD::extract_u_20_19_18_17_16_15_14_13(uint64 instruction)
}
-uint64 NMD::extr_uil2il2bs16Fmsb17(uint64 instruction)
+uint64 NMD::extract_u_17_to_2__s2(uint64 instruction)
{
uint64 value = 0;
value |= extract_bits(instruction, 2, 16) << 2;
@@ -1437,7 +1437,7 @@ uint64 NMD::extract_u_1_0(uint64 instruction)
}
-uint64 NMD::extr_uil3il3bs1_il8il2bs1Fmsb3(uint64 instruction)
+uint64 NMD::extract_u_3_8__s2(uint64 instruction)
{
uint64 value = 0;
value |= extract_bits(instruction, 3, 1) << 3;
@@ -1454,7 +1454,7 @@ uint64 NMD::extract_fd_10_9_8_7_6(uint64 instruction)
}
-uint64 NMD::extr_uil0il2bs5Fmsb6(uint64 instruction)
+uint64 NMD::extract_u_4_3_2_1_0__s2(uint64 instruction)
{
uint64 value = 0;
value |= extract_bits(instruction, 0, 5) << 2;
@@ -1487,7 +1487,7 @@ uint64 NMD::extract_ct_25_24_23_22_21(uint64 instruction)
}
-uint64 NMD::extr_uil2il2bs19Fmsb20(uint64 instruction)
+uint64 NMD::extract_u_20_to_2__s2(uint64 instruction)
{
uint64 value = 0;
value |= extract_bits(instruction, 2, 19) << 2;
@@ -1505,7 +1505,7 @@ int64 NMD::extract_s_4_2_1_0(uint64 instruction)
}
-uint64 NMD::extr_uil0il1bs4Fmsb4(uint64 instruction)
+uint64 NMD::extract_u_3_2_1_0__s1(uint64 instruction)
{
uint64 value = 0;
value |= extract_bits(instruction, 0, 4) << 1;
@@ -1539,7 +1539,7 @@ bool NMD::BEQC_16__cond(uint64 instruction)
{
uint64 rs3 = extract_rs3_6_5_4(instruction);
uint64 rt3 = extract_rt3_9_8_7(instruction);
- uint64 u = extr_uil0il1bs4Fmsb4(instruction);
+ uint64 u = extract_u_3_2_1_0__s1(instruction);
return rs3 < rt3 && u != 0;
}
@@ -1548,7 +1548,7 @@ bool NMD::BNEC_16__cond(uint64 instruction)
{
uint64 rs3 = extract_rs3_6_5_4(instruction);
uint64 rt3 = extract_rt3_9_8_7(instruction);
- uint64 u = extr_uil0il1bs4Fmsb4(instruction);
+ uint64 u = extract_u_3_2_1_0__s1(instruction);
return rs3 >= rt3 && u != 0;
}
@@ -1562,7 +1562,7 @@ bool NMD::MOVE_cond(uint64 instruction)
bool NMD::P16_BR1_cond(uint64 instruction)
{
- uint64 u = extr_uil0il1bs4Fmsb4(instruction);
+ uint64 u = extract_u_3_2_1_0__s1(instruction);
return u != 0;
}
@@ -1890,7 +1890,7 @@ std::string NMD::ADDIU_GP_B_(uint64 instruction)
std::string NMD::ADDIU_GP_W_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extr_uil2il2bs19Fmsb20(instruction);
+ uint64 u_value = extract_u_20_to_2__s2(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -1933,7 +1933,7 @@ std::string NMD::ADDIU_NEG_(uint64 instruction)
*/
std::string NMD::ADDIU_R1_SP_(uint64 instruction)
{
- uint64 u_value = extr_uil0il2bs6Fmsb7(instruction);
+ uint64 u_value = extract_u_5_4_3_2_1_0__s2(instruction);
uint64 rt3_value = extract_rt3_9_8_7(instruction);
std::string rt3 = GPR(encode_gpr3(rt3_value));
@@ -1954,7 +1954,7 @@ std::string NMD::ADDIU_R1_SP_(uint64 instruction)
*/
std::string NMD::ADDIU_R2_(uint64 instruction)
{
- uint64 u_value = extr_uil0il2bs3Fmsb4(instruction);
+ uint64 u_value = extract_u_2_1_0__s2(instruction);
uint64 rt3_value = extract_rt3_9_8_7(instruction);
uint64 rs3_value = extract_rs3_6_5_4(instruction);
@@ -2874,7 +2874,7 @@ std::string NMD::BC2NEZC(uint64 instruction)
*/
std::string NMD::BEQC_16_(uint64 instruction)
{
- uint64 u_value = extr_uil0il1bs4Fmsb4(instruction);
+ uint64 u_value = extract_u_3_2_1_0__s1(instruction);
uint64 rt3_value = extract_rt3_9_8_7(instruction);
uint64 rs3_value = extract_rs3_6_5_4(instruction);
@@ -3160,7 +3160,7 @@ std::string NMD::BLTUC(uint64 instruction)
*/
std::string NMD::BNEC_16_(uint64 instruction)
{
- uint64 u_value = extr_uil0il1bs4Fmsb4(instruction);
+ uint64 u_value = extract_u_3_2_1_0__s1(instruction);
uint64 rt3_value = extract_rt3_9_8_7(instruction);
uint64 rs3_value = extract_rs3_6_5_4(instruction);
@@ -5795,7 +5795,7 @@ std::string NMD::DLSA(uint64 instruction)
std::string NMD::DLUI_48_(uint64 instruction)
{
uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
- uint64 u_value = extr_uil0il32bs32Fmsb63(instruction);
+ uint64 u_value = extract_u_31_to_0__s32(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -8066,7 +8066,7 @@ std::string NMD::LBX(uint64 instruction)
std::string NMD::LD_GP_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extr_uil3il3bs18Fmsb20(instruction);
+ uint64 u_value = extract_u_20_to_3__s3(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -8136,7 +8136,7 @@ std::string NMD::LD_U12_(uint64 instruction)
std::string NMD::LDC1_GP_(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 u_value = extr_uil2il2bs16Fmsb17(instruction);
+ uint64 u_value = extract_u_17_to_2__s2(instruction);
std::string ft = FPR(copy(ft_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -8373,7 +8373,7 @@ std::string NMD::LDXS(uint64 instruction)
*/
std::string NMD::LH_16_(uint64 instruction)
{
- uint64 u_value = extr_uil1il1bs2Fmsb2(instruction);
+ uint64 u_value = extract_u_2_1__s1(instruction);
uint64 rt3_value = extract_rt3_9_8_7(instruction);
uint64 rs3_value = extract_rs3_6_5_4(instruction);
@@ -8398,7 +8398,7 @@ std::string NMD::LH_16_(uint64 instruction)
std::string NMD::LH_GP_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extr_uil1il1bs17Fmsb17(instruction);
+ uint64 u_value = extract_u_17_to_1__s1(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -8491,7 +8491,7 @@ std::string NMD::LHE(uint64 instruction)
*/
std::string NMD::LHU_16_(uint64 instruction)
{
- uint64 u_value = extr_uil1il1bs2Fmsb2(instruction);
+ uint64 u_value = extract_u_2_1__s1(instruction);
uint64 rt3_value = extract_rt3_9_8_7(instruction);
uint64 rs3_value = extract_rs3_6_5_4(instruction);
@@ -8516,7 +8516,7 @@ std::string NMD::LHU_16_(uint64 instruction)
std::string NMD::LHU_GP_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extr_uil1il1bs17Fmsb17(instruction);
+ uint64 u_value = extract_u_17_to_1__s1(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -8941,7 +8941,7 @@ std::string NMD::LUI(uint64 instruction)
*/
std::string NMD::LW_16_(uint64 instruction)
{
- uint64 u_value = extr_uil0il2bs4Fmsb5(instruction);
+ uint64 u_value = extract_u_3_2_1_0__s2(instruction);
uint64 rt3_value = extract_rt3_9_8_7(instruction);
uint64 rs3_value = extract_rs3_6_5_4(instruction);
@@ -8967,7 +8967,7 @@ std::string NMD::LW_4X4_(uint64 instruction)
{
uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
uint64 rt4_value = extract_rt4_9_7_6_5(instruction);
- uint64 u_value = extr_uil3il3bs1_il8il2bs1Fmsb3(instruction);
+ uint64 u_value = extract_u_3_8__s2(instruction);
std::string rt4 = GPR(encode_gpr4(rt4_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -8990,7 +8990,7 @@ std::string NMD::LW_4X4_(uint64 instruction)
std::string NMD::LW_GP_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extr_uil2il2bs19Fmsb20(instruction);
+ uint64 u_value = extract_u_20_to_2__s2(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -9011,7 +9011,7 @@ std::string NMD::LW_GP_(uint64 instruction)
*/
std::string NMD::LW_GP16_(uint64 instruction)
{
- uint64 u_value = extr_uil0il2bs7Fmsb8(instruction);
+ uint64 u_value = extract_u_6_5_4_3_2_1_0__s2(instruction);
uint64 rt3_value = extract_rt3_9_8_7(instruction);
std::string rt3 = GPR(encode_gpr3(rt3_value));
@@ -9058,7 +9058,7 @@ std::string NMD::LW_S9_(uint64 instruction)
std::string NMD::LW_SP_(uint64 instruction)
{
uint64 rt_value = extract_rt_9_8_7_6_5(instruction);
- uint64 u_value = extr_uil0il2bs5Fmsb6(instruction);
+ uint64 u_value = extract_u_4_3_2_1_0__s2(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -9104,7 +9104,7 @@ std::string NMD::LW_U12_(uint64 instruction)
std::string NMD::LWC1_GP_(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 u_value = extr_uil2il2bs16Fmsb17(instruction);
+ uint64 u_value = extract_u_17_to_2__s2(instruction);
std::string ft = FPR(copy(ft_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -9318,7 +9318,7 @@ std::string NMD::LWPC_48_(uint64 instruction)
std::string NMD::LWU_GP_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extr_uil2il2bs16Fmsb17(instruction);
+ uint64 u_value = extract_u_17_to_2__s2(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -12329,7 +12329,7 @@ std::string NMD::RESTORE_32_(uint64 instruction)
{
uint64 count_value = extract_count_19_18_17_16(instruction);
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extr_uil3il3bs9Fmsb11(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction);
uint64 gp_value = extract_gp_2(instruction);
std::string u = IMMEDIATE(copy(u_value));
@@ -12352,7 +12352,7 @@ std::string NMD::RESTORE_JRC_16_(uint64 instruction)
{
uint64 count_value = extract_count_3_2_1_0(instruction);
uint64 rt1_value = extract_rtl_11(instruction);
- uint64 u_value = extr_uil4il4bs4Fmsb7(instruction);
+ uint64 u_value = extract_u_7_6_5_4__s4(instruction);
std::string u = IMMEDIATE(copy(u_value));
return img::format("RESTORE.JRC %s%s", u,
@@ -12374,7 +12374,7 @@ std::string NMD::RESTORE_JRC_32_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
uint64 count_value = extract_count_19_18_17_16(instruction);
- uint64 u_value = extr_uil3il3bs9Fmsb11(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction);
uint64 gp_value = extract_gp_2(instruction);
std::string u = IMMEDIATE(copy(u_value));
@@ -12396,7 +12396,7 @@ std::string NMD::RESTORE_JRC_32_(uint64 instruction)
std::string NMD::RESTOREF(uint64 instruction)
{
uint64 count_value = extract_count_19_18_17_16(instruction);
- uint64 u_value = extr_uil3il3bs9Fmsb11(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction);
std::string u = IMMEDIATE(copy(u_value));
std::string count = IMMEDIATE(copy(count_value));
@@ -12511,7 +12511,7 @@ std::string NMD::ROTX(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
- uint64 shiftx_value = extr_shiftxil7il1bs4Fmsb4(instruction);
+ uint64 shiftx_value = extract_shiftx_10_9_8_7__s1(instruction);
uint64 stripe_value = extract_stripe_6(instruction);
uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
@@ -12672,7 +12672,7 @@ std::string NMD::SAVE_16_(uint64 instruction)
{
uint64 count_value = extract_count_3_2_1_0(instruction);
uint64 rt1_value = extract_rtl_11(instruction);
- uint64 u_value = extr_uil4il4bs4Fmsb7(instruction);
+ uint64 u_value = extract_u_7_6_5_4__s4(instruction);
std::string u = IMMEDIATE(copy(u_value));
return img::format("SAVE %s%s", u,
@@ -12694,7 +12694,7 @@ std::string NMD::SAVE_32_(uint64 instruction)
{
uint64 count_value = extract_count_19_18_17_16(instruction);
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extr_uil3il3bs9Fmsb11(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction);
uint64 gp_value = extract_gp_2(instruction);
std::string u = IMMEDIATE(copy(u_value));
@@ -12716,7 +12716,7 @@ std::string NMD::SAVE_32_(uint64 instruction)
std::string NMD::SAVEF(uint64 instruction)
{
uint64 count_value = extract_count_19_18_17_16(instruction);
- uint64 u_value = extr_uil3il3bs9Fmsb11(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction);
std::string u = IMMEDIATE(copy(u_value));
std::string count = IMMEDIATE(copy(count_value));
@@ -13024,7 +13024,7 @@ std::string NMD::SCWPE(uint64 instruction)
std::string NMD::SD_GP_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extr_uil3il3bs18Fmsb20(instruction);
+ uint64 u_value = extract_u_20_to_3__s3(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -13134,7 +13134,7 @@ std::string NMD::SDBBP_32_(uint64 instruction)
std::string NMD::SDC1_GP_(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 u_value = extr_uil2il2bs16Fmsb17(instruction);
+ uint64 u_value = extract_u_17_to_2__s2(instruction);
std::string ft = FPR(copy(ft_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -13584,7 +13584,7 @@ std::string NMD::SEQI(uint64 instruction)
std::string NMD::SH_16_(uint64 instruction)
{
uint64 rtz3_value = extract_rtz3_9_8_7(instruction);
- uint64 u_value = extr_uil1il1bs2Fmsb2(instruction);
+ uint64 u_value = extract_u_2_1__s1(instruction);
uint64 rs3_value = extract_rs3_6_5_4(instruction);
std::string rtz3 = GPR(encode_gpr3_store(rtz3_value));
@@ -13608,7 +13608,7 @@ std::string NMD::SH_16_(uint64 instruction)
std::string NMD::SH_GP_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extr_uil1il1bs17Fmsb17(instruction);
+ uint64 u_value = extract_u_17_to_1__s1(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -15158,7 +15158,7 @@ std::string NMD::SUBUH_R_QB(uint64 instruction)
std::string NMD::SW_16_(uint64 instruction)
{
uint64 rtz3_value = extract_rtz3_9_8_7(instruction);
- uint64 u_value = extr_uil0il2bs4Fmsb5(instruction);
+ uint64 u_value = extract_u_3_2_1_0__s2(instruction);
uint64 rs3_value = extract_rs3_6_5_4(instruction);
std::string rtz3 = GPR(encode_gpr3_store(rtz3_value));
@@ -15183,7 +15183,7 @@ std::string NMD::SW_4X4_(uint64 instruction)
{
uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
uint64 rtz4_value = extract_rtz4_9_7_6_5(instruction);
- uint64 u_value = extr_uil3il3bs1_il8il2bs1Fmsb3(instruction);
+ uint64 u_value = extract_u_3_8__s2(instruction);
std::string rtz4 = GPR(encode_gpr4_zero(rtz4_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -15206,7 +15206,7 @@ std::string NMD::SW_4X4_(uint64 instruction)
std::string NMD::SW_GP16_(uint64 instruction)
{
uint64 rtz3_value = extract_rtz3_9_8_7(instruction);
- uint64 u_value = extr_uil0il2bs7Fmsb8(instruction);
+ uint64 u_value = extract_u_6_5_4_3_2_1_0__s2(instruction);
std::string rtz3 = GPR(encode_gpr3_store(rtz3_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -15228,7 +15228,7 @@ std::string NMD::SW_GP16_(uint64 instruction)
std::string NMD::SW_GP_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 u_value = extr_uil2il2bs19Fmsb20(instruction);
+ uint64 u_value = extract_u_20_to_2__s2(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -15274,7 +15274,7 @@ std::string NMD::SW_S9_(uint64 instruction)
std::string NMD::SW_SP_(uint64 instruction)
{
uint64 rt_value = extract_rt_9_8_7_6_5(instruction);
- uint64 u_value = extr_uil0il2bs5Fmsb6(instruction);
+ uint64 u_value = extract_u_4_3_2_1_0__s2(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -15320,7 +15320,7 @@ std::string NMD::SW_U12_(uint64 instruction)
std::string NMD::SWC1_GP_(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 u_value = extr_uil2il2bs16Fmsb17(instruction);
+ uint64 u_value = extract_u_17_to_2__s2(instruction);
std::string ft = FPR(copy(ft_value));
std::string u = IMMEDIATE(copy(u_value));
diff --git a/disas/nanomips.h b/disas/nanomips.h
index f04a1a8..d3722f6 100644
--- a/disas/nanomips.h
+++ b/disas/nanomips.h
@@ -218,7 +218,7 @@ private:
uint64 extract_shift_20_19_18_17_16(uint64 instruction);
uint64 extract_shift_10_9_8_7_6(uint64 instruction);
uint64 extract_shiftx_11_10_9_8_7_6(uint64 instruction);
- uint64 extr_shiftxil7il1bs4Fmsb4(uint64 instruction);
+ uint64 extract_shiftx_10_9_8_7__s1(uint64 instruction);
uint64 extract_size_20_19_18_17_16(uint64 instruction);
uint64 extract_stripe_6(uint64 instruction);
uint64 extract_stype_20_19_18_17_16(uint64 instruction);
@@ -227,24 +227,24 @@ private:
uint64 extract_u_15_to_0(uint64 instruction);
uint64 extract_u_17_to_0(uint64 instruction);
uint64 extract_u_1_0(uint64 instruction);
- uint64 extr_uil0il1bs4Fmsb4(uint64 instruction);
- uint64 extr_uil0il2bs3Fmsb4(uint64 instruction);
- uint64 extr_uil0il2bs4Fmsb5(uint64 instruction);
- uint64 extr_uil0il2bs5Fmsb6(uint64 instruction);
- uint64 extr_uil0il2bs6Fmsb7(uint64 instruction);
- uint64 extr_uil0il2bs7Fmsb8(uint64 instruction);
- uint64 extr_uil0il32bs32Fmsb63(uint64 instruction);
+ uint64 extract_u_3_2_1_0__s1(uint64 instruction);
+ uint64 extract_u_2_1_0__s2(uint64 instruction);
+ uint64 extract_u_3_2_1_0__s2(uint64 instruction);
+ uint64 extract_u_4_3_2_1_0__s2(uint64 instruction);
+ uint64 extract_u_5_4_3_2_1_0__s2(uint64 instruction);
+ uint64 extract_u_6_5_4_3_2_1_0__s2(uint64 instruction);
+ uint64 extract_u_31_to_0__s32(uint64 instruction);
uint64 extract_u_10(uint64 instruction);
uint64 extract_u_17_16_15_14_13_12_11(uint64 instruction);
uint64 extract_u_20_19_18_17_16_15_14_13(uint64 instruction);
- uint64 extr_uil1il1bs17Fmsb17(uint64 instruction);
- uint64 extr_uil1il1bs2Fmsb2(uint64 instruction);
- uint64 extr_uil2il2bs16Fmsb17(uint64 instruction);
- uint64 extr_uil2il2bs19Fmsb20(uint64 instruction);
- uint64 extr_uil3il3bs18Fmsb20(uint64 instruction);
- uint64 extr_uil3il3bs1_il8il2bs1Fmsb3(uint64 instruction);
- uint64 extr_uil3il3bs9Fmsb11(uint64 instruction);
- uint64 extr_uil4il4bs4Fmsb7(uint64 instruction);
+ uint64 extract_u_17_to_1__s1(uint64 instruction);
+ uint64 extract_u_2_1__s1(uint64 instruction);
+ uint64 extract_u_17_to_2__s2(uint64 instruction);
+ uint64 extract_u_20_to_2__s2(uint64 instruction);
+ uint64 extract_u_20_to_3__s3(uint64 instruction);
+ uint64 extract_u_3_8__s2(uint64 instruction);
+ uint64 extract_u_11_10_9_8_7_6_5_4_3__s3(uint64 instruction);
+ uint64 extract_u_7_6_5_4__s4(uint64 instruction);
bool ADDIU_32__cond(uint64 instruction);
bool ADDIU_RS5__cond(uint64 instruction);
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 20/44] disas: nanoMIPS: Fix an FP-related misnomer 1
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (18 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 19/44] disas: nanoMIPS: Name some functions in a more descriptive way Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 21/44] disas: nanoMIPS: Fix an FP-related misnomer 2 Aleksandar Markovic
` (24 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Rename NMD::extract_fd_10_9_8_7_6(uint64 instruction) to
NMD::extract_fd_15_14_13_12_11(uint64 instruction).
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
disas/nanomips.cpp | 142 ++++++++++++++++++++++++++---------------------------
disas/nanomips.h | 2 +-
2 files changed, 72 insertions(+), 72 deletions(-)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index 281d8d9..bff1900 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -1446,7 +1446,7 @@ uint64 NMD::extract_u_3_8__s2(uint64 instruction)
}
-uint64 NMD::extract_fd_10_9_8_7_6(uint64 instruction)
+uint64 NMD::extract_fd_15_14_13_12_11(uint64 instruction)
{
uint64 value = 0;
value |= extract_bits(instruction, 11, 5);
@@ -1757,7 +1757,7 @@ std::string NMD::ADD_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -1782,7 +1782,7 @@ std::string NMD::ADD_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -3604,7 +3604,7 @@ std::string NMD::CMP_AF_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -3628,7 +3628,7 @@ std::string NMD::CMP_AF_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -3652,7 +3652,7 @@ std::string NMD::CMP_EQ_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -3698,7 +3698,7 @@ std::string NMD::CMP_EQ_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -3722,7 +3722,7 @@ std::string NMD::CMP_LE_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -3768,7 +3768,7 @@ std::string NMD::CMP_LE_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -3792,7 +3792,7 @@ std::string NMD::CMP_LT_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -3838,7 +3838,7 @@ std::string NMD::CMP_LT_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -3862,7 +3862,7 @@ std::string NMD::CMP_NE_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -3886,7 +3886,7 @@ std::string NMD::CMP_NE_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -3910,7 +3910,7 @@ std::string NMD::CMP_OR_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -3934,7 +3934,7 @@ std::string NMD::CMP_OR_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -3958,7 +3958,7 @@ std::string NMD::CMP_SAF_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -3982,7 +3982,7 @@ std::string NMD::CMP_SAF_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4006,7 +4006,7 @@ std::string NMD::CMP_SEQ_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4030,7 +4030,7 @@ std::string NMD::CMP_SEQ_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4054,7 +4054,7 @@ std::string NMD::CMP_SLE_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4078,7 +4078,7 @@ std::string NMD::CMP_SLE_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4102,7 +4102,7 @@ std::string NMD::CMP_SLT_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4126,7 +4126,7 @@ std::string NMD::CMP_SLT_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4150,7 +4150,7 @@ std::string NMD::CMP_SNE_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4174,7 +4174,7 @@ std::string NMD::CMP_SNE_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4198,7 +4198,7 @@ std::string NMD::CMP_SOR_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4222,7 +4222,7 @@ std::string NMD::CMP_SOR_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4246,7 +4246,7 @@ std::string NMD::CMP_SUEQ_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4270,7 +4270,7 @@ std::string NMD::CMP_SUEQ_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4294,7 +4294,7 @@ std::string NMD::CMP_SULE_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4318,7 +4318,7 @@ std::string NMD::CMP_SULE_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4342,7 +4342,7 @@ std::string NMD::CMP_SULT_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4366,7 +4366,7 @@ std::string NMD::CMP_SULT_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4390,7 +4390,7 @@ std::string NMD::CMP_SUN_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4414,7 +4414,7 @@ std::string NMD::CMP_SUNE_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4438,7 +4438,7 @@ std::string NMD::CMP_SUNE_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4462,7 +4462,7 @@ std::string NMD::CMP_SUN_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4486,7 +4486,7 @@ std::string NMD::CMP_UEQ_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4510,7 +4510,7 @@ std::string NMD::CMP_UEQ_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4534,7 +4534,7 @@ std::string NMD::CMP_ULE_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4558,7 +4558,7 @@ std::string NMD::CMP_ULE_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4582,7 +4582,7 @@ std::string NMD::CMP_ULT_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4606,7 +4606,7 @@ std::string NMD::CMP_ULT_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4630,7 +4630,7 @@ std::string NMD::CMP_UN_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4654,7 +4654,7 @@ std::string NMD::CMP_UNE_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4678,7 +4678,7 @@ std::string NMD::CMP_UNE_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -4702,7 +4702,7 @@ std::string NMD::CMP_UN_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -5698,7 +5698,7 @@ std::string NMD::DIV_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -5722,7 +5722,7 @@ std::string NMD::DIV_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -9533,7 +9533,7 @@ std::string NMD::MADDF_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -9557,7 +9557,7 @@ std::string NMD::MADDF_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -9701,7 +9701,7 @@ std::string NMD::MAX_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -9725,7 +9725,7 @@ std::string NMD::MAX_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -9749,7 +9749,7 @@ std::string NMD::MAXA_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -9773,7 +9773,7 @@ std::string NMD::MAXA_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -10077,7 +10077,7 @@ std::string NMD::MIN_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -10101,7 +10101,7 @@ std::string NMD::MIN_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -10125,7 +10125,7 @@ std::string NMD::MINA_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -10149,7 +10149,7 @@ std::string NMD::MINA_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -10461,7 +10461,7 @@ std::string NMD::MSUBF_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -10485,7 +10485,7 @@ std::string NMD::MSUBF_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -10929,7 +10929,7 @@ std::string NMD::MUL_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -11001,7 +11001,7 @@ std::string NMD::MUL_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -13417,7 +13417,7 @@ std::string NMD::SEL_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -13441,7 +13441,7 @@ std::string NMD::SEL_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -13465,7 +13465,7 @@ std::string NMD::SELEQZ_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -13489,7 +13489,7 @@ std::string NMD::SELEQZ_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -13513,7 +13513,7 @@ std::string NMD::SELNEZ_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -13537,7 +13537,7 @@ std::string NMD::SELNEZ_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -14743,7 +14743,7 @@ std::string NMD::SUB_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
@@ -14767,7 +14767,7 @@ std::string NMD::SUB_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
- uint64 fd_value = extract_fd_10_9_8_7_6(instruction);
+ uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
std::string fs = FPR(copy(fs_value));
diff --git a/disas/nanomips.h b/disas/nanomips.h
index d3722f6..d595092 100644
--- a/disas/nanomips.h
+++ b/disas/nanomips.h
@@ -176,7 +176,7 @@ private:
uint64 extract_ct_25_24_23_22_21(uint64 instruction);
uint64 extract_eu_3_2_1_0(uint64 instruction);
uint64 extract_eu_6_5_4_3_2_1_0(uint64 instruction);
- uint64 extract_fd_10_9_8_7_6(uint64 instruction);
+ uint64 extract_fd_15_14_13_12_11(uint64 instruction);
uint64 extract_fs_15_14_13_12_11(uint64 instruction);
uint64 extract_ft_15_14_13_12_11(uint64 instruction);
uint64 extract_ft_20_19_18_17_16(uint64 instruction);
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 21/44] disas: nanoMIPS: Fix an FP-related misnomer 2
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (19 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 20/44] disas: nanoMIPS: Fix an FP-related misnomer 1 Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 22/44] disas: nanoMIPS: Fix an FP-related misnomer 3 Aleksandar Markovic
` (23 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Rename NMD::extract_fs_15_14_13_12_11(uint64 instruction) to
NMD::extract_fs_20_19_18_17_16(uint64 instruction).
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
disas/nanomips.cpp | 242 ++++++++++++++++++++++++++---------------------------
disas/nanomips.h | 2 +-
2 files changed, 122 insertions(+), 122 deletions(-)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index bff1900..b9ad0f7 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -1114,7 +1114,7 @@ uint64 NMD::extract_u_15_to_0(uint64 instruction)
}
-uint64 NMD::extract_fs_15_14_13_12_11(uint64 instruction)
+uint64 NMD::extract_fs_20_19_18_17_16(uint64 instruction)
{
uint64 value = 0;
value |= extract_bits(instruction, 16, 5);
@@ -1602,7 +1602,7 @@ bool NMD::SLTU_cond(uint64 instruction)
std::string NMD::ABS_D(uint64 instruction)
{
uint64 fd_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string fs = FPR(copy(fs_value));
std::string fd = FPR(copy(fd_value));
@@ -1624,7 +1624,7 @@ std::string NMD::ABS_D(uint64 instruction)
std::string NMD::ABS_S(uint64 instruction)
{
uint64 fd_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string fs = FPR(copy(fs_value));
std::string fd = FPR(copy(fd_value));
@@ -1756,7 +1756,7 @@ std::string NMD::ADD(uint64 instruction)
std::string NMD::ADD_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
@@ -1781,7 +1781,7 @@ std::string NMD::ADD_D(uint64 instruction)
std::string NMD::ADD_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
@@ -3383,7 +3383,7 @@ std::string NMD::CACHEE(uint64 instruction)
std::string NMD::CEIL_L_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -3405,7 +3405,7 @@ std::string NMD::CEIL_L_D(uint64 instruction)
std::string NMD::CEIL_L_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -3427,7 +3427,7 @@ std::string NMD::CEIL_L_S(uint64 instruction)
std::string NMD::CEIL_W_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -3449,7 +3449,7 @@ std::string NMD::CEIL_W_D(uint64 instruction)
std::string NMD::CEIL_W_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -3515,7 +3515,7 @@ std::string NMD::CFC2(uint64 instruction)
std::string NMD::CLASS_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -3537,7 +3537,7 @@ std::string NMD::CLASS_D(uint64 instruction)
std::string NMD::CLASS_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -3603,7 +3603,7 @@ std::string NMD::CLZ(uint64 instruction)
std::string NMD::CMP_AF_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -3627,7 +3627,7 @@ std::string NMD::CMP_AF_D(uint64 instruction)
std::string NMD::CMP_AF_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -3651,7 +3651,7 @@ std::string NMD::CMP_AF_S(uint64 instruction)
std::string NMD::CMP_EQ_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -3697,7 +3697,7 @@ std::string NMD::CMP_EQ_PH(uint64 instruction)
std::string NMD::CMP_EQ_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -3721,7 +3721,7 @@ std::string NMD::CMP_EQ_S(uint64 instruction)
std::string NMD::CMP_LE_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -3767,7 +3767,7 @@ std::string NMD::CMP_LE_PH(uint64 instruction)
std::string NMD::CMP_LE_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -3791,7 +3791,7 @@ std::string NMD::CMP_LE_S(uint64 instruction)
std::string NMD::CMP_LT_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -3837,7 +3837,7 @@ std::string NMD::CMP_LT_PH(uint64 instruction)
std::string NMD::CMP_LT_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -3861,7 +3861,7 @@ std::string NMD::CMP_LT_S(uint64 instruction)
std::string NMD::CMP_NE_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -3885,7 +3885,7 @@ std::string NMD::CMP_NE_D(uint64 instruction)
std::string NMD::CMP_NE_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -3909,7 +3909,7 @@ std::string NMD::CMP_NE_S(uint64 instruction)
std::string NMD::CMP_OR_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -3933,7 +3933,7 @@ std::string NMD::CMP_OR_D(uint64 instruction)
std::string NMD::CMP_OR_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -3957,7 +3957,7 @@ std::string NMD::CMP_OR_S(uint64 instruction)
std::string NMD::CMP_SAF_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -3981,7 +3981,7 @@ std::string NMD::CMP_SAF_D(uint64 instruction)
std::string NMD::CMP_SAF_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4005,7 +4005,7 @@ std::string NMD::CMP_SAF_S(uint64 instruction)
std::string NMD::CMP_SEQ_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4029,7 +4029,7 @@ std::string NMD::CMP_SEQ_D(uint64 instruction)
std::string NMD::CMP_SEQ_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4053,7 +4053,7 @@ std::string NMD::CMP_SEQ_S(uint64 instruction)
std::string NMD::CMP_SLE_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4077,7 +4077,7 @@ std::string NMD::CMP_SLE_D(uint64 instruction)
std::string NMD::CMP_SLE_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4101,7 +4101,7 @@ std::string NMD::CMP_SLE_S(uint64 instruction)
std::string NMD::CMP_SLT_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4125,7 +4125,7 @@ std::string NMD::CMP_SLT_D(uint64 instruction)
std::string NMD::CMP_SLT_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4149,7 +4149,7 @@ std::string NMD::CMP_SLT_S(uint64 instruction)
std::string NMD::CMP_SNE_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4173,7 +4173,7 @@ std::string NMD::CMP_SNE_D(uint64 instruction)
std::string NMD::CMP_SNE_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4197,7 +4197,7 @@ std::string NMD::CMP_SNE_S(uint64 instruction)
std::string NMD::CMP_SOR_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4221,7 +4221,7 @@ std::string NMD::CMP_SOR_D(uint64 instruction)
std::string NMD::CMP_SOR_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4245,7 +4245,7 @@ std::string NMD::CMP_SOR_S(uint64 instruction)
std::string NMD::CMP_SUEQ_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4269,7 +4269,7 @@ std::string NMD::CMP_SUEQ_D(uint64 instruction)
std::string NMD::CMP_SUEQ_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4293,7 +4293,7 @@ std::string NMD::CMP_SUEQ_S(uint64 instruction)
std::string NMD::CMP_SULE_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4317,7 +4317,7 @@ std::string NMD::CMP_SULE_D(uint64 instruction)
std::string NMD::CMP_SULE_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4341,7 +4341,7 @@ std::string NMD::CMP_SULE_S(uint64 instruction)
std::string NMD::CMP_SULT_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4365,7 +4365,7 @@ std::string NMD::CMP_SULT_D(uint64 instruction)
std::string NMD::CMP_SULT_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4389,7 +4389,7 @@ std::string NMD::CMP_SULT_S(uint64 instruction)
std::string NMD::CMP_SUN_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4413,7 +4413,7 @@ std::string NMD::CMP_SUN_D(uint64 instruction)
std::string NMD::CMP_SUNE_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4437,7 +4437,7 @@ std::string NMD::CMP_SUNE_D(uint64 instruction)
std::string NMD::CMP_SUNE_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4461,7 +4461,7 @@ std::string NMD::CMP_SUNE_S(uint64 instruction)
std::string NMD::CMP_SUN_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4485,7 +4485,7 @@ std::string NMD::CMP_SUN_S(uint64 instruction)
std::string NMD::CMP_UEQ_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4509,7 +4509,7 @@ std::string NMD::CMP_UEQ_D(uint64 instruction)
std::string NMD::CMP_UEQ_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4533,7 +4533,7 @@ std::string NMD::CMP_UEQ_S(uint64 instruction)
std::string NMD::CMP_ULE_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4557,7 +4557,7 @@ std::string NMD::CMP_ULE_D(uint64 instruction)
std::string NMD::CMP_ULE_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4581,7 +4581,7 @@ std::string NMD::CMP_ULE_S(uint64 instruction)
std::string NMD::CMP_ULT_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4605,7 +4605,7 @@ std::string NMD::CMP_ULT_D(uint64 instruction)
std::string NMD::CMP_ULT_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4629,7 +4629,7 @@ std::string NMD::CMP_ULT_S(uint64 instruction)
std::string NMD::CMP_UN_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4653,7 +4653,7 @@ std::string NMD::CMP_UN_D(uint64 instruction)
std::string NMD::CMP_UNE_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4677,7 +4677,7 @@ std::string NMD::CMP_UNE_D(uint64 instruction)
std::string NMD::CMP_UNE_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4701,7 +4701,7 @@ std::string NMD::CMP_UNE_S(uint64 instruction)
std::string NMD::CMP_UN_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -4999,7 +4999,7 @@ std::string NMD::CTC2(uint64 instruction)
std::string NMD::CVT_D_L(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -5021,7 +5021,7 @@ std::string NMD::CVT_D_L(uint64 instruction)
std::string NMD::CVT_D_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -5043,7 +5043,7 @@ std::string NMD::CVT_D_S(uint64 instruction)
std::string NMD::CVT_D_W(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -5065,7 +5065,7 @@ std::string NMD::CVT_D_W(uint64 instruction)
std::string NMD::CVT_L_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -5087,7 +5087,7 @@ std::string NMD::CVT_L_D(uint64 instruction)
std::string NMD::CVT_L_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -5109,7 +5109,7 @@ std::string NMD::CVT_L_S(uint64 instruction)
std::string NMD::CVT_S_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -5131,7 +5131,7 @@ std::string NMD::CVT_S_D(uint64 instruction)
std::string NMD::CVT_S_L(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -5153,7 +5153,7 @@ std::string NMD::CVT_S_L(uint64 instruction)
std::string NMD::CVT_S_PL(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -5175,7 +5175,7 @@ std::string NMD::CVT_S_PL(uint64 instruction)
std::string NMD::CVT_S_PU(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -5197,7 +5197,7 @@ std::string NMD::CVT_S_PU(uint64 instruction)
std::string NMD::CVT_S_W(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -5219,7 +5219,7 @@ std::string NMD::CVT_S_W(uint64 instruction)
std::string NMD::CVT_W_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -5241,7 +5241,7 @@ std::string NMD::CVT_W_D(uint64 instruction)
std::string NMD::CVT_W_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -5697,7 +5697,7 @@ std::string NMD::DIV(uint64 instruction)
std::string NMD::DIV_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -5721,7 +5721,7 @@ std::string NMD::DIV_D(uint64 instruction)
std::string NMD::DIV_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -5841,7 +5841,7 @@ std::string NMD::DMFC0(uint64 instruction)
std::string NMD::DMFC1(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string fs = FPR(copy(fs_value));
@@ -5981,7 +5981,7 @@ std::string NMD::DMTC0(uint64 instruction)
std::string NMD::DMTC1(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string fs = FPR(copy(fs_value));
@@ -7478,7 +7478,7 @@ std::string NMD::EXTW(uint64 instruction)
std::string NMD::FLOOR_L_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -7500,7 +7500,7 @@ std::string NMD::FLOOR_L_D(uint64 instruction)
std::string NMD::FLOOR_L_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -7522,7 +7522,7 @@ std::string NMD::FLOOR_L_S(uint64 instruction)
std::string NMD::FLOOR_W_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -7544,7 +7544,7 @@ std::string NMD::FLOOR_W_D(uint64 instruction)
std::string NMD::FLOOR_W_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -9532,7 +9532,7 @@ std::string NMD::MADD_DSP_(uint64 instruction)
std::string NMD::MADDF_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -9556,7 +9556,7 @@ std::string NMD::MADDF_D(uint64 instruction)
std::string NMD::MADDF_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -9700,7 +9700,7 @@ std::string NMD::MAQ_SA_W_PHR(uint64 instruction)
std::string NMD::MAX_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -9724,7 +9724,7 @@ std::string NMD::MAX_D(uint64 instruction)
std::string NMD::MAX_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -9748,7 +9748,7 @@ std::string NMD::MAX_S(uint64 instruction)
std::string NMD::MAXA_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -9772,7 +9772,7 @@ std::string NMD::MAXA_D(uint64 instruction)
std::string NMD::MAXA_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -9820,7 +9820,7 @@ std::string NMD::MFC0(uint64 instruction)
std::string NMD::MFC1(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string fs = FPR(copy(fs_value));
@@ -9912,7 +9912,7 @@ std::string NMD::MFHC0(uint64 instruction)
std::string NMD::MFHC1(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string fs = FPR(copy(fs_value));
@@ -10076,7 +10076,7 @@ std::string NMD::MFTR(uint64 instruction)
std::string NMD::MIN_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -10100,7 +10100,7 @@ std::string NMD::MIN_D(uint64 instruction)
std::string NMD::MIN_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -10124,7 +10124,7 @@ std::string NMD::MIN_S(uint64 instruction)
std::string NMD::MINA_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -10148,7 +10148,7 @@ std::string NMD::MINA_D(uint64 instruction)
std::string NMD::MINA_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -10244,7 +10244,7 @@ std::string NMD::MODU(uint64 instruction)
std::string NMD::MOV_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -10266,7 +10266,7 @@ std::string NMD::MOV_D(uint64 instruction)
std::string NMD::MOV_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -10460,7 +10460,7 @@ std::string NMD::MSUB_DSP_(uint64 instruction)
std::string NMD::MSUBF_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -10484,7 +10484,7 @@ std::string NMD::MSUBF_D(uint64 instruction)
std::string NMD::MSUBF_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -10556,7 +10556,7 @@ std::string NMD::MTC0(uint64 instruction)
std::string NMD::MTC1(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string fs = FPR(copy(fs_value));
@@ -10648,7 +10648,7 @@ std::string NMD::MTHC0(uint64 instruction)
std::string NMD::MTHC1(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string fs = FPR(copy(fs_value));
@@ -10928,7 +10928,7 @@ std::string NMD::MUL_4X4_(uint64 instruction)
std::string NMD::MUL_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -11000,7 +11000,7 @@ std::string NMD::MUL_S_PH(uint64 instruction)
std::string NMD::MUL_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -11336,7 +11336,7 @@ std::string NMD::MULU(uint64 instruction)
std::string NMD::NEG_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -11358,7 +11358,7 @@ std::string NMD::NEG_D(uint64 instruction)
std::string NMD::NEG_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -12196,7 +12196,7 @@ std::string NMD::RDPGPR(uint64 instruction)
std::string NMD::RECIP_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -12218,7 +12218,7 @@ std::string NMD::RECIP_D(uint64 instruction)
std::string NMD::RECIP_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -12418,7 +12418,7 @@ std::string NMD::RESTOREF(uint64 instruction)
std::string NMD::RINT_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -12440,7 +12440,7 @@ std::string NMD::RINT_D(uint64 instruction)
std::string NMD::RINT_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -12539,7 +12539,7 @@ std::string NMD::ROTX(uint64 instruction)
std::string NMD::ROUND_L_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -12561,7 +12561,7 @@ std::string NMD::ROUND_L_D(uint64 instruction)
std::string NMD::ROUND_L_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -12583,7 +12583,7 @@ std::string NMD::ROUND_L_S(uint64 instruction)
std::string NMD::ROUND_W_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -12605,7 +12605,7 @@ std::string NMD::ROUND_W_D(uint64 instruction)
std::string NMD::ROUND_W_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -12627,7 +12627,7 @@ std::string NMD::ROUND_W_S(uint64 instruction)
std::string NMD::RSQRT_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -12649,7 +12649,7 @@ std::string NMD::RSQRT_D(uint64 instruction)
std::string NMD::RSQRT_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -13416,7 +13416,7 @@ std::string NMD::SEH(uint64 instruction)
std::string NMD::SEL_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -13440,7 +13440,7 @@ std::string NMD::SEL_D(uint64 instruction)
std::string NMD::SEL_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -13464,7 +13464,7 @@ std::string NMD::SEL_S(uint64 instruction)
std::string NMD::SELEQZ_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -13488,7 +13488,7 @@ std::string NMD::SELEQZ_D(uint64 instruction)
std::string NMD::SELEQZ_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -13512,7 +13512,7 @@ std::string NMD::SELEQZ_S(uint64 instruction)
std::string NMD::SELNEZ_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -13536,7 +13536,7 @@ std::string NMD::SELNEZ_D(uint64 instruction)
std::string NMD::SELNEZ_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -14554,7 +14554,7 @@ std::string NMD::SPECIAL2(uint64 instruction)
std::string NMD::SQRT_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -14576,7 +14576,7 @@ std::string NMD::SQRT_D(uint64 instruction)
std::string NMD::SQRT_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -14742,7 +14742,7 @@ std::string NMD::SUB(uint64 instruction)
std::string NMD::SUB_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -14766,7 +14766,7 @@ std::string NMD::SUB_D(uint64 instruction)
std::string NMD::SUB_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
std::string fd = FPR(copy(fd_value));
@@ -15944,7 +15944,7 @@ std::string NMD::TNE(uint64 instruction)
std::string NMD::TRUNC_L_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -15966,7 +15966,7 @@ std::string NMD::TRUNC_L_D(uint64 instruction)
std::string NMD::TRUNC_L_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -15988,7 +15988,7 @@ std::string NMD::TRUNC_L_S(uint64 instruction)
std::string NMD::TRUNC_W_D(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
@@ -16010,7 +16010,7 @@ std::string NMD::TRUNC_W_D(uint64 instruction)
std::string NMD::TRUNC_W_S(uint64 instruction)
{
uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
- uint64 fs_value = extract_fs_15_14_13_12_11(instruction);
+ uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
std::string fs = FPR(copy(fs_value));
diff --git a/disas/nanomips.h b/disas/nanomips.h
index d595092..fad70d2 100644
--- a/disas/nanomips.h
+++ b/disas/nanomips.h
@@ -177,7 +177,7 @@ private:
uint64 extract_eu_3_2_1_0(uint64 instruction);
uint64 extract_eu_6_5_4_3_2_1_0(uint64 instruction);
uint64 extract_fd_15_14_13_12_11(uint64 instruction);
- uint64 extract_fs_15_14_13_12_11(uint64 instruction);
+ uint64 extract_fs_20_19_18_17_16(uint64 instruction);
uint64 extract_ft_15_14_13_12_11(uint64 instruction);
uint64 extract_ft_20_19_18_17_16(uint64 instruction);
uint64 extract_gp_2(uint64 instruction);
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 22/44] disas: nanoMIPS: Fix an FP-related misnomer 3
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (20 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 21/44] disas: nanoMIPS: Fix an FP-related misnomer 2 Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 23/44] disas: nanoMIPS: Name more functions in a more descriptive way Aleksandar Markovic
` (22 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Rename NMD::extract_ft_20_19_18_17_16(uint64 instruction) to
NMD::extract_ft_25_24_23_22_21(uint64 instruction).
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
disas/nanomips.cpp | 258 ++++++++++++++++++++++++++---------------------------
disas/nanomips.h | 2 +-
2 files changed, 130 insertions(+), 130 deletions(-)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index b9ad0f7..69b6e99 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -1188,7 +1188,7 @@ uint64 NMD::extract_rt3_9_8_7(uint64 instruction)
}
-uint64 NMD::extract_ft_20_19_18_17_16(uint64 instruction)
+uint64 NMD::extract_ft_25_24_23_22_21(uint64 instruction)
{
uint64 value = 0;
value |= extract_bits(instruction, 21, 5);
@@ -1601,7 +1601,7 @@ bool NMD::SLTU_cond(uint64 instruction)
*/
std::string NMD::ABS_D(uint64 instruction)
{
- uint64 fd_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fd_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string fs = FPR(copy(fs_value));
@@ -1623,7 +1623,7 @@ std::string NMD::ABS_D(uint64 instruction)
*/
std::string NMD::ABS_S(uint64 instruction)
{
- uint64 fd_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 fd_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string fs = FPR(copy(fs_value));
@@ -1755,7 +1755,7 @@ std::string NMD::ADD(uint64 instruction)
*/
std::string NMD::ADD_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -1780,7 +1780,7 @@ std::string NMD::ADD_D(uint64 instruction)
*/
std::string NMD::ADD_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -2787,7 +2787,7 @@ std::string NMD::BC_32_(uint64 instruction)
std::string NMD::BC1EQZC(uint64 instruction)
{
int64 s_value = extr_sil0il14bs1_il1il1bs13Tmsb14(instruction);
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
std::string ft = FPR(copy(ft_value));
std::string s = ADDRESS(encode_s_from_address(s_value), 4);
@@ -2809,7 +2809,7 @@ std::string NMD::BC1EQZC(uint64 instruction)
std::string NMD::BC1NEZC(uint64 instruction)
{
int64 s_value = extr_sil0il14bs1_il1il1bs13Tmsb14(instruction);
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
std::string ft = FPR(copy(ft_value));
std::string s = ADDRESS(encode_s_from_address(s_value), 4);
@@ -3382,7 +3382,7 @@ std::string NMD::CACHEE(uint64 instruction)
*/
std::string NMD::CEIL_L_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -3404,7 +3404,7 @@ std::string NMD::CEIL_L_D(uint64 instruction)
*/
std::string NMD::CEIL_L_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -3426,7 +3426,7 @@ std::string NMD::CEIL_L_S(uint64 instruction)
*/
std::string NMD::CEIL_W_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -3448,7 +3448,7 @@ std::string NMD::CEIL_W_D(uint64 instruction)
*/
std::string NMD::CEIL_W_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -3514,7 +3514,7 @@ std::string NMD::CFC2(uint64 instruction)
*/
std::string NMD::CLASS_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -3536,7 +3536,7 @@ std::string NMD::CLASS_D(uint64 instruction)
*/
std::string NMD::CLASS_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -3602,7 +3602,7 @@ std::string NMD::CLZ(uint64 instruction)
*/
std::string NMD::CMP_AF_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -3626,7 +3626,7 @@ std::string NMD::CMP_AF_D(uint64 instruction)
*/
std::string NMD::CMP_AF_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -3650,7 +3650,7 @@ std::string NMD::CMP_AF_S(uint64 instruction)
*/
std::string NMD::CMP_EQ_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -3696,7 +3696,7 @@ std::string NMD::CMP_EQ_PH(uint64 instruction)
*/
std::string NMD::CMP_EQ_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -3720,7 +3720,7 @@ std::string NMD::CMP_EQ_S(uint64 instruction)
*/
std::string NMD::CMP_LE_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -3766,7 +3766,7 @@ std::string NMD::CMP_LE_PH(uint64 instruction)
*/
std::string NMD::CMP_LE_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -3790,7 +3790,7 @@ std::string NMD::CMP_LE_S(uint64 instruction)
*/
std::string NMD::CMP_LT_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -3836,7 +3836,7 @@ std::string NMD::CMP_LT_PH(uint64 instruction)
*/
std::string NMD::CMP_LT_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -3860,7 +3860,7 @@ std::string NMD::CMP_LT_S(uint64 instruction)
*/
std::string NMD::CMP_NE_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -3884,7 +3884,7 @@ std::string NMD::CMP_NE_D(uint64 instruction)
*/
std::string NMD::CMP_NE_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -3908,7 +3908,7 @@ std::string NMD::CMP_NE_S(uint64 instruction)
*/
std::string NMD::CMP_OR_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -3932,7 +3932,7 @@ std::string NMD::CMP_OR_D(uint64 instruction)
*/
std::string NMD::CMP_OR_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -3956,7 +3956,7 @@ std::string NMD::CMP_OR_S(uint64 instruction)
*/
std::string NMD::CMP_SAF_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -3980,7 +3980,7 @@ std::string NMD::CMP_SAF_D(uint64 instruction)
*/
std::string NMD::CMP_SAF_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4004,7 +4004,7 @@ std::string NMD::CMP_SAF_S(uint64 instruction)
*/
std::string NMD::CMP_SEQ_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4028,7 +4028,7 @@ std::string NMD::CMP_SEQ_D(uint64 instruction)
*/
std::string NMD::CMP_SEQ_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4052,7 +4052,7 @@ std::string NMD::CMP_SEQ_S(uint64 instruction)
*/
std::string NMD::CMP_SLE_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4076,7 +4076,7 @@ std::string NMD::CMP_SLE_D(uint64 instruction)
*/
std::string NMD::CMP_SLE_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4100,7 +4100,7 @@ std::string NMD::CMP_SLE_S(uint64 instruction)
*/
std::string NMD::CMP_SLT_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4124,7 +4124,7 @@ std::string NMD::CMP_SLT_D(uint64 instruction)
*/
std::string NMD::CMP_SLT_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4148,7 +4148,7 @@ std::string NMD::CMP_SLT_S(uint64 instruction)
*/
std::string NMD::CMP_SNE_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4172,7 +4172,7 @@ std::string NMD::CMP_SNE_D(uint64 instruction)
*/
std::string NMD::CMP_SNE_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4196,7 +4196,7 @@ std::string NMD::CMP_SNE_S(uint64 instruction)
*/
std::string NMD::CMP_SOR_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4220,7 +4220,7 @@ std::string NMD::CMP_SOR_D(uint64 instruction)
*/
std::string NMD::CMP_SOR_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4244,7 +4244,7 @@ std::string NMD::CMP_SOR_S(uint64 instruction)
*/
std::string NMD::CMP_SUEQ_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4268,7 +4268,7 @@ std::string NMD::CMP_SUEQ_D(uint64 instruction)
*/
std::string NMD::CMP_SUEQ_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4292,7 +4292,7 @@ std::string NMD::CMP_SUEQ_S(uint64 instruction)
*/
std::string NMD::CMP_SULE_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4316,7 +4316,7 @@ std::string NMD::CMP_SULE_D(uint64 instruction)
*/
std::string NMD::CMP_SULE_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4340,7 +4340,7 @@ std::string NMD::CMP_SULE_S(uint64 instruction)
*/
std::string NMD::CMP_SULT_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4364,7 +4364,7 @@ std::string NMD::CMP_SULT_D(uint64 instruction)
*/
std::string NMD::CMP_SULT_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4388,7 +4388,7 @@ std::string NMD::CMP_SULT_S(uint64 instruction)
*/
std::string NMD::CMP_SUN_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4412,7 +4412,7 @@ std::string NMD::CMP_SUN_D(uint64 instruction)
*/
std::string NMD::CMP_SUNE_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4436,7 +4436,7 @@ std::string NMD::CMP_SUNE_D(uint64 instruction)
*/
std::string NMD::CMP_SUNE_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4460,7 +4460,7 @@ std::string NMD::CMP_SUNE_S(uint64 instruction)
*/
std::string NMD::CMP_SUN_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4484,7 +4484,7 @@ std::string NMD::CMP_SUN_S(uint64 instruction)
*/
std::string NMD::CMP_UEQ_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4508,7 +4508,7 @@ std::string NMD::CMP_UEQ_D(uint64 instruction)
*/
std::string NMD::CMP_UEQ_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4532,7 +4532,7 @@ std::string NMD::CMP_UEQ_S(uint64 instruction)
*/
std::string NMD::CMP_ULE_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4556,7 +4556,7 @@ std::string NMD::CMP_ULE_D(uint64 instruction)
*/
std::string NMD::CMP_ULE_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4580,7 +4580,7 @@ std::string NMD::CMP_ULE_S(uint64 instruction)
*/
std::string NMD::CMP_ULT_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4604,7 +4604,7 @@ std::string NMD::CMP_ULT_D(uint64 instruction)
*/
std::string NMD::CMP_ULT_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4628,7 +4628,7 @@ std::string NMD::CMP_ULT_S(uint64 instruction)
*/
std::string NMD::CMP_UN_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4652,7 +4652,7 @@ std::string NMD::CMP_UN_D(uint64 instruction)
*/
std::string NMD::CMP_UNE_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4676,7 +4676,7 @@ std::string NMD::CMP_UNE_D(uint64 instruction)
*/
std::string NMD::CMP_UNE_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4700,7 +4700,7 @@ std::string NMD::CMP_UNE_S(uint64 instruction)
*/
std::string NMD::CMP_UN_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -4998,7 +4998,7 @@ std::string NMD::CTC2(uint64 instruction)
*/
std::string NMD::CVT_D_L(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -5020,7 +5020,7 @@ std::string NMD::CVT_D_L(uint64 instruction)
*/
std::string NMD::CVT_D_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -5042,7 +5042,7 @@ std::string NMD::CVT_D_S(uint64 instruction)
*/
std::string NMD::CVT_D_W(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -5064,7 +5064,7 @@ std::string NMD::CVT_D_W(uint64 instruction)
*/
std::string NMD::CVT_L_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -5086,7 +5086,7 @@ std::string NMD::CVT_L_D(uint64 instruction)
*/
std::string NMD::CVT_L_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -5108,7 +5108,7 @@ std::string NMD::CVT_L_S(uint64 instruction)
*/
std::string NMD::CVT_S_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -5130,7 +5130,7 @@ std::string NMD::CVT_S_D(uint64 instruction)
*/
std::string NMD::CVT_S_L(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -5152,7 +5152,7 @@ std::string NMD::CVT_S_L(uint64 instruction)
*/
std::string NMD::CVT_S_PL(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -5174,7 +5174,7 @@ std::string NMD::CVT_S_PL(uint64 instruction)
*/
std::string NMD::CVT_S_PU(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -5196,7 +5196,7 @@ std::string NMD::CVT_S_PU(uint64 instruction)
*/
std::string NMD::CVT_S_W(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -5218,7 +5218,7 @@ std::string NMD::CVT_S_W(uint64 instruction)
*/
std::string NMD::CVT_W_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -5240,7 +5240,7 @@ std::string NMD::CVT_W_D(uint64 instruction)
*/
std::string NMD::CVT_W_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -5696,7 +5696,7 @@ std::string NMD::DIV(uint64 instruction)
*/
std::string NMD::DIV_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -5720,7 +5720,7 @@ std::string NMD::DIV_D(uint64 instruction)
*/
std::string NMD::DIV_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -7477,7 +7477,7 @@ std::string NMD::EXTW(uint64 instruction)
*/
std::string NMD::FLOOR_L_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -7499,7 +7499,7 @@ std::string NMD::FLOOR_L_D(uint64 instruction)
*/
std::string NMD::FLOOR_L_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -7521,7 +7521,7 @@ std::string NMD::FLOOR_L_S(uint64 instruction)
*/
std::string NMD::FLOOR_W_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -7543,7 +7543,7 @@ std::string NMD::FLOOR_W_D(uint64 instruction)
*/
std::string NMD::FLOOR_W_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -8135,7 +8135,7 @@ std::string NMD::LD_U12_(uint64 instruction)
*/
std::string NMD::LDC1_GP_(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 u_value = extract_u_17_to_2__s2(instruction);
std::string ft = FPR(copy(ft_value));
@@ -8158,7 +8158,7 @@ std::string NMD::LDC1_GP_(uint64 instruction)
std::string NMD::LDC1_S9_(uint64 instruction)
{
int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -8181,7 +8181,7 @@ std::string NMD::LDC1_S9_(uint64 instruction)
*/
std::string NMD::LDC1_U12_(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
@@ -9103,7 +9103,7 @@ std::string NMD::LW_U12_(uint64 instruction)
*/
std::string NMD::LWC1_GP_(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 u_value = extract_u_17_to_2__s2(instruction);
std::string ft = FPR(copy(ft_value));
@@ -9126,7 +9126,7 @@ std::string NMD::LWC1_GP_(uint64 instruction)
std::string NMD::LWC1_S9_(uint64 instruction)
{
int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -9149,7 +9149,7 @@ std::string NMD::LWC1_S9_(uint64 instruction)
*/
std::string NMD::LWC1_U12_(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
@@ -9531,7 +9531,7 @@ std::string NMD::MADD_DSP_(uint64 instruction)
*/
std::string NMD::MADDF_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -9555,7 +9555,7 @@ std::string NMD::MADDF_D(uint64 instruction)
*/
std::string NMD::MADDF_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -9699,7 +9699,7 @@ std::string NMD::MAQ_SA_W_PHR(uint64 instruction)
*/
std::string NMD::MAX_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -9723,7 +9723,7 @@ std::string NMD::MAX_D(uint64 instruction)
*/
std::string NMD::MAX_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -9747,7 +9747,7 @@ std::string NMD::MAX_S(uint64 instruction)
*/
std::string NMD::MAXA_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -9771,7 +9771,7 @@ std::string NMD::MAXA_D(uint64 instruction)
*/
std::string NMD::MAXA_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -10075,7 +10075,7 @@ std::string NMD::MFTR(uint64 instruction)
*/
std::string NMD::MIN_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -10099,7 +10099,7 @@ std::string NMD::MIN_D(uint64 instruction)
*/
std::string NMD::MIN_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -10123,7 +10123,7 @@ std::string NMD::MIN_S(uint64 instruction)
*/
std::string NMD::MINA_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -10147,7 +10147,7 @@ std::string NMD::MINA_D(uint64 instruction)
*/
std::string NMD::MINA_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -10243,7 +10243,7 @@ std::string NMD::MODU(uint64 instruction)
*/
std::string NMD::MOV_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -10265,7 +10265,7 @@ std::string NMD::MOV_D(uint64 instruction)
*/
std::string NMD::MOV_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -10459,7 +10459,7 @@ std::string NMD::MSUB_DSP_(uint64 instruction)
*/
std::string NMD::MSUBF_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -10483,7 +10483,7 @@ std::string NMD::MSUBF_D(uint64 instruction)
*/
std::string NMD::MSUBF_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -10927,7 +10927,7 @@ std::string NMD::MUL_4X4_(uint64 instruction)
*/
std::string NMD::MUL_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -10999,7 +10999,7 @@ std::string NMD::MUL_S_PH(uint64 instruction)
*/
std::string NMD::MUL_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -11335,7 +11335,7 @@ std::string NMD::MULU(uint64 instruction)
*/
std::string NMD::NEG_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -11357,7 +11357,7 @@ std::string NMD::NEG_D(uint64 instruction)
*/
std::string NMD::NEG_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -12195,7 +12195,7 @@ std::string NMD::RDPGPR(uint64 instruction)
*/
std::string NMD::RECIP_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -12217,7 +12217,7 @@ std::string NMD::RECIP_D(uint64 instruction)
*/
std::string NMD::RECIP_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -12417,7 +12417,7 @@ std::string NMD::RESTOREF(uint64 instruction)
*/
std::string NMD::RINT_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -12439,7 +12439,7 @@ std::string NMD::RINT_D(uint64 instruction)
*/
std::string NMD::RINT_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -12538,7 +12538,7 @@ std::string NMD::ROTX(uint64 instruction)
*/
std::string NMD::ROUND_L_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -12560,7 +12560,7 @@ std::string NMD::ROUND_L_D(uint64 instruction)
*/
std::string NMD::ROUND_L_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -12582,7 +12582,7 @@ std::string NMD::ROUND_L_S(uint64 instruction)
*/
std::string NMD::ROUND_W_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -12604,7 +12604,7 @@ std::string NMD::ROUND_W_D(uint64 instruction)
*/
std::string NMD::ROUND_W_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -12626,7 +12626,7 @@ std::string NMD::ROUND_W_S(uint64 instruction)
*/
std::string NMD::RSQRT_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -12648,7 +12648,7 @@ std::string NMD::RSQRT_D(uint64 instruction)
*/
std::string NMD::RSQRT_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -13133,7 +13133,7 @@ std::string NMD::SDBBP_32_(uint64 instruction)
*/
std::string NMD::SDC1_GP_(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 u_value = extract_u_17_to_2__s2(instruction);
std::string ft = FPR(copy(ft_value));
@@ -13156,7 +13156,7 @@ std::string NMD::SDC1_GP_(uint64 instruction)
std::string NMD::SDC1_S9_(uint64 instruction)
{
int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -13179,7 +13179,7 @@ std::string NMD::SDC1_S9_(uint64 instruction)
*/
std::string NMD::SDC1_U12_(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
@@ -13415,7 +13415,7 @@ std::string NMD::SEH(uint64 instruction)
*/
std::string NMD::SEL_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -13439,7 +13439,7 @@ std::string NMD::SEL_D(uint64 instruction)
*/
std::string NMD::SEL_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -13463,7 +13463,7 @@ std::string NMD::SEL_S(uint64 instruction)
*/
std::string NMD::SELEQZ_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -13487,7 +13487,7 @@ std::string NMD::SELEQZ_D(uint64 instruction)
*/
std::string NMD::SELEQZ_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -13511,7 +13511,7 @@ std::string NMD::SELEQZ_S(uint64 instruction)
*/
std::string NMD::SELNEZ_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -13535,7 +13535,7 @@ std::string NMD::SELNEZ_D(uint64 instruction)
*/
std::string NMD::SELNEZ_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -14553,7 +14553,7 @@ std::string NMD::SPECIAL2(uint64 instruction)
*/
std::string NMD::SQRT_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -14575,7 +14575,7 @@ std::string NMD::SQRT_D(uint64 instruction)
*/
std::string NMD::SQRT_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -14741,7 +14741,7 @@ std::string NMD::SUB(uint64 instruction)
*/
std::string NMD::SUB_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -14765,7 +14765,7 @@ std::string NMD::SUB_D(uint64 instruction)
*/
std::string NMD::SUB_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
@@ -15319,7 +15319,7 @@ std::string NMD::SW_U12_(uint64 instruction)
*/
std::string NMD::SWC1_GP_(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 u_value = extract_u_17_to_2__s2(instruction);
std::string ft = FPR(copy(ft_value));
@@ -15342,7 +15342,7 @@ std::string NMD::SWC1_GP_(uint64 instruction)
std::string NMD::SWC1_S9_(uint64 instruction)
{
int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -15365,7 +15365,7 @@ std::string NMD::SWC1_S9_(uint64 instruction)
*/
std::string NMD::SWC1_U12_(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
@@ -15943,7 +15943,7 @@ std::string NMD::TNE(uint64 instruction)
*/
std::string NMD::TRUNC_L_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -15965,7 +15965,7 @@ std::string NMD::TRUNC_L_D(uint64 instruction)
*/
std::string NMD::TRUNC_L_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -15987,7 +15987,7 @@ std::string NMD::TRUNC_L_S(uint64 instruction)
*/
std::string NMD::TRUNC_W_D(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
@@ -16009,7 +16009,7 @@ std::string NMD::TRUNC_W_D(uint64 instruction)
*/
std::string NMD::TRUNC_W_S(uint64 instruction)
{
- uint64 ft_value = extract_ft_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
std::string ft = FPR(copy(ft_value));
diff --git a/disas/nanomips.h b/disas/nanomips.h
index fad70d2..cf15625 100644
--- a/disas/nanomips.h
+++ b/disas/nanomips.h
@@ -179,7 +179,7 @@ private:
uint64 extract_fd_15_14_13_12_11(uint64 instruction);
uint64 extract_fs_20_19_18_17_16(uint64 instruction);
uint64 extract_ft_15_14_13_12_11(uint64 instruction);
- uint64 extract_ft_20_19_18_17_16(uint64 instruction);
+ uint64 extract_ft_25_24_23_22_21(uint64 instruction);
uint64 extract_gp_2(uint64 instruction);
uint64 extract_hint_25_24_23_22_21(uint64 instruction);
uint64 extract_hs_20_19_18_17_16(uint64 instruction);
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 23/44] disas: nanoMIPS: Name more functions in a more descriptive way
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (21 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 22/44] disas: nanoMIPS: Fix an FP-related misnomer 3 Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 24/44] disas: nanoMIPS: Fix order of more invocations Aleksandar Markovic
` (21 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Rename more functions that have names that are hard to understand.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
disas/nanomips.cpp | 212 ++++++++++++++++++++++++++---------------------------
disas/nanomips.h | 28 +++----
2 files changed, 120 insertions(+), 120 deletions(-)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index 69b6e99..aa33434 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -719,7 +719,7 @@ uint64 NMD::extract_u_17_to_1__s1(uint64 instruction)
}
-int64 NMD::extr_sil11il0bs10Tmsb9(uint64 instruction)
+int64 NMD::extract_s__se9_20_19_18_17_16_15_14_13_12_11(uint64 instruction)
{
int64 value = 0;
value |= extract_bits(instruction, 11, 10);
@@ -728,7 +728,7 @@ int64 NMD::extr_sil11il0bs10Tmsb9(uint64 instruction)
}
-int64 NMD::extr_sil0il11bs1_il1il1bs10Tmsb11(uint64 instruction)
+int64 NMD::extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(uint64 instruction)
{
int64 value = 0;
value |= extract_bits(instruction, 0, 1) << 11;
@@ -795,7 +795,7 @@ uint64 NMD::extract_count3_14_13_12(uint64 instruction)
}
-int64 NMD::extr_sil0il31bs1_il2il21bs10_il12il12bs9Tmsb31(uint64 instruction)
+int64 NMD::extract_s__se31_0_11_to_2_20_to_12_s12(uint64 instruction)
{
int64 value = 0;
value |= extract_bits(instruction, 0, 1) << 31;
@@ -806,7 +806,7 @@ int64 NMD::extr_sil0il31bs1_il2il21bs10_il12il12bs9Tmsb31(uint64 instruction)
}
-int64 NMD::extr_sil0il7bs1_il1il1bs6Tmsb7(uint64 instruction)
+int64 NMD::extract_s__se7_0_6_5_4_3_2_1_s1(uint64 instruction)
{
int64 value = 0;
value |= extract_bits(instruction, 0, 1) << 7;
@@ -880,7 +880,7 @@ uint64 NMD::extract_rdl_25_24(uint64 instruction)
}
-int64 NMD::extr_sil0il10bs1_il1il1bs9Tmsb10(uint64 instruction)
+int64 NMD::extract_s__se10_0_9_8_7_6_5_4_3_2_1_s1(uint64 instruction)
{
int64 value = 0;
value |= extract_bits(instruction, 0, 1) << 10;
@@ -1019,7 +1019,7 @@ uint64 NMD::extract_rsz4_4_2_1_0(uint64 instruction)
}
-int64 NMD::extr_sil0il21bs1_il1il1bs20Tmsb21(uint64 instruction)
+int64 NMD::extract_s__se21_0_20_to_1_s1(uint64 instruction)
{
int64 value = 0;
value |= extract_bits(instruction, 0, 1) << 21;
@@ -1062,7 +1062,7 @@ uint64 NMD::extract_rt_41_40_39_38_37(uint64 instruction)
}
-int64 NMD::extract_shift_21_20_19_18_17_16(uint64 instruction)
+int64 NMD::extract_shift__se5_21_20_19_18_17_16(uint64 instruction)
{
int64 value = 0;
value |= extract_bits(instruction, 16, 6);
@@ -1096,7 +1096,7 @@ uint64 NMD::extract_size_20_19_18_17_16(uint64 instruction)
}
-int64 NMD::extr_sil2il2bs6_il15il8bs1Tmsb8(uint64 instruction)
+int64 NMD::extract_s__se8_15_7_6_5_4_3_2_s2(uint64 instruction)
{
int64 value = 0;
value |= extract_bits(instruction, 2, 6) << 2;
@@ -1122,7 +1122,7 @@ uint64 NMD::extract_fs_20_19_18_17_16(uint64 instruction)
}
-int64 NMD::extr_sil0il0bs8_il15il8bs1Tmsb8(uint64 instruction)
+int64 NMD::extract_s__se8_15_7_6_5_4_3_2_1_0(uint64 instruction)
{
int64 value = 0;
value |= extract_bits(instruction, 0, 8);
@@ -1245,7 +1245,7 @@ uint64 NMD::extract_sa_15_14_13(uint64 instruction)
}
-int64 NMD::extr_sil0il14bs1_il1il1bs13Tmsb14(uint64 instruction)
+int64 NMD::extract_s__se14_0_13_to_1_s1(uint64 instruction)
{
int64 value = 0;
value |= extract_bits(instruction, 0, 1) << 14;
@@ -1351,7 +1351,7 @@ uint64 NMD::extract_u_7_6_5_4__s4(uint64 instruction)
}
-int64 NMD::extr_sil3il3bs5_il15il8bs1Tmsb8(uint64 instruction)
+int64 NMD::extract_s__se8_15_7_6_5_4_3_s3(uint64 instruction)
{
int64 value = 0;
value |= extract_bits(instruction, 3, 5) << 3;
@@ -1369,7 +1369,7 @@ uint64 NMD::extract_ft_15_14_13_12_11(uint64 instruction)
}
-int64 NMD::extr_sil0il16bs16_il16il0bs16Tmsb31(uint64 instruction)
+int64 NMD::extract_s__se31_15_to_0_31_to_16(uint64 instruction)
{
int64 value = 0;
value |= extract_bits(instruction, 0, 16) << 16;
@@ -1419,7 +1419,7 @@ uint64 NMD::extract_code_1_0(uint64 instruction)
}
-int64 NMD::extr_sil0il25bs1_il1il1bs24Tmsb25(uint64 instruction)
+int64 NMD::extract_s__se25_0_24_to_1_s1(uint64 instruction)
{
int64 value = 0;
value |= extract_bits(instruction, 0, 1) << 25;
@@ -1495,7 +1495,7 @@ uint64 NMD::extract_u_20_to_2__s2(uint64 instruction)
}
-int64 NMD::extract_s_4_2_1_0(uint64 instruction)
+int64 NMD::extract_s__se3_4_2_1_0(uint64 instruction)
{
int64 value = 0;
value |= extract_bits(instruction, 0, 3);
@@ -1708,7 +1708,7 @@ std::string NMD::ABSQ_S_W(uint64 instruction)
std::string NMD::ACLR(uint64 instruction)
{
uint64 bit_value = extract_bit_23_22_21(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string bit = IMMEDIATE(copy(bit_value));
@@ -1827,7 +1827,7 @@ std::string NMD::ADDIU_32_(uint64 instruction)
std::string NMD::ADDIU_48_(uint64 instruction)
{
uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
- int64 s_value = extr_sil0il16bs16_il16il0bs16Tmsb31(instruction);
+ int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -1848,7 +1848,7 @@ std::string NMD::ADDIU_48_(uint64 instruction)
std::string NMD::ADDIU_GP48_(uint64 instruction)
{
uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
- int64 s_value = extr_sil0il16bs16_il16il0bs16Tmsb31(instruction);
+ int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -1977,7 +1977,7 @@ std::string NMD::ADDIU_R2_(uint64 instruction)
std::string NMD::ADDIU_RS5_(uint64 instruction)
{
uint64 rt_value = extract_rt_9_8_7_6_5(instruction);
- int64 s_value = extract_s_4_2_1_0(instruction);
+ int64 s_value = extract_s__se3_4_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -1999,7 +1999,7 @@ std::string NMD::ADDIU_RS5_(uint64 instruction)
std::string NMD::ADDIUPC_32_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il21bs1_il1il1bs20Tmsb21(instruction);
+ int64 s_value = extract_s__se21_0_20_to_1_s1(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = ADDRESS(encode_s_from_address(s_value), 4);
@@ -2021,7 +2021,7 @@ std::string NMD::ADDIUPC_32_(uint64 instruction)
std::string NMD::ADDIUPC_48_(uint64 instruction)
{
uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
- int64 s_value = extr_sil0il16bs16_il16il0bs16Tmsb31(instruction);
+ int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = ADDRESS(encode_s_from_address(s_value), 6);
@@ -2475,7 +2475,7 @@ std::string NMD::ADDWC(uint64 instruction)
std::string NMD::ALUIPC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il31bs1_il2il21bs10_il12il12bs9Tmsb31(instruction);
+ int64 s_value = extract_s__se31_0_11_to_2_20_to_12_s12(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = ADDRESS(encode_s_from_address(s_value), 4);
@@ -2613,7 +2613,7 @@ std::string NMD::APPEND(uint64 instruction)
std::string NMD::ASET(uint64 instruction)
{
uint64 bit_value = extract_bit_23_22_21(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string bit = IMMEDIATE(copy(bit_value));
@@ -2636,7 +2636,7 @@ std::string NMD::ASET(uint64 instruction)
*/
std::string NMD::BALC_16_(uint64 instruction)
{
- int64 s_value = extr_sil0il10bs1_il1il1bs9Tmsb10(instruction);
+ int64 s_value = extract_s__se10_0_9_8_7_6_5_4_3_2_1_s1(instruction);
std::string s = ADDRESS(encode_s_from_address(s_value), 2);
@@ -2656,7 +2656,7 @@ std::string NMD::BALC_16_(uint64 instruction)
*/
std::string NMD::BALC_32_(uint64 instruction)
{
- int64 s_value = extr_sil0il25bs1_il1il1bs24Tmsb25(instruction);
+ int64 s_value = extract_s__se25_0_24_to_1_s1(instruction);
std::string s = ADDRESS(encode_s_from_address(s_value), 4);
@@ -2700,7 +2700,7 @@ std::string NMD::BBEQZC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
uint64 bit_value = extract_bit_16_15_14_13_12_11(instruction);
- int64 s_value = extr_sil0il11bs1_il1il1bs10Tmsb11(instruction);
+ int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
std::string rt = GPR(copy(rt_value));
std::string bit = IMMEDIATE(copy(bit_value));
@@ -2724,7 +2724,7 @@ std::string NMD::BBNEZC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
uint64 bit_value = extract_bit_16_15_14_13_12_11(instruction);
- int64 s_value = extr_sil0il11bs1_il1il1bs10Tmsb11(instruction);
+ int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
std::string rt = GPR(copy(rt_value));
std::string bit = IMMEDIATE(copy(bit_value));
@@ -2746,7 +2746,7 @@ std::string NMD::BBNEZC(uint64 instruction)
*/
std::string NMD::BC_16_(uint64 instruction)
{
- int64 s_value = extr_sil0il10bs1_il1il1bs9Tmsb10(instruction);
+ int64 s_value = extract_s__se10_0_9_8_7_6_5_4_3_2_1_s1(instruction);
std::string s = ADDRESS(encode_s_from_address(s_value), 2);
@@ -2766,7 +2766,7 @@ std::string NMD::BC_16_(uint64 instruction)
*/
std::string NMD::BC_32_(uint64 instruction)
{
- int64 s_value = extr_sil0il25bs1_il1il1bs24Tmsb25(instruction);
+ int64 s_value = extract_s__se25_0_24_to_1_s1(instruction);
std::string s = ADDRESS(encode_s_from_address(s_value), 4);
@@ -2786,7 +2786,7 @@ std::string NMD::BC_32_(uint64 instruction)
*/
std::string NMD::BC1EQZC(uint64 instruction)
{
- int64 s_value = extr_sil0il14bs1_il1il1bs13Tmsb14(instruction);
+ int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
std::string ft = FPR(copy(ft_value));
@@ -2808,7 +2808,7 @@ std::string NMD::BC1EQZC(uint64 instruction)
*/
std::string NMD::BC1NEZC(uint64 instruction)
{
- int64 s_value = extr_sil0il14bs1_il1il1bs13Tmsb14(instruction);
+ int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
std::string ft = FPR(copy(ft_value));
@@ -2830,7 +2830,7 @@ std::string NMD::BC1NEZC(uint64 instruction)
*/
std::string NMD::BC2EQZC(uint64 instruction)
{
- int64 s_value = extr_sil0il14bs1_il1il1bs13Tmsb14(instruction);
+ int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
uint64 ct_value = extract_ct_25_24_23_22_21(instruction);
std::string ct = CPR(copy(ct_value));
@@ -2852,7 +2852,7 @@ std::string NMD::BC2EQZC(uint64 instruction)
*/
std::string NMD::BC2NEZC(uint64 instruction)
{
- int64 s_value = extr_sil0il14bs1_il1il1bs13Tmsb14(instruction);
+ int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
uint64 ct_value = extract_ct_25_24_23_22_21(instruction);
std::string ct = CPR(copy(ct_value));
@@ -2899,7 +2899,7 @@ std::string NMD::BEQC_16_(uint64 instruction)
std::string NMD::BEQC_32_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il14bs1_il1il1bs13Tmsb14(instruction);
+ int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rs = GPR(copy(rs_value));
@@ -2923,7 +2923,7 @@ std::string NMD::BEQC_32_(uint64 instruction)
std::string NMD::BEQIC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il11bs1_il1il1bs10Tmsb11(instruction);
+ int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
std::string rt = GPR(copy(rt_value));
@@ -2946,7 +2946,7 @@ std::string NMD::BEQIC(uint64 instruction)
*/
std::string NMD::BEQZC_16_(uint64 instruction)
{
- int64 s_value = extr_sil0il7bs1_il1il1bs6Tmsb7(instruction);
+ int64 s_value = extract_s__se7_0_6_5_4_3_2_1_s1(instruction);
uint64 rt3_value = extract_rt3_9_8_7(instruction);
std::string rt3 = GPR(encode_gpr3(rt3_value));
@@ -2969,7 +2969,7 @@ std::string NMD::BEQZC_16_(uint64 instruction)
std::string NMD::BGEC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il14bs1_il1il1bs13Tmsb14(instruction);
+ int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rs = GPR(copy(rs_value));
@@ -2993,7 +2993,7 @@ std::string NMD::BGEC(uint64 instruction)
std::string NMD::BGEIC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il11bs1_il1il1bs10Tmsb11(instruction);
+ int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
std::string rt = GPR(copy(rt_value));
@@ -3017,7 +3017,7 @@ std::string NMD::BGEIC(uint64 instruction)
std::string NMD::BGEIUC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il11bs1_il1il1bs10Tmsb11(instruction);
+ int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
std::string rt = GPR(copy(rt_value));
@@ -3041,7 +3041,7 @@ std::string NMD::BGEIUC(uint64 instruction)
std::string NMD::BGEUC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il14bs1_il1il1bs13Tmsb14(instruction);
+ int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rs = GPR(copy(rs_value));
@@ -3065,7 +3065,7 @@ std::string NMD::BGEUC(uint64 instruction)
std::string NMD::BLTC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il14bs1_il1il1bs13Tmsb14(instruction);
+ int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rs = GPR(copy(rs_value));
@@ -3089,7 +3089,7 @@ std::string NMD::BLTC(uint64 instruction)
std::string NMD::BLTIC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il11bs1_il1il1bs10Tmsb11(instruction);
+ int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
std::string rt = GPR(copy(rt_value));
@@ -3113,7 +3113,7 @@ std::string NMD::BLTIC(uint64 instruction)
std::string NMD::BLTIUC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il11bs1_il1il1bs10Tmsb11(instruction);
+ int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
std::string rt = GPR(copy(rt_value));
@@ -3137,7 +3137,7 @@ std::string NMD::BLTIUC(uint64 instruction)
std::string NMD::BLTUC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il14bs1_il1il1bs13Tmsb14(instruction);
+ int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rs = GPR(copy(rs_value));
@@ -3185,7 +3185,7 @@ std::string NMD::BNEC_16_(uint64 instruction)
std::string NMD::BNEC_32_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il14bs1_il1il1bs13Tmsb14(instruction);
+ int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rs = GPR(copy(rs_value));
@@ -3209,7 +3209,7 @@ std::string NMD::BNEC_32_(uint64 instruction)
std::string NMD::BNEIC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il11bs1_il1il1bs10Tmsb11(instruction);
+ int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
std::string rt = GPR(copy(rt_value));
@@ -3232,7 +3232,7 @@ std::string NMD::BNEIC(uint64 instruction)
*/
std::string NMD::BNEZC_16_(uint64 instruction)
{
- int64 s_value = extr_sil0il7bs1_il1il1bs6Tmsb7(instruction);
+ int64 s_value = extract_s__se7_0_6_5_4_3_2_1_s1(instruction);
uint64 rt3_value = extract_rt3_9_8_7(instruction);
std::string rt3 = GPR(encode_gpr3(rt3_value));
@@ -3254,7 +3254,7 @@ std::string NMD::BNEZC_16_(uint64 instruction)
*/
std::string NMD::BPOSGE32C(uint64 instruction)
{
- int64 s_value = extr_sil0il14bs1_il1il1bs13Tmsb14(instruction);
+ int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
std::string s = ADDRESS(encode_s_from_address(s_value), 4);
@@ -3334,7 +3334,7 @@ std::string NMD::BRSC(uint64 instruction)
*/
std::string NMD::CACHE(uint64 instruction)
{
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 op_value = extract_op_25_24_23_22_21(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
@@ -3358,7 +3358,7 @@ std::string NMD::CACHE(uint64 instruction)
*/
std::string NMD::CACHEE(uint64 instruction)
{
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 op_value = extract_op_25_24_23_22_21(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
@@ -5263,7 +5263,7 @@ std::string NMD::CVT_W_S(uint64 instruction)
std::string NMD::DADDIU_48_(uint64 instruction)
{
uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
- int64 s_value = extr_sil0il16bs16_il16il0bs16Tmsb31(instruction);
+ int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -7828,7 +7828,7 @@ std::string NMD::LB_GP_(uint64 instruction)
std::string NMD::LB_S9_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -7876,7 +7876,7 @@ std::string NMD::LB_U12_(uint64 instruction)
std::string NMD::LBE(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -7946,7 +7946,7 @@ std::string NMD::LBU_GP_(uint64 instruction)
std::string NMD::LBU_S9_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -7994,7 +7994,7 @@ std::string NMD::LBU_U12_(uint64 instruction)
std::string NMD::LBUE(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -8088,7 +8088,7 @@ std::string NMD::LD_GP_(uint64 instruction)
std::string NMD::LD_S9_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -8157,7 +8157,7 @@ std::string NMD::LDC1_GP_(uint64 instruction)
*/
std::string NMD::LDC1_S9_(uint64 instruction)
{
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
@@ -8253,7 +8253,7 @@ std::string NMD::LDC1X(uint64 instruction)
*/
std::string NMD::LDC2(uint64 instruction)
{
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 ct_value = extract_ct_25_24_23_22_21(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
@@ -8279,7 +8279,7 @@ std::string NMD::LDM(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
uint64 count3_value = extract_count3_14_13_12(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -8304,7 +8304,7 @@ std::string NMD::LDM(uint64 instruction)
std::string NMD::LDPC_48_(uint64 instruction)
{
uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
- int64 s_value = extr_sil0il16bs16_il16il0bs16Tmsb31(instruction);
+ int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = ADDRESS(encode_s_from_address(s_value), 6);
@@ -8420,7 +8420,7 @@ std::string NMD::LH_GP_(uint64 instruction)
std::string NMD::LH_S9_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -8468,7 +8468,7 @@ std::string NMD::LH_U12_(uint64 instruction)
std::string NMD::LHE(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -8538,7 +8538,7 @@ std::string NMD::LHU_GP_(uint64 instruction)
std::string NMD::LHU_S9_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -8586,7 +8586,7 @@ std::string NMD::LHU_U12_(uint64 instruction)
std::string NMD::LHUE(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -8728,7 +8728,7 @@ std::string NMD::LI_16_(uint64 instruction)
std::string NMD::LI_48_(uint64 instruction)
{
uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
- int64 s_value = extr_sil0il16bs16_il16il0bs16Tmsb31(instruction);
+ int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -8750,7 +8750,7 @@ std::string NMD::LI_48_(uint64 instruction)
std::string NMD::LL(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil2il2bs6_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -8774,7 +8774,7 @@ std::string NMD::LL(uint64 instruction)
std::string NMD::LLD(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil3il3bs5_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_s3(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -8822,7 +8822,7 @@ std::string NMD::LLDP(uint64 instruction)
std::string NMD::LLE(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil2il2bs6_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -8920,7 +8920,7 @@ std::string NMD::LSA(uint64 instruction)
std::string NMD::LUI(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il31bs1_il2il21bs10_il12il12bs9Tmsb31(instruction);
+ int64 s_value = extract_s__se31_0_11_to_2_20_to_12_s12(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -9034,7 +9034,7 @@ std::string NMD::LW_GP16_(uint64 instruction)
std::string NMD::LW_S9_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -9125,7 +9125,7 @@ std::string NMD::LWC1_GP_(uint64 instruction)
*/
std::string NMD::LWC1_S9_(uint64 instruction)
{
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
@@ -9221,7 +9221,7 @@ std::string NMD::LWC1XS(uint64 instruction)
*/
std::string NMD::LWC2(uint64 instruction)
{
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 ct_value = extract_ct_25_24_23_22_21(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
@@ -9246,7 +9246,7 @@ std::string NMD::LWC2(uint64 instruction)
std::string NMD::LWE(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -9271,7 +9271,7 @@ std::string NMD::LWM(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
uint64 count3_value = extract_count3_14_13_12(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -9296,7 +9296,7 @@ std::string NMD::LWM(uint64 instruction)
std::string NMD::LWPC_48_(uint64 instruction)
{
uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
- int64 s_value = extr_sil0il16bs16_il16il0bs16Tmsb31(instruction);
+ int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = ADDRESS(encode_s_from_address(s_value), 6);
@@ -9340,7 +9340,7 @@ std::string NMD::LWU_GP_(uint64 instruction)
std::string NMD::LWU_S9_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -10289,7 +10289,7 @@ std::string NMD::MOVE_BALC(uint64 instruction)
{
uint64 rtz4_value = extract_rtz4_27_26_25_23_22_21(instruction);
uint64 rd1_value = extract_rdl_25_24(instruction);
- int64 s_value = extr_sil0il21bs1_il1il1bs20Tmsb21(instruction);
+ int64 s_value = extract_s__se21_0_20_to_1_s1(instruction);
std::string rd1 = GPR(encode_rd1_from_rd(rd1_value));
std::string rtz4 = GPR(encode_gpr4_zero(rtz4_value));
@@ -12011,7 +12011,7 @@ std::string NMD::PREF_S9_(uint64 instruction)
{
uint64 hint_value = extract_hint_25_24_23_22_21(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string hint = IMMEDIATE(copy(hint_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -12057,7 +12057,7 @@ std::string NMD::PREF_U12_(uint64 instruction)
*/
std::string NMD::PREFE(uint64 instruction)
{
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 hint_value = extract_hint_25_24_23_22_21(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
@@ -12240,7 +12240,7 @@ std::string NMD::RECIP_S(uint64 instruction)
std::string NMD::REPL_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil11il0bs10Tmsb9(instruction);
+ int64 s_value = extract_s__se9_20_19_18_17_16_15_14_13_12_11(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -12784,7 +12784,7 @@ std::string NMD::SB_GP_(uint64 instruction)
std::string NMD::SB_S9_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -12832,7 +12832,7 @@ std::string NMD::SB_U12_(uint64 instruction)
std::string NMD::SBE(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -12880,7 +12880,7 @@ std::string NMD::SBX(uint64 instruction)
std::string NMD::SC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil2il2bs6_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -12904,7 +12904,7 @@ std::string NMD::SC(uint64 instruction)
std::string NMD::SCD(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil3il3bs5_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_s3(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -12952,7 +12952,7 @@ std::string NMD::SCDP(uint64 instruction)
std::string NMD::SCE(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil2il2bs6_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -13046,7 +13046,7 @@ std::string NMD::SD_GP_(uint64 instruction)
std::string NMD::SD_S9_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -13155,7 +13155,7 @@ std::string NMD::SDC1_GP_(uint64 instruction)
*/
std::string NMD::SDC1_S9_(uint64 instruction)
{
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
@@ -13252,7 +13252,7 @@ std::string NMD::SDC1XS(uint64 instruction)
std::string NMD::SDC2(uint64 instruction)
{
uint64 cs_value = extract_cs_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string cs = CPR(copy(cs_value));
@@ -13277,7 +13277,7 @@ std::string NMD::SDM(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
uint64 count3_value = extract_count3_14_13_12(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -13302,7 +13302,7 @@ std::string NMD::SDM(uint64 instruction)
std::string NMD::SDPC_48_(uint64 instruction)
{
uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
- int64 s_value = extr_sil0il16bs16_il16il0bs16Tmsb31(instruction);
+ int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = ADDRESS(encode_s_from_address(s_value), 6);
@@ -13630,7 +13630,7 @@ std::string NMD::SH_GP_(uint64 instruction)
std::string NMD::SH_S9_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -13678,7 +13678,7 @@ std::string NMD::SH_U12_(uint64 instruction)
std::string NMD::SHE(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -13701,7 +13701,7 @@ std::string NMD::SHE(uint64 instruction)
*/
std::string NMD::SHILO(uint64 instruction)
{
- int64 shift_value = extract_shift_21_20_19_18_17_16(instruction);
+ int64 shift_value = extract_shift__se5_21_20_19_18_17_16(instruction);
uint64 ac_value = extract_ac_13_12(instruction);
std::string shift = IMMEDIATE(copy(shift_value));
@@ -15250,7 +15250,7 @@ std::string NMD::SW_GP_(uint64 instruction)
std::string NMD::SW_S9_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -15341,7 +15341,7 @@ std::string NMD::SWC1_GP_(uint64 instruction)
*/
std::string NMD::SWC1_S9_(uint64 instruction)
{
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
@@ -15438,7 +15438,7 @@ std::string NMD::SWC1XS(uint64 instruction)
std::string NMD::SWC2(uint64 instruction)
{
uint64 cs_value = extract_cs_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string cs = CPR(copy(cs_value));
@@ -15462,7 +15462,7 @@ std::string NMD::SWC2(uint64 instruction)
std::string NMD::SWE(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -15487,7 +15487,7 @@ std::string NMD::SWM(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
uint64 count3_value = extract_count3_14_13_12(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -15512,7 +15512,7 @@ std::string NMD::SWM(uint64 instruction)
std::string NMD::SWPC_48_(uint64 instruction)
{
uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
- int64 s_value = extr_sil0il16bs16_il16il0bs16Tmsb31(instruction);
+ int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = ADDRESS(encode_s_from_address(s_value), 6);
@@ -15601,7 +15601,7 @@ std::string NMD::SYNC(uint64 instruction)
*/
std::string NMD::SYNCI(uint64 instruction)
{
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string s = IMMEDIATE(copy(s_value));
@@ -15623,7 +15623,7 @@ std::string NMD::SYNCI(uint64 instruction)
*/
std::string NMD::SYNCIE(uint64 instruction)
{
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string s = IMMEDIATE(copy(s_value));
@@ -16033,7 +16033,7 @@ std::string NMD::UALDM(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
uint64 count3_value = extract_count3_14_13_12(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -16058,7 +16058,7 @@ std::string NMD::UALDM(uint64 instruction)
std::string NMD::UALH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -16083,7 +16083,7 @@ std::string NMD::UALWM(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
uint64 count3_value = extract_count3_14_13_12(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -16109,7 +16109,7 @@ std::string NMD::UASDM(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
uint64 count3_value = extract_count3_14_13_12(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -16134,7 +16134,7 @@ std::string NMD::UASDM(uint64 instruction)
std::string NMD::UASH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
@@ -16159,7 +16159,7 @@ std::string NMD::UASWM(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
uint64 count3_value = extract_count3_14_13_12(instruction);
- int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
diff --git a/disas/nanomips.h b/disas/nanomips.h
index cf15625..86f673c 100644
--- a/disas/nanomips.h
+++ b/disas/nanomips.h
@@ -143,20 +143,20 @@ private:
std::string CPR(uint64 reg);
std::string ADDRESS(uint64 value, int instruction_size);
- int64 extract_s_4_2_1_0(uint64 instruction);
- int64 extr_sil0il0bs8_il15il8bs1Tmsb8(uint64 instruction);
- int64 extr_sil0il10bs1_il1il1bs9Tmsb10(uint64 instruction);
- int64 extr_sil0il11bs1_il1il1bs10Tmsb11(uint64 instruction);
- int64 extr_sil0il14bs1_il1il1bs13Tmsb14(uint64 instruction);
- int64 extr_sil0il16bs16_il16il0bs16Tmsb31(uint64 instruction);
- int64 extr_sil0il21bs1_il1il1bs20Tmsb21(uint64 instruction);
- int64 extr_sil0il25bs1_il1il1bs24Tmsb25(uint64 instruction);
- int64 extr_sil0il31bs1_il2il21bs10_il12il12bs9Tmsb31(uint64 instruction);
- int64 extr_sil0il7bs1_il1il1bs6Tmsb7(uint64 instruction);
- int64 extr_sil11il0bs10Tmsb9(uint64 instruction);
- int64 extract_shift_21_20_19_18_17_16(uint64 instruction);
- int64 extr_sil2il2bs6_il15il8bs1Tmsb8(uint64 instruction);
- int64 extr_sil3il3bs5_il15il8bs1Tmsb8(uint64 instruction);
+ int64 extract_s__se3_4_2_1_0(uint64 instruction);
+ int64 extract_s__se7_0_6_5_4_3_2_1_s1(uint64 instruction);
+ int64 extract_s__se8_15_7_6_5_4_3_s3(uint64 instruction);
+ int64 extract_s__se8_15_7_6_5_4_3_2_s2(uint64 instruction);
+ int64 extract_s__se8_15_7_6_5_4_3_2_1_0(uint64 instruction);
+ int64 extract_s__se9_20_19_18_17_16_15_14_13_12_11(uint64 instruction);
+ int64 extract_s__se10_0_9_8_7_6_5_4_3_2_1_s1(uint64 instruction);
+ int64 extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(uint64 instruction);
+ int64 extract_s__se14_0_13_to_1_s1(uint64 instruction);
+ int64 extract_s__se21_0_20_to_1_s1(uint64 instruction);
+ int64 extract_s__se25_0_24_to_1_s1(uint64 instruction);
+ int64 extract_s__se31_15_to_0_31_to_16(uint64 instruction);
+ int64 extract_s__se31_0_11_to_2_20_to_12_s12(uint64 instruction);
+ int64 extract_shift__se5_21_20_19_18_17_16(uint64 instruction);
uint64 extract_ac_13_12(uint64 instruction);
uint64 extract_bit_16_15_14_13_12_11(uint64 instruction);
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 24/44] disas: nanoMIPS: Fix order of more invocations
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (22 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 23/44] disas: nanoMIPS: Name more functions in a more descriptive way Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 25/44] disas: nanoMIPS: Rename the decoder of 'gpr3' gpr encoding type Aleksandar Markovic
` (20 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Fix order of extraction function invocations so that extraction
goes from MSB side to LSB side of the given instruction coding
content. This is desireable because of consistency and easier
visual spotting of errors.
After this patch, all such invocations should be in the desired
order.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
disas/nanomips.cpp | 260 ++++++++++++++++++++++++++---------------------------
1 file changed, 130 insertions(+), 130 deletions(-)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index aa33434..e9018ea 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -1708,8 +1708,8 @@ std::string NMD::ABSQ_S_W(uint64 instruction)
std::string NMD::ACLR(uint64 instruction)
{
uint64 bit_value = extract_bit_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string bit = IMMEDIATE(copy(bit_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -1954,9 +1954,9 @@ std::string NMD::ADDIU_R1_SP_(uint64 instruction)
*/
std::string NMD::ADDIU_R2_(uint64 instruction)
{
- uint64 u_value = extract_u_2_1_0__s2(instruction);
uint64 rt3_value = extract_rt3_9_8_7(instruction);
uint64 rs3_value = extract_rs3_6_5_4(instruction);
+ uint64 u_value = extract_u_2_1_0__s2(instruction);
std::string rt3 = GPR(encode_gpr3(rt3_value));
std::string rs3 = GPR(encode_gpr3(rs3_value));
@@ -2613,8 +2613,8 @@ std::string NMD::APPEND(uint64 instruction)
std::string NMD::ASET(uint64 instruction)
{
uint64 bit_value = extract_bit_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string bit = IMMEDIATE(copy(bit_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -2786,8 +2786,8 @@ std::string NMD::BC_32_(uint64 instruction)
*/
std::string NMD::BC1EQZC(uint64 instruction)
{
- int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
+ int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
std::string ft = FPR(copy(ft_value));
std::string s = ADDRESS(encode_s_from_address(s_value), 4);
@@ -2808,8 +2808,8 @@ std::string NMD::BC1EQZC(uint64 instruction)
*/
std::string NMD::BC1NEZC(uint64 instruction)
{
- int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
+ int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
std::string ft = FPR(copy(ft_value));
std::string s = ADDRESS(encode_s_from_address(s_value), 4);
@@ -2830,8 +2830,8 @@ std::string NMD::BC1NEZC(uint64 instruction)
*/
std::string NMD::BC2EQZC(uint64 instruction)
{
- int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
uint64 ct_value = extract_ct_25_24_23_22_21(instruction);
+ int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
std::string ct = CPR(copy(ct_value));
std::string s = ADDRESS(encode_s_from_address(s_value), 4);
@@ -2852,8 +2852,8 @@ std::string NMD::BC2EQZC(uint64 instruction)
*/
std::string NMD::BC2NEZC(uint64 instruction)
{
- int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
uint64 ct_value = extract_ct_25_24_23_22_21(instruction);
+ int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
std::string ct = CPR(copy(ct_value));
std::string s = ADDRESS(encode_s_from_address(s_value), 4);
@@ -2874,9 +2874,9 @@ std::string NMD::BC2NEZC(uint64 instruction)
*/
std::string NMD::BEQC_16_(uint64 instruction)
{
- uint64 u_value = extract_u_3_2_1_0__s1(instruction);
uint64 rt3_value = extract_rt3_9_8_7(instruction);
uint64 rs3_value = extract_rs3_6_5_4(instruction);
+ uint64 u_value = extract_u_3_2_1_0__s1(instruction);
std::string rs3 = GPR(encode_rs3_and_check_rs3_lt_rt3(rs3_value));
std::string rt3 = GPR(encode_gpr3(rt3_value));
@@ -2899,8 +2899,8 @@ std::string NMD::BEQC_16_(uint64 instruction)
std::string NMD::BEQC_32_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
std::string rs = GPR(copy(rs_value));
std::string rt = GPR(copy(rt_value));
@@ -2923,8 +2923,8 @@ std::string NMD::BEQC_32_(uint64 instruction)
std::string NMD::BEQIC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
+ int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -2946,8 +2946,8 @@ std::string NMD::BEQIC(uint64 instruction)
*/
std::string NMD::BEQZC_16_(uint64 instruction)
{
- int64 s_value = extract_s__se7_0_6_5_4_3_2_1_s1(instruction);
uint64 rt3_value = extract_rt3_9_8_7(instruction);
+ int64 s_value = extract_s__se7_0_6_5_4_3_2_1_s1(instruction);
std::string rt3 = GPR(encode_gpr3(rt3_value));
std::string s = ADDRESS(encode_s_from_address(s_value), 2);
@@ -2969,8 +2969,8 @@ std::string NMD::BEQZC_16_(uint64 instruction)
std::string NMD::BGEC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
std::string rs = GPR(copy(rs_value));
std::string rt = GPR(copy(rt_value));
@@ -2993,8 +2993,8 @@ std::string NMD::BGEC(uint64 instruction)
std::string NMD::BGEIC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
+ int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -3017,8 +3017,8 @@ std::string NMD::BGEIC(uint64 instruction)
std::string NMD::BGEIUC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
+ int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -3041,8 +3041,8 @@ std::string NMD::BGEIUC(uint64 instruction)
std::string NMD::BGEUC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
std::string rs = GPR(copy(rs_value));
std::string rt = GPR(copy(rt_value));
@@ -3065,8 +3065,8 @@ std::string NMD::BGEUC(uint64 instruction)
std::string NMD::BLTC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
std::string rs = GPR(copy(rs_value));
std::string rt = GPR(copy(rt_value));
@@ -3089,8 +3089,8 @@ std::string NMD::BLTC(uint64 instruction)
std::string NMD::BLTIC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
+ int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -3113,8 +3113,8 @@ std::string NMD::BLTIC(uint64 instruction)
std::string NMD::BLTIUC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
+ int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -3137,8 +3137,8 @@ std::string NMD::BLTIUC(uint64 instruction)
std::string NMD::BLTUC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
std::string rs = GPR(copy(rs_value));
std::string rt = GPR(copy(rt_value));
@@ -3160,9 +3160,9 @@ std::string NMD::BLTUC(uint64 instruction)
*/
std::string NMD::BNEC_16_(uint64 instruction)
{
- uint64 u_value = extract_u_3_2_1_0__s1(instruction);
uint64 rt3_value = extract_rt3_9_8_7(instruction);
uint64 rs3_value = extract_rs3_6_5_4(instruction);
+ uint64 u_value = extract_u_3_2_1_0__s1(instruction);
std::string rs3 = GPR(encode_rs3_and_check_rs3_ge_rt3(rs3_value));
std::string rt3 = GPR(encode_gpr3(rt3_value));
@@ -3185,8 +3185,8 @@ std::string NMD::BNEC_16_(uint64 instruction)
std::string NMD::BNEC_32_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
std::string rs = GPR(copy(rs_value));
std::string rt = GPR(copy(rt_value));
@@ -3209,8 +3209,8 @@ std::string NMD::BNEC_32_(uint64 instruction)
std::string NMD::BNEIC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
+ int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
std::string rt = GPR(copy(rt_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -3232,8 +3232,8 @@ std::string NMD::BNEIC(uint64 instruction)
*/
std::string NMD::BNEZC_16_(uint64 instruction)
{
- int64 s_value = extract_s__se7_0_6_5_4_3_2_1_s1(instruction);
uint64 rt3_value = extract_rt3_9_8_7(instruction);
+ int64 s_value = extract_s__se7_0_6_5_4_3_2_1_s1(instruction);
std::string rt3 = GPR(encode_gpr3(rt3_value));
std::string s = ADDRESS(encode_s_from_address(s_value), 2);
@@ -3334,9 +3334,9 @@ std::string NMD::BRSC(uint64 instruction)
*/
std::string NMD::CACHE(uint64 instruction)
{
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 op_value = extract_op_25_24_23_22_21(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string op = IMMEDIATE(copy(op_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -3358,9 +3358,9 @@ std::string NMD::CACHE(uint64 instruction)
*/
std::string NMD::CACHEE(uint64 instruction)
{
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 op_value = extract_op_25_24_23_22_21(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string op = IMMEDIATE(copy(op_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -7085,9 +7085,9 @@ std::string NMD::EVPE(uint64 instruction)
std::string NMD::EXT(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
+ uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
- uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -7111,9 +7111,9 @@ std::string NMD::EXT(uint64 instruction)
std::string NMD::EXTD(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 shift_value = extract_shift_10_9_8_7_6(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
+ uint64 shift_value = extract_shift_10_9_8_7_6(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -7137,9 +7137,9 @@ std::string NMD::EXTD(uint64 instruction)
std::string NMD::EXTD32(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 shift_value = extract_shift_10_9_8_7_6(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
+ uint64 shift_value = extract_shift_10_9_8_7_6(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -7163,8 +7163,8 @@ std::string NMD::EXTD32(uint64 instruction)
std::string NMD::EXTPDP(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 size_value = extract_size_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string rt = GPR(copy(rt_value));
std::string ac = AC(copy(ac_value));
@@ -7211,8 +7211,8 @@ std::string NMD::EXTPDPV(uint64 instruction)
std::string NMD::EXTP(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ac_value = extract_ac_13_12(instruction);
uint64 size_value = extract_size_20_19_18_17_16(instruction);
+ uint64 ac_value = extract_ac_13_12(instruction);
std::string rt = GPR(copy(rt_value));
std::string ac = AC(copy(ac_value));
@@ -7452,9 +7452,9 @@ std::string NMD::EXTRV_W(uint64 instruction)
std::string NMD::EXTW(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 shift_value = extract_shift_10_9_8_7_6(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
+ uint64 shift_value = extract_shift_10_9_8_7_6(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -7630,9 +7630,9 @@ std::string NMD::HYPCALL_16_(uint64 instruction)
std::string NMD::INS(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
+ uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
- uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -7781,9 +7781,9 @@ std::string NMD::JRC(uint64 instruction)
*/
std::string NMD::LB_16_(uint64 instruction)
{
- uint64 u_value = extract_u_1_0(instruction);
uint64 rt3_value = extract_rt3_9_8_7(instruction);
uint64 rs3_value = extract_rs3_6_5_4(instruction);
+ uint64 u_value = extract_u_1_0(instruction);
std::string rt3 = GPR(encode_gpr3(rt3_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -7828,8 +7828,8 @@ std::string NMD::LB_GP_(uint64 instruction)
std::string NMD::LB_S9_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -7876,8 +7876,8 @@ std::string NMD::LB_U12_(uint64 instruction)
std::string NMD::LBE(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -7899,9 +7899,9 @@ std::string NMD::LBE(uint64 instruction)
*/
std::string NMD::LBU_16_(uint64 instruction)
{
- uint64 u_value = extract_u_1_0(instruction);
uint64 rt3_value = extract_rt3_9_8_7(instruction);
uint64 rs3_value = extract_rs3_6_5_4(instruction);
+ uint64 u_value = extract_u_1_0(instruction);
std::string rt3 = GPR(encode_gpr3(rt3_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -7946,8 +7946,8 @@ std::string NMD::LBU_GP_(uint64 instruction)
std::string NMD::LBU_S9_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -7994,8 +7994,8 @@ std::string NMD::LBU_U12_(uint64 instruction)
std::string NMD::LBUE(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -8088,8 +8088,8 @@ std::string NMD::LD_GP_(uint64 instruction)
std::string NMD::LD_S9_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -8157,9 +8157,9 @@ std::string NMD::LDC1_GP_(uint64 instruction)
*/
std::string NMD::LDC1_S9_(uint64 instruction)
{
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string ft = FPR(copy(ft_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -8182,8 +8182,8 @@ std::string NMD::LDC1_S9_(uint64 instruction)
std::string NMD::LDC1_U12_(uint64 instruction)
{
uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
- uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
std::string ft = FPR(copy(ft_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -8206,8 +8206,8 @@ std::string NMD::LDC1_U12_(uint64 instruction)
std::string NMD::LDC1XS(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string rs = GPR(copy(rs_value));
@@ -8230,8 +8230,8 @@ std::string NMD::LDC1XS(uint64 instruction)
std::string NMD::LDC1X(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string rs = GPR(copy(rs_value));
@@ -8253,9 +8253,9 @@ std::string NMD::LDC1X(uint64 instruction)
*/
std::string NMD::LDC2(uint64 instruction)
{
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 ct_value = extract_ct_25_24_23_22_21(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string ct = CPR(copy(ct_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -8278,9 +8278,9 @@ std::string NMD::LDC2(uint64 instruction)
std::string NMD::LDM(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 count3_value = extract_count3_14_13_12(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
+ uint64 count3_value = extract_count3_14_13_12(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -8373,9 +8373,9 @@ std::string NMD::LDXS(uint64 instruction)
*/
std::string NMD::LH_16_(uint64 instruction)
{
- uint64 u_value = extract_u_2_1__s1(instruction);
uint64 rt3_value = extract_rt3_9_8_7(instruction);
uint64 rs3_value = extract_rs3_6_5_4(instruction);
+ uint64 u_value = extract_u_2_1__s1(instruction);
std::string rt3 = GPR(encode_gpr3(rt3_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -8420,8 +8420,8 @@ std::string NMD::LH_GP_(uint64 instruction)
std::string NMD::LH_S9_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -8468,8 +8468,8 @@ std::string NMD::LH_U12_(uint64 instruction)
std::string NMD::LHE(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -8491,9 +8491,9 @@ std::string NMD::LHE(uint64 instruction)
*/
std::string NMD::LHU_16_(uint64 instruction)
{
- uint64 u_value = extract_u_2_1__s1(instruction);
uint64 rt3_value = extract_rt3_9_8_7(instruction);
uint64 rs3_value = extract_rs3_6_5_4(instruction);
+ uint64 u_value = extract_u_2_1__s1(instruction);
std::string rt3 = GPR(encode_gpr3(rt3_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -8538,8 +8538,8 @@ std::string NMD::LHU_GP_(uint64 instruction)
std::string NMD::LHU_S9_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -8586,8 +8586,8 @@ std::string NMD::LHU_U12_(uint64 instruction)
std::string NMD::LHUE(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -8705,8 +8705,8 @@ std::string NMD::LHX(uint64 instruction)
*/
std::string NMD::LI_16_(uint64 instruction)
{
- uint64 eu_value = extract_eu_6_5_4_3_2_1_0(instruction);
uint64 rt3_value = extract_rt3_9_8_7(instruction);
+ uint64 eu_value = extract_eu_6_5_4_3_2_1_0(instruction);
std::string rt3 = GPR(encode_gpr3(rt3_value));
std::string eu = IMMEDIATE(encode_eu_from_s_li16(eu_value));
@@ -8750,8 +8750,8 @@ std::string NMD::LI_48_(uint64 instruction)
std::string NMD::LL(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -8774,8 +8774,8 @@ std::string NMD::LL(uint64 instruction)
std::string NMD::LLD(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_s3(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_s3(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -8822,8 +8822,8 @@ std::string NMD::LLDP(uint64 instruction)
std::string NMD::LLE(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -8894,9 +8894,9 @@ std::string NMD::LLWPE(uint64 instruction)
std::string NMD::LSA(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
+ uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
uint64 u2_value = extract_u2_10_9(instruction);
- uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
std::string rd = GPR(copy(rd_value));
std::string rs = GPR(copy(rs_value));
@@ -8941,9 +8941,9 @@ std::string NMD::LUI(uint64 instruction)
*/
std::string NMD::LW_16_(uint64 instruction)
{
- uint64 u_value = extract_u_3_2_1_0__s2(instruction);
uint64 rt3_value = extract_rt3_9_8_7(instruction);
uint64 rs3_value = extract_rs3_6_5_4(instruction);
+ uint64 u_value = extract_u_3_2_1_0__s2(instruction);
std::string rt3 = GPR(encode_gpr3(rt3_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -8965,8 +8965,8 @@ std::string NMD::LW_16_(uint64 instruction)
*/
std::string NMD::LW_4X4_(uint64 instruction)
{
- uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
uint64 rt4_value = extract_rt4_9_7_6_5(instruction);
+ uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
uint64 u_value = extract_u_3_8__s2(instruction);
std::string rt4 = GPR(encode_gpr4(rt4_value));
@@ -9011,8 +9011,8 @@ std::string NMD::LW_GP_(uint64 instruction)
*/
std::string NMD::LW_GP16_(uint64 instruction)
{
- uint64 u_value = extract_u_6_5_4_3_2_1_0__s2(instruction);
uint64 rt3_value = extract_rt3_9_8_7(instruction);
+ uint64 u_value = extract_u_6_5_4_3_2_1_0__s2(instruction);
std::string rt3 = GPR(encode_gpr3(rt3_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -9034,8 +9034,8 @@ std::string NMD::LW_GP16_(uint64 instruction)
std::string NMD::LW_S9_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -9125,9 +9125,9 @@ std::string NMD::LWC1_GP_(uint64 instruction)
*/
std::string NMD::LWC1_S9_(uint64 instruction)
{
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string ft = FPR(copy(ft_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -9150,8 +9150,8 @@ std::string NMD::LWC1_S9_(uint64 instruction)
std::string NMD::LWC1_U12_(uint64 instruction)
{
uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
- uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
std::string ft = FPR(copy(ft_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -9174,8 +9174,8 @@ std::string NMD::LWC1_U12_(uint64 instruction)
std::string NMD::LWC1X(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string rs = GPR(copy(rs_value));
@@ -9198,8 +9198,8 @@ std::string NMD::LWC1X(uint64 instruction)
std::string NMD::LWC1XS(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string rs = GPR(copy(rs_value));
@@ -9221,9 +9221,9 @@ std::string NMD::LWC1XS(uint64 instruction)
*/
std::string NMD::LWC2(uint64 instruction)
{
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 ct_value = extract_ct_25_24_23_22_21(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string ct = CPR(copy(ct_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -9246,8 +9246,8 @@ std::string NMD::LWC2(uint64 instruction)
std::string NMD::LWE(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -9270,9 +9270,9 @@ std::string NMD::LWE(uint64 instruction)
std::string NMD::LWM(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 count3_value = extract_count3_14_13_12(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
+ uint64 count3_value = extract_count3_14_13_12(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -9340,8 +9340,8 @@ std::string NMD::LWU_GP_(uint64 instruction)
std::string NMD::LWU_S9_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -10311,9 +10311,9 @@ std::string NMD::MOVE_BALC(uint64 instruction)
*/
std::string NMD::MOVEP(uint64 instruction)
{
- uint64 rsz4_value = extract_rsz4_4_2_1_0(instruction);
uint64 rtz4_value = extract_rtz4_9_7_6_5(instruction);
uint64 rd2_value = extract_rd2_3_8(instruction);
+ uint64 rsz4_value = extract_rsz4_4_2_1_0(instruction);
std::string rd2 = GPR(encode_rd2_reg1(rd2_value));
std::string re2 = GPR(encode_rd2_reg2(rd2_value));
@@ -10338,9 +10338,9 @@ std::string NMD::MOVEP(uint64 instruction)
*/
std::string NMD::MOVEP_REV_(uint64 instruction)
{
- uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
uint64 rt4_value = extract_rt4_9_7_6_5(instruction);
uint64 rd2_value = extract_rd2_3_8(instruction);
+ uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
std::string rs4 = GPR(encode_gpr4(rs4_value));
std::string rt4 = GPR(encode_gpr4(rt4_value));
@@ -10905,8 +10905,8 @@ std::string NMD::MUL_32_(uint64 instruction)
*/
std::string NMD::MUL_4X4_(uint64 instruction)
{
- uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
uint64 rt4_value = extract_rt4_9_7_6_5(instruction);
+ uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
std::string rs4 = GPR(encode_gpr4(rs4_value));
std::string rt4 = GPR(encode_gpr4(rt4_value));
@@ -11866,8 +11866,8 @@ std::string NMD::PRECR_QB_PH(uint64 instruction)
std::string NMD::PRECR_SRA_PH_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -11890,8 +11890,8 @@ std::string NMD::PRECR_SRA_PH_W(uint64 instruction)
std::string NMD::PRECR_SRA_R_PH_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -12057,9 +12057,9 @@ std::string NMD::PREF_U12_(uint64 instruction)
*/
std::string NMD::PREFE(uint64 instruction)
{
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 hint_value = extract_hint_25_24_23_22_21(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string hint = IMMEDIATE(copy(hint_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -12082,8 +12082,8 @@ std::string NMD::PREFE(uint64 instruction)
std::string NMD::PREPEND(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -12327,8 +12327,8 @@ std::string NMD::REPLV_QB(uint64 instruction)
*/
std::string NMD::RESTORE_32_(uint64 instruction)
{
- uint64 count_value = extract_count_19_18_17_16(instruction);
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
+ uint64 count_value = extract_count_19_18_17_16(instruction);
uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction);
uint64 gp_value = extract_gp_2(instruction);
@@ -12350,9 +12350,9 @@ std::string NMD::RESTORE_32_(uint64 instruction)
*/
std::string NMD::RESTORE_JRC_16_(uint64 instruction)
{
- uint64 count_value = extract_count_3_2_1_0(instruction);
uint64 rt1_value = extract_rtl_11(instruction);
uint64 u_value = extract_u_7_6_5_4__s4(instruction);
+ uint64 count_value = extract_count_3_2_1_0(instruction);
std::string u = IMMEDIATE(copy(u_value));
return img::format("RESTORE.JRC %s%s", u,
@@ -12670,9 +12670,9 @@ std::string NMD::RSQRT_S(uint64 instruction)
*/
std::string NMD::SAVE_16_(uint64 instruction)
{
- uint64 count_value = extract_count_3_2_1_0(instruction);
uint64 rt1_value = extract_rtl_11(instruction);
uint64 u_value = extract_u_7_6_5_4__s4(instruction);
+ uint64 count_value = extract_count_3_2_1_0(instruction);
std::string u = IMMEDIATE(copy(u_value));
return img::format("SAVE %s%s", u,
@@ -12738,8 +12738,8 @@ std::string NMD::SAVEF(uint64 instruction)
std::string NMD::SB_16_(uint64 instruction)
{
uint64 rtz3_value = extract_rtz3_9_8_7(instruction);
- uint64 u_value = extract_u_1_0(instruction);
uint64 rs3_value = extract_rs3_6_5_4(instruction);
+ uint64 u_value = extract_u_1_0(instruction);
std::string rtz3 = GPR(encode_gpr3_store(rtz3_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -12784,8 +12784,8 @@ std::string NMD::SB_GP_(uint64 instruction)
std::string NMD::SB_S9_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -12832,8 +12832,8 @@ std::string NMD::SB_U12_(uint64 instruction)
std::string NMD::SBE(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -12880,8 +12880,8 @@ std::string NMD::SBX(uint64 instruction)
std::string NMD::SC(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -12904,8 +12904,8 @@ std::string NMD::SC(uint64 instruction)
std::string NMD::SCD(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_s3(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_s3(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -12952,8 +12952,8 @@ std::string NMD::SCDP(uint64 instruction)
std::string NMD::SCE(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -13046,8 +13046,8 @@ std::string NMD::SD_GP_(uint64 instruction)
std::string NMD::SD_S9_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -13155,9 +13155,9 @@ std::string NMD::SDC1_GP_(uint64 instruction)
*/
std::string NMD::SDC1_S9_(uint64 instruction)
{
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string ft = FPR(copy(ft_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -13180,8 +13180,8 @@ std::string NMD::SDC1_S9_(uint64 instruction)
std::string NMD::SDC1_U12_(uint64 instruction)
{
uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
- uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
std::string ft = FPR(copy(ft_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -13204,8 +13204,8 @@ std::string NMD::SDC1_U12_(uint64 instruction)
std::string NMD::SDC1X(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string rs = GPR(copy(rs_value));
@@ -13228,8 +13228,8 @@ std::string NMD::SDC1X(uint64 instruction)
std::string NMD::SDC1XS(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string rs = GPR(copy(rs_value));
@@ -13252,8 +13252,8 @@ std::string NMD::SDC1XS(uint64 instruction)
std::string NMD::SDC2(uint64 instruction)
{
uint64 cs_value = extract_cs_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string cs = CPR(copy(cs_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -13276,9 +13276,9 @@ std::string NMD::SDC2(uint64 instruction)
std::string NMD::SDM(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 count3_value = extract_count3_14_13_12(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
+ uint64 count3_value = extract_count3_14_13_12(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -13584,8 +13584,8 @@ std::string NMD::SEQI(uint64 instruction)
std::string NMD::SH_16_(uint64 instruction)
{
uint64 rtz3_value = extract_rtz3_9_8_7(instruction);
- uint64 u_value = extract_u_2_1__s1(instruction);
uint64 rs3_value = extract_rs3_6_5_4(instruction);
+ uint64 u_value = extract_u_2_1__s1(instruction);
std::string rtz3 = GPR(encode_gpr3_store(rtz3_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -13630,8 +13630,8 @@ std::string NMD::SH_GP_(uint64 instruction)
std::string NMD::SH_S9_(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -13678,8 +13678,8 @@ std::string NMD::SH_U12_(uint64 instruction)
std::string NMD::SHE(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -13818,8 +13818,8 @@ std::string NMD::SHLL_S_PH(uint64 instruction)
std::string NMD::SHLL_S_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -13938,8 +13938,8 @@ std::string NMD::SHLLV_S_W(uint64 instruction)
std::string NMD::SHRA_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 sa_value = extract_sa_15_14_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 sa_value = extract_sa_15_14_13_12(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -13962,8 +13962,8 @@ std::string NMD::SHRA_PH(uint64 instruction)
std::string NMD::SHRA_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 sa_value = extract_sa_15_14_13(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 sa_value = extract_sa_15_14_13(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -13986,8 +13986,8 @@ std::string NMD::SHRA_QB(uint64 instruction)
std::string NMD::SHRA_R_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 sa_value = extract_sa_15_14_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 sa_value = extract_sa_15_14_13_12(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -14010,8 +14010,8 @@ std::string NMD::SHRA_R_PH(uint64 instruction)
std::string NMD::SHRA_R_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 sa_value = extract_sa_15_14_13(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 sa_value = extract_sa_15_14_13(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -14034,8 +14034,8 @@ std::string NMD::SHRA_R_QB(uint64 instruction)
std::string NMD::SHRA_R_W(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -14178,8 +14178,8 @@ std::string NMD::SHRAV_R_W(uint64 instruction)
std::string NMD::SHRL_PH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 sa_value = extract_sa_15_14_13_12(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 sa_value = extract_sa_15_14_13_12(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -14202,8 +14202,8 @@ std::string NMD::SHRL_PH(uint64 instruction)
std::string NMD::SHRL_QB(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 sa_value = extract_sa_15_14_13(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 sa_value = extract_sa_15_14_13(instruction);
std::string rt = GPR(copy(rt_value));
std::string rs = GPR(copy(rs_value));
@@ -14341,9 +14341,9 @@ std::string NMD::SIGRIE(uint64 instruction)
*/
std::string NMD::SLL_16_(uint64 instruction)
{
- uint64 shift3_value = extract_shift3_2_1_0(instruction);
uint64 rt3_value = extract_rt3_9_8_7(instruction);
uint64 rs3_value = extract_rs3_6_5_4(instruction);
+ uint64 shift3_value = extract_shift3_2_1_0(instruction);
std::string rt3 = GPR(encode_gpr3(rt3_value));
std::string rs3 = GPR(encode_gpr3(rs3_value));
@@ -14645,9 +14645,9 @@ std::string NMD::SRAV(uint64 instruction)
*/
std::string NMD::SRL_16_(uint64 instruction)
{
- uint64 shift3_value = extract_shift3_2_1_0(instruction);
uint64 rt3_value = extract_rt3_9_8_7(instruction);
uint64 rs3_value = extract_rs3_6_5_4(instruction);
+ uint64 shift3_value = extract_shift3_2_1_0(instruction);
std::string rt3 = GPR(encode_gpr3(rt3_value));
std::string rs3 = GPR(encode_gpr3(rs3_value));
@@ -15158,8 +15158,8 @@ std::string NMD::SUBUH_R_QB(uint64 instruction)
std::string NMD::SW_16_(uint64 instruction)
{
uint64 rtz3_value = extract_rtz3_9_8_7(instruction);
- uint64 u_value = extract_u_3_2_1_0__s2(instruction);
uint64 rs3_value = extract_rs3_6_5_4(instruction);
+ uint64 u_value = extract_u_3_2_1_0__s2(instruction);
std::string rtz3 = GPR(encode_gpr3_store(rtz3_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -15181,8 +15181,8 @@ std::string NMD::SW_16_(uint64 instruction)
*/
std::string NMD::SW_4X4_(uint64 instruction)
{
- uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
uint64 rtz4_value = extract_rtz4_9_7_6_5(instruction);
+ uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
uint64 u_value = extract_u_3_8__s2(instruction);
std::string rtz4 = GPR(encode_gpr4_zero(rtz4_value));
@@ -15205,8 +15205,8 @@ std::string NMD::SW_4X4_(uint64 instruction)
*/
std::string NMD::SW_GP16_(uint64 instruction)
{
- uint64 rtz3_value = extract_rtz3_9_8_7(instruction);
uint64 u_value = extract_u_6_5_4_3_2_1_0__s2(instruction);
+ uint64 rtz3_value = extract_rtz3_9_8_7(instruction);
std::string rtz3 = GPR(encode_gpr3_store(rtz3_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -15341,9 +15341,9 @@ std::string NMD::SWC1_GP_(uint64 instruction)
*/
std::string NMD::SWC1_S9_(uint64 instruction)
{
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string ft = FPR(copy(ft_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -15366,8 +15366,8 @@ std::string NMD::SWC1_S9_(uint64 instruction)
std::string NMD::SWC1_U12_(uint64 instruction)
{
uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
- uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
std::string ft = FPR(copy(ft_value));
std::string u = IMMEDIATE(copy(u_value));
@@ -15390,8 +15390,8 @@ std::string NMD::SWC1_U12_(uint64 instruction)
std::string NMD::SWC1X(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string rs = GPR(copy(rs_value));
@@ -15414,8 +15414,8 @@ std::string NMD::SWC1X(uint64 instruction)
std::string NMD::SWC1XS(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
std::string ft = FPR(copy(ft_value));
std::string rs = GPR(copy(rs_value));
@@ -15438,8 +15438,8 @@ std::string NMD::SWC1XS(uint64 instruction)
std::string NMD::SWC2(uint64 instruction)
{
uint64 cs_value = extract_cs_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string cs = CPR(copy(cs_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -15462,8 +15462,8 @@ std::string NMD::SWC2(uint64 instruction)
std::string NMD::SWE(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -15486,9 +15486,9 @@ std::string NMD::SWE(uint64 instruction)
std::string NMD::SWM(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 count3_value = extract_count3_14_13_12(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
+ uint64 count3_value = extract_count3_14_13_12(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -15601,8 +15601,8 @@ std::string NMD::SYNC(uint64 instruction)
*/
std::string NMD::SYNCI(uint64 instruction)
{
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string s = IMMEDIATE(copy(s_value));
std::string rs = GPR(copy(rs_value));
@@ -15623,8 +15623,8 @@ std::string NMD::SYNCI(uint64 instruction)
*/
std::string NMD::SYNCIE(uint64 instruction)
{
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string s = IMMEDIATE(copy(s_value));
std::string rs = GPR(copy(rs_value));
@@ -16032,9 +16032,9 @@ std::string NMD::TRUNC_W_S(uint64 instruction)
std::string NMD::UALDM(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 count3_value = extract_count3_14_13_12(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
+ uint64 count3_value = extract_count3_14_13_12(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -16058,8 +16058,8 @@ std::string NMD::UALDM(uint64 instruction)
std::string NMD::UALH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -16082,9 +16082,9 @@ std::string NMD::UALH(uint64 instruction)
std::string NMD::UALWM(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 count3_value = extract_count3_14_13_12(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
+ uint64 count3_value = extract_count3_14_13_12(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -16108,9 +16108,9 @@ std::string NMD::UALWM(uint64 instruction)
std::string NMD::UASDM(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 count3_value = extract_count3_14_13_12(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
+ uint64 count3_value = extract_count3_14_13_12(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -16134,8 +16134,8 @@ std::string NMD::UASDM(uint64 instruction)
std::string NMD::UASH(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
@@ -16158,9 +16158,9 @@ std::string NMD::UASH(uint64 instruction)
std::string NMD::UASWM(uint64 instruction)
{
uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
- uint64 count3_value = extract_count3_14_13_12(instruction);
- int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
+ int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
+ uint64 count3_value = extract_count3_14_13_12(instruction);
std::string rt = GPR(copy(rt_value));
std::string s = IMMEDIATE(copy(s_value));
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 25/44] disas: nanoMIPS: Rename the decoder of 'gpr3' gpr encoding type
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (23 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 24/44] disas: nanoMIPS: Fix order of more invocations Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 26/44] disas: nanoMIPS: Comment " Aleksandar Markovic
` (19 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Rename the decoder of 'gpr3' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
disas/nanomips.cpp | 96 +++++++++++++++++++++++++++---------------------------
disas/nanomips.h | 2 +-
2 files changed, 49 insertions(+), 49 deletions(-)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index e9018ea..2856645 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -296,7 +296,7 @@ uint64 NMD::renumber_registers(uint64 index, uint64 *register_list,
* decode sections so they are based on the encode, the equivalent decode
* functions need writing eventually.
*/
-uint64 NMD::encode_gpr3(uint64 d)
+uint64 NMD::decode_gpr_gpr3(uint64 d)
{
static uint64 register_list[] = { 16, 17, 18, 19, 4, 5, 6, 7 };
return renumber_registers(d, register_list,
@@ -381,14 +381,14 @@ int64 NMD::neg_copy(int64 d)
/* strange wrapper around gpr3 */
uint64 NMD::encode_rs3_and_check_rs3_ge_rt3(uint64 d)
{
-return encode_gpr3(d);
+return decode_gpr_gpr3(d);
}
/* strange wrapper around gpr3 */
uint64 NMD::encode_rs3_and_check_rs3_lt_rt3(uint64 d)
{
- return encode_gpr3(d);
+ return decode_gpr_gpr3(d);
}
@@ -1936,7 +1936,7 @@ std::string NMD::ADDIU_R1_SP_(uint64 instruction)
uint64 u_value = extract_u_5_4_3_2_1_0__s2(instruction);
uint64 rt3_value = extract_rt3_9_8_7(instruction);
- std::string rt3 = GPR(encode_gpr3(rt3_value));
+ std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
std::string u = IMMEDIATE(copy(u_value));
return img::format("ADDIU %s, $%d, %s", rt3, 29, u);
@@ -1958,8 +1958,8 @@ std::string NMD::ADDIU_R2_(uint64 instruction)
uint64 rs3_value = extract_rs3_6_5_4(instruction);
uint64 u_value = extract_u_2_1_0__s2(instruction);
- std::string rt3 = GPR(encode_gpr3(rt3_value));
- std::string rs3 = GPR(encode_gpr3(rs3_value));
+ std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
+ std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
std::string u = IMMEDIATE(copy(u_value));
return img::format("ADDIU %s, %s, %s", rt3, rs3, u);
@@ -2239,9 +2239,9 @@ std::string NMD::ADDU_16_(uint64 instruction)
uint64 rs3_value = extract_rs3_6_5_4(instruction);
uint64 rd3_value = extract_rd3_3_2_1(instruction);
- std::string rt3 = GPR(encode_gpr3(rt3_value));
- std::string rs3 = GPR(encode_gpr3(rs3_value));
- std::string rd3 = GPR(encode_gpr3(rd3_value));
+ std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
+ std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
+ std::string rd3 = GPR(decode_gpr_gpr3(rd3_value));
return img::format("ADDU %s, %s, %s", rd3, rs3, rt3);
}
@@ -2498,8 +2498,8 @@ std::string NMD::AND_16_(uint64 instruction)
uint64 rt3_value = extract_rt3_9_8_7(instruction);
uint64 rs3_value = extract_rs3_6_5_4(instruction);
- std::string rt3 = GPR(encode_gpr3(rt3_value));
- std::string rs3 = GPR(encode_gpr3(rs3_value));
+ std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
+ std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
return img::format("AND %s, %s", rs3, rt3);
}
@@ -2544,8 +2544,8 @@ std::string NMD::ANDI_16_(uint64 instruction)
uint64 rs3_value = extract_rs3_6_5_4(instruction);
uint64 eu_value = extract_eu_3_2_1_0(instruction);
- std::string rt3 = GPR(encode_gpr3(rt3_value));
- std::string rs3 = GPR(encode_gpr3(rs3_value));
+ std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
+ std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
std::string eu = IMMEDIATE(encode_eu_from_u_andi16(eu_value));
return img::format("ANDI %s, %s, %s", rt3, rs3, eu);
@@ -2879,7 +2879,7 @@ std::string NMD::BEQC_16_(uint64 instruction)
uint64 u_value = extract_u_3_2_1_0__s1(instruction);
std::string rs3 = GPR(encode_rs3_and_check_rs3_lt_rt3(rs3_value));
- std::string rt3 = GPR(encode_gpr3(rt3_value));
+ std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
std::string u = ADDRESS(encode_u_from_address(u_value), 2);
return img::format("BEQC %s, %s, %s", rs3, rt3, u);
@@ -2949,7 +2949,7 @@ std::string NMD::BEQZC_16_(uint64 instruction)
uint64 rt3_value = extract_rt3_9_8_7(instruction);
int64 s_value = extract_s__se7_0_6_5_4_3_2_1_s1(instruction);
- std::string rt3 = GPR(encode_gpr3(rt3_value));
+ std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
std::string s = ADDRESS(encode_s_from_address(s_value), 2);
return img::format("BEQZC %s, %s", rt3, s);
@@ -3165,7 +3165,7 @@ std::string NMD::BNEC_16_(uint64 instruction)
uint64 u_value = extract_u_3_2_1_0__s1(instruction);
std::string rs3 = GPR(encode_rs3_and_check_rs3_ge_rt3(rs3_value));
- std::string rt3 = GPR(encode_gpr3(rt3_value));
+ std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
std::string u = ADDRESS(encode_u_from_address(u_value), 2);
return img::format("BNEC %s, %s, %s", rs3, rt3, u);
@@ -3235,7 +3235,7 @@ std::string NMD::BNEZC_16_(uint64 instruction)
uint64 rt3_value = extract_rt3_9_8_7(instruction);
int64 s_value = extract_s__se7_0_6_5_4_3_2_1_s1(instruction);
- std::string rt3 = GPR(encode_gpr3(rt3_value));
+ std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
std::string s = ADDRESS(encode_s_from_address(s_value), 2);
return img::format("BNEZC %s, %s", rt3, s);
@@ -7785,9 +7785,9 @@ std::string NMD::LB_16_(uint64 instruction)
uint64 rs3_value = extract_rs3_6_5_4(instruction);
uint64 u_value = extract_u_1_0(instruction);
- std::string rt3 = GPR(encode_gpr3(rt3_value));
+ std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
std::string u = IMMEDIATE(copy(u_value));
- std::string rs3 = GPR(encode_gpr3(rs3_value));
+ std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
return img::format("LB %s, %s(%s)", rt3, u, rs3);
}
@@ -7903,9 +7903,9 @@ std::string NMD::LBU_16_(uint64 instruction)
uint64 rs3_value = extract_rs3_6_5_4(instruction);
uint64 u_value = extract_u_1_0(instruction);
- std::string rt3 = GPR(encode_gpr3(rt3_value));
+ std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
std::string u = IMMEDIATE(copy(u_value));
- std::string rs3 = GPR(encode_gpr3(rs3_value));
+ std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
return img::format("LBU %s, %s(%s)", rt3, u, rs3);
}
@@ -8377,9 +8377,9 @@ std::string NMD::LH_16_(uint64 instruction)
uint64 rs3_value = extract_rs3_6_5_4(instruction);
uint64 u_value = extract_u_2_1__s1(instruction);
- std::string rt3 = GPR(encode_gpr3(rt3_value));
+ std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
std::string u = IMMEDIATE(copy(u_value));
- std::string rs3 = GPR(encode_gpr3(rs3_value));
+ std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
return img::format("LH %s, %s(%s)", rt3, u, rs3);
}
@@ -8495,9 +8495,9 @@ std::string NMD::LHU_16_(uint64 instruction)
uint64 rs3_value = extract_rs3_6_5_4(instruction);
uint64 u_value = extract_u_2_1__s1(instruction);
- std::string rt3 = GPR(encode_gpr3(rt3_value));
+ std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
std::string u = IMMEDIATE(copy(u_value));
- std::string rs3 = GPR(encode_gpr3(rs3_value));
+ std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
return img::format("LHU %s, %s(%s)", rt3, u, rs3);
}
@@ -8708,7 +8708,7 @@ std::string NMD::LI_16_(uint64 instruction)
uint64 rt3_value = extract_rt3_9_8_7(instruction);
uint64 eu_value = extract_eu_6_5_4_3_2_1_0(instruction);
- std::string rt3 = GPR(encode_gpr3(rt3_value));
+ std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
std::string eu = IMMEDIATE(encode_eu_from_s_li16(eu_value));
return img::format("LI %s, %s", rt3, eu);
@@ -8945,9 +8945,9 @@ std::string NMD::LW_16_(uint64 instruction)
uint64 rs3_value = extract_rs3_6_5_4(instruction);
uint64 u_value = extract_u_3_2_1_0__s2(instruction);
- std::string rt3 = GPR(encode_gpr3(rt3_value));
+ std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
std::string u = IMMEDIATE(copy(u_value));
- std::string rs3 = GPR(encode_gpr3(rs3_value));
+ std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
return img::format("LW %s, %s(%s)", rt3, u, rs3);
}
@@ -9014,7 +9014,7 @@ std::string NMD::LW_GP16_(uint64 instruction)
uint64 rt3_value = extract_rt3_9_8_7(instruction);
uint64 u_value = extract_u_6_5_4_3_2_1_0__s2(instruction);
- std::string rt3 = GPR(encode_gpr3(rt3_value));
+ std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
std::string u = IMMEDIATE(copy(u_value));
return img::format("LW %s, %s($%d)", rt3, u, 28);
@@ -9463,9 +9463,9 @@ std::string NMD::LWXS_16_(uint64 instruction)
uint64 rs3_value = extract_rs3_6_5_4(instruction);
uint64 rd3_value = extract_rd3_3_2_1(instruction);
- std::string rd3 = GPR(encode_gpr3(rd3_value));
- std::string rs3 = GPR(encode_gpr3(rs3_value));
- std::string rt3 = IMMEDIATE(encode_gpr3(rt3_value));
+ std::string rd3 = GPR(decode_gpr_gpr3(rd3_value));
+ std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
+ std::string rt3 = IMMEDIATE(decode_gpr_gpr3(rt3_value));
return img::format("LWXS %s, %s(%s)", rd3, rs3, rt3);
}
@@ -11442,8 +11442,8 @@ std::string NMD::NOT_16_(uint64 instruction)
uint64 rt3_value = extract_rt3_9_8_7(instruction);
uint64 rs3_value = extract_rs3_6_5_4(instruction);
- std::string rt3 = GPR(encode_gpr3(rt3_value));
- std::string rs3 = GPR(encode_gpr3(rs3_value));
+ std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
+ std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
return img::format("NOT %s, %s", rt3, rs3);
}
@@ -11464,8 +11464,8 @@ std::string NMD::OR_16_(uint64 instruction)
uint64 rt3_value = extract_rt3_9_8_7(instruction);
uint64 rs3_value = extract_rs3_6_5_4(instruction);
- std::string rs3 = GPR(encode_gpr3(rs3_value));
- std::string rt3 = GPR(encode_gpr3(rt3_value));
+ std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
+ std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
return img::format("OR %s, %s", rs3, rt3);
}
@@ -12743,7 +12743,7 @@ std::string NMD::SB_16_(uint64 instruction)
std::string rtz3 = GPR(encode_gpr3_store(rtz3_value));
std::string u = IMMEDIATE(copy(u_value));
- std::string rs3 = GPR(encode_gpr3(rs3_value));
+ std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
return img::format("SB %s, %s(%s)", rtz3, u, rs3);
}
@@ -13589,7 +13589,7 @@ std::string NMD::SH_16_(uint64 instruction)
std::string rtz3 = GPR(encode_gpr3_store(rtz3_value));
std::string u = IMMEDIATE(copy(u_value));
- std::string rs3 = GPR(encode_gpr3(rs3_value));
+ std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
return img::format("SH %s, %s(%s)", rtz3, u, rs3);
}
@@ -14345,8 +14345,8 @@ std::string NMD::SLL_16_(uint64 instruction)
uint64 rs3_value = extract_rs3_6_5_4(instruction);
uint64 shift3_value = extract_shift3_2_1_0(instruction);
- std::string rt3 = GPR(encode_gpr3(rt3_value));
- std::string rs3 = GPR(encode_gpr3(rs3_value));
+ std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
+ std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
std::string shift3 = IMMEDIATE(encode_shift3_from_shift(shift3_value));
return img::format("SLL %s, %s, %s", rt3, rs3, shift3);
@@ -14649,8 +14649,8 @@ std::string NMD::SRL_16_(uint64 instruction)
uint64 rs3_value = extract_rs3_6_5_4(instruction);
uint64 shift3_value = extract_shift3_2_1_0(instruction);
- std::string rt3 = GPR(encode_gpr3(rt3_value));
- std::string rs3 = GPR(encode_gpr3(rs3_value));
+ std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
+ std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
std::string shift3 = IMMEDIATE(encode_shift3_from_shift(shift3_value));
return img::format("SRL %s, %s, %s", rt3, rs3, shift3);
@@ -14967,9 +14967,9 @@ std::string NMD::SUBU_16_(uint64 instruction)
uint64 rs3_value = extract_rs3_6_5_4(instruction);
uint64 rd3_value = extract_rd3_3_2_1(instruction);
- std::string rd3 = GPR(encode_gpr3(rd3_value));
- std::string rs3 = GPR(encode_gpr3(rs3_value));
- std::string rt3 = GPR(encode_gpr3(rt3_value));
+ std::string rd3 = GPR(decode_gpr_gpr3(rd3_value));
+ std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
+ std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
return img::format("SUBU %s, %s, %s", rd3, rs3, rt3);
}
@@ -15163,7 +15163,7 @@ std::string NMD::SW_16_(uint64 instruction)
std::string rtz3 = GPR(encode_gpr3_store(rtz3_value));
std::string u = IMMEDIATE(copy(u_value));
- std::string rs3 = GPR(encode_gpr3(rs3_value));
+ std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
return img::format("SW %s, %s(%s)", rtz3, u, rs3);
}
@@ -16267,8 +16267,8 @@ std::string NMD::XOR_16_(uint64 instruction)
uint64 rt3_value = extract_rt3_9_8_7(instruction);
uint64 rs3_value = extract_rs3_6_5_4(instruction);
- std::string rs3 = GPR(encode_gpr3(rs3_value));
- std::string rt3 = GPR(encode_gpr3(rt3_value));
+ std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
+ std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
return img::format("XOR %s, %s", rs3, rt3);
}
diff --git a/disas/nanomips.h b/disas/nanomips.h
index 86f673c..78f8f9b 100644
--- a/disas/nanomips.h
+++ b/disas/nanomips.h
@@ -105,7 +105,7 @@ private:
uint64 renumber_registers(uint64 index, uint64 *register_list,
size_t register_list_size);
- uint64 encode_gpr3(uint64 d);
+ uint64 decode_gpr_gpr3(uint64 d);
uint64 encode_gpr3_store(uint64 d);
uint64 encode_rd1_from_rd(uint64 d);
uint64 encode_gpr4_zero(uint64 d);
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 26/44] disas: nanoMIPS: Comment the decoder of 'gpr3' gpr encoding type
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (24 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 25/44] disas: nanoMIPS: Rename the decoder of 'gpr3' gpr encoding type Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 27/44] disas: nanoMIPS: Rename the decoder of 'gpr3.src.store' " Aleksandar Markovic
` (18 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Comment the decoder of 'gpr3' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
disas/nanomips.cpp | 51 ++++++++++++++++++++++++++++++++++++++++++++++++---
1 file changed, 48 insertions(+), 3 deletions(-)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index 2856645..30988f8 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -292,9 +292,54 @@ uint64 NMD::renumber_registers(uint64 index, uint64 *register_list,
/*
- * these functions should be decode functions but the json does not have
- * decode sections so they are based on the encode, the equivalent decode
- * functions need writing eventually.
+ * NMD::decode_gpr_gpr3() - decoder for 'gpr3' gpr encoding type
+ *
+ * Map a 3-bit code to the 5-bit register space according to this pattern:
+ *
+ * 7 6 5 4 3 2 1 0
+ * | | | | | | | |
+ * | | | | | | | |
+ * | | | └-----------------------┐
+ * | | └-----------------------┐ |
+ * | └-----------------------┐ | |
+ * └-----------------------┐ | | |
+ * | | | | | | | |
+ * ┌-------┘ | | | | | | |
+ * | ┌-------┘ | | | | | |
+ * | | ┌-------┘ | | | | |
+ * | | | ┌-------┘ | | | |
+ * | | | | | | | |
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * 3 2 1 0
+ *
+ * Used in handling following instructions:
+ *
+ * - ADDIU[R1.SP]
+ * - ADDIU[R2]
+ * - ADDU[16]
+ * - AND[16]
+ * - ANDI[16]
+ * - BEQC[16]
+ * - BEQZC[16]
+ * - BNEC[16]
+ * - BNEZC[16]
+ * - LB[16]
+ * - LBU[16]
+ * - LH[16]
+ * - LHU[16]
+ * - LI[16]
+ * - LW[16]
+ * - LW[GP16]
+ * - LWXS[16]
+ * - NOT[16]
+ * - OR[16]
+ * - SB[16]
+ * - SH[16]
+ * - SLL[16]
+ * - SRL[16]
+ * - SUBU[16]
+ * - SW[16]
+ * - XOR[16]
*/
uint64 NMD::decode_gpr_gpr3(uint64 d)
{
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 27/44] disas: nanoMIPS: Rename the decoder of 'gpr3.src.store' gpr encoding type
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (25 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 26/44] disas: nanoMIPS: Comment " Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 28/44] disas: nanoMIPS: Comment " Aleksandar Markovic
` (17 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Rename the decoder of 'gpr3.src.store' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
disas/nanomips.cpp | 10 +++++-----
disas/nanomips.h | 2 +-
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index 30988f8..7c56162 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -349,7 +349,7 @@ uint64 NMD::decode_gpr_gpr3(uint64 d)
}
-uint64 NMD::encode_gpr3_store(uint64 d)
+uint64 NMD::decode_gpr_gpr3_src_store(uint64 d)
{
static uint64 register_list[] = { 0, 17, 18, 19, 4, 5, 6, 7 };
return renumber_registers(d, register_list,
@@ -12786,7 +12786,7 @@ std::string NMD::SB_16_(uint64 instruction)
uint64 rs3_value = extract_rs3_6_5_4(instruction);
uint64 u_value = extract_u_1_0(instruction);
- std::string rtz3 = GPR(encode_gpr3_store(rtz3_value));
+ std::string rtz3 = GPR(decode_gpr_gpr3_src_store(rtz3_value));
std::string u = IMMEDIATE(copy(u_value));
std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
@@ -13632,7 +13632,7 @@ std::string NMD::SH_16_(uint64 instruction)
uint64 rs3_value = extract_rs3_6_5_4(instruction);
uint64 u_value = extract_u_2_1__s1(instruction);
- std::string rtz3 = GPR(encode_gpr3_store(rtz3_value));
+ std::string rtz3 = GPR(decode_gpr_gpr3_src_store(rtz3_value));
std::string u = IMMEDIATE(copy(u_value));
std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
@@ -15206,7 +15206,7 @@ std::string NMD::SW_16_(uint64 instruction)
uint64 rs3_value = extract_rs3_6_5_4(instruction);
uint64 u_value = extract_u_3_2_1_0__s2(instruction);
- std::string rtz3 = GPR(encode_gpr3_store(rtz3_value));
+ std::string rtz3 = GPR(decode_gpr_gpr3_src_store(rtz3_value));
std::string u = IMMEDIATE(copy(u_value));
std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
@@ -15253,7 +15253,7 @@ std::string NMD::SW_GP16_(uint64 instruction)
uint64 u_value = extract_u_6_5_4_3_2_1_0__s2(instruction);
uint64 rtz3_value = extract_rtz3_9_8_7(instruction);
- std::string rtz3 = GPR(encode_gpr3_store(rtz3_value));
+ std::string rtz3 = GPR(decode_gpr_gpr3_src_store(rtz3_value));
std::string u = IMMEDIATE(copy(u_value));
return img::format("SW %s, %s($%d)", rtz3, u, 28);
diff --git a/disas/nanomips.h b/disas/nanomips.h
index 78f8f9b..757915c 100644
--- a/disas/nanomips.h
+++ b/disas/nanomips.h
@@ -106,7 +106,7 @@ private:
uint64 renumber_registers(uint64 index, uint64 *register_list,
size_t register_list_size);
uint64 decode_gpr_gpr3(uint64 d);
- uint64 encode_gpr3_store(uint64 d);
+ uint64 decode_gpr_gpr3_src_store(uint64 d);
uint64 encode_rd1_from_rd(uint64 d);
uint64 encode_gpr4_zero(uint64 d);
uint64 encode_gpr4(uint64 d);
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 28/44] disas: nanoMIPS: Comment the decoder of 'gpr3.src.store' gpr encoding type
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (26 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 27/44] disas: nanoMIPS: Rename the decoder of 'gpr3.src.store' " Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 29/44] disas: nanoMIPS: Rename the decoder of 'gpr4' " Aleksandar Markovic
` (16 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Comment the decoder of 'gpr3.src.store' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
disas/nanomips.cpp | 32 ++++++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index 7c56162..1c313f3 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -349,6 +349,38 @@ uint64 NMD::decode_gpr_gpr3(uint64 d)
}
+/*
+ * NMD::decode_gpr_gpr3_src_store() - decoder for 'gpr3.src.store' gpr encoding
+ * type
+ *
+ * Map a 3-bit code to the 5-bit register space according to this pattern:
+ *
+ * 7 6 5 4 3 2 1 0
+ * | | | | | | | |
+ * | | | | | | | └-----------------------┐
+ * | | | └-----------------------┐ |
+ * | | └-----------------------┐ | |
+ * | └-----------------------┐ | | |
+ * └-----------------------┐ | | | |
+ * | | | | | | | |
+ * ┌-------┘ | | | | | | |
+ * | ┌-------┘ | | | | | |
+ * | | ┌-------┘ | | | | |
+ * | | | | | | | |
+ * | | | | | | | |
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * 3 2 1 0
+ *
+ * This pattern is the same one used for 'gpr3' gpr encoding type, except for
+ * the input value 0, that is mapped to the output value 0 instead of 16.
+ *
+ * Used in handling following instructions:
+ *
+ * - SB[16]
+ * - SH[16]
+ * - SW[16]
+ * - SW[GP16]
+ */
uint64 NMD::decode_gpr_gpr3_src_store(uint64 d)
{
static uint64 register_list[] = { 0, 17, 18, 19, 4, 5, 6, 7 };
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 29/44] disas: nanoMIPS: Rename the decoder of 'gpr4' gpr encoding type
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (27 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 28/44] disas: nanoMIPS: Comment " Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 30/44] disas: nanoMIPS: Comment " Aleksandar Markovic
` (15 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Rename the decoder of 'gpr4' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
disas/nanomips.cpp | 20 ++++++++++----------
disas/nanomips.h | 2 +-
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index 1c313f3..5f6c93c 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -406,7 +406,7 @@ uint64 NMD::encode_gpr4_zero(uint64 d)
}
-uint64 NMD::encode_gpr4(uint64 d)
+uint64 NMD::decode_gpr_gpr4(uint64 d)
{
static uint64 register_list[] = { 8, 9, 10, 11, 4, 5, 6, 7,
16, 17, 18, 19, 20, 21, 22, 23 };
@@ -2363,8 +2363,8 @@ std::string NMD::ADDU_4X4_(uint64 instruction)
uint64 rt4_value = extract_rt4_9_7_6_5(instruction);
uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
- std::string rs4 = GPR(encode_gpr4(rs4_value));
- std::string rt4 = GPR(encode_gpr4(rt4_value));
+ std::string rs4 = GPR(decode_gpr_gpr4(rs4_value));
+ std::string rt4 = GPR(decode_gpr_gpr4(rt4_value));
return img::format("ADDU %s, %s", rs4, rt4);
}
@@ -9046,9 +9046,9 @@ std::string NMD::LW_4X4_(uint64 instruction)
uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
uint64 u_value = extract_u_3_8__s2(instruction);
- std::string rt4 = GPR(encode_gpr4(rt4_value));
+ std::string rt4 = GPR(decode_gpr_gpr4(rt4_value));
std::string u = IMMEDIATE(copy(u_value));
- std::string rs4 = GPR(encode_gpr4(rs4_value));
+ std::string rs4 = GPR(decode_gpr_gpr4(rs4_value));
return img::format("LW %s, %s(%s)", rt4, u, rs4);
}
@@ -10419,8 +10419,8 @@ std::string NMD::MOVEP_REV_(uint64 instruction)
uint64 rd2_value = extract_rd2_3_8(instruction);
uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
- std::string rs4 = GPR(encode_gpr4(rs4_value));
- std::string rt4 = GPR(encode_gpr4(rt4_value));
+ std::string rs4 = GPR(decode_gpr_gpr4(rs4_value));
+ std::string rt4 = GPR(decode_gpr_gpr4(rt4_value));
std::string rd2 = GPR(encode_rd2_reg1(rd2_value));
std::string rs2 = GPR(encode_rd2_reg2(rd2_value));
/* !!!!!!!!!! - no conversion function */
@@ -10985,8 +10985,8 @@ std::string NMD::MUL_4X4_(uint64 instruction)
uint64 rt4_value = extract_rt4_9_7_6_5(instruction);
uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
- std::string rs4 = GPR(encode_gpr4(rs4_value));
- std::string rt4 = GPR(encode_gpr4(rt4_value));
+ std::string rs4 = GPR(decode_gpr_gpr4(rs4_value));
+ std::string rt4 = GPR(decode_gpr_gpr4(rt4_value));
return img::format("MUL %s, %s", rs4, rt4);
}
@@ -15264,7 +15264,7 @@ std::string NMD::SW_4X4_(uint64 instruction)
std::string rtz4 = GPR(encode_gpr4_zero(rtz4_value));
std::string u = IMMEDIATE(copy(u_value));
- std::string rs4 = GPR(encode_gpr4(rs4_value));
+ std::string rs4 = GPR(decode_gpr_gpr4(rs4_value));
return img::format("SW %s, %s(%s)", rtz4, u, rs4);
}
diff --git a/disas/nanomips.h b/disas/nanomips.h
index 757915c..109b131 100644
--- a/disas/nanomips.h
+++ b/disas/nanomips.h
@@ -109,7 +109,7 @@ private:
uint64 decode_gpr_gpr3_src_store(uint64 d);
uint64 encode_rd1_from_rd(uint64 d);
uint64 encode_gpr4_zero(uint64 d);
- uint64 encode_gpr4(uint64 d);
+ uint64 decode_gpr_gpr4(uint64 d);
uint64 encode_rd2_reg1(uint64 d);
uint64 encode_rd2_reg2(uint64 d);
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 30/44] disas: nanoMIPS: Comment the decoder of 'gpr4' gpr encoding type
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (28 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 29/44] disas: nanoMIPS: Rename the decoder of 'gpr4' " Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 31/44] disas: nanoMIPS: Rename the decoder of 'gpr4.zero' " Aleksandar Markovic
` (14 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Comment the decoder of 'gpr4' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
disas/nanomips.cpp | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index 5f6c93c..a086f65 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -406,6 +406,32 @@ uint64 NMD::encode_gpr4_zero(uint64 d)
}
+/*
+ * NMD::decode_gpr_gpr4() - decoder for 'gpr4' gpr encoding type
+ *
+ * Map a 4-bit code to the 5-bit register space according to this pattern:
+ *
+ * 1 0
+ * 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * | | | | | | | | | | | | | | | |
+ * | | | | | | | | | | | | | | | |
+ * | | | | | | | | | | | └---------------┐
+ * | | | | | | | | | | └---------------┐ |
+ * | | | | | | | | | └---------------┐ | |
+ * | | | | | | | | └---------------┐ | | |
+ * | | | | | | | | | | | | | | | |
+ * | | | | | | | | | | | | | | | |
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * 3 2 1 0
+ *
+ * Used in handling following instructions:
+ *
+ * - ADDU[4X4]
+ * - LW[4X4]
+ * - MOVEP[REV]
+ * - MUL[4X4]
+ * - SW[4X4]
+ */
uint64 NMD::decode_gpr_gpr4(uint64 d)
{
static uint64 register_list[] = { 8, 9, 10, 11, 4, 5, 6, 7,
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 31/44] disas: nanoMIPS: Rename the decoder of 'gpr4.zero' gpr encoding type
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (29 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 30/44] disas: nanoMIPS: Comment " Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 32/44] disas: nanoMIPS: Comment " Aleksandar Markovic
` (13 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Rename the decoder of 'gpr4.zero' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
disas/nanomips.cpp | 10 +++++-----
disas/nanomips.h | 2 +-
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index a086f65..66b1223 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -397,7 +397,7 @@ uint64 NMD::encode_rd1_from_rd(uint64 d)
}
-uint64 NMD::encode_gpr4_zero(uint64 d)
+uint64 NMD::decode_gpr_gpr4_zero(uint64 d)
{
static uint64 register_list[] = { 8, 9, 10, 0, 4, 5, 6, 7,
16, 17, 18, 19, 20, 21, 22, 23 };
@@ -10395,7 +10395,7 @@ std::string NMD::MOVE_BALC(uint64 instruction)
int64 s_value = extract_s__se21_0_20_to_1_s1(instruction);
std::string rd1 = GPR(encode_rd1_from_rd(rd1_value));
- std::string rtz4 = GPR(encode_gpr4_zero(rtz4_value));
+ std::string rtz4 = GPR(decode_gpr_gpr4_zero(rtz4_value));
std::string s = ADDRESS(encode_s_from_address(s_value), 4);
return img::format("MOVE.BALC %s, %s, %s", rd1, rtz4, s);
@@ -10421,8 +10421,8 @@ std::string NMD::MOVEP(uint64 instruction)
std::string rd2 = GPR(encode_rd2_reg1(rd2_value));
std::string re2 = GPR(encode_rd2_reg2(rd2_value));
/* !!!!!!!!!! - no conversion function */
- std::string rsz4 = GPR(encode_gpr4_zero(rsz4_value));
- std::string rtz4 = GPR(encode_gpr4_zero(rtz4_value));
+ std::string rsz4 = GPR(decode_gpr_gpr4_zero(rsz4_value));
+ std::string rtz4 = GPR(decode_gpr_gpr4_zero(rtz4_value));
return img::format("MOVEP %s, %s, %s, %s", rd2, re2, rsz4, rtz4);
/* hand edited */
@@ -15288,7 +15288,7 @@ std::string NMD::SW_4X4_(uint64 instruction)
uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
uint64 u_value = extract_u_3_8__s2(instruction);
- std::string rtz4 = GPR(encode_gpr4_zero(rtz4_value));
+ std::string rtz4 = GPR(decode_gpr_gpr4_zero(rtz4_value));
std::string u = IMMEDIATE(copy(u_value));
std::string rs4 = GPR(decode_gpr_gpr4(rs4_value));
diff --git a/disas/nanomips.h b/disas/nanomips.h
index 109b131..c1d3a3b 100644
--- a/disas/nanomips.h
+++ b/disas/nanomips.h
@@ -108,7 +108,7 @@ private:
uint64 decode_gpr_gpr3(uint64 d);
uint64 decode_gpr_gpr3_src_store(uint64 d);
uint64 encode_rd1_from_rd(uint64 d);
- uint64 encode_gpr4_zero(uint64 d);
+ uint64 decode_gpr_gpr4_zero(uint64 d);
uint64 decode_gpr_gpr4(uint64 d);
uint64 encode_rd2_reg1(uint64 d);
uint64 encode_rd2_reg2(uint64 d);
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 32/44] disas: nanoMIPS: Comment the decoder of 'gpr4.zero' gpr encoding type
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (30 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 31/44] disas: nanoMIPS: Rename the decoder of 'gpr4.zero' " Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 33/44] disas: nanoMIPS: Rename the decoder of 'gpr2.reg1' " Aleksandar Markovic
` (12 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Comment the decoder of 'gpr4.zero' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
disas/nanomips.cpp | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index 66b1223..de96125 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -397,6 +397,33 @@ uint64 NMD::encode_rd1_from_rd(uint64 d)
}
+/*
+ * NMD::decode_gpr_gpr4_zero() - decoder for 'gpr4.zero' gpr encoding type
+ *
+ * Map a 4-bit code to the 5-bit register space according to this pattern:
+ *
+ * 1 0
+ * 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * | | | | | | | | | | | | | | | |
+ * | | | | | | | | | | | | └---------------------┐
+ * | | | | | | | | | | | └---------------┐ |
+ * | | | | | | | | | | └---------------┐ | |
+ * | | | | | | | | | └---------------┐ | | |
+ * | | | | | | | | └---------------┐ | | | |
+ * | | | | | | | | | | | | | | | |
+ * | | | | | | | | | | | | | | | |
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * 3 2 1 0
+ *
+ * This pattern is the same one used for 'gpr4' gpr encoding type, except for
+ * the input value 3, that is mapped to the output value 0 instead of 11.
+ *
+ * Used in handling following instructions:
+ *
+ * - MOVE.BALC
+ * - MOVEP
+ * - SW[4X4]
+ */
uint64 NMD::decode_gpr_gpr4_zero(uint64 d)
{
static uint64 register_list[] = { 8, 9, 10, 0, 4, 5, 6, 7,
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 33/44] disas: nanoMIPS: Rename the decoder of 'gpr2.reg1' gpr encoding type
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (31 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 32/44] disas: nanoMIPS: Comment " Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 34/44] disas: nanoMIPS: Comment " Aleksandar Markovic
` (11 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Rename the decoder of 'gpr2.reg1' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
disas/nanomips.cpp | 6 +++---
disas/nanomips.h | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index de96125..b0d0cf8 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -468,7 +468,7 @@ uint64 NMD::decode_gpr_gpr4(uint64 d)
}
-uint64 NMD::encode_rd2_reg1(uint64 d)
+uint64 NMD::decode_gpr_gpr2_reg1(uint64 d)
{
static uint64 register_list[] = { 4, 5, 6, 7 };
return renumber_registers(d, register_list,
@@ -10445,7 +10445,7 @@ std::string NMD::MOVEP(uint64 instruction)
uint64 rd2_value = extract_rd2_3_8(instruction);
uint64 rsz4_value = extract_rsz4_4_2_1_0(instruction);
- std::string rd2 = GPR(encode_rd2_reg1(rd2_value));
+ std::string rd2 = GPR(decode_gpr_gpr2_reg1(rd2_value));
std::string re2 = GPR(encode_rd2_reg2(rd2_value));
/* !!!!!!!!!! - no conversion function */
std::string rsz4 = GPR(decode_gpr_gpr4_zero(rsz4_value));
@@ -10474,7 +10474,7 @@ std::string NMD::MOVEP_REV_(uint64 instruction)
std::string rs4 = GPR(decode_gpr_gpr4(rs4_value));
std::string rt4 = GPR(decode_gpr_gpr4(rt4_value));
- std::string rd2 = GPR(encode_rd2_reg1(rd2_value));
+ std::string rd2 = GPR(decode_gpr_gpr2_reg1(rd2_value));
std::string rs2 = GPR(encode_rd2_reg2(rd2_value));
/* !!!!!!!!!! - no conversion function */
diff --git a/disas/nanomips.h b/disas/nanomips.h
index c1d3a3b..d928757 100644
--- a/disas/nanomips.h
+++ b/disas/nanomips.h
@@ -110,7 +110,7 @@ private:
uint64 encode_rd1_from_rd(uint64 d);
uint64 decode_gpr_gpr4_zero(uint64 d);
uint64 decode_gpr_gpr4(uint64 d);
- uint64 encode_rd2_reg1(uint64 d);
+ uint64 decode_gpr_gpr2_reg1(uint64 d);
uint64 encode_rd2_reg2(uint64 d);
uint64 copy(uint64 d);
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 34/44] disas: nanoMIPS: Comment the decoder of 'gpr2.reg1' gpr encoding type
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (32 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 33/44] disas: nanoMIPS: Rename the decoder of 'gpr2.reg1' " Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 35/44] disas: nanoMIPS: Rename the decoder of 'gpr2.reg2' " Aleksandar Markovic
` (10 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Comment the decoder of 'gpr2.reg1' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
disas/nanomips.cpp | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index b0d0cf8..c3b2bec 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -468,6 +468,28 @@ uint64 NMD::decode_gpr_gpr4(uint64 d)
}
+/*
+ * NMD::decode_gpr_gpr2_reg1() - decoder for 'gpr2.reg1' gpr encoding type
+ *
+ * Map a 2-bit code to the 5-bit register space according to this pattern:
+ *
+ * 3 2 1 0
+ * | | | |
+ * | | | |
+ * | | | └-------------------┐
+ * | | └-------------------┐ |
+ * | └-------------------┐ | |
+ * └-------------------┐ | | |
+ * | | | |
+ * | | | |
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * 3 2 1 0
+ *
+ * Used in handling following instructions:
+ *
+ * - MOVEP
+ * - MOVEP[REV]
+ */
uint64 NMD::decode_gpr_gpr2_reg1(uint64 d)
{
static uint64 register_list[] = { 4, 5, 6, 7 };
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 35/44] disas: nanoMIPS: Rename the decoder of 'gpr2.reg2' gpr encoding type
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (33 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 34/44] disas: nanoMIPS: Comment " Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 36/44] disas: nanoMIPS: Comment " Aleksandar Markovic
` (9 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Rename the decoder of 'gpr2.reg2' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
disas/nanomips.cpp | 6 +++---
disas/nanomips.h | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index c3b2bec..06d2400 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -498,7 +498,7 @@ uint64 NMD::decode_gpr_gpr2_reg1(uint64 d)
}
-uint64 NMD::encode_rd2_reg2(uint64 d)
+uint64 NMD::decode_gpr_gpr2_reg2(uint64 d)
{
static uint64 register_list[] = { 5, 6, 7, 8 };
return renumber_registers(d, register_list,
@@ -10468,7 +10468,7 @@ std::string NMD::MOVEP(uint64 instruction)
uint64 rsz4_value = extract_rsz4_4_2_1_0(instruction);
std::string rd2 = GPR(decode_gpr_gpr2_reg1(rd2_value));
- std::string re2 = GPR(encode_rd2_reg2(rd2_value));
+ std::string re2 = GPR(decode_gpr_gpr2_reg2(rd2_value));
/* !!!!!!!!!! - no conversion function */
std::string rsz4 = GPR(decode_gpr_gpr4_zero(rsz4_value));
std::string rtz4 = GPR(decode_gpr_gpr4_zero(rtz4_value));
@@ -10497,7 +10497,7 @@ std::string NMD::MOVEP_REV_(uint64 instruction)
std::string rs4 = GPR(decode_gpr_gpr4(rs4_value));
std::string rt4 = GPR(decode_gpr_gpr4(rt4_value));
std::string rd2 = GPR(decode_gpr_gpr2_reg1(rd2_value));
- std::string rs2 = GPR(encode_rd2_reg2(rd2_value));
+ std::string rs2 = GPR(decode_gpr_gpr2_reg2(rd2_value));
/* !!!!!!!!!! - no conversion function */
return img::format("MOVEP %s, %s, %s, %s", rs4, rt4, rd2, rs2);
diff --git a/disas/nanomips.h b/disas/nanomips.h
index d928757..9df1ab2 100644
--- a/disas/nanomips.h
+++ b/disas/nanomips.h
@@ -111,7 +111,7 @@ private:
uint64 decode_gpr_gpr4_zero(uint64 d);
uint64 decode_gpr_gpr4(uint64 d);
uint64 decode_gpr_gpr2_reg1(uint64 d);
- uint64 encode_rd2_reg2(uint64 d);
+ uint64 decode_gpr_gpr2_reg2(uint64 d);
uint64 copy(uint64 d);
int64 copy(int64 d);
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 36/44] disas: nanoMIPS: Comment the decoder of 'gpr2.reg2' gpr encoding type
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (34 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 35/44] disas: nanoMIPS: Rename the decoder of 'gpr2.reg2' " Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 37/44] disas: nanoMIPS: Rename the decoder of 'gpr1' " Aleksandar Markovic
` (8 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Comment the decoder of 'gpr2.reg2' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
disas/nanomips.cpp | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index 06d2400..fe0c4af 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -498,6 +498,28 @@ uint64 NMD::decode_gpr_gpr2_reg1(uint64 d)
}
+/*
+ * NMD::decode_gpr_gpr2_reg2() - decoder for 'gpr2.reg2' gpr encoding type
+ *
+ * Map a 2-bit code to the 5-bit register space according to this pattern:
+ *
+ * 3 2 1 0
+ * | | | |
+ * | | | |
+ * | | | └-----------------┐
+ * | | └-----------------┐ |
+ * | └-----------------┐ | |
+ * └-----------------┐ | | |
+ * | | | |
+ * | | | |
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * 3 2 1 0
+ *
+ * Used in handling following instructions:
+ *
+ * - MOVEP
+ * - MOVEP[REV]
+ */
uint64 NMD::decode_gpr_gpr2_reg2(uint64 d)
{
static uint64 register_list[] = { 5, 6, 7, 8 };
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 37/44] disas: nanoMIPS: Rename the decoder of 'gpr1' gpr encoding type
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (35 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 36/44] disas: nanoMIPS: Comment " Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 38/44] disas: nanoMIPS: Comment " Aleksandar Markovic
` (7 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Rename the decoder of 'gpr1' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
disas/nanomips.cpp | 4 ++--
disas/nanomips.h | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index fe0c4af..6f15821 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -389,7 +389,7 @@ uint64 NMD::decode_gpr_gpr3_src_store(uint64 d)
}
-uint64 NMD::encode_rd1_from_rd(uint64 d)
+uint64 NMD::decode_gpr_gpr1(uint64 d)
{
static uint64 register_list[] = { 4, 5 };
return renumber_registers(d, register_list,
@@ -10465,7 +10465,7 @@ std::string NMD::MOVE_BALC(uint64 instruction)
uint64 rd1_value = extract_rdl_25_24(instruction);
int64 s_value = extract_s__se21_0_20_to_1_s1(instruction);
- std::string rd1 = GPR(encode_rd1_from_rd(rd1_value));
+ std::string rd1 = GPR(decode_gpr_gpr1(rd1_value));
std::string rtz4 = GPR(decode_gpr_gpr4_zero(rtz4_value));
std::string s = ADDRESS(encode_s_from_address(s_value), 4);
diff --git a/disas/nanomips.h b/disas/nanomips.h
index 9df1ab2..d6a6e3f 100644
--- a/disas/nanomips.h
+++ b/disas/nanomips.h
@@ -107,7 +107,7 @@ private:
size_t register_list_size);
uint64 decode_gpr_gpr3(uint64 d);
uint64 decode_gpr_gpr3_src_store(uint64 d);
- uint64 encode_rd1_from_rd(uint64 d);
+ uint64 decode_gpr_gpr1(uint64 d);
uint64 decode_gpr_gpr4_zero(uint64 d);
uint64 decode_gpr_gpr4(uint64 d);
uint64 decode_gpr_gpr2_reg1(uint64 d);
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 38/44] disas: nanoMIPS: Comment the decoder of 'gpr1' gpr encoding type
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (36 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 37/44] disas: nanoMIPS: Rename the decoder of 'gpr1' " Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 39/44] disas: nanoMIPS: Reorder declarations and definitions of gpr decoders Aleksandar Markovic
` (6 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Comment the decoder of 'gpr1' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
disas/nanomips.cpp | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index 6f15821..23556b4 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -389,6 +389,27 @@ uint64 NMD::decode_gpr_gpr3_src_store(uint64 d)
}
+/*
+ * NMD::decode_gpr_gpr1() - decoder for 'gpr1' gpr encoding type
+ *
+ * Map a 1-bit code to the 5-bit register space according to this pattern:
+ *
+ * 1 0
+ * | |
+ * | |
+ * | └---------------------┐
+ * └---------------------┐ |
+ * | |
+ * | |
+ * | |
+ * | |
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * 3 2 1 0
+ *
+ * Used in handling following instruction:
+ *
+ * - MOVE.BALC
+ */
uint64 NMD::decode_gpr_gpr1(uint64 d)
{
static uint64 register_list[] = { 4, 5 };
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 39/44] disas: nanoMIPS: Reorder declarations and definitions of gpr decoders
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (37 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 38/44] disas: nanoMIPS: Comment " Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 40/44] disas: nanoMIPS: Add a note on documentation Aleksandar Markovic
` (5 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Reorder declarations and definitions of gpr decoders by number of
input bits of corresponding encoding type.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
disas/nanomips.cpp | 200 ++++++++++++++++++++++++++---------------------------
disas/nanomips.h | 7 +-
2 files changed, 104 insertions(+), 103 deletions(-)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index 23556b4..d6632bb 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -292,6 +292,77 @@ uint64 NMD::renumber_registers(uint64 index, uint64 *register_list,
/*
+ * NMD::decode_gpr_gpr4() - decoder for 'gpr4' gpr encoding type
+ *
+ * Map a 4-bit code to the 5-bit register space according to this pattern:
+ *
+ * 1 0
+ * 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * | | | | | | | | | | | | | | | |
+ * | | | | | | | | | | | | | | | |
+ * | | | | | | | | | | | └---------------┐
+ * | | | | | | | | | | └---------------┐ |
+ * | | | | | | | | | └---------------┐ | |
+ * | | | | | | | | └---------------┐ | | |
+ * | | | | | | | | | | | | | | | |
+ * | | | | | | | | | | | | | | | |
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * 3 2 1 0
+ *
+ * Used in handling following instructions:
+ *
+ * - ADDU[4X4]
+ * - LW[4X4]
+ * - MOVEP[REV]
+ * - MUL[4X4]
+ * - SW[4X4]
+ */
+uint64 NMD::decode_gpr_gpr4(uint64 d)
+{
+ static uint64 register_list[] = { 8, 9, 10, 11, 4, 5, 6, 7,
+ 16, 17, 18, 19, 20, 21, 22, 23 };
+ return renumber_registers(d, register_list,
+ sizeof(register_list) / sizeof(register_list[0]));
+}
+
+
+/*
+ * NMD::decode_gpr_gpr4_zero() - decoder for 'gpr4.zero' gpr encoding type
+ *
+ * Map a 4-bit code to the 5-bit register space according to this pattern:
+ *
+ * 1 0
+ * 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * | | | | | | | | | | | | | | | |
+ * | | | | | | | | | | | | └---------------------┐
+ * | | | | | | | | | | | └---------------┐ |
+ * | | | | | | | | | | └---------------┐ | |
+ * | | | | | | | | | └---------------┐ | | |
+ * | | | | | | | | └---------------┐ | | | |
+ * | | | | | | | | | | | | | | | |
+ * | | | | | | | | | | | | | | | |
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * 3 2 1 0
+ *
+ * This pattern is the same one used for 'gpr4' gpr encoding type, except for
+ * the input value 3, that is mapped to the output value 0 instead of 11.
+ *
+ * Used in handling following instructions:
+ *
+ * - MOVE.BALC
+ * - MOVEP
+ * - SW[4X4]
+ */
+uint64 NMD::decode_gpr_gpr4_zero(uint64 d)
+{
+ static uint64 register_list[] = { 8, 9, 10, 0, 4, 5, 6, 7,
+ 16, 17, 18, 19, 20, 21, 22, 23 };
+ return renumber_registers(d, register_list,
+ sizeof(register_list) / sizeof(register_list[0]));
+}
+
+
+/*
* NMD::decode_gpr_gpr3() - decoder for 'gpr3' gpr encoding type
*
* Map a 3-bit code to the 5-bit register space according to this pattern:
@@ -390,106 +461,6 @@ uint64 NMD::decode_gpr_gpr3_src_store(uint64 d)
/*
- * NMD::decode_gpr_gpr1() - decoder for 'gpr1' gpr encoding type
- *
- * Map a 1-bit code to the 5-bit register space according to this pattern:
- *
- * 1 0
- * | |
- * | |
- * | └---------------------┐
- * └---------------------┐ |
- * | |
- * | |
- * | |
- * | |
- * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
- * 3 2 1 0
- *
- * Used in handling following instruction:
- *
- * - MOVE.BALC
- */
-uint64 NMD::decode_gpr_gpr1(uint64 d)
-{
- static uint64 register_list[] = { 4, 5 };
- return renumber_registers(d, register_list,
- sizeof(register_list) / sizeof(register_list[0]));
-}
-
-
-/*
- * NMD::decode_gpr_gpr4_zero() - decoder for 'gpr4.zero' gpr encoding type
- *
- * Map a 4-bit code to the 5-bit register space according to this pattern:
- *
- * 1 0
- * 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
- * | | | | | | | | | | | | | | | |
- * | | | | | | | | | | | | └---------------------┐
- * | | | | | | | | | | | └---------------┐ |
- * | | | | | | | | | | └---------------┐ | |
- * | | | | | | | | | └---------------┐ | | |
- * | | | | | | | | └---------------┐ | | | |
- * | | | | | | | | | | | | | | | |
- * | | | | | | | | | | | | | | | |
- * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
- * 3 2 1 0
- *
- * This pattern is the same one used for 'gpr4' gpr encoding type, except for
- * the input value 3, that is mapped to the output value 0 instead of 11.
- *
- * Used in handling following instructions:
- *
- * - MOVE.BALC
- * - MOVEP
- * - SW[4X4]
- */
-uint64 NMD::decode_gpr_gpr4_zero(uint64 d)
-{
- static uint64 register_list[] = { 8, 9, 10, 0, 4, 5, 6, 7,
- 16, 17, 18, 19, 20, 21, 22, 23 };
- return renumber_registers(d, register_list,
- sizeof(register_list) / sizeof(register_list[0]));
-}
-
-
-/*
- * NMD::decode_gpr_gpr4() - decoder for 'gpr4' gpr encoding type
- *
- * Map a 4-bit code to the 5-bit register space according to this pattern:
- *
- * 1 0
- * 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
- * | | | | | | | | | | | | | | | |
- * | | | | | | | | | | | | | | | |
- * | | | | | | | | | | | └---------------┐
- * | | | | | | | | | | └---------------┐ |
- * | | | | | | | | | └---------------┐ | |
- * | | | | | | | | └---------------┐ | | |
- * | | | | | | | | | | | | | | | |
- * | | | | | | | | | | | | | | | |
- * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
- * 3 2 1 0
- *
- * Used in handling following instructions:
- *
- * - ADDU[4X4]
- * - LW[4X4]
- * - MOVEP[REV]
- * - MUL[4X4]
- * - SW[4X4]
- */
-uint64 NMD::decode_gpr_gpr4(uint64 d)
-{
- static uint64 register_list[] = { 8, 9, 10, 11, 4, 5, 6, 7,
- 16, 17, 18, 19, 20, 21, 22, 23 };
- return renumber_registers(d, register_list,
- sizeof(register_list) / sizeof(register_list[0]));
-}
-
-
-/*
* NMD::decode_gpr_gpr2_reg1() - decoder for 'gpr2.reg1' gpr encoding type
*
* Map a 2-bit code to the 5-bit register space according to this pattern:
@@ -549,6 +520,35 @@ uint64 NMD::decode_gpr_gpr2_reg2(uint64 d)
}
+/*
+ * NMD::decode_gpr_gpr1() - decoder for 'gpr1' gpr encoding type
+ *
+ * Map a 1-bit code to the 5-bit register space according to this pattern:
+ *
+ * 1 0
+ * | |
+ * | |
+ * | └---------------------┐
+ * └---------------------┐ |
+ * | |
+ * | |
+ * | |
+ * | |
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * 3 2 1 0
+ *
+ * Used in handling following instruction:
+ *
+ * - MOVE.BALC
+ */
+uint64 NMD::decode_gpr_gpr1(uint64 d)
+{
+ static uint64 register_list[] = { 4, 5 };
+ return renumber_registers(d, register_list,
+ sizeof(register_list) / sizeof(register_list[0]));
+}
+
+
uint64 NMD::copy(uint64 d)
{
return d;
diff --git a/disas/nanomips.h b/disas/nanomips.h
index d6a6e3f..6482eda 100644
--- a/disas/nanomips.h
+++ b/disas/nanomips.h
@@ -105,13 +105,14 @@ private:
uint64 renumber_registers(uint64 index, uint64 *register_list,
size_t register_list_size);
+
+ uint64 decode_gpr_gpr4(uint64 d);
+ uint64 decode_gpr_gpr4_zero(uint64 d);
uint64 decode_gpr_gpr3(uint64 d);
uint64 decode_gpr_gpr3_src_store(uint64 d);
- uint64 decode_gpr_gpr1(uint64 d);
- uint64 decode_gpr_gpr4_zero(uint64 d);
- uint64 decode_gpr_gpr4(uint64 d);
uint64 decode_gpr_gpr2_reg1(uint64 d);
uint64 decode_gpr_gpr2_reg2(uint64 d);
+ uint64 decode_gpr_gpr1(uint64 d);
uint64 copy(uint64 d);
int64 copy(int64 d);
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 40/44] disas: nanoMIPS: Add a note on documentation
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (38 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 39/44] disas: nanoMIPS: Reorder declarations and definitions of gpr decoders Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 41/44] tests/tcg: mips: Test R5900 three-operand MADD Aleksandar Markovic
` (4 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Add "nanoMIPS32 Instruction Set Technical Reference Manual" as
a reference.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
disas/nanomips.cpp | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index d6632bb..17f4c22 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -20,6 +20,13 @@
*
*/
+/*
+ * Documentation used while implementing this component:
+ *
+ * [1] "MIPS® Architecture Base: nanoMIPS32(tm) Instruction Set Technical
+ * Reference Manual", Revision 01.01, April 27, 2018
+ */
+
extern "C" {
#include "qemu/osdep.h"
#include "disas/bfd.h"
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 41/44] tests/tcg: mips: Test R5900 three-operand MADD
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (39 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 40/44] disas: nanoMIPS: Add a note on documentation Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 42/44] tests/tcg: mips: Test R5900 three-operand MADD1 Aleksandar Markovic
` (3 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Fredrik Noring <noring@nocrew.org>
Test R5900 three-operand MADD.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Fredrik Noring <noring@nocrew.org>
---
tests/tcg/mips/mipsr5900/Makefile | 1 +
tests/tcg/mips/mipsr5900/madd.c | 45 +++++++++++++++++++++++++++++++++++++++
2 files changed, 46 insertions(+)
create mode 100644 tests/tcg/mips/mipsr5900/madd.c
diff --git a/tests/tcg/mips/mipsr5900/Makefile b/tests/tcg/mips/mipsr5900/Makefile
index a1c388b..97ca2a6 100644
--- a/tests/tcg/mips/mipsr5900/Makefile
+++ b/tests/tcg/mips/mipsr5900/Makefile
@@ -10,6 +10,7 @@ CFLAGS = -Wall -mabi=32 -march=r5900 -static
TESTCASES = div1.tst
TESTCASES += divu1.tst
+TESTCASES += madd.tst
TESTCASES += mflohi1.tst
TESTCASES += mtlohi1.tst
TESTCASES += mult.tst
diff --git a/tests/tcg/mips/mipsr5900/madd.c b/tests/tcg/mips/mipsr5900/madd.c
new file mode 100644
index 0000000..9ad2ea6
--- /dev/null
+++ b/tests/tcg/mips/mipsr5900/madd.c
@@ -0,0 +1,45 @@
+/*
+ * Test R5900-specific three-operand MADD.
+ */
+
+#include <stdio.h>
+#include <inttypes.h>
+#include <assert.h>
+
+int64_t madd(int64_t a, int32_t rs, int32_t rt)
+{
+ int32_t lo = a;
+ int32_t hi = a >> 32;
+ int32_t rd;
+ int64_t r;
+
+ __asm__ __volatile__ (
+ " mtlo %5\n"
+ " mthi %6\n"
+ " madd %0, %3, %4\n"
+ " mflo %1\n"
+ " mfhi %2\n"
+ : "=r" (rd), "=r" (lo), "=r" (hi)
+ : "r" (rs), "r" (rt), "r" (lo), "r" (hi));
+ r = ((int64_t)hi << 32) | (uint32_t)lo;
+
+ assert(a + (int64_t)rs * rt == r);
+ assert(rd == lo);
+
+ return r;
+}
+
+static void verify_madd(int64_t a, int32_t rs, int32_t rt, int64_t expected)
+{
+ assert(madd(a, rs, rt) == expected);
+ assert(madd(a, -rs, rt) == a + a - expected);
+ assert(madd(a, rs, -rt) == a + a - expected);
+ assert(madd(a, -rs, -rt) == expected);
+}
+
+int main()
+{
+ verify_madd(13, 17, 19, 336);
+
+ return 0;
+}
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 42/44] tests/tcg: mips: Test R5900 three-operand MADD1
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (40 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 41/44] tests/tcg: mips: Test R5900 three-operand MADD Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 43/44] tests/tcg: mips: Test R5900 three-operand MADDU Aleksandar Markovic
` (2 subsequent siblings)
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Fredrik Noring <noring@nocrew.org>
Test R5900 three-operand MADD1.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Fredrik Noring <noring@nocrew.org>
---
tests/tcg/mips/mipsr5900/madd.c | 43 ++++++++++++++++++++++++++++++++++++-----
1 file changed, 38 insertions(+), 5 deletions(-)
diff --git a/tests/tcg/mips/mipsr5900/madd.c b/tests/tcg/mips/mipsr5900/madd.c
index 9ad2ea6..f6f215e 100644
--- a/tests/tcg/mips/mipsr5900/madd.c
+++ b/tests/tcg/mips/mipsr5900/madd.c
@@ -1,5 +1,5 @@
/*
- * Test R5900-specific three-operand MADD.
+ * Test R5900-specific three-operand MADD and MADD1.
*/
#include <stdio.h>
@@ -29,12 +29,45 @@ int64_t madd(int64_t a, int32_t rs, int32_t rt)
return r;
}
+int64_t madd1(int64_t a, int32_t rs, int32_t rt)
+{
+ int32_t lo = a;
+ int32_t hi = a >> 32;
+ int32_t rd;
+ int64_t r;
+
+ __asm__ __volatile__ (
+ " mtlo1 %5\n"
+ " mthi1 %6\n"
+ " madd1 %0, %3, %4\n"
+ " mflo1 %1\n"
+ " mfhi1 %2\n"
+ : "=r" (rd), "=r" (lo), "=r" (hi)
+ : "r" (rs), "r" (rt), "r" (lo), "r" (hi));
+ r = ((int64_t)hi << 32) | (uint32_t)lo;
+
+ assert(a + (int64_t)rs * rt == r);
+ assert(rd == lo);
+
+ return r;
+}
+
+static int64_t madd_variants(int64_t a, int32_t rs, int32_t rt)
+{
+ int64_t rd = madd(a, rs, rt);
+ int64_t rd1 = madd1(a, rs, rt);
+
+ assert(rd == rd1);
+
+ return rd;
+}
+
static void verify_madd(int64_t a, int32_t rs, int32_t rt, int64_t expected)
{
- assert(madd(a, rs, rt) == expected);
- assert(madd(a, -rs, rt) == a + a - expected);
- assert(madd(a, rs, -rt) == a + a - expected);
- assert(madd(a, -rs, -rt) == expected);
+ assert(madd_variants(a, rs, rt) == expected);
+ assert(madd_variants(a, -rs, rt) == a + a - expected);
+ assert(madd_variants(a, rs, -rt) == a + a - expected);
+ assert(madd_variants(a, -rs, -rt) == expected);
}
int main()
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 43/44] tests/tcg: mips: Test R5900 three-operand MADDU
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (41 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 42/44] tests/tcg: mips: Test R5900 three-operand MADD1 Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 44/44] tests/tcg: mips: Test R5900 three-operand MADDU1 Aleksandar Markovic
2019-01-03 13:23 ` [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Peter Maydell
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Fredrik Noring <noring@nocrew.org>
Test R5900 three-operand MADDU.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Fredrik Noring <noring@nocrew.org>
---
tests/tcg/mips/mipsr5900/Makefile | 1 +
tests/tcg/mips/mipsr5900/maddu.c | 37 +++++++++++++++++++++++++++++++++++++
2 files changed, 38 insertions(+)
create mode 100644 tests/tcg/mips/mipsr5900/maddu.c
diff --git a/tests/tcg/mips/mipsr5900/Makefile b/tests/tcg/mips/mipsr5900/Makefile
index 97ca2a6..27ee5d5 100644
--- a/tests/tcg/mips/mipsr5900/Makefile
+++ b/tests/tcg/mips/mipsr5900/Makefile
@@ -11,6 +11,7 @@ CFLAGS = -Wall -mabi=32 -march=r5900 -static
TESTCASES = div1.tst
TESTCASES += divu1.tst
TESTCASES += madd.tst
+TESTCASES += maddu.tst
TESTCASES += mflohi1.tst
TESTCASES += mtlohi1.tst
TESTCASES += mult.tst
diff --git a/tests/tcg/mips/mipsr5900/maddu.c b/tests/tcg/mips/mipsr5900/maddu.c
new file mode 100644
index 0000000..e4e5521
--- /dev/null
+++ b/tests/tcg/mips/mipsr5900/maddu.c
@@ -0,0 +1,37 @@
+/*
+ * Test R5900-specific three-operand MADDU.
+ */
+
+#include <stdio.h>
+#include <inttypes.h>
+#include <assert.h>
+
+uint64_t maddu(uint64_t a, uint32_t rs, uint32_t rt)
+{
+ uint32_t lo = a;
+ uint32_t hi = a >> 32;
+ uint32_t rd;
+ uint64_t r;
+
+ __asm__ __volatile__ (
+ " mtlo %5\n"
+ " mthi %6\n"
+ " maddu %0, %3, %4\n"
+ " mflo %1\n"
+ " mfhi %2\n"
+ : "=r" (rd), "=r" (lo), "=r" (hi)
+ : "r" (rs), "r" (rt), "r" (lo), "r" (hi));
+ r = ((uint64_t)hi << 32) | (uint32_t)lo;
+
+ assert(a + (uint64_t)rs * rt == r);
+ assert(rd == lo);
+
+ return r;
+}
+
+int main()
+{
+ assert(maddu(13, 17, 19) == 336);
+
+ return 0;
+}
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* [Qemu-devel] [PULL v2 44/44] tests/tcg: mips: Test R5900 three-operand MADDU1
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (42 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 43/44] tests/tcg: mips: Test R5900 three-operand MADDU Aleksandar Markovic
@ 2018-12-31 14:56 ` Aleksandar Markovic
2019-01-03 13:23 ` [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Peter Maydell
44 siblings, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2018-12-31 14:56 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, amarkovic
From: Fredrik Noring <noring@nocrew.org>
Test R5900 three-operand MADDU1.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Fredrik Noring <noring@nocrew.org>
---
tests/tcg/mips/mipsr5900/maddu.c | 37 +++++++++++++++++++++++++++++++++++--
1 file changed, 35 insertions(+), 2 deletions(-)
diff --git a/tests/tcg/mips/mipsr5900/maddu.c b/tests/tcg/mips/mipsr5900/maddu.c
index e4e5521..30936fb 100644
--- a/tests/tcg/mips/mipsr5900/maddu.c
+++ b/tests/tcg/mips/mipsr5900/maddu.c
@@ -1,5 +1,5 @@
/*
- * Test R5900-specific three-operand MADDU.
+ * Test R5900-specific three-operand MADDU and MADDU1.
*/
#include <stdio.h>
@@ -29,9 +29,42 @@ uint64_t maddu(uint64_t a, uint32_t rs, uint32_t rt)
return r;
}
+uint64_t maddu1(uint64_t a, uint32_t rs, uint32_t rt)
+{
+ uint32_t lo = a;
+ uint32_t hi = a >> 32;
+ uint32_t rd;
+ uint64_t r;
+
+ __asm__ __volatile__ (
+ " mtlo1 %5\n"
+ " mthi1 %6\n"
+ " maddu1 %0, %3, %4\n"
+ " mflo1 %1\n"
+ " mfhi1 %2\n"
+ : "=r" (rd), "=r" (lo), "=r" (hi)
+ : "r" (rs), "r" (rt), "r" (lo), "r" (hi));
+ r = ((uint64_t)hi << 32) | (uint32_t)lo;
+
+ assert(a + (uint64_t)rs * rt == r);
+ assert(rd == lo);
+
+ return r;
+}
+
+static int64_t maddu_variants(int64_t a, int32_t rs, int32_t rt)
+{
+ int64_t rd = maddu(a, rs, rt);
+ int64_t rd1 = maddu1(a, rs, rt);
+
+ assert(rd == rd1);
+
+ return rd;
+}
+
int main()
{
- assert(maddu(13, 17, 19) == 336);
+ assert(maddu_variants(13, 17, 19) == 336);
return 0;
}
--
2.7.4
^ permalink raw reply related [flat|nested] 51+ messages in thread
* Re: [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
` (43 preceding siblings ...)
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 44/44] tests/tcg: mips: Test R5900 three-operand MADDU1 Aleksandar Markovic
@ 2019-01-03 13:23 ` Peter Maydell
2019-01-03 13:32 ` Philippe Mathieu-Daudé
2019-01-03 13:54 ` Aleksandar Markovic
44 siblings, 2 replies; 51+ messages in thread
From: Peter Maydell @ 2019-01-03 13:23 UTC (permalink / raw)
To: Aleksandar Markovic; +Cc: QEMU Developers, Aleksandar Markovic
On Mon, 31 Dec 2018 at 14:56, Aleksandar Markovic
<aleksandar.markovic@rt-rk.com> wrote:
>
> From: Aleksandar Markovic <amarkovic@wavecomp.com>
>
> The following changes since commit 9b2e891ec5ccdb4a7d583b77988848282606fdea:
>
> Merge remote-tracking branch 'remotes/marcel/tags/rdma-pull-request' into staging (2018-12-22 11:25:31 +0000)
>
> are available in the git repository at:
>
> https://github.com/AMarkovic/qemu tags/mips-queue-dec-2018-v2
>
> for you to fetch changes up to 96446398f47b70cf0998412314730709570e08c5:
>
> tests/tcg: mips: Test R5900 three-operand MADDU1 (2018-12-31 15:47:28 +0100)
>
> ----------------------------------------------------------------
>
> MIPS queue for December 2018 - v2
>
>
> - this queue contains various amendments to MIPS code
> - there are three checkpatch warnings that should be ingnored
> in given circumstances
> - most of the patches are not yet visible/noticeable to the end
> user, just a single note related to Paul's patch will be added
> to ChangeLog
>
> v1->v2:
>
> - added three patches that were meanwhile tested better
>
Hi; I'm afraid this doesn't build on all my test hosts:
target/mips/translate.c: In function ‘gen_mxu_Q8MAX_Q8MIN’:
target/mips/translate.c:25092:9: error: ‘for’ loop initial
declarations are only allowed in C99 mode
for (int i = 2; i >= 0; i--) {
^
target/mips/translate.c:25092:9: note: use option -std=c99 or
-std=gnu99 to compile your code
target/mips/translate.c:25129:9: error: ‘for’ loop initial
declarations are only allowed in C99 mode
for (int i = 2; i >= 0; i--) {
^
(This probably only shows up on builds with older versions
of gcc which don't default to c99.)
We don't use variable-declaration-in-for-loop.
thanks
-- PMM
^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2
2019-01-03 13:23 ` [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Peter Maydell
@ 2019-01-03 13:32 ` Philippe Mathieu-Daudé
2019-01-03 14:06 ` Thomas Huth
2019-01-03 13:54 ` Aleksandar Markovic
1 sibling, 1 reply; 51+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-01-03 13:32 UTC (permalink / raw)
To: Peter Maydell, Eric Blake, Markus Armbruster
Cc: Aleksandar Markovic, QEMU Developers, Aleksandar Markovic
On 1/3/19 2:23 PM, Peter Maydell wrote:
> On Mon, 31 Dec 2018 at 14:56, Aleksandar Markovic
> <aleksandar.markovic@rt-rk.com> wrote:
>> MIPS queue for December 2018 - v2
[...]
> Hi; I'm afraid this doesn't build on all my test hosts:
>
> target/mips/translate.c: In function ‘gen_mxu_Q8MAX_Q8MIN’:
> target/mips/translate.c:25092:9: error: ‘for’ loop initial
> declarations are only allowed in C99 mode
> for (int i = 2; i >= 0; i--) {
> ^
> target/mips/translate.c:25092:9: note: use option -std=c99 or
> -std=gnu99 to compile your code
> target/mips/translate.c:25129:9: error: ‘for’ loop initial
> declarations are only allowed in C99 mode
> for (int i = 2; i >= 0; i--) {
> ^
>
> (This probably only shows up on builds with older versions
> of gcc which don't default to c99.)
>
> We don't use variable-declaration-in-for-loop.
Hmmm I wonder if we shouldn't relax that now than all supported
compilers do support C99.
Rational is having cleaner function declarations lead to easier reviews.
^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2
2019-01-03 13:23 ` [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Peter Maydell
2019-01-03 13:32 ` Philippe Mathieu-Daudé
@ 2019-01-03 13:54 ` Aleksandar Markovic
1 sibling, 0 replies; 51+ messages in thread
From: Aleksandar Markovic @ 2019-01-03 13:54 UTC (permalink / raw)
To: Peter Maydell, Aleksandar Markovic; +Cc: QEMU Developers
> From: Peter Maydell <peter.maydell@linaro.org>
> Sent: Thursday, January 3, 2019 2:23 PM
> Subject: Re: [PULL v2 00/44] MIPS pull request for December 2018 - v2
>
> On Mon, 31 Dec 2018 at 14:56, Aleksandar Markovic
> <aleksandar.markovic@rt-rk.com> wrote:
> >
> > From: Aleksandar Markovic <amarkovic@wavecomp.com>
> >
> > The following changes since commit 9b2e891ec5ccdb4a7d583b77988848282606fdea:
> >
> > Merge remote-tracking branch 'remotes/marcel/tags/rdma-pull-request' into staging > (2018-12-22 11:25:31 +0000)
> >
> > are available in the git repository at:
> >
> > https://github.com/AMarkovic/qemu tags/mips-queue-dec-2018-v2
> >
> > for you to fetch changes up to 96446398f47b70cf0998412314730709570e08c5:
> >
> > tests/tcg: mips: Test R5900 three-operand MADDU1 (2018-12-31 15:47:28 +0100)
> >
> > ----------------------------------------------------------------
> >
> > MIPS queue for December 2018 - v2
> >
> >
> > - this queue contains various amendments to MIPS code
> > - there are three checkpatch warnings that should be ingnored
> > in given circumstances
> > - most of the patches are not yet visible/noticeable to the end
> > user, just a single note related to Paul's patch will be added
> > to ChangeLog
> >
> > v1->v2:
> >
> > - added three patches that were meanwhile tested better
> >
>
> Hi; I'm afraid this doesn't build on all my test hosts:
>
> target/mips/translate.c: In function ‘gen_mxu_Q8MAX_Q8MIN’:
> target/mips/translate.c:25092:9: error: ‘for’ loop initial
> declarations are only allowed in C99 mode
> for (int i = 2; i >= 0; i--) {
> ^
> target/mips/translate.c:25092:9: note: use option -std=c99 or
> -std=gnu99 to compile your code
> target/mips/translate.c:25129:9: error: ‘for’ loop initial
> declarations are only allowed in C99 mode
> for (int i = 2; i >= 0; i--) {
> ^
>
> (This probably only shows up on builds with older versions
> of gcc which don't default to c99.)
>
> We don't use variable-declaration-in-for-loop.
>
> thanks
> -- PMM
OK. Sorry. I am going to send v3 of the pull request updated
only with corrections for these two build errors today.
Happy holidays!
Aleksandar
^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2
2019-01-03 13:32 ` Philippe Mathieu-Daudé
@ 2019-01-03 14:06 ` Thomas Huth
2019-01-03 22:29 ` Richard Henderson
2019-01-09 10:47 ` Daniel P. Berrangé
0 siblings, 2 replies; 51+ messages in thread
From: Thomas Huth @ 2019-01-03 14:06 UTC (permalink / raw)
To: Philippe Mathieu-Daudé,
Peter Maydell, Eric Blake, Markus Armbruster
Cc: Aleksandar Markovic, QEMU Developers, Aleksandar Markovic,
Daniel P. Berrangé
On 2019-01-03 14:32, Philippe Mathieu-Daudé wrote:
> On 1/3/19 2:23 PM, Peter Maydell wrote:
>> On Mon, 31 Dec 2018 at 14:56, Aleksandar Markovic
>> <aleksandar.markovic@rt-rk.com> wrote:
>>> MIPS queue for December 2018 - v2
> [...]
>> Hi; I'm afraid this doesn't build on all my test hosts:
>>
>> target/mips/translate.c: In function ‘gen_mxu_Q8MAX_Q8MIN’:
>> target/mips/translate.c:25092:9: error: ‘for’ loop initial
>> declarations are only allowed in C99 mode
>> for (int i = 2; i >= 0; i--) {
>> ^
>> target/mips/translate.c:25092:9: note: use option -std=c99 or
>> -std=gnu99 to compile your code
>> target/mips/translate.c:25129:9: error: ‘for’ loop initial
>> declarations are only allowed in C99 mode
>> for (int i = 2; i >= 0; i--) {
>> ^
>>
>> (This probably only shows up on builds with older versions
>> of gcc which don't default to c99.)
>>
>> We don't use variable-declaration-in-for-loop.
>
> Hmmm I wonder if we shouldn't relax that now than all supported
> compilers do support C99.
Maybe we could / should enforce compiling with -std=gnu11 now? That
would also fix the problem with the duplicated typedefs on older
compilers, see e.g.:
https://lists.gnu.org/archive/html/qemu-devel/2018-11/msg05829.html
Thomas
^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2
2019-01-03 14:06 ` Thomas Huth
@ 2019-01-03 22:29 ` Richard Henderson
2019-01-09 10:47 ` Daniel P. Berrangé
1 sibling, 0 replies; 51+ messages in thread
From: Richard Henderson @ 2019-01-03 22:29 UTC (permalink / raw)
To: Thomas Huth, Philippe Mathieu-Daudé,
Peter Maydell, Eric Blake, Markus Armbruster
Cc: Aleksandar Markovic, QEMU Developers, Aleksandar Markovic
On 1/4/19 12:06 AM, Thomas Huth wrote:
> Maybe we could / should enforce compiling with -std=gnu11 now? That
> would also fix the problem with the duplicated typedefs on older
> compilers, see e.g.:
>
> https://lists.gnu.org/archive/html/qemu-devel/2018-11/msg05829.html
I'm all for it.
r~
^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2
2019-01-03 14:06 ` Thomas Huth
2019-01-03 22:29 ` Richard Henderson
@ 2019-01-09 10:47 ` Daniel P. Berrangé
1 sibling, 0 replies; 51+ messages in thread
From: Daniel P. Berrangé @ 2019-01-09 10:47 UTC (permalink / raw)
To: Thomas Huth
Cc: Philippe Mathieu-Daudé,
Peter Maydell, Eric Blake, Markus Armbruster,
Aleksandar Markovic, QEMU Developers, Aleksandar Markovic
On Thu, Jan 03, 2019 at 03:06:23PM +0100, Thomas Huth wrote:
> On 2019-01-03 14:32, Philippe Mathieu-Daudé wrote:
> > On 1/3/19 2:23 PM, Peter Maydell wrote:
> >> On Mon, 31 Dec 2018 at 14:56, Aleksandar Markovic
> >> <aleksandar.markovic@rt-rk.com> wrote:
> >>> MIPS queue for December 2018 - v2
> > [...]
> >> Hi; I'm afraid this doesn't build on all my test hosts:
> >>
> >> target/mips/translate.c: In function ‘gen_mxu_Q8MAX_Q8MIN’:
> >> target/mips/translate.c:25092:9: error: ‘for’ loop initial
> >> declarations are only allowed in C99 mode
> >> for (int i = 2; i >= 0; i--) {
> >> ^
> >> target/mips/translate.c:25092:9: note: use option -std=c99 or
> >> -std=gnu99 to compile your code
> >> target/mips/translate.c:25129:9: error: ‘for’ loop initial
> >> declarations are only allowed in C99 mode
> >> for (int i = 2; i >= 0; i--) {
> >> ^
> >>
> >> (This probably only shows up on builds with older versions
> >> of gcc which don't default to c99.)
> >>
> >> We don't use variable-declaration-in-for-loop.
> >
> > Hmmm I wonder if we shouldn't relax that now than all supported
> > compilers do support C99.
>
> Maybe we could / should enforce compiling with -std=gnu11 now? That
> would also fix the problem with the duplicated typedefs on older
> compilers, see e.g.:
>
> https://lists.gnu.org/archive/html/qemu-devel/2018-11/msg05829.html
Your previous patch set min GCC to 4.8
commit efc6c070acabd92283f8786cc835684d09def12f
Author: Thomas Huth <thuth@redhat.com>
Date: Mon Dec 3 10:12:32 2018 +0100
configure: Add a test for the minimum compiler version
The problem is that I found the 4.x series explicitly said gnu11 was
"incomplete and experimental" (ie don't use it)
https://lists.gnu.org/archive/html/qemu-devel/2018-08/msg02055.html
Even if QEMU built without warnings with std11 on 4.x, i'd still be
concerned that it was silently doing something wrong due to std11
being considered experimental.
We could definitely ask for std99, as while that was also incomplete
in 4.x, it was at least /not/ marked experiemental.
Regards,
Daniel
--
|: https://berrange.com -o- https://www.flickr.com/photos/dberrange :|
|: https://libvirt.org -o- https://fstop138.berrange.com :|
|: https://entangle-photo.org -o- https://www.instagram.com/dberrange :|
^ permalink raw reply [flat|nested] 51+ messages in thread
end of thread, other threads:[~2019-01-09 10:55 UTC | newest]
Thread overview: 51+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-12-31 14:55 [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Aleksandar Markovic
2018-12-31 14:55 ` [Qemu-devel] [PULL v2 01/44] MAINTAINERS: target/mips: Add MIPS files under default-configs directory Aleksandar Markovic
2018-12-31 14:55 ` [Qemu-devel] [PULL v2 02/44] MAINTAINERS: target/mips: Add filter for mips in email subjects Aleksandar Markovic
2018-12-31 14:55 ` [Qemu-devel] [PULL v2 03/44] MAINTAINERS: target/mips: Reorder items alphabetically Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 04/44] MAINTAINERS: Add Aleksandar Rikalo as a reviewer for MIPS content Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 05/44] atomics: Set ATOMIC_REG_SIZE=8 for MIPS n32 Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 06/44] target/mips: MXU: Add missing opcodes/decoding for LX* instructions Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 07/44] target/mips: MXU: Add generic naming for optn2 constants Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 08/44] target/mips: MXU: Improve the comment containing MXU overview Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 09/44] target/mips: MXU: Add handlers for logic instructions Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 10/44] target/mips: MXU: Add handlers for max/min instructions Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 11/44] target/mips: MXU: Add handler for an align instruction Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 12/44] target/mips: Support R5900 three-operand MADD and MADDU instructions Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 13/44] target/mips: Support R5900 three-operand MADD1 and MADDU1 instructions Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 14/44] disas: nanoMIPS: Fix types and format strings Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 15/44] disas: nanoMIPS: Fix preamble text in nanomips.* files Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 16/44] disas: nanoMIPS: Remove functions that are not used Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 17/44] disas: nanoMIPS: Fix a function misnomer Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 18/44] disas: nanoMIPS: Fix order of some invocations Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 19/44] disas: nanoMIPS: Name some functions in a more descriptive way Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 20/44] disas: nanoMIPS: Fix an FP-related misnomer 1 Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 21/44] disas: nanoMIPS: Fix an FP-related misnomer 2 Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 22/44] disas: nanoMIPS: Fix an FP-related misnomer 3 Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 23/44] disas: nanoMIPS: Name more functions in a more descriptive way Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 24/44] disas: nanoMIPS: Fix order of more invocations Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 25/44] disas: nanoMIPS: Rename the decoder of 'gpr3' gpr encoding type Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 26/44] disas: nanoMIPS: Comment " Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 27/44] disas: nanoMIPS: Rename the decoder of 'gpr3.src.store' " Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 28/44] disas: nanoMIPS: Comment " Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 29/44] disas: nanoMIPS: Rename the decoder of 'gpr4' " Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 30/44] disas: nanoMIPS: Comment " Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 31/44] disas: nanoMIPS: Rename the decoder of 'gpr4.zero' " Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 32/44] disas: nanoMIPS: Comment " Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 33/44] disas: nanoMIPS: Rename the decoder of 'gpr2.reg1' " Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 34/44] disas: nanoMIPS: Comment " Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 35/44] disas: nanoMIPS: Rename the decoder of 'gpr2.reg2' " Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 36/44] disas: nanoMIPS: Comment " Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 37/44] disas: nanoMIPS: Rename the decoder of 'gpr1' " Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 38/44] disas: nanoMIPS: Comment " Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 39/44] disas: nanoMIPS: Reorder declarations and definitions of gpr decoders Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 40/44] disas: nanoMIPS: Add a note on documentation Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 41/44] tests/tcg: mips: Test R5900 three-operand MADD Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 42/44] tests/tcg: mips: Test R5900 three-operand MADD1 Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 43/44] tests/tcg: mips: Test R5900 three-operand MADDU Aleksandar Markovic
2018-12-31 14:56 ` [Qemu-devel] [PULL v2 44/44] tests/tcg: mips: Test R5900 three-operand MADDU1 Aleksandar Markovic
2019-01-03 13:23 ` [Qemu-devel] [PULL v2 00/44] MIPS pull request for December 2018 - v2 Peter Maydell
2019-01-03 13:32 ` Philippe Mathieu-Daudé
2019-01-03 14:06 ` Thomas Huth
2019-01-03 22:29 ` Richard Henderson
2019-01-09 10:47 ` Daniel P. Berrangé
2019-01-03 13:54 ` Aleksandar Markovic
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.