* [PATCH v2 0/6] drm/i915: GTT remapping for display
@ 2019-01-11 19:46 Ville Syrjala
2019-01-11 19:46 ` [PATCH v2 1/6] drm/i915: Add a new "remapped" gtt_view Ville Syrjala
` (9 more replies)
0 siblings, 10 replies; 17+ messages in thread
From: Ville Syrjala @ 2019-01-11 19:46 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Another year, another gtt remapping series.
Main changes:
- Actually trim the sg a bit
- Drop the earlier aligned viewport tricks since
they were there for ccs which we can't remap anyway
- Maybe something else I forgot already
Series available here:
git://github.com/vsyrjala/linux.git fb_vma_remap_13
Ville Syrjälä (6):
drm/i915: Add a new "remapped" gtt_view
drm/i915/selftests: Add mock selftest for remapped vmas
drm/i915/selftests: Add live vma selftest
drm/i915: Overcome display engine stride limits via GTT remapping
drm/i915: Bump gen4+ fb stride limit to 256KiB
drm/i915: Bump gen7+ fb size limits to 16kx16k
drivers/gpu/drm/i915/i915_debugfs.c | 12 +
drivers/gpu/drm/i915/i915_drv.h | 4 +
drivers/gpu/drm/i915/i915_gem.c | 17 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 88 ++++
drivers/gpu/drm/i915/i915_gem_gtt.h | 25 +-
drivers/gpu/drm/i915/i915_vma.c | 10 +-
drivers/gpu/drm/i915/i915_vma.h | 3 +
drivers/gpu/drm/i915/intel_display.c | 378 ++++++++++++++----
drivers/gpu/drm/i915/intel_drv.h | 1 +
.../drm/i915/selftests/i915_live_selftests.h | 1 +
drivers/gpu/drm/i915/selftests/i915_vma.c | 251 +++++++++++-
11 files changed, 682 insertions(+), 108 deletions(-)
--
2.19.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v2 1/6] drm/i915: Add a new "remapped" gtt_view
2019-01-11 19:46 [PATCH v2 0/6] drm/i915: GTT remapping for display Ville Syrjala
@ 2019-01-11 19:46 ` Ville Syrjala
2019-01-14 9:55 ` Tvrtko Ursulin
2019-01-11 19:47 ` [PATCH v2 2/6] drm/i915/selftests: Add mock selftest for remapped vmas Ville Syrjala
` (8 subsequent siblings)
9 siblings, 1 reply; 17+ messages in thread
From: Ville Syrjala @ 2019-01-11 19:46 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
To overcome display engine stride limits we'll want to remap the
pages in the GTT. To that end we need a new gtt_view type which
is just like the "rotated" type except not rotated.
v2: Use intel_remapped_plane_info base type
s/unused/unused_mbz/ (Chris)
Separate BUILD_BUG_ON()s (Chris)
Use I915_GTT_PAGE_SIZE (Chris)
v3: Use i915_gem_object_get_dma_address() (Chris)
Trim the sg (Tvrtko)
v4: Actually trim this time. Limit the max length
to one row of pages to keep things simple
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 12 ++++
drivers/gpu/drm/i915/i915_drv.h | 4 ++
drivers/gpu/drm/i915/i915_gem.c | 17 ++++-
drivers/gpu/drm/i915/i915_gem_gtt.c | 88 +++++++++++++++++++++++
drivers/gpu/drm/i915/i915_gem_gtt.h | 25 +++++--
drivers/gpu/drm/i915/i915_vma.c | 6 +-
drivers/gpu/drm/i915/i915_vma.h | 3 +
drivers/gpu/drm/i915/intel_display.c | 11 +++
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/selftests/i915_vma.c | 6 +-
10 files changed, 163 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index d460ef522d9c..cab7771799ad 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -196,6 +196,18 @@ describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
vma->ggtt_view.rotated.plane[1].offset);
break;
+ case I915_GGTT_VIEW_REMAPPED:
+ seq_printf(m, ", remapped [(%ux%u, stride=%u, offset=%u), (%ux%u, stride=%u, offset=%u)]",
+ vma->ggtt_view.remapped.plane[0].width,
+ vma->ggtt_view.remapped.plane[0].height,
+ vma->ggtt_view.remapped.plane[0].stride,
+ vma->ggtt_view.remapped.plane[0].offset,
+ vma->ggtt_view.remapped.plane[1].width,
+ vma->ggtt_view.remapped.plane[1].height,
+ vma->ggtt_view.remapped.plane[1].stride,
+ vma->ggtt_view.remapped.plane[1].offset);
+ break;
+
default:
MISSING_CASE(vma->ggtt_view.type);
break;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 5df26ccda8a4..cef76cf343c4 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2845,6 +2845,10 @@ i915_gem_object_get_dirty_page(struct drm_i915_gem_object *obj,
unsigned int n);
dma_addr_t
+i915_gem_object_get_dma_address_len(struct drm_i915_gem_object *obj,
+ unsigned long n,
+ unsigned int *len);
+dma_addr_t
i915_gem_object_get_dma_address(struct drm_i915_gem_object *obj,
unsigned long n);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index ea85da393662..f65d81f4f3d7 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -6041,16 +6041,29 @@ i915_gem_object_get_dirty_page(struct drm_i915_gem_object *obj,
}
dma_addr_t
-i915_gem_object_get_dma_address(struct drm_i915_gem_object *obj,
- unsigned long n)
+i915_gem_object_get_dma_address_len(struct drm_i915_gem_object *obj,
+ unsigned long n,
+ unsigned int *len)
{
struct scatterlist *sg;
unsigned int offset;
sg = i915_gem_object_get_sg(obj, n, &offset);
+
+ if (len)
+ *len = sg_dma_len(sg) - (offset << PAGE_SHIFT);
+
return sg_dma_address(sg) + (offset << PAGE_SHIFT);
}
+dma_addr_t
+i915_gem_object_get_dma_address(struct drm_i915_gem_object *obj,
+ unsigned long n)
+{
+ return i915_gem_object_get_dma_address_len(obj, n, NULL);
+}
+
+
int i915_gem_object_attach_phys(struct drm_i915_gem_object *obj, int align)
{
struct sg_table *pages;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index a8807fbed0aa..be5dbbb1b6ff 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -3605,6 +3605,89 @@ intel_rotate_pages(struct intel_rotation_info *rot_info,
return ERR_PTR(ret);
}
+static struct scatterlist *
+remap_pages(struct drm_i915_gem_object *obj, unsigned int offset,
+ unsigned int width, unsigned int height,
+ unsigned int stride,
+ struct sg_table *st, struct scatterlist *sg)
+{
+ unsigned int row;
+
+ for (row = 0; row < height; row++) {
+ unsigned int left = width * I915_GTT_PAGE_SIZE;
+
+ while (left) {
+ dma_addr_t addr;
+ unsigned int length;
+
+ /* We don't need the pages, but need to initialize
+ * the entries so the sg list can be happily traversed.
+ * The only thing we need are DMA addresses.
+ */
+
+ addr = i915_gem_object_get_dma_address_len(obj, offset, &length);
+
+ length = min(left, length);
+
+ st->nents++;
+
+ sg_set_page(sg, NULL, length, 0);
+ sg_dma_address(sg) = addr;
+ sg_dma_len(sg) = length;
+ sg = sg_next(sg);
+
+ offset += length / I915_GTT_PAGE_SIZE;
+ left -= length;
+ }
+
+ offset += stride - width;
+ }
+
+ return sg;
+}
+
+static noinline struct sg_table *
+intel_remap_pages(struct intel_remapped_info *rem_info,
+ struct drm_i915_gem_object *obj)
+{
+ unsigned int size = intel_remapped_info_size(rem_info);
+ struct sg_table *st;
+ struct scatterlist *sg;
+ int ret = -ENOMEM;
+ int i;
+
+ /* Allocate target SG list. */
+ st = kmalloc(sizeof(*st), GFP_KERNEL);
+ if (!st)
+ goto err_st_alloc;
+
+ ret = sg_alloc_table(st, size, GFP_KERNEL);
+ if (ret)
+ goto err_sg_alloc;
+
+ st->nents = 0;
+ sg = st->sgl;
+
+ for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++) {
+ sg = remap_pages(obj, rem_info->plane[i].offset,
+ rem_info->plane[i].width, rem_info->plane[i].height,
+ rem_info->plane[i].stride, st, sg);
+ }
+
+ i915_sg_trim(st);
+
+ return st;
+
+err_sg_alloc:
+ kfree(st);
+err_st_alloc:
+
+ DRM_DEBUG_DRIVER("Failed to create remapped mapping for object size %zu! (%ux%u tiles, %u pages)\n",
+ obj->base.size, rem_info->plane[0].width, rem_info->plane[0].height, size);
+
+ return ERR_PTR(ret);
+}
+
static noinline struct sg_table *
intel_partial_pages(const struct i915_ggtt_view *view,
struct drm_i915_gem_object *obj)
@@ -3683,6 +3766,11 @@ i915_get_ggtt_vma_pages(struct i915_vma *vma)
intel_rotate_pages(&vma->ggtt_view.rotated, vma->obj);
break;
+ case I915_GGTT_VIEW_REMAPPED:
+ vma->pages =
+ intel_remap_pages(&vma->ggtt_view.remapped, vma->obj);
+ break;
+
case I915_GGTT_VIEW_PARTIAL:
vma->pages = intel_partial_pages(&vma->ggtt_view, vma->obj);
break;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index e2360f16427a..8f26b4292084 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -162,11 +162,18 @@ typedef u64 gen8_ppgtt_pml4e_t;
struct sg_table;
+struct intel_remapped_plane_info {
+ /* in gtt pages */
+ unsigned int width, height, stride, offset;
+} __packed;
+
+struct intel_remapped_info {
+ struct intel_remapped_plane_info plane[2];
+ unsigned int unused_mbz;
+} __packed;
+
struct intel_rotation_info {
- struct intel_rotation_plane_info {
- /* tiles */
- unsigned int width, height, stride, offset;
- } plane[2];
+ struct intel_remapped_plane_info plane[2];
} __packed;
struct intel_partial_info {
@@ -178,12 +185,20 @@ enum i915_ggtt_view_type {
I915_GGTT_VIEW_NORMAL = 0,
I915_GGTT_VIEW_ROTATED = sizeof(struct intel_rotation_info),
I915_GGTT_VIEW_PARTIAL = sizeof(struct intel_partial_info),
+ I915_GGTT_VIEW_REMAPPED = sizeof(struct intel_remapped_info),
};
static inline void assert_i915_gem_gtt_types(void)
{
BUILD_BUG_ON(sizeof(struct intel_rotation_info) != 8*sizeof(unsigned int));
BUILD_BUG_ON(sizeof(struct intel_partial_info) != sizeof(u64) + sizeof(unsigned int));
+ BUILD_BUG_ON(sizeof(struct intel_remapped_info) != 9*sizeof(unsigned int));
+
+ /* Check that rotation/remapped shares offsets for simplicity */
+ BUILD_BUG_ON(offsetof(struct intel_remapped_info, plane[0]) !=
+ offsetof(struct intel_rotation_info, plane[0]));
+ BUILD_BUG_ON(offsetofend(struct intel_remapped_info, plane[1]) !=
+ offsetofend(struct intel_rotation_info, plane[1]));
/* As we encode the size of each branch inside the union into its type,
* we have to be careful that each branch has a unique size.
@@ -192,6 +207,7 @@ static inline void assert_i915_gem_gtt_types(void)
case I915_GGTT_VIEW_NORMAL:
case I915_GGTT_VIEW_PARTIAL:
case I915_GGTT_VIEW_ROTATED:
+ case I915_GGTT_VIEW_REMAPPED:
/* gcc complains if these are identical cases */
break;
}
@@ -203,6 +219,7 @@ struct i915_ggtt_view {
/* Members need to contain no holes/padding */
struct intel_partial_info partial;
struct intel_rotation_info rotated;
+ struct intel_remapped_info remapped;
};
};
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 5b4d78cdb4ca..9a039c36dc0c 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -164,6 +164,9 @@ vma_create(struct drm_i915_gem_object *obj,
} else if (view->type == I915_GGTT_VIEW_ROTATED) {
vma->size = intel_rotation_info_size(&view->rotated);
vma->size <<= PAGE_SHIFT;
+ } else if (view->type == I915_GGTT_VIEW_REMAPPED) {
+ vma->size = intel_remapped_info_size(&view->remapped);
+ vma->size <<= PAGE_SHIFT;
}
}
@@ -464,7 +467,8 @@ void __i915_vma_set_map_and_fenceable(struct i915_vma *vma)
* Explicitly disable for rotated VMA since the display does not
* need the fence and the VMA is not accessible to other users.
*/
- if (vma->ggtt_view.type == I915_GGTT_VIEW_ROTATED)
+ if (vma->ggtt_view.type == I915_GGTT_VIEW_ROTATED ||
+ vma->ggtt_view.type == I915_GGTT_VIEW_REMAPPED)
return;
fenceable = (vma->node.size >= vma->fence_size &&
diff --git a/drivers/gpu/drm/i915/i915_vma.h b/drivers/gpu/drm/i915/i915_vma.h
index 4f7c1c7599f4..64cf029c028a 100644
--- a/drivers/gpu/drm/i915/i915_vma.h
+++ b/drivers/gpu/drm/i915/i915_vma.h
@@ -265,8 +265,11 @@ i915_vma_compare(struct i915_vma *vma,
*/
BUILD_BUG_ON(I915_GGTT_VIEW_NORMAL >= I915_GGTT_VIEW_PARTIAL);
BUILD_BUG_ON(I915_GGTT_VIEW_PARTIAL >= I915_GGTT_VIEW_ROTATED);
+ BUILD_BUG_ON(I915_GGTT_VIEW_ROTATED >= I915_GGTT_VIEW_REMAPPED);
BUILD_BUG_ON(offsetof(typeof(*view), rotated) !=
offsetof(typeof(*view), partial));
+ BUILD_BUG_ON(offsetof(typeof(*view), rotated) !=
+ offsetof(typeof(*view), remapped));
return memcmp(&vma->ggtt_view.partial, &view->partial, view->type);
}
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5dc0de89c49e..c17a1723a589 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1942,6 +1942,17 @@ unsigned int intel_rotation_info_size(const struct intel_rotation_info *rot_info
return size;
}
+unsigned int intel_remapped_info_size(const struct intel_remapped_info *rem_info)
+{
+ unsigned int size = 0;
+ int i;
+
+ for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++)
+ size += rem_info->plane[i].width * rem_info->plane[i].height;
+
+ return size;
+}
+
static void
intel_fill_fb_ggtt_view(struct i915_ggtt_view *view,
const struct drm_framebuffer *fb,
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 3b051fdd0fce..7b9b76d5895e 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1601,6 +1601,7 @@ unsigned int intel_fb_xy_to_linear(int x, int y,
void intel_add_fb_offsets(int *x, int *y,
const struct intel_plane_state *state, int plane);
unsigned int intel_rotation_info_size(const struct intel_rotation_info *rot_info);
+unsigned int intel_remapped_info_size(const struct intel_remapped_info *rem_info);
bool intel_has_pending_fb_unpin(struct drm_i915_private *dev_priv);
void intel_mark_busy(struct drm_i915_private *dev_priv);
void intel_mark_idle(struct drm_i915_private *dev_priv);
diff --git a/drivers/gpu/drm/i915/selftests/i915_vma.c b/drivers/gpu/drm/i915/selftests/i915_vma.c
index ffa74290e054..4fc49c27f13c 100644
--- a/drivers/gpu/drm/i915/selftests/i915_vma.c
+++ b/drivers/gpu/drm/i915/selftests/i915_vma.c
@@ -395,8 +395,8 @@ assert_rotated(struct drm_i915_gem_object *obj,
return sg;
}
-static unsigned int rotated_size(const struct intel_rotation_plane_info *a,
- const struct intel_rotation_plane_info *b)
+static unsigned int rotated_size(const struct intel_remapped_plane_info *a,
+ const struct intel_remapped_plane_info *b)
{
return a->width * a->height + b->width * b->height;
}
@@ -406,7 +406,7 @@ static int igt_vma_rotate(void *arg)
struct drm_i915_private *i915 = arg;
struct i915_address_space *vm = &i915->ggtt.vm;
struct drm_i915_gem_object *obj;
- const struct intel_rotation_plane_info planes[] = {
+ const struct intel_remapped_plane_info planes[] = {
{ .width = 1, .height = 1, .stride = 1 },
{ .width = 2, .height = 2, .stride = 2 },
{ .width = 4, .height = 4, .stride = 4 },
--
2.19.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH v2 2/6] drm/i915/selftests: Add mock selftest for remapped vmas
2019-01-11 19:46 [PATCH v2 0/6] drm/i915: GTT remapping for display Ville Syrjala
2019-01-11 19:46 ` [PATCH v2 1/6] drm/i915: Add a new "remapped" gtt_view Ville Syrjala
@ 2019-01-11 19:47 ` Ville Syrjala
2019-01-11 19:47 ` [PATCH v2 3/6] drm/i915/selftests: Add live vma selftest Ville Syrjala
` (7 subsequent siblings)
9 siblings, 0 replies; 17+ messages in thread
From: Ville Syrjala @ 2019-01-11 19:47 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Extend the rotated vma mock selftest to cover remapped vmas as
well.
TODO: reindent the loops I guess? Left like this for now to
ease review
v2: Include the vma type in the error message (Chris)
v3: Deal with trimmed sg
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/selftests/i915_vma.c | 105 ++++++++++++++++++++--
1 file changed, 97 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/selftests/i915_vma.c b/drivers/gpu/drm/i915/selftests/i915_vma.c
index 4fc49c27f13c..063143fa51bf 100644
--- a/drivers/gpu/drm/i915/selftests/i915_vma.c
+++ b/drivers/gpu/drm/i915/selftests/i915_vma.c
@@ -58,7 +58,7 @@ static bool assert_vma(struct i915_vma *vma,
static struct i915_vma *
checked_vma_instance(struct drm_i915_gem_object *obj,
struct i915_address_space *vm,
- struct i915_ggtt_view *view)
+ const struct i915_ggtt_view *view)
{
struct i915_vma *vma;
bool ok = true;
@@ -395,13 +395,81 @@ assert_rotated(struct drm_i915_gem_object *obj,
return sg;
}
+static unsigned long remapped_index(const struct intel_remapped_info *r,
+ unsigned int n,
+ unsigned int x,
+ unsigned int y)
+{
+ return (r->plane[n].stride * y +
+ r->plane[n].offset + x);
+}
+
+static struct scatterlist *
+assert_remapped(struct drm_i915_gem_object *obj,
+ const struct intel_remapped_info *r, unsigned int n,
+ struct scatterlist *sg)
+{
+ unsigned int x, y;
+ unsigned int left = 0;
+ unsigned int offset;
+
+ for (y = 0; y < r->plane[n].height; y++) {
+ for (x = 0; x < r->plane[n].width; x++) {
+ unsigned long src_idx;
+ dma_addr_t src;
+
+ if (!sg) {
+ pr_err("Invalid sg table: too short at plane %d, (%d, %d)!\n",
+ n, x, y);
+ return ERR_PTR(-EINVAL);
+ }
+ if (!left) {
+ offset = 0;
+ left = sg_dma_len(sg);
+ }
+
+ DRM_DEBUG_KMS("sg %p start left %d\n", sg, left);
+
+ src_idx = remapped_index(r, n, x, y);
+ src = i915_gem_object_get_dma_address(obj, src_idx);
+
+ DRM_DEBUG_KMS("sg %p %d %d %d %llx\n", sg, n, x, y, src);
+
+ if (left < PAGE_SIZE || left & (PAGE_SIZE-1)) {
+ pr_err("Invalid sg.length, found %d, expected %lu for remapped page (%d, %d) [src index %lu]\n",
+ sg_dma_len(sg), PAGE_SIZE,
+ x, y, src_idx);
+ return ERR_PTR(-EINVAL);
+ }
+
+ DRM_DEBUG_KMS("sg %p dma %llx off = %d\n", sg, sg_dma_address(sg), offset);
+
+ if (sg_dma_address(sg) + offset != src) {
+ pr_err("Invalid address for remapped page (%d, %d) [src index %lu]\n",
+ x, y, src_idx);
+ return ERR_PTR(-EINVAL);
+ }
+ DRM_DEBUG_KMS("sg %p end left %d\n", sg, left);
+
+ left -= PAGE_SIZE;
+ offset += PAGE_SIZE;
+
+
+ if (!left)
+ sg = sg_next(sg);
+ }
+ }
+
+ return sg;
+}
+
static unsigned int rotated_size(const struct intel_remapped_plane_info *a,
const struct intel_remapped_plane_info *b)
{
return a->width * a->height + b->width * b->height;
}
-static int igt_vma_rotate(void *arg)
+static int igt_vma_rotate_remap(void *arg)
{
struct drm_i915_private *i915 = arg;
struct i915_address_space *vm = &i915->ggtt.vm;
@@ -424,6 +492,11 @@ static int igt_vma_rotate(void *arg)
{ .width = 6, .height = 4, .stride = 6 },
{ }
}, *a, *b;
+ enum i915_ggtt_view_type types[] = {
+ I915_GGTT_VIEW_ROTATED,
+ I915_GGTT_VIEW_REMAPPED,
+ 0,
+ }, *t;
const unsigned int max_pages = 64;
int err = -ENOMEM;
@@ -435,6 +508,7 @@ static int igt_vma_rotate(void *arg)
if (IS_ERR(obj))
goto out;
+ for (t = types; *t; t++) {
for (a = planes; a->width; a++) {
for (b = planes + ARRAY_SIZE(planes); b-- != planes; ) {
struct i915_ggtt_view view;
@@ -445,7 +519,7 @@ static int igt_vma_rotate(void *arg)
GEM_BUG_ON(max_offset > max_pages);
max_offset = max_pages - max_offset;
- view.type = I915_GGTT_VIEW_ROTATED;
+ view.type = *t;
view.rotated.plane[0] = *a;
view.rotated.plane[1] = *b;
@@ -466,14 +540,23 @@ static int igt_vma_rotate(void *arg)
goto out_object;
}
- if (vma->size != rotated_size(a, b) * PAGE_SIZE) {
+ if (view.type == I915_GGTT_VIEW_ROTATED &&
+ vma->size != rotated_size(a, b) * PAGE_SIZE) {
pr_err("VMA is wrong size, expected %lu, found %llu\n",
PAGE_SIZE * rotated_size(a, b), vma->size);
err = -EINVAL;
goto out_object;
}
- if (vma->pages->nents != rotated_size(a, b)) {
+ if (view.type == I915_GGTT_VIEW_REMAPPED &&
+ vma->size > rotated_size(a, b) * PAGE_SIZE) {
+ pr_err("VMA is wrong size, expected %lu, found %llu\n",
+ PAGE_SIZE * rotated_size(a, b), vma->size);
+ err = -EINVAL;
+ goto out_object;
+ }
+
+ if (vma->pages->nents > rotated_size(a, b)) {
pr_err("sg table is wrong sizeo, expected %u, found %u nents\n",
rotated_size(a, b), vma->pages->nents);
err = -EINVAL;
@@ -495,9 +578,14 @@ static int igt_vma_rotate(void *arg)
sg = vma->pages->sgl;
for (n = 0; n < ARRAY_SIZE(view.rotated.plane); n++) {
- sg = assert_rotated(obj, &view.rotated, n, sg);
+ if (view.type == I915_GGTT_VIEW_ROTATED)
+ sg = assert_rotated(obj, &view.rotated, n, sg);
+ else
+ sg = assert_remapped(obj, &view.remapped, n, sg);
if (IS_ERR(sg)) {
- pr_err("Inconsistent VMA pages for plane %d: [(%d, %d, %d, %d), (%d, %d, %d, %d)]\n", n,
+ pr_err("Inconsistent %s VMA pages for plane %d: [(%d, %d, %d, %d), (%d, %d, %d, %d)]\n",
+ view.type == I915_GGTT_VIEW_ROTATED ?
+ "rotated" : "remapped", n,
view.rotated.plane[0].width,
view.rotated.plane[0].height,
view.rotated.plane[0].stride,
@@ -516,6 +604,7 @@ static int igt_vma_rotate(void *arg)
}
}
}
+ }
out_object:
i915_gem_object_put(obj);
@@ -719,7 +808,7 @@ int i915_vma_mock_selftests(void)
static const struct i915_subtest tests[] = {
SUBTEST(igt_vma_create),
SUBTEST(igt_vma_pin1),
- SUBTEST(igt_vma_rotate),
+ SUBTEST(igt_vma_rotate_remap),
SUBTEST(igt_vma_partial),
};
struct drm_i915_private *i915;
--
2.19.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH v2 3/6] drm/i915/selftests: Add live vma selftest
2019-01-11 19:46 [PATCH v2 0/6] drm/i915: GTT remapping for display Ville Syrjala
2019-01-11 19:46 ` [PATCH v2 1/6] drm/i915: Add a new "remapped" gtt_view Ville Syrjala
2019-01-11 19:47 ` [PATCH v2 2/6] drm/i915/selftests: Add mock selftest for remapped vmas Ville Syrjala
@ 2019-01-11 19:47 ` Ville Syrjala
2019-01-11 19:47 ` [PATCH v2 4/6] drm/i915: Overcome display engine stride limits via GTT remapping Ville Syrjala
` (6 subsequent siblings)
9 siblings, 0 replies; 17+ messages in thread
From: Ville Syrjala @ 2019-01-11 19:47 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Add a live selftest to excercise rotated/remapped vmas. We simply
write through the rotated/remapped vma, and confirm that the data
appears in the right page when read through the normal vma.
Not sure what the fallout of making all rotated/remapped vmas
mappable/fenceable would be, hence I just hacked it in the test.
v2: Grab rpm reference (Chris)
GEM_BUG_ON(view.type not as expected) (Chris)
Allow CAN_FENCE for rotated/remapped vmas (Chris)
Update intel_plane_uses_fence() to ask for a fence
only for normal vmas on gen4+
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_vma.c | 8 -
drivers/gpu/drm/i915/intel_display.c | 4 +-
.../drm/i915/selftests/i915_live_selftests.h | 1 +
drivers/gpu/drm/i915/selftests/i915_vma.c | 140 ++++++++++++++++++
4 files changed, 144 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 9a039c36dc0c..865290751633 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -463,14 +463,6 @@ void __i915_vma_set_map_and_fenceable(struct i915_vma *vma)
GEM_BUG_ON(!i915_vma_is_ggtt(vma));
GEM_BUG_ON(!vma->fence_size);
- /*
- * Explicitly disable for rotated VMA since the display does not
- * need the fence and the VMA is not accessible to other users.
- */
- if (vma->ggtt_view.type == I915_GGTT_VIEW_ROTATED ||
- vma->ggtt_view.type == I915_GGTT_VIEW_REMAPPED)
- return;
-
fenceable = (vma->node.size >= vma->fence_size &&
IS_ALIGNED(vma->node.start, vma->fence_alignment));
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c17a1723a589..db487d52c5ee 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2022,7 +2022,9 @@ static bool intel_plane_uses_fence(const struct intel_plane_state *plane_state)
struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
- return INTEL_GEN(dev_priv) < 4 || plane->has_fbc;
+ return INTEL_GEN(dev_priv) < 4 ||
+ (plane->has_fbc &&
+ plane_state->view.type == I915_GGTT_VIEW_NORMAL);
}
struct i915_vma *
diff --git a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
index a15713cae3b3..095e25e92a36 100644
--- a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
+++ b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
@@ -15,6 +15,7 @@ selftest(workarounds, intel_workarounds_live_selftests)
selftest(requests, i915_request_live_selftests)
selftest(objects, i915_gem_object_live_selftests)
selftest(dmabuf, i915_gem_dmabuf_live_selftests)
+selftest(vma, i915_vma_live_selftests)
selftest(coherency, i915_gem_coherency_live_selftests)
selftest(gtt, i915_gem_gtt_live_selftests)
selftest(gem, i915_gem_live_selftests)
diff --git a/drivers/gpu/drm/i915/selftests/i915_vma.c b/drivers/gpu/drm/i915/selftests/i915_vma.c
index 063143fa51bf..9fff70179add 100644
--- a/drivers/gpu/drm/i915/selftests/i915_vma.c
+++ b/drivers/gpu/drm/i915/selftests/i915_vma.c
@@ -826,3 +826,143 @@ int i915_vma_mock_selftests(void)
return err;
}
+static int igt_vma_remapped_gtt(void *arg)
+{
+ struct drm_i915_private *i915 = arg;
+ const struct intel_remapped_plane_info planes[] = {
+ { .width = 1, .height = 1, .stride = 1 },
+ { .width = 2, .height = 2, .stride = 2 },
+ { .width = 4, .height = 4, .stride = 4 },
+ { .width = 8, .height = 8, .stride = 8 },
+
+ { .width = 3, .height = 5, .stride = 3 },
+ { .width = 3, .height = 5, .stride = 4 },
+ { .width = 3, .height = 5, .stride = 5 },
+
+ { .width = 5, .height = 3, .stride = 5 },
+ { .width = 5, .height = 3, .stride = 7 },
+ { .width = 5, .height = 3, .stride = 9 },
+
+ { .width = 4, .height = 6, .stride = 6 },
+ { .width = 6, .height = 4, .stride = 6 },
+ { }
+ }, *p;
+ enum i915_ggtt_view_type types[] = {
+ I915_GGTT_VIEW_ROTATED,
+ I915_GGTT_VIEW_REMAPPED,
+ 0,
+ }, *t;
+ struct drm_i915_gem_object *obj;
+ int err = 0;
+
+ obj = i915_gem_object_create_internal(i915, 10 * 10 * PAGE_SIZE);
+ if (IS_ERR(obj))
+ return PTR_ERR(obj);
+
+ mutex_lock(&i915->drm.struct_mutex);
+
+ intel_runtime_pm_get(i915);
+
+ for (t = types; *t; t++) {
+ for (p = planes; p->width; p++) {
+ struct i915_ggtt_view view = {
+ .type = *t,
+ .rotated.plane[0] = *p,
+ };
+ struct i915_vma *vma;
+ u32 __iomem *map;
+ unsigned int x, y;
+ int err;
+
+ err = i915_gem_object_set_to_gtt_domain(obj, true);
+ if (err)
+ goto out;
+
+ vma = i915_gem_object_ggtt_pin(obj, &view, 0, 0, PIN_MAPPABLE);
+ if (IS_ERR(vma)) {
+ err = PTR_ERR(vma);
+ goto out;
+ }
+
+ GEM_BUG_ON(vma->ggtt_view.type != *t);
+
+ map = i915_vma_pin_iomap(vma);
+ i915_vma_unpin(vma);
+ if (IS_ERR(map)) {
+ err = PTR_ERR(map);
+ goto out;
+ }
+
+ for (y = 0 ; y < p->height; y++) {
+ for (x = 0 ; x < p->width; x++) {
+ unsigned int offset;
+ u32 val = y << 16 | x;
+
+ if (*t == I915_GGTT_VIEW_ROTATED)
+ offset = (x * p->height + y) * PAGE_SIZE;
+ else
+ offset = (y * p->width + x) * PAGE_SIZE;
+
+ iowrite32(val, &map[offset / sizeof(*map)]);
+ }
+ }
+
+ i915_vma_unpin_iomap(vma);
+
+ vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, PIN_MAPPABLE);
+ if (IS_ERR(vma)) {
+ err = PTR_ERR(vma);
+ goto out;
+ }
+
+ GEM_BUG_ON(vma->ggtt_view.type != I915_GGTT_VIEW_NORMAL);
+
+ map = i915_vma_pin_iomap(vma);
+ i915_vma_unpin(vma);
+ if (IS_ERR(map)) {
+ err = PTR_ERR(map);
+ goto out;
+ }
+
+ for (y = 0 ; y < p->height; y++) {
+ for (x = 0 ; x < p->width; x++) {
+ unsigned int offset, src_idx;
+ u32 exp = y << 16 | x;
+ u32 val;
+
+ if (*t == I915_GGTT_VIEW_ROTATED)
+ src_idx = rotated_index(&view.rotated, 0, x, y);
+ else
+ src_idx = remapped_index(&view.remapped, 0, x, y);
+ offset = src_idx * PAGE_SIZE;
+
+ val = ioread32(&map[offset / sizeof(*map)]);
+ if (val != exp) {
+ pr_err("%s VMA write test failed, expected 0x%x, found 0x%x\n",
+ *t == I915_GGTT_VIEW_ROTATED ? "Rotated" : "Remapped",
+ val, exp);
+ i915_vma_unpin_iomap(vma);
+ goto out;
+ }
+ }
+ }
+ i915_vma_unpin_iomap(vma);
+ }
+ }
+
+out:
+ intel_runtime_pm_put(i915);
+ mutex_unlock(&i915->drm.struct_mutex);
+ i915_gem_object_put(obj);
+
+ return err;
+}
+
+int i915_vma_live_selftests(struct drm_i915_private *i915)
+{
+ static const struct i915_subtest tests[] = {
+ SUBTEST(igt_vma_remapped_gtt),
+ };
+
+ return i915_subtests(tests, i915);
+}
--
2.19.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH v2 4/6] drm/i915: Overcome display engine stride limits via GTT remapping
2019-01-11 19:46 [PATCH v2 0/6] drm/i915: GTT remapping for display Ville Syrjala
` (2 preceding siblings ...)
2019-01-11 19:47 ` [PATCH v2 3/6] drm/i915/selftests: Add live vma selftest Ville Syrjala
@ 2019-01-11 19:47 ` Ville Syrjala
2019-01-11 19:47 ` [PATCH v2 5/6] drm/i915: Bump gen4+ fb stride limit to 256KiB Ville Syrjala
` (5 subsequent siblings)
9 siblings, 0 replies; 17+ messages in thread
From: Ville Syrjala @ 2019-01-11 19:47 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
The display engine stride limits are getting in our way. On SKL+
we are limited to 8k pixels, which is easily exceeded with three
4k displays. To overcome this limitation we can remap the pages
in the GTT to provide the display engine with a view of memory
with a smaller stride.
The code is mostly already there as We already play tricks with
the plane surface address and x/y offsets.
A few caveats apply:
* linear buffers need the fb stride to be page aligned, as
otherwise the remapped lines wouldn't start at the same
spot
* compressed buffers can't be remapped due to the new
ccs hash mode causing the virtual address of the pages
to affect the interpretation of the compressed data. IIRC
the old hash was limited to the low 12 bits so if we were
using that mode we could remap. As it stands we just refuse
to remapp with compressed fbs.
* no remapping gen2/3 as we'd need a fence for the remapped
vma, which we currently don't have. Need to deal with the
fence POT requirements, and do something about the gen2
gtt page size vs tile size difference
v2: Rebase due to is_ccs_modifier()
Fix up the skl+ stride_mult mess
memset() the gtt_view because otherwise we could leave
junk in plane[1] when going from 2 plane to 1 plane format
v3: intel_check_plane_stride() was split out
v4: Drop the aligned viewport stuff, it was meant for ccs which
can't be remapped anyway
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 332 ++++++++++++++++++++-------
1 file changed, 255 insertions(+), 77 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index db487d52c5ee..120eb6bd856d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1860,7 +1860,7 @@ intel_tile_width_bytes(const struct drm_framebuffer *fb, int color_plane)
switch (fb->modifier) {
case DRM_FORMAT_MOD_LINEAR:
- return cpp;
+ return intel_tile_size(dev_priv);
case I915_FORMAT_MOD_X_TILED:
if (IS_GEN(dev_priv, 2))
return 128;
@@ -1903,11 +1903,8 @@ intel_tile_width_bytes(const struct drm_framebuffer *fb, int color_plane)
static unsigned int
intel_tile_height(const struct drm_framebuffer *fb, int color_plane)
{
- if (fb->modifier == DRM_FORMAT_MOD_LINEAR)
- return 1;
- else
- return intel_tile_size(to_i915(fb->dev)) /
- intel_tile_width_bytes(fb, color_plane);
+ return intel_tile_size(to_i915(fb->dev)) /
+ intel_tile_width_bytes(fb, color_plane);
}
/* Return the tile dimensions in pixel units */
@@ -2164,16 +2161,8 @@ void intel_add_fb_offsets(int *x, int *y,
int color_plane)
{
- const struct intel_framebuffer *intel_fb = to_intel_framebuffer(state->base.fb);
- unsigned int rotation = state->base.rotation;
-
- if (drm_rotation_90_or_270(rotation)) {
- *x += intel_fb->rotated[color_plane].x;
- *y += intel_fb->rotated[color_plane].y;
- } else {
- *x += intel_fb->normal[color_plane].x;
- *y += intel_fb->normal[color_plane].y;
- }
+ *x += state->color_plane[color_plane].x;
+ *y += state->color_plane[color_plane].y;
}
static u32 intel_adjust_tile_offset(int *x, int *y,
@@ -2453,6 +2442,82 @@ bool is_ccs_modifier(u64 modifier)
modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
}
+static
+u32 intel_plane_fb_max_stride(struct drm_i915_private *dev_priv,
+ u32 pixel_format, u64 modifier)
+{
+ struct intel_crtc *crtc;
+ struct intel_plane *plane;
+
+ /*
+ * We assume the primary plane for pipe A has
+ * the highest stride limits of them all.
+ */
+ crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_A);
+ plane = to_intel_plane(crtc->base.primary);
+
+ return plane->max_stride(plane, pixel_format, modifier,
+ DRM_MODE_ROTATE_0);
+}
+
+static
+u32 intel_fb_max_stride(struct drm_i915_private *dev_priv,
+ u32 pixel_format, u64 modifier)
+{
+ return intel_plane_fb_max_stride(dev_priv, pixel_format, modifier);
+}
+
+static u32
+intel_fb_stride_alignment(const struct drm_framebuffer *fb, int color_plane)
+{
+ struct drm_i915_private *dev_priv = to_i915(fb->dev);
+
+ if (fb->modifier == DRM_FORMAT_MOD_LINEAR) {
+ u32 max_stride = intel_plane_fb_max_stride(dev_priv,
+ fb->format->format,
+ fb->modifier);
+
+ /*
+ * To make remapping with linear generally feasible
+ * we need the stride to be page aligned.
+ */
+ if (fb->pitches[color_plane] > max_stride)
+ return intel_tile_size(dev_priv);
+ else
+ return 64;
+ } else {
+ return intel_tile_width_bytes(fb, color_plane);
+ }
+}
+
+static bool intel_plane_needs_remap(const struct intel_plane_state *plane_state)
+{
+ struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
+ struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ const struct drm_framebuffer *fb = plane_state->base.fb;
+ unsigned int rotation = plane_state->base.rotation;
+ u32 stride, max_stride;
+
+ /* We don't want to deal with remapping with cursors */
+ if (plane->id == PLANE_CURSOR)
+ return false;
+
+ /* No fence for the remapped vma */
+ if (INTEL_GEN(dev_priv) < 4)
+ return false;
+
+ /* New CCS hash mode makes remapping impossible */
+ if (is_ccs_modifier(fb->modifier))
+ return false;
+
+ /* FIXME other color planes? */
+ stride = intel_fb_pitch(fb, 0, rotation);
+ max_stride = plane->max_stride(plane, fb->format->format,
+ fb->modifier, rotation);
+
+ return stride > max_stride;
+}
+
static int
intel_fill_fb_info(struct drm_i915_private *dev_priv,
struct drm_framebuffer *fb)
@@ -2618,6 +2683,167 @@ intel_fill_fb_info(struct drm_i915_private *dev_priv,
return 0;
}
+static void
+intel_plane_remap_gtt(struct intel_plane_state *plane_state)
+{
+ struct drm_i915_private *dev_priv =
+ to_i915(plane_state->base.plane->dev);
+ struct drm_framebuffer *fb = plane_state->base.fb;
+ struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
+ struct intel_rotation_info *info = &plane_state->view.rotated;
+ unsigned int rotation = plane_state->base.rotation;
+ int i, num_planes = fb->format->num_planes;
+ unsigned int tile_size = intel_tile_size(dev_priv);
+ unsigned int src_x, src_y;
+ unsigned int src_w, src_h;
+ u32 gtt_offset = 0;
+
+ memset(&plane_state->view, 0, sizeof(plane_state->view));
+ plane_state->view.type = drm_rotation_90_or_270(rotation) ?
+ I915_GGTT_VIEW_ROTATED : I915_GGTT_VIEW_REMAPPED;
+
+ src_x = plane_state->base.src.x1 >> 16;
+ src_y = plane_state->base.src.y1 >> 16;
+ src_w = drm_rect_width(&plane_state->base.src) >> 16;
+ src_h = drm_rect_height(&plane_state->base.src) >> 16;
+
+ WARN_ON(is_ccs_modifier(fb->modifier));
+
+ /* Make src coordinates relative to the viewport */
+ drm_rect_translate(&plane_state->base.src,
+ -(src_x << 16), -(src_y << 16));
+
+ /* Rotate src coordinates to match rotated GTT view */
+ if (drm_rotation_90_or_270(rotation))
+ drm_rect_rotate(&plane_state->base.src,
+ src_w << 16, src_h << 16,
+ DRM_MODE_ROTATE_270);
+
+ for (i = 0; i < num_planes; i++) {
+ unsigned int hsub = i ? fb->format->hsub : 1;
+ unsigned int vsub = i ? fb->format->vsub : 1;
+ unsigned int cpp = fb->format->cpp[i];
+ unsigned int tile_width, tile_height;
+ unsigned int width, height;
+ unsigned int pitch_tiles;
+ unsigned int x, y;
+ u32 offset;
+
+ intel_tile_dims(fb, i, &tile_width, &tile_height);
+
+ x = src_x / hsub;
+ y = src_y / vsub;
+ width = src_w / hsub;
+ height = src_h / vsub;
+
+ /*
+ * First pixel of the src viewport from the
+ * start of the normal gtt mapping.
+ */
+ x += intel_fb->normal[i].x;
+ y += intel_fb->normal[i].y;
+
+ offset = intel_compute_aligned_offset(dev_priv, &x, &y,
+ fb, i, fb->pitches[i],
+ DRM_MODE_ROTATE_0, tile_size);
+ offset /= tile_size;
+
+ info->plane[i].offset = offset;
+ info->plane[i].stride = DIV_ROUND_UP(fb->pitches[i],
+ tile_width * cpp);
+ info->plane[i].width = DIV_ROUND_UP(x + width, tile_width);
+ info->plane[i].height = DIV_ROUND_UP(y + height, tile_height);
+
+ if (drm_rotation_90_or_270(rotation)) {
+ struct drm_rect r;
+
+ /* rotate the x/y offsets to match the GTT view */
+ r.x1 = x;
+ r.y1 = y;
+ r.x2 = x + width;
+ r.y2 = y + height;
+ drm_rect_rotate(&r,
+ info->plane[i].width * tile_width,
+ info->plane[i].height * tile_height,
+ DRM_MODE_ROTATE_270);
+ x = r.x1;
+ y = r.y1;
+
+ pitch_tiles = info->plane[i].height;
+ plane_state->color_plane[i].stride = pitch_tiles * tile_height;
+
+ /* rotate the tile dimensions to match the GTT view */
+ swap(tile_width, tile_height);
+ } else {
+ pitch_tiles = info->plane[i].width;
+ plane_state->color_plane[i].stride = pitch_tiles * tile_width * cpp;
+ }
+
+ /*
+ * We only keep the x/y offsets, so push all of the
+ * gtt offset into the x/y offsets.
+ */
+ intel_adjust_tile_offset(&x, &y,
+ tile_width, tile_height,
+ tile_size, pitch_tiles,
+ gtt_offset * tile_size, 0);
+
+ gtt_offset += info->plane[i].width * info->plane[i].height;
+
+ plane_state->color_plane[i].offset = 0;
+ plane_state->color_plane[i].x = x;
+ plane_state->color_plane[i].y = y;
+ }
+}
+
+static int
+intel_plane_compute_gtt(struct intel_plane_state *plane_state)
+{
+ const struct intel_framebuffer *fb =
+ to_intel_framebuffer(plane_state->base.fb);
+ unsigned int rotation = plane_state->base.rotation;
+ int i, num_planes = fb->base.format->num_planes;
+ int ret;
+
+ if (intel_plane_needs_remap(plane_state)) {
+ intel_plane_remap_gtt(plane_state);
+
+ /* Remapping should take care of this always */
+ ret = intel_plane_check_stride(plane_state);
+ if (WARN_ON(ret))
+ return ret;
+
+ return 0;
+ }
+
+ intel_fill_fb_ggtt_view(&plane_state->view, &fb->base, rotation);
+
+ for (i = 0; i < num_planes; i++) {
+ plane_state->color_plane[i].stride = intel_fb_pitch(&fb->base, i, rotation);
+ plane_state->color_plane[i].offset = 0;
+
+ if (drm_rotation_90_or_270(rotation)) {
+ plane_state->color_plane[i].x = fb->rotated[i].x;
+ plane_state->color_plane[i].y = fb->rotated[i].y;
+ } else {
+ plane_state->color_plane[i].x = fb->normal[i].x;
+ plane_state->color_plane[i].y = fb->normal[i].y;
+ }
+ }
+
+ /* Rotate src coordinates to match rotated GTT view */
+ if (drm_rotation_90_or_270(rotation))
+ drm_rect_rotate(&plane_state->base.src,
+ fb->base.width << 16, fb->base.height << 16,
+ DRM_MODE_ROTATE_270);
+
+ ret = intel_plane_check_stride(plane_state);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
static int i9xx_format_to_fourcc(int format)
{
switch (format) {
@@ -3121,26 +3347,12 @@ static int skl_check_ccs_aux_surface(struct intel_plane_state *plane_state)
int skl_check_plane_surface(struct intel_plane_state *plane_state)
{
const struct drm_framebuffer *fb = plane_state->base.fb;
- unsigned int rotation = plane_state->base.rotation;
int ret;
- intel_fill_fb_ggtt_view(&plane_state->view, fb, rotation);
- plane_state->color_plane[0].stride = intel_fb_pitch(fb, 0, rotation);
- plane_state->color_plane[1].stride = intel_fb_pitch(fb, 1, rotation);
-
- ret = intel_plane_check_stride(plane_state);
+ ret = intel_plane_compute_gtt(plane_state);
if (ret)
return ret;
- if (!plane_state->base.visible)
- return 0;
-
- /* Rotate src coordinates to match rotated GTT view */
- if (drm_rotation_90_or_270(rotation))
- drm_rect_rotate(&plane_state->base.src,
- fb->width << 16, fb->height << 16,
- DRM_MODE_ROTATE_270);
-
/*
* Handle the AUX surface first since
* the main surface setup depends on it.
@@ -3259,20 +3471,17 @@ int i9xx_check_plane_surface(struct intel_plane_state *plane_state)
{
struct drm_i915_private *dev_priv =
to_i915(plane_state->base.plane->dev);
- const struct drm_framebuffer *fb = plane_state->base.fb;
- unsigned int rotation = plane_state->base.rotation;
- int src_x = plane_state->base.src.x1 >> 16;
- int src_y = plane_state->base.src.y1 >> 16;
+ int src_x, src_y;
u32 offset;
int ret;
- intel_fill_fb_ggtt_view(&plane_state->view, fb, rotation);
- plane_state->color_plane[0].stride = intel_fb_pitch(fb, 0, rotation);
-
- ret = intel_plane_check_stride(plane_state);
+ ret = intel_plane_compute_gtt(plane_state);
if (ret)
return ret;
+ src_x = plane_state->base.src.x1 >> 16;
+ src_y = plane_state->base.src.y1 >> 16;
+
intel_add_fb_offsets(&src_x, &src_y, plane_state, 0);
if (INTEL_GEN(dev_priv) >= 4)
@@ -3283,6 +3492,7 @@ int i9xx_check_plane_surface(struct intel_plane_state *plane_state)
/* HSW/BDW do this automagically in hardware */
if (!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)) {
+ unsigned int rotation = plane_state->base.rotation;
int src_w = drm_rect_width(&plane_state->base.src) >> 16;
int src_h = drm_rect_height(&plane_state->base.src) >> 16;
@@ -3451,15 +3661,6 @@ static bool i9xx_plane_get_hw_state(struct intel_plane *plane,
return ret;
}
-static u32
-intel_fb_stride_alignment(const struct drm_framebuffer *fb, int color_plane)
-{
- if (fb->modifier == DRM_FORMAT_MOD_LINEAR)
- return 64;
- else
- return intel_tile_width_bytes(fb, color_plane);
-}
-
static void skl_detach_scaler(struct intel_crtc *intel_crtc, int id)
{
struct drm_device *dev = intel_crtc->base.dev;
@@ -9809,16 +10010,11 @@ static bool intel_cursor_size_ok(const struct intel_plane_state *plane_state)
static int intel_cursor_check_surface(struct intel_plane_state *plane_state)
{
- const struct drm_framebuffer *fb = plane_state->base.fb;
- unsigned int rotation = plane_state->base.rotation;
int src_x, src_y;
u32 offset;
int ret;
- intel_fill_fb_ggtt_view(&plane_state->view, fb, rotation);
- plane_state->color_plane[0].stride = intel_fb_pitch(fb, 0, rotation);
-
- ret = intel_plane_check_stride(plane_state);
+ ret = intel_plane_compute_gtt(plane_state);
if (ret)
return ret;
@@ -14536,31 +14732,13 @@ static const struct drm_framebuffer_funcs intel_fb_funcs = {
.dirty = intel_user_framebuffer_dirty,
};
-static
-u32 intel_fb_pitch_limit(struct drm_i915_private *dev_priv,
- u32 pixel_format, u64 fb_modifier)
-{
- struct intel_crtc *crtc;
- struct intel_plane *plane;
-
- /*
- * We assume the primary plane for pipe A has
- * the highest stride limits of them all.
- */
- crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_A);
- plane = to_intel_plane(crtc->base.primary);
-
- return plane->max_stride(plane, pixel_format, fb_modifier,
- DRM_MODE_ROTATE_0);
-}
-
static int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
struct drm_i915_gem_object *obj,
struct drm_mode_fb_cmd2 *mode_cmd)
{
struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
struct drm_framebuffer *fb = &intel_fb->base;
- u32 pitch_limit;
+ u32 max_stride;
unsigned int tiling, stride;
int ret = -EINVAL;
int i;
@@ -14612,13 +14790,13 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
goto err;
}
- pitch_limit = intel_fb_pitch_limit(dev_priv, mode_cmd->pixel_format,
- mode_cmd->modifier[0]);
- if (mode_cmd->pitches[0] > pitch_limit) {
+ max_stride = intel_fb_max_stride(dev_priv, mode_cmd->pixel_format,
+ mode_cmd->modifier[0]);
+ if (mode_cmd->pitches[0] > max_stride) {
DRM_DEBUG_KMS("%s pitch (%u) must be at most %d\n",
mode_cmd->modifier[0] != DRM_FORMAT_MOD_LINEAR ?
"tiled" : "linear",
- mode_cmd->pitches[0], pitch_limit);
+ mode_cmd->pitches[0], max_stride);
goto err;
}
--
2.19.2
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH v2 5/6] drm/i915: Bump gen4+ fb stride limit to 256KiB
2019-01-11 19:46 [PATCH v2 0/6] drm/i915: GTT remapping for display Ville Syrjala
` (3 preceding siblings ...)
2019-01-11 19:47 ` [PATCH v2 4/6] drm/i915: Overcome display engine stride limits via GTT remapping Ville Syrjala
@ 2019-01-11 19:47 ` Ville Syrjala
2019-01-11 19:47 ` [PATCH v2 6/6] drm/i915: Bump gen7+ fb size limits to 16kx16k Ville Syrjala
` (4 subsequent siblings)
9 siblings, 0 replies; 17+ messages in thread
From: Ville Syrjala @ 2019-01-11 19:47 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
With gtt remapping plugged in we can simply raise the stride
limit on gen4+. Let's just arbitraily pick 256 KiB as the limit.
No remapping CCS because the virtual address of each page actually
matters due to the new hash mode
(WaCompressedResourceDisplayNewHashMode:skl,kbl etc.), and no remapping
on gen2/3 due to lack of fence on the remapped vma.
v2: Rebase due to is_ccs_modifier()
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 120eb6bd856d..543dcb4431d2 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2464,6 +2464,19 @@ static
u32 intel_fb_max_stride(struct drm_i915_private *dev_priv,
u32 pixel_format, u64 modifier)
{
+ /*
+ * Arbitrary limit for gen4+. We can deal with any page
+ * aligned stride via GTT remapping. Gen2/3 need a fence
+ * for tiled scanout which the remapped vma won't have,
+ * so we don't allow remapping on those platforms.
+ *
+ * Also the new hash mode we use for CCS isn't compatible
+ * with remapping as the virtual address of the pages
+ * affects the compressed data.
+ */
+ if (INTEL_GEN(dev_priv) >= 4 && !is_ccs_modifier(modifier))
+ return 256*1024;
+
return intel_plane_fb_max_stride(dev_priv, pixel_format, modifier);
}
--
2.19.2
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH v2 6/6] drm/i915: Bump gen7+ fb size limits to 16kx16k
2019-01-11 19:46 [PATCH v2 0/6] drm/i915: GTT remapping for display Ville Syrjala
` (4 preceding siblings ...)
2019-01-11 19:47 ` [PATCH v2 5/6] drm/i915: Bump gen4+ fb stride limit to 256KiB Ville Syrjala
@ 2019-01-11 19:47 ` Ville Syrjala
2019-01-11 20:00 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: GTT remapping for display Patchwork
` (3 subsequent siblings)
9 siblings, 0 replies; 17+ messages in thread
From: Ville Syrjala @ 2019-01-11 19:47 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
With gtt remapping in place we can use arbitrarily large
framebuffers. Let's bump the limits to 16kx16k on gen7+.
The limit was chosen to match the maximum 2D surface size
of the 3D engine.
With the remapping we could easily go higher than that for the
display engine. However the modesetting ddx will blindly assume
it can handle whatever is reported via kms. The oversized
buffer dimensions are not caught by glamor nor Mesa until
finally an assert will trip when genxml attempts to pack the
SURFACE_STATE. So we pick a safe limit to avoid the X server
from crashing (or potentially misbehaving if the genxml asserts
are compiled out).
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 543dcb4431d2..14de70eb105d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -15331,16 +15331,22 @@ int intel_modeset_init(struct drm_device *dev)
}
}
- /* maximum framebuffer dimensions */
- if (IS_GEN(dev_priv, 2)) {
- dev->mode_config.max_width = 2048;
- dev->mode_config.max_height = 2048;
+ /*
+ * Maximum framebuffer dimensions, chosen to match
+ * the maximum render engine surface size on gen4+.
+ */
+ if (INTEL_GEN(dev_priv) >= 7) {
+ dev->mode_config.max_width = 16384;
+ dev->mode_config.max_height = 16384;
+ } else if (INTEL_GEN(dev_priv) >= 4) {
+ dev->mode_config.max_width = 8192;
+ dev->mode_config.max_height = 8192;
} else if (IS_GEN(dev_priv, 3)) {
dev->mode_config.max_width = 4096;
dev->mode_config.max_height = 4096;
} else {
- dev->mode_config.max_width = 8192;
- dev->mode_config.max_height = 8192;
+ dev->mode_config.max_width = 2048;
+ dev->mode_config.max_height = 2048;
}
if (IS_I845G(dev_priv) || IS_I865G(dev_priv)) {
--
2.19.2
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915: GTT remapping for display
2019-01-11 19:46 [PATCH v2 0/6] drm/i915: GTT remapping for display Ville Syrjala
` (5 preceding siblings ...)
2019-01-11 19:47 ` [PATCH v2 6/6] drm/i915: Bump gen7+ fb size limits to 16kx16k Ville Syrjala
@ 2019-01-11 20:00 ` Patchwork
2019-01-11 20:02 ` ✗ Fi.CI.SPARSE: " Patchwork
` (2 subsequent siblings)
9 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2019-01-11 20:00 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: GTT remapping for display
URL : https://patchwork.freedesktop.org/series/55095/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ff6533f795e4 drm/i915: Add a new "remapped" gtt_view
-:97: CHECK:LINE_SPACING: Please don't use multiple blank lines
#97: FILE: drivers/gpu/drm/i915/i915_gem.c:6066:
+
+
-:245: CHECK:SPACING: spaces preferred around that '*' (ctx:VxV)
#245: FILE: drivers/gpu/drm/i915/i915_gem_gtt.h:195:
+ BUILD_BUG_ON(sizeof(struct intel_remapped_info) != 9*sizeof(unsigned int));
^
total: 0 errors, 0 warnings, 2 checks, 286 lines checked
0b54a3a5a2f8 drm/i915/selftests: Add mock selftest for remapped vmas
-:79: CHECK:SPACING: spaces preferred around that '-' (ctx:VxV)
#79: FILE: drivers/gpu/drm/i915/selftests/i915_vma.c:438:
+ if (left < PAGE_SIZE || left & (PAGE_SIZE-1)) {
^
-:98: CHECK:LINE_SPACING: Please don't use multiple blank lines
#98: FILE: drivers/gpu/drm/i915/selftests/i915_vma.c:457:
+
+
-:134: WARNING:SUSPECT_CODE_INDENT: suspect code indent for conditional statements (8, 8)
#134: FILE: drivers/gpu/drm/i915/selftests/i915_vma.c:511:
+ for (t = types; *t; t++) {
for (a = planes; a->width; a++) {
-:178: WARNING:DEEP_INDENTATION: Too many leading tabs - consider code refactoring
#178: FILE: drivers/gpu/drm/i915/selftests/i915_vma.c:581:
+ if (view.type == I915_GGTT_VIEW_ROTATED)
-:179: WARNING:LONG_LINE: line over 100 characters
#179: FILE: drivers/gpu/drm/i915/selftests/i915_vma.c:582:
+ sg = assert_rotated(obj, &view.rotated, n, sg);
-:180: WARNING:DEEP_INDENTATION: Too many leading tabs - consider code refactoring
#180: FILE: drivers/gpu/drm/i915/selftests/i915_vma.c:583:
+ else
-:181: WARNING:LONG_LINE: line over 100 characters
#181: FILE: drivers/gpu/drm/i915/selftests/i915_vma.c:584:
+ sg = assert_remapped(obj, &view.remapped, n, sg);
total: 0 errors, 5 warnings, 2 checks, 172 lines checked
7d5558eb88e7 drm/i915/selftests: Add live vma selftest
dd746017e751 drm/i915: Overcome display engine stride limits via GTT remapping
1541975fafd0 drm/i915: Bump gen4+ fb stride limit to 256KiB
-:41: CHECK:SPACING: spaces preferred around that '*' (ctx:VxV)
#41: FILE: drivers/gpu/drm/i915/intel_display.c:2478:
+ return 256*1024;
^
total: 0 errors, 0 warnings, 1 checks, 19 lines checked
8de5d269d35a drm/i915: Bump gen7+ fb size limits to 16kx16k
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* ✗ Fi.CI.SPARSE: warning for drm/i915: GTT remapping for display
2019-01-11 19:46 [PATCH v2 0/6] drm/i915: GTT remapping for display Ville Syrjala
` (6 preceding siblings ...)
2019-01-11 20:00 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: GTT remapping for display Patchwork
@ 2019-01-11 20:02 ` Patchwork
2019-01-11 20:18 ` ✓ Fi.CI.BAT: success " Patchwork
2019-01-12 2:57 ` ✗ Fi.CI.IGT: failure " Patchwork
9 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2019-01-11 20:02 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: GTT remapping for display
URL : https://patchwork.freedesktop.org/series/55095/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Add a new "remapped" gtt_view
+drivers/gpu/drm/i915/i915_gem_gtt.c:3630:34: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:3630:34: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3546:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3550:16: warning: expression using sizeof(void)
Commit: drm/i915/selftests: Add mock selftest for remapped vmas
Okay!
Commit: drm/i915/selftests: Add live vma selftest
Okay!
Commit: drm/i915: Overcome display engine stride limits via GTT remapping
Okay!
Commit: drm/i915: Bump gen4+ fb stride limit to 256KiB
Okay!
Commit: drm/i915: Bump gen7+ fb size limits to 16kx16k
Okay!
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: GTT remapping for display
2019-01-11 19:46 [PATCH v2 0/6] drm/i915: GTT remapping for display Ville Syrjala
` (7 preceding siblings ...)
2019-01-11 20:02 ` ✗ Fi.CI.SPARSE: " Patchwork
@ 2019-01-11 20:18 ` Patchwork
2019-01-12 2:57 ` ✗ Fi.CI.IGT: failure " Patchwork
9 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2019-01-11 20:18 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: GTT remapping for display
URL : https://patchwork.freedesktop.org/series/55095/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5405 -> Patchwork_11285
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/55095/revisions/1/mbox/
Known issues
------------
Here are the changes found in Patchwork_11285 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: PASS -> INCOMPLETE [fdo#107718]
* igt@i915_selftest@live_hangcheck:
- fi-skl-iommu: PASS -> INCOMPLETE [fdo#108602] / [fdo#108744]
#### Possible fixes ####
* igt@i915_selftest@live_hangcheck:
- fi-bwr-2160: DMESG-FAIL [fdo#108735] -> PASS
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: FAIL [fdo#108767] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#108602]: https://bugs.freedesktop.org/show_bug.cgi?id=108602
[fdo#108735]: https://bugs.freedesktop.org/show_bug.cgi?id=108735
[fdo#108744]: https://bugs.freedesktop.org/show_bug.cgi?id=108744
[fdo#108767]: https://bugs.freedesktop.org/show_bug.cgi?id=108767
[fdo#109241]: https://bugs.freedesktop.org/show_bug.cgi?id=109241
Participating hosts (48 -> 42)
------------------------------
Missing (6): fi-kbl-soraka fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-icl-y fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_5405 -> Patchwork_11285
CI_DRM_5405: 92073deda0323ec6b2dd4066dd253235a54afa74 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4763: 805a99409542d7d72dda3b6dcd284a8869a3de16 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_11285: 8de5d269d35a7b61cbcb16e99f2e5b83bea04917 @ git://anongit.freedesktop.org/gfx-ci/linux
== Kernel 32bit build ==
Warning: Kernel 32bit buildtest failed:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11285/build_32bit.log
CALL scripts/checksyscalls.sh
CHK include/generated/compile.h
CC [M] drivers/gpu/drm/i915/i915_vma.o
In file included from ./include/drm/drm_mm.h:49:0,
from drivers/gpu/drm/i915/i915_vma.h:31,
from drivers/gpu/drm/i915/i915_vma.c:25:
drivers/gpu/drm/i915/selftests/i915_vma.c: In function ‘assert_remapped’:
drivers/gpu/drm/i915/selftests/i915_vma.c:436:18: error: format ‘%llx’ expects argument of type ‘long long unsigned int’, but argument 7 has type ‘dma_addr_t {aka unsigned int}’ [-Werror=format=]
DRM_DEBUG_KMS("sg %p %d %d %d %llx\n", sg, n, x, y, src);
^
./include/drm/drm_print.h:362:22: note: in definition of macro ‘DRM_DEBUG_KMS’
drm_dbg(DRM_UT_KMS, fmt, ##__VA_ARGS__)
^~~
drivers/gpu/drm/i915/selftests/i915_vma.c:445:18: error: format ‘%llx’ expects argument of type ‘long long unsigned int’, but argument 4 has type ‘dma_addr_t {aka unsigned int}’ [-Werror=format=]
DRM_DEBUG_KMS("sg %p dma %llx off = %d\n", sg, sg_dma_address(sg), offset);
^
./include/drm/drm_print.h:362:22: note: in definition of macro ‘DRM_DEBUG_KMS’
drm_dbg(DRM_UT_KMS, fmt, ##__VA_ARGS__)
^~~
cc1: all warnings being treated as errors
scripts/Makefile.build:276: recipe for target 'drivers/gpu/drm/i915/i915_vma.o' failed
make[4]: *** [drivers/gpu/drm/i915/i915_vma.o] Error 1
scripts/Makefile.build:492: recipe for target 'drivers/gpu/drm/i915' failed
make[3]: *** [drivers/gpu/drm/i915] Error 2
scripts/Makefile.build:492: recipe for target 'drivers/gpu/drm' failed
make[2]: *** [drivers/gpu/drm] Error 2
scripts/Makefile.build:492: recipe for target 'drivers/gpu' failed
make[1]: *** [drivers/gpu] Error 2
Makefile:1042: recipe for target 'drivers' failed
make: *** [drivers] Error 2
== Linux commits ==
8de5d269d35a drm/i915: Bump gen7+ fb size limits to 16kx16k
1541975fafd0 drm/i915: Bump gen4+ fb stride limit to 256KiB
dd746017e751 drm/i915: Overcome display engine stride limits via GTT remapping
7d5558eb88e7 drm/i915/selftests: Add live vma selftest
0b54a3a5a2f8 drm/i915/selftests: Add mock selftest for remapped vmas
ff6533f795e4 drm/i915: Add a new "remapped" gtt_view
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11285/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* ✗ Fi.CI.IGT: failure for drm/i915: GTT remapping for display
2019-01-11 19:46 [PATCH v2 0/6] drm/i915: GTT remapping for display Ville Syrjala
` (8 preceding siblings ...)
2019-01-11 20:18 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2019-01-12 2:57 ` Patchwork
9 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2019-01-12 2:57 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: GTT remapping for display
URL : https://patchwork.freedesktop.org/series/55095/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5405_full -> Patchwork_11285_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_11285_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_11285_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_11285_full:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@mock_vma:
- shard-iclb: PASS -> INCOMPLETE
Known issues
------------
Here are the changes found in Patchwork_11285_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_schedule@pi-ringfull-bsd:
- shard-skl: NOTRUN -> FAIL [fdo#103158] +1
* igt@gem_exec_schedule@pi-ringfull-vebox:
- shard-kbl: NOTRUN -> FAIL [fdo#103158] +4
* igt@i915_selftest@mock_vma:
- shard-hsw: PASS -> INCOMPLETE [fdo#103540]
- shard-apl: PASS -> INCOMPLETE [fdo#103927]
- shard-glk: PASS -> INCOMPLETE [fdo#103359] / [k.org#198133]
- shard-snb: PASS -> INCOMPLETE [fdo#105411]
* igt@i915_suspend@shrink:
- shard-kbl: NOTRUN -> DMESG-WARN [fdo#109244]
* igt@kms_available_modes_crc@available_mode_test_crc:
- shard-kbl: NOTRUN -> FAIL [fdo#106641]
* igt@kms_busy@extended-modeset-hang-newfb-render-a:
- shard-iclb: NOTRUN -> DMESG-WARN [fdo#107956]
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c:
- shard-skl: NOTRUN -> DMESG-WARN [fdo#107956] +2
* igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c:
- shard-kbl: NOTRUN -> DMESG-WARN [fdo#107956] +8
* igt@kms_chv_cursor_fail@pipe-a-256x256-bottom-edge:
- shard-iclb: PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +1
* igt@kms_chv_cursor_fail@pipe-c-128x128-top-edge:
- shard-skl: PASS -> FAIL [fdo#104671]
* igt@kms_color@pipe-c-ctm-blue-to-red:
- shard-skl: PASS -> FAIL [fdo#107201]
* igt@kms_content_protection@atomic:
- shard-kbl: NOTRUN -> FAIL [fdo#108597] +1
* igt@kms_cursor_crc@cursor-128x128-onscreen:
- shard-kbl: NOTRUN -> FAIL [fdo#103232] +1
* igt@kms_cursor_crc@cursor-256x256-random:
- shard-iclb: NOTRUN -> FAIL [fdo#103232]
* igt@kms_cursor_crc@cursor-256x85-random:
- shard-apl: PASS -> FAIL [fdo#103232] +5
- shard-glk: PASS -> FAIL [fdo#103232]
* igt@kms_cursor_crc@cursor-64x64-suspend:
- shard-kbl: NOTRUN -> FAIL [fdo#103191] / [fdo#103232]
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-skl: NOTRUN -> FAIL [fdo#105363]
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite:
- shard-iclb: PASS -> FAIL [fdo#103167] +6
- shard-apl: PASS -> FAIL [fdo#103167] +3
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move:
- shard-kbl: NOTRUN -> FAIL [fdo#103167]
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-cpu:
- shard-glk: PASS -> FAIL [fdo#103167] +2
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-cpu:
- shard-iclb: PASS -> DMESG-FAIL [fdo#107724] +2
* igt@kms_plane@pixel-format-pipe-b-planes:
- shard-skl: NOTRUN -> DMESG-WARN [fdo#106885] +2
* igt@kms_plane_alpha_blend@pipe-b-alpha-transparant-fb:
- shard-kbl: NOTRUN -> FAIL [fdo#108145] +8
* igt@kms_plane_alpha_blend@pipe-c-alpha-7efc:
- shard-kbl: NOTRUN -> FAIL [fdo#108145] / [fdo#108590] +5
* igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
- shard-skl: NOTRUN -> FAIL [fdo#108145] +2
* igt@kms_plane_multiple@atomic-pipe-a-tiling-yf:
- shard-glk: PASS -> FAIL [fdo#103166]
* igt@kms_plane_multiple@atomic-pipe-b-tiling-none:
- shard-apl: PASS -> FAIL [fdo#103166] +1
* igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
- shard-iclb: PASS -> FAIL [fdo#103166] +4
* igt@kms_plane_multiple@atomic-pipe-c-tiling-x:
- shard-kbl: NOTRUN -> FAIL [fdo#103166] +1
* igt@kms_rmfb@close-fd:
- shard-iclb: PASS -> DMESG-WARN [fdo#107724] +13
* igt@kms_setmode@basic:
- shard-skl: NOTRUN -> FAIL [fdo#99912]
* igt@kms_sysfs_edid_timing:
- shard-kbl: NOTRUN -> FAIL [fdo#100047]
- shard-skl: NOTRUN -> FAIL [fdo#100047]
* igt@kms_vblank@pipe-b-ts-continuation-suspend:
- shard-hsw: PASS -> FAIL [fdo#104894]
* igt@pm_backlight@fade_with_dpms:
- shard-iclb: PASS -> INCOMPLETE [fdo#107820]
#### Possible fixes ####
* igt@gem_eio@in-flight-suspend:
- shard-skl: INCOMPLETE [fdo#104108] / [fdo#107773] -> PASS
* igt@kms_atomic_transition@plane-all-transition:
- shard-iclb: INCOMPLETE [fdo#109225] -> PASS
* igt@kms_color@pipe-b-ctm-max:
- shard-apl: FAIL [fdo#108147] -> PASS
* igt@kms_cursor_crc@cursor-64x21-onscreen:
- shard-apl: FAIL [fdo#103232] -> PASS +1
* igt@kms_flip_tiling@flip-x-tiled:
- shard-skl: FAIL [fdo#108145] -> PASS
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc:
- shard-glk: FAIL [fdo#103167] -> PASS +1
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render:
- shard-apl: FAIL [fdo#103167] -> PASS +2
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move:
- shard-iclb: FAIL [fdo#103167] -> PASS
* igt@kms_plane@plane-position-covered-pipe-c-planes:
- shard-apl: FAIL [fdo#103166] -> PASS +4
* igt@kms_plane_multiple@atomic-pipe-c-tiling-none:
- shard-iclb: FAIL [fdo#103166] -> PASS +1
* igt@kms_psr@suspend:
- shard-iclb: INCOMPLETE [fdo#107713] -> PASS
* igt@kms_rmfb@rmfb-ioctl:
- shard-iclb: DMESG-WARN [fdo#107724] -> PASS
* igt@kms_rotation_crc@multiplane-rotation-cropping-top:
- shard-glk: DMESG-WARN [fdo#105763] / [fdo#106538] -> PASS
* igt@pm_rpm@fences:
- shard-skl: INCOMPLETE [fdo#107807] -> PASS +2
* igt@pm_rpm@gem-execbuf-stress-extra-wait:
- shard-skl: INCOMPLETE [fdo#107803] / [fdo#107807] -> PASS
#### Warnings ####
* igt@i915_suspend@shrink:
- shard-skl: INCOMPLETE [fdo#106886] -> DMESG-WARN [fdo#107886] / [fdo#109244]
- shard-glk: INCOMPLETE [fdo#103359] / [fdo#106886] / [k.org#198133] -> DMESG-WARN [fdo#109244]
* igt@kms_ccs@pipe-c-crc-sprite-planes-basic:
- shard-iclb: FAIL [fdo#107725] -> DMESG-WARN [fdo#107724] / [fdo#108336]
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt:
- shard-iclb: FAIL [fdo#103167] -> DMESG-FAIL [fdo#107724]
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-onoff:
- shard-iclb: FAIL [fdo#103167] -> DMESG-WARN [fdo#107724] / [fdo#108336]
* igt@pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-iclb: {SKIP} [fdo#109308] -> INCOMPLETE [fdo#108840]
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#100047]: https://bugs.freedesktop.org/show_bug.cgi?id=100047
[fdo#103158]: https://bugs.freedesktop.org/show_bug.cgi?id=103158
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
[fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#104671]: https://bugs.freedesktop.org/show_bug.cgi?id=104671
[fdo#104894]: https://bugs.freedesktop.org/show_bug.cgi?id=104894
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
[fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
[fdo#106538]: https://bugs.freedesktop.org/show_bug.cgi?id=106538
[fdo#106641]: https://bugs.freedesktop.org/show_bug.cgi?id=106641
[fdo#106885]: https://bugs.freedesktop.org/show_bug.cgi?id=106885
[fdo#106886]: https://bugs.freedesktop.org/show_bug.cgi?id=106886
[fdo#107201]: https://bugs.freedesktop.org/show_bug.cgi?id=107201
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#107725]: https://bugs.freedesktop.org/show_bug.cgi?id=107725
[fdo#107773]: https://bugs.freedesktop.org/show_bug.cgi?id=107773
[fdo#107803]: https://bugs.freedesktop.org/show_bug.cgi?id=107803
[fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807
[fdo#107820]: https://bugs.freedesktop.org/show_bug.cgi?id=107820
[fdo#107886]: https://bugs.freedesktop.org/show_bug.cgi?id=107886
[fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108147]: https://bugs.freedesktop.org/show_bug.cgi?id=108147
[fdo#108336]: https://bugs.freedesktop.org/show_bug.cgi?id=108336
[fdo#108590]: https://bugs.freedesktop.org/show_bug.cgi?id=108590
[fdo#108597]: https://bugs.freedesktop.org/show_bug.cgi?id=108597
[fdo#108840]: https://bugs.freedesktop.org/show_bug.cgi?id=108840
[fdo#109225]: https://bugs.freedesktop.org/show_bug.cgi?id=109225
[fdo#109244]: https://bugs.freedesktop.org/show_bug.cgi?id=109244
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109281]: https://bugs.freedesktop.org/show_bug.cgi?id=109281
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109286]: https://bugs.freedesktop.org/show_bug.cgi?id=109286
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109290]: https://bugs.freedesktop.org/show_bug.cgi?id=109290
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
[k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133
Participating hosts (6 -> 7)
------------------------------
Additional (1): shard-kbl
Build changes
-------------
* Linux: CI_DRM_5405 -> Patchwork_11285
CI_DRM_5405: 92073deda0323ec6b2dd4066dd253235a54afa74 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4763: 805a99409542d7d72dda3b6dcd284a8869a3de16 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_11285: 8de5d269d35a7b61cbcb16e99f2e5b83bea04917 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11285/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v2 1/6] drm/i915: Add a new "remapped" gtt_view
2019-01-11 19:46 ` [PATCH v2 1/6] drm/i915: Add a new "remapped" gtt_view Ville Syrjala
@ 2019-01-14 9:55 ` Tvrtko Ursulin
2019-01-15 10:58 ` Chris Wilson
2019-01-15 13:43 ` Ville Syrjälä
0 siblings, 2 replies; 17+ messages in thread
From: Tvrtko Ursulin @ 2019-01-14 9:55 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx
On 11/01/2019 19:46, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> To overcome display engine stride limits we'll want to remap the
> pages in the GTT. To that end we need a new gtt_view type which
> is just like the "rotated" type except not rotated.
I think I asked this before, so sorry if you also answered it - what
about rotated setups which go over display engine stride limits?
> v2: Use intel_remapped_plane_info base type
> s/unused/unused_mbz/ (Chris)
> Separate BUILD_BUG_ON()s (Chris)
> Use I915_GTT_PAGE_SIZE (Chris)
> v3: Use i915_gem_object_get_dma_address() (Chris)
> Trim the sg (Tvrtko)
> v4: Actually trim this time. Limit the max length
> to one row of pages to keep things simple
>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 12 ++++
> drivers/gpu/drm/i915/i915_drv.h | 4 ++
> drivers/gpu/drm/i915/i915_gem.c | 17 ++++-
> drivers/gpu/drm/i915/i915_gem_gtt.c | 88 +++++++++++++++++++++++
> drivers/gpu/drm/i915/i915_gem_gtt.h | 25 +++++--
> drivers/gpu/drm/i915/i915_vma.c | 6 +-
> drivers/gpu/drm/i915/i915_vma.h | 3 +
> drivers/gpu/drm/i915/intel_display.c | 11 +++
> drivers/gpu/drm/i915/intel_drv.h | 1 +
> drivers/gpu/drm/i915/selftests/i915_vma.c | 6 +-
> 10 files changed, 163 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index d460ef522d9c..cab7771799ad 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -196,6 +196,18 @@ describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
> vma->ggtt_view.rotated.plane[1].offset);
> break;
>
> + case I915_GGTT_VIEW_REMAPPED:
> + seq_printf(m, ", remapped [(%ux%u, stride=%u, offset=%u), (%ux%u, stride=%u, offset=%u)]",
> + vma->ggtt_view.remapped.plane[0].width,
> + vma->ggtt_view.remapped.plane[0].height,
> + vma->ggtt_view.remapped.plane[0].stride,
> + vma->ggtt_view.remapped.plane[0].offset,
> + vma->ggtt_view.remapped.plane[1].width,
> + vma->ggtt_view.remapped.plane[1].height,
> + vma->ggtt_view.remapped.plane[1].stride,
> + vma->ggtt_view.remapped.plane[1].offset);
> + break;
> +
> default:
> MISSING_CASE(vma->ggtt_view.type);
> break;
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 5df26ccda8a4..cef76cf343c4 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2845,6 +2845,10 @@ i915_gem_object_get_dirty_page(struct drm_i915_gem_object *obj,
> unsigned int n);
>
> dma_addr_t
> +i915_gem_object_get_dma_address_len(struct drm_i915_gem_object *obj,
> + unsigned long n,
> + unsigned int *len);
> +dma_addr_t
> i915_gem_object_get_dma_address(struct drm_i915_gem_object *obj,
> unsigned long n);
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index ea85da393662..f65d81f4f3d7 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -6041,16 +6041,29 @@ i915_gem_object_get_dirty_page(struct drm_i915_gem_object *obj,
> }
>
> dma_addr_t
> -i915_gem_object_get_dma_address(struct drm_i915_gem_object *obj,
> - unsigned long n)
> +i915_gem_object_get_dma_address_len(struct drm_i915_gem_object *obj,
> + unsigned long n,
> + unsigned int *len)
> {
> struct scatterlist *sg;
> unsigned int offset;
>
> sg = i915_gem_object_get_sg(obj, n, &offset);
> +
> + if (len)
> + *len = sg_dma_len(sg) - (offset << PAGE_SHIFT);
> +
> return sg_dma_address(sg) + (offset << PAGE_SHIFT);
> }
>
> +dma_addr_t
> +i915_gem_object_get_dma_address(struct drm_i915_gem_object *obj,
> + unsigned long n)
> +{
> + return i915_gem_object_get_dma_address_len(obj, n, NULL);
> +}
> +
> +
> int i915_gem_object_attach_phys(struct drm_i915_gem_object *obj, int align)
> {
> struct sg_table *pages;
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index a8807fbed0aa..be5dbbb1b6ff 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -3605,6 +3605,89 @@ intel_rotate_pages(struct intel_rotation_info *rot_info,
> return ERR_PTR(ret);
> }
>
> +static struct scatterlist *
> +remap_pages(struct drm_i915_gem_object *obj, unsigned int offset,
> + unsigned int width, unsigned int height,
> + unsigned int stride,
> + struct sg_table *st, struct scatterlist *sg)
> +{
> + unsigned int row;
> +
> + for (row = 0; row < height; row++) {
> + unsigned int left = width * I915_GTT_PAGE_SIZE;
> +
> + while (left) {
> + dma_addr_t addr;
> + unsigned int length;
> +
> + /* We don't need the pages, but need to initialize
> + * the entries so the sg list can be happily traversed.
> + * The only thing we need are DMA addresses.
> + */
> +
> + addr = i915_gem_object_get_dma_address_len(obj, offset, &length);
> +
> + length = min(left, length);
> +
> + st->nents++;
> +
> + sg_set_page(sg, NULL, length, 0);
> + sg_dma_address(sg) = addr;
> + sg_dma_len(sg) = length;
> + sg = sg_next(sg);
> +
> + offset += length / I915_GTT_PAGE_SIZE;
> + left -= length;
> + }
> +
> + offset += stride - width;
> + }
> +
> + return sg;
> +}
> +
> +static noinline struct sg_table *
> +intel_remap_pages(struct intel_remapped_info *rem_info,
> + struct drm_i915_gem_object *obj)
> +{
> + unsigned int size = intel_remapped_info_size(rem_info);
> + struct sg_table *st;
> + struct scatterlist *sg;
> + int ret = -ENOMEM;
> + int i;
> +
> + /* Allocate target SG list. */
> + st = kmalloc(sizeof(*st), GFP_KERNEL);
> + if (!st)
> + goto err_st_alloc;
> +
> + ret = sg_alloc_table(st, size, GFP_KERNEL);
> + if (ret)
> + goto err_sg_alloc;
> +
> + st->nents = 0;
> + sg = st->sgl;
> +
> + for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++) {
> + sg = remap_pages(obj, rem_info->plane[i].offset,
> + rem_info->plane[i].width, rem_info->plane[i].height,
> + rem_info->plane[i].stride, st, sg);
> + }
> +
> + i915_sg_trim(st);
> +
> + return st;
> +
> +err_sg_alloc:
> + kfree(st);
> +err_st_alloc:
> +
> + DRM_DEBUG_DRIVER("Failed to create remapped mapping for object size %zu! (%ux%u tiles, %u pages)\n",
> + obj->base.size, rem_info->plane[0].width, rem_info->plane[0].height, size);
> +
> + return ERR_PTR(ret);
> +}
> +
> static noinline struct sg_table *
> intel_partial_pages(const struct i915_ggtt_view *view,
> struct drm_i915_gem_object *obj)
> @@ -3683,6 +3766,11 @@ i915_get_ggtt_vma_pages(struct i915_vma *vma)
> intel_rotate_pages(&vma->ggtt_view.rotated, vma->obj);
> break;
>
> + case I915_GGTT_VIEW_REMAPPED:
> + vma->pages =
> + intel_remap_pages(&vma->ggtt_view.remapped, vma->obj);
> + break;
> +
> case I915_GGTT_VIEW_PARTIAL:
> vma->pages = intel_partial_pages(&vma->ggtt_view, vma->obj);
> break;
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
> index e2360f16427a..8f26b4292084 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.h
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
> @@ -162,11 +162,18 @@ typedef u64 gen8_ppgtt_pml4e_t;
>
> struct sg_table;
>
> +struct intel_remapped_plane_info {
> + /* in gtt pages */
> + unsigned int width, height, stride, offset;
> +} __packed;
> +
> +struct intel_remapped_info {
> + struct intel_remapped_plane_info plane[2];
> + unsigned int unused_mbz;
> +} __packed;
> +
> struct intel_rotation_info {
> - struct intel_rotation_plane_info {
> - /* tiles */
> - unsigned int width, height, stride, offset;
> - } plane[2];
> + struct intel_remapped_plane_info plane[2];
> } __packed;
>
> struct intel_partial_info {
> @@ -178,12 +185,20 @@ enum i915_ggtt_view_type {
> I915_GGTT_VIEW_NORMAL = 0,
> I915_GGTT_VIEW_ROTATED = sizeof(struct intel_rotation_info),
> I915_GGTT_VIEW_PARTIAL = sizeof(struct intel_partial_info),
> + I915_GGTT_VIEW_REMAPPED = sizeof(struct intel_remapped_info),
> };
>
> static inline void assert_i915_gem_gtt_types(void)
> {
> BUILD_BUG_ON(sizeof(struct intel_rotation_info) != 8*sizeof(unsigned int));
> BUILD_BUG_ON(sizeof(struct intel_partial_info) != sizeof(u64) + sizeof(unsigned int));
> + BUILD_BUG_ON(sizeof(struct intel_remapped_info) != 9*sizeof(unsigned int));
> +
> + /* Check that rotation/remapped shares offsets for simplicity */
> + BUILD_BUG_ON(offsetof(struct intel_remapped_info, plane[0]) !=
> + offsetof(struct intel_rotation_info, plane[0]));
> + BUILD_BUG_ON(offsetofend(struct intel_remapped_info, plane[1]) !=
> + offsetofend(struct intel_rotation_info, plane[1]));
>
> /* As we encode the size of each branch inside the union into its type,
> * we have to be careful that each branch has a unique size.
> @@ -192,6 +207,7 @@ static inline void assert_i915_gem_gtt_types(void)
> case I915_GGTT_VIEW_NORMAL:
> case I915_GGTT_VIEW_PARTIAL:
> case I915_GGTT_VIEW_ROTATED:
> + case I915_GGTT_VIEW_REMAPPED:
> /* gcc complains if these are identical cases */
> break;
> }
> @@ -203,6 +219,7 @@ struct i915_ggtt_view {
> /* Members need to contain no holes/padding */
> struct intel_partial_info partial;
> struct intel_rotation_info rotated;
> + struct intel_remapped_info remapped;
> };
> };
>
> diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
> index 5b4d78cdb4ca..9a039c36dc0c 100644
> --- a/drivers/gpu/drm/i915/i915_vma.c
> +++ b/drivers/gpu/drm/i915/i915_vma.c
> @@ -164,6 +164,9 @@ vma_create(struct drm_i915_gem_object *obj,
> } else if (view->type == I915_GGTT_VIEW_ROTATED) {
> vma->size = intel_rotation_info_size(&view->rotated);
> vma->size <<= PAGE_SHIFT;
> + } else if (view->type == I915_GGTT_VIEW_REMAPPED) {
> + vma->size = intel_remapped_info_size(&view->remapped);
> + vma->size <<= PAGE_SHIFT;
> }
> }
>
> @@ -464,7 +467,8 @@ void __i915_vma_set_map_and_fenceable(struct i915_vma *vma)
> * Explicitly disable for rotated VMA since the display does not
> * need the fence and the VMA is not accessible to other users.
> */
> - if (vma->ggtt_view.type == I915_GGTT_VIEW_ROTATED)
> + if (vma->ggtt_view.type == I915_GGTT_VIEW_ROTATED ||
> + vma->ggtt_view.type == I915_GGTT_VIEW_REMAPPED)
> return;
>
> fenceable = (vma->node.size >= vma->fence_size &&
> diff --git a/drivers/gpu/drm/i915/i915_vma.h b/drivers/gpu/drm/i915/i915_vma.h
> index 4f7c1c7599f4..64cf029c028a 100644
> --- a/drivers/gpu/drm/i915/i915_vma.h
> +++ b/drivers/gpu/drm/i915/i915_vma.h
> @@ -265,8 +265,11 @@ i915_vma_compare(struct i915_vma *vma,
> */
> BUILD_BUG_ON(I915_GGTT_VIEW_NORMAL >= I915_GGTT_VIEW_PARTIAL);
> BUILD_BUG_ON(I915_GGTT_VIEW_PARTIAL >= I915_GGTT_VIEW_ROTATED);
> + BUILD_BUG_ON(I915_GGTT_VIEW_ROTATED >= I915_GGTT_VIEW_REMAPPED);
> BUILD_BUG_ON(offsetof(typeof(*view), rotated) !=
> offsetof(typeof(*view), partial));
> + BUILD_BUG_ON(offsetof(typeof(*view), rotated) !=
> + offsetof(typeof(*view), remapped));
> return memcmp(&vma->ggtt_view.partial, &view->partial, view->type);
> }
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 5dc0de89c49e..c17a1723a589 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1942,6 +1942,17 @@ unsigned int intel_rotation_info_size(const struct intel_rotation_info *rot_info
> return size;
> }
>
> +unsigned int intel_remapped_info_size(const struct intel_remapped_info *rem_info)
> +{
> + unsigned int size = 0;
> + int i;
> +
> + for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++)
> + size += rem_info->plane[i].width * rem_info->plane[i].height;
> +
> + return size;
> +}
> +
> static void
> intel_fill_fb_ggtt_view(struct i915_ggtt_view *view,
> const struct drm_framebuffer *fb,
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 3b051fdd0fce..7b9b76d5895e 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1601,6 +1601,7 @@ unsigned int intel_fb_xy_to_linear(int x, int y,
> void intel_add_fb_offsets(int *x, int *y,
> const struct intel_plane_state *state, int plane);
> unsigned int intel_rotation_info_size(const struct intel_rotation_info *rot_info);
> +unsigned int intel_remapped_info_size(const struct intel_remapped_info *rem_info);
> bool intel_has_pending_fb_unpin(struct drm_i915_private *dev_priv);
> void intel_mark_busy(struct drm_i915_private *dev_priv);
> void intel_mark_idle(struct drm_i915_private *dev_priv);
> diff --git a/drivers/gpu/drm/i915/selftests/i915_vma.c b/drivers/gpu/drm/i915/selftests/i915_vma.c
> index ffa74290e054..4fc49c27f13c 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_vma.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_vma.c
> @@ -395,8 +395,8 @@ assert_rotated(struct drm_i915_gem_object *obj,
> return sg;
> }
>
> -static unsigned int rotated_size(const struct intel_rotation_plane_info *a,
> - const struct intel_rotation_plane_info *b)
> +static unsigned int rotated_size(const struct intel_remapped_plane_info *a,
> + const struct intel_remapped_plane_info *b)
> {
> return a->width * a->height + b->width * b->height;
> }
> @@ -406,7 +406,7 @@ static int igt_vma_rotate(void *arg)
> struct drm_i915_private *i915 = arg;
> struct i915_address_space *vm = &i915->ggtt.vm;
> struct drm_i915_gem_object *obj;
> - const struct intel_rotation_plane_info planes[] = {
> + const struct intel_remapped_plane_info planes[] = {
Why this?
> { .width = 1, .height = 1, .stride = 1 },
> { .width = 2, .height = 2, .stride = 2 },
> { .width = 4, .height = 4, .stride = 4 },
>
Regards,
Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v2 1/6] drm/i915: Add a new "remapped" gtt_view
2019-01-14 9:55 ` Tvrtko Ursulin
@ 2019-01-15 10:58 ` Chris Wilson
2019-01-15 11:11 ` Tvrtko Ursulin
2019-01-15 13:43 ` Ville Syrjälä
1 sibling, 1 reply; 17+ messages in thread
From: Chris Wilson @ 2019-01-15 10:58 UTC (permalink / raw)
To: Tvrtko Ursulin, Ville Syrjala, intel-gfx
Quoting Tvrtko Ursulin (2019-01-14 09:55:10)
>
> On 11/01/2019 19:46, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > To overcome display engine stride limits we'll want to remap the
> > pages in the GTT. To that end we need a new gtt_view type which
> > is just like the "rotated" type except not rotated.
>
> I think I asked this before, so sorry if you also answered it - what
> about rotated setups which go over display engine stride limits?
There's always a task for tomorrow. For such a remapping, I guess we
want to allow an arbitrary remapping table.
struct intel_arb_ggtt_view {
unsigned long *indices;
};
-Chris
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v2 1/6] drm/i915: Add a new "remapped" gtt_view
2019-01-15 10:58 ` Chris Wilson
@ 2019-01-15 11:11 ` Tvrtko Ursulin
0 siblings, 0 replies; 17+ messages in thread
From: Tvrtko Ursulin @ 2019-01-15 11:11 UTC (permalink / raw)
To: Chris Wilson, Ville Syrjala, intel-gfx
On 15/01/2019 10:58, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2019-01-14 09:55:10)
>>
>> On 11/01/2019 19:46, Ville Syrjala wrote:
>>> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>>
>>> To overcome display engine stride limits we'll want to remap the
>>> pages in the GTT. To that end we need a new gtt_view type which
>>> is just like the "rotated" type except not rotated.
>>
>> I think I asked this before, so sorry if you also answered it - what
>> about rotated setups which go over display engine stride limits?
>
> There's always a task for tomorrow. For such a remapping, I guess we
> want to allow an arbitrary remapping table.
> struct intel_arb_ggtt_view {
> unsigned long *indices;
> };
True, nothing here would make that impossible it seems, which was my
concern when I asked this question.
Btw.. would this make calling this one "tiled" view more future proof?
Then we would be able to call the arbitrarily remapped view just remapped.
Regards,
Tvrtko
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Intel-gfx@lists.freedesktop.org
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^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v2 1/6] drm/i915: Add a new "remapped" gtt_view
2019-01-14 9:55 ` Tvrtko Ursulin
2019-01-15 10:58 ` Chris Wilson
@ 2019-01-15 13:43 ` Ville Syrjälä
2019-01-15 14:18 ` Chris Wilson
2019-01-24 23:24 ` Chris Wilson
1 sibling, 2 replies; 17+ messages in thread
From: Ville Syrjälä @ 2019-01-15 13:43 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-gfx
On Mon, Jan 14, 2019 at 09:55:10AM +0000, Tvrtko Ursulin wrote:
>
> On 11/01/2019 19:46, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > To overcome display engine stride limits we'll want to remap the
> > pages in the GTT. To that end we need a new gtt_view type which
> > is just like the "rotated" type except not rotated.
>
> I think I asked this before, so sorry if you also answered it - what
> about rotated setups which go over display engine stride limits?
We already have the code to do the rotated mapping.
>
> > v2: Use intel_remapped_plane_info base type
> > s/unused/unused_mbz/ (Chris)
> > Separate BUILD_BUG_ON()s (Chris)
> > Use I915_GTT_PAGE_SIZE (Chris)
> > v3: Use i915_gem_object_get_dma_address() (Chris)
> > Trim the sg (Tvrtko)
> > v4: Actually trim this time. Limit the max length
> > to one row of pages to keep things simple
> >
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_debugfs.c | 12 ++++
> > drivers/gpu/drm/i915/i915_drv.h | 4 ++
> > drivers/gpu/drm/i915/i915_gem.c | 17 ++++-
> > drivers/gpu/drm/i915/i915_gem_gtt.c | 88 +++++++++++++++++++++++
> > drivers/gpu/drm/i915/i915_gem_gtt.h | 25 +++++--
> > drivers/gpu/drm/i915/i915_vma.c | 6 +-
> > drivers/gpu/drm/i915/i915_vma.h | 3 +
> > drivers/gpu/drm/i915/intel_display.c | 11 +++
> > drivers/gpu/drm/i915/intel_drv.h | 1 +
> > drivers/gpu/drm/i915/selftests/i915_vma.c | 6 +-
> > 10 files changed, 163 insertions(+), 10 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> > index d460ef522d9c..cab7771799ad 100644
> > --- a/drivers/gpu/drm/i915/i915_debugfs.c
> > +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> > @@ -196,6 +196,18 @@ describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
> > vma->ggtt_view.rotated.plane[1].offset);
> > break;
> >
> > + case I915_GGTT_VIEW_REMAPPED:
> > + seq_printf(m, ", remapped [(%ux%u, stride=%u, offset=%u), (%ux%u, stride=%u, offset=%u)]",
> > + vma->ggtt_view.remapped.plane[0].width,
> > + vma->ggtt_view.remapped.plane[0].height,
> > + vma->ggtt_view.remapped.plane[0].stride,
> > + vma->ggtt_view.remapped.plane[0].offset,
> > + vma->ggtt_view.remapped.plane[1].width,
> > + vma->ggtt_view.remapped.plane[1].height,
> > + vma->ggtt_view.remapped.plane[1].stride,
> > + vma->ggtt_view.remapped.plane[1].offset);
> > + break;
> > +
> > default:
> > MISSING_CASE(vma->ggtt_view.type);
> > break;
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 5df26ccda8a4..cef76cf343c4 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -2845,6 +2845,10 @@ i915_gem_object_get_dirty_page(struct drm_i915_gem_object *obj,
> > unsigned int n);
> >
> > dma_addr_t
> > +i915_gem_object_get_dma_address_len(struct drm_i915_gem_object *obj,
> > + unsigned long n,
> > + unsigned int *len);
> > +dma_addr_t
> > i915_gem_object_get_dma_address(struct drm_i915_gem_object *obj,
> > unsigned long n);
> >
> > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> > index ea85da393662..f65d81f4f3d7 100644
> > --- a/drivers/gpu/drm/i915/i915_gem.c
> > +++ b/drivers/gpu/drm/i915/i915_gem.c
> > @@ -6041,16 +6041,29 @@ i915_gem_object_get_dirty_page(struct drm_i915_gem_object *obj,
> > }
> >
> > dma_addr_t
> > -i915_gem_object_get_dma_address(struct drm_i915_gem_object *obj,
> > - unsigned long n)
> > +i915_gem_object_get_dma_address_len(struct drm_i915_gem_object *obj,
> > + unsigned long n,
> > + unsigned int *len)
> > {
> > struct scatterlist *sg;
> > unsigned int offset;
> >
> > sg = i915_gem_object_get_sg(obj, n, &offset);
> > +
> > + if (len)
> > + *len = sg_dma_len(sg) - (offset << PAGE_SHIFT);
> > +
> > return sg_dma_address(sg) + (offset << PAGE_SHIFT);
> > }
> >
> > +dma_addr_t
> > +i915_gem_object_get_dma_address(struct drm_i915_gem_object *obj,
> > + unsigned long n)
> > +{
> > + return i915_gem_object_get_dma_address_len(obj, n, NULL);
> > +}
> > +
> > +
> > int i915_gem_object_attach_phys(struct drm_i915_gem_object *obj, int align)
> > {
> > struct sg_table *pages;
> > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > index a8807fbed0aa..be5dbbb1b6ff 100644
> > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > @@ -3605,6 +3605,89 @@ intel_rotate_pages(struct intel_rotation_info *rot_info,
> > return ERR_PTR(ret);
> > }
> >
> > +static struct scatterlist *
> > +remap_pages(struct drm_i915_gem_object *obj, unsigned int offset,
> > + unsigned int width, unsigned int height,
> > + unsigned int stride,
> > + struct sg_table *st, struct scatterlist *sg)
> > +{
> > + unsigned int row;
> > +
> > + for (row = 0; row < height; row++) {
> > + unsigned int left = width * I915_GTT_PAGE_SIZE;
> > +
> > + while (left) {
> > + dma_addr_t addr;
> > + unsigned int length;
> > +
> > + /* We don't need the pages, but need to initialize
> > + * the entries so the sg list can be happily traversed.
> > + * The only thing we need are DMA addresses.
> > + */
> > +
> > + addr = i915_gem_object_get_dma_address_len(obj, offset, &length);
> > +
> > + length = min(left, length);
> > +
> > + st->nents++;
> > +
> > + sg_set_page(sg, NULL, length, 0);
> > + sg_dma_address(sg) = addr;
> > + sg_dma_len(sg) = length;
> > + sg = sg_next(sg);
> > +
> > + offset += length / I915_GTT_PAGE_SIZE;
> > + left -= length;
> > + }
> > +
> > + offset += stride - width;
> > + }
> > +
> > + return sg;
> > +}
> > +
> > +static noinline struct sg_table *
> > +intel_remap_pages(struct intel_remapped_info *rem_info,
> > + struct drm_i915_gem_object *obj)
> > +{
> > + unsigned int size = intel_remapped_info_size(rem_info);
> > + struct sg_table *st;
> > + struct scatterlist *sg;
> > + int ret = -ENOMEM;
> > + int i;
> > +
> > + /* Allocate target SG list. */
> > + st = kmalloc(sizeof(*st), GFP_KERNEL);
> > + if (!st)
> > + goto err_st_alloc;
> > +
> > + ret = sg_alloc_table(st, size, GFP_KERNEL);
> > + if (ret)
> > + goto err_sg_alloc;
> > +
> > + st->nents = 0;
> > + sg = st->sgl;
> > +
> > + for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++) {
> > + sg = remap_pages(obj, rem_info->plane[i].offset,
> > + rem_info->plane[i].width, rem_info->plane[i].height,
> > + rem_info->plane[i].stride, st, sg);
> > + }
> > +
> > + i915_sg_trim(st);
> > +
> > + return st;
> > +
> > +err_sg_alloc:
> > + kfree(st);
> > +err_st_alloc:
> > +
> > + DRM_DEBUG_DRIVER("Failed to create remapped mapping for object size %zu! (%ux%u tiles, %u pages)\n",
> > + obj->base.size, rem_info->plane[0].width, rem_info->plane[0].height, size);
> > +
> > + return ERR_PTR(ret);
> > +}
> > +
> > static noinline struct sg_table *
> > intel_partial_pages(const struct i915_ggtt_view *view,
> > struct drm_i915_gem_object *obj)
> > @@ -3683,6 +3766,11 @@ i915_get_ggtt_vma_pages(struct i915_vma *vma)
> > intel_rotate_pages(&vma->ggtt_view.rotated, vma->obj);
> > break;
> >
> > + case I915_GGTT_VIEW_REMAPPED:
> > + vma->pages =
> > + intel_remap_pages(&vma->ggtt_view.remapped, vma->obj);
> > + break;
> > +
> > case I915_GGTT_VIEW_PARTIAL:
> > vma->pages = intel_partial_pages(&vma->ggtt_view, vma->obj);
> > break;
> > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
> > index e2360f16427a..8f26b4292084 100644
> > --- a/drivers/gpu/drm/i915/i915_gem_gtt.h
> > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
> > @@ -162,11 +162,18 @@ typedef u64 gen8_ppgtt_pml4e_t;
> >
> > struct sg_table;
> >
> > +struct intel_remapped_plane_info {
> > + /* in gtt pages */
> > + unsigned int width, height, stride, offset;
> > +} __packed;
> > +
> > +struct intel_remapped_info {
> > + struct intel_remapped_plane_info plane[2];
> > + unsigned int unused_mbz;
> > +} __packed;
> > +
> > struct intel_rotation_info {
> > - struct intel_rotation_plane_info {
> > - /* tiles */
> > - unsigned int width, height, stride, offset;
> > - } plane[2];
> > + struct intel_remapped_plane_info plane[2];
> > } __packed;
> >
> > struct intel_partial_info {
> > @@ -178,12 +185,20 @@ enum i915_ggtt_view_type {
> > I915_GGTT_VIEW_NORMAL = 0,
> > I915_GGTT_VIEW_ROTATED = sizeof(struct intel_rotation_info),
> > I915_GGTT_VIEW_PARTIAL = sizeof(struct intel_partial_info),
> > + I915_GGTT_VIEW_REMAPPED = sizeof(struct intel_remapped_info),
> > };
> >
> > static inline void assert_i915_gem_gtt_types(void)
> > {
> > BUILD_BUG_ON(sizeof(struct intel_rotation_info) != 8*sizeof(unsigned int));
> > BUILD_BUG_ON(sizeof(struct intel_partial_info) != sizeof(u64) + sizeof(unsigned int));
> > + BUILD_BUG_ON(sizeof(struct intel_remapped_info) != 9*sizeof(unsigned int));
> > +
> > + /* Check that rotation/remapped shares offsets for simplicity */
> > + BUILD_BUG_ON(offsetof(struct intel_remapped_info, plane[0]) !=
> > + offsetof(struct intel_rotation_info, plane[0]));
> > + BUILD_BUG_ON(offsetofend(struct intel_remapped_info, plane[1]) !=
> > + offsetofend(struct intel_rotation_info, plane[1]));
> >
> > /* As we encode the size of each branch inside the union into its type,
> > * we have to be careful that each branch has a unique size.
> > @@ -192,6 +207,7 @@ static inline void assert_i915_gem_gtt_types(void)
> > case I915_GGTT_VIEW_NORMAL:
> > case I915_GGTT_VIEW_PARTIAL:
> > case I915_GGTT_VIEW_ROTATED:
> > + case I915_GGTT_VIEW_REMAPPED:
> > /* gcc complains if these are identical cases */
> > break;
> > }
> > @@ -203,6 +219,7 @@ struct i915_ggtt_view {
> > /* Members need to contain no holes/padding */
> > struct intel_partial_info partial;
> > struct intel_rotation_info rotated;
> > + struct intel_remapped_info remapped;
> > };
> > };
> >
> > diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
> > index 5b4d78cdb4ca..9a039c36dc0c 100644
> > --- a/drivers/gpu/drm/i915/i915_vma.c
> > +++ b/drivers/gpu/drm/i915/i915_vma.c
> > @@ -164,6 +164,9 @@ vma_create(struct drm_i915_gem_object *obj,
> > } else if (view->type == I915_GGTT_VIEW_ROTATED) {
> > vma->size = intel_rotation_info_size(&view->rotated);
> > vma->size <<= PAGE_SHIFT;
> > + } else if (view->type == I915_GGTT_VIEW_REMAPPED) {
> > + vma->size = intel_remapped_info_size(&view->remapped);
> > + vma->size <<= PAGE_SHIFT;
> > }
> > }
> >
> > @@ -464,7 +467,8 @@ void __i915_vma_set_map_and_fenceable(struct i915_vma *vma)
> > * Explicitly disable for rotated VMA since the display does not
> > * need the fence and the VMA is not accessible to other users.
> > */
> > - if (vma->ggtt_view.type == I915_GGTT_VIEW_ROTATED)
> > + if (vma->ggtt_view.type == I915_GGTT_VIEW_ROTATED ||
> > + vma->ggtt_view.type == I915_GGTT_VIEW_REMAPPED)
> > return;
> >
> > fenceable = (vma->node.size >= vma->fence_size &&
> > diff --git a/drivers/gpu/drm/i915/i915_vma.h b/drivers/gpu/drm/i915/i915_vma.h
> > index 4f7c1c7599f4..64cf029c028a 100644
> > --- a/drivers/gpu/drm/i915/i915_vma.h
> > +++ b/drivers/gpu/drm/i915/i915_vma.h
> > @@ -265,8 +265,11 @@ i915_vma_compare(struct i915_vma *vma,
> > */
> > BUILD_BUG_ON(I915_GGTT_VIEW_NORMAL >= I915_GGTT_VIEW_PARTIAL);
> > BUILD_BUG_ON(I915_GGTT_VIEW_PARTIAL >= I915_GGTT_VIEW_ROTATED);
> > + BUILD_BUG_ON(I915_GGTT_VIEW_ROTATED >= I915_GGTT_VIEW_REMAPPED);
> > BUILD_BUG_ON(offsetof(typeof(*view), rotated) !=
> > offsetof(typeof(*view), partial));
> > + BUILD_BUG_ON(offsetof(typeof(*view), rotated) !=
> > + offsetof(typeof(*view), remapped));
> > return memcmp(&vma->ggtt_view.partial, &view->partial, view->type);
> > }
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 5dc0de89c49e..c17a1723a589 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -1942,6 +1942,17 @@ unsigned int intel_rotation_info_size(const struct intel_rotation_info *rot_info
> > return size;
> > }
> >
> > +unsigned int intel_remapped_info_size(const struct intel_remapped_info *rem_info)
> > +{
> > + unsigned int size = 0;
> > + int i;
> > +
> > + for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++)
> > + size += rem_info->plane[i].width * rem_info->plane[i].height;
> > +
> > + return size;
> > +}
> > +
> > static void
> > intel_fill_fb_ggtt_view(struct i915_ggtt_view *view,
> > const struct drm_framebuffer *fb,
> > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> > index 3b051fdd0fce..7b9b76d5895e 100644
> > --- a/drivers/gpu/drm/i915/intel_drv.h
> > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > @@ -1601,6 +1601,7 @@ unsigned int intel_fb_xy_to_linear(int x, int y,
> > void intel_add_fb_offsets(int *x, int *y,
> > const struct intel_plane_state *state, int plane);
> > unsigned int intel_rotation_info_size(const struct intel_rotation_info *rot_info);
> > +unsigned int intel_remapped_info_size(const struct intel_remapped_info *rem_info);
> > bool intel_has_pending_fb_unpin(struct drm_i915_private *dev_priv);
> > void intel_mark_busy(struct drm_i915_private *dev_priv);
> > void intel_mark_idle(struct drm_i915_private *dev_priv);
> > diff --git a/drivers/gpu/drm/i915/selftests/i915_vma.c b/drivers/gpu/drm/i915/selftests/i915_vma.c
> > index ffa74290e054..4fc49c27f13c 100644
> > --- a/drivers/gpu/drm/i915/selftests/i915_vma.c
> > +++ b/drivers/gpu/drm/i915/selftests/i915_vma.c
> > @@ -395,8 +395,8 @@ assert_rotated(struct drm_i915_gem_object *obj,
> > return sg;
> > }
> >
> > -static unsigned int rotated_size(const struct intel_rotation_plane_info *a,
> > - const struct intel_rotation_plane_info *b)
> > +static unsigned int rotated_size(const struct intel_remapped_plane_info *a,
> > + const struct intel_remapped_plane_info *b)
> > {
> > return a->width * a->height + b->width * b->height;
> > }
> > @@ -406,7 +406,7 @@ static int igt_vma_rotate(void *arg)
> > struct drm_i915_private *i915 = arg;
> > struct i915_address_space *vm = &i915->ggtt.vm;
> > struct drm_i915_gem_object *obj;
> > - const struct intel_rotation_plane_info planes[] = {
> > + const struct intel_remapped_plane_info planes[] = {
>
> Why this?
Just a new name to better reflect the widened scope of the struct.
>
> > { .width = 1, .height = 1, .stride = 1 },
> > { .width = 2, .height = 2, .stride = 2 },
> > { .width = 4, .height = 4, .stride = 4 },
> >
>
> Regards,
>
> Tvrtko
--
Ville Syrjälä
Intel
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v2 1/6] drm/i915: Add a new "remapped" gtt_view
2019-01-15 13:43 ` Ville Syrjälä
@ 2019-01-15 14:18 ` Chris Wilson
2019-01-24 23:24 ` Chris Wilson
1 sibling, 0 replies; 17+ messages in thread
From: Chris Wilson @ 2019-01-15 14:18 UTC (permalink / raw)
To: Tvrtko Ursulin, Ville Syrjälä; +Cc: intel-gfx
Quoting Ville Syrjälä (2019-01-15 13:43:41)
> On Mon, Jan 14, 2019 at 09:55:10AM +0000, Tvrtko Ursulin wrote:
> >
> > On 11/01/2019 19:46, Ville Syrjala wrote:
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > >
> > > To overcome display engine stride limits we'll want to remap the
> > > pages in the GTT. To that end we need a new gtt_view type which
> > > is just like the "rotated" type except not rotated.
> >
> > I think I asked this before, so sorry if you also answered it - what
> > about rotated setups which go over display engine stride limits?
>
> We already have the code to do the rotated mapping.
The worry, that I think Tvrtko shared, is whether the simple formula for
the rotated view could accommodate a rotated, remapped view. Oh, of
course it works out, the rotated view is already calculated on a per-CRTC
subset. Worry not.
-Chris
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v2 1/6] drm/i915: Add a new "remapped" gtt_view
2019-01-15 13:43 ` Ville Syrjälä
2019-01-15 14:18 ` Chris Wilson
@ 2019-01-24 23:24 ` Chris Wilson
1 sibling, 0 replies; 17+ messages in thread
From: Chris Wilson @ 2019-01-24 23:24 UTC (permalink / raw)
To: Tvrtko Ursulin, Ville Syrjälä; +Cc: intel-gfx
Quoting Ville Syrjälä (2019-01-15 13:43:41)
> On Mon, Jan 14, 2019 at 09:55:10AM +0000, Tvrtko Ursulin wrote:
> >
> > On 11/01/2019 19:46, Ville Syrjala wrote:
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > >
> > > To overcome display engine stride limits we'll want to remap the
> > > pages in the GTT. To that end we need a new gtt_view type which
> > > is just like the "rotated" type except not rotated.
> >
> > I think I asked this before, so sorry if you also answered it - what
> > about rotated setups which go over display engine stride limits?
>
> We already have the code to do the rotated mapping.
>
> >
> > > v2: Use intel_remapped_plane_info base type
> > > s/unused/unused_mbz/ (Chris)
> > > Separate BUILD_BUG_ON()s (Chris)
> > > Use I915_GTT_PAGE_SIZE (Chris)
> > > v3: Use i915_gem_object_get_dma_address() (Chris)
> > > Trim the sg (Tvrtko)
> > > v4: Actually trim this time. Limit the max length
> > > to one row of pages to keep things simple
> > >
> > > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > > Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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^ permalink raw reply [flat|nested] 17+ messages in thread
end of thread, other threads:[~2019-01-24 23:24 UTC | newest]
Thread overview: 17+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-01-11 19:46 [PATCH v2 0/6] drm/i915: GTT remapping for display Ville Syrjala
2019-01-11 19:46 ` [PATCH v2 1/6] drm/i915: Add a new "remapped" gtt_view Ville Syrjala
2019-01-14 9:55 ` Tvrtko Ursulin
2019-01-15 10:58 ` Chris Wilson
2019-01-15 11:11 ` Tvrtko Ursulin
2019-01-15 13:43 ` Ville Syrjälä
2019-01-15 14:18 ` Chris Wilson
2019-01-24 23:24 ` Chris Wilson
2019-01-11 19:47 ` [PATCH v2 2/6] drm/i915/selftests: Add mock selftest for remapped vmas Ville Syrjala
2019-01-11 19:47 ` [PATCH v2 3/6] drm/i915/selftests: Add live vma selftest Ville Syrjala
2019-01-11 19:47 ` [PATCH v2 4/6] drm/i915: Overcome display engine stride limits via GTT remapping Ville Syrjala
2019-01-11 19:47 ` [PATCH v2 5/6] drm/i915: Bump gen4+ fb stride limit to 256KiB Ville Syrjala
2019-01-11 19:47 ` [PATCH v2 6/6] drm/i915: Bump gen7+ fb size limits to 16kx16k Ville Syrjala
2019-01-11 20:00 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: GTT remapping for display Patchwork
2019-01-11 20:02 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-01-11 20:18 ` ✓ Fi.CI.BAT: success " Patchwork
2019-01-12 2:57 ` ✗ Fi.CI.IGT: failure " Patchwork
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