[U-Boot] [RFC 00/17] mx6sabre: Add DM and SPL FIT support

[U-Boot] [RFC 00/17] mx6sabre: Add DM and SPL FIT support

[Abel Vesa]

This comes as an answer to the following:

https://lists.denx.de/pipermail/u-boot/2018-November/348078.html
https://lists.denx.de/pipermail/u-boot/2018-November/348062.html

Abel Vesa (17):
  common: Break USB_STORAGE dependency between SPL and u-boot proper
  usb: ehci-mx6: Make regulator DM_REGULATOR dependent
  configs: imx6sabreauto: Add DM_MMC support
  configs: imx6sabreauto: Add DM_USB support
  mmc: fsl_esdhc: Fix DM_REGULATOR ifdefs for SPL builds
  arm: imx: Add board_fit_config_name_match to support FIT in SPL
  dts: imx: Add imx6q-sabreauto dts and imx6qdl-sabreauto dtsi files
  dts: imx: Add imx6q-sabresd dts and imx6qdl-sabresd dtsi files
  arm: imx: Add FIT SPL its
  configs: mx6sabreauto: Add SPL FIT and DM support
  configs: mx6sabresd: Add SPL FIT and DM support
  mx6sabreauto: Add DM_GPIO support
  mx6sabresd: Add DM_GPIO support
  configs: mx6sabreauto: Add DM_SPI_FLASH necessary configs
  configs: mx6sabresd: Add DM_SPI_FLASH necessary configs
  board: mx6sabreauto: Remove the non-DM code
  board: mx6sabresd: Remove non-DM code

 arch/arm/dts/Makefile                       |    4 +-
 arch/arm/dts/imx6q-sabreauto.dts            |   78 ++
 arch/arm/dts/imx6q-sabresd.dts              |   92 +++
 arch/arm/dts/imx6qdl-sabreauto.dtsi         | 1118 +++++++++++++++++++++++++++
 arch/arm/dts/imx6qdl-sabresd.dtsi           | 1065 +++++++++++++++++++++++++
 arch/arm/mach-imx/mx6/fit_spl.its           |   41 +
 arch/arm/mach-imx/spl.c                     |   10 +
 arch/x86/cpu/coreboot/Kconfig               |    1 +
 board/efi/efi-x86_payload/Kconfig           |    1 +
 board/freescale/mx6sabreauto/mx6sabreauto.c |   73 +-
 board/freescale/mx6sabresd/mx6sabresd.c     |   55 +-
 common/Makefile                             |    2 +-
 configs/apalis_imx6_defconfig               |    1 +
 configs/colibri_imx6_defconfig              |    1 +
 configs/mx6sabreauto_defconfig              |   20 +-
 configs/mx6sabresd_defconfig                |   22 +-
 drivers/mmc/fsl_esdhc.c                     |    8 +-
 drivers/usb/Kconfig                         |    9 +
 drivers/usb/host/ehci-mx6.c                 |    7 +-
 19 files changed, 2478 insertions(+), 130 deletions(-)
 create mode 100644 arch/arm/dts/imx6q-sabreauto.dts
 create mode 100644 arch/arm/dts/imx6q-sabresd.dts
 create mode 100644 arch/arm/dts/imx6qdl-sabreauto.dtsi
 create mode 100644 arch/arm/dts/imx6qdl-sabresd.dtsi
 create mode 100644 arch/arm/mach-imx/mx6/fit_spl.its

-- 
2.7.4

[U-Boot] [RFC 01/17] common: Break USB_STORAGE dependency between SPL and u-boot proper

[Abel Vesa]

Some boards might need USB_STORAGE enabled in u-boot proper but not in
SPL. Make a separate config for SPL and keep the same depends on
conditions but for SPL. Also, all the boards that have DISTRO_DEFAULTS
use by default SPL_USB_STORAGE.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 arch/x86/cpu/coreboot/Kconfig     | 1 +
 board/efi/efi-x86_payload/Kconfig | 1 +
 common/Makefile                   | 2 +-
 configs/apalis_imx6_defconfig     | 1 +
 configs/colibri_imx6_defconfig    | 1 +
 configs/mx6sabresd_defconfig      | 1 +
 drivers/usb/Kconfig               | 9 +++++++++
 7 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/arch/x86/cpu/coreboot/Kconfig b/arch/x86/cpu/coreboot/Kconfig
index 93f61f2..2140e9b 100644
--- a/arch/x86/cpu/coreboot/Kconfig
+++ b/arch/x86/cpu/coreboot/Kconfig
@@ -15,6 +15,7 @@ config SYS_COREBOOT
 	imply USB_EHCI_HCD
 	imply USB_XHCI_HCD
 	imply USB_STORAGE
+	imply SPL_USB_STORAGE if SPL_USB_HOST_SUPPORT
 	imply USB_KEYBOARD
 	imply VIDEO_COREBOOT
 	imply E1000
diff --git a/board/efi/efi-x86_payload/Kconfig b/board/efi/efi-x86_payload/Kconfig
index 08dd0c2..36c039d 100644
--- a/board/efi/efi-x86_payload/Kconfig
+++ b/board/efi/efi-x86_payload/Kconfig
@@ -30,6 +30,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	imply USB_EHCI_HCD
 	imply USB_XHCI_HCD
 	imply USB_STORAGE
+	imply SPL_USB_STORAGE if SPL_USB_HOST_SUPPORT
 	imply USB_KEYBOARD
 	imply VIDEO_EFI
 	imply E1000
diff --git a/common/Makefile b/common/Makefile
index 0de60b3..34931f3 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -77,7 +77,7 @@ obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += fdt_support.o
 
 ifdef CONFIG_SPL_USB_HOST_SUPPORT
 obj-$(CONFIG_SPL_USB_SUPPORT) += usb.o usb_hub.o
-obj-$(CONFIG_USB_STORAGE) += usb_storage.o
+obj-$(CONFIG_SPL_USB_STORAGE) += usb_storage.o
 else
 obj-$(CONFIG_USB_MUSB_HOST) += usb.o
 endif
diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig
index e02d9bc..c4916ad 100644
--- a/configs/apalis_imx6_defconfig
+++ b/configs/apalis_imx6_defconfig
@@ -25,6 +25,7 @@ CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_USB_HOST_SUPPORT=y
 CONFIG_SPL_USB_GADGET=y
 CONFIG_SPL_USB_SDP_SUPPORT=y
+CONFIG_SPL_USB_STORAGE=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Apalis iMX6 # "
 CONFIG_CMD_BOOTZ=y
diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig
index 68f0746..441a4e7 100644
--- a/configs/colibri_imx6_defconfig
+++ b/configs/colibri_imx6_defconfig
@@ -25,6 +25,7 @@ CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_USB_HOST_SUPPORT=y
 CONFIG_SPL_USB_GADGET=y
 CONFIG_SPL_USB_SDP_SUPPORT=y
+CONFIG_SPL_USB_STORAGE=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Colibri iMX6 # "
 CONFIG_CMD_BOOTZ=y
diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig
index 1857c18..3532fce 100644
--- a/configs/mx6sabresd_defconfig
+++ b/configs/mx6sabresd_defconfig
@@ -21,6 +21,7 @@ CONFIG_SPL_OS_BOOT=y
 CONFIG_SPL_USB_HOST_SUPPORT=y
 CONFIG_SPL_USB_GADGET=y
 CONFIG_SPL_USB_SDP_SUPPORT=y
+CONFIG_SPL_USB_STORAGE=y
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index 3b53bf2..763d60e 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -89,6 +89,15 @@ config USB_STORAGE
 	  Say Y here if you want to connect USB mass storage devices to your
 	  board's USB port.
 
+config SPL_USB_STORAGE
+	bool "SPL USB Mass Storage support"
+	depends on !(SPL_BLK && !SPL_DM_USB)
+	default y if DISTRO_DEFAULTS
+	---help---
+	  Say Y here if you want to connect USB mass storage devices to your
+	  board's USB port in SPL.
+
+
 config USB_KEYBOARD
 	bool "USB Keyboard support"
 	select SYS_STDIO_DEREGISTER
-- 
2.7.4

[U-Boot] [RFC 02/17] usb: ehci-mx6: Make regulator DM_REGULATOR dependent

[Abel Vesa]

Do the regulator related work only if the build has the DM_REGULATOR.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 drivers/usb/host/ehci-mx6.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index 1acf08d..9483947 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -404,6 +404,7 @@ static int mx6_init_after_reset(struct ehci_ctrl *dev)
 	if (ret)
 		return ret;
 
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
 	if (priv->vbus_supply) {
 		ret = regulator_set_enable(priv->vbus_supply,
 					   (type == USB_INIT_DEVICE) ?
@@ -413,6 +414,7 @@ static int mx6_init_after_reset(struct ehci_ctrl *dev)
 			return ret;
 		}
 	}
+#endif
 
 	if (type == USB_INIT_DEVICE)
 		return 0;
@@ -514,15 +516,17 @@ static int ehci_usb_probe(struct udevice *dev)
 	priv->portnr = dev->seq;
 	priv->init_type = type;
 
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
 	ret = device_get_supply_regulator(dev, "vbus-supply",
 					  &priv->vbus_supply);
 	if (ret)
 		debug("%s: No vbus supply\n", dev->name);
-
+#endif
 	ret = ehci_mx6_common_init(ehci, priv->portnr);
 	if (ret)
 		return ret;
 
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
 	if (priv->vbus_supply) {
 		ret = regulator_set_enable(priv->vbus_supply,
 					   (type == USB_INIT_DEVICE) ?
@@ -532,6 +536,7 @@ static int ehci_usb_probe(struct udevice *dev)
 			return ret;
 		}
 	}
+#endif
 
 	if (priv->init_type == USB_INIT_HOST) {
 		setbits_le32(&ehci->usbmode, CM_HOST);
-- 
2.7.4

[U-Boot] [RFC 03/17] configs: imx6sabreauto: Add DM_MMC support

[Abel Vesa]

Add DM_MMC config to imx6sabreauto defconfig.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 configs/mx6sabreauto_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig
index 8856567..23cb47e 100644
--- a/configs/mx6sabreauto_defconfig
+++ b/configs/mx6sabreauto_defconfig
@@ -43,6 +43,7 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_SF=y
+CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_NAND=y
 CONFIG_NAND_MXS=y
-- 
2.7.4

[U-Boot] [RFC 04/17] configs: imx6sabreauto: Add DM_USB support

[Abel Vesa]

Add the DM support for USB. For that, DM_REGULATOR is needed.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 configs/mx6sabreauto_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig
index 23cb47e..e55c2d9 100644
--- a/configs/mx6sabreauto_defconfig
+++ b/configs/mx6sabreauto_defconfig
@@ -51,9 +51,11 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_MII=y
+CONFIG_DM_REGULATOR=y
 CONFIG_SPI=y
 CONFIG_MXC_SPI=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_MANUFACTURER="FSL"
-- 
2.7.4

[U-Boot] [RFC 05/17] mmc: fsl_esdhc: Fix DM_REGULATOR ifdefs for SPL builds

[Abel Vesa]

Since the fsl_esdhc will also be used by SPL, make the
preprocessor switches more generic to allow any kind of build.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 drivers/mmc/fsl_esdhc.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 99e5882..f6d83c8 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -781,7 +781,7 @@ static int esdhc_set_voltage(struct mmc *mmc)
 	case MMC_SIGNAL_VOLTAGE_330:
 		if (priv->vs18_enable)
 			return -EIO;
-#ifdef CONFIG_DM_REGULATOR
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
 		if (!IS_ERR_OR_NULL(priv->vqmmc_dev)) {
 			ret = regulator_set_value(priv->vqmmc_dev, 3300000);
 			if (ret) {
@@ -800,7 +800,7 @@ static int esdhc_set_voltage(struct mmc *mmc)
 
 		return -EAGAIN;
 	case MMC_SIGNAL_VOLTAGE_180:
-#ifdef CONFIG_DM_REGULATOR
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
 		if (!IS_ERR_OR_NULL(priv->vqmmc_dev)) {
 			ret = regulator_set_value(priv->vqmmc_dev, 1800000);
 			if (ret) {
@@ -1401,7 +1401,7 @@ static int fsl_esdhc_probe(struct udevice *dev)
 	int node = dev_of_offset(dev);
 	struct esdhc_soc_data *data =
 		(struct esdhc_soc_data *)dev_get_driver_data(dev);
-#ifdef CONFIG_DM_REGULATOR
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
 	struct udevice *vqmmc_dev;
 #endif
 	fdt_addr_t addr;
@@ -1459,7 +1459,7 @@ static int fsl_esdhc_probe(struct udevice *dev)
 
 	priv->vs18_enable = 0;
 
-#ifdef CONFIG_DM_REGULATOR
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
 	/*
 	 * If emmc I/O has a fixed voltage at 1.8V, this must be provided,
 	 * otherwise, emmc will work abnormally.
-- 
2.7.4

[U-Boot] [RFC 06/17] arm: imx: Add board_fit_config_name_match to support FIT in SPL

[Abel Vesa]

This function is necessary to enable FIT support in SPL.
Doesn't really do anything.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 arch/arm/mach-imx/spl.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index 397d6d4..2e770c0 100644
--- a/arch/arm/mach-imx/spl.c
+++ b/arch/arm/mach-imx/spl.c
@@ -276,6 +276,16 @@ void board_spl_fit_post_load(ulong load_addr, size_t length)
 
 #endif
 
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+	/* Just empty function now - can't decide what to choose */
+	debug("%s: %s\n", __func__, name);
+
+	return 0;
+}
+#endif
+
 #if defined(CONFIG_MX6) && defined(CONFIG_SPL_OS_BOOT)
 int dram_init_banksize(void)
 {
-- 
2.7.4

[U-Boot] [RFC 07/17] dts: imx: Add imx6q-sabreauto dts and imx6qdl-sabreauto dtsi files

[Abel Vesa]

Add necessary dts and dtsi files in order to enable DM in both
SPL and u-boot proper for mx6sabreauto.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 arch/arm/dts/Makefile               |    3 +-
 arch/arm/dts/imx6q-sabreauto.dts    |   78 +++
 arch/arm/dts/imx6qdl-sabreauto.dtsi | 1118 +++++++++++++++++++++++++++++++++++
 3 files changed, 1198 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/imx6q-sabreauto.dts
 create mode 100644 arch/arm/dts/imx6qdl-sabreauto.dtsi

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index dda4e59..dad5436 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -438,7 +438,8 @@ dtb-$(CONFIG_MX6QDL) += \
 	imx6q-icore.dtb \
 	imx6q-icore-mipi.dtb \
 	imx6q-icore-rqs.dtb \
-	imx6q-logicpd.dtb
+	imx6q-logicpd.dtb \
+	imx6q-sabreauto.dtb
 
 dtb-$(CONFIG_MX6SL) += imx6sl-evk.dtb
 
diff --git a/arch/arm/dts/imx6q-sabreauto.dts b/arch/arm/dts/imx6q-sabreauto.dts
new file mode 100644
index 0000000..60907de
--- /dev/null
+++ b/arch/arm/dts/imx6q-sabreauto.dts
@@ -0,0 +1,78 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2016 Amarula Solutions B.V.
+ * Copyright (C) 2016 Engicam S.r.l.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License
+ *     version 2 as published by the Free Software Foundation.
+ *
+ *     This file is distributed in the hope that it will be useful
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-sabreauto.dtsi"
+
+/ {
+	model = "Freescale i.MX6 Quad SABRE Automotive Board";
+	compatible = "fsl,imx6q-sabreauto", "fsl,imx6q";
+};
+
+/ {
+	soc {
+		u-boot,dm-spl;
+
+		aips-bus at 02000000 {
+			u-boot,dm-spl;
+		};
+
+		aips-bus at 02100000 {
+			u-boot,dm-spl;
+		};
+	};
+};
+
+&gpio1 {
+	u-boot,dm-spl;
+};
+
+&gpio6 {
+	u-boot,dm-spl;
+};
+
+&iomuxc {
+	u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/imx6qdl-sabreauto.dtsi b/arch/arm/dts/imx6qdl-sabreauto.dtsi
new file mode 100644
index 0000000..678e15d
--- /dev/null
+++ b/arch/arm/dts/imx6qdl-sabreauto.dtsi
@@ -0,0 +1,1118 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2012-2015 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	aliases {
+		mxcfb0 = &mxcfb1;
+		mxcfb1 = &mxcfb2;
+		mxcfb2 = &mxcfb3;
+		mxcfb3 = &mxcfb4;
+		mmc0 = &usdhc3;
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys1";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_gpio_keys>;
+
+		home {
+			label = "Home";
+			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
+			gpio-key,wakeup;
+			linux,code = <KEY_HOME>;
+		};
+
+		back {
+			label = "Back";
+			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+			gpio-key,wakeup;
+			linux,code = <KEY_BACK>;
+		};
+
+		program {
+			label = "Program";
+			gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
+			gpio-key,wakeup;
+			linux,code = <KEY_PROGRAM>;
+		};
+
+		volume-up {
+			label = "Volume Up";
+			gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
+			gpio-key,wakeup;
+			linux,code = <KEY_VOLUMEUP>;
+		};
+
+		volume-down {
+			label = "Volume Down";
+			gpios = <&gpio5 14 GPIO_ACTIVE_LOW>;
+			gpio-key,wakeup;
+			linux,code = <KEY_VOLUMEDOWN>;
+		};
+	};
+
+	memory:	memory {
+		reg = <0x10000000 0x80000000>;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_gpio_leds>;
+
+		user {
+			label = "debug";
+			gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	regulators {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		reg_usb_h1_vbus: regulator at 0 {
+			compatible = "regulator-fixed";
+			reg = <0>;
+			regulator-name = "usb_h1_vbus";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			gpio = <&max7310_b 7 GPIO_ACTIVE_HIGH>;
+			enable-active-high;
+		};
+
+		reg_usb_otg_vbus: regulator at 1 {
+			compatible = "regulator-fixed";
+			reg = <1>;
+			regulator-name = "usb_otg_vbus";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			gpio = <&max7310_c 1 GPIO_ACTIVE_HIGH>;
+			enable-active-high;
+		};
+
+		reg_audio: regulator at 2 {
+			compatible = "regulator-fixed";
+			reg = <2>;
+			regulator-name = "cs42888_supply";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			regulator-always-on;
+		};
+
+		reg_3p3v: 3p3v {
+			compatible = "regulator-fixed";
+			regulator-name = "3P3V";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			regulator-always-on;
+		};
+
+		reg_si4763_vio1: regulator at 3 {
+			compatible = "regulator-fixed";
+			reg = <3>;
+			regulator-name = "vio1";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			regulator-always-on;
+		};
+
+		reg_si4763_vio2: regulator at 4 {
+			compatible = "regulator-fixed";
+			reg = <4>;
+			regulator-name = "vio2";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			regulator-always-on;
+		};
+
+		reg_si4763_vd: regulator at 5 {
+			compatible = "regulator-fixed";
+			reg = <5>;
+			regulator-name = "vd";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			regulator-always-on;
+		};
+
+		reg_si4763_va: regulator at 6 {
+			compatible = "regulator-fixed";
+			reg = <6>;
+			regulator-name = "va";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			regulator-always-on;
+		};
+
+		reg_sd3_vmmc: regulator at 7 {
+			compatible = "regulator-fixed";
+			regulator-name = "P3V3_SDa_SWITCHED";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
+			enable-active-high;
+			/* remove below line to enable this regulator */
+			status = "okay";
+		};
+
+		reg_can_en: regulator at 8 {
+			compatible = "regulator-fixed";
+			reg = <8>;
+			regulator-name = "can-en";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			gpio = <&max7310_b 6 GPIO_ACTIVE_HIGH>;
+			enable-active-high;
+		};
+
+		reg_can_stby: regulator at 9 {
+			compatible = "regulator-fixed";
+			reg = <9>;
+			regulator-name = "can-stby";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			gpio = <&max7310_b 5 GPIO_ACTIVE_HIGH>;
+			enable-active-high;
+			vin-supply = <&reg_can_en>;
+		};
+	};
+
+	hannstar_cabc {
+		compatible = "hannstar,cabc";
+
+		lvds_share {
+			gpios = <&max7310_a 0 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	mxcfb1: fb at 0 {
+		compatible = "fsl,mxc_sdc_fb";
+		disp_dev = "ldb";
+		interface_pix_fmt = "RGB666";
+		default_bpp = <16>;
+		int_clk = <0>;
+		late_init = <0>;
+		status = "disabled";
+	};
+
+	mxcfb2: fb at 1 {
+		compatible = "fsl,mxc_sdc_fb";
+		disp_dev = "hdmi";
+		interface_pix_fmt = "RGB24";
+		mode_str ="1920x1080M at 60";
+		default_bpp = <24>;
+		int_clk = <0>;
+		late_init = <0>;
+		status = "disabled";
+	};
+
+	mxcfb3: fb at 2 {
+		compatible = "fsl,mxc_sdc_fb";
+		disp_dev = "lcd";
+		interface_pix_fmt = "RGB565";
+		mode_str ="CLAA-WVGA";
+		default_bpp = <16>;
+		int_clk = <0>;
+		late_init = <0>;
+		status = "disabled";
+	};
+
+	mxcfb4: fb at 3 {
+		compatible = "fsl,mxc_sdc_fb";
+		disp_dev = "ldb";
+		interface_pix_fmt = "RGB666";
+		default_bpp = <16>;
+		int_clk = <0>;
+		late_init = <0>;
+		status = "disabled";
+	};
+
+	clocks {
+		codec_osc: anaclk2 {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <24576000>;
+		};
+	};
+
+	sound-cs42888 {
+		compatible = "fsl,imx6-sabreauto-cs42888",
+				"fsl,imx-audio-cs42888";
+		model = "imx-cs42888";
+		esai-controller = <&esai>;
+		asrc-controller = <&asrc>;
+		audio-codec = <&codec>;
+	};
+
+	sound-fm {
+		compatible = "fsl,imx-audio-si476x",
+			   "fsl,imx-tuner-si476x";
+		model = "imx-radio-si4763";
+		ssi-controller = <&ssi2>;
+		fm-controller = <&si476x_codec>;
+		mux-int-port = <2>;
+		mux-ext-port = <5>;
+	};
+
+	sound-spdif {
+		compatible = "fsl,imx-audio-spdif",
+			   "fsl,imx-sabreauto-spdif";
+		model = "imx-spdif";
+		spdif-controller = <&spdif>;
+		spdif-in;
+	};
+
+	backlight {
+		compatible = "pwm-backlight";
+		pwms = <&pwm3 0 5000000>;
+		brightness-levels = <0 4 8 16 32 64 128 255>;
+		default-brightness-level = <7>;
+		status = "okay";
+	};
+
+	v4l2_cap_0 {
+		compatible = "fsl,imx6q-v4l2-capture";
+		ipu_id = <0>;
+		csi_id = <0>;
+		mclk_source = <0>;
+		status = "okay";
+	};
+
+	v4l2_out {
+		compatible = "fsl,mxc_v4l2_output";
+		status = "okay";
+	};
+};
+
+&audmux {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_audmux>;
+	status = "okay";
+};
+
+&clks {
+	assigned-clocks = <&clks IMX6QDL_PLL4_BYPASS_SRC>,
+			  <&clks IMX6QDL_PLL4_BYPASS>,
+			  <&clks IMX6QDL_CLK_PLL4_POST_DIV>;
+	assigned-clock-parents = <&clks IMX6QDL_CLK_LVDS2_IN>,
+				<&clks IMX6QDL_PLL4_BYPASS_SRC>;
+	assigned-clock-rates = <0>, <0>, <24576000>;
+	fsl,ldb-di0-parent = <&clks IMX6QDL_CLK_PLL2_PFD0_352M>;
+	fsl,ldb-di1-parent = <&clks IMX6QDL_CLK_PLL2_PFD0_352M>;
+};
+
+&dcic1 {
+	dcic_id = <0>;
+	dcic_mux = "dcic-hdmi";
+	status = "okay";
+};
+
+&dcic2 {
+	dcic_id = <1>;
+	dcic_mux = "dcic-lvds0";
+	status = "okay";
+};
+
+&ecspi1 {
+	fsl,spi-num-chipselects = <1>;
+	cs-gpios = <&gpio3 19 0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
+	status = "disabled"; /* pin conflict with WEIM NOR */
+
+	flash: m25p80 at 0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "st,m25p32";
+		spi-max-frequency = <20000000>;
+		reg = <0>;
+	};
+};
+
+&esai {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_esai>;
+	assigned-clocks = <&clks IMX6QDL_CLK_ESAI_SEL>,
+			  <&clks IMX6QDL_CLK_ESAI_EXTAL>;
+	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
+	assigned-clock-rates = <0>, <24576000>;
+	status = "okay";
+};
+
+&fec {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_enet>;
+	phy-mode = "rgmii";
+	fsl,magic-packet;
+	status = "okay";
+};
+
+&can1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_flexcan1>;
+	pinctrl-assert-gpios = <&max7310_b 3 GPIO_ACTIVE_HIGH>; /* TX */
+	xceiver-supply = <&reg_can_stby>;
+	status = "disabled"; /* pin conflict with fec */
+};
+
+&can2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_flexcan2>;
+	xceiver-supply = <&reg_can_stby>;
+	status = "okay";
+};
+
+&gpmi {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_gpmi_nand>;
+	status = "disabled"; /* pin conflict with uart3 */
+	nand-on-flash-bbt;
+};
+
+&i2c2 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default", "gpio";
+	pinctrl-0 = <&pinctrl_i2c2>;
+	pinctrl-1 = <&pinctrl_i2c2_gpio>;
+	scl-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>;
+	sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
+	status = "okay";
+
+	egalax_ts at 04 {
+		compatible = "eeti,egalax_ts";
+		reg = <0x04>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_egalax_int>;
+		interrupt-parent = <&gpio2>;
+		interrupts = <28 2>;
+		wakeup-gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>;
+	};
+
+	pmic: pfuze100 at 08 {
+		compatible = "fsl,pfuze100";
+		reg = <0x08>;
+
+		regulators {
+			sw1a_reg: sw1ab {
+				regulator-min-microvolt = <300000>;
+				regulator-max-microvolt = <1875000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-ramp-delay = <6250>;
+			};
+
+			sw1c_reg: sw1c {
+				regulator-min-microvolt = <300000>;
+				regulator-max-microvolt = <1875000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-ramp-delay = <6250>;
+			};
+
+			sw2_reg: sw2 {
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			sw3a_reg: sw3a {
+				regulator-min-microvolt = <400000>;
+				regulator-max-microvolt = <1975000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			sw3b_reg: sw3b {
+				regulator-min-microvolt = <400000>;
+				regulator-max-microvolt = <1975000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			sw4_reg: sw4 {
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			swbst_reg: swbst {
+				regulator-min-microvolt = <5000000>;
+				regulator-max-microvolt = <5150000>;
+			};
+
+			snvs_reg: vsnvs {
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			vref_reg: vrefddr {
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			vgen1_reg: vgen1 {
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <1550000>;
+			};
+
+			vgen2_reg: vgen2 {
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <1550000>;
+			};
+
+			vgen3_reg: vgen3 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			vgen4_reg: vgen4 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+
+			vgen5_reg: vgen5 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+
+			vgen6_reg: vgen6 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+		};
+	};
+
+	codec: cs42888 at 48 {
+		compatible = "cirrus,cs42888";
+		reg = <0x48>;
+		clocks = <&codec_osc>;
+		clock-names = "mclk";
+		VA-supply = <&reg_audio>;
+		VD-supply = <&reg_audio>;
+		VLS-supply = <&reg_audio>;
+		VLC-supply = <&reg_audio>;
+	};
+
+	si4763: si4763 at 63 {
+		compatible = "si4761";
+		reg = <0x63>;
+		va-supply = <&reg_si4763_va>;
+		vd-supply = <&reg_si4763_vd>;
+		vio1-supply = <&reg_si4763_vio1>;
+		vio2-supply = <&reg_si4763_vio2>;
+		revision-a10; /* set to default A10 compatible command set */
+
+		si476x_codec: si476x-codec {
+			compatible = "si476x-codec";
+		};
+	};
+};
+
+&i2c3 {
+	pinctrl-names = "default", "gpio";
+	pinctrl-0 = <&pinctrl_i2c3>;
+	pinctrl-1 = <&pinctrl_i2c3_gpio>;
+	scl-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
+	sda-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
+	status = "okay";
+
+	adv7180: adv7180 at 21 {
+		compatible = "adv,adv7180";
+		reg = <0x21>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_ipu1_1>;
+		clocks = <&clks IMX6QDL_CLK_CKO>;
+		clock-names = "csi_mclk";
+		DOVDD-supply = <&reg_3p3v>; /* 3.3v, enabled via 2.8 VGEN6 */
+		AVDD-supply = <&reg_3p3v>;  /* 1.8v */
+		DVDD-supply = <&reg_3p3v>;  /* 1.8v */
+		PVDD-supply = <&reg_3p3v>;  /* 1.8v */
+		pwn-gpios = <&max7310_b 2 0>;
+		csi_id = <0>;
+		mclk = <24000000>;
+		mclk_source = <0>;
+		cvbs = <1>;
+	};
+
+	isl29023 at 44 {
+		compatible = "fsl,isl29023";
+		reg = <0x44>;
+		rext = <499>;
+		interrupt-parent = <&gpio5>;
+		interrupts = <17 2>;
+	};
+
+	max7310_a: gpio at 30 {
+		compatible = "maxim,max7310";
+		reg = <0x30>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+
+	max7310_b: gpio at 32 {
+		compatible = "maxim,max7310";
+		reg = <0x32>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+
+	max7310_c: gpio at 34 {
+		compatible = "maxim,max7310";
+		reg = <0x34>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+
+	mag3110 at 0e {
+		compatible = "fsl,mag3110";
+		reg = <0x0e>;
+		position = <2>;
+		interrupt-parent = <&gpio2>;
+		interrupts = <29 1>;
+	};
+
+	mma8451 at 1c {
+		compatible = "fsl,mma8451";
+		reg = <0x1c>;
+		position = <7>;
+		interrupt-parent = <&gpio6>;
+		interrupts = <31 8>;
+		interrupt-route = <1>;
+	};
+};
+
+&iomuxc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_hog>;
+
+	imx6qdl-sabreauto {
+		pinctrl_audmux: audmux {
+			fsl,pins = <
+				MX6QDL_PAD_DISP0_DAT16__AUD5_TXC  0x130b0
+				MX6QDL_PAD_DISP0_DAT18__AUD5_TXFS 0x130b0
+				MX6QDL_PAD_DISP0_DAT19__AUD5_RXD  0x130b0
+			>;
+		};
+
+		pinctrl_hog: hoggrp {
+			fsl,pins = <
+				MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1f059
+				MX6QDL_PAD_SD2_DAT2__GPIO1_IO13  0x80000000
+				MX6QDL_PAD_GPIO_18__SD3_VSELECT 0x17059
+				MX6QDL_PAD_EIM_A24__GPIO5_IO04   0x80000000
+				MX6QDL_PAD_SD2_DAT0__GPIO1_IO15  0x80000000
+				MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x80000000
+				MX6QDL_PAD_EIM_EB1__GPIO2_IO29	0x80000000
+				MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x80000000
+				MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000
+				MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x17059
+				MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x17059
+			>;
+		};
+
+		pinctrl_ecspi1: ecspi1grp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1
+				MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1
+				MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1
+			>;
+		};
+
+		pinctrl_ecspi1_cs: ecspi1cs {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
+			>;
+		};
+
+		pinctrl_egalax_int: egalax_intgrp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x80000000
+			>;
+		};
+
+		pinctrl_enet: enetgrp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL1__ENET_MDIO		0x1b0b0
+				MX6QDL_PAD_KEY_COL2__ENET_MDC		0x1b0b0
+				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b0b0
+				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b0b0
+				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b0b0
+				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b0b0
+				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b0b0
+				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b0b0
+				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
+				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
+				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b0b0
+				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b0b0
+				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b0b0
+				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b0b0
+				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b0b0
+				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
+			>;
+		};
+
+		pinctrl_enet_irq: enetirqgrp {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1
+			>;
+		};
+
+		pinctrl_esai: esaigrp {
+			fsl,pins = <
+				MX6QDL_PAD_ENET_CRS_DV__ESAI_TX_CLK 0x1b030
+				MX6QDL_PAD_ENET_RXD1__ESAI_TX_FS    0x1b030
+				MX6QDL_PAD_ENET_TX_EN__ESAI_TX3_RX2 0x1b030
+				MX6QDL_PAD_GPIO_5__ESAI_TX2_RX3     0x1b030
+				MX6QDL_PAD_ENET_TXD0__ESAI_TX4_RX1  0x1b030
+				MX6QDL_PAD_ENET_MDC__ESAI_TX5_RX0   0x1b030
+				MX6QDL_PAD_GPIO_17__ESAI_TX0        0x1b030
+				MX6QDL_PAD_NANDF_CS3__ESAI_TX1      0x1b030
+				MX6QDL_PAD_ENET_MDIO__ESAI_RX_CLK   0x1b030
+				MX6QDL_PAD_GPIO_9__ESAI_RX_FS       0x1b030
+			>;
+		};
+
+		pinctrl_flexcan1: flexcan1grp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX        0x17059
+				MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x17059
+			>;
+		};
+
+		pinctrl_flexcan2: flexcan2grp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX	0x17059
+				MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX	0x17059
+			>;
+		};
+
+		pinctrl_gpio_keys: gpio_keysgrp {
+			fsl,pins = <
+				MX6QDL_PAD_SD2_CMD__GPIO1_IO11	0x1b0b0
+				MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x1b0b0
+				MX6QDL_PAD_SD4_DAT4__GPIO2_IO12 0x1b0b0
+				MX6QDL_PAD_SD4_DAT7__GPIO2_IO15	0x1b0b0
+				MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x1b0b0
+			>;
+		};
+
+		pinctrl_gpio_leds: gpioledsgrp {
+			fsl,pins = <
+				MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15	0x80000000
+			>;
+		};
+
+		pinctrl_gpmi_nand: gpminandgrp {
+			fsl,pins = <
+				MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
+				MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
+				MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
+				MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000
+				MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
+				MX6QDL_PAD_NANDF_CS1__NAND_CE1_B	0xb0b1
+				MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
+				MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
+				MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
+				MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
+				MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
+				MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
+				MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
+				MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
+				MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
+				MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
+				MX6QDL_PAD_SD4_DAT0__NAND_DQS		0x00b1
+			>;
+		};
+
+		pinctrl_i2c2: i2c2grp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_EB2__I2C2_SCL	0x4001b8b1
+				MX6QDL_PAD_KEY_ROW3__I2C2_SDA	0x4001b8b1
+			>;
+		};
+
+		pinctrl_i2c2_gpio: i2c2grp_gpio {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_EB2__GPIO2_IO30    0x1b8b1
+				MX6QDL_PAD_KEY_ROW3__GPIO4_IO13   0x1b8b1
+			>;
+		};
+
+		pinctrl_ipu1_1: ipu1grp-1 { /* parallel port 16-bit */
+			fsl,pins = <
+				MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04   0x80000000
+				MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05   0x80000000
+				MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06   0x80000000
+				MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07   0x80000000
+				MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08   0x80000000
+				MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09   0x80000000
+				MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10  0x80000000
+				MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11  0x80000000
+				MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12  0x80000000
+				MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13  0x80000000
+				MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14  0x80000000
+				MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15  0x80000000
+				MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16  0x80000000
+				MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17  0x80000000
+				MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18  0x80000000
+				MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19  0x80000000
+				MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x80000000
+				MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC    0x80000000
+				MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC   0x80000000
+			>;
+		};
+
+		pinctrl_i2c3: i2c3grp {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_3__I2C3_SCL  0x4001b8b1
+				MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
+			>;
+		};
+
+		pinctrl_i2c3_gpio: i2c3grp_gpio {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_3__GPIO1_IO03  0x1b8b1
+				MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x1b8b1
+			>;
+		};
+
+		pinctrl_pwm3: pwm1grp {
+			fsl,pins = <
+				MX6QDL_PAD_SD4_DAT1__PWM3_OUT		0x1b0b1
+			>;
+		};
+
+		pinctrl_spdif: spdifgrp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL3__SPDIF_IN 0x1b0b0
+			>;
+		};
+
+		pinctrl_uart3_1: uart3grp-1 {
+			fsl,pins = <
+				MX6QDL_PAD_SD4_CLK__UART3_RX_DATA	0x1b0b1
+				MX6QDL_PAD_SD4_CMD__UART3_TX_DATA	0x1b0b1
+				MX6QDL_PAD_EIM_D30__UART3_CTS_B		0x1b0b1
+				MX6QDL_PAD_EIM_EB3__UART3_RTS_B		0x1b0b1
+			>;
+		};
+
+		pinctrl_uart3dte_1: uart3dtegrp-1 {
+			fsl,pins = <
+				MX6QDL_PAD_SD4_CLK__UART3_TX_DATA	0x1b0b1
+				MX6QDL_PAD_SD4_CMD__UART3_RX_DATA	0x1b0b1
+				MX6QDL_PAD_EIM_D30__UART3_RTS_B		0x1b0b1
+				MX6QDL_PAD_EIM_EB3__UART3_CTS_B		0x1b0b1
+			>;
+		};
+
+		pinctrl_uart4: uart4grp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1
+				MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1
+			>;
+		};
+
+		pinctrl_usbotg: usbotggrp {
+			fsl,pins = <
+				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
+			>;
+		};
+
+		pinctrl_usdhc1: usdhc1grp {
+			fsl,pins = <
+				MX6QDL_PAD_SD1_CMD__SD1_CMD             0x17071
+				MX6QDL_PAD_SD1_CLK__SD1_CLK             0x10071
+				MX6QDL_PAD_SD1_DAT0__SD1_DATA0          0x17071
+				MX6QDL_PAD_SD1_DAT1__SD1_DATA1          0x17071
+				MX6QDL_PAD_SD1_DAT2__SD1_DATA2          0x17071
+				MX6QDL_PAD_SD1_DAT3__SD1_DATA3          0x17071
+			>;
+		};
+
+		pinctrl_usdhc3: usdhc3grp {
+			fsl,pins = <
+				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
+				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
+				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
+				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
+				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
+				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
+				MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x17059
+				MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x17059
+				MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x17059
+				MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059
+			>;
+		};
+
+		pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
+			fsl,pins = <
+				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170b9
+				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x100b9
+				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170b9
+				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170b9
+				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170b9
+				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170b9
+				MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x170b9
+				MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x170b9
+				MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x170b9
+				MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x170b9
+			>;
+		};
+
+		pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
+			u-boot,dm-spl;
+			fsl,pins = <
+				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170f9
+				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x100f9
+				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170f9
+				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170f9
+				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170f9
+				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170f9
+				MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x170f9
+				MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x170f9
+				MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x170f9
+				MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x170f9
+			>;
+		};
+
+		pinctrl_weim_cs0: weimcs0grp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_CS0__EIM_CS0_B		0xb0b1
+			>;
+		};
+
+		pinctrl_weim_nor: weimnorgrp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_OE__EIM_OE_B		0xb0b1
+				MX6QDL_PAD_EIM_RW__EIM_RW		0xb0b1
+				MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B		0xb060
+				MX6QDL_PAD_EIM_D16__EIM_DATA16		0x1b0b0
+				MX6QDL_PAD_EIM_D17__EIM_DATA17		0x1b0b0
+				MX6QDL_PAD_EIM_D18__EIM_DATA18		0x1b0b0
+				MX6QDL_PAD_EIM_D19__EIM_DATA19		0x1b0b0
+				MX6QDL_PAD_EIM_D20__EIM_DATA20		0x1b0b0
+				MX6QDL_PAD_EIM_D21__EIM_DATA21		0x1b0b0
+				MX6QDL_PAD_EIM_D22__EIM_DATA22		0x1b0b0
+				MX6QDL_PAD_EIM_D23__EIM_DATA23		0x1b0b0
+				MX6QDL_PAD_EIM_D24__EIM_DATA24		0x1b0b0
+				MX6QDL_PAD_EIM_D25__EIM_DATA25		0x1b0b0
+				MX6QDL_PAD_EIM_D26__EIM_DATA26		0x1b0b0
+				MX6QDL_PAD_EIM_D27__EIM_DATA27		0x1b0b0
+				MX6QDL_PAD_EIM_D28__EIM_DATA28		0x1b0b0
+				MX6QDL_PAD_EIM_D29__EIM_DATA29		0x1b0b0
+				MX6QDL_PAD_EIM_D30__EIM_DATA30		0x1b0b0
+				MX6QDL_PAD_EIM_D31__EIM_DATA31		0x1b0b0
+				MX6QDL_PAD_EIM_A23__EIM_ADDR23		0xb0b1
+				MX6QDL_PAD_EIM_A22__EIM_ADDR22		0xb0b1
+				MX6QDL_PAD_EIM_A21__EIM_ADDR21		0xb0b1
+				MX6QDL_PAD_EIM_A20__EIM_ADDR20		0xb0b1
+				MX6QDL_PAD_EIM_A19__EIM_ADDR19		0xb0b1
+				MX6QDL_PAD_EIM_A18__EIM_ADDR18		0xb0b1
+				MX6QDL_PAD_EIM_A17__EIM_ADDR17		0xb0b1
+				MX6QDL_PAD_EIM_A16__EIM_ADDR16		0xb0b1
+				MX6QDL_PAD_EIM_DA15__EIM_AD15		0xb0b1
+				MX6QDL_PAD_EIM_DA14__EIM_AD14		0xb0b1
+				MX6QDL_PAD_EIM_DA13__EIM_AD13		0xb0b1
+				MX6QDL_PAD_EIM_DA12__EIM_AD12		0xb0b1
+				MX6QDL_PAD_EIM_DA11__EIM_AD11		0xb0b1
+				MX6QDL_PAD_EIM_DA10__EIM_AD10		0xb0b1
+				MX6QDL_PAD_EIM_DA9__EIM_AD09		0xb0b1
+				MX6QDL_PAD_EIM_DA8__EIM_AD08		0xb0b1
+				MX6QDL_PAD_EIM_DA7__EIM_AD07		0xb0b1
+				MX6QDL_PAD_EIM_DA6__EIM_AD06		0xb0b1
+				MX6QDL_PAD_EIM_DA5__EIM_AD05		0xb0b1
+				MX6QDL_PAD_EIM_DA4__EIM_AD04		0xb0b1
+				MX6QDL_PAD_EIM_DA3__EIM_AD03		0xb0b1
+				MX6QDL_PAD_EIM_DA2__EIM_AD02		0xb0b1
+				MX6QDL_PAD_EIM_DA1__EIM_AD01		0xb0b1
+				MX6QDL_PAD_EIM_DA0__EIM_AD00		0xb0b1
+			>;
+		};
+
+	};
+};
+
+&ldb {
+	status = "okay";
+
+	lvds-channel at 0 {
+		fsl,data-mapping = "spwg";
+		fsl,data-width = <18>;
+		primary;
+		status = "okay";
+
+		display-timings {
+			native-mode = <&timing0>;
+			timing0: hsd100pxn1 {
+				clock-frequency = <65000000>;
+				hactive = <1024>;
+				vactive = <768>;
+				hback-porch = <220>;
+				hfront-porch = <40>;
+				vback-porch = <21>;
+				vfront-porch = <7>;
+				hsync-len = <60>;
+				vsync-len = <10>;
+			};
+		};
+	};
+
+	lvds-channel at 1 {
+		fsl,data-mapping = "spwg";
+		fsl,data-width = <18>;
+		status = "okay";
+
+		display-timings {
+			native-mode = <&timing1>;
+			timing1: hsd100pxn1 {
+				clock-frequency = <65000000>;
+				hactive = <1024>;
+				vactive = <768>;
+				hback-porch = <220>;
+				hfront-porch = <40>;
+				vback-porch = <21>;
+				vfront-porch = <7>;
+				hsync-len = <60>;
+				vsync-len = <10>;
+			};
+		};
+	};
+};
+
+&pwm3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm3>;
+	status = "okay";
+};
+
+&pcie {
+	status = "okay";
+};
+
+&spdif {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_spdif>;
+	assigned-clocks = <&clks IMX6QDL_CLK_SPDIF_SEL>,
+			  <&clks IMX6QDL_CLK_SPDIF_PODF>;
+	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_PFD3_454M>;
+	assigned-clock-rates = <0>, <227368421>;
+	status = "okay";
+};
+
+&snvs_poweroff {
+	status = "okay";
+};
+
+&ssi2 {
+	assigned-clocks = <&clks IMX6QDL_CLK_SSI2_SEL>;
+	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
+	assigned-clock-rates = <0>;
+	fsl,mode = "i2s-master";
+	status = "okay";
+};
+
+&uart3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart3_1>;
+	pinctrl-assert-gpios = <&max7310_b 4 GPIO_ACTIVE_HIGH>, /* CTS */
+			       <&max7310_c 3 GPIO_ACTIVE_HIGH>; /* RXD and TXD */
+	fsl,uart-has-rtscts;
+	status = "okay";
+	/* for DTE mode, add below change */
+	/* fsl,dte-mode; */
+	/* pinctrl-0 = <&pinctrl_uart3dte_1>; */
+};
+
+&uart4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart4>;
+	status = "okay";
+};
+
+&usbh1 {
+	vbus-supply = <&reg_usb_h1_vbus>;
+	status = "okay";
+};
+
+&usbotg {
+	vbus-supply = <&reg_usb_otg_vbus>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usbotg>;
+	srp-disable;
+	hnp-disable;
+	adp-disable;
+	status = "okay";
+};
+
+&usdhc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usdhc1>;
+	cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
+	no-1-8-v;
+	keep-power-in-suspend;
+	enable-sdio-wakeup;
+	status = "okay";
+};
+
+&usdhc3 {
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc3>;
+	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+	cd-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>;
+	wp-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
+	/*
+	 * Due to board issue, we can not use external regulator for card slot
+	 * by default since the card power is shared with card detect pullup.
+	 * Disabling the vmmc regulator will cause unexpected card detect
+	 * interrupts.
+	 * HW rework is needed to fix this issue. Remove R695 first, then you
+	 * can open below line to enable the using of external regulator.
+	 * Then you will be able to power off the card during suspend. This is
+	 * especially needed for a SD3.0 card re-enumeration working on UHS mode
+	 * Note: reg_sd3_vmmc is also need to be enabled
+	 */
+	/* vmmc-supply = <&reg_sd3_vmmc>; */
+	keep-power-in-suspend;
+	enable-sdio-wakeup;
+	u-boot,dm-spl;
+	status = "okay";
+};
+
+&weim {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_weim_nor &pinctrl_weim_cs0>;
+	#address-cells = <2>;
+	#size-cells = <1>;
+	ranges = <0 0 0x08000000 0x08000000>;
+	status = "disabled"; /* pin conflict with SPI NOR */
+
+	nor at 0,0 {
+		compatible = "cfi-flash";
+		reg = <0 0 0x02000000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		bank-width = <2>;
+		fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000
+				0x0000c000 0x1404a38e 0x00000000>;
+	};
+};
-- 
2.7.4

[U-Boot] [RFC 08/17] dts: imx: Add imx6q-sabresd dts and imx6qdl-sabresd dtsi files

[Abel Vesa]

Add necessary dts and dtsi files in order to enable DM in both
SPL and u-boot proper for mx6sabresd.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 arch/arm/dts/Makefile             |    3 +-
 arch/arm/dts/imx6q-sabresd.dts    |   92 ++++
 arch/arm/dts/imx6qdl-sabresd.dtsi | 1065 +++++++++++++++++++++++++++++++++++++
 3 files changed, 1159 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/imx6q-sabresd.dts
 create mode 100644 arch/arm/dts/imx6qdl-sabresd.dtsi

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index dad5436..1614a19 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -439,7 +439,8 @@ dtb-$(CONFIG_MX6QDL) += \
 	imx6q-icore-mipi.dtb \
 	imx6q-icore-rqs.dtb \
 	imx6q-logicpd.dtb \
-	imx6q-sabreauto.dtb
+	imx6q-sabreauto.dtb \
+	imx6q-sabresd.dtb
 
 dtb-$(CONFIG_MX6SL) += imx6sl-evk.dtb
 
diff --git a/arch/arm/dts/imx6q-sabresd.dts b/arch/arm/dts/imx6q-sabresd.dts
new file mode 100644
index 0000000..d9cdb20
--- /dev/null
+++ b/arch/arm/dts/imx6q-sabresd.dts
@@ -0,0 +1,92 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2012=2015 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-sabresd.dtsi"
+
+/ {
+	model = "Freescale i.MX6 Quad SABRE Smart Device Board";
+	compatible = "fsl,imx6q-sabresd", "fsl,imx6q";
+};
+
+/ {
+	soc {
+		u-boot,dm-spl;
+
+		aips-bus at 02000000 {
+			u-boot,dm-spl;
+		};
+
+		aips-bus at 02100000 {
+			u-boot,dm-spl;
+		};
+	};
+};
+
+&gpio1 {
+	u-boot,dm-spl;
+};
+
+&gpio2 {
+	u-boot,dm-spl;
+};
+
+&gpio6 {
+	u-boot,dm-spl;
+};
+
+&gpio1 {
+	u-boot,dm-spl;
+};
+
+&iomuxc {
+	u-boot,dm-spl;
+};
+
+&battery {
+	offset-charger = <1900>;
+	offset-discharger = <1694>;
+	offset-usb-charger = <1685>;
+};
+
+&ldb {
+	lvds-channel at 0 {
+		crtc = "ipu2-di0";
+	};
+
+	lvds-channel at 1 {
+		crtc = "ipu2-di1";
+	};
+};
+
+&mxcfb1 {
+	status = "okay";
+};
+
+&mxcfb2 {
+	status = "okay";
+};
+
+&mxcfb3 {
+	status = "okay";
+};
+
+&mxcfb4 {
+	status = "okay";
+};
+
+&sata {
+	status = "okay";
+};
diff --git a/arch/arm/dts/imx6qdl-sabresd.dtsi b/arch/arm/dts/imx6qdl-sabresd.dtsi
new file mode 100644
index 0000000..09b2591
--- /dev/null
+++ b/arch/arm/dts/imx6qdl-sabresd.dtsi
@@ -0,0 +1,1065 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2012-2016 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	aliases {
+		mxcfb0 = &mxcfb1;
+		mxcfb1 = &mxcfb2;
+		mxcfb2 = &mxcfb3;
+		mxcfb3 = &mxcfb4;
+		mmc1 = &usdhc3;
+	};
+
+	battery: max8903 at 0 {
+		compatible = "fsl,max8903-charger";
+		pinctrl-names = "default";
+		dok_input = <&gpio2 24 1>;
+		uok_input = <&gpio1 27 1>;
+		chg_input = <&gpio3 23 1>;
+		flt_input = <&gpio5 2 1>;
+		fsl,dcm_always_high;
+		fsl,dc_valid;
+		fsl,usb_valid;
+		status = "okay";
+	};
+
+	hannstar_cabc {
+		compatible = "hannstar,cabc";
+		lvds0 {
+			gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
+		};
+		lvds1 {
+			gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	chosen {
+		stdout-path = &uart1;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		charger-led {
+			gpios = <&gpio1 2 0>;
+			linux,default-trigger = "max8903-charger-charging";
+			retain-state-suspended;
+		};
+	};
+
+	memory: memory {
+		reg = <0x10000000 0x40000000>;
+	};
+
+	regulators {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		reg_usb_otg_vbus: regulator at 0 {
+			compatible = "regulator-fixed";
+			reg = <0>;
+			regulator-name = "usb_otg_vbus";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			gpio = <&gpio3 22 0>;
+			enable-active-high;
+			vin-supply = <&swbst_reg>;
+		};
+
+		reg_usb_h1_vbus: regulator at 1 {
+			compatible = "regulator-fixed";
+			reg = <1>;
+			regulator-name = "usb_h1_vbus";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			gpio = <&gpio1 29 0>;
+			enable-active-high;
+			vin-supply = <&swbst_reg>;
+		};
+
+		reg_audio: regulator at 2 {
+			compatible = "regulator-fixed";
+			reg = <2>;
+			regulator-name = "wm8962-supply";
+			gpio = <&gpio4 10 0>;
+			enable-active-high;
+		};
+
+		reg_pcie: regulator at 3 {
+			compatible = "regulator-fixed";
+			reg = <3>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_pcie_reg>;
+			regulator-name = "MPCIE_3V3";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			gpio = <&gpio3 19 0>;
+			regulator-always-on;
+			enable-active-high;
+		};
+
+		reg_sensor: regulator at 4 {
+			compatible = "regulator-fixed";
+			reg = <4>;
+			regulator-name = "sensor-supply";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			gpio = <&gpio2 31 0>;
+			startup-delay-us = <500>;
+			enable-active-high;
+		};
+
+		reg_hdmi: regulator at 5 {
+			compatible = "regulator-fixed";
+			reg = <5>;
+			regulator-name = "hdmi-5v-supply";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			enable-active-high;
+			hdmi-5v-supply = <&swbst_reg>;
+		};
+
+		reg_mipi_dsi_pwr_on: mipi_dsi_pwr_on {
+			compatible = "regulator-fixed";
+			regulator-name = "mipi_dsi_pwr_on";
+			gpio = <&gpio6 14 0>;
+			enable-active-high;
+		};
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_gpio_keys>;
+
+		power {
+			label = "Power Button";
+			gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
+			gpio-key,wakeup;
+			linux,code = <KEY_POWER>;
+		};
+
+		volume-up {
+			label = "Volume Up";
+			gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
+			gpio-key,wakeup;
+			linux,code = <KEY_VOLUMEUP>;
+		};
+
+		volume-down {
+			label = "Volume Down";
+			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
+			gpio-key,wakeup;
+			linux,code = <KEY_VOLUMEDOWN>;
+		};
+	};
+
+	sound {
+		compatible = "fsl,imx6q-sabresd-wm8962",
+			   "fsl,imx-audio-wm8962";
+		model = "wm8962-audio";
+		cpu-dai = <&ssi2>;
+		audio-codec = <&codec>;
+		asrc-controller = <&asrc>;
+		audio-routing =
+			"Headphone Jack", "HPOUTL",
+			"Headphone Jack", "HPOUTR",
+			"Ext Spk", "SPKOUTL",
+			"Ext Spk", "SPKOUTR",
+			"AMIC", "MICBIAS",
+			"IN3R", "AMIC",
+			"DMIC", "MICBIAS",
+			"DMICDAT", "DMIC",
+			"CPU-Playback", "ASRC-Playback",
+			"Playback", "CPU-Playback",
+			"ASRC-Capture", "CPU-Capture",
+			"CPU-Capture", "Capture";
+		mux-int-port = <2>;
+		mux-ext-port = <3>;
+		codec-master;
+		hp-det-gpios = <&gpio7 8 1>;
+		mic-det-gpios = <&gpio1 9 1>;
+	};
+
+	mxcfb1: fb at 0 {
+		compatible = "fsl,mxc_sdc_fb";
+		disp_dev = "ldb";
+		interface_pix_fmt = "RGB666";
+		default_bpp = <16>;
+		int_clk = <0>;
+		late_init = <0>;
+		status = "disabled";
+	};
+
+	mxcfb2: fb at 1 {
+		compatible = "fsl,mxc_sdc_fb";
+		disp_dev = "hdmi";
+		interface_pix_fmt = "RGB24";
+		mode_str ="1920x1080M at 60";
+		default_bpp = <24>;
+		int_clk = <0>;
+		late_init = <0>;
+		status = "disabled";
+	};
+
+	mxcfb3: fb at 2 {
+		compatible = "fsl,mxc_sdc_fb";
+		disp_dev = "lcd";
+		interface_pix_fmt = "RGB565";
+		mode_str ="CLAA-WVGA";
+		default_bpp = <16>;
+		int_clk = <0>;
+		late_init = <0>;
+		status = "disabled";
+	};
+
+	mxcfb4: fb at 3 {
+		compatible = "fsl,mxc_sdc_fb";
+		disp_dev = "ldb";
+		interface_pix_fmt = "RGB666";
+		default_bpp = <16>;
+		int_clk = <0>;
+		late_init = <0>;
+		status = "disabled";
+	};
+
+	lcd at 0 {
+		compatible = "fsl,lcd";
+		ipu_id = <0>;
+		disp_id = <0>;
+		default_ifmt = "RGB565";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_ipu1>;
+		status = "okay";
+	};
+
+	backlight {
+		compatible = "pwm-backlight";
+		pwms = <&pwm1 0 5000000>;
+		brightness-levels = <0 4 8 16 32 64 128 255>;
+		default-brightness-level = <7>;
+		status = "okay";
+	};
+
+	v4l2_cap_0 {
+		compatible = "fsl,imx6q-v4l2-capture";
+		ipu_id = <0>;
+		csi_id = <0>;
+		mclk_source = <0>;
+		status = "okay";
+	};
+
+	v4l2_cap_1 {
+		compatible = "fsl,imx6q-v4l2-capture";
+		ipu_id = <0>;
+		csi_id = <1>;
+		mclk_source = <0>;
+		status = "okay";
+	};
+
+	v4l2_out {
+		compatible = "fsl,mxc_v4l2_output";
+		status = "okay";
+	};
+
+	mipi_dsi_reset: mipi-dsi-reset {
+		compatible = "gpio-reset";
+		reset-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
+		reset-delay-us = <50>;
+		#reset-cells = <0>;
+	};
+};
+
+&audmux {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_audmux>;
+	status = "okay";
+};
+
+&cpu0 {
+	arm-supply = <&sw1a_reg>;
+	soc-supply = <&sw1c_reg>;
+};
+
+&clks {
+	fsl,ldb-di0-parent = <&clks IMX6QDL_CLK_PLL2_PFD0_352M>;
+	fsl,ldb-di1-parent = <&clks IMX6QDL_CLK_PLL2_PFD0_352M>;
+};
+
+&ecspi1 {
+	fsl,spi-num-chipselects = <1>;
+	cs-gpios = <&gpio4 9 0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_ecspi1>;
+	status = "okay";
+
+	flash: m25p80 at 0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "st,m25p32";
+		spi-max-frequency = <20000000>;
+		reg = <0>;
+	};
+};
+
+&fec {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_enet>;
+	phy-mode = "rgmii";
+	phy-reset-gpios = <&gpio1 25 0>;
+	fsl,magic-packet;
+	status = "okay";
+};
+
+&gpc {
+	fsl,ldo-bypass = <1>;
+};
+
+&dcic1 {
+	dcic_id = <0>;
+	dcic_mux = "dcic-hdmi";
+	status = "okay";
+};
+
+&dcic2 {
+	dcic_id = <1>;
+	dcic_mux = "dcic-lvds1";
+	status = "okay";
+};
+
+&i2c1 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default", "gpio";
+	pinctrl-0 = <&pinctrl_i2c1>;
+	pinctrl-1 = <&pinctrl_i2c1_gpio>;
+	scl-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>;
+	sda-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>;
+	status = "okay";
+
+	codec: wm8962 at 1a {
+		compatible = "wlf,wm8962";
+		reg = <0x1a>;
+		clocks = <&clks IMX6QDL_CLK_CKO>;
+		DCVDD-supply = <&reg_audio>;
+		DBVDD-supply = <&reg_audio>;
+		AVDD-supply = <&reg_audio>;
+		CPVDD-supply = <&reg_audio>;
+		MICVDD-supply = <&reg_audio>;
+		PLLVDD-supply = <&reg_audio>;
+		SPKVDD1-supply = <&reg_audio>;
+		SPKVDD2-supply = <&reg_audio>;
+		gpio-cfg = <
+			0x0000 /* 0:Default */
+			0x0000 /* 1:Default */
+			0x0013 /* 2:FN_DMICCLK */
+			0x0000 /* 3:Default */
+			0x8014 /* 4:FN_DMICCDAT */
+			0x0000 /* 5:Default */
+		>;
+		amic-mono;
+       };
+
+	mma8451 at 1c {
+		compatible = "fsl,mma8451";
+		reg = <0x1c>;
+		position = <0>;
+		vdd-supply = <&reg_sensor>;
+		vddio-supply = <&reg_sensor>;
+		interrupt-parent = <&gpio1>;
+		interrupts = <18 8>;
+		interrupt-route = <1>;
+	};
+
+	ov564x: ov564x at 3c {
+		compatible = "ovti,ov564x";
+		reg = <0x3c>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_ipu1_2>;
+		clocks = <&clks IMX6QDL_CLK_CKO>;
+		clock-names = "csi_mclk";
+		DOVDD-supply = <&vgen4_reg>; /* 1.8v */
+		AVDD-supply = <&vgen3_reg>;  /* 2.8v, on rev C board is VGEN3,
+						on rev B board is VGEN5 */
+		DVDD-supply = <&vgen2_reg>;  /* 1.5v*/
+		pwn-gpios = <&gpio1 16 1>;   /* active low: SD1_DAT0 */
+		rst-gpios = <&gpio1 17 0>;   /* active high: SD1_DAT1 */
+		csi_id = <0>;
+		mclk = <24000000>;
+		mclk_source = <0>;
+	};
+};
+
+&i2c2 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default", "gpio";
+	pinctrl-0 = <&pinctrl_i2c2>;
+	pinctrl-1 = <&pinctrl_i2c2_gpio>;
+	scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
+	sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
+	status = "okay";
+
+	egalax_ts at 04 {
+		compatible = "eeti,egalax_ts";
+		reg = <0x04>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_i2c2_egalax_int>;
+		interrupt-parent = <&gpio6>;
+		interrupts = <8 2>;
+		wakeup-gpios = <&gpio6 8 GPIO_ACTIVE_HIGH>;
+	};
+
+	max11801 at 48 {
+		compatible = "maxim,max11801";
+		reg = <0x48>;
+		interrupt-parent = <&gpio3>;
+		interrupts = <26 2>;
+		work-mode = <1>;/*DCM mode*/
+	};
+
+	pmic: pfuze100 at 08 {
+		compatible = "fsl,pfuze100";
+		reg = <0x08>;
+
+		regulators {
+			sw1a_reg: sw1ab {
+				regulator-min-microvolt = <300000>;
+				regulator-max-microvolt = <1875000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-ramp-delay = <6250>;
+			};
+
+			sw1c_reg: sw1c {
+				regulator-min-microvolt = <300000>;
+				regulator-max-microvolt = <1875000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-ramp-delay = <6250>;
+			};
+
+			sw2_reg: sw2 {
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-ramp-delay = <6250>;
+			};
+
+			sw3a_reg: sw3a {
+				regulator-min-microvolt = <400000>;
+				regulator-max-microvolt = <1975000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			sw3b_reg: sw3b {
+				regulator-min-microvolt = <400000>;
+				regulator-max-microvolt = <1975000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			sw4_reg: sw4 {
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			swbst_reg: swbst {
+				regulator-min-microvolt = <5000000>;
+				regulator-max-microvolt = <5150000>;
+			};
+
+			snvs_reg: vsnvs {
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			vref_reg: vrefddr {
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			vgen1_reg: vgen1 {
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <1550000>;
+			};
+
+			vgen2_reg: vgen2 {
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <1550000>;
+			};
+
+			vgen3_reg: vgen3 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			vgen4_reg: vgen4 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+
+			vgen5_reg: vgen5 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+
+			vgen6_reg: vgen6 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+		};
+	};
+
+	ov564x_mipi: ov564x_mipi at 3c { /* i2c2 driver */
+		compatible = "ovti,ov564x_mipi";
+		reg = <0x3c>;
+		clocks = <&clks 201>;
+		clock-names = "csi_mclk";
+		DOVDD-supply = <&vgen4_reg>; /* 1.8v */
+		AVDD-supply = <&vgen3_reg>;  /* 2.8v, rev C board is VGEN3
+						rev B board is VGEN5 */
+		DVDD-supply = <&vgen2_reg>;  /* 1.5v*/
+		pwn-gpios = <&gpio1 19 1>;   /* active low: SD1_CLK */
+		rst-gpios = <&gpio1 20 0>;   /* active high: SD1_DAT2 */
+		csi_id = <1>;
+		mclk = <24000000>;
+		mclk_source = <0>;
+	};
+};
+
+&i2c3 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default", "gpio";
+	pinctrl-0 = <&pinctrl_i2c3>;
+	pinctrl-1 = <&pinctrl_i2c3_gpio>;
+	scl-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
+	sda-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
+	status = "okay";
+
+	egalax_ts at 04 {
+		compatible = "eeti,egalax_ts";
+		reg = <0x04>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_i2c3_egalax_int>;
+		interrupt-parent = <&gpio6>;
+		interrupts = <7 2>;
+		wakeup-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
+	};
+
+	isl29023 at 44 {
+		compatible = "fsl,isl29023";
+		reg = <0x44>;
+		rext = <499>;
+		vdd-supply = <&reg_sensor>;
+		interrupt-parent = <&gpio3>;
+		interrupts = <9 2>;
+	};
+
+	mag3110 at 0e {
+		compatible = "fsl,mag3110";
+		reg = <0x0e>;
+		position = <2>;
+		vdd-supply = <&reg_sensor>;
+		vddio-supply = <&reg_sensor>;
+		interrupt-parent = <&gpio3>;
+		interrupts = <16 1>;
+	};
+};
+
+&iomuxc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_hog>;
+
+	imx6qdl-sabresd {
+		pinctrl_hog: hoggrp {
+			fsl,pins = <
+				MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000
+				MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000
+				MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000
+				MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000
+				MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
+				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
+				MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x80000000
+				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000
+				MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x80000000
+				MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000
+				MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000
+				MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000
+				MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
+				MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x80000000
+				MX6QDL_PAD_SD1_CMD__GPIO1_IO18 0x80000000
+				MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x80000000
+				MX6QDL_PAD_SD3_RST__GPIO7_IO08	0x80000000
+				MX6QDL_PAD_GPIO_9__GPIO1_IO09	0x80000000
+				MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000
+				MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x80000000
+				MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x80000000
+				MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x80000000
+				MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x80000000
+			>;
+		};
+
+		pinctrl_audmux: audmuxgrp {
+			fsl,pins = <
+				MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0
+				MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0
+				MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0
+				MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0
+			>;
+		};
+
+		pinctrl_ecspi1: ecspi1grp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL1__ECSPI1_MISO	0x100b1
+				MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI	0x100b1
+				MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK	0x100b1
+				MX6QDL_PAD_KEY_ROW1__GPIO4_IO09		0x1b0b0
+			>;
+		};
+
+		pinctrl_i2c2_egalax_int: egalax_i2c2_intgrp {
+			fsl,pins = <
+				MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x80000000
+			>;
+		};
+
+		pinctrl_i2c3_egalax_int: egalax_i2c3_intgrp {
+			fsl,pins = <
+				MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000
+			>;
+		};
+
+		pinctrl_enet: enetgrp {
+			fsl,pins = <
+				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
+				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
+				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b0b0
+				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b0b0
+				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b0b0
+				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b0b0
+				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b0b0
+				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b0b0
+				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
+				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
+				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b0b0
+				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b0b0
+				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b0b0
+				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b0b0
+				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b0b0
+				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
+			>;
+		};
+
+		pinctrl_enet_irq: enetirqgrp {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1
+			>;
+		};
+
+		pinctrl_gpio_keys: gpio_keysgrp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0
+				MX6QDL_PAD_GPIO_4__GPIO1_IO04  0x1b0b0
+				MX6QDL_PAD_GPIO_5__GPIO1_IO05  0x1b0b0
+			>;
+		};
+
+		pinctrl_hdmi_cec: hdmicecgrp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x108b0
+			>;
+		};
+
+		pinctrl_hdmi_hdcp: hdmihdcpgrp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL 0x4001b8b1
+				MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 0x4001b8b1
+			>;
+		};
+
+		pinctrl_i2c1: i2c1grp {
+			fsl,pins = <
+				MX6QDL_PAD_CSI0_DAT8__I2C1_SDA		0x4001b8b1
+				MX6QDL_PAD_CSI0_DAT9__I2C1_SCL		0x4001b8b1
+			>;
+		};
+
+		pinctrl_i2c1_gpio: i2c1grp_gpio {
+			fsl,pins = <
+				MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26        0x1b8b1
+				MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27        0x1b8b1
+			>;
+		};
+
+		pinctrl_i2c2: i2c2grp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
+				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
+			>;
+		};
+
+		pinctrl_i2c2_gpio: i2c2grp_gpio {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL3__GPIO4_IO12         0x1b8b1
+				MX6QDL_PAD_KEY_ROW3__GPIO4_IO13         0x1b8b1
+			>;
+		};
+
+		pinctrl_i2c3: i2c3grp {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1
+				MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
+			>;
+		};
+
+		pinctrl_i2c3_gpio: i2c3grp_gpio {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_3__GPIO1_IO03           0x1b8b1
+				MX6QDL_PAD_GPIO_6__GPIO1_IO06           0x1b8b1
+			>;
+		};
+
+		pinctrl_ipu1: ipu1grp {
+			fsl,pins = <
+				MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
+				MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
+				MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
+				MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
+				MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04        0x80000000
+				MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10
+				MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
+				MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
+				MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
+				MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
+				MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
+				MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
+				MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
+				MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
+				MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
+				MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
+				MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
+				MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
+				MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
+				MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
+				MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
+				MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
+				MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
+				MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
+				MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
+				MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
+				MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
+				MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
+				MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
+			>;
+		};
+
+		pinctrl_ipu1_2: ipu1grp-2 { /* parallel camera */
+			fsl,pins = <
+				MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12    0x80000000
+				MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13    0x80000000
+				MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14    0x80000000
+				MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15    0x80000000
+				MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16    0x80000000
+				MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17    0x80000000
+				MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18    0x80000000
+				MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19    0x80000000
+				MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x80000000
+				MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK   0x80000000
+				MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC      0x80000000
+				MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC     0x80000000
+				MX6QDL_PAD_SD1_DAT1__GPIO1_IO17            0x80000000
+				MX6QDL_PAD_SD1_DAT0__GPIO1_IO16            0x80000000
+			>;
+		};
+
+		pinctrl_pcie: pciegrp {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_17__GPIO7_IO12	0x1b0b0
+			>;
+		};
+
+		pinctrl_pcie_reg: pciereggrp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_D19__GPIO3_IO19	0x1b0b0
+			>;
+		};
+
+		pinctrl_pwm1: pwm1grp {
+			fsl,pins = <
+				MX6QDL_PAD_SD1_DAT3__PWM1_OUT		0x1b0b1
+			>;
+		};
+
+		pinctrl_uart1: uart1grp {
+			fsl,pins = <
+				MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1
+				MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1
+			>;
+		};
+
+		pinctrl_uart5_1: uart5grp-1 {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL1__UART5_TX_DATA	0x1b0b1
+				MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x1b0b1
+				MX6QDL_PAD_KEY_COL4__UART5_RTS_B	0x1b0b1
+				MX6QDL_PAD_KEY_ROW4__UART5_CTS_B	0x1b0b1
+			>;
+		};
+
+		pinctrl_uart5dte_1: uart5dtegrp-1 {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_ROW1__UART5_TX_DATA	0x1b0b1
+				MX6QDL_PAD_KEY_COL1__UART5_RX_DATA	0x1b0b1
+				MX6QDL_PAD_KEY_ROW4__UART5_RTS_B	0x1b0b1
+				MX6QDL_PAD_KEY_COL4__UART5_CTS_B	0x1b0b1
+			>;
+		};
+
+		pinctrl_usbotg: usbotggrp {
+			fsl,pins = <
+				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x17059
+			>;
+		};
+
+		pinctrl_usdhc2: usdhc2grp {
+			fsl,pins = <
+				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059
+				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059
+				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059
+				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059
+				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059
+				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059
+				MX6QDL_PAD_NANDF_D4__SD2_DATA4		0x17059
+				MX6QDL_PAD_NANDF_D5__SD2_DATA5		0x17059
+				MX6QDL_PAD_NANDF_D6__SD2_DATA6		0x17059
+				MX6QDL_PAD_NANDF_D7__SD2_DATA7		0x17059
+			>;
+		};
+
+		pinctrl_usdhc3: usdhc3grp {
+			u-boot,dm-spl;
+			fsl,pins = <
+				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
+				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
+				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
+				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
+				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
+				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
+				MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x17059
+				MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x17059
+				MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x17059
+				MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059
+			>;
+		};
+
+		pinctrl_usdhc4: usdhc4grp {
+			fsl,pins = <
+				MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059
+				MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059
+				MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059
+				MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059
+				MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059
+				MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059
+				MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059
+				MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059
+				MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059
+				MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059
+			>;
+		};
+
+		pinctrl_wdog: wdoggrp {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_1__WDOG2_B 0x80000000
+			>;
+		};
+	};
+
+	gpio_leds {
+		pinctrl_gpio_leds: gpioledsgrp {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
+			>;
+		};
+	};
+};
+
+&ldb {
+	status = "okay";
+
+	lvds-channel at 0 {
+		fsl,data-mapping = "spwg";
+		fsl,data-width = <18>;
+		status = "okay";
+
+		display-timings {
+			native-mode = <&timing0>;
+			timing0: hsd100pxn1 {
+				clock-frequency = <65000000>;
+				hactive = <1024>;
+				vactive = <768>;
+				hback-porch = <220>;
+				hfront-porch = <40>;
+				vback-porch = <21>;
+				vfront-porch = <7>;
+				hsync-len = <60>;
+				vsync-len = <10>;
+			};
+		};
+	};
+
+	lvds-channel at 1 {
+		fsl,data-mapping = "spwg";
+		fsl,data-width = <18>;
+		primary;
+		status = "okay";
+
+		display-timings {
+			native-mode = <&timing1>;
+			timing1: hsd100pxn1 {
+				clock-frequency = <65000000>;
+				hactive = <1024>;
+				vactive = <768>;
+				hback-porch = <220>;
+				hfront-porch = <40>;
+				vback-porch = <21>;
+				vfront-porch = <7>;
+				hsync-len = <60>;
+				vsync-len = <10>;
+			};
+		};
+	};
+};
+
+&mipi_csi {
+	status = "okay";
+	ipu_id = <0>;
+	csi_id = <1>;
+	v_channel = <0>;
+	lanes = <2>;
+};
+
+&mipi_dsi {
+	dev_id = <0>;
+	disp_id = <1>;
+	lcd_panel = "TRULY-WVGA";
+	disp-power-on-supply = <&reg_mipi_dsi_pwr_on>;
+	resets = <&mipi_dsi_reset>;
+	status = "okay";
+};
+
+&pcie {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pcie>;
+	reset-gpio = <&gpio7 12 0>;
+	status = "okay";
+};
+
+&pwm1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm1>;
+	status = "okay";
+};
+
+&snvs_poweroff {
+	status = "okay";
+};
+
+&ssi2 {
+	status = "okay";
+};
+
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart1>;
+	status = "okay";
+};
+
+&usbh1 {
+	vbus-supply = <&reg_usb_h1_vbus>;
+	status = "okay";
+};
+
+&usbotg {
+	vbus-supply = <&reg_usb_otg_vbus>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usbotg>;
+	disable-over-current;
+	srp-disable;
+	hnp-disable;
+	adp-disable;
+	status = "okay";
+};
+
+&usbphy1 {
+	tx-d-cal = <0x5>;
+};
+
+&usbphy2 {
+	tx-d-cal = <0x5>;
+};
+
+&usdhc2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usdhc2>;
+	bus-width = <8>;
+	cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
+	wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
+	no-1-8-v;
+	keep-power-in-suspend;
+	enable-sdio-wakeup;
+	status = "okay";
+};
+
+&usdhc3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usdhc3>;
+	bus-width = <8>;
+	cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+	wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
+	no-1-8-v;
+	keep-power-in-suspend;
+	enable-sdio-wakeup;
+	u-boot,dm-spl;
+	status = "okay";
+};
+
+&usdhc4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usdhc4>;
+	bus-width = <8>;
+	non-removable;
+	no-1-8-v;
+	keep-power-in-suspend;
+	status = "okay";
+};
+
+&wdog1 {
+	status = "disabled";
+};
+
+&wdog2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog>;
+	fsl,wdog_b;
+	status = "okay";
+};
-- 
2.7.4

[U-Boot] [RFC 09/17] arm: imx: Add FIT SPL its

[Abel Vesa]

Add simple its in order to allow SPL to boot u-boot proper
via FIT table.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 arch/arm/mach-imx/mx6/fit_spl.its | 41 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)
 create mode 100644 arch/arm/mach-imx/mx6/fit_spl.its

diff --git a/arch/arm/mach-imx/mx6/fit_spl.its b/arch/arm/mach-imx/mx6/fit_spl.its
new file mode 100644
index 0000000..bd5ba09
--- /dev/null
+++ b/arch/arm/mach-imx/mx6/fit_spl.its
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2018 NXP
+ *
+ * Simple U-boot fit source file containing U-Boot (with dtb appended)
+ */
+
+/dts-v1/;
+
+/ {
+	description = "Image for u-boot proper (with dtb appended)";
+	#address-cells = <1>;
+
+	images {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		uboot at 1 {
+			reg = <0>;
+			description = "U-Boot";
+			data = /incbin/("../../../../u-boot-dtb.bin");
+			type = "standalone";
+			os = "U-Boot";
+			compression = "none";
+			arch = "arm";
+			load = <0x17800000>;
+		};
+	};
+
+	configurations {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		default = "conf at 1";
+
+		conf at 1 {
+			reg = <0>;
+			description = "i.MX armv7";
+			loadables = "uboot at 1";
+		};
+	};
+};
-- 
2.7.4

[U-Boot] [RFC 10/17] configs: mx6sabreauto: Add SPL FIT and DM support

[Abel Vesa]

Enable all the necessary configs for SPL DM and FIT support for
mx6sabreauto.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 configs/mx6sabreauto_defconfig | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig
index e55c2d9..fa3d649 100644
--- a/configs/mx6sabreauto_defconfig
+++ b/configs/mx6sabreauto_defconfig
@@ -4,18 +4,27 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_MX6SABREAUTO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
 CONFIG_SPL=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
 CONFIG_NXP_BOARD_REVISION=y
 CONFIG_NR_DRAM_BANKS=1
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x400
+CONFIG_FIT=y
+CONFIG_SPL_FIT_PRINT=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_SOURCE="arch/arm/mach-imx/mx6/fit_spl.its"
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
 # CONFIG_CONSOLE_MUX is not set
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
 CONFIG_SUPPORT_RAW_INITRD=y
+CONFIG_SPL_SEPARATE_BSS=y
+CONFIG_SPL_FIT_IMAGE_TINY=y
 CONFIG_SPL_EXT_SUPPORT=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_WATCHDOG_SUPPORT=y
@@ -39,8 +48,12 @@ CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabreauto"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_SPL_DM=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_SF=y
 CONFIG_DM_MMC=y
@@ -67,4 +80,3 @@ CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_VIDEO=y
 # CONFIG_VIDEO_SW_CURSOR is not set
-CONFIG_OF_LIBFDT=y
-- 
2.7.4

[U-Boot] [RFC 11/17] configs: mx6sabresd: Add SPL FIT and DM support

[Abel Vesa]

Enable all the necessary configs for SPL DM and FIT support for
mx6sabresd.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 configs/mx6sabresd_defconfig | 20 +++++++++++++++++---
 1 file changed, 17 insertions(+), 3 deletions(-)

diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig
index 3532fce..a208425 100644
--- a/configs/mx6sabresd_defconfig
+++ b/configs/mx6sabresd_defconfig
@@ -4,24 +4,32 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_MX6SABRESD=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
 CONFIG_SPL=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x400
+CONFIG_FIT=y
+CONFIG_SPL_FIT_PRINT=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_SOURCE="arch/arm/mach-imx/mx6/fit_spl.its"
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
 # CONFIG_CONSOLE_MUX is not set
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
 CONFIG_SUPPORT_RAW_INITRD=y
+CONFIG_SPL_SEPARATE_BSS=y
+CONFIG_SPL_FIT_IMAGE_TINY=y
 CONFIG_SPL_EXT_SUPPORT=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_SPL_USB_HOST_SUPPORT=y
 CONFIG_SPL_USB_GADGET=y
 CONFIG_SPL_USB_SDP_SUPPORT=y
-CONFIG_SPL_USB_STORAGE=y
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
@@ -47,23 +55,30 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_EFI_PARTITION=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabresd"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_SPL_DM=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x12000000
 CONFIG_FASTBOOT_BUF_SIZE=0x10000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=2
+CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_MII=y
 CONFIG_PCI=y
+CONFIG_DM_REGULATOR=y
 CONFIG_SPI=y
 CONFIG_MXC_SPI=y
 CONFIG_USB=y
-CONFIG_USB_STORAGE=y
+CONFIG_DM_USB=y
+# CONFIG_SPL_DM_USB is not set
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_MANUFACTURER="FSL"
 CONFIG_USB_GADGET_VENDOR_NUM=0x0525
@@ -73,4 +88,3 @@ CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_VIDEO=y
 # CONFIG_VIDEO_SW_CURSOR is not set
-CONFIG_OF_LIBFDT=y
-- 
2.7.4

[U-Boot] [RFC 12/17] mx6sabreauto: Add DM_GPIO support

[Abel Vesa]

Add the DM_GPIO related config for mx6sabreauto.
Also add the gpio request calls.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 board/freescale/mx6sabreauto/mx6sabreauto.c | 3 +++
 configs/mx6sabreauto_defconfig              | 1 +
 2 files changed, 4 insertions(+)

diff --git a/board/freescale/mx6sabreauto/mx6sabreauto.c b/board/freescale/mx6sabreauto/mx6sabreauto.c
index c1bef85..b28e5e3 100644
--- a/board/freescale/mx6sabreauto/mx6sabreauto.c
+++ b/board/freescale/mx6sabreauto/mx6sabreauto.c
@@ -501,6 +501,7 @@ iomux_v3_cfg_t const backlight_pads[] = {
 
 static void setup_iomux_backlight(void)
 {
+	gpio_request(IMX_GPIO_NR(2, 9), "backlight");
 	gpio_direction_output(IMX_GPIO_NR(2, 9), 1);
 	SETUP_IOMUX_PADS(backlight_pads);
 }
@@ -594,6 +595,7 @@ int board_init(void)
 	else
 		setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c_pad_info1);
 	/* I2C 3 Steer */
+	gpio_request(IMX_GPIO_NR(5, 4), "steer logic");
 	gpio_direction_output(IMX_GPIO_NR(5, 4), 1);
 	SETUP_IOMUX_PADS(i2c3_pads);
 #ifndef CONFIG_SYS_FLASH_CFI
@@ -602,6 +604,7 @@ int board_init(void)
 	else
 		setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c_pad_info2);
 #endif
+	gpio_request(IMX_GPIO_NR(1, 15), "expander en");
 	gpio_direction_output(IMX_GPIO_NR(1, 15), 1);
 	SETUP_IOMUX_PADS(port_exp);
 
diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig
index fa3d649..bcd6ff0 100644
--- a/configs/mx6sabreauto_defconfig
+++ b/configs/mx6sabreauto_defconfig
@@ -56,6 +56,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_SPL_DM=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_SF=y
+CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_NAND=y
-- 
2.7.4

[U-Boot] [RFC 13/17] mx6sabresd: Add DM_GPIO support

[Abel Vesa]

Add the DM_GPIO related config for mx6sabresd.
Also add the gpio request calls.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 board/freescale/mx6sabresd/mx6sabresd.c | 5 +++++
 configs/mx6sabresd_defconfig            | 1 +
 2 files changed, 6 insertions(+)

diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c
index 0183ede..e3db2fd 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -96,6 +96,7 @@ static void setup_iomux_enet(void)
 	SETUP_IOMUX_PADS(enet_pads);
 
 	/* Reset AR8031 PHY */
+	gpio_request(IMX_GPIO_NR(1, 25), "ENET PHY Reset");
 	gpio_direction_output(IMX_GPIO_NR(1, 25) , 0);
 	mdelay(10);
 	gpio_set_value(IMX_GPIO_NR(1, 25), 1);
@@ -189,6 +190,7 @@ static iomux_v3_cfg_t const bl_pads[] = {
 static void enable_backlight(void)
 {
 	SETUP_IOMUX_PADS(bl_pads);
+	gpio_request(DISP0_PWR_EN, "Display Power Enable");
 	gpio_direction_output(DISP0_PWR_EN, 1);
 }
 
@@ -307,11 +309,13 @@ int board_mmc_init(bd_t *bis)
 		switch (i) {
 		case 0:
 			SETUP_IOMUX_PADS(usdhc2_pads);
+			gpio_request(USDHC2_CD_GPIO, "USDHC2 CD");
 			gpio_direction_input(USDHC2_CD_GPIO);
 			usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
 			break;
 		case 1:
 			SETUP_IOMUX_PADS(usdhc3_pads);
+			gpio_request(USDHC3_CD_GPIO, "USDHC3 CD");
 			gpio_direction_input(USDHC3_CD_GPIO);
 			usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
 			break;
@@ -729,6 +733,7 @@ int checkboard(void)
 #ifdef CONFIG_SPL_OS_BOOT
 int spl_start_uboot(void)
 {
+	gpio_request(KEY_VOL_UP, "KEY Volume UP");
 	gpio_direction_input(KEY_VOL_UP);
 
 	/* Only enter in Falcon mode if KEY_VOL_UP is pressed */
diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig
index a208425..9451bbd 100644
--- a/configs/mx6sabresd_defconfig
+++ b/configs/mx6sabresd_defconfig
@@ -66,6 +66,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x12000000
 CONFIG_FASTBOOT_BUF_SIZE=0x10000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=2
+CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
-- 
2.7.4

[U-Boot] [RFC 14/17] configs: mx6sabreauto: Add DM_SPI_FLASH necessary configs

[Abel Vesa]

Enable all neceassary configs to support DM_SPI_FLASH on mx6sabreauto.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 configs/mx6sabreauto_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig
index bcd6ff0..a4d051a 100644
--- a/configs/mx6sabreauto_defconfig
+++ b/configs/mx6sabreauto_defconfig
@@ -61,12 +61,14 @@ CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_NAND=y
 CONFIG_NAND_MXS=y
+CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_MII=y
 CONFIG_DM_REGULATOR=y
 CONFIG_SPI=y
+CONFIG_DM_SPI=y
 CONFIG_MXC_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
-- 
2.7.4

[U-Boot] [RFC 15/17] configs: mx6sabresd: Add DM_SPI_FLASH necessary configs

[Abel Vesa]

Enable all neceassary configs to support DM_SPI_FLASH on mx6sabresd.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 configs/mx6sabresd_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig
index 9451bbd..7fbfddb 100644
--- a/configs/mx6sabresd_defconfig
+++ b/configs/mx6sabresd_defconfig
@@ -69,6 +69,7 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=2
 CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
+CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
@@ -76,6 +77,7 @@ CONFIG_MII=y
 CONFIG_PCI=y
 CONFIG_DM_REGULATOR=y
 CONFIG_SPI=y
+CONFIG_DM_SPI=y
 CONFIG_MXC_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
-- 
2.7.4

[U-Boot] [RFC 16/17] board: mx6sabreauto: Remove the non-DM code

[Abel Vesa]

Since the mx6sabreauto has DM support, remove the unused non-DM code
from mx6sabreauto board file.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 board/freescale/mx6sabreauto/mx6sabreauto.c | 70 -----------------------------
 1 file changed, 70 deletions(-)

diff --git a/board/freescale/mx6sabreauto/mx6sabreauto.c b/board/freescale/mx6sabreauto/mx6sabreauto.c
index b28e5e3..0f3b134 100644
--- a/board/freescale/mx6sabreauto/mx6sabreauto.c
+++ b/board/freescale/mx6sabreauto/mx6sabreauto.c
@@ -159,44 +159,6 @@ static iomux_v3_cfg_t const port_exp[] = {
 	IOMUX_PADS(PAD_SD2_DAT0__GPIO1_IO15	| MUX_PAD_CTRL(NO_PAD_CTRL)),
 };
 
-/*Define for building port exp gpio, pin starts from 0*/
-#define PORTEXP_IO_NR(chip, pin) \
-	((chip << 5) + pin)
-
-/*Get the chip addr from a ioexp gpio*/
-#define PORTEXP_IO_TO_CHIP(gpio_nr) \
-	(gpio_nr >> 5)
-
-/*Get the pin number from a ioexp gpio*/
-#define PORTEXP_IO_TO_PIN(gpio_nr) \
-	(gpio_nr & 0x1f)
-
-static int port_exp_direction_output(unsigned gpio, int value)
-{
-	int ret;
-
-	i2c_set_bus_num(2);
-	ret = i2c_probe(PORTEXP_IO_TO_CHIP(gpio));
-	if (ret)
-		return ret;
-
-	ret = pca953x_set_dir(PORTEXP_IO_TO_CHIP(gpio),
-		(1 << PORTEXP_IO_TO_PIN(gpio)),
-		(PCA953X_DIR_OUT << PORTEXP_IO_TO_PIN(gpio)));
-
-	if (ret)
-		return ret;
-
-	ret = pca953x_set_val(PORTEXP_IO_TO_CHIP(gpio),
-		(1 << PORTEXP_IO_TO_PIN(gpio)),
-		(value << PORTEXP_IO_TO_PIN(gpio)));
-
-	if (ret)
-		return ret;
-
-	return 0;
-}
-
 #ifdef CONFIG_MTD_NOR_FLASH
 static iomux_v3_cfg_t const eimnor_pads[] = {
 	IOMUX_PADS(PAD_EIM_D16__EIM_DATA16	| MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)),
@@ -681,19 +643,10 @@ int checkboard(void)
 }
 
 #ifdef CONFIG_USB_EHCI_MX6
-#define USB_HOST1_PWR     PORTEXP_IO_NR(0x32, 7)
-#define USB_OTG_PWR       PORTEXP_IO_NR(0x34, 1)
-
-iomux_v3_cfg_t const usb_otg_pads[] = {
-	IOMUX_PADS(PAD_ENET_RX_ER__USB_OTG_ID | MUX_PAD_CTRL(NO_PAD_CTRL)),
-};
-
 int board_ehci_hcd_init(int port)
 {
 	switch (port) {
 	case 0:
-		SETUP_IOMUX_PADS(usb_otg_pads);
-
 		/*
 		  * Set daisy chain for otg_pin_id on 6q.
 		 *  For 6dl, this bit is reserved.
@@ -708,29 +661,6 @@ int board_ehci_hcd_init(int port)
 	}
 	return 0;
 }
-
-int board_ehci_power(int port, int on)
-{
-	switch (port) {
-	case 0:
-		if (on)
-			port_exp_direction_output(USB_OTG_PWR, 1);
-		else
-			port_exp_direction_output(USB_OTG_PWR, 0);
-		break;
-	case 1:
-		if (on)
-			port_exp_direction_output(USB_HOST1_PWR, 1);
-		else
-			port_exp_direction_output(USB_HOST1_PWR, 0);
-		break;
-	default:
-		printf("MXC USB port %d not yet supported\n", port);
-		return -EINVAL;
-	}
-
-	return 0;
-}
 #endif
 
 #ifdef CONFIG_SPL_BUILD
-- 
2.7.4

[U-Boot] [RFC 17/17] board: mx6sabresd: Remove non-DM code

[Abel Vesa]

Since the mx6sabreauto has DM support, remove the unused non-DM code
from mx6sabresd board file.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 board/freescale/mx6sabresd/mx6sabresd.c | 50 ---------------------------------
 1 file changed, 50 deletions(-)

diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c
index e3db2fd..71b9bfe 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -563,63 +563,13 @@ int board_eth_init(bd_t *bis)
 }
 
 #ifdef CONFIG_USB_EHCI_MX6
-#define USB_OTHERREGS_OFFSET	0x800
-#define UCTRL_PWR_POL		(1 << 9)
-
-static iomux_v3_cfg_t const usb_otg_pads[] = {
-	IOMUX_PADS(PAD_EIM_D22__USB_OTG_PWR | MUX_PAD_CTRL(NO_PAD_CTRL)),
-	IOMUX_PADS(PAD_ENET_RX_ER__USB_OTG_ID | MUX_PAD_CTRL(NO_PAD_CTRL)),
-};
-
-static iomux_v3_cfg_t const usb_hc1_pads[] = {
-	IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL)),
-};
-
 static void setup_usb(void)
 {
-	SETUP_IOMUX_PADS(usb_otg_pads);
-
 	/*
 	 * set daisy chain for otg_pin_id on 6q.
 	 * for 6dl, this bit is reserved
 	 */
 	imx_iomux_set_gpr_register(1, 13, 1, 0);
-
-	SETUP_IOMUX_PADS(usb_hc1_pads);
-}
-
-int board_ehci_hcd_init(int port)
-{
-	u32 *usbnc_usb_ctrl;
-
-	if (port > 1)
-		return -EINVAL;
-
-	usbnc_usb_ctrl = (u32 *)(USB_BASE_ADDR + USB_OTHERREGS_OFFSET +
-				 port * 4);
-
-	setbits_le32(usbnc_usb_ctrl, UCTRL_PWR_POL);
-
-	return 0;
-}
-
-int board_ehci_power(int port, int on)
-{
-	switch (port) {
-	case 0:
-		break;
-	case 1:
-		if (on)
-			gpio_direction_output(IMX_GPIO_NR(1, 29), 1);
-		else
-			gpio_direction_output(IMX_GPIO_NR(1, 29), 0);
-		break;
-	default:
-		printf("MXC USB port %d not yet supported\n", port);
-		return -EINVAL;
-	}
-
-	return 0;
 }
 #endif
 
-- 
2.7.4

[U-Boot] [RFC 08/17] dts: imx: Add imx6q-sabresd dts and imx6qdl-sabresd dtsi files

[Fabio Estevam]

Hi Abel,

On Wed, Jan 16, 2019 at 12:11 PM Abel Vesa <abel.vesa@nxp.com> wrote:
>
> Add necessary dts and dtsi files in order to enable DM in both
> SPL and u-boot proper for mx6sabresd.
>
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> ---
>  arch/arm/dts/Makefile             |    3 +-
>  arch/arm/dts/imx6q-sabresd.dts    |   92 ++++
>  arch/arm/dts/imx6qdl-sabresd.dtsi | 1065 +++++++++++++++++++++++++++++++++++++
>  3 files changed, 1159 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/dts/imx6q-sabresd.dts
>  create mode 100644 arch/arm/dts/imx6qdl-sabresd.dtsi
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index dad5436..1614a19 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -439,7 +439,8 @@ dtb-$(CONFIG_MX6QDL) += \
>         imx6q-icore-mipi.dtb \
>         imx6q-icore-rqs.dtb \
>         imx6q-logicpd.dtb \
> -       imx6q-sabreauto.dtb
> +       imx6q-sabreauto.dtb \
> +       imx6q-sabresd.dtb

Currently we support imx6q/imx6dl/imx6qp sabresd with the same U-Boot image.

It seems that now you only support the imx6q variant, but we should
keep supporting all the variants.

[U-Boot] [RFC 08/17] dts: imx: Add imx6q-sabresd dts and imx6qdl-sabresd dtsi files

[Abel Vesa]

On 19-01-16 12:14:34, Fabio Estevam wrote:
> Hi Abel,
> 
> On Wed, Jan 16, 2019 at 12:11 PM Abel Vesa <abel.vesa@nxp.com> wrote:
> >
> > Add necessary dts and dtsi files in order to enable DM in both
> > SPL and u-boot proper for mx6sabresd.
> >
> > Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> > ---
> >  arch/arm/dts/Makefile             |    3 +-
> >  arch/arm/dts/imx6q-sabresd.dts    |   92 ++++
> >  arch/arm/dts/imx6qdl-sabresd.dtsi | 1065 +++++++++++++++++++++++++++++++++++++
> >  3 files changed, 1159 insertions(+), 1 deletion(-)
> >  create mode 100644 arch/arm/dts/imx6q-sabresd.dts
> >  create mode 100644 arch/arm/dts/imx6qdl-sabresd.dtsi
> >
> > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> > index dad5436..1614a19 100644
> > --- a/arch/arm/dts/Makefile
> > +++ b/arch/arm/dts/Makefile
> > @@ -439,7 +439,8 @@ dtb-$(CONFIG_MX6QDL) += \
> >         imx6q-icore-mipi.dtb \
> >         imx6q-icore-rqs.dtb \
> >         imx6q-logicpd.dtb \
> > -       imx6q-sabreauto.dtb
> > +       imx6q-sabreauto.dtb \
> > +       imx6q-sabresd.dtb
> 
> Currently we support imx6q/imx6dl/imx6qp sabresd with the same U-Boot image.
> 
> It seems that now you only support the imx6q variant, but we should
> keep supporting all the variants.

Oups, my bad. Actually the files should've been named imx6sabreauto.dtb (same for sabresd).
Without the 'q'. I tested on 6d and booted fine, so what I'm saying here is: this is meant for all the 6sabreauto.

Will fix the names in the next version.

I'll just wait a little longer for more comments and resend.

Thanks

[U-Boot] [RFC 08/17] dts: imx: Add imx6q-sabresd dts and imx6qdl-sabresd dtsi files

[Fabio Estevam]

On Wed, Jan 16, 2019 at 12:18 PM Abel Vesa <abel.vesa@nxp.com> wrote:

> Oups, my bad. Actually the files should've been named imx6sabreauto.dtb (same for sabresd).
> Without the 'q'. I tested on 6d and booted fine, so what I'm saying here is: this is meant for all the 6sabreauto.

Do you mean mx6d (dual) or mx6dl (dual-lite)? I suppose you tested it
on mx6d, which is the same SoC as imx6q, only difference being the
number of cores.

It is not possible to have a single dtb that covers all three variants
(q/dl/qp). We still need imx6q-sabresd.dtb, imx6dl-sabresd.dtb and
imx6qp-sabresd.dtb

[U-Boot] [RFC 13/17] mx6sabresd: Add DM_GPIO support

[Fabio Estevam]

[Abel, please trim the CC list next time. I tried to keep it shorter
so that U-Boot list does not complain about the large number of
recipients]

On Wed, Jan 16, 2019 at 12:14 PM Abel Vesa <abel.vesa@nxp.com> wrote:
>
> Add the DM_GPIO related config for mx6sabresd.
> Also add the gpio request calls.
>
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> ---
>  board/freescale/mx6sabresd/mx6sabresd.c | 5 +++++
>  configs/mx6sabresd_defconfig            | 1 +
>  2 files changed, 6 insertions(+)
>
> diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c
> index 0183ede..e3db2fd 100644
> --- a/board/freescale/mx6sabresd/mx6sabresd.c
> +++ b/board/freescale/mx6sabresd/mx6sabresd.c
> @@ -96,6 +96,7 @@ static void setup_iomux_enet(void)
>         SETUP_IOMUX_PADS(enet_pads);
>
>         /* Reset AR8031 PHY */
> +       gpio_request(IMX_GPIO_NR(1, 25), "ENET PHY Reset");
>         gpio_direction_output(IMX_GPIO_NR(1, 25) , 0);
>         mdelay(10);
>         gpio_set_value(IMX_GPIO_NR(1, 25), 1);

What about using the 'phy-reset-gpios' property instead of having this
board C code?

[U-Boot] [RFC 01/17] common: Break USB_STORAGE dependency between SPL and u-boot proper

[Tom Rini]

On Wed, Jan 16, 2019 at 02:03:20PM +0000, Abel Vesa wrote:

> Some boards might need USB_STORAGE enabled in u-boot proper but not in
> SPL. Make a separate config for SPL and keep the same depends on
> conditions but for SPL. Also, all the boards that have DISTRO_DEFAULTS
> use by default SPL_USB_STORAGE.
> 
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>

Please re-work this as I had described in the other thread, thanks!

-- 
Tom
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[U-Boot] [RFC 07/17] dts: imx: Add imx6q-sabreauto dts and imx6qdl-sabreauto dtsi files

[Fabio Estevam]

Hi Abel,

On Wed, Jan 16, 2019 at 12:09 PM Abel Vesa <abel.vesa@nxp.com> wrote:

> +       mxcfb1: fb at 0 {
> +               compatible = "fsl,mxc_sdc_fb";
> +               disp_dev = "ldb";
> +               interface_pix_fmt = "RGB666";
> +               default_bpp = <16>;
> +               int_clk = <0>;
> +               late_init = <0>;
> +               status = "disabled";

This dts comes from the NXP kernel tree.

Please use the dts from mainline kernel instead.

[U-Boot] [RFC 09/17] arm: imx: Add FIT SPL its

[Lukasz Majewski]

Hi Abel,

> Add simple its in order to allow SPL to boot u-boot proper
> via FIT table.
> 

The mkimage has  [-f fit-image.its|-f auto|-F] -F option so you don't
need to specify *.its file

> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> ---
>  arch/arm/mach-imx/mx6/fit_spl.its | 41
> +++++++++++++++++++++++++++++++++++++++ 1 file changed, 41
> insertions(+) create mode 100644 arch/arm/mach-imx/mx6/fit_spl.its
> 
> diff --git a/arch/arm/mach-imx/mx6/fit_spl.its
> b/arch/arm/mach-imx/mx6/fit_spl.its new file mode 100644
> index 0000000..bd5ba09
> --- /dev/null
> +++ b/arch/arm/mach-imx/mx6/fit_spl.its
> @@ -0,0 +1,41 @@
> +/*
> + * Copyright (C) 2018 NXP
> + *
> + * Simple U-boot fit source file containing U-Boot (with dtb
> appended)
> + */
> +
> +/dts-v1/;
> +
> +/ {
> +	description = "Image for u-boot proper (with dtb appended)";
> +	#address-cells = <1>;
> +
> +	images {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		uboot at 1 {
> +			reg = <0>;
> +			description = "U-Boot";
> +			data
> = /incbin/("../../../../u-boot-dtb.bin");
> +			type = "standalone";
> +			os = "U-Boot";
> +			compression = "none";
> +			arch = "arm";
> +			load = <0x17800000>;
> +		};
> +	};
> +
> +	configurations {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		default = "conf at 1";
> +
> +		conf at 1 {
> +			reg = <0>;
> +			description = "i.MX armv7";
> +			loadables = "uboot at 1";
> +		};
> +	};
> +};




Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma at denx.de
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[U-Boot] [RFC 08/17] dts: imx: Add imx6q-sabresd dts and imx6qdl-sabresd dtsi files

[Lukasz Majewski]

On Wed, 16 Jan 2019 14:03:32 +0000
Abel Vesa <abel.vesa@nxp.com> wrote:

> Add necessary dts and dtsi files in order to enable DM in both
> SPL and u-boot proper for mx6sabresd.

Please state the exact SHA1 and branch for this porting.

> 
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> ---
>  arch/arm/dts/Makefile             |    3 +-
>  arch/arm/dts/imx6q-sabresd.dts    |   92 ++++
>  arch/arm/dts/imx6qdl-sabresd.dtsi | 1065
> +++++++++++++++++++++++++++++++++++++ 3 files changed, 1159
> insertions(+), 1 deletion(-) create mode 100644
> arch/arm/dts/imx6q-sabresd.dts create mode 100644
> arch/arm/dts/imx6qdl-sabresd.dtsi
> 
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index dad5436..1614a19 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -439,7 +439,8 @@ dtb-$(CONFIG_MX6QDL) += \
>  	imx6q-icore-mipi.dtb \
>  	imx6q-icore-rqs.dtb \
>  	imx6q-logicpd.dtb \
> -	imx6q-sabreauto.dtb
> +	imx6q-sabreauto.dtb \
> +	imx6q-sabresd.dtb
>  
>  dtb-$(CONFIG_MX6SL) += imx6sl-evk.dtb
>  
> diff --git a/arch/arm/dts/imx6q-sabresd.dts
> b/arch/arm/dts/imx6q-sabresd.dts new file mode 100644
> index 0000000..d9cdb20
> --- /dev/null
> +++ b/arch/arm/dts/imx6q-sabresd.dts
> @@ -0,0 +1,92 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2012=2015 Freescale Semiconductor, Inc.
> + * Copyright 2011 Linaro Ltd.
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
> +
> +/dts-v1/;
> +
> +#include "imx6q.dtsi"
> +#include "imx6qdl-sabresd.dtsi"
> +
> +/ {
> +	model = "Freescale i.MX6 Quad SABRE Smart Device Board";
> +	compatible = "fsl,imx6q-sabresd", "fsl,imx6q";
> +};
> +
> +/ {
> +	soc {
> +		u-boot,dm-spl;
> +
> +		aips-bus at 02000000 {
> +			u-boot,dm-spl;
> +		};
> +
> +		aips-bus at 02100000 {
> +			u-boot,dm-spl;
> +		};
> +	};
> +};
> +
> +&gpio1 {
> +	u-boot,dm-spl;
> +};
> +
> +&gpio2 {
> +	u-boot,dm-spl;
> +};
> +
> +&gpio6 {
> +	u-boot,dm-spl;
> +};
> +
> +&gpio1 {
> +	u-boot,dm-spl;
> +};
> +
> +&iomuxc {
> +	u-boot,dm-spl;
> +};
> +
> +&battery {
> +	offset-charger = <1900>;
> +	offset-discharger = <1694>;
> +	offset-usb-charger = <1685>;
> +};
> +
> +&ldb {
> +	lvds-channel at 0 {
> +		crtc = "ipu2-di0";
> +	};
> +
> +	lvds-channel at 1 {
> +		crtc = "ipu2-di1";
> +	};
> +};
> +
> +&mxcfb1 {
> +	status = "okay";
> +};
> +
> +&mxcfb2 {
> +	status = "okay";
> +};
> +
> +&mxcfb3 {
> +	status = "okay";
> +};
> +
> +&mxcfb4 {
> +	status = "okay";
> +};
> +
> +&sata {
> +	status = "okay";
> +};
> diff --git a/arch/arm/dts/imx6qdl-sabresd.dtsi
> b/arch/arm/dts/imx6qdl-sabresd.dtsi new file mode 100644
> index 0000000..09b2591
> --- /dev/null
> +++ b/arch/arm/dts/imx6qdl-sabresd.dtsi
> @@ -0,0 +1,1065 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2012-2016 Freescale Semiconductor, Inc.
> + * Copyright 2011 Linaro Ltd.
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +
> +/ {
> +	aliases {
> +		mxcfb0 = &mxcfb1;
> +		mxcfb1 = &mxcfb2;
> +		mxcfb2 = &mxcfb3;
> +		mxcfb3 = &mxcfb4;
> +		mmc1 = &usdhc3;
> +	};
> +
> +	battery: max8903 at 0 {
> +		compatible = "fsl,max8903-charger";
> +		pinctrl-names = "default";
> +		dok_input = <&gpio2 24 1>;
> +		uok_input = <&gpio1 27 1>;
> +		chg_input = <&gpio3 23 1>;
> +		flt_input = <&gpio5 2 1>;
> +		fsl,dcm_always_high;
> +		fsl,dc_valid;
> +		fsl,usb_valid;
> +		status = "okay";
> +	};
> +
> +	hannstar_cabc {
> +		compatible = "hannstar,cabc";
> +		lvds0 {
> +			gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
> +		};
> +		lvds1 {
> +			gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
> +		};
> +	};
> +
> +	chosen {
> +		stdout-path = &uart1;
> +	};
> +
> +	leds {
> +		compatible = "gpio-leds";
> +
> +		charger-led {
> +			gpios = <&gpio1 2 0>;
> +			linux,default-trigger =
> "max8903-charger-charging";
> +			retain-state-suspended;
> +		};
> +	};
> +
> +	memory: memory {
> +		reg = <0x10000000 0x40000000>;
> +	};
> +
> +	regulators {
> +		compatible = "simple-bus";
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		reg_usb_otg_vbus: regulator at 0 {
> +			compatible = "regulator-fixed";
> +			reg = <0>;
> +			regulator-name = "usb_otg_vbus";
> +			regulator-min-microvolt = <5000000>;
> +			regulator-max-microvolt = <5000000>;
> +			gpio = <&gpio3 22 0>;
> +			enable-active-high;
> +			vin-supply = <&swbst_reg>;
> +		};
> +
> +		reg_usb_h1_vbus: regulator at 1 {
> +			compatible = "regulator-fixed";
> +			reg = <1>;
> +			regulator-name = "usb_h1_vbus";
> +			regulator-min-microvolt = <5000000>;
> +			regulator-max-microvolt = <5000000>;
> +			gpio = <&gpio1 29 0>;
> +			enable-active-high;
> +			vin-supply = <&swbst_reg>;
> +		};
> +
> +		reg_audio: regulator at 2 {
> +			compatible = "regulator-fixed";
> +			reg = <2>;
> +			regulator-name = "wm8962-supply";
> +			gpio = <&gpio4 10 0>;
> +			enable-active-high;
> +		};
> +
> +		reg_pcie: regulator at 3 {
> +			compatible = "regulator-fixed";
> +			reg = <3>;
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&pinctrl_pcie_reg>;
> +			regulator-name = "MPCIE_3V3";
> +			regulator-min-microvolt = <3300000>;
> +			regulator-max-microvolt = <3300000>;
> +			gpio = <&gpio3 19 0>;
> +			regulator-always-on;
> +			enable-active-high;
> +		};
> +
> +		reg_sensor: regulator at 4 {
> +			compatible = "regulator-fixed";
> +			reg = <4>;
> +			regulator-name = "sensor-supply";
> +			regulator-min-microvolt = <3300000>;
> +			regulator-max-microvolt = <3300000>;
> +			gpio = <&gpio2 31 0>;
> +			startup-delay-us = <500>;
> +			enable-active-high;
> +		};
> +
> +		reg_hdmi: regulator at 5 {
> +			compatible = "regulator-fixed";
> +			reg = <5>;
> +			regulator-name = "hdmi-5v-supply";
> +			regulator-min-microvolt = <5000000>;
> +			regulator-max-microvolt = <5000000>;
> +			enable-active-high;
> +			hdmi-5v-supply = <&swbst_reg>;
> +		};
> +
> +		reg_mipi_dsi_pwr_on: mipi_dsi_pwr_on {
> +			compatible = "regulator-fixed";
> +			regulator-name = "mipi_dsi_pwr_on";
> +			gpio = <&gpio6 14 0>;
> +			enable-active-high;
> +		};
> +	};
> +
> +	gpio-keys {
> +		compatible = "gpio-keys";
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_gpio_keys>;
> +
> +		power {
> +			label = "Power Button";
> +			gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
> +			gpio-key,wakeup;
> +			linux,code = <KEY_POWER>;
> +		};
> +
> +		volume-up {
> +			label = "Volume Up";
> +			gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
> +			gpio-key,wakeup;
> +			linux,code = <KEY_VOLUMEUP>;
> +		};
> +
> +		volume-down {
> +			label = "Volume Down";
> +			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
> +			gpio-key,wakeup;
> +			linux,code = <KEY_VOLUMEDOWN>;
> +		};
> +	};
> +
> +	sound {
> +		compatible = "fsl,imx6q-sabresd-wm8962",
> +			   "fsl,imx-audio-wm8962";
> +		model = "wm8962-audio";
> +		cpu-dai = <&ssi2>;
> +		audio-codec = <&codec>;
> +		asrc-controller = <&asrc>;
> +		audio-routing =
> +			"Headphone Jack", "HPOUTL",
> +			"Headphone Jack", "HPOUTR",
> +			"Ext Spk", "SPKOUTL",
> +			"Ext Spk", "SPKOUTR",
> +			"AMIC", "MICBIAS",
> +			"IN3R", "AMIC",
> +			"DMIC", "MICBIAS",
> +			"DMICDAT", "DMIC",
> +			"CPU-Playback", "ASRC-Playback",
> +			"Playback", "CPU-Playback",
> +			"ASRC-Capture", "CPU-Capture",
> +			"CPU-Capture", "Capture";
> +		mux-int-port = <2>;
> +		mux-ext-port = <3>;
> +		codec-master;
> +		hp-det-gpios = <&gpio7 8 1>;
> +		mic-det-gpios = <&gpio1 9 1>;
> +	};
> +
> +	mxcfb1: fb at 0 {
> +		compatible = "fsl,mxc_sdc_fb";
> +		disp_dev = "ldb";
> +		interface_pix_fmt = "RGB666";
> +		default_bpp = <16>;
> +		int_clk = <0>;
> +		late_init = <0>;
> +		status = "disabled";
> +	};
> +
> +	mxcfb2: fb at 1 {
> +		compatible = "fsl,mxc_sdc_fb";
> +		disp_dev = "hdmi";
> +		interface_pix_fmt = "RGB24";
> +		mode_str ="1920x1080M at 60";
> +		default_bpp = <24>;
> +		int_clk = <0>;
> +		late_init = <0>;
> +		status = "disabled";
> +	};
> +
> +	mxcfb3: fb at 2 {
> +		compatible = "fsl,mxc_sdc_fb";
> +		disp_dev = "lcd";
> +		interface_pix_fmt = "RGB565";
> +		mode_str ="CLAA-WVGA";
> +		default_bpp = <16>;
> +		int_clk = <0>;
> +		late_init = <0>;
> +		status = "disabled";
> +	};
> +
> +	mxcfb4: fb at 3 {
> +		compatible = "fsl,mxc_sdc_fb";
> +		disp_dev = "ldb";
> +		interface_pix_fmt = "RGB666";
> +		default_bpp = <16>;
> +		int_clk = <0>;
> +		late_init = <0>;
> +		status = "disabled";
> +	};
> +
> +	lcd at 0 {
> +		compatible = "fsl,lcd";
> +		ipu_id = <0>;
> +		disp_id = <0>;
> +		default_ifmt = "RGB565";
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_ipu1>;
> +		status = "okay";
> +	};
> +
> +	backlight {
> +		compatible = "pwm-backlight";
> +		pwms = <&pwm1 0 5000000>;
> +		brightness-levels = <0 4 8 16 32 64 128 255>;
> +		default-brightness-level = <7>;
> +		status = "okay";
> +	};
> +
> +	v4l2_cap_0 {
> +		compatible = "fsl,imx6q-v4l2-capture";
> +		ipu_id = <0>;
> +		csi_id = <0>;
> +		mclk_source = <0>;
> +		status = "okay";
> +	};
> +
> +	v4l2_cap_1 {
> +		compatible = "fsl,imx6q-v4l2-capture";
> +		ipu_id = <0>;
> +		csi_id = <1>;
> +		mclk_source = <0>;
> +		status = "okay";
> +	};
> +
> +	v4l2_out {
> +		compatible = "fsl,mxc_v4l2_output";
> +		status = "okay";
> +	};
> +
> +	mipi_dsi_reset: mipi-dsi-reset {
> +		compatible = "gpio-reset";
> +		reset-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
> +		reset-delay-us = <50>;
> +		#reset-cells = <0>;
> +	};
> +};
> +
> +&audmux {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_audmux>;
> +	status = "okay";
> +};
> +
> +&cpu0 {
> +	arm-supply = <&sw1a_reg>;
> +	soc-supply = <&sw1c_reg>;
> +};
> +
> +&clks {
> +	fsl,ldb-di0-parent = <&clks IMX6QDL_CLK_PLL2_PFD0_352M>;
> +	fsl,ldb-di1-parent = <&clks IMX6QDL_CLK_PLL2_PFD0_352M>;
> +};
> +
> +&ecspi1 {
> +	fsl,spi-num-chipselects = <1>;
> +	cs-gpios = <&gpio4 9 0>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_ecspi1>;
> +	status = "okay";
> +
> +	flash: m25p80 at 0 {
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		compatible = "st,m25p32";
> +		spi-max-frequency = <20000000>;
> +		reg = <0>;
> +	};
> +};
> +
> +&fec {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_enet>;
> +	phy-mode = "rgmii";
> +	phy-reset-gpios = <&gpio1 25 0>;
> +	fsl,magic-packet;
> +	status = "okay";
> +};
> +
> +&gpc {
> +	fsl,ldo-bypass = <1>;
> +};
> +
> +&dcic1 {
> +	dcic_id = <0>;
> +	dcic_mux = "dcic-hdmi";
> +	status = "okay";
> +};
> +
> +&dcic2 {
> +	dcic_id = <1>;
> +	dcic_mux = "dcic-lvds1";
> +	status = "okay";
> +};
> +
> +&i2c1 {
> +	clock-frequency = <100000>;
> +	pinctrl-names = "default", "gpio";
> +	pinctrl-0 = <&pinctrl_i2c1>;
> +	pinctrl-1 = <&pinctrl_i2c1_gpio>;
> +	scl-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>;
> +	sda-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>;
> +	status = "okay";
> +
> +	codec: wm8962 at 1a {
> +		compatible = "wlf,wm8962";
> +		reg = <0x1a>;
> +		clocks = <&clks IMX6QDL_CLK_CKO>;
> +		DCVDD-supply = <&reg_audio>;
> +		DBVDD-supply = <&reg_audio>;
> +		AVDD-supply = <&reg_audio>;
> +		CPVDD-supply = <&reg_audio>;
> +		MICVDD-supply = <&reg_audio>;
> +		PLLVDD-supply = <&reg_audio>;
> +		SPKVDD1-supply = <&reg_audio>;
> +		SPKVDD2-supply = <&reg_audio>;
> +		gpio-cfg = <
> +			0x0000 /* 0:Default */
> +			0x0000 /* 1:Default */
> +			0x0013 /* 2:FN_DMICCLK */
> +			0x0000 /* 3:Default */
> +			0x8014 /* 4:FN_DMICCDAT */
> +			0x0000 /* 5:Default */
> +		>;
> +		amic-mono;
> +       };
> +
> +	mma8451 at 1c {
> +		compatible = "fsl,mma8451";
> +		reg = <0x1c>;
> +		position = <0>;
> +		vdd-supply = <&reg_sensor>;
> +		vddio-supply = <&reg_sensor>;
> +		interrupt-parent = <&gpio1>;
> +		interrupts = <18 8>;
> +		interrupt-route = <1>;
> +	};
> +
> +	ov564x: ov564x at 3c {
> +		compatible = "ovti,ov564x";
> +		reg = <0x3c>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_ipu1_2>;
> +		clocks = <&clks IMX6QDL_CLK_CKO>;
> +		clock-names = "csi_mclk";
> +		DOVDD-supply = <&vgen4_reg>; /* 1.8v */
> +		AVDD-supply = <&vgen3_reg>;  /* 2.8v, on rev C board
> is VGEN3,
> +						on rev B board is
> VGEN5 */
> +		DVDD-supply = <&vgen2_reg>;  /* 1.5v*/
> +		pwn-gpios = <&gpio1 16 1>;   /* active low: SD1_DAT0
> */
> +		rst-gpios = <&gpio1 17 0>;   /* active high:
> SD1_DAT1 */
> +		csi_id = <0>;
> +		mclk = <24000000>;
> +		mclk_source = <0>;
> +	};
> +};
> +
> +&i2c2 {
> +	clock-frequency = <100000>;
> +	pinctrl-names = "default", "gpio";
> +	pinctrl-0 = <&pinctrl_i2c2>;
> +	pinctrl-1 = <&pinctrl_i2c2_gpio>;
> +	scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
> +	sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
> +	status = "okay";
> +
> +	egalax_ts at 04 {
> +		compatible = "eeti,egalax_ts";
> +		reg = <0x04>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_i2c2_egalax_int>;
> +		interrupt-parent = <&gpio6>;
> +		interrupts = <8 2>;
> +		wakeup-gpios = <&gpio6 8 GPIO_ACTIVE_HIGH>;
> +	};
> +
> +	max11801 at 48 {
> +		compatible = "maxim,max11801";
> +		reg = <0x48>;
> +		interrupt-parent = <&gpio3>;
> +		interrupts = <26 2>;
> +		work-mode = <1>;/*DCM mode*/
> +	};
> +
> +	pmic: pfuze100 at 08 {
> +		compatible = "fsl,pfuze100";
> +		reg = <0x08>;
> +
> +		regulators {
> +			sw1a_reg: sw1ab {
> +				regulator-min-microvolt = <300000>;
> +				regulator-max-microvolt = <1875000>;
> +				regulator-boot-on;
> +				regulator-always-on;
> +				regulator-ramp-delay = <6250>;
> +			};
> +
> +			sw1c_reg: sw1c {
> +				regulator-min-microvolt = <300000>;
> +				regulator-max-microvolt = <1875000>;
> +				regulator-boot-on;
> +				regulator-always-on;
> +				regulator-ramp-delay = <6250>;
> +			};
> +
> +			sw2_reg: sw2 {
> +				regulator-min-microvolt = <800000>;
> +				regulator-max-microvolt = <3300000>;
> +				regulator-boot-on;
> +				regulator-always-on;
> +				regulator-ramp-delay = <6250>;
> +			};
> +
> +			sw3a_reg: sw3a {
> +				regulator-min-microvolt = <400000>;
> +				regulator-max-microvolt = <1975000>;
> +				regulator-boot-on;
> +				regulator-always-on;
> +			};
> +
> +			sw3b_reg: sw3b {
> +				regulator-min-microvolt = <400000>;
> +				regulator-max-microvolt = <1975000>;
> +				regulator-boot-on;
> +				regulator-always-on;
> +			};
> +
> +			sw4_reg: sw4 {
> +				regulator-min-microvolt = <800000>;
> +				regulator-max-microvolt = <3300000>;
> +			};
> +
> +			swbst_reg: swbst {
> +				regulator-min-microvolt = <5000000>;
> +				regulator-max-microvolt = <5150000>;
> +			};
> +
> +			snvs_reg: vsnvs {
> +				regulator-min-microvolt = <1000000>;
> +				regulator-max-microvolt = <3000000>;
> +				regulator-boot-on;
> +				regulator-always-on;
> +			};
> +
> +			vref_reg: vrefddr {
> +				regulator-boot-on;
> +				regulator-always-on;
> +			};
> +
> +			vgen1_reg: vgen1 {
> +				regulator-min-microvolt = <800000>;
> +				regulator-max-microvolt = <1550000>;
> +			};
> +
> +			vgen2_reg: vgen2 {
> +				regulator-min-microvolt = <800000>;
> +				regulator-max-microvolt = <1550000>;
> +			};
> +
> +			vgen3_reg: vgen3 {
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <3300000>;
> +			};
> +
> +			vgen4_reg: vgen4 {
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <3300000>;
> +				regulator-always-on;
> +			};
> +
> +			vgen5_reg: vgen5 {
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <3300000>;
> +				regulator-always-on;
> +			};
> +
> +			vgen6_reg: vgen6 {
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <3300000>;
> +				regulator-always-on;
> +			};
> +		};
> +	};
> +
> +	ov564x_mipi: ov564x_mipi at 3c { /* i2c2 driver */
> +		compatible = "ovti,ov564x_mipi";
> +		reg = <0x3c>;
> +		clocks = <&clks 201>;
> +		clock-names = "csi_mclk";
> +		DOVDD-supply = <&vgen4_reg>; /* 1.8v */
> +		AVDD-supply = <&vgen3_reg>;  /* 2.8v, rev C board is
> VGEN3
> +						rev B board is VGEN5
> */
> +		DVDD-supply = <&vgen2_reg>;  /* 1.5v*/
> +		pwn-gpios = <&gpio1 19 1>;   /* active low: SD1_CLK
> */
> +		rst-gpios = <&gpio1 20 0>;   /* active high:
> SD1_DAT2 */
> +		csi_id = <1>;
> +		mclk = <24000000>;
> +		mclk_source = <0>;
> +	};
> +};
> +
> +&i2c3 {
> +	clock-frequency = <100000>;
> +	pinctrl-names = "default", "gpio";
> +	pinctrl-0 = <&pinctrl_i2c3>;
> +	pinctrl-1 = <&pinctrl_i2c3_gpio>;
> +	scl-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
> +	sda-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
> +	status = "okay";
> +
> +	egalax_ts at 04 {
> +		compatible = "eeti,egalax_ts";
> +		reg = <0x04>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_i2c3_egalax_int>;
> +		interrupt-parent = <&gpio6>;
> +		interrupts = <7 2>;
> +		wakeup-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
> +	};
> +
> +	isl29023 at 44 {
> +		compatible = "fsl,isl29023";
> +		reg = <0x44>;
> +		rext = <499>;
> +		vdd-supply = <&reg_sensor>;
> +		interrupt-parent = <&gpio3>;
> +		interrupts = <9 2>;
> +	};
> +
> +	mag3110 at 0e {
> +		compatible = "fsl,mag3110";
> +		reg = <0x0e>;
> +		position = <2>;
> +		vdd-supply = <&reg_sensor>;
> +		vddio-supply = <&reg_sensor>;
> +		interrupt-parent = <&gpio3>;
> +		interrupts = <16 1>;
> +	};
> +};
> +
> +&iomuxc {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_hog>;
> +
> +	imx6qdl-sabresd {
> +		pinctrl_hog: hoggrp {
> +			fsl,pins = <
> +				MX6QDL_PAD_NANDF_D0__GPIO2_IO00
> 0x80000000
> +				MX6QDL_PAD_NANDF_D1__GPIO2_IO01
> 0x80000000
> +				MX6QDL_PAD_NANDF_D2__GPIO2_IO02
> 0x80000000
> +				MX6QDL_PAD_NANDF_D3__GPIO2_IO03
> 0x80000000
> +				MX6QDL_PAD_GPIO_0__CCM_CLKO1
> 0x130b0
> +				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29
> 0x80000000
> +				MX6QDL_PAD_EIM_D22__GPIO3_IO22
> 0x80000000
> +				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25
> 0x80000000
> +				MX6QDL_PAD_EIM_D26__GPIO3_IO26
> 0x80000000
> +				MX6QDL_PAD_EIM_CS1__GPIO2_IO24
> 0x80000000
> +				MX6QDL_PAD_ENET_RXD0__GPIO1_IO27
> 0x80000000
> +				MX6QDL_PAD_EIM_A25__GPIO5_IO02
> 0x80000000
> +				MX6QDL_PAD_EIM_D23__GPIO3_IO23
> 0x80000000
> +				MX6QDL_PAD_EIM_EB3__GPIO2_IO31
> 0x80000000
> +				MX6QDL_PAD_SD1_CMD__GPIO1_IO18
> 0x80000000
> +				MX6QDL_PAD_EIM_D16__GPIO3_IO16
> 0x80000000
> +
> MX6QDL_PAD_SD3_RST__GPIO7_IO08	0x80000000
> +				MX6QDL_PAD_GPIO_9__GPIO1_IO09
> 0x80000000
> +				MX6QDL_PAD_EIM_DA9__GPIO3_IO09
> 0x80000000
> +				MX6QDL_PAD_NANDF_CS0__GPIO6_IO11
> 0x80000000
> +				MX6QDL_PAD_NANDF_CS1__GPIO6_IO14
> 0x80000000
> +				MX6QDL_PAD_NANDF_CS2__GPIO6_IO15
> 0x80000000
> +				MX6QDL_PAD_NANDF_CS3__GPIO6_IO16
> 0x80000000
> +			>;
> +		};
> +
> +		pinctrl_audmux: audmuxgrp {
> +			fsl,pins = <
> +
> MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0
> +
> MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0
> +
> MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0
> +
> MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0
> +			>;
> +		};
> +
> +		pinctrl_ecspi1: ecspi1grp {
> +			fsl,pins = <
> +
> MX6QDL_PAD_KEY_COL1__ECSPI1_MISO	0x100b1
> +
> MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI	0x100b1
> +
> MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK	0x100b1
> +
> MX6QDL_PAD_KEY_ROW1__GPIO4_IO09		0x1b0b0
> +			>;
> +		};
> +
> +		pinctrl_i2c2_egalax_int: egalax_i2c2_intgrp {
> +			fsl,pins = <
> +				MX6QDL_PAD_NANDF_ALE__GPIO6_IO08
> 0x80000000
> +			>;
> +		};
> +
> +		pinctrl_i2c3_egalax_int: egalax_i2c3_intgrp {
> +			fsl,pins = <
> +				MX6QDL_PAD_NANDF_CLE__GPIO6_IO07
> 0x80000000
> +			>;
> +		};
> +
> +		pinctrl_enet: enetgrp {
> +			fsl,pins = <
> +
> MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
> +
> MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
> +
> MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b0b0
> +
> MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b0b0
> +
> MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b0b0
> +
> MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b0b0
> +
> MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b0b0
> +
> MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b0b0
> +
> MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
> +
> MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
> +
> MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b0b0
> +
> MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b0b0
> +
> MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b0b0
> +
> MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b0b0
> +
> MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b0b0
> +
> MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
> +			>;
> +		};
> +
> +		pinctrl_enet_irq: enetirqgrp {
> +			fsl,pins = <
> +
> MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1
> +			>;
> +		};
> +
> +		pinctrl_gpio_keys: gpio_keysgrp {
> +			fsl,pins = <
> +				MX6QDL_PAD_EIM_D29__GPIO3_IO29
> 0x1b0b0
> +				MX6QDL_PAD_GPIO_4__GPIO1_IO04
> 0x1b0b0
> +				MX6QDL_PAD_GPIO_5__GPIO1_IO05
> 0x1b0b0
> +			>;
> +		};
> +
> +		pinctrl_hdmi_cec: hdmicecgrp {
> +			fsl,pins = <
> +
> MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x108b0
> +			>;
> +		};
> +
> +		pinctrl_hdmi_hdcp: hdmihdcpgrp {
> +			fsl,pins = <
> +				MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL
> 0x4001b8b1
> +				MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA
> 0x4001b8b1
> +			>;
> +		};
> +
> +		pinctrl_i2c1: i2c1grp {
> +			fsl,pins = <
> +
> MX6QDL_PAD_CSI0_DAT8__I2C1_SDA		0x4001b8b1
> +
> MX6QDL_PAD_CSI0_DAT9__I2C1_SCL		0x4001b8b1
> +			>;
> +		};
> +
> +		pinctrl_i2c1_gpio: i2c1grp_gpio {
> +			fsl,pins = <
> +
> MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26        0x1b8b1
> +
> MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27        0x1b8b1
> +			>;
> +		};
> +
> +		pinctrl_i2c2: i2c2grp {
> +			fsl,pins = <
> +
> MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
> +
> MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
> +			>;
> +		};
> +
> +		pinctrl_i2c2_gpio: i2c2grp_gpio {
> +			fsl,pins = <
> +
> MX6QDL_PAD_KEY_COL3__GPIO4_IO12         0x1b8b1
> +
> MX6QDL_PAD_KEY_ROW3__GPIO4_IO13         0x1b8b1
> +			>;
> +		};
> +
> +		pinctrl_i2c3: i2c3grp {
> +			fsl,pins = <
> +
> MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1
> +
> MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
> +			>;
> +		};
> +
> +		pinctrl_i2c3_gpio: i2c3grp_gpio {
> +			fsl,pins = <
> +
> MX6QDL_PAD_GPIO_3__GPIO1_IO03           0x1b8b1
> +
> MX6QDL_PAD_GPIO_6__GPIO1_IO06           0x1b8b1
> +			>;
> +		};
> +
> +		pinctrl_ipu1: ipu1grp {
> +			fsl,pins = <
> +
> MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
> +
> MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
> +
> MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
> +
> MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
> +
> MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04        0x80000000
> +
> MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10
> +
> MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
> +
> MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
> +
> MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
> +
> MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
> +
> MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
> +
> MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
> +
> MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
> +
> MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
> +
> MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
> +
> MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
> +
> MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
> +
> MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
> +
> MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
> +
> MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
> +
> MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
> +
> MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
> +
> MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
> +
> MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
> +
> MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
> +
> MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
> +
> MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
> +
> MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
> +
> MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
> +			>;
> +		};
> +
> +		pinctrl_ipu1_2: ipu1grp-2 { /* parallel camera */
> +			fsl,pins = <
> +
> MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12    0x80000000
> +
> MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13    0x80000000
> +
> MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14    0x80000000
> +
> MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15    0x80000000
> +
> MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16    0x80000000
> +
> MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17    0x80000000
> +
> MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18    0x80000000
> +
> MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19    0x80000000
> +
> MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x80000000
> +
> MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK   0x80000000
> +
> MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC      0x80000000
> +
> MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC     0x80000000
> +
> MX6QDL_PAD_SD1_DAT1__GPIO1_IO17            0x80000000
> +
> MX6QDL_PAD_SD1_DAT0__GPIO1_IO16            0x80000000
> +			>;
> +		};
> +
> +		pinctrl_pcie: pciegrp {
> +			fsl,pins = <
> +
> MX6QDL_PAD_GPIO_17__GPIO7_IO12	0x1b0b0
> +			>;
> +		};
> +
> +		pinctrl_pcie_reg: pciereggrp {
> +			fsl,pins = <
> +
> MX6QDL_PAD_EIM_D19__GPIO3_IO19	0x1b0b0
> +			>;
> +		};
> +
> +		pinctrl_pwm1: pwm1grp {
> +			fsl,pins = <
> +
> MX6QDL_PAD_SD1_DAT3__PWM1_OUT		0x1b0b1
> +			>;
> +		};
> +
> +		pinctrl_uart1: uart1grp {
> +			fsl,pins = <
> +
> MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1
> +
> MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1
> +			>;
> +		};
> +
> +		pinctrl_uart5_1: uart5grp-1 {
> +			fsl,pins = <
> +
> MX6QDL_PAD_KEY_COL1__UART5_TX_DATA	0x1b0b1
> +
> MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x1b0b1
> +
> MX6QDL_PAD_KEY_COL4__UART5_RTS_B	0x1b0b1
> +
> MX6QDL_PAD_KEY_ROW4__UART5_CTS_B	0x1b0b1
> +			>;
> +		};
> +
> +		pinctrl_uart5dte_1: uart5dtegrp-1 {
> +			fsl,pins = <
> +
> MX6QDL_PAD_KEY_ROW1__UART5_TX_DATA	0x1b0b1
> +
> MX6QDL_PAD_KEY_COL1__UART5_RX_DATA	0x1b0b1
> +
> MX6QDL_PAD_KEY_ROW4__UART5_RTS_B	0x1b0b1
> +
> MX6QDL_PAD_KEY_COL4__UART5_CTS_B	0x1b0b1
> +			>;
> +		};
> +
> +		pinctrl_usbotg: usbotggrp {
> +			fsl,pins = <
> +
> MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x17059
> +			>;
> +		};
> +
> +		pinctrl_usdhc2: usdhc2grp {
> +			fsl,pins = <
> +
> MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059
> +
> MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059
> +
> MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059
> +
> MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059
> +
> MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059
> +
> MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059
> +
> MX6QDL_PAD_NANDF_D4__SD2_DATA4		0x17059
> +
> MX6QDL_PAD_NANDF_D5__SD2_DATA5		0x17059
> +
> MX6QDL_PAD_NANDF_D6__SD2_DATA6		0x17059
> +
> MX6QDL_PAD_NANDF_D7__SD2_DATA7		0x17059
> +			>;
> +		};
> +
> +		pinctrl_usdhc3: usdhc3grp {
> +			u-boot,dm-spl;
> +			fsl,pins = <
> +
> MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
> +
> MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
> +
> MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
> +
> MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
> +
> MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
> +
> MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
> +
> MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x17059
> +
> MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x17059
> +
> MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x17059
> +
> MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059
> +			>;
> +		};
> +
> +		pinctrl_usdhc4: usdhc4grp {
> +			fsl,pins = <
> +
> MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059
> +
> MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059
> +
> MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059
> +
> MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059
> +
> MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059
> +
> MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059
> +
> MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059
> +
> MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059
> +
> MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059
> +
> MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059
> +			>;
> +		};
> +
> +		pinctrl_wdog: wdoggrp {
> +			fsl,pins = <
> +				MX6QDL_PAD_GPIO_1__WDOG2_B 0x80000000
> +			>;
> +		};
> +	};
> +
> +	gpio_leds {
> +		pinctrl_gpio_leds: gpioledsgrp {
> +			fsl,pins = <
> +				MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
> +			>;
> +		};
> +	};
> +};
> +
> +&ldb {
> +	status = "okay";
> +
> +	lvds-channel at 0 {
> +		fsl,data-mapping = "spwg";
> +		fsl,data-width = <18>;
> +		status = "okay";
> +
> +		display-timings {
> +			native-mode = <&timing0>;
> +			timing0: hsd100pxn1 {
> +				clock-frequency = <65000000>;
> +				hactive = <1024>;
> +				vactive = <768>;
> +				hback-porch = <220>;
> +				hfront-porch = <40>;
> +				vback-porch = <21>;
> +				vfront-porch = <7>;
> +				hsync-len = <60>;
> +				vsync-len = <10>;
> +			};
> +		};
> +	};
> +
> +	lvds-channel at 1 {
> +		fsl,data-mapping = "spwg";
> +		fsl,data-width = <18>;
> +		primary;
> +		status = "okay";
> +
> +		display-timings {
> +			native-mode = <&timing1>;
> +			timing1: hsd100pxn1 {
> +				clock-frequency = <65000000>;
> +				hactive = <1024>;
> +				vactive = <768>;
> +				hback-porch = <220>;
> +				hfront-porch = <40>;
> +				vback-porch = <21>;
> +				vfront-porch = <7>;
> +				hsync-len = <60>;
> +				vsync-len = <10>;
> +			};
> +		};
> +	};
> +};
> +
> +&mipi_csi {
> +	status = "okay";
> +	ipu_id = <0>;
> +	csi_id = <1>;
> +	v_channel = <0>;
> +	lanes = <2>;
> +};
> +
> +&mipi_dsi {
> +	dev_id = <0>;
> +	disp_id = <1>;
> +	lcd_panel = "TRULY-WVGA";
> +	disp-power-on-supply = <&reg_mipi_dsi_pwr_on>;
> +	resets = <&mipi_dsi_reset>;
> +	status = "okay";
> +};
> +
> +&pcie {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_pcie>;
> +	reset-gpio = <&gpio7 12 0>;
> +	status = "okay";
> +};
> +
> +&pwm1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_pwm1>;
> +	status = "okay";
> +};
> +
> +&snvs_poweroff {
> +	status = "okay";
> +};
> +
> +&ssi2 {
> +	status = "okay";
> +};
> +
> +&uart1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_uart1>;
> +	status = "okay";
> +};
> +
> +&usbh1 {
> +	vbus-supply = <&reg_usb_h1_vbus>;
> +	status = "okay";
> +};
> +
> +&usbotg {
> +	vbus-supply = <&reg_usb_otg_vbus>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_usbotg>;
> +	disable-over-current;
> +	srp-disable;
> +	hnp-disable;
> +	adp-disable;
> +	status = "okay";
> +};
> +
> +&usbphy1 {
> +	tx-d-cal = <0x5>;
> +};
> +
> +&usbphy2 {
> +	tx-d-cal = <0x5>;
> +};
> +
> +&usdhc2 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_usdhc2>;
> +	bus-width = <8>;
> +	cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
> +	wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
> +	no-1-8-v;
> +	keep-power-in-suspend;
> +	enable-sdio-wakeup;
> +	status = "okay";
> +};
> +
> +&usdhc3 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_usdhc3>;
> +	bus-width = <8>;
> +	cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
> +	wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
> +	no-1-8-v;
> +	keep-power-in-suspend;
> +	enable-sdio-wakeup;
> +	u-boot,dm-spl;
> +	status = "okay";
> +};
> +
> +&usdhc4 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_usdhc4>;
> +	bus-width = <8>;
> +	non-removable;
> +	no-1-8-v;
> +	keep-power-in-suspend;
> +	status = "okay";
> +};
> +
> +&wdog1 {
> +	status = "disabled";
> +};
> +
> +&wdog2 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_wdog>;
> +	fsl,wdog_b;
> +	status = "okay";
> +};




Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma at denx.de
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