[Qemu-devel] [Bug 1815078] [NEW] Qemu 3.1.0 risc-v mie.MEIE

[Qemu-devel] [Bug 1815078] [NEW] Qemu 3.1.0 risc-v mie.MEIE

[RTOS Pharos]

Public bug reported:

Hello all,

There is a bug in qemu for Risc-v, related to the mie register: when we
try to set the MEIE bit (11) nothing is done, even when we are running
at machine mode.

Li   a0 , 1 << 11
Csrs mie , a0

And when we read mie it is as though nothing was done.

Going through the qemu source code I was able to correct it: on file
op_helper.c, line 94, the variable all_ints should be initialized with:

uint64_t all_ints = delegable_ints | MIP_MSIP | MIP_MTIP | MIP_MEIP;

That is, the MIP_MEIP was missing.

I've successfully triggered uart interrupts with this patch (virt
machine).

All the best,
Pharos team

** Affects: qemu
     Importance: Undecided
         Status: New

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Title:
  Qemu 3.1.0 risc-v mie.MEIE

Status in QEMU:
  New

Bug description:
  Hello all,

  There is a bug in qemu for Risc-v, related to the mie register: when
  we try to set the MEIE bit (11) nothing is done, even when we are
  running at machine mode.

  Li   a0 , 1 << 11
  Csrs mie , a0

  And when we read mie it is as though nothing was done.

  Going through the qemu source code I was able to correct it: on file
  op_helper.c, line 94, the variable all_ints should be initialized
  with:

  uint64_t all_ints = delegable_ints | MIP_MSIP | MIP_MTIP | MIP_MEIP;

  That is, the MIP_MEIP was missing.

  I've successfully triggered uart interrupts with this patch (virt
  machine).

  All the best,
  Pharos team

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1815078/+subscriptions

Re: [Qemu-devel] [Bug 1815078] [NEW] Qemu 3.1.0 risc-v mie.MEIE

[Alistair Francis]

On Thu, Feb 7, 2019 at 8:19 AM RTOS Pharos <1815078@bugs.launchpad.net> wrote:
>
> Public bug reported:
>
> Hello all,
>
> There is a bug in qemu for Risc-v, related to the mie register: when we
> try to set the MEIE bit (11) nothing is done, even when we are running
> at machine mode.
>
> Li   a0 , 1 << 11
> Csrs mie , a0
>
> And when we read mie it is as though nothing was done.
>
> Going through the qemu source code I was able to correct it: on file
> op_helper.c, line 94, the variable all_ints should be initialized with:
>
> uint64_t all_ints = delegable_ints | MIP_MSIP | MIP_MTIP | MIP_MEIP;
>
> That is, the MIP_MEIP was missing.
>
> I've successfully triggered uart interrupts with this patch (virt
> machine).

Would you like to send a patch?

Alistair

>
> All the best,
> Pharos team
>
> ** Affects: qemu
>      Importance: Undecided
>          Status: New
>
> --
> You received this bug notification because you are a member of qemu-
> devel-ml, which is subscribed to QEMU.
> https://bugs.launchpad.net/bugs/1815078
>
> Title:
>   Qemu 3.1.0 risc-v mie.MEIE
>
> Status in QEMU:
>   New
>
> Bug description:
>   Hello all,
>
>   There is a bug in qemu for Risc-v, related to the mie register: when
>   we try to set the MEIE bit (11) nothing is done, even when we are
>   running at machine mode.
>
>   Li   a0 , 1 << 11
>   Csrs mie , a0
>
>   And when we read mie it is as though nothing was done.
>
>   Going through the qemu source code I was able to correct it: on file
>   op_helper.c, line 94, the variable all_ints should be initialized
>   with:
>
>   uint64_t all_ints = delegable_ints | MIP_MSIP | MIP_MTIP | MIP_MEIP;
>
>   That is, the MIP_MEIP was missing.
>
>   I've successfully triggered uart interrupts with this patch (virt
>   machine).
>
>   All the best,
>   Pharos team
>
> To manage notifications about this bug go to:
> https://bugs.launchpad.net/qemu/+bug/1815078/+subscriptions
>

[Qemu-devel] [Bug 1815078] Re: Qemu 3.1.0 risc-v mie.MEIE

[Palmer Dabbelt]

It looks like this is fixed as of c7b951718815 ("RISC-V: Implement
modular CSR helper interface"), which was merged on January 14th.

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Title:
  Qemu 3.1.0 risc-v mie.MEIE

Status in QEMU:
  New

Bug description:
  Hello all,

  There is a bug in qemu for Risc-v, related to the mie register: when
  we try to set the MEIE bit (11) nothing is done, even when we are
  running at machine mode.

  Li   a0 , 1 << 11
  Csrs mie , a0

  And when we read mie it is as though nothing was done.

  Going through the qemu source code I was able to correct it: on file
  op_helper.c, line 94, the variable all_ints should be initialized
  with:

  uint64_t all_ints = delegable_ints | MIP_MSIP | MIP_MTIP | MIP_MEIP;

  That is, the MIP_MEIP was missing.

  I've successfully triggered uart interrupts with this patch (virt
  machine).

  All the best,
  Pharos team

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1815078/+subscriptions

[Qemu-devel] [Bug 1815078] Re: Qemu 3.1.0 risc-v mie.MEIE

[RTOS Pharos]

Good news,

Thanks

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https://bugs.launchpad.net/bugs/1815078

Title:
  Qemu 3.1.0 risc-v mie.MEIE

Status in QEMU:
  New

Bug description:
  Hello all,

  There is a bug in qemu for Risc-v, related to the mie register: when
  we try to set the MEIE bit (11) nothing is done, even when we are
  running at machine mode.

  Li   a0 , 1 << 11
  Csrs mie , a0

  And when we read mie it is as though nothing was done.

  Going through the qemu source code I was able to correct it: on file
  op_helper.c, line 94, the variable all_ints should be initialized
  with:

  uint64_t all_ints = delegable_ints | MIP_MSIP | MIP_MTIP | MIP_MEIP;

  That is, the MIP_MEIP was missing.

  I've successfully triggered uart interrupts with this patch (virt
  machine).

  All the best,
  Pharos team

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1815078/+subscriptions

[Qemu-devel] [Bug 1815078] Re: Qemu 3.1.0 risc-v mie.MEIE

[Palmer Dabbelt]

LMK if that patch doesn't fix your issue.  QEMU master is pretty stable
for RISC-V right now and since there's a handful of intertwined patches
the best bet is probably just to use the commit hash above.

This should be fixed in the 4.0 release, which is targeted for the
middle of April.

** Changed in: qemu
     Assignee: (unassigned) => Palmer Dabbelt (palmerdabbelt)

** Changed in: qemu
       Status: New => Fix Committed

-- 
You received this bug notification because you are a member of qemu-
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Title:
  Qemu 3.1.0 risc-v mie.MEIE

Status in QEMU:
  Fix Committed

Bug description:
  Hello all,

  There is a bug in qemu for Risc-v, related to the mie register: when
  we try to set the MEIE bit (11) nothing is done, even when we are
  running at machine mode.

  Li   a0 , 1 << 11
  Csrs mie , a0

  And when we read mie it is as though nothing was done.

  Going through the qemu source code I was able to correct it: on file
  op_helper.c, line 94, the variable all_ints should be initialized
  with:

  uint64_t all_ints = delegable_ints | MIP_MSIP | MIP_MTIP | MIP_MEIP;

  That is, the MIP_MEIP was missing.

  I've successfully triggered uart interrupts with this patch (virt
  machine).

  All the best,
  Pharos team

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1815078/+subscriptions

[Qemu-devel] [Bug 1815078] Re: Qemu 3.1.0 risc-v mie.MEIE

[RTOS Pharos]

OK, I'll give it a try and give you some feedback.

Thanks

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https://bugs.launchpad.net/bugs/1815078

Title:
  Qemu 3.1.0 risc-v mie.MEIE

Status in QEMU:
  Fix Committed

Bug description:
  Hello all,

  There is a bug in qemu for Risc-v, related to the mie register: when
  we try to set the MEIE bit (11) nothing is done, even when we are
  running at machine mode.

  Li   a0 , 1 << 11
  Csrs mie , a0

  And when we read mie it is as though nothing was done.

  Going through the qemu source code I was able to correct it: on file
  op_helper.c, line 94, the variable all_ints should be initialized
  with:

  uint64_t all_ints = delegable_ints | MIP_MSIP | MIP_MTIP | MIP_MEIP;

  That is, the MIP_MEIP was missing.

  I've successfully triggered uart interrupts with this patch (virt
  machine).

  All the best,
  Pharos team

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1815078/+subscriptions

[Qemu-devel] [Bug 1815078] Re: Qemu 3.1.0 risc-v mie.MEIE

[RTOS Pharos]

So I tried it but got the error:

ERROR: missing file ../qemu-3.1.0/ui/keycodemapdb/README

This is not a GIT checkout but module content appears to
be missing. Do not use 'git archive' or GitHub download links
to acquire QEMU source archives. Non-GIT builds are only
supported with source archives linked from:

  https://www.qemu.org/download/

Developers working with GIT can use scripts/archive-source.sh
if they need to create valid source archives.

Makefile.cross-compiler:259: recipe for target 'qemu-3.1' failed
make: *** [qemu-3.1] Error 1


Get this is standard error, but I don't have time now to see how to work
around it. Maybe later I can

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1815078

Title:
  Qemu 3.1.0 risc-v mie.MEIE

Status in QEMU:
  Fix Committed

Bug description:
  Hello all,

  There is a bug in qemu for Risc-v, related to the mie register: when
  we try to set the MEIE bit (11) nothing is done, even when we are
  running at machine mode.

  Li   a0 , 1 << 11
  Csrs mie , a0

  And when we read mie it is as though nothing was done.

  Going through the qemu source code I was able to correct it: on file
  op_helper.c, line 94, the variable all_ints should be initialized
  with:

  uint64_t all_ints = delegable_ints | MIP_MSIP | MIP_MTIP | MIP_MEIP;

  That is, the MIP_MEIP was missing.

  I've successfully triggered uart interrupts with this patch (virt
  machine).

  All the best,
  Pharos team

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1815078/+subscriptions

Re: [Qemu-devel] [Bug 1815078] Re: Qemu 3.1.0 risc-v mie.MEIE

[Alistair Francis]

On Wed, Feb 13, 2019 at 11:02 PM RTOS Pharos <1815078@bugs.launchpad.net> wrote:
>
> So I tried it but got the error:
>
> ERROR: missing file ../qemu-3.1.0/ui/keycodemapdb/README
>
> This is not a GIT checkout but module content appears to
> be missing. Do not use 'git archive' or GitHub download links
> to acquire QEMU source archives. Non-GIT builds are only
> supported with source archives linked from:
>
>   https://www.qemu.org/download/
>
> Developers working with GIT can use scripts/archive-source.sh
> if they need to create valid source archives.
>
> Makefile.cross-compiler:259: recipe for target 'qemu-3.1' failed
> make: *** [qemu-3.1] Error 1
>
>
> Get this is standard error, but I don't have time now to see how to work
> around it. Maybe later I can

The error describes how to fix the error. Just git clone the QEMU
source directly instead of using the GitHub tarballs.

Alistair

>
> --
> You received this bug notification because you are a member of qemu-
> devel-ml, which is subscribed to QEMU.
> https://bugs.launchpad.net/bugs/1815078
>
> Title:
>   Qemu 3.1.0 risc-v mie.MEIE
>
> Status in QEMU:
>   Fix Committed
>
> Bug description:
>   Hello all,
>
>   There is a bug in qemu for Risc-v, related to the mie register: when
>   we try to set the MEIE bit (11) nothing is done, even when we are
>   running at machine mode.
>
>   Li   a0 , 1 << 11
>   Csrs mie , a0
>
>   And when we read mie it is as though nothing was done.
>
>   Going through the qemu source code I was able to correct it: on file
>   op_helper.c, line 94, the variable all_ints should be initialized
>   with:
>
>   uint64_t all_ints = delegable_ints | MIP_MSIP | MIP_MTIP | MIP_MEIP;
>
>   That is, the MIP_MEIP was missing.
>
>   I've successfully triggered uart interrupts with this patch (virt
>   machine).
>
>   All the best,
>   Pharos team
>
> To manage notifications about this bug go to:
> https://bugs.launchpad.net/qemu/+bug/1815078/+subscriptions
>

[Qemu-devel] [Bug 1815078] Re: Qemu 3.1.0 risc-v mie.MEIE

[Thomas Huth]

** Changed in: qemu
       Status: Fix Committed => Fix Released

-- 
You received this bug notification because you are a member of qemu-
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https://bugs.launchpad.net/bugs/1815078

Title:
  Qemu 3.1.0 risc-v mie.MEIE

Status in QEMU:
  Fix Released

Bug description:
  Hello all,

  There is a bug in qemu for Risc-v, related to the mie register: when
  we try to set the MEIE bit (11) nothing is done, even when we are
  running at machine mode.

  Li   a0 , 1 << 11
  Csrs mie , a0

  And when we read mie it is as though nothing was done.

  Going through the qemu source code I was able to correct it: on file
  op_helper.c, line 94, the variable all_ints should be initialized
  with:

  uint64_t all_ints = delegable_ints | MIP_MSIP | MIP_MTIP | MIP_MEIP;

  That is, the MIP_MEIP was missing.

  I've successfully triggered uart interrupts with this patch (virt
  machine).

  All the best,
  Pharos team

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1815078/+subscriptions