* [PATCH 01/38] net/sfc/base: correct annotations where NULL input is OK
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 02/38] net/sfc/base: update external port number calculation Andrew Rybchenko
` (37 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Richard Houldsworth
From: Richard Houldsworth <rhouldsworth@solarflare.com>
Correct annotations where NULL input can be permitted
Signed-off-by: Richard Houldsworth <rhouldsworth@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/ef10_impl.h | 2 +-
drivers/net/sfc/base/ef10_rx.c | 42 +++++++++++++++++++++-----------
drivers/net/sfc/base/efx.h | 2 +-
drivers/net/sfc/base/efx_intr.c | 2 +-
drivers/net/sfc/base/efx_rx.c | 6 ++---
5 files changed, 34 insertions(+), 20 deletions(-)
diff --git a/drivers/net/sfc/base/ef10_impl.h b/drivers/net/sfc/base/ef10_impl.h
index f971063a1..83a8a2936 100644
--- a/drivers/net/sfc/base/ef10_impl.h
+++ b/drivers/net/sfc/base/ef10_impl.h
@@ -1012,7 +1012,7 @@ ef10_rx_qcreate(
__in unsigned int index,
__in unsigned int label,
__in efx_rxq_type_t type,
- __in const union efx_rxq_type_data_u *type_data,
+ __in_opt const union efx_rxq_type_data_u *type_data,
__in efsys_mem_t *esmp,
__in size_t ndescs,
__in uint32_t id,
diff --git a/drivers/net/sfc/base/ef10_rx.c b/drivers/net/sfc/base/ef10_rx.c
index 3c8f4f3b9..d18010d0f 100644
--- a/drivers/net/sfc/base/ef10_rx.c
+++ b/drivers/net/sfc/base/ef10_rx.c
@@ -988,7 +988,7 @@ ef10_rx_qcreate(
__in unsigned int index,
__in unsigned int label,
__in efx_rxq_type_t type,
- __in const efx_rxq_type_data_t *type_data,
+ __in_opt const efx_rxq_type_data_t *type_data,
__in efsys_mem_t *esmp,
__in size_t ndescs,
__in uint32_t id,
@@ -1031,6 +1031,10 @@ ef10_rx_qcreate(
break;
#if EFSYS_OPT_RX_PACKED_STREAM
case EFX_RXQ_TYPE_PACKED_STREAM:
+ if (type_data == NULL) {
+ rc = EINVAL;
+ goto fail3;
+ }
switch (type_data->ertd_packed_stream.eps_buf_size) {
case EFX_RXQ_PACKED_STREAM_BUF_SIZE_1M:
ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_1M;
@@ -1049,12 +1053,16 @@ ef10_rx_qcreate(
break;
default:
rc = ENOTSUP;
- goto fail3;
+ goto fail4;
}
break;
#endif /* EFSYS_OPT_RX_PACKED_STREAM */
#if EFSYS_OPT_RX_ES_SUPER_BUFFER
case EFX_RXQ_TYPE_ES_SUPER_BUFFER:
+ if (type_data == NULL) {
+ rc = EINVAL;
+ goto fail5;
+ }
ps_buf_size = 0;
es_bufs_per_desc =
type_data->ertd_es_super_buffer.eessb_bufs_per_desc;
@@ -1068,7 +1076,7 @@ ef10_rx_qcreate(
#endif /* EFSYS_OPT_RX_ES_SUPER_BUFFER */
default:
rc = ENOTSUP;
- goto fail4;
+ goto fail6;
}
#if EFSYS_OPT_RX_PACKED_STREAM
@@ -1076,13 +1084,13 @@ ef10_rx_qcreate(
/* Check if datapath firmware supports packed stream mode */
if (encp->enc_rx_packed_stream_supported == B_FALSE) {
rc = ENOTSUP;
- goto fail5;
+ goto fail7;
}
/* Check if packed stream allows configurable buffer sizes */
if ((ps_buf_size != MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_1M) &&
(encp->enc_rx_var_packed_stream_supported == B_FALSE)) {
rc = ENOTSUP;
- goto fail6;
+ goto fail8;
}
}
#else /* EFSYS_OPT_RX_PACKED_STREAM */
@@ -1093,17 +1101,17 @@ ef10_rx_qcreate(
if (es_bufs_per_desc > 0) {
if (encp->enc_rx_es_super_buffer_supported == B_FALSE) {
rc = ENOTSUP;
- goto fail7;
+ goto fail9;
}
if (!IS_P2ALIGNED(es_max_dma_len,
EFX_RX_ES_SUPER_BUFFER_BUF_ALIGNMENT)) {
rc = EINVAL;
- goto fail8;
+ goto fail10;
}
if (!IS_P2ALIGNED(es_buf_stride,
EFX_RX_ES_SUPER_BUFFER_BUF_ALIGNMENT)) {
rc = EINVAL;
- goto fail9;
+ goto fail11;
}
}
#else /* EFSYS_OPT_RX_ES_SUPER_BUFFER */
@@ -1125,7 +1133,7 @@ ef10_rx_qcreate(
esmp, disable_scatter, want_inner_classes,
ps_buf_size, es_bufs_per_desc, es_max_dma_len,
es_buf_stride, hol_block_timeout)) != 0)
- goto fail10;
+ goto fail12;
erp->er_eep = eep;
erp->er_label = label;
@@ -1136,25 +1144,31 @@ ef10_rx_qcreate(
return (0);
+fail12:
+ EFSYS_PROBE(fail12);
+#if EFSYS_OPT_RX_ES_SUPER_BUFFER
+fail11:
+ EFSYS_PROBE(fail11);
fail10:
EFSYS_PROBE(fail10);
-#if EFSYS_OPT_RX_ES_SUPER_BUFFER
fail9:
EFSYS_PROBE(fail9);
+#endif /* EFSYS_OPT_RX_ES_SUPER_BUFFER */
+#if EFSYS_OPT_RX_PACKED_STREAM
fail8:
EFSYS_PROBE(fail8);
fail7:
EFSYS_PROBE(fail7);
-#endif /* EFSYS_OPT_RX_ES_SUPER_BUFFER */
-#if EFSYS_OPT_RX_PACKED_STREAM
+#endif /* EFSYS_OPT_RX_PACKED_STREAM */
fail6:
EFSYS_PROBE(fail6);
+#if EFSYS_OPT_RX_ES_SUPER_BUFFER
fail5:
EFSYS_PROBE(fail5);
-#endif /* EFSYS_OPT_RX_PACKED_STREAM */
+#endif /* EFSYS_OPT_RX_ES_SUPER_BUFFER */
+#if EFSYS_OPT_RX_PACKED_STREAM
fail4:
EFSYS_PROBE(fail4);
-#if EFSYS_OPT_RX_PACKED_STREAM
fail3:
EFSYS_PROBE(fail3);
#endif /* EFSYS_OPT_RX_PACKED_STREAM */
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index 2e847b6ce..97c4846d2 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -300,7 +300,7 @@ extern __checkReturn efx_rc_t
efx_intr_init(
__in efx_nic_t *enp,
__in efx_intr_type_t type,
- __in efsys_mem_t *esmp);
+ __in_opt efsys_mem_t *esmp);
extern void
efx_intr_enable(
diff --git a/drivers/net/sfc/base/efx_intr.c b/drivers/net/sfc/base/efx_intr.c
index b518916dc..4c68b1091 100644
--- a/drivers/net/sfc/base/efx_intr.c
+++ b/drivers/net/sfc/base/efx_intr.c
@@ -93,7 +93,7 @@ static const efx_intr_ops_t __efx_intr_ef10_ops = {
efx_intr_init(
__in efx_nic_t *enp,
__in efx_intr_type_t type,
- __in efsys_mem_t *esmp)
+ __in_opt efsys_mem_t *esmp)
{
efx_intr_t *eip = &(enp->en_intr);
const efx_intr_ops_t *eiop;
diff --git a/drivers/net/sfc/base/efx_rx.c b/drivers/net/sfc/base/efx_rx.c
index 04bc7aed8..afa3ac588 100644
--- a/drivers/net/sfc/base/efx_rx.c
+++ b/drivers/net/sfc/base/efx_rx.c
@@ -107,7 +107,7 @@ siena_rx_qcreate(
__in unsigned int index,
__in unsigned int label,
__in efx_rxq_type_t type,
- __in const efx_rxq_type_data_t *type_data,
+ __in_opt const efx_rxq_type_data_t *type_data,
__in efsys_mem_t *esmp,
__in size_t ndescs,
__in uint32_t id,
@@ -784,7 +784,7 @@ efx_rx_qcreate_internal(
__in unsigned int index,
__in unsigned int label,
__in efx_rxq_type_t type,
- __in const efx_rxq_type_data_t *type_data,
+ __in_opt const efx_rxq_type_data_t *type_data,
__in efsys_mem_t *esmp,
__in size_t ndescs,
__in uint32_t id,
@@ -1568,7 +1568,7 @@ siena_rx_qcreate(
__in unsigned int index,
__in unsigned int label,
__in efx_rxq_type_t type,
- __in const efx_rxq_type_data_t *type_data,
+ __in_opt const efx_rxq_type_data_t *type_data,
__in efsys_mem_t *esmp,
__in size_t ndescs,
__in uint32_t id,
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 02/38] net/sfc/base: update external port number calculation
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 01/38] net/sfc/base: correct annotations where NULL input is OK Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 03/38] net/sfc/base: ensure EvQ poll stops when abort is requested Andrew Rybchenko
` (36 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Richard Houldsworth
From: Richard Houldsworth <rhouldsworth@solarflare.com>
Revise the external port calculation to support all
X2 port modes. The previous algorithm could not
handle different port numbering schemes on each cage.
Signed-off-by: Richard Houldsworth <rhouldsworth@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/ef10_nic.c | 126 ++++++++++++++++----------------
1 file changed, 62 insertions(+), 64 deletions(-)
diff --git a/drivers/net/sfc/base/ef10_nic.c b/drivers/net/sfc/base/ef10_nic.c
index 50e23b7d4..d68920638 100644
--- a/drivers/net/sfc/base/ef10_nic.c
+++ b/drivers/net/sfc/base/ef10_nic.c
@@ -1441,6 +1441,9 @@ ef10_get_privilege_mask(
}
+#define EFX_EXT_PORT_MAX 4
+#define EFX_EXT_PORT_NA 0xFF
+
/*
* Table of mapping schemes from port number to external number.
*
@@ -1454,7 +1457,7 @@ ef10_get_privilege_mask(
* port mapping (n:1)
* |
* v
- * External port number (normally 1-based)
+ * External port number (1-based)
* |
* fixed (1:1) or cable assembly (1:m)
* |
@@ -1466,9 +1469,8 @@ ef10_get_privilege_mask(
* how to determine which external cage/magjack corresponds to the port
* numbers used by the driver.
*
- * The count of adjacent port numbers that map to each external number,
- * and the offset in the numbering, is determined by the chip family and
- * current port mode.
+ * The count of consecutive port numbers that map to each external number,
+ * is determined by the chip family and the current port mode.
*
* For the Huntington family, the current port mode cannot be discovered,
* but a single mapping is used by all modes for a given chip variant,
@@ -1479,8 +1481,7 @@ ef10_get_privilege_mask(
static struct ef10_external_port_map_s {
efx_family_t family;
uint32_t modes_mask;
- int32_t count;
- int32_t offset;
+ uint8_t base_port[EFX_EXT_PORT_MAX];
} __ef10_external_port_mappings[] = {
/*
* Modes used by Huntington family controllers where each port
@@ -1499,8 +1500,7 @@ static struct ef10_external_port_map_s {
(1U << TLV_PORT_MODE_10G) | /* mode 0 */
(1U << TLV_PORT_MODE_10G_10G) | /* mode 2 */
(1U << TLV_PORT_MODE_10G_10G_10G_10G), /* mode 4 */
- 1, /* ports per cage */
- 1 /* first cage */
+ { 0, 1, 2, 3 }
},
/*
* Modes which for Huntington identify a chip variant where 2
@@ -1517,8 +1517,7 @@ static struct ef10_external_port_map_s {
(1U << TLV_PORT_MODE_40G_40G) | /* mode 3 */
(1U << TLV_PORT_MODE_40G_10G_10G) | /* mode 6 */
(1U << TLV_PORT_MODE_10G_10G_40G), /* mode 7 */
- 2, /* ports per cage */
- 1 /* first cage */
+ { 0, 2, EFX_EXT_PORT_NA, EFX_EXT_PORT_NA }
},
/*
* Modes that on Medford allocate each port number to a separate
@@ -1531,9 +1530,9 @@ static struct ef10_external_port_map_s {
{
EFX_FAMILY_MEDFORD,
(1U << TLV_PORT_MODE_1x1_NA) | /* mode 0 */
+ (1U << TLV_PORT_MODE_1x4_NA) | /* mode 1 */
(1U << TLV_PORT_MODE_1x1_1x1), /* mode 2 */
- 1, /* ports per cage */
- 1 /* first cage */
+ { 0, 1, 2, 3 }
},
/*
* Modes that on Medford allocate 2 adjacent port numbers to each
@@ -1545,18 +1544,17 @@ static struct ef10_external_port_map_s {
*/
{
EFX_FAMILY_MEDFORD,
- (1U << TLV_PORT_MODE_1x4_NA) | /* mode 1 */
(1U << TLV_PORT_MODE_1x4_1x4) | /* mode 3 */
+ (1U << TLV_PORT_MODE_2x1_2x1) | /* mode 5 */
(1U << TLV_PORT_MODE_1x4_2x1) | /* mode 6 */
(1U << TLV_PORT_MODE_2x1_1x4) | /* mode 7 */
/* Do not use 10G_10G_10G_10G_Q1_Q2 (see bug63270) */
(1U << TLV_PORT_MODE_10G_10G_10G_10G_Q1_Q2), /* mode 9 */
- 2, /* ports per cage */
- 1 /* first cage */
+ { 0, 2, EFX_EXT_PORT_NA, EFX_EXT_PORT_NA }
},
/*
- * Modes that on Medford allocate 4 adjacent port numbers to each
- * connector, starting on cage 1.
+ * Modes that on Medford allocate 4 adjacent port numbers to
+ * cage 1.
* port 0 -> cage 1
* port 1 -> cage 1
* port 2 -> cage 1
@@ -1564,15 +1562,13 @@ static struct ef10_external_port_map_s {
*/
{
EFX_FAMILY_MEDFORD,
- (1U << TLV_PORT_MODE_2x1_2x1) | /* mode 5 */
/* Do not use 10G_10G_10G_10G_Q1 (see bug63270) */
(1U << TLV_PORT_MODE_4x1_NA), /* mode 4 */
- 4, /* ports per cage */
- 1 /* first cage */
+ { 0, EFX_EXT_PORT_NA, EFX_EXT_PORT_NA, EFX_EXT_PORT_NA }
},
/*
- * Modes that on Medford allocate 4 adjacent port numbers to each
- * connector, starting on cage 2.
+ * Modes that on Medford allocate 4 adjacent port numbers to
+ * cage 2.
* port 0 -> cage 2
* port 1 -> cage 2
* port 2 -> cage 2
@@ -1581,8 +1577,7 @@ static struct ef10_external_port_map_s {
{
EFX_FAMILY_MEDFORD,
(1U << TLV_PORT_MODE_NA_4x1), /* mode 8 */
- 4, /* ports per cage */
- 2 /* first cage */
+ { EFX_EXT_PORT_NA, 0, EFX_EXT_PORT_NA, EFX_EXT_PORT_NA }
},
/*
* Modes that on Medford2 allocate each port number to a separate
@@ -1597,23 +1592,29 @@ static struct ef10_external_port_map_s {
(1U << TLV_PORT_MODE_1x1_NA) | /* mode 0 */
(1U << TLV_PORT_MODE_1x4_NA) | /* mode 1 */
(1U << TLV_PORT_MODE_1x1_1x1) | /* mode 2 */
+ (1U << TLV_PORT_MODE_1x4_1x4) | /* mode 3 */
(1U << TLV_PORT_MODE_1x2_NA) | /* mode 10 */
(1U << TLV_PORT_MODE_1x2_1x2) | /* mode 12 */
(1U << TLV_PORT_MODE_1x4_1x2) | /* mode 15 */
(1U << TLV_PORT_MODE_1x2_1x4), /* mode 16 */
- 1, /* ports per cage */
- 1 /* first cage */
+ { 0, 1, 2, 3 }
},
/*
- * FIXME: Some port modes are not representable in this mapping:
- * - TLV_PORT_MODE_1x2_2x1 (mode 17):
+ * Modes that on Medford2 allocate 1 port to cage 1 and the rest
+ * to cage 2.
* port 0 -> cage 1
* port 1 -> cage 2
* port 2 -> cage 2
*/
+ {
+ EFX_FAMILY_MEDFORD2,
+ (1U << TLV_PORT_MODE_1x2_2x1) | /* mode 17 */
+ (1U << TLV_PORT_MODE_1x4_2x1), /* mode 6 */
+ { 0, 1, EFX_EXT_PORT_NA, EFX_EXT_PORT_NA }
+ },
/*
- * Modes that on Medford2 allocate 2 adjacent port numbers to each
- * cage, starting on cage 1.
+ * Modes that on Medford2 allocate 2 adjacent port numbers to cage 1
+ * and the rest to cage 2.
* port 0 -> cage 1
* port 1 -> cage 1
* port 2 -> cage 2
@@ -1621,30 +1622,15 @@ static struct ef10_external_port_map_s {
*/
{
EFX_FAMILY_MEDFORD2,
- (1U << TLV_PORT_MODE_1x4_1x4) | /* mode 3 */
(1U << TLV_PORT_MODE_2x1_2x1) | /* mode 4 */
- (1U << TLV_PORT_MODE_1x4_2x1) | /* mode 6 */
(1U << TLV_PORT_MODE_2x1_1x4) | /* mode 7 */
(1U << TLV_PORT_MODE_2x2_NA) | /* mode 13 */
(1U << TLV_PORT_MODE_2x1_1x2), /* mode 18 */
- 2, /* ports per cage */
- 1 /* first cage */
- },
- /*
- * Modes that on Medford2 allocate 2 adjacent port numbers to each
- * cage, starting on cage 2.
- * port 0 -> cage 2
- * port 1 -> cage 2
- */
- {
- EFX_FAMILY_MEDFORD2,
- (1U << TLV_PORT_MODE_NA_2x2), /* mode 14 */
- 2, /* ports per cage */
- 2 /* first cage */
+ { 0, 2, EFX_EXT_PORT_NA, EFX_EXT_PORT_NA }
},
/*
- * Modes that on Medford2 allocate 4 adjacent port numbers to each
- * connector, starting on cage 1.
+ * Modes that on Medford2 allocate up to 4 adjacent port numbers
+ * to cage 1.
* port 0 -> cage 1
* port 1 -> cage 1
* port 2 -> cage 1
@@ -1653,12 +1639,11 @@ static struct ef10_external_port_map_s {
{
EFX_FAMILY_MEDFORD2,
(1U << TLV_PORT_MODE_4x1_NA), /* mode 5 */
- 4, /* ports per cage */
- 1 /* first cage */
+ { 0, EFX_EXT_PORT_NA, EFX_EXT_PORT_NA, EFX_EXT_PORT_NA }
},
/*
- * Modes that on Medford2 allocate 4 adjacent port numbers to each
- * connector, starting on cage 2.
+ * Modes that on Medford2 allocate up to 4 adjacent port numbers
+ * to cage 2.
* port 0 -> cage 2
* port 1 -> cage 2
* port 2 -> cage 2
@@ -1667,9 +1652,9 @@ static struct ef10_external_port_map_s {
{
EFX_FAMILY_MEDFORD2,
(1U << TLV_PORT_MODE_NA_4x1) | /* mode 8 */
- (1U << TLV_PORT_MODE_NA_1x2), /* mode 11 */
- 4, /* ports per cage */
- 2 /* first cage */
+ (1U << TLV_PORT_MODE_NA_1x2) | /* mode 11 */
+ (1U << TLV_PORT_MODE_NA_2x2), /* mode 14 */
+ { EFX_EXT_PORT_NA, 0, EFX_EXT_PORT_NA, EFX_EXT_PORT_NA }
},
};
@@ -1684,8 +1669,8 @@ ef10_external_port_mapping(
uint32_t port_modes;
uint32_t matches;
uint32_t current;
- int32_t count = 1; /* Default 1-1 mapping */
- int32_t offset = 1; /* Default starting external port number */
+ struct ef10_external_port_map_s *mapp = NULL;
+ int ext_index = port; /* Default 1-1 mapping */
if ((rc = efx_mcdi_get_port_modes(enp, &port_modes, ¤t,
NULL)) != 0) {
@@ -1722,8 +1707,7 @@ ef10_external_port_mapping(
* there will be multiple matches. The mapping on the
* last match is used.
*/
- count = eepmp->count;
- offset = eepmp->offset;
+ mapp = eepmp;
port_modes &= ~matches;
}
}
@@ -1735,11 +1719,25 @@ ef10_external_port_mapping(
}
out:
- /*
- * Scale as required by last matched mode and then convert to
- * correctly offset numbering
- */
- *external_portp = (uint8_t)((port / count) + offset);
+ if (mapp != NULL) {
+ /*
+ * External ports are assigned a sequence of consecutive
+ * port numbers, so find the one with the closest base_port.
+ */
+ uint32_t delta = EFX_EXT_PORT_NA;
+
+ for (i = 0; i < EFX_EXT_PORT_MAX; i++) {
+ uint32_t base = mapp->base_port[i];
+ if ((base != EFX_EXT_PORT_NA) && (base <= port)) {
+ if ((port - base) < delta) {
+ delta = (port - base);
+ ext_index = i;
+ }
+ }
+ }
+ }
+ *external_portp = (uint8_t)(ext_index + 1);
+
return (0);
fail1:
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 03/38] net/sfc/base: ensure EvQ poll stops when abort is requested
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 01/38] net/sfc/base: correct annotations where NULL input is OK Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 02/38] net/sfc/base: update external port number calculation Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 04/38] net/sfc/base: report support for Tx checksum op descriptors Andrew Rybchenko
` (35 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Mark Spender
From: Mark Spender <mspender@solarflare.com>
If an event handler requested an abort, only the inner loop was
guarenteed to be broken out of - the outer loop could continue
if total == batch.
Fix this by poisoning batch to ensure it is different to total.
Signed-off-by: Mark Spender <mspender@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/efx_ev.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/net/sfc/base/efx_ev.c b/drivers/net/sfc/base/efx_ev.c
index 1139cc26f..907c4249f 100644
--- a/drivers/net/sfc/base/efx_ev.c
+++ b/drivers/net/sfc/base/efx_ev.c
@@ -480,6 +480,14 @@ efx_ev_qpoll(
if (should_abort) {
/* Ignore subsequent events */
total = index + 1;
+
+ /*
+ * Poison batch to ensure the outer
+ * loop is broken out of.
+ */
+ EFSYS_ASSERT(batch <= EFX_EV_BATCH);
+ batch += (EFX_EV_BATCH << 1);
+ EFSYS_ASSERT(total != batch);
break;
}
}
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 04/38] net/sfc/base: report support for Tx checksum op descriptors
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (2 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 03/38] net/sfc/base: ensure EvQ poll stops when abort is requested Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 05/38] net/sfc/base: remove min define for number of Tx descs Andrew Rybchenko
` (34 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Ivan Malov
From: Ivan Malov <Ivan.Malov@oktetlabs.ru>
FreeBSD driver needs a patch to provide a means for packets
which do not need checksum offload but have flow ID set
to avoid hitting only the first Tx queue (which has been used
for packets not needing checksum offload).
This should be possible on Huntington, Medford or Medford2 chips
since these support toggling checksum offload on any given queue
dynamically by means of pushing option descriptors.
The patch for FreeBSD driver will then need a means to figure out
whether the feature can be used, and testing adapter family might
not be a good solution.
This patch adds a feature bit specifically to indicate support
for checksum option descriptors. The new feature bits may have
more users in future, apart from the mentioned FreeBSD patch.
Signed-off-by: Ivan Malov <Ivan.Malov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/efx.h | 1 +
drivers/net/sfc/base/efx_nic.c | 9 ++++++---
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index 97c4846d2..a612b6988 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -1233,6 +1233,7 @@ efx_bist_stop(
#define EFX_FEATURE_FW_ASSISTED_TSO 0x00001000
#define EFX_FEATURE_FW_ASSISTED_TSO_V2 0x00002000
#define EFX_FEATURE_PACKED_STREAM 0x00004000
+#define EFX_FEATURE_TXQ_CKSUM_OP_DESC 0x00008000
typedef enum efx_tunnel_protocol_e {
EFX_TUNNEL_PROTOCOL_NONE = 0,
diff --git a/drivers/net/sfc/base/efx_nic.c b/drivers/net/sfc/base/efx_nic.c
index cea32b792..52108a5b8 100644
--- a/drivers/net/sfc/base/efx_nic.c
+++ b/drivers/net/sfc/base/efx_nic.c
@@ -228,7 +228,8 @@ efx_nic_create(
EFX_FEATURE_PIO_BUFFERS |
EFX_FEATURE_FW_ASSISTED_TSO |
EFX_FEATURE_FW_ASSISTED_TSO_V2 |
- EFX_FEATURE_PACKED_STREAM;
+ EFX_FEATURE_PACKED_STREAM |
+ EFX_FEATURE_TXQ_CKSUM_OP_DESC;
break;
#endif /* EFSYS_OPT_HUNTINGTON */
@@ -248,7 +249,8 @@ efx_nic_create(
EFX_FEATURE_MCDI_DMA |
EFX_FEATURE_PIO_BUFFERS |
EFX_FEATURE_FW_ASSISTED_TSO_V2 |
- EFX_FEATURE_PACKED_STREAM;
+ EFX_FEATURE_PACKED_STREAM |
+ EFX_FEATURE_TXQ_CKSUM_OP_DESC;
break;
#endif /* EFSYS_OPT_MEDFORD */
@@ -264,7 +266,8 @@ efx_nic_create(
EFX_FEATURE_MCDI_DMA |
EFX_FEATURE_PIO_BUFFERS |
EFX_FEATURE_FW_ASSISTED_TSO_V2 |
- EFX_FEATURE_PACKED_STREAM;
+ EFX_FEATURE_PACKED_STREAM |
+ EFX_FEATURE_TXQ_CKSUM_OP_DESC;
break;
#endif /* EFSYS_OPT_MEDFORD2 */
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 05/38] net/sfc/base: remove min define for number of Tx descs
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (3 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 04/38] net/sfc/base: report support for Tx checksum op descriptors Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 06/38] net/sfc/base: define max desc number for every EF10 NIC Andrew Rybchenko
` (33 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Igor Romanov
From: Igor Romanov <igor.romanov@oktetlabs.ru>
EF100/Riverhead has different min limit. So, this limit should
be a part of NIC config, not define common for all NIC families.
Define maximum Tx descriptor number for Siena in the same way as
minimum for consistency.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/ef10_impl.h | 1 +
drivers/net/sfc/base/efx.h | 5 +++++
drivers/net/sfc/base/efx_tx.c | 8 ++++----
drivers/net/sfc/base/hunt_nic.c | 1 +
drivers/net/sfc/base/medford2_nic.c | 1 +
drivers/net/sfc/base/medford_nic.c | 1 +
drivers/net/sfc/base/siena_impl.h | 3 +++
drivers/net/sfc/base/siena_nic.c | 3 ++-
8 files changed, 18 insertions(+), 5 deletions(-)
diff --git a/drivers/net/sfc/base/ef10_impl.h b/drivers/net/sfc/base/ef10_impl.h
index 83a8a2936..165a4013c 100644
--- a/drivers/net/sfc/base/ef10_impl.h
+++ b/drivers/net/sfc/base/ef10_impl.h
@@ -11,6 +11,7 @@
extern "C" {
#endif
+#define EF10_TXQ_MINNDESCS 512
/* Number of hardware PIO buffers (for compile-time resource dimensions) */
#define EF10_MAX_PIOBUF_NBUFS (16)
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index a612b6988..5b5d790fc 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -1272,6 +1272,7 @@ typedef struct efx_nic_cfg_s {
uint32_t enc_txq_limit;
uint32_t enc_rxq_limit;
uint32_t enc_txq_max_ndescs;
+ uint32_t enc_txq_min_ndescs;
uint32_t enc_buftbl_limit;
uint32_t enc_piobuf_limit;
uint32_t enc_piobuf_size;
@@ -2627,6 +2628,10 @@ extern void
efx_tx_fini(
__in efx_nic_t *enp);
+/*
+ * This symbol is deprecated and will be removed.
+ * Use the field from efx_nic_cfg_t instead.
+ */
#define EFX_TXQ_MINNDESCS 512
#define EFX_TXQ_SIZE(_ndescs) ((_ndescs) * sizeof (efx_qword_t))
diff --git a/drivers/net/sfc/base/efx_tx.c b/drivers/net/sfc/base/efx_tx.c
index 9fa9e2ed1..ebbdeb3d4 100644
--- a/drivers/net/sfc/base/efx_tx.c
+++ b/drivers/net/sfc/base/efx_tx.c
@@ -923,10 +923,10 @@ siena_tx_qcreate(
EFSYS_ASSERT3U(label, <, EFX_EV_TX_NLABELS);
EFSYS_ASSERT(ISP2(encp->enc_txq_max_ndescs));
- EFX_STATIC_ASSERT(ISP2(EFX_TXQ_MINNDESCS));
+ EFSYS_ASSERT(ISP2(encp->enc_txq_min_ndescs));
if (!ISP2(ndescs) ||
- (ndescs < EFX_TXQ_MINNDESCS) ||
+ (ndescs < encp->enc_txq_min_ndescs) ||
(ndescs > encp->enc_txq_max_ndescs)) {
rc = EINVAL;
goto fail1;
@@ -936,9 +936,9 @@ siena_tx_qcreate(
goto fail2;
}
for (size = 0;
- (1 << size) <= (int)(encp->enc_txq_max_ndescs / EFX_TXQ_MINNDESCS);
+ (1U << size) <= encp->enc_txq_max_ndescs / encp->enc_txq_min_ndescs;
size++)
- if ((1 << size) == (int)(ndescs / EFX_TXQ_MINNDESCS))
+ if ((1U << size) == (uint32_t)ndescs / encp->enc_txq_min_ndescs)
break;
if (id + (1 << size) >= encp->enc_buftbl_limit) {
rc = EINVAL;
diff --git a/drivers/net/sfc/base/hunt_nic.c b/drivers/net/sfc/base/hunt_nic.c
index ca30e90f7..adb2b17eb 100644
--- a/drivers/net/sfc/base/hunt_nic.c
+++ b/drivers/net/sfc/base/hunt_nic.c
@@ -195,6 +195,7 @@ hunt_board_cfg(
* descriptor writes, preventing the use of 4096 descriptor TXQs.
*/
encp->enc_txq_max_ndescs = encp->enc_bug35388_workaround ? 2048 : 4096;
+ encp->enc_txq_min_ndescs = EF10_TXQ_MINNDESCS;
EFX_STATIC_ASSERT(HUNT_PIOBUF_NBUFS <= EF10_MAX_PIOBUF_NBUFS);
encp->enc_piobuf_limit = HUNT_PIOBUF_NBUFS;
diff --git a/drivers/net/sfc/base/medford2_nic.c b/drivers/net/sfc/base/medford2_nic.c
index 6bc1e87cc..2cc87e3a9 100644
--- a/drivers/net/sfc/base/medford2_nic.c
+++ b/drivers/net/sfc/base/medford2_nic.c
@@ -120,6 +120,7 @@ medford2_board_cfg(
* stuffing.
*/
encp->enc_txq_max_ndescs = 2048;
+ encp->enc_txq_min_ndescs = EF10_TXQ_MINNDESCS;
EFX_STATIC_ASSERT(MEDFORD2_PIOBUF_NBUFS <= EF10_MAX_PIOBUF_NBUFS);
encp->enc_piobuf_limit = MEDFORD2_PIOBUF_NBUFS;
diff --git a/drivers/net/sfc/base/medford_nic.c b/drivers/net/sfc/base/medford_nic.c
index bfe01ca93..b72881179 100644
--- a/drivers/net/sfc/base/medford_nic.c
+++ b/drivers/net/sfc/base/medford_nic.c
@@ -118,6 +118,7 @@ medford_board_cfg(
* stuffing.
*/
encp->enc_txq_max_ndescs = 2048;
+ encp->enc_txq_min_ndescs = EF10_TXQ_MINNDESCS;
EFX_STATIC_ASSERT(MEDFORD_PIOBUF_NBUFS <= EF10_MAX_PIOBUF_NBUFS);
encp->enc_piobuf_limit = MEDFORD_PIOBUF_NBUFS;
diff --git a/drivers/net/sfc/base/siena_impl.h b/drivers/net/sfc/base/siena_impl.h
index d70bbff8f..549712377 100644
--- a/drivers/net/sfc/base/siena_impl.h
+++ b/drivers/net/sfc/base/siena_impl.h
@@ -24,6 +24,9 @@ extern "C" {
#endif
#define EFX_TXQ_DC_NDESCS(_dcsize) (8 << (_dcsize))
+#define SIENA_TXQ_MAXNDESCS 4096
+#define SIENA_TXQ_MINNDESCS 512
+
#define SIENA_NVRAM_CHUNK 0x80
diff --git a/drivers/net/sfc/base/siena_nic.c b/drivers/net/sfc/base/siena_nic.c
index fca17171b..0f02195c0 100644
--- a/drivers/net/sfc/base/siena_nic.c
+++ b/drivers/net/sfc/base/siena_nic.c
@@ -149,7 +149,8 @@ siena_board_cfg(
encp->enc_rxq_limit = MIN(EFX_RXQ_LIMIT_TARGET, nrxq);
encp->enc_txq_limit = MIN(EFX_TXQ_LIMIT_TARGET, ntxq);
- encp->enc_txq_max_ndescs = 4096;
+ encp->enc_txq_max_ndescs = SIENA_TXQ_MAXNDESCS;
+ encp->enc_txq_min_ndescs = SIENA_TXQ_MINNDESCS;
encp->enc_buftbl_limit = SIENA_SRAM_ROWS -
(encp->enc_txq_limit * EFX_TXQ_DC_NDESCS(EFX_TXQ_DC_SIZE)) -
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 06/38] net/sfc/base: define max desc number for every EF10 NIC
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (4 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 05/38] net/sfc/base: remove min define for number of Tx descs Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 07/38] net/sfc/base: remove min/max defines for number of Rx descs Andrew Rybchenko
` (32 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Igor Romanov
From: Igor Romanov <igor.romanov@oktetlabs.ru>
For consistency with defines of min descriptor number, define max
descriptor number for Huntington, Medford and Medford2.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/hunt_impl.h | 3 +++
drivers/net/sfc/base/hunt_nic.c | 4 +++-
drivers/net/sfc/base/medford2_impl.h | 2 ++
drivers/net/sfc/base/medford2_nic.c | 2 +-
drivers/net/sfc/base/medford_impl.h | 2 ++
drivers/net/sfc/base/medford_nic.c | 2 +-
6 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/net/sfc/base/hunt_impl.h b/drivers/net/sfc/base/hunt_impl.h
index d8dddce8d..0e9a1e280 100644
--- a/drivers/net/sfc/base/hunt_impl.h
+++ b/drivers/net/sfc/base/hunt_impl.h
@@ -16,6 +16,9 @@
extern "C" {
#endif
+#define HUNT_TXQ_MAXNDESCS 4096
+#define HUNT_TXQ_MAXNDESCS_BUG35388_WORKAROUND 2048
+
/* Missing register definitions */
#ifndef ER_DZ_TX_PIOBUF_OFST
#define ER_DZ_TX_PIOBUF_OFST 0x00001000
diff --git a/drivers/net/sfc/base/hunt_nic.c b/drivers/net/sfc/base/hunt_nic.c
index adb2b17eb..6605cfce4 100644
--- a/drivers/net/sfc/base/hunt_nic.c
+++ b/drivers/net/sfc/base/hunt_nic.c
@@ -194,7 +194,9 @@ hunt_board_cfg(
* The workaround for bug35388 uses the top bit of transmit queue
* descriptor writes, preventing the use of 4096 descriptor TXQs.
*/
- encp->enc_txq_max_ndescs = encp->enc_bug35388_workaround ? 2048 : 4096;
+ encp->enc_txq_max_ndescs = encp->enc_bug35388_workaround ?
+ HUNT_TXQ_MAXNDESCS_BUG35388_WORKAROUND :
+ HUNT_TXQ_MAXNDESCS;
encp->enc_txq_min_ndescs = EF10_TXQ_MINNDESCS;
EFX_STATIC_ASSERT(HUNT_PIOBUF_NBUFS <= EF10_MAX_PIOBUF_NBUFS);
diff --git a/drivers/net/sfc/base/medford2_impl.h b/drivers/net/sfc/base/medford2_impl.h
index 6259a700b..87af5f686 100644
--- a/drivers/net/sfc/base/medford2_impl.h
+++ b/drivers/net/sfc/base/medford2_impl.h
@@ -12,6 +12,8 @@ extern "C" {
#endif
+#define MEDFORD2_TXQ_MAXNDESCS 2048
+
#ifndef ER_EZ_TX_PIOBUF_SIZE
#define ER_EZ_TX_PIOBUF_SIZE 4096
#endif
diff --git a/drivers/net/sfc/base/medford2_nic.c b/drivers/net/sfc/base/medford2_nic.c
index 2cc87e3a9..020c37fd9 100644
--- a/drivers/net/sfc/base/medford2_nic.c
+++ b/drivers/net/sfc/base/medford2_nic.c
@@ -119,7 +119,7 @@ medford2_board_cfg(
* descriptors are not supported as the top bit is used for vfifo
* stuffing.
*/
- encp->enc_txq_max_ndescs = 2048;
+ encp->enc_txq_max_ndescs = MEDFORD2_TXQ_MAXNDESCS;
encp->enc_txq_min_ndescs = EF10_TXQ_MINNDESCS;
EFX_STATIC_ASSERT(MEDFORD2_PIOBUF_NBUFS <= EF10_MAX_PIOBUF_NBUFS);
diff --git a/drivers/net/sfc/base/medford_impl.h b/drivers/net/sfc/base/medford_impl.h
index d076afa2d..1afedc7f3 100644
--- a/drivers/net/sfc/base/medford_impl.h
+++ b/drivers/net/sfc/base/medford_impl.h
@@ -12,6 +12,8 @@ extern "C" {
#endif
+#define MEDFORD_TXQ_MAXNDESCS 2048
+
#ifndef ER_EZ_TX_PIOBUF_SIZE
#define ER_EZ_TX_PIOBUF_SIZE 4096
#endif
diff --git a/drivers/net/sfc/base/medford_nic.c b/drivers/net/sfc/base/medford_nic.c
index b72881179..171e39b03 100644
--- a/drivers/net/sfc/base/medford_nic.c
+++ b/drivers/net/sfc/base/medford_nic.c
@@ -117,7 +117,7 @@ medford_board_cfg(
* descriptors are not supported as the top bit is used for vfifo
* stuffing.
*/
- encp->enc_txq_max_ndescs = 2048;
+ encp->enc_txq_max_ndescs = MEDFORD_TXQ_MAXNDESCS;
encp->enc_txq_min_ndescs = EF10_TXQ_MINNDESCS;
EFX_STATIC_ASSERT(MEDFORD_PIOBUF_NBUFS <= EF10_MAX_PIOBUF_NBUFS);
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 07/38] net/sfc/base: remove min/max defines for number of Rx descs
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (5 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 06/38] net/sfc/base: define max desc number for every EF10 NIC Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 08/38] net/sfc/base: remove min/max defines for number of events Andrew Rybchenko
` (31 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Igor Romanov
From: Igor Romanov <igor.romanov@oktetlabs.ru>
EF100/Riverhead has different min/max limits. So, these limits should
be a part of NIC config, not defines common for all NIC families.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/ef10_impl.h | 3 +++
drivers/net/sfc/base/ef10_rx.c | 9 +++++----
drivers/net/sfc/base/efx.h | 10 ++++++++--
drivers/net/sfc/base/efx_rx.c | 12 +++++++-----
drivers/net/sfc/base/hunt_nic.c | 3 +++
drivers/net/sfc/base/medford2_nic.c | 3 +++
drivers/net/sfc/base/medford_nic.c | 3 +++
drivers/net/sfc/base/siena_impl.h | 3 +++
drivers/net/sfc/base/siena_nic.c | 3 +++
9 files changed, 38 insertions(+), 11 deletions(-)
diff --git a/drivers/net/sfc/base/ef10_impl.h b/drivers/net/sfc/base/ef10_impl.h
index 165a4013c..bf71b5a18 100644
--- a/drivers/net/sfc/base/ef10_impl.h
+++ b/drivers/net/sfc/base/ef10_impl.h
@@ -11,6 +11,9 @@
extern "C" {
#endif
+#define EF10_RXQ_MAXNDESCS 4096
+#define EF10_RXQ_MINNDESCS 512
+
#define EF10_TXQ_MINNDESCS 512
/* Number of hardware PIO buffers (for compile-time resource dimensions) */
diff --git a/drivers/net/sfc/base/ef10_rx.c b/drivers/net/sfc/base/ef10_rx.c
index d18010d0f..1f2a6e009 100644
--- a/drivers/net/sfc/base/ef10_rx.c
+++ b/drivers/net/sfc/base/ef10_rx.c
@@ -39,7 +39,7 @@ efx_mcdi_init_rxq(
uint32_t dma_mode;
boolean_t want_outer_classes;
- EFSYS_ASSERT3U(ndescs, <=, EFX_RXQ_MAXNDESCS);
+ EFSYS_ASSERT3U(ndescs, <=, encp->enc_rxq_max_ndescs);
if ((esmp == NULL) || (EFSYS_MEM_SIZE(esmp) < EFX_RXQ_SIZE(ndescs))) {
rc = EINVAL;
@@ -1012,11 +1012,12 @@ ef10_rx_qcreate(
EFSYS_ASSERT3U(label, <, EFX_EV_RX_NLABELS);
EFSYS_ASSERT3U(enp->en_rx_qcount + 1, <, encp->enc_rxq_limit);
- EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MAXNDESCS));
- EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MINNDESCS));
+ EFSYS_ASSERT(ISP2(encp->enc_rxq_max_ndescs));
+ EFSYS_ASSERT(ISP2(encp->enc_rxq_min_ndescs));
if (!ISP2(ndescs) ||
- (ndescs < EFX_RXQ_MINNDESCS) || (ndescs > EFX_RXQ_MAXNDESCS)) {
+ (ndescs < encp->enc_rxq_min_ndescs) ||
+ (ndescs > encp->enc_rxq_max_ndescs)) {
rc = EINVAL;
goto fail1;
}
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index 5b5d790fc..06ce3d2fc 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -1271,6 +1271,8 @@ typedef struct efx_nic_cfg_s {
uint32_t enc_evq_limit;
uint32_t enc_txq_limit;
uint32_t enc_rxq_limit;
+ uint32_t enc_rxq_max_ndescs;
+ uint32_t enc_rxq_min_ndescs;
uint32_t enc_txq_max_ndescs;
uint32_t enc_txq_min_ndescs;
uint32_t enc_buftbl_limit;
@@ -2462,8 +2464,12 @@ efx_pseudo_hdr_pkt_length_get(
__in uint8_t *buffer,
__out uint16_t *pkt_lengthp);
-#define EFX_RXQ_MAXNDESCS 4096
-#define EFX_RXQ_MINNDESCS 512
+/*
+ * These symbols are deprecated and will be removed.
+ * Use the fields from efx_nic_cfg_t instead.
+ */
+#define EFX_RXQ_MAXNDESCS 4096
+#define EFX_RXQ_MINNDESCS 512
#define EFX_RXQ_SIZE(_ndescs) ((_ndescs) * sizeof (efx_qword_t))
#define EFX_RXQ_NBUFS(_ndescs) (EFX_RXQ_SIZE(_ndescs) / EFX_BUF_SIZE)
diff --git a/drivers/net/sfc/base/efx_rx.c b/drivers/net/sfc/base/efx_rx.c
index afa3ac588..332f8c800 100644
--- a/drivers/net/sfc/base/efx_rx.c
+++ b/drivers/net/sfc/base/efx_rx.c
@@ -1590,11 +1590,12 @@ siena_rx_qcreate(
EFSYS_ASSERT3U(label, <, EFX_EV_RX_NLABELS);
EFSYS_ASSERT3U(enp->en_rx_qcount + 1, <, encp->enc_rxq_limit);
- EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MAXNDESCS));
- EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MINNDESCS));
+ EFSYS_ASSERT(ISP2(encp->enc_rxq_max_ndescs));
+ EFSYS_ASSERT(ISP2(encp->enc_rxq_min_ndescs));
if (!ISP2(ndescs) ||
- (ndescs < EFX_RXQ_MINNDESCS) || (ndescs > EFX_RXQ_MAXNDESCS)) {
+ (ndescs < encp->enc_rxq_min_ndescs) ||
+ (ndescs > encp->enc_rxq_max_ndescs)) {
rc = EINVAL;
goto fail1;
}
@@ -1602,9 +1603,10 @@ siena_rx_qcreate(
rc = EINVAL;
goto fail2;
}
- for (size = 0; (1 << size) <= (EFX_RXQ_MAXNDESCS / EFX_RXQ_MINNDESCS);
+ for (size = 0;
+ (1U << size) <= encp->enc_rxq_max_ndescs / encp->enc_rxq_min_ndescs;
size++)
- if ((1 << size) == (int)(ndescs / EFX_RXQ_MINNDESCS))
+ if ((1U << size) == (uint32_t)ndescs / encp->enc_rxq_min_ndescs)
break;
if (id + (1 << size) >= encp->enc_buftbl_limit) {
rc = EINVAL;
diff --git a/drivers/net/sfc/base/hunt_nic.c b/drivers/net/sfc/base/hunt_nic.c
index 6605cfce4..ae8a0085e 100644
--- a/drivers/net/sfc/base/hunt_nic.c
+++ b/drivers/net/sfc/base/hunt_nic.c
@@ -190,6 +190,9 @@ hunt_board_cfg(
encp->enc_rx_buf_align_start = 1;
encp->enc_rx_buf_align_end = 64; /* RX DMA end padding */
+ encp->enc_rxq_max_ndescs = EF10_RXQ_MAXNDESCS;
+ encp->enc_rxq_min_ndescs = EF10_RXQ_MINNDESCS;
+
/*
* The workaround for bug35388 uses the top bit of transmit queue
* descriptor writes, preventing the use of 4096 descriptor TXQs.
diff --git a/drivers/net/sfc/base/medford2_nic.c b/drivers/net/sfc/base/medford2_nic.c
index 020c37fd9..87c97b5db 100644
--- a/drivers/net/sfc/base/medford2_nic.c
+++ b/drivers/net/sfc/base/medford2_nic.c
@@ -114,6 +114,9 @@ medford2_board_cfg(
}
encp->enc_rx_buf_align_end = end_padding;
+ encp->enc_rxq_max_ndescs = EF10_RXQ_MAXNDESCS;
+ encp->enc_rxq_min_ndescs = EF10_RXQ_MINNDESCS;
+
/*
* The maximum supported transmit queue size is 2048. TXQs with 4096
* descriptors are not supported as the top bit is used for vfifo
diff --git a/drivers/net/sfc/base/medford_nic.c b/drivers/net/sfc/base/medford_nic.c
index 171e39b03..c5d919742 100644
--- a/drivers/net/sfc/base/medford_nic.c
+++ b/drivers/net/sfc/base/medford_nic.c
@@ -112,6 +112,9 @@ medford_board_cfg(
}
encp->enc_rx_buf_align_end = end_padding;
+ encp->enc_rxq_max_ndescs = EF10_RXQ_MAXNDESCS;
+ encp->enc_rxq_min_ndescs = EF10_RXQ_MINNDESCS;
+
/*
* The maximum supported transmit queue size is 2048. TXQs with 4096
* descriptors are not supported as the top bit is used for vfifo
diff --git a/drivers/net/sfc/base/siena_impl.h b/drivers/net/sfc/base/siena_impl.h
index 549712377..90f71d9c4 100644
--- a/drivers/net/sfc/base/siena_impl.h
+++ b/drivers/net/sfc/base/siena_impl.h
@@ -27,6 +27,9 @@ extern "C" {
#define SIENA_TXQ_MAXNDESCS 4096
#define SIENA_TXQ_MINNDESCS 512
+#define SIENA_RXQ_MAXNDESCS 4096
+#define SIENA_RXQ_MINNDESCS 512
+
#define SIENA_NVRAM_CHUNK 0x80
diff --git a/drivers/net/sfc/base/siena_nic.c b/drivers/net/sfc/base/siena_nic.c
index 0f02195c0..341abd8f6 100644
--- a/drivers/net/sfc/base/siena_nic.c
+++ b/drivers/net/sfc/base/siena_nic.c
@@ -149,6 +149,9 @@ siena_board_cfg(
encp->enc_rxq_limit = MIN(EFX_RXQ_LIMIT_TARGET, nrxq);
encp->enc_txq_limit = MIN(EFX_TXQ_LIMIT_TARGET, ntxq);
+ encp->enc_rxq_max_ndescs = EF10_RXQ_MAXNDESCS;
+ encp->enc_rxq_min_ndescs = EF10_RXQ_MINNDESCS;
+
encp->enc_txq_max_ndescs = SIENA_TXQ_MAXNDESCS;
encp->enc_txq_min_ndescs = SIENA_TXQ_MINNDESCS;
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 08/38] net/sfc/base: remove min/max defines for number of events
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (6 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 07/38] net/sfc/base: remove min/max defines for number of Rx descs Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 09/38] net/sfc: use NIC min number of Tx descs instead of define Andrew Rybchenko
` (30 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Igor Romanov
From: Igor Romanov <igor.romanov@oktetlabs.ru>
EF100/Riverhead has different min/max limits. So, these limits should
be a part of NIC config, not defines common for all NIC families.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/ef10_ev.c | 15 ++++++++-------
drivers/net/sfc/base/ef10_impl.h | 3 +++
drivers/net/sfc/base/efx.h | 6 ++++++
drivers/net/sfc/base/efx_ev.c | 12 +++++++-----
drivers/net/sfc/base/hunt_nic.c | 3 +++
drivers/net/sfc/base/medford2_nic.c | 3 +++
drivers/net/sfc/base/medford_nic.c | 3 +++
drivers/net/sfc/base/siena_impl.h | 3 +++
drivers/net/sfc/base/siena_nic.c | 3 +++
9 files changed, 39 insertions(+), 12 deletions(-)
diff --git a/drivers/net/sfc/base/ef10_ev.c b/drivers/net/sfc/base/ef10_ev.c
index cdf835f03..12125c6db 100644
--- a/drivers/net/sfc/base/ef10_ev.c
+++ b/drivers/net/sfc/base/ef10_ev.c
@@ -123,7 +123,7 @@ efx_mcdi_init_evq(
{
efx_mcdi_req_t req;
EFX_MCDI_DECLARE_BUF(payload,
- MC_CMD_INIT_EVQ_IN_LEN(EFX_EVQ_NBUFS(EFX_EVQ_MAXNEVS)),
+ MC_CMD_INIT_EVQ_IN_LEN(EFX_EVQ_NBUFS(EF10_EVQ_MAXNEVS)),
MC_CMD_INIT_EVQ_OUT_LEN);
efx_qword_t *dma_addr;
uint64_t addr;
@@ -259,7 +259,7 @@ efx_mcdi_init_evq_v2(
{
efx_mcdi_req_t req;
EFX_MCDI_DECLARE_BUF(payload,
- MC_CMD_INIT_EVQ_V2_IN_LEN(EFX_EVQ_NBUFS(EFX_EVQ_MAXNEVS)),
+ MC_CMD_INIT_EVQ_V2_IN_LEN(EFX_EVQ_NBUFS(EF10_EVQ_MAXNEVS)),
MC_CMD_INIT_EVQ_V2_OUT_LEN);
boolean_t interrupting;
unsigned int evq_type;
@@ -446,11 +446,12 @@ ef10_ev_qcreate(
efx_rc_t rc;
_NOTE(ARGUNUSED(id)) /* buftbl id managed by MC */
- EFX_STATIC_ASSERT(ISP2(EFX_EVQ_MAXNEVS));
- EFX_STATIC_ASSERT(ISP2(EFX_EVQ_MINNEVS));
+ EFSYS_ASSERT(ISP2(encp->enc_evq_max_nevs));
+ EFSYS_ASSERT(ISP2(encp->enc_evq_min_nevs));
if (!ISP2(ndescs) ||
- (ndescs < EFX_EVQ_MINNEVS) || (ndescs > EFX_EVQ_MAXNEVS)) {
+ (ndescs < encp->enc_evq_min_nevs) ||
+ (ndescs > encp->enc_evq_max_nevs)) {
rc = EINVAL;
goto fail1;
}
@@ -563,9 +564,9 @@ ef10_ev_qprime(
rptr = count & eep->ee_mask;
if (enp->en_nic_cfg.enc_bug35388_workaround) {
- EFX_STATIC_ASSERT(EFX_EVQ_MINNEVS >
+ EFX_STATIC_ASSERT(EF10_EVQ_MINNEVS >
(1 << ERF_DD_EVQ_IND_RPTR_WIDTH));
- EFX_STATIC_ASSERT(EFX_EVQ_MAXNEVS <
+ EFX_STATIC_ASSERT(EF10_EVQ_MAXNEVS <
(1 << 2 * ERF_DD_EVQ_IND_RPTR_WIDTH));
EFX_POPULATE_DWORD_2(dword,
diff --git a/drivers/net/sfc/base/ef10_impl.h b/drivers/net/sfc/base/ef10_impl.h
index bf71b5a18..44f7f635d 100644
--- a/drivers/net/sfc/base/ef10_impl.h
+++ b/drivers/net/sfc/base/ef10_impl.h
@@ -11,6 +11,9 @@
extern "C" {
#endif
+#define EF10_EVQ_MAXNEVS 32768
+#define EF10_EVQ_MINNEVS 512
+
#define EF10_RXQ_MAXNDESCS 4096
#define EF10_RXQ_MINNDESCS 512
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index 06ce3d2fc..80a6419e3 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -1271,6 +1271,8 @@ typedef struct efx_nic_cfg_s {
uint32_t enc_evq_limit;
uint32_t enc_txq_limit;
uint32_t enc_rxq_limit;
+ uint32_t enc_evq_max_nevs;
+ uint32_t enc_evq_min_nevs;
uint32_t enc_rxq_max_ndescs;
uint32_t enc_rxq_min_ndescs;
uint32_t enc_txq_max_ndescs;
@@ -1976,6 +1978,10 @@ extern void
efx_ev_fini(
__in efx_nic_t *enp);
+/*
+ * These symbols are deprecated and will be removed.
+ * Use the fields from efx_nic_cfg_t instead.
+ */
#define EFX_EVQ_MAXNEVS 32768
#define EFX_EVQ_MINNEVS 512
diff --git a/drivers/net/sfc/base/efx_ev.c b/drivers/net/sfc/base/efx_ev.c
index 907c4249f..f1788cad2 100644
--- a/drivers/net/sfc/base/efx_ev.c
+++ b/drivers/net/sfc/base/efx_ev.c
@@ -1285,11 +1285,12 @@ siena_ev_qcreate(
_NOTE(ARGUNUSED(esmp))
- EFX_STATIC_ASSERT(ISP2(EFX_EVQ_MAXNEVS));
- EFX_STATIC_ASSERT(ISP2(EFX_EVQ_MINNEVS));
+ EFSYS_ASSERT(ISP2(encp->enc_evq_max_nevs));
+ EFSYS_ASSERT(ISP2(encp->enc_evq_min_nevs));
if (!ISP2(ndescs) ||
- (ndescs < EFX_EVQ_MINNEVS) || (ndescs > EFX_EVQ_MAXNEVS)) {
+ (ndescs < encp->enc_evq_min_nevs) ||
+ (ndescs > encp->enc_evq_max_nevs)) {
rc = EINVAL;
goto fail1;
}
@@ -1304,9 +1305,10 @@ siena_ev_qcreate(
goto fail3;
}
#endif
- for (size = 0; (1 << size) <= (EFX_EVQ_MAXNEVS / EFX_EVQ_MINNEVS);
+ for (size = 0;
+ (1U << size) <= encp->enc_evq_max_nevs / encp->enc_evq_min_nevs;
size++)
- if ((1 << size) == (int)(ndescs / EFX_EVQ_MINNEVS))
+ if ((1U << size) == (uint32_t)ndescs / encp->enc_evq_min_nevs)
break;
if (id + (1 << size) >= encp->enc_buftbl_limit) {
rc = EINVAL;
diff --git a/drivers/net/sfc/base/hunt_nic.c b/drivers/net/sfc/base/hunt_nic.c
index ae8a0085e..755a377f0 100644
--- a/drivers/net/sfc/base/hunt_nic.c
+++ b/drivers/net/sfc/base/hunt_nic.c
@@ -190,6 +190,9 @@ hunt_board_cfg(
encp->enc_rx_buf_align_start = 1;
encp->enc_rx_buf_align_end = 64; /* RX DMA end padding */
+ encp->enc_evq_max_nevs = EF10_EVQ_MAXNEVS;
+ encp->enc_evq_min_nevs = EF10_EVQ_MINNEVS;
+
encp->enc_rxq_max_ndescs = EF10_RXQ_MAXNDESCS;
encp->enc_rxq_min_ndescs = EF10_RXQ_MINNDESCS;
diff --git a/drivers/net/sfc/base/medford2_nic.c b/drivers/net/sfc/base/medford2_nic.c
index 87c97b5db..3274744d9 100644
--- a/drivers/net/sfc/base/medford2_nic.c
+++ b/drivers/net/sfc/base/medford2_nic.c
@@ -114,6 +114,9 @@ medford2_board_cfg(
}
encp->enc_rx_buf_align_end = end_padding;
+ encp->enc_evq_max_nevs = EF10_EVQ_MAXNEVS;
+ encp->enc_evq_min_nevs = EF10_EVQ_MINNEVS;
+
encp->enc_rxq_max_ndescs = EF10_RXQ_MAXNDESCS;
encp->enc_rxq_min_ndescs = EF10_RXQ_MINNDESCS;
diff --git a/drivers/net/sfc/base/medford_nic.c b/drivers/net/sfc/base/medford_nic.c
index c5d919742..cb107fe75 100644
--- a/drivers/net/sfc/base/medford_nic.c
+++ b/drivers/net/sfc/base/medford_nic.c
@@ -112,6 +112,9 @@ medford_board_cfg(
}
encp->enc_rx_buf_align_end = end_padding;
+ encp->enc_evq_max_nevs = EF10_EVQ_MAXNEVS;
+ encp->enc_evq_min_nevs = EF10_EVQ_MINNEVS;
+
encp->enc_rxq_max_ndescs = EF10_RXQ_MAXNDESCS;
encp->enc_rxq_min_ndescs = EF10_RXQ_MINNDESCS;
diff --git a/drivers/net/sfc/base/siena_impl.h b/drivers/net/sfc/base/siena_impl.h
index 90f71d9c4..675e49953 100644
--- a/drivers/net/sfc/base/siena_impl.h
+++ b/drivers/net/sfc/base/siena_impl.h
@@ -24,6 +24,9 @@ extern "C" {
#endif
#define EFX_TXQ_DC_NDESCS(_dcsize) (8 << (_dcsize))
+#define SIENA_EVQ_MAXNEVS 32768
+#define SIENA_EVQ_MINNEVS 512
+
#define SIENA_TXQ_MAXNDESCS 4096
#define SIENA_TXQ_MINNDESCS 512
diff --git a/drivers/net/sfc/base/siena_nic.c b/drivers/net/sfc/base/siena_nic.c
index 341abd8f6..4962a65c5 100644
--- a/drivers/net/sfc/base/siena_nic.c
+++ b/drivers/net/sfc/base/siena_nic.c
@@ -149,6 +149,9 @@ siena_board_cfg(
encp->enc_rxq_limit = MIN(EFX_RXQ_LIMIT_TARGET, nrxq);
encp->enc_txq_limit = MIN(EFX_TXQ_LIMIT_TARGET, ntxq);
+ encp->enc_evq_max_nevs = SIENA_EVQ_MAXNEVS;
+ encp->enc_evq_min_nevs = SIENA_EVQ_MINNEVS;
+
encp->enc_rxq_max_ndescs = EF10_RXQ_MAXNDESCS;
encp->enc_rxq_min_ndescs = EF10_RXQ_MINNDESCS;
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 09/38] net/sfc: use NIC min number of Tx descs instead of define
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (7 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 08/38] net/sfc/base: remove min/max defines for number of events Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 10/38] net/sfc: use NIC Rx descs limits instead of defines Andrew Rybchenko
` (29 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Igor Romanov
From: Igor Romanov <igor.romanov@oktetlabs.ru>
Min limit is not common for all NIC families. Use the variable from
NIC configuration instead of deprecated define.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/sfc.c | 3 +++
drivers/net/sfc/sfc.h | 1 +
drivers/net/sfc/sfc_dp_tx.h | 7 +++++++
drivers/net/sfc/sfc_ef10_tx.c | 5 +++--
drivers/net/sfc/sfc_ethdev.c | 4 ++--
drivers/net/sfc/sfc_tx.c | 13 ++++++++++---
6 files changed, 26 insertions(+), 7 deletions(-)
diff --git a/drivers/net/sfc/sfc.c b/drivers/net/sfc/sfc.c
index 83001cb68..2e29bfaf4 100644
--- a/drivers/net/sfc/sfc.c
+++ b/drivers/net/sfc/sfc.c
@@ -759,6 +759,9 @@ sfc_attach(struct sfc_adapter *sa)
sa->txq_max_entries = encp->enc_txq_max_ndescs;
SFC_ASSERT(rte_is_power_of_2(sa->txq_max_entries));
+ sa->txq_min_entries = encp->enc_txq_min_ndescs;
+ SFC_ASSERT(rte_is_power_of_2(sa->txq_min_entries));
+
rc = sfc_intr_attach(sa);
if (rc != 0)
goto fail_intr_attach;
diff --git a/drivers/net/sfc/sfc.h b/drivers/net/sfc/sfc.h
index 725dd5ee6..3acb3fe48 100644
--- a/drivers/net/sfc/sfc.h
+++ b/drivers/net/sfc/sfc.h
@@ -245,6 +245,7 @@ struct sfc_adapter {
unsigned int txq_max;
unsigned int txq_max_entries;
+ unsigned int txq_min_entries;
uint32_t evq_flags;
unsigned int evq_count;
diff --git a/drivers/net/sfc/sfc_dp_tx.h b/drivers/net/sfc/sfc_dp_tx.h
index fd492f21f..9cb2198e2 100644
--- a/drivers/net/sfc/sfc_dp_tx.h
+++ b/drivers/net/sfc/sfc_dp_tx.h
@@ -27,6 +27,12 @@ struct sfc_dp_txq {
struct sfc_dp_queue dpq;
};
+/** Datapath transmit queue descriptor number limitations */
+struct sfc_dp_tx_hw_limits {
+ unsigned int txq_max_entries;
+ unsigned int txq_min_entries;
+};
+
/**
* Datapath transmit queue creation information.
*
@@ -83,6 +89,7 @@ typedef void (sfc_dp_tx_get_dev_info_t)(struct rte_eth_dev_info *dev_info);
* @return 0 or positive errno.
*/
typedef int (sfc_dp_tx_qsize_up_rings_t)(uint16_t nb_tx_desc,
+ struct sfc_dp_tx_hw_limits *limits,
unsigned int *txq_entries,
unsigned int *evq_entries,
unsigned int *txq_max_fill_level);
diff --git a/drivers/net/sfc/sfc_ef10_tx.c b/drivers/net/sfc/sfc_ef10_tx.c
index ff6d5b486..0711c1136 100644
--- a/drivers/net/sfc/sfc_ef10_tx.c
+++ b/drivers/net/sfc/sfc_ef10_tx.c
@@ -782,6 +782,7 @@ sfc_ef10_get_dev_info(struct rte_eth_dev_info *dev_info)
static sfc_dp_tx_qsize_up_rings_t sfc_ef10_tx_qsize_up_rings;
static int
sfc_ef10_tx_qsize_up_rings(uint16_t nb_tx_desc,
+ struct sfc_dp_tx_hw_limits *limits,
unsigned int *txq_entries,
unsigned int *evq_entries,
unsigned int *txq_max_fill_level)
@@ -790,8 +791,8 @@ sfc_ef10_tx_qsize_up_rings(uint16_t nb_tx_desc,
* rte_ethdev API guarantees that the number meets min, max and
* alignment requirements.
*/
- if (nb_tx_desc <= EFX_TXQ_MINNDESCS)
- *txq_entries = EFX_TXQ_MINNDESCS;
+ if (nb_tx_desc <= limits->txq_min_entries)
+ *txq_entries = limits->txq_min_entries;
else
*txq_entries = rte_align32pow2(nb_tx_desc);
diff --git a/drivers/net/sfc/sfc_ethdev.c b/drivers/net/sfc/sfc_ethdev.c
index 286550863..57b8b7e49 100644
--- a/drivers/net/sfc/sfc_ethdev.c
+++ b/drivers/net/sfc/sfc_ethdev.c
@@ -162,12 +162,12 @@ sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
/* Initialize to hardware limits */
dev_info->tx_desc_lim.nb_max = sa->txq_max_entries;
- dev_info->tx_desc_lim.nb_min = EFX_TXQ_MINNDESCS;
+ dev_info->tx_desc_lim.nb_min = sa->txq_min_entries;
/*
* The TXQ hardware requires that the descriptor count is a power
* of 2, but tx_desc_lim cannot properly describe that constraint
*/
- dev_info->tx_desc_lim.nb_align = EFX_TXQ_MINNDESCS;
+ dev_info->tx_desc_lim.nb_align = sa->txq_min_entries;
if (sap->dp_rx->get_dev_info != NULL)
sap->dp_rx->get_dev_info(dev_info);
diff --git a/drivers/net/sfc/sfc_tx.c b/drivers/net/sfc/sfc_tx.c
index acdbf1602..aa0538fe8 100644
--- a/drivers/net/sfc/sfc_tx.c
+++ b/drivers/net/sfc/sfc_tx.c
@@ -131,14 +131,20 @@ sfc_tx_qinit(struct sfc_adapter *sa, unsigned int sw_index,
int rc = 0;
struct sfc_dp_tx_qcreate_info info;
uint64_t offloads;
+ struct sfc_dp_tx_hw_limits hw_limits;
sfc_log_init(sa, "TxQ = %u", sw_index);
- rc = sa->priv.dp_tx->qsize_up_rings(nb_tx_desc, &txq_entries,
- &evq_entries, &txq_max_fill_level);
+ memset(&hw_limits, 0, sizeof(hw_limits));
+ hw_limits.txq_max_entries = sa->txq_max_entries;
+ hw_limits.txq_min_entries = sa->txq_min_entries;
+
+ rc = sa->priv.dp_tx->qsize_up_rings(nb_tx_desc, &hw_limits,
+ &txq_entries, &evq_entries,
+ &txq_max_fill_level);
if (rc != 0)
goto fail_size_up_rings;
- SFC_ASSERT(txq_entries >= EFX_TXQ_MINNDESCS);
+ SFC_ASSERT(txq_entries >= sa->txq_min_entries);
SFC_ASSERT(txq_entries <= sa->txq_max_entries);
SFC_ASSERT(txq_entries >= nb_tx_desc);
SFC_ASSERT(txq_max_fill_level <= nb_tx_desc);
@@ -920,6 +926,7 @@ sfc_txq_by_dp_txq(const struct sfc_dp_txq *dp_txq)
static sfc_dp_tx_qsize_up_rings_t sfc_efx_tx_qsize_up_rings;
static int
sfc_efx_tx_qsize_up_rings(uint16_t nb_tx_desc,
+ __rte_unused struct sfc_dp_tx_hw_limits *limits,
unsigned int *txq_entries,
unsigned int *evq_entries,
unsigned int *txq_max_fill_level)
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 10/38] net/sfc: use NIC Rx descs limits instead of defines
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (8 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 09/38] net/sfc: use NIC min number of Tx descs instead of define Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 11/38] net/sfc: use NIC EVQ " Andrew Rybchenko
` (28 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Igor Romanov
From: Igor Romanov <igor.romanov@oktetlabs.ru>
Descriptor limits are not common for all NIC families. Use the variables
from NIC configuration instead of deprecated defines.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/sfc.c | 6 ++++++
drivers/net/sfc/sfc.h | 3 +++
drivers/net/sfc/sfc_dp_rx.h | 7 +++++++
drivers/net/sfc/sfc_ef10_essb_rx.c | 7 ++++---
drivers/net/sfc/sfc_ef10_rx.c | 5 +++--
drivers/net/sfc/sfc_ethdev.c | 6 +++---
drivers/net/sfc/sfc_rx.c | 18 +++++++++++++-----
7 files changed, 39 insertions(+), 13 deletions(-)
diff --git a/drivers/net/sfc/sfc.c b/drivers/net/sfc/sfc.c
index 2e29bfaf4..26c7c322f 100644
--- a/drivers/net/sfc/sfc.c
+++ b/drivers/net/sfc/sfc.c
@@ -756,6 +756,12 @@ sfc_attach(struct sfc_adapter *sa)
if (rc != 0)
goto fail_estimate_rsrc_limits;
+ sa->rxq_max_entries = encp->enc_rxq_max_ndescs;
+ SFC_ASSERT(rte_is_power_of_2(sa->rxq_max_entries));
+
+ sa->rxq_min_entries = encp->enc_rxq_min_ndescs;
+ SFC_ASSERT(rte_is_power_of_2(sa->rxq_min_entries));
+
sa->txq_max_entries = encp->enc_txq_max_ndescs;
SFC_ASSERT(rte_is_power_of_2(sa->txq_max_entries));
diff --git a/drivers/net/sfc/sfc.h b/drivers/net/sfc/sfc.h
index 3acb3fe48..6c99e9e66 100644
--- a/drivers/net/sfc/sfc.h
+++ b/drivers/net/sfc/sfc.h
@@ -244,6 +244,9 @@ struct sfc_adapter {
unsigned int rxq_max;
unsigned int txq_max;
+ unsigned int rxq_max_entries;
+ unsigned int rxq_min_entries;
+
unsigned int txq_max_entries;
unsigned int txq_min_entries;
diff --git a/drivers/net/sfc/sfc_dp_rx.h b/drivers/net/sfc/sfc_dp_rx.h
index 7e911648e..c3cc4ff5b 100644
--- a/drivers/net/sfc/sfc_dp_rx.h
+++ b/drivers/net/sfc/sfc_dp_rx.h
@@ -28,6 +28,12 @@ struct sfc_dp_rxq {
struct sfc_dp_queue dpq;
};
+/** Datapath receive queue descriptor number limitations */
+struct sfc_dp_rx_hw_limits {
+ unsigned int rxq_max_entries;
+ unsigned int rxq_min_entries;
+};
+
/**
* Datapath receive queue creation information.
*
@@ -114,6 +120,7 @@ typedef int (sfc_dp_rx_pool_ops_supported_t)(const char *pool);
* @return 0 or positive errno.
*/
typedef int (sfc_dp_rx_qsize_up_rings_t)(uint16_t nb_rx_desc,
+ struct sfc_dp_rx_hw_limits *limits,
struct rte_mempool *mb_pool,
unsigned int *rxq_entries,
unsigned int *evq_entries,
diff --git a/drivers/net/sfc/sfc_ef10_essb_rx.c b/drivers/net/sfc/sfc_ef10_essb_rx.c
index a24f54e7b..fee7a8b27 100644
--- a/drivers/net/sfc/sfc_ef10_essb_rx.c
+++ b/drivers/net/sfc/sfc_ef10_essb_rx.c
@@ -487,6 +487,7 @@ sfc_ef10_essb_rx_pool_ops_supported(const char *pool)
static sfc_dp_rx_qsize_up_rings_t sfc_ef10_essb_rx_qsize_up_rings;
static int
sfc_ef10_essb_rx_qsize_up_rings(uint16_t nb_rx_desc,
+ struct sfc_dp_rx_hw_limits *limits,
struct rte_mempool *mb_pool,
unsigned int *rxq_entries,
unsigned int *evq_entries,
@@ -513,11 +514,11 @@ sfc_ef10_essb_rx_qsize_up_rings(uint16_t nb_rx_desc,
nb_hw_rx_desc = RTE_MAX(SFC_DIV_ROUND_UP(nb_rx_desc,
mp_info.contig_block_size),
SFC_EF10_RX_WPTR_ALIGN + 1);
- if (nb_hw_rx_desc <= EFX_RXQ_MINNDESCS) {
- *rxq_entries = EFX_RXQ_MINNDESCS;
+ if (nb_hw_rx_desc <= limits->rxq_min_entries) {
+ *rxq_entries = limits->rxq_min_entries;
} else {
*rxq_entries = rte_align32pow2(nb_hw_rx_desc);
- if (*rxq_entries > EFX_RXQ_MAXNDESCS)
+ if (*rxq_entries > limits->rxq_max_entries)
return EINVAL;
}
diff --git a/drivers/net/sfc/sfc_ef10_rx.c b/drivers/net/sfc/sfc_ef10_rx.c
index 77ca580b5..49e32faaf 100644
--- a/drivers/net/sfc/sfc_ef10_rx.c
+++ b/drivers/net/sfc/sfc_ef10_rx.c
@@ -566,6 +566,7 @@ sfc_ef10_rx_get_dev_info(struct rte_eth_dev_info *dev_info)
static sfc_dp_rx_qsize_up_rings_t sfc_ef10_rx_qsize_up_rings;
static int
sfc_ef10_rx_qsize_up_rings(uint16_t nb_rx_desc,
+ struct sfc_dp_rx_hw_limits *limits,
__rte_unused struct rte_mempool *mb_pool,
unsigned int *rxq_entries,
unsigned int *evq_entries,
@@ -575,8 +576,8 @@ sfc_ef10_rx_qsize_up_rings(uint16_t nb_rx_desc,
* rte_ethdev API guarantees that the number meets min, max and
* alignment requirements.
*/
- if (nb_rx_desc <= EFX_RXQ_MINNDESCS)
- *rxq_entries = EFX_RXQ_MINNDESCS;
+ if (nb_rx_desc <= limits->rxq_min_entries)
+ *rxq_entries = limits->rxq_min_entries;
else
*rxq_entries = rte_align32pow2(nb_rx_desc);
diff --git a/drivers/net/sfc/sfc_ethdev.c b/drivers/net/sfc/sfc_ethdev.c
index 57b8b7e49..e7bfd8917 100644
--- a/drivers/net/sfc/sfc_ethdev.c
+++ b/drivers/net/sfc/sfc_ethdev.c
@@ -153,12 +153,12 @@ sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
}
/* Initialize to hardware limits */
- dev_info->rx_desc_lim.nb_max = EFX_RXQ_MAXNDESCS;
- dev_info->rx_desc_lim.nb_min = EFX_RXQ_MINNDESCS;
+ dev_info->rx_desc_lim.nb_max = sa->rxq_max_entries;
+ dev_info->rx_desc_lim.nb_min = sa->rxq_min_entries;
/* The RXQ hardware requires that the descriptor count is a power
* of 2, but rx_desc_lim cannot properly describe that constraint.
*/
- dev_info->rx_desc_lim.nb_align = EFX_RXQ_MINNDESCS;
+ dev_info->rx_desc_lim.nb_align = sa->rxq_min_entries;
/* Initialize to hardware limits */
dev_info->tx_desc_lim.nb_max = sa->txq_max_entries;
diff --git a/drivers/net/sfc/sfc_rx.c b/drivers/net/sfc/sfc_rx.c
index 54d4b5872..c8dec8d6e 100644
--- a/drivers/net/sfc/sfc_rx.c
+++ b/drivers/net/sfc/sfc_rx.c
@@ -411,6 +411,7 @@ sfc_rxq_by_dp_rxq(const struct sfc_dp_rxq *dp_rxq)
static sfc_dp_rx_qsize_up_rings_t sfc_efx_rx_qsize_up_rings;
static int
sfc_efx_rx_qsize_up_rings(uint16_t nb_rx_desc,
+ __rte_unused struct sfc_dp_rx_hw_limits *limits,
__rte_unused struct rte_mempool *mb_pool,
unsigned int *rxq_entries,
unsigned int *evq_entries,
@@ -971,13 +972,19 @@ sfc_rx_qinit(struct sfc_adapter *sa, unsigned int sw_index,
struct sfc_evq *evq;
struct sfc_rxq *rxq;
struct sfc_dp_rx_qcreate_info info;
+ struct sfc_dp_rx_hw_limits hw_limits;
- rc = sa->priv.dp_rx->qsize_up_rings(nb_rx_desc, mb_pool, &rxq_entries,
- &evq_entries, &rxq_max_fill_level);
+ memset(&hw_limits, 0, sizeof(hw_limits));
+ hw_limits.rxq_max_entries = sa->rxq_max_entries;
+ hw_limits.rxq_min_entries = sa->rxq_min_entries;
+
+ rc = sa->priv.dp_rx->qsize_up_rings(nb_rx_desc, &hw_limits, mb_pool,
+ &rxq_entries, &evq_entries,
+ &rxq_max_fill_level);
if (rc != 0)
goto fail_size_up_rings;
- SFC_ASSERT(rxq_entries >= EFX_RXQ_MINNDESCS);
- SFC_ASSERT(rxq_entries <= EFX_RXQ_MAXNDESCS);
+ SFC_ASSERT(rxq_entries >= sa->rxq_min_entries);
+ SFC_ASSERT(rxq_entries <= sa->rxq_max_entries);
SFC_ASSERT(rxq_max_fill_level <= nb_rx_desc);
offloads = rx_conf->offloads |
@@ -1403,9 +1410,10 @@ sfc_rx_qinit_info(struct sfc_adapter *sa, unsigned int sw_index)
{
struct sfc_adapter_shared * const sas = sfc_sa2shared(sa);
struct sfc_rxq_info *rxq_info = &sas->rxq_info[sw_index];
+ const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
unsigned int max_entries;
- max_entries = EFX_RXQ_MAXNDESCS;
+ max_entries = encp->enc_rxq_max_ndescs;
SFC_ASSERT(rte_is_power_of_2(max_entries));
rxq_info->max_entries = max_entries;
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 11/38] net/sfc: use NIC EVQ descs limits instead of defines
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (9 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 10/38] net/sfc: use NIC Rx descs limits instead of defines Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 12/38] net/sfc/base: move Tx descs number check to generic place Andrew Rybchenko
` (27 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Igor Romanov
From: Igor Romanov <igor.romanov@oktetlabs.ru>
Descriptor limits are not common for all NIC families. Use the variables
from NIC configuration instead of deprecated defines.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/sfc.c | 6 ++++++
drivers/net/sfc/sfc.h | 3 +++
drivers/net/sfc/sfc_dp_rx.h | 2 ++
drivers/net/sfc/sfc_ef10_essb_rx.c | 4 ++--
drivers/net/sfc/sfc_ev.c | 2 +-
drivers/net/sfc/sfc_ev.h | 3 ---
drivers/net/sfc/sfc_rx.c | 2 ++
7 files changed, 16 insertions(+), 6 deletions(-)
diff --git a/drivers/net/sfc/sfc.c b/drivers/net/sfc/sfc.c
index 26c7c322f..898603884 100644
--- a/drivers/net/sfc/sfc.c
+++ b/drivers/net/sfc/sfc.c
@@ -756,6 +756,12 @@ sfc_attach(struct sfc_adapter *sa)
if (rc != 0)
goto fail_estimate_rsrc_limits;
+ sa->evq_max_entries = encp->enc_evq_max_nevs;
+ SFC_ASSERT(rte_is_power_of_2(sa->evq_max_entries));
+
+ sa->evq_min_entries = encp->enc_evq_min_nevs;
+ SFC_ASSERT(rte_is_power_of_2(sa->evq_min_entries));
+
sa->rxq_max_entries = encp->enc_rxq_max_ndescs;
SFC_ASSERT(rte_is_power_of_2(sa->rxq_max_entries));
diff --git a/drivers/net/sfc/sfc.h b/drivers/net/sfc/sfc.h
index 6c99e9e66..a4b9a3f33 100644
--- a/drivers/net/sfc/sfc.h
+++ b/drivers/net/sfc/sfc.h
@@ -250,6 +250,9 @@ struct sfc_adapter {
unsigned int txq_max_entries;
unsigned int txq_min_entries;
+ unsigned int evq_max_entries;
+ unsigned int evq_min_entries;
+
uint32_t evq_flags;
unsigned int evq_count;
diff --git a/drivers/net/sfc/sfc_dp_rx.h b/drivers/net/sfc/sfc_dp_rx.h
index c3cc4ff5b..042c014ee 100644
--- a/drivers/net/sfc/sfc_dp_rx.h
+++ b/drivers/net/sfc/sfc_dp_rx.h
@@ -32,6 +32,8 @@ struct sfc_dp_rxq {
struct sfc_dp_rx_hw_limits {
unsigned int rxq_max_entries;
unsigned int rxq_min_entries;
+ unsigned int evq_max_entries;
+ unsigned int evq_min_entries;
};
/**
diff --git a/drivers/net/sfc/sfc_ef10_essb_rx.c b/drivers/net/sfc/sfc_ef10_essb_rx.c
index fee7a8b27..ccb6aea74 100644
--- a/drivers/net/sfc/sfc_ef10_essb_rx.c
+++ b/drivers/net/sfc/sfc_ef10_essb_rx.c
@@ -528,8 +528,8 @@ sfc_ef10_essb_rx_qsize_up_rings(uint16_t nb_rx_desc,
1 /* Rx error */ + 1 /* flush */ + 1 /* head-tail space */;
*evq_entries = rte_align32pow2(max_events);
- *evq_entries = RTE_MAX(*evq_entries, (unsigned int)EFX_EVQ_MINNEVS);
- *evq_entries = RTE_MIN(*evq_entries, (unsigned int)EFX_EVQ_MAXNEVS);
+ *evq_entries = RTE_MAX(*evq_entries, limits->evq_min_entries);
+ *evq_entries = RTE_MIN(*evq_entries, limits->evq_max_entries);
/*
* May be even maximum event queue size is insufficient to handle
diff --git a/drivers/net/sfc/sfc_ev.c b/drivers/net/sfc/sfc_ev.c
index 0ca502ea2..939766dc2 100644
--- a/drivers/net/sfc/sfc_ev.c
+++ b/drivers/net/sfc/sfc_ev.c
@@ -897,7 +897,7 @@ sfc_ev_attach(struct sfc_adapter *sa)
sa->mgmt_evq_index = 0;
rte_spinlock_init(&sa->mgmt_evq_lock);
- rc = sfc_ev_qinit(sa, SFC_EVQ_TYPE_MGMT, 0, SFC_MGMT_EVQ_ENTRIES,
+ rc = sfc_ev_qinit(sa, SFC_EVQ_TYPE_MGMT, 0, sa->evq_min_entries,
sa->socket_id, &sa->mgmt_evq);
if (rc != 0)
goto fail_mgmt_evq_init;
diff --git a/drivers/net/sfc/sfc_ev.h b/drivers/net/sfc/sfc_ev.h
index 872f79b91..5d070b1a3 100644
--- a/drivers/net/sfc/sfc_ev.h
+++ b/drivers/net/sfc/sfc_ev.h
@@ -20,9 +20,6 @@
extern "C" {
#endif
-/* Number of entries in the management event queue */
-#define SFC_MGMT_EVQ_ENTRIES (EFX_EVQ_MINNEVS)
-
struct sfc_adapter;
struct sfc_dp_rxq;
struct sfc_dp_txq;
diff --git a/drivers/net/sfc/sfc_rx.c b/drivers/net/sfc/sfc_rx.c
index c8dec8d6e..faa9758af 100644
--- a/drivers/net/sfc/sfc_rx.c
+++ b/drivers/net/sfc/sfc_rx.c
@@ -977,6 +977,8 @@ sfc_rx_qinit(struct sfc_adapter *sa, unsigned int sw_index,
memset(&hw_limits, 0, sizeof(hw_limits));
hw_limits.rxq_max_entries = sa->rxq_max_entries;
hw_limits.rxq_min_entries = sa->rxq_min_entries;
+ hw_limits.evq_max_entries = sa->evq_max_entries;
+ hw_limits.evq_min_entries = sa->evq_min_entries;
rc = sa->priv.dp_rx->qsize_up_rings(nb_rx_desc, &hw_limits, mb_pool,
&rxq_entries, &evq_entries,
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 12/38] net/sfc/base: move Tx descs number check to generic place
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (10 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 11/38] net/sfc: use NIC EVQ " Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 13/38] net/sfc/base: move Rx " Andrew Rybchenko
` (26 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Igor Romanov
From: Igor Romanov <igor.romanov@oktetlabs.ru>
Now we have min/max limits in NIC config, so we can do check against
min/max in a generic place instead of NIC family specific functions.
Check that the descriptors number is a power of 2 is also can be made
common. It removes code duplication and makes NIC family
specific functions a bit shorter.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/efx_tx.c | 36 ++++++++++++++++++-----------------
1 file changed, 19 insertions(+), 17 deletions(-)
diff --git a/drivers/net/sfc/base/efx_tx.c b/drivers/net/sfc/base/efx_tx.c
index ebbdeb3d4..b777a85c5 100644
--- a/drivers/net/sfc/base/efx_tx.c
+++ b/drivers/net/sfc/base/efx_tx.c
@@ -312,6 +312,7 @@ efx_tx_qcreate(
{
const efx_tx_ops_t *etxop = enp->en_etxop;
efx_txq_t *etp;
+ const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);
efx_rc_t rc;
EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
@@ -320,12 +321,22 @@ efx_tx_qcreate(
EFSYS_ASSERT3U(enp->en_tx_qcount + 1, <,
enp->en_nic_cfg.enc_txq_limit);
+ EFSYS_ASSERT(ISP2(encp->enc_txq_max_ndescs));
+ EFSYS_ASSERT(ISP2(encp->enc_txq_min_ndescs));
+
+ if (!ISP2(ndescs) ||
+ ndescs < encp->enc_txq_min_ndescs ||
+ ndescs > encp->enc_txq_max_ndescs) {
+ rc = EINVAL;
+ goto fail1;
+ }
+
/* Allocate an TXQ object */
EFSYS_KMEM_ALLOC(enp->en_esip, sizeof (efx_txq_t), etp);
if (etp == NULL) {
rc = ENOMEM;
- goto fail1;
+ goto fail2;
}
etp->et_magic = EFX_TXQ_MAGIC;
@@ -339,16 +350,18 @@ efx_tx_qcreate(
if ((rc = etxop->etxo_qcreate(enp, index, label, esmp,
ndescs, id, flags, eep, etp, addedp)) != 0)
- goto fail2;
+ goto fail3;
enp->en_tx_qcount++;
*etpp = etp;
return (0);
+fail3:
+ EFSYS_PROBE(fail3);
+ EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_txq_t), etp);
fail2:
EFSYS_PROBE(fail2);
- EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_txq_t), etp);
fail1:
EFSYS_PROBE1(fail1, efx_rc_t, rc);
return (rc);
@@ -922,18 +935,9 @@ siena_tx_qcreate(
(1 << FRF_AZ_TX_DESCQ_LABEL_WIDTH));
EFSYS_ASSERT3U(label, <, EFX_EV_TX_NLABELS);
- EFSYS_ASSERT(ISP2(encp->enc_txq_max_ndescs));
- EFSYS_ASSERT(ISP2(encp->enc_txq_min_ndescs));
-
- if (!ISP2(ndescs) ||
- (ndescs < encp->enc_txq_min_ndescs) ||
- (ndescs > encp->enc_txq_max_ndescs)) {
- rc = EINVAL;
- goto fail1;
- }
if (index >= encp->enc_txq_limit) {
rc = EINVAL;
- goto fail2;
+ goto fail1;
}
for (size = 0;
(1U << size) <= encp->enc_txq_max_ndescs / encp->enc_txq_min_ndescs;
@@ -942,13 +946,13 @@ siena_tx_qcreate(
break;
if (id + (1 << size) >= encp->enc_buftbl_limit) {
rc = EINVAL;
- goto fail3;
+ goto fail2;
}
inner_csum = EFX_TXQ_CKSUM_INNER_IPV4 | EFX_TXQ_CKSUM_INNER_TCPUDP;
if ((flags & inner_csum) != 0) {
rc = EINVAL;
- goto fail4;
+ goto fail3;
}
/* Set up the new descriptor queue */
@@ -973,8 +977,6 @@ siena_tx_qcreate(
return (0);
-fail4:
- EFSYS_PROBE(fail4);
fail3:
EFSYS_PROBE(fail3);
fail2:
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 13/38] net/sfc/base: move Rx descs number check to generic place
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (11 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 12/38] net/sfc/base: move Tx descs number check to generic place Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 14/38] net/sfc/base: move EVQ " Andrew Rybchenko
` (25 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Igor Romanov
From: Igor Romanov <igor.romanov@oktetlabs.ru>
Now we have min/max limits in NIC config, so we can do check against
min/max in a generic place instead of NIC family specific functions.
Check that the descriptors number is a power of 2 is also can be
made common. It removes code duplication and makes NIC family
specific functions a bit shorter.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/ef10_rx.c | 49 +++++++++++++---------------------
drivers/net/sfc/base/efx_rx.c | 42 +++++++++++++++--------------
2 files changed, 41 insertions(+), 50 deletions(-)
diff --git a/drivers/net/sfc/base/ef10_rx.c b/drivers/net/sfc/base/ef10_rx.c
index 1f2a6e009..f2b72571a 100644
--- a/drivers/net/sfc/base/ef10_rx.c
+++ b/drivers/net/sfc/base/ef10_rx.c
@@ -1012,18 +1012,9 @@ ef10_rx_qcreate(
EFSYS_ASSERT3U(label, <, EFX_EV_RX_NLABELS);
EFSYS_ASSERT3U(enp->en_rx_qcount + 1, <, encp->enc_rxq_limit);
- EFSYS_ASSERT(ISP2(encp->enc_rxq_max_ndescs));
- EFSYS_ASSERT(ISP2(encp->enc_rxq_min_ndescs));
-
- if (!ISP2(ndescs) ||
- (ndescs < encp->enc_rxq_min_ndescs) ||
- (ndescs > encp->enc_rxq_max_ndescs)) {
- rc = EINVAL;
- goto fail1;
- }
if (index >= encp->enc_rxq_limit) {
rc = EINVAL;
- goto fail2;
+ goto fail1;
}
switch (type) {
@@ -1034,7 +1025,7 @@ ef10_rx_qcreate(
case EFX_RXQ_TYPE_PACKED_STREAM:
if (type_data == NULL) {
rc = EINVAL;
- goto fail3;
+ goto fail2;
}
switch (type_data->ertd_packed_stream.eps_buf_size) {
case EFX_RXQ_PACKED_STREAM_BUF_SIZE_1M:
@@ -1054,7 +1045,7 @@ ef10_rx_qcreate(
break;
default:
rc = ENOTSUP;
- goto fail4;
+ goto fail3;
}
break;
#endif /* EFSYS_OPT_RX_PACKED_STREAM */
@@ -1062,7 +1053,7 @@ ef10_rx_qcreate(
case EFX_RXQ_TYPE_ES_SUPER_BUFFER:
if (type_data == NULL) {
rc = EINVAL;
- goto fail5;
+ goto fail4;
}
ps_buf_size = 0;
es_bufs_per_desc =
@@ -1077,7 +1068,7 @@ ef10_rx_qcreate(
#endif /* EFSYS_OPT_RX_ES_SUPER_BUFFER */
default:
rc = ENOTSUP;
- goto fail6;
+ goto fail5;
}
#if EFSYS_OPT_RX_PACKED_STREAM
@@ -1085,13 +1076,13 @@ ef10_rx_qcreate(
/* Check if datapath firmware supports packed stream mode */
if (encp->enc_rx_packed_stream_supported == B_FALSE) {
rc = ENOTSUP;
- goto fail7;
+ goto fail6;
}
/* Check if packed stream allows configurable buffer sizes */
if ((ps_buf_size != MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_1M) &&
(encp->enc_rx_var_packed_stream_supported == B_FALSE)) {
rc = ENOTSUP;
- goto fail8;
+ goto fail7;
}
}
#else /* EFSYS_OPT_RX_PACKED_STREAM */
@@ -1102,17 +1093,17 @@ ef10_rx_qcreate(
if (es_bufs_per_desc > 0) {
if (encp->enc_rx_es_super_buffer_supported == B_FALSE) {
rc = ENOTSUP;
- goto fail9;
+ goto fail8;
}
if (!IS_P2ALIGNED(es_max_dma_len,
EFX_RX_ES_SUPER_BUFFER_BUF_ALIGNMENT)) {
rc = EINVAL;
- goto fail10;
+ goto fail9;
}
if (!IS_P2ALIGNED(es_buf_stride,
EFX_RX_ES_SUPER_BUFFER_BUF_ALIGNMENT)) {
rc = EINVAL;
- goto fail11;
+ goto fail10;
}
}
#else /* EFSYS_OPT_RX_ES_SUPER_BUFFER */
@@ -1134,7 +1125,7 @@ ef10_rx_qcreate(
esmp, disable_scatter, want_inner_classes,
ps_buf_size, es_bufs_per_desc, es_max_dma_len,
es_buf_stride, hol_block_timeout)) != 0)
- goto fail12;
+ goto fail11;
erp->er_eep = eep;
erp->er_label = label;
@@ -1145,36 +1136,34 @@ ef10_rx_qcreate(
return (0);
-fail12:
- EFSYS_PROBE(fail12);
-#if EFSYS_OPT_RX_ES_SUPER_BUFFER
fail11:
EFSYS_PROBE(fail11);
+#if EFSYS_OPT_RX_ES_SUPER_BUFFER
fail10:
EFSYS_PROBE(fail10);
fail9:
EFSYS_PROBE(fail9);
-#endif /* EFSYS_OPT_RX_ES_SUPER_BUFFER */
-#if EFSYS_OPT_RX_PACKED_STREAM
fail8:
EFSYS_PROBE(fail8);
+#endif /* EFSYS_OPT_RX_ES_SUPER_BUFFER */
+#if EFSYS_OPT_RX_PACKED_STREAM
fail7:
EFSYS_PROBE(fail7);
-#endif /* EFSYS_OPT_RX_PACKED_STREAM */
fail6:
EFSYS_PROBE(fail6);
-#if EFSYS_OPT_RX_ES_SUPER_BUFFER
+#endif /* EFSYS_OPT_RX_PACKED_STREAM */
fail5:
EFSYS_PROBE(fail5);
-#endif /* EFSYS_OPT_RX_ES_SUPER_BUFFER */
-#if EFSYS_OPT_RX_PACKED_STREAM
+#if EFSYS_OPT_RX_ES_SUPER_BUFFER
fail4:
EFSYS_PROBE(fail4);
+#endif /* EFSYS_OPT_RX_ES_SUPER_BUFFER */
+#if EFSYS_OPT_RX_PACKED_STREAM
fail3:
EFSYS_PROBE(fail3);
-#endif /* EFSYS_OPT_RX_PACKED_STREAM */
fail2:
EFSYS_PROBE(fail2);
+#endif /* EFSYS_OPT_RX_PACKED_STREAM */
fail1:
EFSYS_PROBE1(fail1, efx_rc_t, rc);
diff --git a/drivers/net/sfc/base/efx_rx.c b/drivers/net/sfc/base/efx_rx.c
index 332f8c800..8910cd5f7 100644
--- a/drivers/net/sfc/base/efx_rx.c
+++ b/drivers/net/sfc/base/efx_rx.c
@@ -794,17 +794,28 @@ efx_rx_qcreate_internal(
{
const efx_rx_ops_t *erxop = enp->en_erxop;
efx_rxq_t *erp;
+ const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);
efx_rc_t rc;
EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX);
+ EFSYS_ASSERT(ISP2(encp->enc_rxq_max_ndescs));
+ EFSYS_ASSERT(ISP2(encp->enc_rxq_min_ndescs));
+
+ if (!ISP2(ndescs) ||
+ ndescs < encp->enc_rxq_min_ndescs ||
+ ndescs > encp->enc_rxq_max_ndescs) {
+ rc = EINVAL;
+ goto fail1;
+ }
+
/* Allocate an RXQ object */
EFSYS_KMEM_ALLOC(enp->en_esip, sizeof (efx_rxq_t), erp);
if (erp == NULL) {
rc = ENOMEM;
- goto fail1;
+ goto fail2;
}
erp->er_magic = EFX_RXQ_MAGIC;
@@ -815,17 +826,19 @@ efx_rx_qcreate_internal(
if ((rc = erxop->erxo_qcreate(enp, index, label, type, type_data, esmp,
ndescs, id, flags, eep, erp)) != 0)
- goto fail2;
+ goto fail3;
enp->en_rx_qcount++;
*erpp = erp;
return (0);
-fail2:
- EFSYS_PROBE(fail2);
+fail3:
+ EFSYS_PROBE(fail3);
EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_rxq_t), erp);
+fail2:
+ EFSYS_PROBE(fail2);
fail1:
EFSYS_PROBE1(fail1, efx_rc_t, rc);
@@ -1590,18 +1603,9 @@ siena_rx_qcreate(
EFSYS_ASSERT3U(label, <, EFX_EV_RX_NLABELS);
EFSYS_ASSERT3U(enp->en_rx_qcount + 1, <, encp->enc_rxq_limit);
- EFSYS_ASSERT(ISP2(encp->enc_rxq_max_ndescs));
- EFSYS_ASSERT(ISP2(encp->enc_rxq_min_ndescs));
-
- if (!ISP2(ndescs) ||
- (ndescs < encp->enc_rxq_min_ndescs) ||
- (ndescs > encp->enc_rxq_max_ndescs)) {
- rc = EINVAL;
- goto fail1;
- }
if (index >= encp->enc_rxq_limit) {
rc = EINVAL;
- goto fail2;
+ goto fail1;
}
for (size = 0;
(1U << size) <= encp->enc_rxq_max_ndescs / encp->enc_rxq_min_ndescs;
@@ -1610,7 +1614,7 @@ siena_rx_qcreate(
break;
if (id + (1 << size) >= encp->enc_buftbl_limit) {
rc = EINVAL;
- goto fail3;
+ goto fail2;
}
switch (type) {
@@ -1619,7 +1623,7 @@ siena_rx_qcreate(
default:
rc = EINVAL;
- goto fail4;
+ goto fail3;
}
if (flags & EFX_RXQ_FLAG_SCATTER) {
@@ -1627,7 +1631,7 @@ siena_rx_qcreate(
jumbo = B_TRUE;
#else
rc = EINVAL;
- goto fail5;
+ goto fail4;
#endif /* EFSYS_OPT_RX_SCATTER */
}
@@ -1647,11 +1651,9 @@ siena_rx_qcreate(
return (0);
#if !EFSYS_OPT_RX_SCATTER
-fail5:
- EFSYS_PROBE(fail5);
-#endif
fail4:
EFSYS_PROBE(fail4);
+#endif
fail3:
EFSYS_PROBE(fail3);
fail2:
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 14/38] net/sfc/base: move EVQ descs number check to generic place
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (12 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 13/38] net/sfc/base: move Rx " Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 15/38] net/sfc/base: move a macro to Siena implementation header Andrew Rybchenko
` (24 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Igor Romanov
From: Igor Romanov <igor.romanov@oktetlabs.ru>
Now we have min/max limits in NIC config, so we can do check against
min/max in a generic place instead of NIC family specific functions.
Check that the descriptors number is a power of 2 is also can be
made common. It removes code duplication and makes NIC family
specific functions a bit shorter.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/ef10_ev.c | 19 ++++-----------
drivers/net/sfc/base/efx_ev.c | 42 ++++++++++++++++++----------------
2 files changed, 26 insertions(+), 35 deletions(-)
diff --git a/drivers/net/sfc/base/ef10_ev.c b/drivers/net/sfc/base/ef10_ev.c
index 12125c6db..4f711992e 100644
--- a/drivers/net/sfc/base/ef10_ev.c
+++ b/drivers/net/sfc/base/ef10_ev.c
@@ -446,24 +446,15 @@ ef10_ev_qcreate(
efx_rc_t rc;
_NOTE(ARGUNUSED(id)) /* buftbl id managed by MC */
- EFSYS_ASSERT(ISP2(encp->enc_evq_max_nevs));
- EFSYS_ASSERT(ISP2(encp->enc_evq_min_nevs));
-
- if (!ISP2(ndescs) ||
- (ndescs < encp->enc_evq_min_nevs) ||
- (ndescs > encp->enc_evq_max_nevs)) {
- rc = EINVAL;
- goto fail1;
- }
if (index >= encp->enc_evq_limit) {
rc = EINVAL;
- goto fail2;
+ goto fail1;
}
if (us > encp->enc_evq_timer_max_us) {
rc = EINVAL;
- goto fail3;
+ goto fail2;
}
/* Set up the handler table */
@@ -503,7 +494,7 @@ ef10_ev_qcreate(
rc = efx_mcdi_init_evq_v2(enp, index, esmp, ndescs, irq, us,
flags);
if (rc != 0)
- goto fail4;
+ goto fail3;
} else {
/*
* On Huntington we need to specify the settings to use.
@@ -520,13 +511,11 @@ ef10_ev_qcreate(
rc = efx_mcdi_init_evq(enp, index, esmp, ndescs, irq, us, flags,
low_latency);
if (rc != 0)
- goto fail5;
+ goto fail4;
}
return (0);
-fail5:
- EFSYS_PROBE(fail5);
fail4:
EFSYS_PROBE(fail4);
fail3:
diff --git a/drivers/net/sfc/base/efx_ev.c b/drivers/net/sfc/base/efx_ev.c
index f1788cad2..51c422c2d 100644
--- a/drivers/net/sfc/base/efx_ev.c
+++ b/drivers/net/sfc/base/efx_ev.c
@@ -206,6 +206,7 @@ efx_ev_qcreate(
{
const efx_ev_ops_t *eevop = enp->en_eevop;
efx_evq_t *eep;
+ const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);
efx_rc_t rc;
EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
@@ -228,11 +229,21 @@ efx_ev_qcreate(
goto fail2;
}
+ EFSYS_ASSERT(ISP2(encp->enc_evq_max_nevs));
+ EFSYS_ASSERT(ISP2(encp->enc_evq_min_nevs));
+
+ if (!ISP2(ndescs) ||
+ ndescs < encp->enc_evq_min_nevs ||
+ ndescs > encp->enc_evq_max_nevs) {
+ rc = EINVAL;
+ goto fail3;
+ }
+
/* Allocate an EVQ object */
EFSYS_KMEM_ALLOC(enp->en_esip, sizeof (efx_evq_t), eep);
if (eep == NULL) {
rc = ENOMEM;
- goto fail3;
+ goto fail4;
}
eep->ee_magic = EFX_EVQ_MAGIC;
@@ -255,16 +266,18 @@ efx_ev_qcreate(
if ((rc = eevop->eevo_qcreate(enp, index, esmp, ndescs, id, us, flags,
eep)) != 0)
- goto fail4;
+ goto fail5;
return (0);
-fail4:
- EFSYS_PROBE(fail4);
+fail5:
+ EFSYS_PROBE(fail5);
*eepp = NULL;
enp->en_ev_qcount--;
EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_evq_t), eep);
+fail4:
+ EFSYS_PROBE(fail4);
fail3:
EFSYS_PROBE(fail3);
fail2:
@@ -1285,24 +1298,15 @@ siena_ev_qcreate(
_NOTE(ARGUNUSED(esmp))
- EFSYS_ASSERT(ISP2(encp->enc_evq_max_nevs));
- EFSYS_ASSERT(ISP2(encp->enc_evq_min_nevs));
-
- if (!ISP2(ndescs) ||
- (ndescs < encp->enc_evq_min_nevs) ||
- (ndescs > encp->enc_evq_max_nevs)) {
- rc = EINVAL;
- goto fail1;
- }
if (index >= encp->enc_evq_limit) {
rc = EINVAL;
- goto fail2;
+ goto fail1;
}
#if EFSYS_OPT_RX_SCALE
if (enp->en_intr.ei_type == EFX_INTR_LINE &&
index >= EFX_MAXRSS_LEGACY) {
rc = EINVAL;
- goto fail3;
+ goto fail2;
}
#endif
for (size = 0;
@@ -1312,7 +1316,7 @@ siena_ev_qcreate(
break;
if (id + (1 << size) >= encp->enc_buftbl_limit) {
rc = EINVAL;
- goto fail4;
+ goto fail3;
}
/* Set up the handler table */
@@ -1344,14 +1348,12 @@ siena_ev_qcreate(
return (0);
-fail4:
- EFSYS_PROBE(fail4);
-#if EFSYS_OPT_RX_SCALE
fail3:
EFSYS_PROBE(fail3);
-#endif
+#if EFSYS_OPT_RX_SCALE
fail2:
EFSYS_PROBE(fail2);
+#endif
fail1:
EFSYS_PROBE1(fail1, efx_rc_t, rc);
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 15/38] net/sfc/base: move a macro to Siena implementation header
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (13 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 14/38] net/sfc/base: move EVQ " Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 16/38] net/sfc/base: make max number of TxQ bufs EF10-specific Andrew Rybchenko
` (23 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Igor Romanov
From: Igor Romanov <igor.romanov@oktetlabs.ru>
The macro EFX_RXQ_DC_NDESCS() is used only by Siena implementation.
Since the macro is not used by any drivers, it does not require
exposed libefx interface.
Make the macro Siena-specific.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/efx.h | 1 -
drivers/net/sfc/base/siena_impl.h | 1 +
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index 80a6419e3..71500d6b8 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -2480,7 +2480,6 @@ efx_pseudo_hdr_pkt_length_get(
#define EFX_RXQ_SIZE(_ndescs) ((_ndescs) * sizeof (efx_qword_t))
#define EFX_RXQ_NBUFS(_ndescs) (EFX_RXQ_SIZE(_ndescs) / EFX_BUF_SIZE)
#define EFX_RXQ_LIMIT(_ndescs) ((_ndescs) - 16)
-#define EFX_RXQ_DC_NDESCS(_dcsize) (8 << _dcsize)
typedef enum efx_rxq_type_e {
EFX_RXQ_TYPE_DEFAULT,
diff --git a/drivers/net/sfc/base/siena_impl.h b/drivers/net/sfc/base/siena_impl.h
index 675e49953..caab29af0 100644
--- a/drivers/net/sfc/base/siena_impl.h
+++ b/drivers/net/sfc/base/siena_impl.h
@@ -23,6 +23,7 @@ extern "C" {
#define EFX_RXQ_DC_SIZE 3 /* 64 descriptors */
#endif
#define EFX_TXQ_DC_NDESCS(_dcsize) (8 << (_dcsize))
+#define EFX_RXQ_DC_NDESCS(_dcsize) (8 << (_dcsize))
#define SIENA_EVQ_MAXNEVS 32768
#define SIENA_EVQ_MINNEVS 512
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 16/38] net/sfc/base: make max number of TxQ bufs EF10-specific
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (14 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 15/38] net/sfc/base: move a macro to Siena implementation header Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 17/38] net/sfc/base: make NIC pointer const in NIC config get Andrew Rybchenko
` (22 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Igor Romanov
From: Igor Romanov <igor.romanov@oktetlabs.ru>
The define EFX_TXQ_MAX_BUFS is used only by EF10 family implementation.
Since the macro is not used by any drivers, it does not require
exposed libefx interface.
Make the define EF10-specific.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/ef10_impl.h | 3 +++
drivers/net/sfc/base/ef10_tx.c | 5 +++--
drivers/net/sfc/base/efx.h | 2 --
3 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/net/sfc/base/ef10_impl.h b/drivers/net/sfc/base/ef10_impl.h
index 44f7f635d..12747f43c 100644
--- a/drivers/net/sfc/base/ef10_impl.h
+++ b/drivers/net/sfc/base/ef10_impl.h
@@ -19,6 +19,9 @@ extern "C" {
#define EF10_TXQ_MINNDESCS 512
+/* Maximum independent of EFX_BUG35388_WORKAROUND. */
+#define EF10_TXQ_MAXNBUFS 8
+
/* Number of hardware PIO buffers (for compile-time resource dimensions) */
#define EF10_MAX_PIOBUF_NBUFS (16)
diff --git a/drivers/net/sfc/base/ef10_tx.c b/drivers/net/sfc/base/ef10_tx.c
index 5f3df42b9..aacf4310a 100644
--- a/drivers/net/sfc/base/ef10_tx.c
+++ b/drivers/net/sfc/base/ef10_tx.c
@@ -31,7 +31,8 @@ efx_mcdi_init_txq(
__in efsys_mem_t *esmp)
{
efx_mcdi_req_t req;
- EFX_MCDI_DECLARE_BUF(payload, MC_CMD_INIT_TXQ_IN_LEN(EFX_TXQ_MAX_BUFS),
+ EFX_MCDI_DECLARE_BUF(payload,
+ MC_CMD_INIT_TXQ_IN_LEN(EF10_TXQ_MAXNBUFS),
MC_CMD_INIT_TXQ_OUT_LEN);
efx_qword_t *dma_addr;
uint64_t addr;
@@ -39,7 +40,7 @@ efx_mcdi_init_txq(
int i;
efx_rc_t rc;
- EFSYS_ASSERT(EFX_TXQ_MAX_BUFS >=
+ EFSYS_ASSERT(EF10_TXQ_MAXNBUFS >=
EFX_TXQ_NBUFS(enp->en_nic_cfg.enc_txq_max_ndescs));
if ((esmp == NULL) || (EFSYS_MEM_SIZE(esmp) < EFX_TXQ_SIZE(ndescs))) {
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index 71500d6b8..d8914aa7c 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -2649,8 +2649,6 @@ efx_tx_fini(
#define EFX_TXQ_NBUFS(_ndescs) (EFX_TXQ_SIZE(_ndescs) / EFX_BUF_SIZE)
#define EFX_TXQ_LIMIT(_ndescs) ((_ndescs) - 16)
-#define EFX_TXQ_MAX_BUFS 8 /* Maximum independent of EFX_BUG35388_WORKAROUND. */
-
#define EFX_TXQ_CKSUM_IPV4 0x0001
#define EFX_TXQ_CKSUM_TCPUDP 0x0002
#define EFX_TXQ_FATSOV2 0x0004
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 17/38] net/sfc/base: make NIC pointer const in NIC config get
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (15 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 16/38] net/sfc/base: make max number of TxQ bufs EF10-specific Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 18/38] net/sfc/base: support different Tx descriptor sizes Andrew Rybchenko
` (21 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Igor Romanov
From: Igor Romanov <igor.romanov@oktetlabs.ru>
The change is needed for the functions that accept const efx_nic_t
pointer and have to get efx_nic_cfg_t.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/efx.h | 2 +-
drivers/net/sfc/base/efx_nic.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index d8914aa7c..8aa03b538 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -1409,7 +1409,7 @@ typedef struct efx_nic_cfg_s {
extern const efx_nic_cfg_t *
efx_nic_cfg_get(
- __in efx_nic_t *enp);
+ __in const efx_nic_t *enp);
/* RxDPCPU firmware id values by which FW variant can be identified */
#define EFX_RXDP_FULL_FEATURED_FW_ID 0x0
diff --git a/drivers/net/sfc/base/efx_nic.c b/drivers/net/sfc/base/efx_nic.c
index 52108a5b8..3ec5cbc07 100644
--- a/drivers/net/sfc/base/efx_nic.c
+++ b/drivers/net/sfc/base/efx_nic.c
@@ -595,7 +595,7 @@ efx_nic_reset(
const efx_nic_cfg_t *
efx_nic_cfg_get(
- __in efx_nic_t *enp)
+ __in const efx_nic_t *enp)
{
EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 18/38] net/sfc/base: support different Tx descriptor sizes
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (16 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 17/38] net/sfc/base: make NIC pointer const in NIC config get Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 19/38] net/sfc/base: support different Rx " Andrew Rybchenko
` (20 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Igor Romanov
From: Igor Romanov <igor.romanov@oktetlabs.ru>
Size of Tx descriptor is different on Riverhead. So, the size
should be a part of NIC config, not a macro that is common for
all NIC families.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/ef10_impl.h | 2 ++
drivers/net/sfc/base/ef10_tx.c | 7 ++++---
drivers/net/sfc/base/efx.h | 21 +++++++++++++++++++++
drivers/net/sfc/base/efx_tx.c | 18 ++++++++++++++++++
drivers/net/sfc/base/hunt_nic.c | 2 ++
drivers/net/sfc/base/medford2_nic.c | 2 ++
drivers/net/sfc/base/medford_nic.c | 2 ++
drivers/net/sfc/base/siena_impl.h | 2 ++
drivers/net/sfc/base/siena_nic.c | 2 ++
9 files changed, 55 insertions(+), 3 deletions(-)
diff --git a/drivers/net/sfc/base/ef10_impl.h b/drivers/net/sfc/base/ef10_impl.h
index 12747f43c..0116bc91c 100644
--- a/drivers/net/sfc/base/ef10_impl.h
+++ b/drivers/net/sfc/base/ef10_impl.h
@@ -19,6 +19,8 @@ extern "C" {
#define EF10_TXQ_MINNDESCS 512
+#define EF10_TXQ_DESC_SIZE (sizeof (efx_qword_t))
+
/* Maximum independent of EFX_BUG35388_WORKAROUND. */
#define EF10_TXQ_MAXNBUFS 8
diff --git a/drivers/net/sfc/base/ef10_tx.c b/drivers/net/sfc/base/ef10_tx.c
index aacf4310a..82be77f13 100644
--- a/drivers/net/sfc/base/ef10_tx.c
+++ b/drivers/net/sfc/base/ef10_tx.c
@@ -41,14 +41,15 @@ efx_mcdi_init_txq(
efx_rc_t rc;
EFSYS_ASSERT(EF10_TXQ_MAXNBUFS >=
- EFX_TXQ_NBUFS(enp->en_nic_cfg.enc_txq_max_ndescs));
+ efx_txq_nbufs(enp, enp->en_nic_cfg.enc_txq_max_ndescs));
- if ((esmp == NULL) || (EFSYS_MEM_SIZE(esmp) < EFX_TXQ_SIZE(ndescs))) {
+ if ((esmp == NULL) ||
+ (EFSYS_MEM_SIZE(esmp) < efx_txq_size(enp, ndescs))) {
rc = EINVAL;
goto fail1;
}
- npages = EFX_TXQ_NBUFS(ndescs);
+ npages = efx_txq_nbufs(enp, ndescs);
if (MC_CMD_INIT_TXQ_IN_LEN(npages) > sizeof (payload)) {
rc = EINVAL;
goto fail2;
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index 8aa03b538..506bdb5e1 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -1284,6 +1284,7 @@ typedef struct efx_nic_cfg_s {
uint32_t enc_evq_timer_quantum_ns;
uint32_t enc_evq_timer_max_us;
uint32_t enc_clk_mult;
+ uint32_t enc_tx_desc_size;
uint32_t enc_rx_prefix_size;
uint32_t enc_rx_buf_align_start;
uint32_t enc_rx_buf_align_end;
@@ -2645,8 +2646,28 @@ efx_tx_fini(
*/
#define EFX_TXQ_MINNDESCS 512
+/*
+ * This macro is deprecated and will be removed.
+ * Use the function efx_txq_size() instead.
+ */
#define EFX_TXQ_SIZE(_ndescs) ((_ndescs) * sizeof (efx_qword_t))
+
+/*
+ * This macro is deprecated and will be removed.
+ * Use the function efx_txq_nbufs() instead.
+ */
#define EFX_TXQ_NBUFS(_ndescs) (EFX_TXQ_SIZE(_ndescs) / EFX_BUF_SIZE)
+
+extern __checkReturn size_t
+efx_txq_size(
+ __in const efx_nic_t *enp,
+ __in unsigned int ndescs);
+
+extern __checkReturn unsigned int
+efx_txq_nbufs(
+ __in const efx_nic_t *enp,
+ __in unsigned int ndescs);
+
#define EFX_TXQ_LIMIT(_ndescs) ((_ndescs) - 16)
#define EFX_TXQ_CKSUM_IPV4 0x0001
diff --git a/drivers/net/sfc/base/efx_tx.c b/drivers/net/sfc/base/efx_tx.c
index b777a85c5..bbe2bd1b7 100644
--- a/drivers/net/sfc/base/efx_tx.c
+++ b/drivers/net/sfc/base/efx_tx.c
@@ -297,6 +297,24 @@ efx_tx_fini(
enp->en_mod_flags &= ~EFX_MOD_TX;
}
+ __checkReturn size_t
+efx_txq_size(
+ __in const efx_nic_t *enp,
+ __in unsigned int ndescs)
+{
+ const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);
+
+ return (ndescs * encp->enc_tx_desc_size);
+}
+
+ __checkReturn unsigned int
+efx_txq_nbufs(
+ __in const efx_nic_t *enp,
+ __in unsigned int ndescs)
+{
+ return (efx_txq_size(enp, ndescs) / EFX_BUF_SIZE);
+}
+
__checkReturn efx_rc_t
efx_tx_qcreate(
__in efx_nic_t *enp,
diff --git a/drivers/net/sfc/base/hunt_nic.c b/drivers/net/sfc/base/hunt_nic.c
index 755a377f0..b4fc3cc9e 100644
--- a/drivers/net/sfc/base/hunt_nic.c
+++ b/drivers/net/sfc/base/hunt_nic.c
@@ -186,6 +186,8 @@ hunt_board_cfg(
/* Checksums for TSO sends can be incorrect on Huntington. */
encp->enc_bug61297_workaround = B_TRUE;
+ encp->enc_tx_desc_size = EF10_TXQ_DESC_SIZE;
+
/* Alignment for receive packet DMA buffers */
encp->enc_rx_buf_align_start = 1;
encp->enc_rx_buf_align_end = 64; /* RX DMA end padding */
diff --git a/drivers/net/sfc/base/medford2_nic.c b/drivers/net/sfc/base/medford2_nic.c
index 3274744d9..9cfc5077c 100644
--- a/drivers/net/sfc/base/medford2_nic.c
+++ b/drivers/net/sfc/base/medford2_nic.c
@@ -101,6 +101,8 @@ medford2_board_cfg(
encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns <<
FRF_CZ_TC_TIMER_VAL_WIDTH) / 1000;
+ encp->enc_tx_desc_size = EF10_TXQ_DESC_SIZE;
+
/* Alignment for receive packet DMA buffers */
encp->enc_rx_buf_align_start = 1;
diff --git a/drivers/net/sfc/base/medford_nic.c b/drivers/net/sfc/base/medford_nic.c
index cb107fe75..3f2c5b877 100644
--- a/drivers/net/sfc/base/medford_nic.c
+++ b/drivers/net/sfc/base/medford_nic.c
@@ -99,6 +99,8 @@ medford_board_cfg(
encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns <<
FRF_CZ_TC_TIMER_VAL_WIDTH) / 1000;
+ encp->enc_tx_desc_size = EF10_TXQ_DESC_SIZE;
+
/* Alignment for receive packet DMA buffers */
encp->enc_rx_buf_align_start = 1;
diff --git a/drivers/net/sfc/base/siena_impl.h b/drivers/net/sfc/base/siena_impl.h
index caab29af0..6f07b1ec7 100644
--- a/drivers/net/sfc/base/siena_impl.h
+++ b/drivers/net/sfc/base/siena_impl.h
@@ -34,6 +34,8 @@ extern "C" {
#define SIENA_RXQ_MAXNDESCS 4096
#define SIENA_RXQ_MINNDESCS 512
+#define SIENA_TXQ_DESC_SIZE (sizeof (efx_qword_t))
+
#define SIENA_NVRAM_CHUNK 0x80
diff --git a/drivers/net/sfc/base/siena_nic.c b/drivers/net/sfc/base/siena_nic.c
index 4962a65c5..987a32d2f 100644
--- a/drivers/net/sfc/base/siena_nic.c
+++ b/drivers/net/sfc/base/siena_nic.c
@@ -104,6 +104,8 @@ siena_board_cfg(
encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns <<
FRF_CZ_TC_TIMER_VAL_WIDTH) / 1000;
+ encp->enc_tx_desc_size = SIENA_TXQ_DESC_SIZE;
+
/* When hash header insertion is enabled, Siena inserts 16 bytes */
encp->enc_rx_prefix_size = 16;
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 19/38] net/sfc/base: support different Rx descriptor sizes
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (17 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 18/38] net/sfc/base: support different Tx descriptor sizes Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 20/38] net/sfc/base: support different event " Andrew Rybchenko
` (19 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Igor Romanov
From: Igor Romanov <igor.romanov@oktetlabs.ru>
For consistency with the size of Tx descriptors, the size of Rx
descriptors should be a part of NIC config, not a macro that is
common for all NIC families.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/ef10_impl.h | 1 +
drivers/net/sfc/base/ef10_rx.c | 5 +++--
drivers/net/sfc/base/efx.h | 21 +++++++++++++++++++++
drivers/net/sfc/base/efx_rx.c | 18 ++++++++++++++++++
drivers/net/sfc/base/hunt_nic.c | 1 +
drivers/net/sfc/base/medford2_nic.c | 1 +
drivers/net/sfc/base/medford_nic.c | 1 +
drivers/net/sfc/base/siena_impl.h | 1 +
drivers/net/sfc/base/siena_nic.c | 1 +
9 files changed, 48 insertions(+), 2 deletions(-)
diff --git a/drivers/net/sfc/base/ef10_impl.h b/drivers/net/sfc/base/ef10_impl.h
index 0116bc91c..11c61d9e6 100644
--- a/drivers/net/sfc/base/ef10_impl.h
+++ b/drivers/net/sfc/base/ef10_impl.h
@@ -19,6 +19,7 @@ extern "C" {
#define EF10_TXQ_MINNDESCS 512
+#define EF10_RXQ_DESC_SIZE (sizeof (efx_qword_t))
#define EF10_TXQ_DESC_SIZE (sizeof (efx_qword_t))
/* Maximum independent of EFX_BUG35388_WORKAROUND. */
diff --git a/drivers/net/sfc/base/ef10_rx.c b/drivers/net/sfc/base/ef10_rx.c
index f2b72571a..23b80d78f 100644
--- a/drivers/net/sfc/base/ef10_rx.c
+++ b/drivers/net/sfc/base/ef10_rx.c
@@ -31,7 +31,7 @@ efx_mcdi_init_rxq(
efx_mcdi_req_t req;
EFX_MCDI_DECLARE_BUF(payload, MC_CMD_INIT_RXQ_V3_IN_LEN,
MC_CMD_INIT_RXQ_V3_OUT_LEN);
- int npages = EFX_RXQ_NBUFS(ndescs);
+ int npages = efx_rxq_nbufs(enp, ndescs);
int i;
efx_qword_t *dma_addr;
uint64_t addr;
@@ -41,7 +41,8 @@ efx_mcdi_init_rxq(
EFSYS_ASSERT3U(ndescs, <=, encp->enc_rxq_max_ndescs);
- if ((esmp == NULL) || (EFSYS_MEM_SIZE(esmp) < EFX_RXQ_SIZE(ndescs))) {
+ if ((esmp == NULL) ||
+ (EFSYS_MEM_SIZE(esmp) < efx_rxq_size(enp, ndescs))) {
rc = EINVAL;
goto fail1;
}
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index 506bdb5e1..101bb4cd2 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -1284,6 +1284,7 @@ typedef struct efx_nic_cfg_s {
uint32_t enc_evq_timer_quantum_ns;
uint32_t enc_evq_timer_max_us;
uint32_t enc_clk_mult;
+ uint32_t enc_rx_desc_size;
uint32_t enc_tx_desc_size;
uint32_t enc_rx_prefix_size;
uint32_t enc_rx_buf_align_start;
@@ -2478,8 +2479,28 @@ efx_pseudo_hdr_pkt_length_get(
#define EFX_RXQ_MAXNDESCS 4096
#define EFX_RXQ_MINNDESCS 512
+/*
+ * This macro is deprecated and will be removed.
+ * Use the function efx_rxq_size() instead.
+ */
#define EFX_RXQ_SIZE(_ndescs) ((_ndescs) * sizeof (efx_qword_t))
+
+/*
+ * This macro is deprecated and will be removed.
+ * Use the function efx_rxq_nbufs() instead.
+ */
#define EFX_RXQ_NBUFS(_ndescs) (EFX_RXQ_SIZE(_ndescs) / EFX_BUF_SIZE)
+
+extern __checkReturn size_t
+efx_rxq_size(
+ __in const efx_nic_t *enp,
+ __in unsigned int ndescs);
+
+extern __checkReturn unsigned int
+efx_rxq_nbufs(
+ __in const efx_nic_t *enp,
+ __in unsigned int ndescs);
+
#define EFX_RXQ_LIMIT(_ndescs) ((_ndescs) - 16)
typedef enum efx_rxq_type_e {
diff --git a/drivers/net/sfc/base/efx_rx.c b/drivers/net/sfc/base/efx_rx.c
index 8910cd5f7..c0d738128 100644
--- a/drivers/net/sfc/base/efx_rx.c
+++ b/drivers/net/sfc/base/efx_rx.c
@@ -766,6 +766,24 @@ efx_rx_qflush(
return (rc);
}
+ __checkReturn size_t
+efx_rxq_size(
+ __in const efx_nic_t *enp,
+ __in unsigned int ndescs)
+{
+ const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);
+
+ return (ndescs * encp->enc_rx_desc_size);
+}
+
+ __checkReturn unsigned int
+efx_rxq_nbufs(
+ __in const efx_nic_t *enp,
+ __in unsigned int ndescs)
+{
+ return (efx_rxq_size(enp, ndescs) / EFX_BUF_SIZE);
+}
+
void
efx_rx_qenable(
__in efx_rxq_t *erp)
diff --git a/drivers/net/sfc/base/hunt_nic.c b/drivers/net/sfc/base/hunt_nic.c
index b4fc3cc9e..2fb54d85a 100644
--- a/drivers/net/sfc/base/hunt_nic.c
+++ b/drivers/net/sfc/base/hunt_nic.c
@@ -186,6 +186,7 @@ hunt_board_cfg(
/* Checksums for TSO sends can be incorrect on Huntington. */
encp->enc_bug61297_workaround = B_TRUE;
+ encp->enc_rx_desc_size = EF10_RXQ_DESC_SIZE;
encp->enc_tx_desc_size = EF10_TXQ_DESC_SIZE;
/* Alignment for receive packet DMA buffers */
diff --git a/drivers/net/sfc/base/medford2_nic.c b/drivers/net/sfc/base/medford2_nic.c
index 9cfc5077c..7d0c80047 100644
--- a/drivers/net/sfc/base/medford2_nic.c
+++ b/drivers/net/sfc/base/medford2_nic.c
@@ -101,6 +101,7 @@ medford2_board_cfg(
encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns <<
FRF_CZ_TC_TIMER_VAL_WIDTH) / 1000;
+ encp->enc_rx_desc_size = EF10_RXQ_DESC_SIZE;
encp->enc_tx_desc_size = EF10_TXQ_DESC_SIZE;
/* Alignment for receive packet DMA buffers */
diff --git a/drivers/net/sfc/base/medford_nic.c b/drivers/net/sfc/base/medford_nic.c
index 3f2c5b877..fd711a96f 100644
--- a/drivers/net/sfc/base/medford_nic.c
+++ b/drivers/net/sfc/base/medford_nic.c
@@ -99,6 +99,7 @@ medford_board_cfg(
encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns <<
FRF_CZ_TC_TIMER_VAL_WIDTH) / 1000;
+ encp->enc_rx_desc_size = EF10_RXQ_DESC_SIZE;
encp->enc_tx_desc_size = EF10_TXQ_DESC_SIZE;
/* Alignment for receive packet DMA buffers */
diff --git a/drivers/net/sfc/base/siena_impl.h b/drivers/net/sfc/base/siena_impl.h
index 6f07b1ec7..068960025 100644
--- a/drivers/net/sfc/base/siena_impl.h
+++ b/drivers/net/sfc/base/siena_impl.h
@@ -34,6 +34,7 @@ extern "C" {
#define SIENA_RXQ_MAXNDESCS 4096
#define SIENA_RXQ_MINNDESCS 512
+#define SIENA_RXQ_DESC_SIZE (sizeof (efx_qword_t))
#define SIENA_TXQ_DESC_SIZE (sizeof (efx_qword_t))
#define SIENA_NVRAM_CHUNK 0x80
diff --git a/drivers/net/sfc/base/siena_nic.c b/drivers/net/sfc/base/siena_nic.c
index 987a32d2f..894cf8144 100644
--- a/drivers/net/sfc/base/siena_nic.c
+++ b/drivers/net/sfc/base/siena_nic.c
@@ -104,6 +104,7 @@ siena_board_cfg(
encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns <<
FRF_CZ_TC_TIMER_VAL_WIDTH) / 1000;
+ encp->enc_rx_desc_size = SIENA_RXQ_DESC_SIZE;
encp->enc_tx_desc_size = SIENA_TXQ_DESC_SIZE;
/* When hash header insertion is enabled, Siena inserts 16 bytes */
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 20/38] net/sfc/base: support different event descriptor sizes
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (18 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 19/38] net/sfc/base: support different Rx " Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 21/38] net/sfc/base: round number of queue buffers up Andrew Rybchenko
` (18 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Igor Romanov
From: Igor Romanov <igor.romanov@oktetlabs.ru>
For consistency with the size of Tx descriptors, the size of event
descriptors should be a part of NIC config, not a macro that is
common for all NIC families. Also, add a max number of EvQ buffers
define which is needed to initialize an MCDI buffer at compile time.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/ef10_ev.c | 12 ++++++------
drivers/net/sfc/base/ef10_impl.h | 20 ++++++++++++++++++++
drivers/net/sfc/base/efx.h | 20 ++++++++++++++++++++
drivers/net/sfc/base/efx_ev.c | 18 ++++++++++++++++++
drivers/net/sfc/base/hunt_impl.h | 2 ++
drivers/net/sfc/base/hunt_nic.c | 1 +
drivers/net/sfc/base/medford2_impl.h | 2 ++
drivers/net/sfc/base/medford2_nic.c | 1 +
drivers/net/sfc/base/medford_impl.h | 2 ++
drivers/net/sfc/base/medford_nic.c | 1 +
drivers/net/sfc/base/siena_impl.h | 1 +
drivers/net/sfc/base/siena_nic.c | 1 +
12 files changed, 75 insertions(+), 6 deletions(-)
diff --git a/drivers/net/sfc/base/ef10_ev.c b/drivers/net/sfc/base/ef10_ev.c
index 4f711992e..b80cb0a35 100644
--- a/drivers/net/sfc/base/ef10_ev.c
+++ b/drivers/net/sfc/base/ef10_ev.c
@@ -123,7 +123,7 @@ efx_mcdi_init_evq(
{
efx_mcdi_req_t req;
EFX_MCDI_DECLARE_BUF(payload,
- MC_CMD_INIT_EVQ_IN_LEN(EFX_EVQ_NBUFS(EF10_EVQ_MAXNEVS)),
+ MC_CMD_INIT_EVQ_IN_LEN(EF10_EVQ_MAXNBUFS),
MC_CMD_INIT_EVQ_OUT_LEN);
efx_qword_t *dma_addr;
uint64_t addr;
@@ -133,8 +133,8 @@ efx_mcdi_init_evq(
int ev_cut_through;
efx_rc_t rc;
- npages = EFX_EVQ_NBUFS(nevs);
- if (MC_CMD_INIT_EVQ_IN_LEN(npages) > MC_CMD_INIT_EVQ_IN_LENMAX) {
+ npages = efx_evq_nbufs(enp, nevs);
+ if (npages > EF10_EVQ_MAXNBUFS) {
rc = EINVAL;
goto fail1;
}
@@ -259,7 +259,7 @@ efx_mcdi_init_evq_v2(
{
efx_mcdi_req_t req;
EFX_MCDI_DECLARE_BUF(payload,
- MC_CMD_INIT_EVQ_V2_IN_LEN(EFX_EVQ_NBUFS(EF10_EVQ_MAXNEVS)),
+ MC_CMD_INIT_EVQ_V2_IN_LEN(EF10_EVQ_MAXNBUFS),
MC_CMD_INIT_EVQ_V2_OUT_LEN);
boolean_t interrupting;
unsigned int evq_type;
@@ -269,8 +269,8 @@ efx_mcdi_init_evq_v2(
int i;
efx_rc_t rc;
- npages = EFX_EVQ_NBUFS(nevs);
- if (MC_CMD_INIT_EVQ_V2_IN_LEN(npages) > MC_CMD_INIT_EVQ_V2_IN_LENMAX) {
+ npages = efx_evq_nbufs(enp, nevs);
+ if (npages > EF10_EVQ_MAXNBUFS) {
rc = EINVAL;
goto fail1;
}
diff --git a/drivers/net/sfc/base/ef10_impl.h b/drivers/net/sfc/base/ef10_impl.h
index 11c61d9e6..fae94fe83 100644
--- a/drivers/net/sfc/base/ef10_impl.h
+++ b/drivers/net/sfc/base/ef10_impl.h
@@ -19,12 +19,32 @@ extern "C" {
#define EF10_TXQ_MINNDESCS 512
+#define EF10_EVQ_DESC_SIZE (sizeof (efx_qword_t))
#define EF10_RXQ_DESC_SIZE (sizeof (efx_qword_t))
#define EF10_TXQ_DESC_SIZE (sizeof (efx_qword_t))
+/* Number of hardware EVQ buffers (for compile-time resource dimensions) */
+#define EF10_EVQ_MAXNBUFS (64)
+
/* Maximum independent of EFX_BUG35388_WORKAROUND. */
#define EF10_TXQ_MAXNBUFS 8
+#if EFSYS_OPT_HUNTINGTON
+# if (EF10_EVQ_MAXNBUFS < HUNT_EVQ_MAXNBUFS)
+# error "EF10_EVQ_MAXNBUFS too small"
+# endif
+#endif /* EFSYS_OPT_HUNTINGTON */
+#if EFSYS_OPT_MEDFORD
+# if (EF10_EVQ_MAXNBUFS < MEDFORD_EVQ_MAXNBUFS)
+# error "EF10_EVQ_MAXNBUFS too small"
+# endif
+#endif /* EFSYS_OPT_MEDFORD */
+#if EFSYS_OPT_MEDFORD2
+# if (EF10_EVQ_MAXNBUFS < MEDFORD2_EVQ_MAXNBUFS)
+# error "EF10_EVQ_MAXNBUFS too small"
+# endif
+#endif /* EFSYS_OPT_MEDFORD2 */
+
/* Number of hardware PIO buffers (for compile-time resource dimensions) */
#define EF10_MAX_PIOBUF_NBUFS (16)
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index 101bb4cd2..43de0a8a6 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -1284,6 +1284,7 @@ typedef struct efx_nic_cfg_s {
uint32_t enc_evq_timer_quantum_ns;
uint32_t enc_evq_timer_max_us;
uint32_t enc_clk_mult;
+ uint32_t enc_ev_desc_size;
uint32_t enc_rx_desc_size;
uint32_t enc_tx_desc_size;
uint32_t enc_rx_prefix_size;
@@ -1987,9 +1988,28 @@ efx_ev_fini(
#define EFX_EVQ_MAXNEVS 32768
#define EFX_EVQ_MINNEVS 512
+/*
+ * This macro is deprecated and will be removed.
+ * Use the function efx_evq_size() instead.
+ */
#define EFX_EVQ_SIZE(_nevs) ((_nevs) * sizeof (efx_qword_t))
+
+/*
+ * This macro is deprecated and will be removed.
+ * Use the function efx_evq_nbufs() instead.
+ */
#define EFX_EVQ_NBUFS(_nevs) (EFX_EVQ_SIZE(_nevs) / EFX_BUF_SIZE)
+extern __checkReturn size_t
+efx_evq_size(
+ __in const efx_nic_t *enp,
+ __in unsigned int ndescs);
+
+extern __checkReturn unsigned int
+efx_evq_nbufs(
+ __in const efx_nic_t *enp,
+ __in unsigned int ndescs);
+
#define EFX_EVQ_FLAGS_TYPE_MASK (0x3)
#define EFX_EVQ_FLAGS_TYPE_AUTO (0x0)
#define EFX_EVQ_FLAGS_TYPE_THROUGHPUT (0x1)
diff --git a/drivers/net/sfc/base/efx_ev.c b/drivers/net/sfc/base/efx_ev.c
index 51c422c2d..21f4c226c 100644
--- a/drivers/net/sfc/base/efx_ev.c
+++ b/drivers/net/sfc/base/efx_ev.c
@@ -173,6 +173,24 @@ efx_ev_init(
return (rc);
}
+ __checkReturn size_t
+efx_evq_size(
+ __in const efx_nic_t *enp,
+ __in unsigned int ndescs)
+{
+ const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);
+
+ return (ndescs * encp->enc_ev_desc_size);
+}
+
+ __checkReturn unsigned int
+efx_evq_nbufs(
+ __in const efx_nic_t *enp,
+ __in unsigned int ndescs)
+{
+ return (efx_evq_size(enp, ndescs) / EFX_BUF_SIZE);
+}
+
void
efx_ev_fini(
__in efx_nic_t *enp)
diff --git a/drivers/net/sfc/base/hunt_impl.h b/drivers/net/sfc/base/hunt_impl.h
index 0e9a1e280..a76602d52 100644
--- a/drivers/net/sfc/base/hunt_impl.h
+++ b/drivers/net/sfc/base/hunt_impl.h
@@ -19,6 +19,8 @@ extern "C" {
#define HUNT_TXQ_MAXNDESCS 4096
#define HUNT_TXQ_MAXNDESCS_BUG35388_WORKAROUND 2048
+#define HUNT_EVQ_MAXNBUFS (64)
+
/* Missing register definitions */
#ifndef ER_DZ_TX_PIOBUF_OFST
#define ER_DZ_TX_PIOBUF_OFST 0x00001000
diff --git a/drivers/net/sfc/base/hunt_nic.c b/drivers/net/sfc/base/hunt_nic.c
index 2fb54d85a..054d4f432 100644
--- a/drivers/net/sfc/base/hunt_nic.c
+++ b/drivers/net/sfc/base/hunt_nic.c
@@ -186,6 +186,7 @@ hunt_board_cfg(
/* Checksums for TSO sends can be incorrect on Huntington. */
encp->enc_bug61297_workaround = B_TRUE;
+ encp->enc_ev_desc_size = EF10_EVQ_DESC_SIZE;
encp->enc_rx_desc_size = EF10_RXQ_DESC_SIZE;
encp->enc_tx_desc_size = EF10_TXQ_DESC_SIZE;
diff --git a/drivers/net/sfc/base/medford2_impl.h b/drivers/net/sfc/base/medford2_impl.h
index 87af5f686..86f374e74 100644
--- a/drivers/net/sfc/base/medford2_impl.h
+++ b/drivers/net/sfc/base/medford2_impl.h
@@ -14,6 +14,8 @@ extern "C" {
#define MEDFORD2_TXQ_MAXNDESCS 2048
+#define MEDFORD2_EVQ_MAXNBUFS (64)
+
#ifndef ER_EZ_TX_PIOBUF_SIZE
#define ER_EZ_TX_PIOBUF_SIZE 4096
#endif
diff --git a/drivers/net/sfc/base/medford2_nic.c b/drivers/net/sfc/base/medford2_nic.c
index 7d0c80047..16621d190 100644
--- a/drivers/net/sfc/base/medford2_nic.c
+++ b/drivers/net/sfc/base/medford2_nic.c
@@ -101,6 +101,7 @@ medford2_board_cfg(
encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns <<
FRF_CZ_TC_TIMER_VAL_WIDTH) / 1000;
+ encp->enc_ev_desc_size = EF10_EVQ_DESC_SIZE;
encp->enc_rx_desc_size = EF10_RXQ_DESC_SIZE;
encp->enc_tx_desc_size = EF10_TXQ_DESC_SIZE;
diff --git a/drivers/net/sfc/base/medford_impl.h b/drivers/net/sfc/base/medford_impl.h
index 1afedc7f3..b0be35a72 100644
--- a/drivers/net/sfc/base/medford_impl.h
+++ b/drivers/net/sfc/base/medford_impl.h
@@ -14,6 +14,8 @@ extern "C" {
#define MEDFORD_TXQ_MAXNDESCS 2048
+#define MEDFORD_EVQ_MAXNBUFS (64)
+
#ifndef ER_EZ_TX_PIOBUF_SIZE
#define ER_EZ_TX_PIOBUF_SIZE 4096
#endif
diff --git a/drivers/net/sfc/base/medford_nic.c b/drivers/net/sfc/base/medford_nic.c
index fd711a96f..01a346267 100644
--- a/drivers/net/sfc/base/medford_nic.c
+++ b/drivers/net/sfc/base/medford_nic.c
@@ -99,6 +99,7 @@ medford_board_cfg(
encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns <<
FRF_CZ_TC_TIMER_VAL_WIDTH) / 1000;
+ encp->enc_ev_desc_size = EF10_EVQ_DESC_SIZE;
encp->enc_rx_desc_size = EF10_RXQ_DESC_SIZE;
encp->enc_tx_desc_size = EF10_TXQ_DESC_SIZE;
diff --git a/drivers/net/sfc/base/siena_impl.h b/drivers/net/sfc/base/siena_impl.h
index 068960025..4af9845fe 100644
--- a/drivers/net/sfc/base/siena_impl.h
+++ b/drivers/net/sfc/base/siena_impl.h
@@ -34,6 +34,7 @@ extern "C" {
#define SIENA_RXQ_MAXNDESCS 4096
#define SIENA_RXQ_MINNDESCS 512
+#define SIENA_EVQ_DESC_SIZE (sizeof (efx_qword_t))
#define SIENA_RXQ_DESC_SIZE (sizeof (efx_qword_t))
#define SIENA_TXQ_DESC_SIZE (sizeof (efx_qword_t))
diff --git a/drivers/net/sfc/base/siena_nic.c b/drivers/net/sfc/base/siena_nic.c
index 894cf8144..7ba595b75 100644
--- a/drivers/net/sfc/base/siena_nic.c
+++ b/drivers/net/sfc/base/siena_nic.c
@@ -104,6 +104,7 @@ siena_board_cfg(
encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns <<
FRF_CZ_TC_TIMER_VAL_WIDTH) / 1000;
+ encp->enc_ev_desc_size = SIENA_EVQ_DESC_SIZE;
encp->enc_rx_desc_size = SIENA_RXQ_DESC_SIZE;
encp->enc_tx_desc_size = SIENA_TXQ_DESC_SIZE;
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 21/38] net/sfc/base: round number of queue buffers up
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (19 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 20/38] net/sfc/base: support different event " Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 22/38] net/sfc: use NIC Tx descritor size instead of common Andrew Rybchenko
` (17 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Igor Romanov
From: Igor Romanov <igor.romanov@oktetlabs.ru>
Functions efx_*q_nbufs return the number of a queue buffers by dividing
the queue size by page size. If minimum size of a queue is smaller than
one page, we still need the page and number of buffers should not be 0.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/efx_ev.c | 2 +-
drivers/net/sfc/base/efx_rx.c | 2 +-
drivers/net/sfc/base/efx_tx.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/net/sfc/base/efx_ev.c b/drivers/net/sfc/base/efx_ev.c
index 21f4c226c..b98623995 100644
--- a/drivers/net/sfc/base/efx_ev.c
+++ b/drivers/net/sfc/base/efx_ev.c
@@ -188,7 +188,7 @@ efx_evq_nbufs(
__in const efx_nic_t *enp,
__in unsigned int ndescs)
{
- return (efx_evq_size(enp, ndescs) / EFX_BUF_SIZE);
+ return (EFX_DIV_ROUND_UP(efx_evq_size(enp, ndescs), EFX_BUF_SIZE));
}
void
diff --git a/drivers/net/sfc/base/efx_rx.c b/drivers/net/sfc/base/efx_rx.c
index c0d738128..8a12ef705 100644
--- a/drivers/net/sfc/base/efx_rx.c
+++ b/drivers/net/sfc/base/efx_rx.c
@@ -781,7 +781,7 @@ efx_rxq_nbufs(
__in const efx_nic_t *enp,
__in unsigned int ndescs)
{
- return (efx_rxq_size(enp, ndescs) / EFX_BUF_SIZE);
+ return (EFX_DIV_ROUND_UP(efx_rxq_size(enp, ndescs), EFX_BUF_SIZE));
}
void
diff --git a/drivers/net/sfc/base/efx_tx.c b/drivers/net/sfc/base/efx_tx.c
index bbe2bd1b7..5cf3dcd3a 100644
--- a/drivers/net/sfc/base/efx_tx.c
+++ b/drivers/net/sfc/base/efx_tx.c
@@ -312,7 +312,7 @@ efx_txq_nbufs(
__in const efx_nic_t *enp,
__in unsigned int ndescs)
{
- return (efx_txq_size(enp, ndescs) / EFX_BUF_SIZE);
+ return (EFX_DIV_ROUND_UP(efx_txq_size(enp, ndescs), EFX_BUF_SIZE));
}
__checkReturn efx_rc_t
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 22/38] net/sfc: use NIC Tx descritor size instead of common
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (20 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 21/38] net/sfc/base: round number of queue buffers up Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 23/38] net/sfc: use NIC Rx " Andrew Rybchenko
` (16 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Igor Romanov
From: Igor Romanov <igor.romanov@oktetlabs.ru>
Use of the macro for calculating a Tx queue size is deprecated. Replace
it with a call to a function that uses descriptor size specified for
every NIC.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/sfc_tx.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/sfc/sfc_tx.c b/drivers/net/sfc/sfc_tx.c
index aa0538fe8..c3e0936cc 100644
--- a/drivers/net/sfc/sfc_tx.c
+++ b/drivers/net/sfc/sfc_tx.c
@@ -173,7 +173,8 @@ sfc_tx_qinit(struct sfc_adapter *sa, unsigned int sw_index,
SFC_TX_DEFAULT_FREE_THRESH;
txq_info->offloads = offloads;
- rc = sfc_dma_alloc(sa, "txq", sw_index, EFX_TXQ_SIZE(txq_info->entries),
+ rc = sfc_dma_alloc(sa, "txq", sw_index,
+ efx_txq_size(sa->nic, txq_info->entries),
socket_id, &txq->mem);
if (rc != 0)
goto fail_dma_alloc;
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 23/38] net/sfc: use NIC Rx descritor size instead of common
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (21 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 22/38] net/sfc: use NIC Tx descritor size instead of common Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 24/38] net/sfc: use NIC event " Andrew Rybchenko
` (15 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Igor Romanov
From: Igor Romanov <igor.romanov@oktetlabs.ru>
Use of the macro for calculating a Rx queue size is deprecated. Replace
it with a call to a function that uses descriptor size specified for
every NIC.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/sfc_rx.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/sfc/sfc_rx.c b/drivers/net/sfc/sfc_rx.c
index faa9758af..20910d212 100644
--- a/drivers/net/sfc/sfc_rx.c
+++ b/drivers/net/sfc/sfc_rx.c
@@ -1047,7 +1047,8 @@ sfc_rx_qinit(struct sfc_adapter *sa, unsigned int sw_index,
rxq_info->refill_mb_pool = mb_pool;
rxq->buf_size = buf_size;
- rc = sfc_dma_alloc(sa, "rxq", sw_index, EFX_RXQ_SIZE(rxq_info->entries),
+ rc = sfc_dma_alloc(sa, "rxq", sw_index,
+ efx_rxq_size(sa->nic, rxq_info->entries),
socket_id, &rxq->mem);
if (rc != 0)
goto fail_dma_alloc;
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 24/38] net/sfc: use NIC event descritor size instead of common
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (22 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 23/38] net/sfc: use NIC Rx " Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 25/38] net/sfc/base: remove deprecated min/max desc defines Andrew Rybchenko
` (14 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Igor Romanov
From: Igor Romanov <igor.romanov@oktetlabs.ru>
Use of the macro for calculating a Rx queue size is deprecated. Replace
it with a call to a function that uses descriptor size specified for
every NIC.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/sfc_ev.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/net/sfc/sfc_ev.c b/drivers/net/sfc/sfc_ev.c
index 939766dc2..59928332a 100644
--- a/drivers/net/sfc/sfc_ev.c
+++ b/drivers/net/sfc/sfc_ev.c
@@ -599,7 +599,8 @@ sfc_ev_qstart(struct sfc_evq *evq, unsigned int hw_index)
evq->evq_index = hw_index;
/* Clear all events */
- (void)memset((void *)esmp->esm_base, 0xff, EFX_EVQ_SIZE(evq->entries));
+ (void)memset((void *)esmp->esm_base, 0xff,
+ efx_evq_size(sa->nic, evq->entries));
if (sa->intr.lsc_intr && hw_index == sa->mgmt_evq_index)
evq_flags |= EFX_EVQ_FLAGS_NOTIFY_INTERRUPT;
@@ -823,7 +824,8 @@ sfc_ev_qinit(struct sfc_adapter *sa,
/* Allocate DMA space */
rc = sfc_dma_alloc(sa, sfc_evq_type2str(type), type_index,
- EFX_EVQ_SIZE(evq->entries), socket_id, &evq->mem);
+ efx_evq_size(sa->nic, evq->entries), socket_id,
+ &evq->mem);
if (rc != 0)
goto fail_dma_alloc;
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 25/38] net/sfc/base: remove deprecated min/max desc defines
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (23 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 24/38] net/sfc: use NIC event " Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 26/38] net/sfc/base: remove deprecated macros that get queue sizes Andrew Rybchenko
` (13 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Igor Romanov
From: Igor Romanov <igor.romanov@oktetlabs.ru>
Symbols for maximum and minimum number of Tx, Rx and event descriptors
are deprecated. They are not used anymore, so they can be deleted.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/efx.h | 20 --------------------
1 file changed, 20 deletions(-)
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index 43de0a8a6..cda8d1d90 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -1981,13 +1981,6 @@ extern void
efx_ev_fini(
__in efx_nic_t *enp);
-/*
- * These symbols are deprecated and will be removed.
- * Use the fields from efx_nic_cfg_t instead.
- */
-#define EFX_EVQ_MAXNEVS 32768
-#define EFX_EVQ_MINNEVS 512
-
/*
* This macro is deprecated and will be removed.
* Use the function efx_evq_size() instead.
@@ -2492,13 +2485,6 @@ efx_pseudo_hdr_pkt_length_get(
__in uint8_t *buffer,
__out uint16_t *pkt_lengthp);
-/*
- * These symbols are deprecated and will be removed.
- * Use the fields from efx_nic_cfg_t instead.
- */
-#define EFX_RXQ_MAXNDESCS 4096
-#define EFX_RXQ_MINNDESCS 512
-
/*
* This macro is deprecated and will be removed.
* Use the function efx_rxq_size() instead.
@@ -2681,12 +2667,6 @@ extern void
efx_tx_fini(
__in efx_nic_t *enp);
-/*
- * This symbol is deprecated and will be removed.
- * Use the field from efx_nic_cfg_t instead.
- */
-#define EFX_TXQ_MINNDESCS 512
-
/*
* This macro is deprecated and will be removed.
* Use the function efx_txq_size() instead.
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 26/38] net/sfc/base: remove deprecated macros that get queue sizes
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (24 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 25/38] net/sfc/base: remove deprecated min/max desc defines Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 27/38] net/sfc/base: update auto-generated MCDI definition headers Andrew Rybchenko
` (12 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Igor Romanov
From: Igor Romanov <igor.romanov@oktetlabs.ru>
The macros are depricated and are not used anymore, so they can
be deleted.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/efx.h | 36 ------------------------------------
1 file changed, 36 deletions(-)
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index cda8d1d90..f7d0a4f67 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -1981,18 +1981,6 @@ extern void
efx_ev_fini(
__in efx_nic_t *enp);
-/*
- * This macro is deprecated and will be removed.
- * Use the function efx_evq_size() instead.
- */
-#define EFX_EVQ_SIZE(_nevs) ((_nevs) * sizeof (efx_qword_t))
-
-/*
- * This macro is deprecated and will be removed.
- * Use the function efx_evq_nbufs() instead.
- */
-#define EFX_EVQ_NBUFS(_nevs) (EFX_EVQ_SIZE(_nevs) / EFX_BUF_SIZE)
-
extern __checkReturn size_t
efx_evq_size(
__in const efx_nic_t *enp,
@@ -2485,18 +2473,6 @@ efx_pseudo_hdr_pkt_length_get(
__in uint8_t *buffer,
__out uint16_t *pkt_lengthp);
-/*
- * This macro is deprecated and will be removed.
- * Use the function efx_rxq_size() instead.
- */
-#define EFX_RXQ_SIZE(_ndescs) ((_ndescs) * sizeof (efx_qword_t))
-
-/*
- * This macro is deprecated and will be removed.
- * Use the function efx_rxq_nbufs() instead.
- */
-#define EFX_RXQ_NBUFS(_ndescs) (EFX_RXQ_SIZE(_ndescs) / EFX_BUF_SIZE)
-
extern __checkReturn size_t
efx_rxq_size(
__in const efx_nic_t *enp,
@@ -2667,18 +2643,6 @@ extern void
efx_tx_fini(
__in efx_nic_t *enp);
-/*
- * This macro is deprecated and will be removed.
- * Use the function efx_txq_size() instead.
- */
-#define EFX_TXQ_SIZE(_ndescs) ((_ndescs) * sizeof (efx_qword_t))
-
-/*
- * This macro is deprecated and will be removed.
- * Use the function efx_txq_nbufs() instead.
- */
-#define EFX_TXQ_NBUFS(_ndescs) (EFX_TXQ_SIZE(_ndescs) / EFX_BUF_SIZE)
-
extern __checkReturn size_t
efx_txq_size(
__in const efx_nic_t *enp,
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 27/38] net/sfc/base: update auto-generated MCDI definition headers
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (25 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 26/38] net/sfc/base: remove deprecated macros that get queue sizes Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 28/38] net/sfc/base: add support for the Rx event mode w/o continue Andrew Rybchenko
` (11 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/ef10_tlv_layout.h | 17 +
drivers/net/sfc/base/efx_regs_mcdi.h | 1262 +++++++++++++++++++---
drivers/net/sfc/base/efx_regs_mcdi_aoe.h | 54 +-
3 files changed, 1189 insertions(+), 144 deletions(-)
diff --git a/drivers/net/sfc/base/ef10_tlv_layout.h b/drivers/net/sfc/base/ef10_tlv_layout.h
index 56cffaee3..eaf24c569 100644
--- a/drivers/net/sfc/base/ef10_tlv_layout.h
+++ b/drivers/net/sfc/base/ef10_tlv_layout.h
@@ -1008,4 +1008,21 @@ struct tlv_l3xudp_ports {
#define TLV_TAG_L3XUDP_PORTS_MAX_NUM_PORTS 16
};
+/* Wake on LAN setting
+ *
+ * Enables the Wake On Lan (WoL) functionality on the given port. This will be
+ * a persistent setting for manageability firmware. Drivers have direct access
+ * to WoL using MCDI.
+ */
+#define TLV_TAG_WAKE_ON_LAN(port) (0x102b0000 + (port))
+struct tlv_wake_on_lan {
+ uint32_t tag;
+ uint32_t length;
+ uint8_t mode;
+ uint8_t bytes[];
+#define TLV_WAKE_ON_LAN_MODE_DISABLED 0
+#define TLV_WAKE_ON_LAN_MODE_MAGIC_PACKET 1
+#define TLV_WAKE_ON_LAN_MAX_NUM_BYTES 255
+};
+
#endif /* CI_MGMT_TLV_LAYOUT_H */
diff --git a/drivers/net/sfc/base/efx_regs_mcdi.h b/drivers/net/sfc/base/efx_regs_mcdi.h
index cf8a7936e..bc44602ed 100644
--- a/drivers/net/sfc/base/efx_regs_mcdi.h
+++ b/drivers/net/sfc/base/efx_regs_mcdi.h
@@ -4,7 +4,11 @@
* All rights reserved.
*/
-/*! \cidoxg_firmware_mc_cmd */
+/*
+ * This file is automatically generated. DO NOT EDIT IT.
+ * To make changes, edit the .yml files in sfregistry under doc/mcdi/ and
+ * rebuild this file with "make -C doc mcdiheaders".
+ */
#ifndef _SIENA_MC_DRIVER_PCOL_H
#define _SIENA_MC_DRIVER_PCOL_H
@@ -174,138 +178,9 @@
#define FSE_AZ_EV_CODE_MCDI_EVRESPONSE 0xc
-/* Operation not permitted. */
-#define MC_CMD_ERR_EPERM 1
-/* Non-existent command target */
-#define MC_CMD_ERR_ENOENT 2
-/* assert() has killed the MC */
-#define MC_CMD_ERR_EINTR 4
-/* I/O failure */
-#define MC_CMD_ERR_EIO 5
-/* Already exists */
-#define MC_CMD_ERR_EEXIST 6
-/* Try again */
-#define MC_CMD_ERR_EAGAIN 11
-/* Out of memory */
-#define MC_CMD_ERR_ENOMEM 12
-/* Caller does not hold required locks */
-#define MC_CMD_ERR_EACCES 13
-/* Resource is currently unavailable (e.g. lock contention) */
-#define MC_CMD_ERR_EBUSY 16
-/* No such device */
-#define MC_CMD_ERR_ENODEV 19
-/* Invalid argument to target */
-#define MC_CMD_ERR_EINVAL 22
-/* Broken pipe */
-#define MC_CMD_ERR_EPIPE 32
-/* Read-only */
-#define MC_CMD_ERR_EROFS 30
-/* Out of range */
-#define MC_CMD_ERR_ERANGE 34
-/* Non-recursive resource is already acquired */
-#define MC_CMD_ERR_EDEADLK 35
-/* Operation not implemented */
-#define MC_CMD_ERR_ENOSYS 38
-/* Operation timed out */
-#define MC_CMD_ERR_ETIME 62
-/* Link has been severed */
-#define MC_CMD_ERR_ENOLINK 67
-/* Protocol error */
-#define MC_CMD_ERR_EPROTO 71
-/* Operation not supported */
-#define MC_CMD_ERR_ENOTSUP 95
-/* Address not available */
-#define MC_CMD_ERR_EADDRNOTAVAIL 99
-/* Not connected */
-#define MC_CMD_ERR_ENOTCONN 107
-/* Operation already in progress */
-#define MC_CMD_ERR_EALREADY 114
-
-/* Resource allocation failed. */
-#define MC_CMD_ERR_ALLOC_FAIL 0x1000
-/* V-adaptor not found. */
-#define MC_CMD_ERR_NO_VADAPTOR 0x1001
-/* EVB port not found. */
-#define MC_CMD_ERR_NO_EVB_PORT 0x1002
-/* V-switch not found. */
-#define MC_CMD_ERR_NO_VSWITCH 0x1003
-/* Too many VLAN tags. */
-#define MC_CMD_ERR_VLAN_LIMIT 0x1004
-/* Bad PCI function number. */
-#define MC_CMD_ERR_BAD_PCI_FUNC 0x1005
-/* Invalid VLAN mode. */
-#define MC_CMD_ERR_BAD_VLAN_MODE 0x1006
-/* Invalid v-switch type. */
-#define MC_CMD_ERR_BAD_VSWITCH_TYPE 0x1007
-/* Invalid v-port type. */
-#define MC_CMD_ERR_BAD_VPORT_TYPE 0x1008
-/* MAC address exists. */
-#define MC_CMD_ERR_MAC_EXIST 0x1009
-/* Slave core not present */
-#define MC_CMD_ERR_SLAVE_NOT_PRESENT 0x100a
-/* The datapath is disabled. */
-#define MC_CMD_ERR_DATAPATH_DISABLED 0x100b
-/* The requesting client is not a function */
-#define MC_CMD_ERR_CLIENT_NOT_FN 0x100c
-/* The requested operation might require the
- command to be passed between MCs, and the
- transport doesn't support that. Should
- only ever been seen over the UART. */
-#define MC_CMD_ERR_TRANSPORT_NOPROXY 0x100d
-/* VLAN tag(s) exists */
-#define MC_CMD_ERR_VLAN_EXIST 0x100e
-/* No MAC address assigned to an EVB port */
-#define MC_CMD_ERR_NO_MAC_ADDR 0x100f
-/* Notifies the driver that the request has been relayed
- * to an admin function for authorization. The driver should
- * wait for a PROXY_RESPONSE event and then resend its request.
- * This error code is followed by a 32-bit handle that
- * helps matching it with the respective PROXY_RESPONSE event. */
-#define MC_CMD_ERR_PROXY_PENDING 0x1010
-#define MC_CMD_ERR_PROXY_PENDING_HANDLE_OFST 4
-/* The request cannot be passed for authorization because
- * another request from the same function is currently being
- * authorized. The drvier should try again later. */
-#define MC_CMD_ERR_PROXY_INPROGRESS 0x1011
-/* Returned by MC_CMD_PROXY_COMPLETE if the caller is not the function
- * that has enabled proxying or BLOCK_INDEX points to a function that
- * doesn't await an authorization. */
-#define MC_CMD_ERR_PROXY_UNEXPECTED 0x1012
-/* This code is currently only used internally in FW. Its meaning is that
- * an operation failed due to lack of SR-IOV privilege.
- * Normally it is translated to EPERM by send_cmd_err(),
- * but it may also be used to trigger some special mechanism
- * for handling such case, e.g. to relay the failed request
- * to a designated admin function for authorization. */
-#define MC_CMD_ERR_NO_PRIVILEGE 0x1013
-/* Workaround 26807 could not be turned on/off because some functions
- * have already installed filters. See the comment at
- * MC_CMD_WORKAROUND_BUG26807.
- * May also returned for other operations such as sub-variant switching. */
-#define MC_CMD_ERR_FILTERS_PRESENT 0x1014
-/* The clock whose frequency you've attempted to set set
- * doesn't exist on this NIC */
-#define MC_CMD_ERR_NO_CLOCK 0x1015
-/* Returned by MC_CMD_TESTASSERT if the action that should
- * have caused an assertion failed to do so. */
-#define MC_CMD_ERR_UNREACHABLE 0x1016
-/* This command needs to be processed in the background but there were no
- * resources to do so. Send it again after a command has completed. */
-#define MC_CMD_ERR_QUEUE_FULL 0x1017
-/* The operation could not be completed because the PCIe link has gone
- * away. This error code is never expected to be returned over the TLP
- * transport. */
-#define MC_CMD_ERR_NO_PCIE 0x1018
-/* The operation could not be completed because the datapath has gone
- * away. This is distinct from MC_CMD_ERR_DATAPATH_DISABLED in that the
- * datapath absence may be temporary*/
-#define MC_CMD_ERR_NO_DATAPATH 0x1019
-/* The operation could not complete because some VIs are allocated */
-#define MC_CMD_ERR_VIS_PRESENT 0x101a
-/* The operation could not complete because some PIO buffers are allocated */
-#define MC_CMD_ERR_PIOBUFS_PRESENT 0x101b
#define MC_CMD_ERR_CODE_OFST 0
+#define MC_CMD_ERR_PROXY_PENDING_HANDLE_OFST 4
/* We define 8 "escape" commands to allow
for command number space extension */
@@ -376,12 +251,163 @@
*/
#define MC_CMD_ERR_ARG_OFST 4
-/* No space */
-#define MC_CMD_ERR_ENOSPC 28
-
#endif
-/* MCDI_EVENT structuredef */
+/* MC_CMD_ERR enum: Public MCDI error codes. Error codes that correspond to
+ * POSIX errnos should use the same numeric values that linux does. Error codes
+ * specific to Solarflare firmware should use values in the range 0x1000 -
+ * 0x10ff. The range 0x2000 - 0x20ff is reserved for private error codes (see
+ * MC_CMD_ERR_PRIV below).
+ */
+/* enum: Operation not permitted. */
+#define MC_CMD_ERR_EPERM 0x1
+/* enum: Non-existent command target */
+#define MC_CMD_ERR_ENOENT 0x2
+/* enum: assert() has killed the MC */
+#define MC_CMD_ERR_EINTR 0x4
+/* enum: I/O failure */
+#define MC_CMD_ERR_EIO 0x5
+/* enum: Already exists */
+#define MC_CMD_ERR_EEXIST 0x6
+/* enum: Try again */
+#define MC_CMD_ERR_EAGAIN 0xb
+/* enum: Out of memory */
+#define MC_CMD_ERR_ENOMEM 0xc
+/* enum: Caller does not hold required locks */
+#define MC_CMD_ERR_EACCES 0xd
+/* enum: Resource is currently unavailable (e.g. lock contention) */
+#define MC_CMD_ERR_EBUSY 0x10
+/* enum: No such device */
+#define MC_CMD_ERR_ENODEV 0x13
+/* enum: Invalid argument to target */
+#define MC_CMD_ERR_EINVAL 0x16
+/* enum: No space */
+#define MC_CMD_ERR_ENOSPC 0x1c
+/* enum: Read-only */
+#define MC_CMD_ERR_EROFS 0x1e
+/* enum: Broken pipe */
+#define MC_CMD_ERR_EPIPE 0x20
+/* enum: Out of range */
+#define MC_CMD_ERR_ERANGE 0x22
+/* enum: Non-recursive resource is already acquired */
+#define MC_CMD_ERR_EDEADLK 0x23
+/* enum: Operation not implemented */
+#define MC_CMD_ERR_ENOSYS 0x26
+/* enum: Operation timed out */
+#define MC_CMD_ERR_ETIME 0x3e
+/* enum: Link has been severed */
+#define MC_CMD_ERR_ENOLINK 0x43
+/* enum: Protocol error */
+#define MC_CMD_ERR_EPROTO 0x47
+/* enum: Bad message */
+#define MC_CMD_ERR_EBADMSG 0x4a
+/* enum: Operation not supported */
+#define MC_CMD_ERR_ENOTSUP 0x5f
+/* enum: Address not available */
+#define MC_CMD_ERR_EADDRNOTAVAIL 0x63
+/* enum: Not connected */
+#define MC_CMD_ERR_ENOTCONN 0x6b
+/* enum: Operation already in progress */
+#define MC_CMD_ERR_EALREADY 0x72
+/* enum: Stale handle. The handle references a resource that no longer exists.
+ */
+#define MC_CMD_ERR_ESTALE 0x74
+/* enum: Resource allocation failed. */
+#define MC_CMD_ERR_ALLOC_FAIL 0x1000
+/* enum: V-adaptor not found. */
+#define MC_CMD_ERR_NO_VADAPTOR 0x1001
+/* enum: EVB port not found. */
+#define MC_CMD_ERR_NO_EVB_PORT 0x1002
+/* enum: V-switch not found. */
+#define MC_CMD_ERR_NO_VSWITCH 0x1003
+/* enum: Too many VLAN tags. */
+#define MC_CMD_ERR_VLAN_LIMIT 0x1004
+/* enum: Bad PCI function number. */
+#define MC_CMD_ERR_BAD_PCI_FUNC 0x1005
+/* enum: Invalid VLAN mode. */
+#define MC_CMD_ERR_BAD_VLAN_MODE 0x1006
+/* enum: Invalid v-switch type. */
+#define MC_CMD_ERR_BAD_VSWITCH_TYPE 0x1007
+/* enum: Invalid v-port type. */
+#define MC_CMD_ERR_BAD_VPORT_TYPE 0x1008
+/* enum: MAC address exists. */
+#define MC_CMD_ERR_MAC_EXIST 0x1009
+/* enum: Slave core not present */
+#define MC_CMD_ERR_SLAVE_NOT_PRESENT 0x100a
+/* enum: The datapath is disabled. */
+#define MC_CMD_ERR_DATAPATH_DISABLED 0x100b
+/* enum: The requesting client is not a function */
+#define MC_CMD_ERR_CLIENT_NOT_FN 0x100c
+/* enum: The requested operation might require the command to be passed between
+ * MCs, and thetransport doesn't support that. Should only ever been seen over
+ * the UART.
+ */
+#define MC_CMD_ERR_TRANSPORT_NOPROXY 0x100d
+/* enum: VLAN tag(s) exists */
+#define MC_CMD_ERR_VLAN_EXIST 0x100e
+/* enum: No MAC address assigned to an EVB port */
+#define MC_CMD_ERR_NO_MAC_ADDR 0x100f
+/* enum: Notifies the driver that the request has been relayed to an admin
+ * function for authorization. The driver should wait for a PROXY_RESPONSE
+ * event and then resend its request. This error code is followed by a 32-bit
+ * handle that helps matching it with the respective PROXY_RESPONSE event.
+ */
+#define MC_CMD_ERR_PROXY_PENDING 0x1010
+/* enum: The request cannot be passed for authorization because another request
+ * from the same function is currently being authorized. The drvier should try
+ * again later.
+ */
+#define MC_CMD_ERR_PROXY_INPROGRESS 0x1011
+/* enum: Returned by MC_CMD_PROXY_COMPLETE if the caller is not the function
+ * that has enabled proxying or BLOCK_INDEX points to a function that doesn't
+ * await an authorization.
+ */
+#define MC_CMD_ERR_PROXY_UNEXPECTED 0x1012
+/* enum: This code is currently only used internally in FW. Its meaning is that
+ * an operation failed due to lack of SR-IOV privilege. Normally it is
+ * translated to EPERM by send_cmd_err(), but it may also be used to trigger
+ * some special mechanism for handling such case, e.g. to relay the failed
+ * request to a designated admin function for authorization.
+ */
+#define MC_CMD_ERR_NO_PRIVILEGE 0x1013
+/* enum: Workaround 26807 could not be turned on/off because some functions
+ * have already installed filters. See the comment at
+ * MC_CMD_WORKAROUND_BUG26807. May also returned for other operations such as
+ * sub-variant switching.
+ */
+#define MC_CMD_ERR_FILTERS_PRESENT 0x1014
+/* enum: The clock whose frequency you've attempted to set set doesn't exist on
+ * this NIC
+ */
+#define MC_CMD_ERR_NO_CLOCK 0x1015
+/* enum: Returned by MC_CMD_TESTASSERT if the action that should have caused an
+ * assertion failed to do so.
+ */
+#define MC_CMD_ERR_UNREACHABLE 0x1016
+/* enum: This command needs to be processed in the background but there were no
+ * resources to do so. Send it again after a command has completed.
+ */
+#define MC_CMD_ERR_QUEUE_FULL 0x1017
+/* enum: The operation could not be completed because the PCIe link has gone
+ * away. This error code is never expected to be returned over the TLP
+ * transport.
+ */
+#define MC_CMD_ERR_NO_PCIE 0x1018
+/* enum: The operation could not be completed because the datapath has gone
+ * away. This is distinct from MC_CMD_ERR_DATAPATH_DISABLED in that the
+ * datapath absence may be temporary
+ */
+#define MC_CMD_ERR_NO_DATAPATH 0x1019
+/* enum: The operation could not complete because some VIs are allocated */
+#define MC_CMD_ERR_VIS_PRESENT 0x101a
+/* enum: The operation could not complete because some PIO buffers are
+ * allocated
+ */
+#define MC_CMD_ERR_PIOBUFS_PRESENT 0x101b
+
+/* MCDI_EVENT structuredef: The structure of an MCDI_EVENT on Siena/EF10
+ * platforms
+ */
#define MCDI_EVENT_LEN 8
#define MCDI_EVENT_CONT_LBN 32
#define MCDI_EVENT_CONT_WIDTH 1
@@ -596,6 +622,22 @@
#define MCDI_EVENT_SUC_ERR_ADDRESS_WIDTH 24
#define MCDI_EVENT_SUC_ERR_DATA_LBN 8
#define MCDI_EVENT_SUC_ERR_DATA_WIDTH 24
+#define MCDI_EVENT_LINKCHANGE_V2_LP_CAP_LBN 0
+#define MCDI_EVENT_LINKCHANGE_V2_LP_CAP_WIDTH 24
+#define MCDI_EVENT_LINKCHANGE_V2_SPEED_LBN 24
+#define MCDI_EVENT_LINKCHANGE_V2_SPEED_WIDTH 4
+/* Enum values, see field(s): */
+/* MCDI_EVENT/LINKCHANGE_SPEED */
+#define MCDI_EVENT_LINKCHANGE_V2_FLAGS_LINK_UP_LBN 28
+#define MCDI_EVENT_LINKCHANGE_V2_FLAGS_LINK_UP_WIDTH 1
+#define MCDI_EVENT_LINKCHANGE_V2_FCNTL_LBN 29
+#define MCDI_EVENT_LINKCHANGE_V2_FCNTL_WIDTH 3
+/* Enum values, see field(s): */
+/* MC_CMD_SET_MAC/MC_CMD_SET_MAC_IN/FCNTL */
+#define MCDI_EVENT_MODULECHANGE_LD_CAP_LBN 0
+#define MCDI_EVENT_MODULECHANGE_LD_CAP_WIDTH 30
+#define MCDI_EVENT_MODULECHANGE_SEQ_LBN 30
+#define MCDI_EVENT_MODULECHANGE_SEQ_WIDTH 2
#define MCDI_EVENT_DATA_LBN 0
#define MCDI_EVENT_DATA_WIDTH 32
#define MCDI_EVENT_SRC_LBN 36
@@ -674,6 +716,15 @@
#define MCDI_EVENT_CODE_DBRET 0x1e
/* enum: The MC has detected a fault on the SUC */
#define MCDI_EVENT_CODE_SUC 0x1f
+/* enum: Link change. This event is sent instead of LINKCHANGE if
+ * WANT_V2_LINKCHANGES was set on driver attach.
+ */
+#define MCDI_EVENT_CODE_LINKCHANGE_V2 0x20
+/* enum: This event is sent if WANT_V2_LINKCHANGES was set on driver attach
+ * when the local device capabilities changes. This will usually correspond to
+ * a module change.
+ */
+#define MCDI_EVENT_CODE_MODULECHANGE 0x21
/* enum: Artificial event generated by host and posted via MC for test
* purposes.
*/
@@ -799,6 +850,14 @@
#define MCDI_EVENT_DBRET_DATA_LEN 4
#define MCDI_EVENT_DBRET_DATA_LBN 0
#define MCDI_EVENT_DBRET_DATA_WIDTH 32
+#define MCDI_EVENT_LINKCHANGE_V2_DATA_OFST 0
+#define MCDI_EVENT_LINKCHANGE_V2_DATA_LEN 4
+#define MCDI_EVENT_LINKCHANGE_V2_DATA_LBN 0
+#define MCDI_EVENT_LINKCHANGE_V2_DATA_WIDTH 32
+#define MCDI_EVENT_MODULECHANGE_DATA_OFST 0
+#define MCDI_EVENT_MODULECHANGE_DATA_LEN 4
+#define MCDI_EVENT_MODULECHANGE_DATA_LBN 0
+#define MCDI_EVENT_MODULECHANGE_DATA_WIDTH 32
/* FCDI_EVENT structuredef */
#define FCDI_EVENT_LEN 8
@@ -906,6 +965,7 @@
*/
#define FCDI_EXTENDED_EVENT_PPS_LENMIN 16
#define FCDI_EXTENDED_EVENT_PPS_LENMAX 248
+#define FCDI_EXTENDED_EVENT_PPS_LENMAX_MCDI2 1016
#define FCDI_EXTENDED_EVENT_PPS_LEN(num) (8+8*(num))
/* Number of timestamps following */
#define FCDI_EXTENDED_EVENT_PPS_COUNT_OFST 0
@@ -929,6 +989,7 @@
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_OFST 12
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MINNUM 1
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MAXNUM 30
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MAXNUM_MCDI2 126
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LBN 64
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_WIDTH 64
@@ -1044,11 +1105,13 @@
/* MC_CMD_READ32_OUT msgresponse */
#define MC_CMD_READ32_OUT_LENMIN 4
#define MC_CMD_READ32_OUT_LENMAX 252
+#define MC_CMD_READ32_OUT_LENMAX_MCDI2 1020
#define MC_CMD_READ32_OUT_LEN(num) (0+4*(num))
#define MC_CMD_READ32_OUT_BUFFER_OFST 0
#define MC_CMD_READ32_OUT_BUFFER_LEN 4
#define MC_CMD_READ32_OUT_BUFFER_MINNUM 1
#define MC_CMD_READ32_OUT_BUFFER_MAXNUM 63
+#define MC_CMD_READ32_OUT_BUFFER_MAXNUM_MCDI2 255
/***********************************/
@@ -1063,6 +1126,7 @@
/* MC_CMD_WRITE32_IN msgrequest */
#define MC_CMD_WRITE32_IN_LENMIN 8
#define MC_CMD_WRITE32_IN_LENMAX 252
+#define MC_CMD_WRITE32_IN_LENMAX_MCDI2 1020
#define MC_CMD_WRITE32_IN_LEN(num) (4+4*(num))
#define MC_CMD_WRITE32_IN_ADDR_OFST 0
#define MC_CMD_WRITE32_IN_ADDR_LEN 4
@@ -1070,6 +1134,7 @@
#define MC_CMD_WRITE32_IN_BUFFER_LEN 4
#define MC_CMD_WRITE32_IN_BUFFER_MINNUM 1
#define MC_CMD_WRITE32_IN_BUFFER_MAXNUM 62
+#define MC_CMD_WRITE32_IN_BUFFER_MAXNUM_MCDI2 254
/* MC_CMD_WRITE32_OUT msgresponse */
#define MC_CMD_WRITE32_OUT_LEN 0
@@ -1457,6 +1522,7 @@
/* MC_CMD_PTP_IN_TRANSMIT msgrequest */
#define MC_CMD_PTP_IN_TRANSMIT_LENMIN 13
#define MC_CMD_PTP_IN_TRANSMIT_LENMAX 252
+#define MC_CMD_PTP_IN_TRANSMIT_LENMAX_MCDI2 1020
#define MC_CMD_PTP_IN_TRANSMIT_LEN(num) (12+1*(num))
/* MC_CMD_PTP_IN_CMD_OFST 0 */
/* MC_CMD_PTP_IN_CMD_LEN 4 */
@@ -1470,6 +1536,7 @@
#define MC_CMD_PTP_IN_TRANSMIT_PACKET_LEN 1
#define MC_CMD_PTP_IN_TRANSMIT_PACKET_MINNUM 1
#define MC_CMD_PTP_IN_TRANSMIT_PACKET_MAXNUM 240
+#define MC_CMD_PTP_IN_TRANSMIT_PACKET_MAXNUM_MCDI2 1008
/* MC_CMD_PTP_IN_READ_NIC_TIME msgrequest */
#define MC_CMD_PTP_IN_READ_NIC_TIME_LEN 8
@@ -1622,6 +1689,7 @@
/* MC_CMD_PTP_IN_FPGAWRITE msgrequest */
#define MC_CMD_PTP_IN_FPGAWRITE_LENMIN 13
#define MC_CMD_PTP_IN_FPGAWRITE_LENMAX 252
+#define MC_CMD_PTP_IN_FPGAWRITE_LENMAX_MCDI2 1020
#define MC_CMD_PTP_IN_FPGAWRITE_LEN(num) (12+1*(num))
/* MC_CMD_PTP_IN_CMD_OFST 0 */
/* MC_CMD_PTP_IN_CMD_LEN 4 */
@@ -1633,6 +1701,7 @@
#define MC_CMD_PTP_IN_FPGAWRITE_BUFFER_LEN 1
#define MC_CMD_PTP_IN_FPGAWRITE_BUFFER_MINNUM 1
#define MC_CMD_PTP_IN_FPGAWRITE_BUFFER_MAXNUM 240
+#define MC_CMD_PTP_IN_FPGAWRITE_BUFFER_MAXNUM_MCDI2 1008
/* MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST msgrequest */
#define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_LEN 16
@@ -1963,12 +2032,14 @@
/* MC_CMD_PTP_OUT_SYNCHRONIZE msgresponse */
#define MC_CMD_PTP_OUT_SYNCHRONIZE_LENMIN 20
#define MC_CMD_PTP_OUT_SYNCHRONIZE_LENMAX 240
+#define MC_CMD_PTP_OUT_SYNCHRONIZE_LENMAX_MCDI2 1020
#define MC_CMD_PTP_OUT_SYNCHRONIZE_LEN(num) (0+20*(num))
/* A set of host and NIC times */
#define MC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_OFST 0
#define MC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_LEN 20
#define MC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_MINNUM 1
#define MC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_MAXNUM 12
+#define MC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_MAXNUM_MCDI2 51
/* Host time immediately before NIC's hardware clock read */
#define MC_CMD_PTP_OUT_SYNCHRONIZE_HOSTSTART_OFST 0
#define MC_CMD_PTP_OUT_SYNCHRONIZE_HOSTSTART_LEN 4
@@ -2045,11 +2116,13 @@
/* MC_CMD_PTP_OUT_FPGAREAD msgresponse */
#define MC_CMD_PTP_OUT_FPGAREAD_LENMIN 1
#define MC_CMD_PTP_OUT_FPGAREAD_LENMAX 252
+#define MC_CMD_PTP_OUT_FPGAREAD_LENMAX_MCDI2 1020
#define MC_CMD_PTP_OUT_FPGAREAD_LEN(num) (0+1*(num))
#define MC_CMD_PTP_OUT_FPGAREAD_BUFFER_OFST 0
#define MC_CMD_PTP_OUT_FPGAREAD_BUFFER_LEN 1
#define MC_CMD_PTP_OUT_FPGAREAD_BUFFER_MINNUM 1
#define MC_CMD_PTP_OUT_FPGAREAD_BUFFER_MAXNUM 252
+#define MC_CMD_PTP_OUT_FPGAREAD_BUFFER_MAXNUM_MCDI2 1020
/* MC_CMD_PTP_OUT_GET_TIME_FORMAT msgresponse */
#define MC_CMD_PTP_OUT_GET_TIME_FORMAT_LEN 4
@@ -2183,12 +2256,14 @@
/* MC_CMD_CSR_READ32_OUT msgresponse */
#define MC_CMD_CSR_READ32_OUT_LENMIN 4
#define MC_CMD_CSR_READ32_OUT_LENMAX 252
+#define MC_CMD_CSR_READ32_OUT_LENMAX_MCDI2 1020
#define MC_CMD_CSR_READ32_OUT_LEN(num) (0+4*(num))
/* The last dword is the status, not a value read */
#define MC_CMD_CSR_READ32_OUT_BUFFER_OFST 0
#define MC_CMD_CSR_READ32_OUT_BUFFER_LEN 4
#define MC_CMD_CSR_READ32_OUT_BUFFER_MINNUM 1
#define MC_CMD_CSR_READ32_OUT_BUFFER_MAXNUM 63
+#define MC_CMD_CSR_READ32_OUT_BUFFER_MAXNUM_MCDI2 255
/***********************************/
@@ -2203,6 +2278,7 @@
/* MC_CMD_CSR_WRITE32_IN msgrequest */
#define MC_CMD_CSR_WRITE32_IN_LENMIN 12
#define MC_CMD_CSR_WRITE32_IN_LENMAX 252
+#define MC_CMD_CSR_WRITE32_IN_LENMAX_MCDI2 1020
#define MC_CMD_CSR_WRITE32_IN_LEN(num) (8+4*(num))
/* Address */
#define MC_CMD_CSR_WRITE32_IN_ADDR_OFST 0
@@ -2213,6 +2289,7 @@
#define MC_CMD_CSR_WRITE32_IN_BUFFER_LEN 4
#define MC_CMD_CSR_WRITE32_IN_BUFFER_MINNUM 1
#define MC_CMD_CSR_WRITE32_IN_BUFFER_MAXNUM 61
+#define MC_CMD_CSR_WRITE32_IN_BUFFER_MAXNUM_MCDI2 253
/* MC_CMD_CSR_WRITE32_OUT msgresponse */
#define MC_CMD_CSR_WRITE32_OUT_LEN 4
@@ -2283,12 +2360,14 @@
/* MC_CMD_STACKINFO_OUT msgresponse */
#define MC_CMD_STACKINFO_OUT_LENMIN 12
#define MC_CMD_STACKINFO_OUT_LENMAX 252
+#define MC_CMD_STACKINFO_OUT_LENMAX_MCDI2 1020
#define MC_CMD_STACKINFO_OUT_LEN(num) (0+12*(num))
/* (thread ptr, stack size, free space) for each thread in system */
#define MC_CMD_STACKINFO_OUT_THREAD_INFO_OFST 0
#define MC_CMD_STACKINFO_OUT_THREAD_INFO_LEN 12
#define MC_CMD_STACKINFO_OUT_THREAD_INFO_MINNUM 1
#define MC_CMD_STACKINFO_OUT_THREAD_INFO_MAXNUM 21
+#define MC_CMD_STACKINFO_OUT_THREAD_INFO_MAXNUM_MCDI2 85
/***********************************/
@@ -2399,6 +2478,7 @@
/* MC_CMD_DBI_WRITE_IN msgrequest */
#define MC_CMD_DBI_WRITE_IN_LENMIN 12
#define MC_CMD_DBI_WRITE_IN_LENMAX 252
+#define MC_CMD_DBI_WRITE_IN_LENMAX_MCDI2 1020
#define MC_CMD_DBI_WRITE_IN_LEN(num) (0+12*(num))
/* Each write op consists of an address (offset 0), byte enable/VF/CS2 (offset
* 32) and value (offset 64). See MC_CMD_DBIWROP_TYPEDEF.
@@ -2407,6 +2487,7 @@
#define MC_CMD_DBI_WRITE_IN_DBIWROP_LEN 12
#define MC_CMD_DBI_WRITE_IN_DBIWROP_MINNUM 1
#define MC_CMD_DBI_WRITE_IN_DBIWROP_MAXNUM 21
+#define MC_CMD_DBI_WRITE_IN_DBIWROP_MAXNUM_MCDI2 85
/* MC_CMD_DBI_WRITE_OUT msgresponse */
#define MC_CMD_DBI_WRITE_OUT_LEN 0
@@ -2566,6 +2647,7 @@
/* MC_CMD_GET_BOARD_CFG_OUT msgresponse */
#define MC_CMD_GET_BOARD_CFG_OUT_LENMIN 96
#define MC_CMD_GET_BOARD_CFG_OUT_LENMAX 136
+#define MC_CMD_GET_BOARD_CFG_OUT_LENMAX_MCDI2 136
#define MC_CMD_GET_BOARD_CFG_OUT_LEN(num) (72+2*(num))
#define MC_CMD_GET_BOARD_CFG_OUT_BOARD_TYPE_OFST 0
#define MC_CMD_GET_BOARD_CFG_OUT_BOARD_TYPE_LEN 4
@@ -2621,6 +2703,7 @@
#define MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_LEN 2
#define MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MINNUM 12
#define MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM 32
+#define MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM_MCDI2 32
/***********************************/
@@ -2635,6 +2718,7 @@
/* MC_CMD_DBI_READX_IN msgrequest */
#define MC_CMD_DBI_READX_IN_LENMIN 8
#define MC_CMD_DBI_READX_IN_LENMAX 248
+#define MC_CMD_DBI_READX_IN_LENMAX_MCDI2 1016
#define MC_CMD_DBI_READX_IN_LEN(num) (0+8*(num))
/* Each Read op consists of an address (offset 0), VF/CS2) */
#define MC_CMD_DBI_READX_IN_DBIRDOP_OFST 0
@@ -2643,16 +2727,19 @@
#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_OFST 4
#define MC_CMD_DBI_READX_IN_DBIRDOP_MINNUM 1
#define MC_CMD_DBI_READX_IN_DBIRDOP_MAXNUM 31
+#define MC_CMD_DBI_READX_IN_DBIRDOP_MAXNUM_MCDI2 127
/* MC_CMD_DBI_READX_OUT msgresponse */
#define MC_CMD_DBI_READX_OUT_LENMIN 4
#define MC_CMD_DBI_READX_OUT_LENMAX 252
+#define MC_CMD_DBI_READX_OUT_LENMAX_MCDI2 1020
#define MC_CMD_DBI_READX_OUT_LEN(num) (0+4*(num))
/* Value */
#define MC_CMD_DBI_READX_OUT_VALUE_OFST 0
#define MC_CMD_DBI_READX_OUT_VALUE_LEN 4
#define MC_CMD_DBI_READX_OUT_VALUE_MINNUM 1
#define MC_CMD_DBI_READX_OUT_VALUE_MAXNUM 63
+#define MC_CMD_DBI_READX_OUT_VALUE_MAXNUM_MCDI2 255
/* MC_CMD_DBIRDOP_TYPEDEF structuredef */
#define MC_CMD_DBIRDOP_TYPEDEF_LEN 8
@@ -2703,12 +2790,14 @@
/* MC_CMD_LTSSM_HIST_OUT msgresponse */
#define MC_CMD_LTSSM_HIST_OUT_LENMIN 0
#define MC_CMD_LTSSM_HIST_OUT_LENMAX 252
+#define MC_CMD_LTSSM_HIST_OUT_LENMAX_MCDI2 1020
#define MC_CMD_LTSSM_HIST_OUT_LEN(num) (0+4*(num))
/* variable number of LTSSM values, as bytes. The history is read-to-clear. */
#define MC_CMD_LTSSM_HIST_OUT_DATA_OFST 0
#define MC_CMD_LTSSM_HIST_OUT_DATA_LEN 4
#define MC_CMD_LTSSM_HIST_OUT_DATA_MINNUM 0
#define MC_CMD_LTSSM_HIST_OUT_DATA_MAXNUM 63
+#define MC_CMD_LTSSM_HIST_OUT_DATA_MAXNUM_MCDI2 255
/***********************************/
@@ -2742,6 +2831,10 @@
#define MC_CMD_DRV_ATTACH_IN_SUBVARIANT_AWARE_WIDTH 1
#define MC_CMD_DRV_ATTACH_IN_WANT_VI_SPREADING_LBN 3
#define MC_CMD_DRV_ATTACH_IN_WANT_VI_SPREADING_WIDTH 1
+#define MC_CMD_DRV_ATTACH_IN_WANT_V2_LINKCHANGES_LBN 4
+#define MC_CMD_DRV_ATTACH_IN_WANT_V2_LINKCHANGES_WIDTH 1
+#define MC_CMD_DRV_ATTACH_IN_WANT_RX_VI_SPREADING_INHIBIT_LBN 5
+#define MC_CMD_DRV_ATTACH_IN_WANT_RX_VI_SPREADING_INHIBIT_WIDTH 1
/* 1 to set new state, or 0 to just report the existing state */
#define MC_CMD_DRV_ATTACH_IN_UPDATE_OFST 4
#define MC_CMD_DRV_ATTACH_IN_UPDATE_LEN 4
@@ -2779,6 +2872,71 @@
/* enum: Only this option is allowed for non-admin functions */
#define MC_CMD_FW_DONT_CARE 0xffffffff
+/* MC_CMD_DRV_ATTACH_IN_V2 msgrequest: Updated DRV_ATTACH to include driver
+ * version
+ */
+#define MC_CMD_DRV_ATTACH_IN_V2_LEN 32
+/* new state to set if UPDATE=1 */
+#define MC_CMD_DRV_ATTACH_IN_V2_NEW_STATE_OFST 0
+#define MC_CMD_DRV_ATTACH_IN_V2_NEW_STATE_LEN 4
+/* MC_CMD_DRV_ATTACH_LBN 0 */
+/* MC_CMD_DRV_ATTACH_WIDTH 1 */
+#define MC_CMD_DRV_ATTACH_IN_V2_ATTACH_LBN 0
+#define MC_CMD_DRV_ATTACH_IN_V2_ATTACH_WIDTH 1
+/* MC_CMD_DRV_PREBOOT_LBN 1 */
+/* MC_CMD_DRV_PREBOOT_WIDTH 1 */
+#define MC_CMD_DRV_ATTACH_IN_V2_PREBOOT_LBN 1
+#define MC_CMD_DRV_ATTACH_IN_V2_PREBOOT_WIDTH 1
+#define MC_CMD_DRV_ATTACH_IN_V2_SUBVARIANT_AWARE_LBN 2
+#define MC_CMD_DRV_ATTACH_IN_V2_SUBVARIANT_AWARE_WIDTH 1
+#define MC_CMD_DRV_ATTACH_IN_V2_WANT_VI_SPREADING_LBN 3
+#define MC_CMD_DRV_ATTACH_IN_V2_WANT_VI_SPREADING_WIDTH 1
+#define MC_CMD_DRV_ATTACH_IN_V2_WANT_V2_LINKCHANGES_LBN 4
+#define MC_CMD_DRV_ATTACH_IN_V2_WANT_V2_LINKCHANGES_WIDTH 1
+#define MC_CMD_DRV_ATTACH_IN_V2_WANT_RX_VI_SPREADING_INHIBIT_LBN 5
+#define MC_CMD_DRV_ATTACH_IN_V2_WANT_RX_VI_SPREADING_INHIBIT_WIDTH 1
+/* 1 to set new state, or 0 to just report the existing state */
+#define MC_CMD_DRV_ATTACH_IN_V2_UPDATE_OFST 4
+#define MC_CMD_DRV_ATTACH_IN_V2_UPDATE_LEN 4
+/* preferred datapath firmware (for Huntington; ignored for Siena) */
+#define MC_CMD_DRV_ATTACH_IN_V2_FIRMWARE_ID_OFST 8
+#define MC_CMD_DRV_ATTACH_IN_V2_FIRMWARE_ID_LEN 4
+/* enum: Prefer to use full featured firmware */
+/* MC_CMD_FW_FULL_FEATURED 0x0 */
+/* enum: Prefer to use firmware with fewer features but lower latency */
+/* MC_CMD_FW_LOW_LATENCY 0x1 */
+/* enum: Prefer to use firmware for SolarCapture packed stream mode */
+/* MC_CMD_FW_PACKED_STREAM 0x2 */
+/* enum: Prefer to use firmware with fewer features and simpler TX event
+ * batching but higher TX packet rate
+ */
+/* MC_CMD_FW_HIGH_TX_RATE 0x3 */
+/* enum: Reserved value */
+/* MC_CMD_FW_PACKED_STREAM_HASH_MODE_1 0x4 */
+/* enum: Prefer to use firmware with additional "rules engine" filtering
+ * support
+ */
+/* MC_CMD_FW_RULES_ENGINE 0x5 */
+/* enum: Prefer to use firmware with additional DPDK support */
+/* MC_CMD_FW_DPDK 0x6 */
+/* enum: Prefer to use "l3xudp" custom datapath firmware (see SF-119495-PD and
+ * bug69716)
+ */
+/* MC_CMD_FW_L3XUDP 0x7 */
+/* enum: Requests that the MC keep whatever datapath firmware is currently
+ * running. It's used for test purposes, where we want to be able to shmboot
+ * special test firmware variants. This option is only recognised in eftest
+ * (i.e. non-production) builds.
+ */
+/* MC_CMD_FW_KEEP_CURRENT_EFTEST_ONLY 0xfffffffe */
+/* enum: Only this option is allowed for non-admin functions */
+/* MC_CMD_FW_DONT_CARE 0xffffffff */
+/* Version of the driver to be reported by management protocols (e.g. NC-SI)
+ * handled by the NIC. This is a zero-terminated ASCII string.
+ */
+#define MC_CMD_DRV_ATTACH_IN_V2_DRIVER_VERSION_OFST 12
+#define MC_CMD_DRV_ATTACH_IN_V2_DRIVER_VERSION_LEN 20
+
/* MC_CMD_DRV_ATTACH_OUT msgresponse */
#define MC_CMD_DRV_ATTACH_OUT_LEN 4
/* previous or existing state, see the bitmask at NEW_STATE */
@@ -2810,6 +2968,11 @@
* input.
*/
#define MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_VI_SPREADING_ENABLED 0x4
+/* enum: If set, indicates that VI spreading is inhibited on RX. See
+ * description of WANT_RX_VI_SPREADING_INHIBIT above. It is an error to set
+ * this flag without also setting FLAG_VI_SPREADING_ENABLED.
+ */
+#define MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_RX_VI_SPREADING_INHIBITED 0x5
/***********************************/
@@ -2975,6 +3138,7 @@
/* MC_CMD_PUTS_IN msgrequest */
#define MC_CMD_PUTS_IN_LENMIN 13
#define MC_CMD_PUTS_IN_LENMAX 252
+#define MC_CMD_PUTS_IN_LENMAX_MCDI2 1020
#define MC_CMD_PUTS_IN_LEN(num) (12+1*(num))
#define MC_CMD_PUTS_IN_DEST_OFST 0
#define MC_CMD_PUTS_IN_DEST_LEN 4
@@ -2988,6 +3152,7 @@
#define MC_CMD_PUTS_IN_STRING_LEN 1
#define MC_CMD_PUTS_IN_STRING_MINNUM 1
#define MC_CMD_PUTS_IN_STRING_MAXNUM 240
+#define MC_CMD_PUTS_IN_STRING_MAXNUM_MCDI2 1008
/* MC_CMD_PUTS_OUT msgresponse */
#define MC_CMD_PUTS_OUT_LEN 0
@@ -3340,11 +3505,13 @@
/* MC_CMD_FLUSH_RX_QUEUES_IN msgrequest */
#define MC_CMD_FLUSH_RX_QUEUES_IN_LENMIN 4
#define MC_CMD_FLUSH_RX_QUEUES_IN_LENMAX 252
+#define MC_CMD_FLUSH_RX_QUEUES_IN_LENMAX_MCDI2 1020
#define MC_CMD_FLUSH_RX_QUEUES_IN_LEN(num) (0+4*(num))
#define MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_OFST 0
#define MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_LEN 4
#define MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MINNUM 1
#define MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM 63
+#define MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM_MCDI2 255
/* MC_CMD_FLUSH_RX_QUEUES_OUT msgresponse */
#define MC_CMD_FLUSH_RX_QUEUES_OUT_LEN 0
@@ -3694,6 +3861,10 @@
#define MC_CMD_GET_LINK_OUT_LINK_FAULT_RX_WIDTH 1
#define MC_CMD_GET_LINK_OUT_LINK_FAULT_TX_LBN 7
#define MC_CMD_GET_LINK_OUT_LINK_FAULT_TX_WIDTH 1
+#define MC_CMD_GET_LINK_OUT_MODULE_UP_VALID_LBN 8
+#define MC_CMD_GET_LINK_OUT_MODULE_UP_VALID_WIDTH 1
+#define MC_CMD_GET_LINK_OUT_MODULE_UP_LBN 9
+#define MC_CMD_GET_LINK_OUT_MODULE_UP_WIDTH 1
/* This returns the negotiated flow control value. */
#define MC_CMD_GET_LINK_OUT_FCNTL_OFST 20
#define MC_CMD_GET_LINK_OUT_FCNTL_LEN 4
@@ -3746,6 +3917,10 @@
#define MC_CMD_GET_LINK_OUT_V2_LINK_FAULT_RX_WIDTH 1
#define MC_CMD_GET_LINK_OUT_V2_LINK_FAULT_TX_LBN 7
#define MC_CMD_GET_LINK_OUT_V2_LINK_FAULT_TX_WIDTH 1
+#define MC_CMD_GET_LINK_OUT_V2_MODULE_UP_VALID_LBN 8
+#define MC_CMD_GET_LINK_OUT_V2_MODULE_UP_VALID_WIDTH 1
+#define MC_CMD_GET_LINK_OUT_V2_MODULE_UP_LBN 9
+#define MC_CMD_GET_LINK_OUT_V2_MODULE_UP_WIDTH 1
/* This returns the negotiated flow control value. */
#define MC_CMD_GET_LINK_OUT_V2_FCNTL_OFST 20
#define MC_CMD_GET_LINK_OUT_V2_FCNTL_LEN 4
@@ -3805,7 +3980,7 @@
/***********************************/
/* MC_CMD_SET_LINK
* Write the unified MAC/PHY link configuration. Locks required: None. Return
- * code: 0, EINVAL, ETIME
+ * code: 0, EINVAL, ETIME, EAGAIN
*/
#define MC_CMD_SET_LINK 0x2a
#undef MC_CMD_0x2a_PRIVILEGE_CTG
@@ -3839,6 +4014,42 @@
#define MC_CMD_SET_LINK_IN_LOOPBACK_SPEED_OFST 12
#define MC_CMD_SET_LINK_IN_LOOPBACK_SPEED_LEN 4
+/* MC_CMD_SET_LINK_IN_V2 msgrequest: Updated SET_LINK to include sequence
+ * number to ensure this SET_LINK command corresponds to the latest
+ * MODULECHANGE event.
+ */
+#define MC_CMD_SET_LINK_IN_V2_LEN 17
+/* Near-side advertised capabilities. Refer to
+ * MC_CMD_GET_PHY_CFG_OUT/SUPPORTED_CAP for bit definitions.
+ */
+#define MC_CMD_SET_LINK_IN_V2_CAP_OFST 0
+#define MC_CMD_SET_LINK_IN_V2_CAP_LEN 4
+/* Flags */
+#define MC_CMD_SET_LINK_IN_V2_FLAGS_OFST 4
+#define MC_CMD_SET_LINK_IN_V2_FLAGS_LEN 4
+#define MC_CMD_SET_LINK_IN_V2_LOWPOWER_LBN 0
+#define MC_CMD_SET_LINK_IN_V2_LOWPOWER_WIDTH 1
+#define MC_CMD_SET_LINK_IN_V2_POWEROFF_LBN 1
+#define MC_CMD_SET_LINK_IN_V2_POWEROFF_WIDTH 1
+#define MC_CMD_SET_LINK_IN_V2_TXDIS_LBN 2
+#define MC_CMD_SET_LINK_IN_V2_TXDIS_WIDTH 1
+/* Loopback mode. */
+#define MC_CMD_SET_LINK_IN_V2_LOOPBACK_MODE_OFST 8
+#define MC_CMD_SET_LINK_IN_V2_LOOPBACK_MODE_LEN 4
+/* Enum values, see field(s): */
+/* MC_CMD_GET_LOOPBACK_MODES/MC_CMD_GET_LOOPBACK_MODES_OUT/100M */
+/* A loopback speed of "0" is supported, and means (choose any available
+ * speed).
+ */
+#define MC_CMD_SET_LINK_IN_V2_LOOPBACK_SPEED_OFST 12
+#define MC_CMD_SET_LINK_IN_V2_LOOPBACK_SPEED_LEN 4
+#define MC_CMD_SET_LINK_IN_V2_MODULE_SEQ_OFST 16
+#define MC_CMD_SET_LINK_IN_V2_MODULE_SEQ_LEN 1
+#define MC_CMD_SET_LINK_IN_V2_MODULE_SEQ_NUMBER_LBN 0
+#define MC_CMD_SET_LINK_IN_V2_MODULE_SEQ_NUMBER_WIDTH 7
+#define MC_CMD_SET_LINK_IN_V2_MODULE_SEQ_IGNORE_LBN 7
+#define MC_CMD_SET_LINK_IN_V2_MODULE_SEQ_IGNORE_WIDTH 1
+
/* MC_CMD_SET_LINK_OUT msgresponse */
#define MC_CMD_SET_LINK_OUT_LEN 0
@@ -4486,12 +4697,14 @@
/* MC_CMD_MEMCPY_IN msgrequest */
#define MC_CMD_MEMCPY_IN_LENMIN 32
#define MC_CMD_MEMCPY_IN_LENMAX 224
+#define MC_CMD_MEMCPY_IN_LENMAX_MCDI2 992
#define MC_CMD_MEMCPY_IN_LEN(num) (0+32*(num))
/* see MC_CMD_MEMCPY_RECORD_TYPEDEF */
#define MC_CMD_MEMCPY_IN_RECORD_OFST 0
#define MC_CMD_MEMCPY_IN_RECORD_LEN 32
#define MC_CMD_MEMCPY_IN_RECORD_MINNUM 1
#define MC_CMD_MEMCPY_IN_RECORD_MAXNUM 7
+#define MC_CMD_MEMCPY_IN_RECORD_MAXNUM_MCDI2 31
/* MC_CMD_MEMCPY_OUT msgresponse */
#define MC_CMD_MEMCPY_OUT_LEN 0
@@ -4763,6 +4976,8 @@
#define MC_CMD_NVRAM_INFO_OUT_TLV_WIDTH 1
#define MC_CMD_NVRAM_INFO_OUT_READ_ONLY_IF_TSA_BOUND_LBN 2
#define MC_CMD_NVRAM_INFO_OUT_READ_ONLY_IF_TSA_BOUND_WIDTH 1
+#define MC_CMD_NVRAM_INFO_OUT_CRC_LBN 3
+#define MC_CMD_NVRAM_INFO_OUT_CRC_WIDTH 1
#define MC_CMD_NVRAM_INFO_OUT_READ_ONLY_LBN 5
#define MC_CMD_NVRAM_INFO_OUT_READ_ONLY_WIDTH 1
#define MC_CMD_NVRAM_INFO_OUT_CMAC_LBN 6
@@ -4910,11 +5125,13 @@
/* MC_CMD_NVRAM_READ_OUT msgresponse */
#define MC_CMD_NVRAM_READ_OUT_LENMIN 1
#define MC_CMD_NVRAM_READ_OUT_LENMAX 252
+#define MC_CMD_NVRAM_READ_OUT_LENMAX_MCDI2 1020
#define MC_CMD_NVRAM_READ_OUT_LEN(num) (0+1*(num))
#define MC_CMD_NVRAM_READ_OUT_READ_BUFFER_OFST 0
#define MC_CMD_NVRAM_READ_OUT_READ_BUFFER_LEN 1
#define MC_CMD_NVRAM_READ_OUT_READ_BUFFER_MINNUM 1
#define MC_CMD_NVRAM_READ_OUT_READ_BUFFER_MAXNUM 252
+#define MC_CMD_NVRAM_READ_OUT_READ_BUFFER_MAXNUM_MCDI2 1020
/***********************************/
@@ -4931,6 +5148,7 @@
/* MC_CMD_NVRAM_WRITE_IN msgrequest */
#define MC_CMD_NVRAM_WRITE_IN_LENMIN 13
#define MC_CMD_NVRAM_WRITE_IN_LENMAX 252
+#define MC_CMD_NVRAM_WRITE_IN_LENMAX_MCDI2 1020
#define MC_CMD_NVRAM_WRITE_IN_LEN(num) (12+1*(num))
#define MC_CMD_NVRAM_WRITE_IN_TYPE_OFST 0
#define MC_CMD_NVRAM_WRITE_IN_TYPE_LEN 4
@@ -4944,6 +5162,7 @@
#define MC_CMD_NVRAM_WRITE_IN_WRITE_BUFFER_LEN 1
#define MC_CMD_NVRAM_WRITE_IN_WRITE_BUFFER_MINNUM 1
#define MC_CMD_NVRAM_WRITE_IN_WRITE_BUFFER_MAXNUM 240
+#define MC_CMD_NVRAM_WRITE_IN_WRITE_BUFFER_MAXNUM_MCDI2 1008
/* MC_CMD_NVRAM_WRITE_OUT msgresponse */
#define MC_CMD_NVRAM_WRITE_OUT_LEN 0
@@ -5130,11 +5349,13 @@
/* MC_CMD_SCHEDINFO_OUT msgresponse */
#define MC_CMD_SCHEDINFO_OUT_LENMIN 4
#define MC_CMD_SCHEDINFO_OUT_LENMAX 252
+#define MC_CMD_SCHEDINFO_OUT_LENMAX_MCDI2 1020
#define MC_CMD_SCHEDINFO_OUT_LEN(num) (0+4*(num))
#define MC_CMD_SCHEDINFO_OUT_DATA_OFST 0
#define MC_CMD_SCHEDINFO_OUT_DATA_LEN 4
#define MC_CMD_SCHEDINFO_OUT_DATA_MINNUM 1
#define MC_CMD_SCHEDINFO_OUT_DATA_MAXNUM 63
+#define MC_CMD_SCHEDINFO_OUT_DATA_MAXNUM_MCDI2 255
/***********************************/
@@ -5218,9 +5439,26 @@
#define MC_CMD_SENSOR_INFO_EXT_IN_PAGE_OFST 0
#define MC_CMD_SENSOR_INFO_EXT_IN_PAGE_LEN 4
+/* MC_CMD_SENSOR_INFO_EXT_IN_V2 msgrequest */
+#define MC_CMD_SENSOR_INFO_EXT_IN_V2_LEN 8
+/* Which page of sensors to report.
+ *
+ * Page 0 contains sensors 0 to 30 (sensor 31 is the next page bit).
+ *
+ * Page 1 contains sensors 32 to 62 (sensor 63 is the next page bit). etc.
+ */
+#define MC_CMD_SENSOR_INFO_EXT_IN_V2_PAGE_OFST 0
+#define MC_CMD_SENSOR_INFO_EXT_IN_V2_PAGE_LEN 4
+/* Flags controlling information retrieved */
+#define MC_CMD_SENSOR_INFO_EXT_IN_V2_FLAGS_OFST 4
+#define MC_CMD_SENSOR_INFO_EXT_IN_V2_FLAGS_LEN 4
+#define MC_CMD_SENSOR_INFO_EXT_IN_V2_ENGINEERING_LBN 0
+#define MC_CMD_SENSOR_INFO_EXT_IN_V2_ENGINEERING_WIDTH 1
+
/* MC_CMD_SENSOR_INFO_OUT msgresponse */
#define MC_CMD_SENSOR_INFO_OUT_LENMIN 4
#define MC_CMD_SENSOR_INFO_OUT_LENMAX 252
+#define MC_CMD_SENSOR_INFO_OUT_LENMAX_MCDI2 1020
#define MC_CMD_SENSOR_INFO_OUT_LEN(num) (4+8*(num))
#define MC_CMD_SENSOR_INFO_OUT_MASK_OFST 0
#define MC_CMD_SENSOR_INFO_OUT_MASK_LEN 4
@@ -5398,6 +5636,22 @@
#define MC_CMD_SENSOR_IN_1V3 0x55
/* enum: 1.3v power current: mA */
#define MC_CMD_SENSOR_IN_I1V3 0x56
+/* enum: Engineering sensor 1 */
+#define MC_CMD_SENSOR_ENGINEERING_1 0x57
+/* enum: Engineering sensor 2 */
+#define MC_CMD_SENSOR_ENGINEERING_2 0x58
+/* enum: Engineering sensor 3 */
+#define MC_CMD_SENSOR_ENGINEERING_3 0x59
+/* enum: Engineering sensor 4 */
+#define MC_CMD_SENSOR_ENGINEERING_4 0x5a
+/* enum: Engineering sensor 5 */
+#define MC_CMD_SENSOR_ENGINEERING_5 0x5b
+/* enum: Engineering sensor 6 */
+#define MC_CMD_SENSOR_ENGINEERING_6 0x5c
+/* enum: Engineering sensor 7 */
+#define MC_CMD_SENSOR_ENGINEERING_7 0x5d
+/* enum: Engineering sensor 8 */
+#define MC_CMD_SENSOR_ENGINEERING_8 0x5e
/* enum: Not a sensor: reserved for the next page flag */
#define MC_CMD_SENSOR_PAGE2_NEXT 0x5f
/* MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF */
@@ -5407,10 +5661,12 @@
#define MC_CMD_SENSOR_ENTRY_HI_OFST 8
#define MC_CMD_SENSOR_ENTRY_MINNUM 0
#define MC_CMD_SENSOR_ENTRY_MAXNUM 31
+#define MC_CMD_SENSOR_ENTRY_MAXNUM_MCDI2 127
/* MC_CMD_SENSOR_INFO_EXT_OUT msgresponse */
#define MC_CMD_SENSOR_INFO_EXT_OUT_LENMIN 4
#define MC_CMD_SENSOR_INFO_EXT_OUT_LENMAX 252
+#define MC_CMD_SENSOR_INFO_EXT_OUT_LENMAX_MCDI2 1020
#define MC_CMD_SENSOR_INFO_EXT_OUT_LEN(num) (4+8*(num))
#define MC_CMD_SENSOR_INFO_EXT_OUT_MASK_OFST 0
#define MC_CMD_SENSOR_INFO_EXT_OUT_MASK_LEN 4
@@ -5425,6 +5681,7 @@
/* MC_CMD_SENSOR_ENTRY_HI_OFST 8 */
/* MC_CMD_SENSOR_ENTRY_MINNUM 0 */
/* MC_CMD_SENSOR_ENTRY_MAXNUM 31 */
+/* MC_CMD_SENSOR_ENTRY_MAXNUM_MCDI2 127 */
/* MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF structuredef */
#define MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF_LEN 8
@@ -5487,6 +5744,22 @@
#define MC_CMD_READ_SENSORS_EXT_IN_LENGTH_OFST 8
#define MC_CMD_READ_SENSORS_EXT_IN_LENGTH_LEN 4
+/* MC_CMD_READ_SENSORS_EXT_IN_V2 msgrequest */
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_LEN 16
+/* DMA address of host buffer for sensor readings (must be 4Kbyte aligned). */
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_OFST 0
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LEN 8
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LO_OFST 0
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_OFST 4
+/* Size in bytes of host buffer. */
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_LENGTH_OFST 8
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_LENGTH_LEN 4
+/* Flags controlling information retrieved */
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_FLAGS_OFST 12
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_FLAGS_LEN 4
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_ENGINEERING_LBN 0
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_ENGINEERING_WIDTH 1
+
/* MC_CMD_READ_SENSORS_OUT msgresponse */
#define MC_CMD_READ_SENSORS_OUT_LEN 0
@@ -5594,6 +5867,7 @@
/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN msgrequest */
#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_LENMIN 8
#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_LENMAX 252
+#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_LENMAX_MCDI2 1020
#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_LEN(num) (4+4*(num))
#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_OFST 0
#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_LEN 4
@@ -5603,6 +5877,7 @@
#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_LEN 4
#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_MINNUM 1
#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_MAXNUM 62
+#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_MAXNUM_MCDI2 254
/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP msgrequest */
#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP_LEN 14
@@ -5788,6 +6063,7 @@
/* MC_CMD_GET_PHY_MEDIA_INFO_OUT msgresponse */
#define MC_CMD_GET_PHY_MEDIA_INFO_OUT_LENMIN 5
#define MC_CMD_GET_PHY_MEDIA_INFO_OUT_LENMAX 252
+#define MC_CMD_GET_PHY_MEDIA_INFO_OUT_LENMAX_MCDI2 1020
#define MC_CMD_GET_PHY_MEDIA_INFO_OUT_LEN(num) (4+1*(num))
/* in bytes */
#define MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATALEN_OFST 0
@@ -5796,6 +6072,7 @@
#define MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATA_LEN 1
#define MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATA_MINNUM 1
#define MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATA_MAXNUM 248
+#define MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATA_MAXNUM_MCDI2 1016
/***********************************/
@@ -5940,6 +6217,7 @@
/* MC_CMD_NVRAM_PARTITIONS_OUT msgresponse */
#define MC_CMD_NVRAM_PARTITIONS_OUT_LENMIN 4
#define MC_CMD_NVRAM_PARTITIONS_OUT_LENMAX 252
+#define MC_CMD_NVRAM_PARTITIONS_OUT_LENMAX_MCDI2 1020
#define MC_CMD_NVRAM_PARTITIONS_OUT_LEN(num) (4+4*(num))
/* total number of partitions */
#define MC_CMD_NVRAM_PARTITIONS_OUT_NUM_PARTITIONS_OFST 0
@@ -5949,6 +6227,7 @@
#define MC_CMD_NVRAM_PARTITIONS_OUT_TYPE_ID_LEN 4
#define MC_CMD_NVRAM_PARTITIONS_OUT_TYPE_ID_MINNUM 0
#define MC_CMD_NVRAM_PARTITIONS_OUT_TYPE_ID_MAXNUM 62
+#define MC_CMD_NVRAM_PARTITIONS_OUT_TYPE_ID_MAXNUM_MCDI2 254
/***********************************/
@@ -5970,6 +6249,7 @@
/* MC_CMD_NVRAM_METADATA_OUT msgresponse */
#define MC_CMD_NVRAM_METADATA_OUT_LENMIN 20
#define MC_CMD_NVRAM_METADATA_OUT_LENMAX 252
+#define MC_CMD_NVRAM_METADATA_OUT_LENMAX_MCDI2 1020
#define MC_CMD_NVRAM_METADATA_OUT_LEN(num) (20+1*(num))
/* Partition type ID code */
#define MC_CMD_NVRAM_METADATA_OUT_TYPE_OFST 0
@@ -6002,6 +6282,7 @@
#define MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_LEN 1
#define MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_MINNUM 0
#define MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_MAXNUM 232
+#define MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_MAXNUM_MCDI2 1000
/***********************************/
@@ -6034,7 +6315,10 @@
/***********************************/
/* MC_CMD_CLP
- * Perform a CLP related operation
+ * Perform a CLP related operation, see SF-110495-PS for details of CLP
+ * processing. This command has been extended to accomodate the requirements of
+ * different manufacturers which are to be found in SF-119187-TC, SF-119186-TC,
+ * SF-120509-TC and SF-117282-PS.
*/
#define MC_CMD_CLP 0x56
#undef MC_CMD_0x56_PRIVILEGE_CTG
@@ -6072,7 +6356,10 @@
#define MC_CMD_CLP_IN_SET_MAC_LEN 12
/* MC_CMD_CLP_IN_OP_OFST 0 */
/* MC_CMD_CLP_IN_OP_LEN 4 */
-/* MAC address assigned to port */
+/* The MAC address assigned to port. A zero MAC address of 00:00:00:00:00:00
+ * restores the permanent (factory-programmed) MAC address associated with the
+ * port. A non-zero MAC address persists until a PCIe reset or a power cycle.
+ */
#define MC_CMD_CLP_IN_SET_MAC_ADDR_OFST 4
#define MC_CMD_CLP_IN_SET_MAC_ADDR_LEN 6
/* Padding */
@@ -6082,11 +6369,38 @@
/* MC_CMD_CLP_OUT_SET_MAC msgresponse */
#define MC_CMD_CLP_OUT_SET_MAC_LEN 0
+/* MC_CMD_CLP_IN_SET_MAC_V2 msgrequest */
+#define MC_CMD_CLP_IN_SET_MAC_V2_LEN 16
+/* MC_CMD_CLP_IN_OP_OFST 0 */
+/* MC_CMD_CLP_IN_OP_LEN 4 */
+/* The MAC address assigned to port. A zero MAC address of 00:00:00:00:00:00
+ * restores the permanent (factory-programmed) MAC address associated with the
+ * port. A non-zero MAC address persists until a PCIe reset or a power cycle.
+ */
+#define MC_CMD_CLP_IN_SET_MAC_V2_ADDR_OFST 4
+#define MC_CMD_CLP_IN_SET_MAC_V2_ADDR_LEN 6
+/* Padding */
+#define MC_CMD_CLP_IN_SET_MAC_V2_RESERVED_OFST 10
+#define MC_CMD_CLP_IN_SET_MAC_V2_RESERVED_LEN 2
+#define MC_CMD_CLP_IN_SET_MAC_V2_FLAGS_OFST 12
+#define MC_CMD_CLP_IN_SET_MAC_V2_FLAGS_LEN 4
+#define MC_CMD_CLP_IN_SET_MAC_V2_VIRTUAL_LBN 0
+#define MC_CMD_CLP_IN_SET_MAC_V2_VIRTUAL_WIDTH 1
+
/* MC_CMD_CLP_IN_GET_MAC msgrequest */
#define MC_CMD_CLP_IN_GET_MAC_LEN 4
/* MC_CMD_CLP_IN_OP_OFST 0 */
/* MC_CMD_CLP_IN_OP_LEN 4 */
+/* MC_CMD_CLP_IN_GET_MAC_V2 msgrequest */
+#define MC_CMD_CLP_IN_GET_MAC_V2_LEN 8
+/* MC_CMD_CLP_IN_OP_OFST 0 */
+/* MC_CMD_CLP_IN_OP_LEN 4 */
+#define MC_CMD_CLP_IN_GET_MAC_V2_FLAGS_OFST 4
+#define MC_CMD_CLP_IN_GET_MAC_V2_FLAGS_LEN 4
+#define MC_CMD_CLP_IN_GET_MAC_V2_PERMANENT_LBN 0
+#define MC_CMD_CLP_IN_GET_MAC_V2_PERMANENT_WIDTH 1
+
/* MC_CMD_CLP_OUT_GET_MAC msgresponse */
#define MC_CMD_CLP_OUT_GET_MAC_LEN 8
/* MAC address assigned to port */
@@ -6204,6 +6518,7 @@
/* MC_CMD_MUM_IN_WRITE msgrequest */
#define MC_CMD_MUM_IN_WRITE_LENMIN 16
#define MC_CMD_MUM_IN_WRITE_LENMAX 252
+#define MC_CMD_MUM_IN_WRITE_LENMAX_MCDI2 1020
#define MC_CMD_MUM_IN_WRITE_LEN(num) (12+4*(num))
/* MUM cmd header */
/* MC_CMD_MUM_IN_CMD_OFST 0 */
@@ -6221,10 +6536,12 @@
#define MC_CMD_MUM_IN_WRITE_BUFFER_LEN 4
#define MC_CMD_MUM_IN_WRITE_BUFFER_MINNUM 1
#define MC_CMD_MUM_IN_WRITE_BUFFER_MAXNUM 60
+#define MC_CMD_MUM_IN_WRITE_BUFFER_MAXNUM_MCDI2 252
/* MC_CMD_MUM_IN_RAW_CMD msgrequest */
#define MC_CMD_MUM_IN_RAW_CMD_LENMIN 17
#define MC_CMD_MUM_IN_RAW_CMD_LENMAX 252
+#define MC_CMD_MUM_IN_RAW_CMD_LENMAX_MCDI2 1020
#define MC_CMD_MUM_IN_RAW_CMD_LEN(num) (16+1*(num))
/* MUM cmd header */
/* MC_CMD_MUM_IN_CMD_OFST 0 */
@@ -6243,6 +6560,7 @@
#define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_LEN 1
#define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_MINNUM 1
#define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_MAXNUM 236
+#define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_MAXNUM_MCDI2 1004
/* MC_CMD_MUM_IN_LOG msgrequest */
#define MC_CMD_MUM_IN_LOG_LEN 8
@@ -6529,21 +6847,25 @@
/* MC_CMD_MUM_OUT_RAW_CMD msgresponse */
#define MC_CMD_MUM_OUT_RAW_CMD_LENMIN 1
#define MC_CMD_MUM_OUT_RAW_CMD_LENMAX 252
+#define MC_CMD_MUM_OUT_RAW_CMD_LENMAX_MCDI2 1020
#define MC_CMD_MUM_OUT_RAW_CMD_LEN(num) (0+1*(num))
/* returned data */
#define MC_CMD_MUM_OUT_RAW_CMD_DATA_OFST 0
#define MC_CMD_MUM_OUT_RAW_CMD_DATA_LEN 1
#define MC_CMD_MUM_OUT_RAW_CMD_DATA_MINNUM 1
#define MC_CMD_MUM_OUT_RAW_CMD_DATA_MAXNUM 252
+#define MC_CMD_MUM_OUT_RAW_CMD_DATA_MAXNUM_MCDI2 1020
/* MC_CMD_MUM_OUT_READ msgresponse */
#define MC_CMD_MUM_OUT_READ_LENMIN 4
#define MC_CMD_MUM_OUT_READ_LENMAX 252
+#define MC_CMD_MUM_OUT_READ_LENMAX_MCDI2 1020
#define MC_CMD_MUM_OUT_READ_LEN(num) (0+4*(num))
#define MC_CMD_MUM_OUT_READ_BUFFER_OFST 0
#define MC_CMD_MUM_OUT_READ_BUFFER_LEN 4
#define MC_CMD_MUM_OUT_READ_BUFFER_MINNUM 1
#define MC_CMD_MUM_OUT_READ_BUFFER_MAXNUM 63
+#define MC_CMD_MUM_OUT_READ_BUFFER_MAXNUM_MCDI2 255
/* MC_CMD_MUM_OUT_WRITE msgresponse */
#define MC_CMD_MUM_OUT_WRITE_LEN 0
@@ -6602,11 +6924,13 @@
/* MC_CMD_MUM_OUT_READ_SENSORS msgresponse */
#define MC_CMD_MUM_OUT_READ_SENSORS_LENMIN 4
#define MC_CMD_MUM_OUT_READ_SENSORS_LENMAX 252
+#define MC_CMD_MUM_OUT_READ_SENSORS_LENMAX_MCDI2 1020
#define MC_CMD_MUM_OUT_READ_SENSORS_LEN(num) (0+4*(num))
#define MC_CMD_MUM_OUT_READ_SENSORS_DATA_OFST 0
#define MC_CMD_MUM_OUT_READ_SENSORS_DATA_LEN 4
#define MC_CMD_MUM_OUT_READ_SENSORS_DATA_MINNUM 1
#define MC_CMD_MUM_OUT_READ_SENSORS_DATA_MAXNUM 63
+#define MC_CMD_MUM_OUT_READ_SENSORS_DATA_MAXNUM_MCDI2 255
#define MC_CMD_MUM_OUT_READ_SENSORS_READING_LBN 0
#define MC_CMD_MUM_OUT_READ_SENSORS_READING_WIDTH 16
#define MC_CMD_MUM_OUT_READ_SENSORS_STATE_LBN 16
@@ -6649,6 +6973,7 @@
/* MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO msgresponse */
#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LENMIN 5
#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LENMAX 252
+#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LENMAX_MCDI2 1020
#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LEN(num) (4+1*(num))
/* in bytes */
#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATALEN_OFST 0
@@ -6657,6 +6982,7 @@
#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_LEN 1
#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_MINNUM 1
#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_MAXNUM 248
+#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_MAXNUM_MCDI2 1016
/* MC_CMD_MUM_OUT_QSFP_FILL_STATS msgresponse */
#define MC_CMD_MUM_OUT_QSFP_FILL_STATS_LEN 8
@@ -6673,6 +6999,7 @@
/* MC_CMD_MUM_OUT_READ_DDR_INFO msgresponse */
#define MC_CMD_MUM_OUT_READ_DDR_INFO_LENMIN 24
#define MC_CMD_MUM_OUT_READ_DDR_INFO_LENMAX 248
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_LENMAX_MCDI2 1016
#define MC_CMD_MUM_OUT_READ_DDR_INFO_LEN(num) (8+8*(num))
/* Discrete (soldered) DDR resistor strap info */
#define MC_CMD_MUM_OUT_READ_DDR_INFO_DISCRETE_DDR_INFO_OFST 0
@@ -6691,6 +7018,7 @@
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_OFST 12
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MINNUM 2
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MAXNUM 30
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MAXNUM_MCDI2 126
#define MC_CMD_MUM_OUT_READ_DDR_INFO_BANK_ID_LBN 0
#define MC_CMD_MUM_OUT_READ_DDR_INFO_BANK_ID_WIDTH 8
/* enum: SODIMM bank 1 (Top SODIMM for Sorrento) */
@@ -6893,6 +7221,14 @@
* subset of the information stored in this partition.
*/
#define NVRAM_PARTITION_TYPE_FRU_INFORMATION 0x1d00
+/* enum: Bundle image partition */
+#define NVRAM_PARTITION_TYPE_BUNDLE 0x1e00
+/* enum: Bundle metadata partition that holds additional information related to
+ * a bundle update in TLV format
+ */
+#define NVRAM_PARTITION_TYPE_BUNDLE_METADATA 0x1e01
+/* enum: Bundle update non-volatile log output partition */
+#define NVRAM_PARTITION_TYPE_BUNDLE_LOG 0x1e02
/* enum: Start of reserved value range (firmware may use for any purpose) */
#define NVRAM_PARTITION_TYPE_RESERVED_VALUES_MIN 0xff00
/* enum: End of reserved value range (firmware may use for any purpose) */
@@ -7191,6 +7527,7 @@
/* MC_CMD_INIT_EVQ_IN msgrequest */
#define MC_CMD_INIT_EVQ_IN_LENMIN 44
#define MC_CMD_INIT_EVQ_IN_LENMAX 548
+#define MC_CMD_INIT_EVQ_IN_LENMAX_MCDI2 548
#define MC_CMD_INIT_EVQ_IN_LEN(num) (36+8*(num))
/* Size, in entries */
#define MC_CMD_INIT_EVQ_IN_SIZE_OFST 0
@@ -7264,6 +7601,7 @@
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_OFST 40
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MAXNUM 64
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MAXNUM_MCDI2 64
/* MC_CMD_INIT_EVQ_OUT msgresponse */
#define MC_CMD_INIT_EVQ_OUT_LEN 4
@@ -7274,6 +7612,7 @@
/* MC_CMD_INIT_EVQ_V2_IN msgrequest */
#define MC_CMD_INIT_EVQ_V2_IN_LENMIN 44
#define MC_CMD_INIT_EVQ_V2_IN_LENMAX 548
+#define MC_CMD_INIT_EVQ_V2_IN_LENMAX_MCDI2 548
#define MC_CMD_INIT_EVQ_V2_IN_LEN(num) (36+8*(num))
/* Size, in entries */
#define MC_CMD_INIT_EVQ_V2_IN_SIZE_OFST 0
@@ -7368,6 +7707,7 @@
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_HI_OFST 40
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MAXNUM 64
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MAXNUM_MCDI2 64
/* MC_CMD_INIT_EVQ_V2_OUT msgresponse */
#define MC_CMD_INIT_EVQ_V2_OUT_LEN 8
@@ -7422,6 +7762,7 @@
*/
#define MC_CMD_INIT_RXQ_IN_LENMIN 36
#define MC_CMD_INIT_RXQ_IN_LENMAX 252
+#define MC_CMD_INIT_RXQ_IN_LENMAX_MCDI2 1020
#define MC_CMD_INIT_RXQ_IN_LEN(num) (28+8*(num))
/* Size, in entries */
#define MC_CMD_INIT_RXQ_IN_SIZE_OFST 0
@@ -7470,6 +7811,7 @@
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_OFST 32
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MAXNUM 28
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MAXNUM_MCDI2 124
/* MC_CMD_INIT_RXQ_EXT_IN msgrequest: Extended RXQ_INIT with additional mode
* flags
@@ -7539,6 +7881,8 @@
#define MC_CMD_INIT_RXQ_EXT_IN_FLAG_WANT_OUTER_CLASSES_WIDTH 1
#define MC_CMD_INIT_RXQ_EXT_IN_FLAG_FORCE_EV_MERGING_LBN 19
#define MC_CMD_INIT_RXQ_EXT_IN_FLAG_FORCE_EV_MERGING_WIDTH 1
+#define MC_CMD_INIT_RXQ_EXT_IN_FLAG_NO_CONT_EV_LBN 20
+#define MC_CMD_INIT_RXQ_EXT_IN_FLAG_NO_CONT_EV_WIDTH 1
/* Owner ID to use if in buffer mode (zero if physical) */
#define MC_CMD_INIT_RXQ_EXT_IN_OWNER_ID_OFST 20
#define MC_CMD_INIT_RXQ_EXT_IN_OWNER_ID_LEN 4
@@ -7621,6 +7965,8 @@
#define MC_CMD_INIT_RXQ_V3_IN_FLAG_WANT_OUTER_CLASSES_WIDTH 1
#define MC_CMD_INIT_RXQ_V3_IN_FLAG_FORCE_EV_MERGING_LBN 19
#define MC_CMD_INIT_RXQ_V3_IN_FLAG_FORCE_EV_MERGING_WIDTH 1
+#define MC_CMD_INIT_RXQ_V3_IN_FLAG_NO_CONT_EV_LBN 20
+#define MC_CMD_INIT_RXQ_V3_IN_FLAG_NO_CONT_EV_WIDTH 1
/* Owner ID to use if in buffer mode (zero if physical) */
#define MC_CMD_INIT_RXQ_V3_IN_OWNER_ID_OFST 20
#define MC_CMD_INIT_RXQ_V3_IN_OWNER_ID_LEN 4
@@ -7664,6 +8010,132 @@
#define MC_CMD_INIT_RXQ_V3_IN_ES_HEAD_OF_LINE_BLOCK_TIMEOUT_OFST 556
#define MC_CMD_INIT_RXQ_V3_IN_ES_HEAD_OF_LINE_BLOCK_TIMEOUT_LEN 4
+/* MC_CMD_INIT_RXQ_V4_IN msgrequest: INIT_RXQ request with new field required
+ * for systems with a QDMA (currently, Riverhead)
+ */
+#define MC_CMD_INIT_RXQ_V4_IN_LEN 564
+/* Size, in entries */
+#define MC_CMD_INIT_RXQ_V4_IN_SIZE_OFST 0
+#define MC_CMD_INIT_RXQ_V4_IN_SIZE_LEN 4
+/* The EVQ to send events to. This is an index originally specified to
+ * INIT_EVQ. If DMA_MODE == PACKED_STREAM this must be equal to INSTANCE.
+ */
+#define MC_CMD_INIT_RXQ_V4_IN_TARGET_EVQ_OFST 4
+#define MC_CMD_INIT_RXQ_V4_IN_TARGET_EVQ_LEN 4
+/* The value to put in the event data. Check hardware spec. for valid range.
+ * This field is ignored if DMA_MODE == EQUAL_STRIDE_SUPER_BUFFER or DMA_MODE
+ * == PACKED_STREAM.
+ */
+#define MC_CMD_INIT_RXQ_V4_IN_LABEL_OFST 8
+#define MC_CMD_INIT_RXQ_V4_IN_LABEL_LEN 4
+/* Desired instance. Must be set to a specific instance, which is a function
+ * local queue index.
+ */
+#define MC_CMD_INIT_RXQ_V4_IN_INSTANCE_OFST 12
+#define MC_CMD_INIT_RXQ_V4_IN_INSTANCE_LEN 4
+/* There will be more flags here. */
+#define MC_CMD_INIT_RXQ_V4_IN_FLAGS_OFST 16
+#define MC_CMD_INIT_RXQ_V4_IN_FLAGS_LEN 4
+#define MC_CMD_INIT_RXQ_V4_IN_FLAG_BUFF_MODE_LBN 0
+#define MC_CMD_INIT_RXQ_V4_IN_FLAG_BUFF_MODE_WIDTH 1
+#define MC_CMD_INIT_RXQ_V4_IN_FLAG_HDR_SPLIT_LBN 1
+#define MC_CMD_INIT_RXQ_V4_IN_FLAG_HDR_SPLIT_WIDTH 1
+#define MC_CMD_INIT_RXQ_V4_IN_FLAG_TIMESTAMP_LBN 2
+#define MC_CMD_INIT_RXQ_V4_IN_FLAG_TIMESTAMP_WIDTH 1
+#define MC_CMD_INIT_RXQ_V4_IN_CRC_MODE_LBN 3
+#define MC_CMD_INIT_RXQ_V4_IN_CRC_MODE_WIDTH 4
+#define MC_CMD_INIT_RXQ_V4_IN_FLAG_CHAIN_LBN 7
+#define MC_CMD_INIT_RXQ_V4_IN_FLAG_CHAIN_WIDTH 1
+#define MC_CMD_INIT_RXQ_V4_IN_FLAG_PREFIX_LBN 8
+#define MC_CMD_INIT_RXQ_V4_IN_FLAG_PREFIX_WIDTH 1
+#define MC_CMD_INIT_RXQ_V4_IN_FLAG_DISABLE_SCATTER_LBN 9
+#define MC_CMD_INIT_RXQ_V4_IN_FLAG_DISABLE_SCATTER_WIDTH 1
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_MODE_LBN 10
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_MODE_WIDTH 4
+/* enum: One packet per descriptor (for normal networking) */
+#define MC_CMD_INIT_RXQ_V4_IN_SINGLE_PACKET 0x0
+/* enum: Pack multiple packets into large descriptors (for SolarCapture) */
+#define MC_CMD_INIT_RXQ_V4_IN_PACKED_STREAM 0x1
+/* enum: Pack multiple packets into large descriptors using the format designed
+ * to maximise packet rate. This mode uses 1 "bucket" per descriptor with
+ * multiple fixed-size packet buffers within each bucket. For a full
+ * description see SF-119419-TC. This mode is only supported by "dpdk" datapath
+ * firmware.
+ */
+#define MC_CMD_INIT_RXQ_V4_IN_EQUAL_STRIDE_SUPER_BUFFER 0x2
+/* enum: Deprecated name for EQUAL_STRIDE_SUPER_BUFFER. */
+#define MC_CMD_INIT_RXQ_V4_IN_EQUAL_STRIDE_PACKED_STREAM 0x2
+#define MC_CMD_INIT_RXQ_V4_IN_FLAG_SNAPSHOT_MODE_LBN 14
+#define MC_CMD_INIT_RXQ_V4_IN_FLAG_SNAPSHOT_MODE_WIDTH 1
+#define MC_CMD_INIT_RXQ_V4_IN_PACKED_STREAM_BUFF_SIZE_LBN 15
+#define MC_CMD_INIT_RXQ_V4_IN_PACKED_STREAM_BUFF_SIZE_WIDTH 3
+#define MC_CMD_INIT_RXQ_V4_IN_PS_BUFF_1M 0x0 /* enum */
+#define MC_CMD_INIT_RXQ_V4_IN_PS_BUFF_512K 0x1 /* enum */
+#define MC_CMD_INIT_RXQ_V4_IN_PS_BUFF_256K 0x2 /* enum */
+#define MC_CMD_INIT_RXQ_V4_IN_PS_BUFF_128K 0x3 /* enum */
+#define MC_CMD_INIT_RXQ_V4_IN_PS_BUFF_64K 0x4 /* enum */
+#define MC_CMD_INIT_RXQ_V4_IN_FLAG_WANT_OUTER_CLASSES_LBN 18
+#define MC_CMD_INIT_RXQ_V4_IN_FLAG_WANT_OUTER_CLASSES_WIDTH 1
+#define MC_CMD_INIT_RXQ_V4_IN_FLAG_FORCE_EV_MERGING_LBN 19
+#define MC_CMD_INIT_RXQ_V4_IN_FLAG_FORCE_EV_MERGING_WIDTH 1
+#define MC_CMD_INIT_RXQ_V4_IN_FLAG_NO_CONT_EV_LBN 20
+#define MC_CMD_INIT_RXQ_V4_IN_FLAG_NO_CONT_EV_WIDTH 1
+/* Owner ID to use if in buffer mode (zero if physical) */
+#define MC_CMD_INIT_RXQ_V4_IN_OWNER_ID_OFST 20
+#define MC_CMD_INIT_RXQ_V4_IN_OWNER_ID_LEN 4
+/* The port ID associated with the v-adaptor which should contain this DMAQ. */
+#define MC_CMD_INIT_RXQ_V4_IN_PORT_ID_OFST 24
+#define MC_CMD_INIT_RXQ_V4_IN_PORT_ID_LEN 4
+/* 64-bit address of 4k of 4k-aligned host memory buffer */
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_OFST 28
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LEN 8
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_NUM 64
+/* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */
+#define MC_CMD_INIT_RXQ_V4_IN_SNAPSHOT_LENGTH_OFST 540
+#define MC_CMD_INIT_RXQ_V4_IN_SNAPSHOT_LENGTH_LEN 4
+/* The number of packet buffers that will be contained within each
+ * EQUAL_STRIDE_SUPER_BUFFER format bucket supplied by the driver. This field
+ * is ignored unless DMA_MODE == EQUAL_STRIDE_SUPER_BUFFER.
+ */
+#define MC_CMD_INIT_RXQ_V4_IN_ES_PACKET_BUFFERS_PER_BUCKET_OFST 544
+#define MC_CMD_INIT_RXQ_V4_IN_ES_PACKET_BUFFERS_PER_BUCKET_LEN 4
+/* The length in bytes of the area in each packet buffer that can be written to
+ * by the adapter. This is used to store the packet prefix and the packet
+ * payload. This length does not include any end padding added by the driver.
+ * This field is ignored unless DMA_MODE == EQUAL_STRIDE_SUPER_BUFFER.
+ */
+#define MC_CMD_INIT_RXQ_V4_IN_ES_MAX_DMA_LEN_OFST 548
+#define MC_CMD_INIT_RXQ_V4_IN_ES_MAX_DMA_LEN_LEN 4
+/* The length in bytes of a single packet buffer within a
+ * EQUAL_STRIDE_SUPER_BUFFER format bucket. This field is ignored unless
+ * DMA_MODE == EQUAL_STRIDE_SUPER_BUFFER.
+ */
+#define MC_CMD_INIT_RXQ_V4_IN_ES_PACKET_STRIDE_OFST 552
+#define MC_CMD_INIT_RXQ_V4_IN_ES_PACKET_STRIDE_LEN 4
+/* The maximum time in nanoseconds that the datapath will be backpressured if
+ * there are no RX descriptors available. If the timeout is reached and there
+ * are still no descriptors then the packet will be dropped. A timeout of 0
+ * means the datapath will never be blocked. This field is ignored unless
+ * DMA_MODE == EQUAL_STRIDE_SUPER_BUFFER.
+ */
+#define MC_CMD_INIT_RXQ_V4_IN_ES_HEAD_OF_LINE_BLOCK_TIMEOUT_OFST 556
+#define MC_CMD_INIT_RXQ_V4_IN_ES_HEAD_OF_LINE_BLOCK_TIMEOUT_LEN 4
+/* V4 message data */
+#define MC_CMD_INIT_RXQ_V4_IN_V4_DATA_OFST 560
+#define MC_CMD_INIT_RXQ_V4_IN_V4_DATA_LEN 4
+/* Size in bytes of buffers attached to descriptors posted to this queue. Set
+ * to zero if using this message on non-QDMA based platforms. Currently in
+ * Riverhead there is a global limit of eight different buffer sizes across all
+ * active queues. A 2KB and 4KB buffer is guaranteed to be available, but a
+ * request for a different buffer size will fail if there are already eight
+ * other buffer sizes in use. In future Riverhead this limit will go away and
+ * any size will be accepted.
+ */
+#define MC_CMD_INIT_RXQ_V4_IN_BUFFER_SIZE_BYTES_OFST 560
+#define MC_CMD_INIT_RXQ_V4_IN_BUFFER_SIZE_BYTES_LEN 4
+
/* MC_CMD_INIT_RXQ_OUT msgresponse */
#define MC_CMD_INIT_RXQ_OUT_LEN 0
@@ -7673,6 +8145,9 @@
/* MC_CMD_INIT_RXQ_V3_OUT msgresponse */
#define MC_CMD_INIT_RXQ_V3_OUT_LEN 0
+/* MC_CMD_INIT_RXQ_V4_OUT msgresponse */
+#define MC_CMD_INIT_RXQ_V4_OUT_LEN 0
+
/***********************************/
/* MC_CMD_INIT_TXQ
@@ -7687,6 +8162,7 @@
*/
#define MC_CMD_INIT_TXQ_IN_LENMIN 36
#define MC_CMD_INIT_TXQ_IN_LENMAX 252
+#define MC_CMD_INIT_TXQ_IN_LENMAX_MCDI2 1020
#define MC_CMD_INIT_TXQ_IN_LEN(num) (28+8*(num))
/* Size, in entries */
#define MC_CMD_INIT_TXQ_IN_SIZE_OFST 0
@@ -7738,6 +8214,7 @@
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_OFST 32
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MAXNUM 28
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MAXNUM_MCDI2 124
/* MC_CMD_INIT_TXQ_EXT_IN msgrequest: Extended INIT_TXQ with additional mode
* flags
@@ -7799,6 +8276,7 @@
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_OFST 32
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MAXNUM 64
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MAXNUM_MCDI2 64
/* Flags related to Qbb flow control mode. */
#define MC_CMD_INIT_TXQ_EXT_IN_QBB_FLAGS_OFST 540
#define MC_CMD_INIT_TXQ_EXT_IN_QBB_FLAGS_LEN 4
@@ -8153,6 +8631,7 @@
/* MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN msgrequest */
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LENMIN 20
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LENMAX 268
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LENMAX_MCDI2 268
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LEN(num) (12+8*(num))
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_HANDLE_OFST 0
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_HANDLE_LEN 4
@@ -8169,6 +8648,7 @@
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_OFST 16
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MINNUM 1
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MAXNUM 32
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MAXNUM_MCDI2 32
/* MC_CMD_PROGRAM_BUFTBL_ENTRIES_OUT msgresponse */
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_OUT_LEN 0
@@ -8931,6 +9411,7 @@
/* MC_CMD_GET_PARSER_DISP_INFO_OUT msgresponse */
#define MC_CMD_GET_PARSER_DISP_INFO_OUT_LENMIN 8
#define MC_CMD_GET_PARSER_DISP_INFO_OUT_LENMAX 252
+#define MC_CMD_GET_PARSER_DISP_INFO_OUT_LENMAX_MCDI2 1020
#define MC_CMD_GET_PARSER_DISP_INFO_OUT_LEN(num) (8+4*(num))
/* identifies the type of operation requested */
#define MC_CMD_GET_PARSER_DISP_INFO_OUT_OP_OFST 0
@@ -8947,6 +9428,7 @@
#define MC_CMD_GET_PARSER_DISP_INFO_OUT_SUPPORTED_MATCHES_LEN 4
#define MC_CMD_GET_PARSER_DISP_INFO_OUT_SUPPORTED_MATCHES_MINNUM 0
#define MC_CMD_GET_PARSER_DISP_INFO_OUT_SUPPORTED_MATCHES_MAXNUM 61
+#define MC_CMD_GET_PARSER_DISP_INFO_OUT_SUPPORTED_MATCHES_MAXNUM_MCDI2 253
/* MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT msgresponse */
#define MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_LEN 8
@@ -9708,6 +10190,7 @@
*/
#define MC_CMD_SATELLITE_DOWNLOAD_IN_LENMIN 20
#define MC_CMD_SATELLITE_DOWNLOAD_IN_LENMAX 252
+#define MC_CMD_SATELLITE_DOWNLOAD_IN_LENMAX_MCDI2 1020
#define MC_CMD_SATELLITE_DOWNLOAD_IN_LEN(num) (16+4*(num))
/* Download phase. (Note: the IDLE phase is used internally and is never valid
* in a command from the host.)
@@ -9773,6 +10256,7 @@
#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_DATA_LEN 4
#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_DATA_MINNUM 1
#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_DATA_MAXNUM 59
+#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_DATA_MAXNUM_MCDI2 251
/* MC_CMD_SATELLITE_DOWNLOAD_OUT msgresponse */
#define MC_CMD_SATELLITE_DOWNLOAD_OUT_LEN 8
@@ -9948,6 +10432,9 @@
* development only)
*/
#define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_FIRST_PKT 0x1
+/* enum: RX PD firmware for telemetry prototyping (Medford2 development only)
+ */
+#define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_TESTFW_TELEMETRY 0x1
/* enum: RX PD firmware with approximately Siena-compatible behaviour
* (Huntington development only)
*/
@@ -9994,6 +10481,9 @@
* development only)
*/
#define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_TYPE_FIRST_PKT 0x1
+/* enum: TX PD firmware for telemetry prototyping (Medford2 development only)
+ */
+#define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_TYPE_TESTFW_TELEMETRY 0x1
/* enum: TX PD firmware with approximately Siena-compatible behaviour
* (Huntington development only)
*/
@@ -10162,6 +10652,9 @@
* development only)
*/
#define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_TYPE_FIRST_PKT 0x1
+/* enum: RX PD firmware for telemetry prototyping (Medford2 development only)
+ */
+#define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_TYPE_TESTFW_TELEMETRY 0x1
/* enum: RX PD firmware with approximately Siena-compatible behaviour
* (Huntington development only)
*/
@@ -10208,6 +10701,9 @@
* development only)
*/
#define MC_CMD_GET_CAPABILITIES_V2_OUT_TXPD_FW_TYPE_FIRST_PKT 0x1
+/* enum: TX PD firmware for telemetry prototyping (Medford2 development only)
+ */
+#define MC_CMD_GET_CAPABILITIES_V2_OUT_TXPD_FW_TYPE_TESTFW_TELEMETRY 0x1
/* enum: TX PD firmware with approximately Siena-compatible behaviour
* (Huntington development only)
*/
@@ -10296,6 +10792,12 @@
#define MC_CMD_GET_CAPABILITIES_V2_OUT_VI_SPREADING_WIDTH 1
#define MC_CMD_GET_CAPABILITIES_V2_OUT_RXDP_HLB_IDLE_LBN 25
#define MC_CMD_GET_CAPABILITIES_V2_OUT_RXDP_HLB_IDLE_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V2_OUT_INIT_RXQ_NO_CONT_EV_LBN 26
+#define MC_CMD_GET_CAPABILITIES_V2_OUT_INIT_RXQ_NO_CONT_EV_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V2_OUT_INIT_RXQ_WITH_BUFFER_SIZE_LBN 27
+#define MC_CMD_GET_CAPABILITIES_V2_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V2_OUT_BUNDLE_UPDATE_LBN 28
+#define MC_CMD_GET_CAPABILITIES_V2_OUT_BUNDLE_UPDATE_WIDTH 1
/* Number of FATSOv2 contexts per datapath supported by this NIC. Not present
* on older firmware (check the length).
*/
@@ -10485,6 +10987,9 @@
* development only)
*/
#define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_TYPE_FIRST_PKT 0x1
+/* enum: RX PD firmware for telemetry prototyping (Medford2 development only)
+ */
+#define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_TYPE_TESTFW_TELEMETRY 0x1
/* enum: RX PD firmware with approximately Siena-compatible behaviour
* (Huntington development only)
*/
@@ -10531,6 +11036,9 @@
* development only)
*/
#define MC_CMD_GET_CAPABILITIES_V3_OUT_TXPD_FW_TYPE_FIRST_PKT 0x1
+/* enum: TX PD firmware for telemetry prototyping (Medford2 development only)
+ */
+#define MC_CMD_GET_CAPABILITIES_V3_OUT_TXPD_FW_TYPE_TESTFW_TELEMETRY 0x1
/* enum: TX PD firmware with approximately Siena-compatible behaviour
* (Huntington development only)
*/
@@ -10619,6 +11127,12 @@
#define MC_CMD_GET_CAPABILITIES_V3_OUT_VI_SPREADING_WIDTH 1
#define MC_CMD_GET_CAPABILITIES_V3_OUT_RXDP_HLB_IDLE_LBN 25
#define MC_CMD_GET_CAPABILITIES_V3_OUT_RXDP_HLB_IDLE_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V3_OUT_INIT_RXQ_NO_CONT_EV_LBN 26
+#define MC_CMD_GET_CAPABILITIES_V3_OUT_INIT_RXQ_NO_CONT_EV_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V3_OUT_INIT_RXQ_WITH_BUFFER_SIZE_LBN 27
+#define MC_CMD_GET_CAPABILITIES_V3_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V3_OUT_BUNDLE_UPDATE_LBN 28
+#define MC_CMD_GET_CAPABILITIES_V3_OUT_BUNDLE_UPDATE_WIDTH 1
/* Number of FATSOv2 contexts per datapath supported by this NIC. Not present
* on older firmware (check the length).
*/
@@ -10833,6 +11347,9 @@
* development only)
*/
#define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_TYPE_FIRST_PKT 0x1
+/* enum: RX PD firmware for telemetry prototyping (Medford2 development only)
+ */
+#define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_TYPE_TESTFW_TELEMETRY 0x1
/* enum: RX PD firmware with approximately Siena-compatible behaviour
* (Huntington development only)
*/
@@ -10879,6 +11396,9 @@
* development only)
*/
#define MC_CMD_GET_CAPABILITIES_V4_OUT_TXPD_FW_TYPE_FIRST_PKT 0x1
+/* enum: TX PD firmware for telemetry prototyping (Medford2 development only)
+ */
+#define MC_CMD_GET_CAPABILITIES_V4_OUT_TXPD_FW_TYPE_TESTFW_TELEMETRY 0x1
/* enum: TX PD firmware with approximately Siena-compatible behaviour
* (Huntington development only)
*/
@@ -10967,6 +11487,12 @@
#define MC_CMD_GET_CAPABILITIES_V4_OUT_VI_SPREADING_WIDTH 1
#define MC_CMD_GET_CAPABILITIES_V4_OUT_RXDP_HLB_IDLE_LBN 25
#define MC_CMD_GET_CAPABILITIES_V4_OUT_RXDP_HLB_IDLE_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V4_OUT_INIT_RXQ_NO_CONT_EV_LBN 26
+#define MC_CMD_GET_CAPABILITIES_V4_OUT_INIT_RXQ_NO_CONT_EV_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V4_OUT_INIT_RXQ_WITH_BUFFER_SIZE_LBN 27
+#define MC_CMD_GET_CAPABILITIES_V4_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V4_OUT_BUNDLE_UPDATE_LBN 28
+#define MC_CMD_GET_CAPABILITIES_V4_OUT_BUNDLE_UPDATE_WIDTH 1
/* Number of FATSOv2 contexts per datapath supported by this NIC. Not present
* on older firmware (check the length).
*/
@@ -11189,6 +11715,9 @@
* development only)
*/
#define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_TYPE_FIRST_PKT 0x1
+/* enum: RX PD firmware for telemetry prototyping (Medford2 development only)
+ */
+#define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_TYPE_TESTFW_TELEMETRY 0x1
/* enum: RX PD firmware with approximately Siena-compatible behaviour
* (Huntington development only)
*/
@@ -11235,6 +11764,9 @@
* development only)
*/
#define MC_CMD_GET_CAPABILITIES_V5_OUT_TXPD_FW_TYPE_FIRST_PKT 0x1
+/* enum: TX PD firmware for telemetry prototyping (Medford2 development only)
+ */
+#define MC_CMD_GET_CAPABILITIES_V5_OUT_TXPD_FW_TYPE_TESTFW_TELEMETRY 0x1
/* enum: TX PD firmware with approximately Siena-compatible behaviour
* (Huntington development only)
*/
@@ -11323,6 +11855,12 @@
#define MC_CMD_GET_CAPABILITIES_V5_OUT_VI_SPREADING_WIDTH 1
#define MC_CMD_GET_CAPABILITIES_V5_OUT_RXDP_HLB_IDLE_LBN 25
#define MC_CMD_GET_CAPABILITIES_V5_OUT_RXDP_HLB_IDLE_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V5_OUT_INIT_RXQ_NO_CONT_EV_LBN 26
+#define MC_CMD_GET_CAPABILITIES_V5_OUT_INIT_RXQ_NO_CONT_EV_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V5_OUT_INIT_RXQ_WITH_BUFFER_SIZE_LBN 27
+#define MC_CMD_GET_CAPABILITIES_V5_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V5_OUT_BUNDLE_UPDATE_LBN 28
+#define MC_CMD_GET_CAPABILITIES_V5_OUT_BUNDLE_UPDATE_WIDTH 1
/* Number of FATSOv2 contexts per datapath supported by this NIC. Not present
* on older firmware (check the length).
*/
@@ -12531,6 +13069,7 @@
/* MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT msgresponse */
#define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_LENMIN 4
#define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_LENMAX 250
+#define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_LENMAX_MCDI2 1018
#define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_LEN(num) (4+6*(num))
/* The number of MAC addresses returned */
#define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_COUNT_OFST 0
@@ -12540,6 +13079,7 @@
#define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_LEN 6
#define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_MINNUM 0
#define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_MAXNUM 41
+#define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_MAXNUM_MCDI2 169
/***********************************/
@@ -12645,12 +13185,14 @@
/* MC_CMD_DUMP_BUFTBL_ENTRIES_OUT msgresponse */
#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_LENMIN 12
#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_LENMAX 252
+#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_LENMAX_MCDI2 1020
#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_LEN(num) (0+12*(num))
/* Raw buffer table entries, layed out as BUFTBL_ENTRY. */
#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_OFST 0
#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_LEN 12
#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_MINNUM 1
#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_MAXNUM 21
+#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_MAXNUM_MCDI2 85
/***********************************/
@@ -12979,6 +13521,7 @@
/* MC_CMD_CAP_BLK_READ_OUT msgresponse */
#define MC_CMD_CAP_BLK_READ_OUT_LENMIN 8
#define MC_CMD_CAP_BLK_READ_OUT_LENMAX 248
+#define MC_CMD_CAP_BLK_READ_OUT_LENMAX_MCDI2 1016
#define MC_CMD_CAP_BLK_READ_OUT_LEN(num) (0+8*(num))
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_OFST 0
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LEN 8
@@ -12986,6 +13529,7 @@
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_OFST 4
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MINNUM 1
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MAXNUM 31
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MAXNUM_MCDI2 127
/***********************************/
@@ -13215,6 +13759,7 @@
/* MC_CMD_UART_SEND_DATA_OUT msgrequest */
#define MC_CMD_UART_SEND_DATA_OUT_LENMIN 16
#define MC_CMD_UART_SEND_DATA_OUT_LENMAX 252
+#define MC_CMD_UART_SEND_DATA_OUT_LENMAX_MCDI2 1020
#define MC_CMD_UART_SEND_DATA_OUT_LEN(num) (16+1*(num))
/* CRC32 over OFFSET, LENGTH, RESERVED, DATA */
#define MC_CMD_UART_SEND_DATA_OUT_CHECKSUM_OFST 0
@@ -13232,6 +13777,7 @@
#define MC_CMD_UART_SEND_DATA_OUT_DATA_LEN 1
#define MC_CMD_UART_SEND_DATA_OUT_DATA_MINNUM 0
#define MC_CMD_UART_SEND_DATA_OUT_DATA_MAXNUM 236
+#define MC_CMD_UART_SEND_DATA_OUT_DATA_MAXNUM_MCDI2 1004
/* MC_CMD_UART_SEND_DATA_IN msgresponse */
#define MC_CMD_UART_SEND_DATA_IN_LEN 0
@@ -13265,6 +13811,7 @@
/* MC_CMD_UART_RECV_DATA_IN msgresponse */
#define MC_CMD_UART_RECV_DATA_IN_LENMIN 16
#define MC_CMD_UART_RECV_DATA_IN_LENMAX 252
+#define MC_CMD_UART_RECV_DATA_IN_LENMAX_MCDI2 1020
#define MC_CMD_UART_RECV_DATA_IN_LEN(num) (16+1*(num))
/* CRC32 over RESERVED1, RESERVED2, RESERVED3, DATA */
#define MC_CMD_UART_RECV_DATA_IN_CHECKSUM_OFST 0
@@ -13282,6 +13829,7 @@
#define MC_CMD_UART_RECV_DATA_IN_DATA_LEN 1
#define MC_CMD_UART_RECV_DATA_IN_DATA_MINNUM 0
#define MC_CMD_UART_RECV_DATA_IN_DATA_MAXNUM 236
+#define MC_CMD_UART_RECV_DATA_IN_DATA_MAXNUM_MCDI2 1004
/***********************************/
@@ -13305,6 +13853,7 @@
/* MC_CMD_READ_FUSES_OUT msgresponse */
#define MC_CMD_READ_FUSES_OUT_LENMIN 4
#define MC_CMD_READ_FUSES_OUT_LENMAX 252
+#define MC_CMD_READ_FUSES_OUT_LENMAX_MCDI2 1020
#define MC_CMD_READ_FUSES_OUT_LEN(num) (4+1*(num))
/* Length of returned OTP data in bytes */
#define MC_CMD_READ_FUSES_OUT_LENGTH_OFST 0
@@ -13314,6 +13863,7 @@
#define MC_CMD_READ_FUSES_OUT_DATA_LEN 1
#define MC_CMD_READ_FUSES_OUT_DATA_MINNUM 0
#define MC_CMD_READ_FUSES_OUT_DATA_MAXNUM 248
+#define MC_CMD_READ_FUSES_OUT_DATA_MAXNUM_MCDI2 1016
/***********************************/
@@ -13328,6 +13878,7 @@
/* MC_CMD_KR_TUNE_IN msgrequest */
#define MC_CMD_KR_TUNE_IN_LENMIN 4
#define MC_CMD_KR_TUNE_IN_LENMAX 252
+#define MC_CMD_KR_TUNE_IN_LENMAX_MCDI2 1020
#define MC_CMD_KR_TUNE_IN_LEN(num) (4+4*(num))
/* Requested operation */
#define MC_CMD_KR_TUNE_IN_KR_TUNE_OP_OFST 0
@@ -13365,6 +13916,7 @@
#define MC_CMD_KR_TUNE_IN_KR_TUNE_ARGS_LEN 4
#define MC_CMD_KR_TUNE_IN_KR_TUNE_ARGS_MINNUM 0
#define MC_CMD_KR_TUNE_IN_KR_TUNE_ARGS_MAXNUM 62
+#define MC_CMD_KR_TUNE_IN_KR_TUNE_ARGS_MAXNUM_MCDI2 254
/* MC_CMD_KR_TUNE_OUT msgresponse */
#define MC_CMD_KR_TUNE_OUT_LEN 0
@@ -13381,12 +13933,14 @@
/* MC_CMD_KR_TUNE_RXEQ_GET_OUT msgresponse */
#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_LENMIN 4
#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_LENMAX 252
+#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_LENMAX_MCDI2 1020
#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_LEN(num) (0+4*(num))
/* RXEQ Parameter */
#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_PARAM_OFST 0
#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_PARAM_LEN 4
#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_PARAM_MINNUM 1
#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_PARAM_MAXNUM 63
+#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_PARAM_MAXNUM_MCDI2 255
#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_PARAM_ID_LBN 0
#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_PARAM_ID_WIDTH 8
/* enum: Attenuation (0-15, Huntington) */
@@ -13475,6 +14029,44 @@
#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_CDR_PVT 0x20
/* enum: CDR integral loop code (Medford2) */
#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_CDR_INTEG 0x21
+/* enum: CTLE Boost stages - retimer lineside (Medford2 with DS250x retimer - 4
+ * stages, 2 bits per stage)
+ */
+#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_BOOST_RT_LS 0x22
+/* enum: DFE Tap1 - retimer lineside (Medford2 with DS250x retimer (-31 - 31))
+ */
+#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_DFE_TAP1_RT_LS 0x23
+/* enum: DFE Tap2 - retimer lineside (Medford2 with DS250x retimer (-15 - 15))
+ */
+#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_DFE_TAP2_RT_LS 0x24
+/* enum: DFE Tap3 - retimer lineside (Medford2 with DS250x retimer (-15 - 15))
+ */
+#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_DFE_TAP3_RT_LS 0x25
+/* enum: DFE Tap4 - retimer lineside (Medford2 with DS250x retimer (-15 - 15))
+ */
+#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_DFE_TAP4_RT_LS 0x26
+/* enum: DFE Tap5 - retimer lineside (Medford2 with DS250x retimer (-15 - 15))
+ */
+#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_DFE_TAP5_RT_LS 0x27
+/* enum: CTLE Boost stages - retimer hostside (Medford2 with DS250x retimer - 4
+ * stages, 2 bits per stage)
+ */
+#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_BOOST_RT_HS 0x28
+/* enum: DFE Tap1 - retimer hostside (Medford2 with DS250x retimer (-31 - 31))
+ */
+#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_DFE_TAP1_RT_HS 0x29
+/* enum: DFE Tap2 - retimer hostside (Medford2 with DS250x retimer (-15 - 15))
+ */
+#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_DFE_TAP2_RT_HS 0x2a
+/* enum: DFE Tap3 - retimer hostside (Medford2 with DS250x retimer (-15 - 15))
+ */
+#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_DFE_TAP3_RT_HS 0x2b
+/* enum: DFE Tap4 - retimer hostside (Medford2 with DS250x retimer (-15 - 15))
+ */
+#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_DFE_TAP4_RT_HS 0x2c
+/* enum: DFE Tap5 - retimer hostside (Medford2 with DS250x retimer (-15 - 15))
+ */
+#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_DFE_TAP5_RT_HS 0x2d
#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_PARAM_LANE_LBN 8
#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_PARAM_LANE_WIDTH 3
#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_LANE_0 0x0 /* enum */
@@ -13494,6 +14086,7 @@
/* MC_CMD_KR_TUNE_RXEQ_SET_IN msgrequest */
#define MC_CMD_KR_TUNE_RXEQ_SET_IN_LENMIN 8
#define MC_CMD_KR_TUNE_RXEQ_SET_IN_LENMAX 252
+#define MC_CMD_KR_TUNE_RXEQ_SET_IN_LENMAX_MCDI2 1020
#define MC_CMD_KR_TUNE_RXEQ_SET_IN_LEN(num) (4+4*(num))
/* Requested operation */
#define MC_CMD_KR_TUNE_RXEQ_SET_IN_KR_TUNE_OP_OFST 0
@@ -13506,6 +14099,7 @@
#define MC_CMD_KR_TUNE_RXEQ_SET_IN_PARAM_LEN 4
#define MC_CMD_KR_TUNE_RXEQ_SET_IN_PARAM_MINNUM 1
#define MC_CMD_KR_TUNE_RXEQ_SET_IN_PARAM_MAXNUM 62
+#define MC_CMD_KR_TUNE_RXEQ_SET_IN_PARAM_MAXNUM_MCDI2 254
#define MC_CMD_KR_TUNE_RXEQ_SET_IN_PARAM_ID_LBN 0
#define MC_CMD_KR_TUNE_RXEQ_SET_IN_PARAM_ID_WIDTH 8
/* Enum values, see field(s): */
@@ -13538,12 +14132,14 @@
/* MC_CMD_KR_TUNE_TXEQ_GET_OUT msgresponse */
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_LENMIN 4
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_LENMAX 252
+#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_LENMAX_MCDI2 1020
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_LEN(num) (0+4*(num))
/* TXEQ Parameter */
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_OFST 0
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_LEN 4
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_MINNUM 1
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_MAXNUM 63
+#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_MAXNUM_MCDI2 255
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_ID_LBN 0
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_ID_WIDTH 8
/* enum: TX Amplitude (Huntington, Medford, Medford2) */
@@ -13568,10 +14164,22 @@
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TX_RT_SET 0x9
/* enum: TX Amplitude Fine control (Medford) */
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TX_LEV_FINE 0xa
-/* enum: Pre-shoot Tap (Medford, Medford2) */
+/* enum: Pre-cursor Tap (Medford, Medford2) */
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TAP_ADV 0xb
-/* enum: De-emphasis Tap (Medford, Medford2) */
+/* enum: Post-cursor Tap (Medford, Medford2) */
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TAP_DLY 0xc
+/* enum: TX Amplitude (Retimer Lineside) */
+#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TX_LEV_RT_LS 0xd
+/* enum: Pre-cursor Tap (Retimer Lineside) */
+#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TAP_ADV_RT_LS 0xe
+/* enum: Post-cursor Tap (Retimer Lineside) */
+#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TAP_DLY_RT_LS 0xf
+/* enum: TX Amplitude (Retimer Hostside) */
+#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TX_LEV_RT_HS 0x10
+/* enum: Pre-cursor Tap (Retimer Hostside) */
+#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TAP_ADV_RT_HS 0x11
+/* enum: Post-cursor Tap (Retimer Hostside) */
+#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TAP_DLY_RT_HS 0x12
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_LANE_LBN 8
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_LANE_WIDTH 3
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_LANE_0 0x0 /* enum */
@@ -13589,6 +14197,7 @@
/* MC_CMD_KR_TUNE_TXEQ_SET_IN msgrequest */
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_LENMIN 8
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_LENMAX 252
+#define MC_CMD_KR_TUNE_TXEQ_SET_IN_LENMAX_MCDI2 1020
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_LEN(num) (4+4*(num))
/* Requested operation */
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_KR_TUNE_OP_OFST 0
@@ -13601,6 +14210,7 @@
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_PARAM_LEN 4
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_PARAM_MINNUM 1
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_PARAM_MAXNUM 62
+#define MC_CMD_KR_TUNE_TXEQ_SET_IN_PARAM_MAXNUM_MCDI2 254
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_PARAM_ID_LBN 0
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_PARAM_ID_WIDTH 8
/* Enum values, see field(s): */
@@ -13676,11 +14286,13 @@
/* MC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT msgresponse */
#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_LENMIN 0
#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_LENMAX 252
+#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_LENMAX_MCDI2 1020
#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_LEN(num) (0+2*(num))
#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_OFST 0
#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_LEN 2
#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_MINNUM 0
#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_MAXNUM 126
+#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_MAXNUM_MCDI2 510
/* MC_CMD_KR_TUNE_READ_FOM_IN msgrequest */
#define MC_CMD_KR_TUNE_READ_FOM_IN_LEN 8
@@ -13790,6 +14402,7 @@
/* MC_CMD_PCIE_TUNE_IN msgrequest */
#define MC_CMD_PCIE_TUNE_IN_LENMIN 4
#define MC_CMD_PCIE_TUNE_IN_LENMAX 252
+#define MC_CMD_PCIE_TUNE_IN_LENMAX_MCDI2 1020
#define MC_CMD_PCIE_TUNE_IN_LEN(num) (4+4*(num))
/* Requested operation */
#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_OP_OFST 0
@@ -13819,6 +14432,7 @@
#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_ARGS_LEN 4
#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_ARGS_MINNUM 0
#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_ARGS_MAXNUM 62
+#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_ARGS_MAXNUM_MCDI2 254
/* MC_CMD_PCIE_TUNE_OUT msgresponse */
#define MC_CMD_PCIE_TUNE_OUT_LEN 0
@@ -13835,12 +14449,14 @@
/* MC_CMD_PCIE_TUNE_RXEQ_GET_OUT msgresponse */
#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LENMIN 4
#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LENMAX 252
+#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LENMAX_MCDI2 1020
#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LEN(num) (0+4*(num))
/* RXEQ Parameter */
#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_OFST 0
#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_LEN 4
#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_MINNUM 1
#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_MAXNUM 63
+#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_MAXNUM_MCDI2 255
#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_ID_LBN 0
#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_ID_WIDTH 8
/* enum: Attenuation (0-15) */
@@ -13894,6 +14510,7 @@
/* MC_CMD_PCIE_TUNE_RXEQ_SET_IN msgrequest */
#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_LENMIN 8
#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_LENMAX 252
+#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_LENMAX_MCDI2 1020
#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_LEN(num) (4+4*(num))
/* Requested operation */
#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PCIE_TUNE_OP_OFST 0
@@ -13906,6 +14523,7 @@
#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_LEN 4
#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_MINNUM 1
#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_MAXNUM 62
+#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_MAXNUM_MCDI2 254
#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_ID_LBN 0
#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_ID_WIDTH 8
/* Enum values, see field(s): */
@@ -13938,12 +14556,14 @@
/* MC_CMD_PCIE_TUNE_TXEQ_GET_OUT msgresponse */
#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_LENMIN 4
#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_LENMAX 252
+#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_LENMAX_MCDI2 1020
#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_LEN(num) (0+4*(num))
/* RXEQ Parameter */
#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_OFST 0
#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_LEN 4
#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_MINNUM 1
#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_MAXNUM 63
+#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_MAXNUM_MCDI2 255
#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_ID_LBN 0
#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_ID_WIDTH 8
/* enum: TxMargin (PIPE) */
@@ -13991,11 +14611,13 @@
/* MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT msgresponse */
#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_LENMIN 0
#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_LENMAX 252
+#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_LENMAX_MCDI2 1020
#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_LEN(num) (0+2*(num))
#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_OFST 0
#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_LEN 2
#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_MINNUM 0
#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_MAXNUM 126
+#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_MAXNUM_MCDI2 510
/* MC_CMD_PCIE_TUNE_BIST_SQUARE_WAVE_IN msgrequest */
#define MC_CMD_PCIE_TUNE_BIST_SQUARE_WAVE_IN_LEN 0
@@ -14146,6 +14768,7 @@
/* MC_CMD_LICENSING_GET_ID_V3_OUT msgresponse */
#define MC_CMD_LICENSING_GET_ID_V3_OUT_LENMIN 8
#define MC_CMD_LICENSING_GET_ID_V3_OUT_LENMAX 252
+#define MC_CMD_LICENSING_GET_ID_V3_OUT_LENMAX_MCDI2 1020
#define MC_CMD_LICENSING_GET_ID_V3_OUT_LEN(num) (8+1*(num))
/* type of license (eg 3) */
#define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_TYPE_OFST 0
@@ -14158,6 +14781,7 @@
#define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_LEN 1
#define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_MINNUM 0
#define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_MAXNUM 244
+#define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_MAXNUM_MCDI2 1012
/***********************************/
@@ -14280,6 +14904,7 @@
/* MC_CMD_LICENSED_APP_OP_IN msgrequest */
#define MC_CMD_LICENSED_APP_OP_IN_LENMIN 8
#define MC_CMD_LICENSED_APP_OP_IN_LENMAX 252
+#define MC_CMD_LICENSED_APP_OP_IN_LENMAX_MCDI2 1020
#define MC_CMD_LICENSED_APP_OP_IN_LEN(num) (8+4*(num))
/* application ID */
#define MC_CMD_LICENSED_APP_OP_IN_APP_ID_OFST 0
@@ -14296,16 +14921,19 @@
#define MC_CMD_LICENSED_APP_OP_IN_ARGS_LEN 4
#define MC_CMD_LICENSED_APP_OP_IN_ARGS_MINNUM 0
#define MC_CMD_LICENSED_APP_OP_IN_ARGS_MAXNUM 61
+#define MC_CMD_LICENSED_APP_OP_IN_ARGS_MAXNUM_MCDI2 253
/* MC_CMD_LICENSED_APP_OP_OUT msgresponse */
#define MC_CMD_LICENSED_APP_OP_OUT_LENMIN 0
#define MC_CMD_LICENSED_APP_OP_OUT_LENMAX 252
+#define MC_CMD_LICENSED_APP_OP_OUT_LENMAX_MCDI2 1020
#define MC_CMD_LICENSED_APP_OP_OUT_LEN(num) (0+4*(num))
/* result specific to this particular operation */
#define MC_CMD_LICENSED_APP_OP_OUT_RESULT_OFST 0
#define MC_CMD_LICENSED_APP_OP_OUT_RESULT_LEN 4
#define MC_CMD_LICENSED_APP_OP_OUT_RESULT_MINNUM 0
#define MC_CMD_LICENSED_APP_OP_OUT_RESULT_MAXNUM 63
+#define MC_CMD_LICENSED_APP_OP_OUT_RESULT_MAXNUM_MCDI2 255
/* MC_CMD_LICENSED_APP_OP_VALIDATE_IN msgrequest */
#define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_LEN 72
@@ -14589,6 +15217,7 @@
/* MC_CMD_SET_PARSER_DISP_CONFIG_IN msgrequest */
#define MC_CMD_SET_PARSER_DISP_CONFIG_IN_LENMIN 12
#define MC_CMD_SET_PARSER_DISP_CONFIG_IN_LENMAX 252
+#define MC_CMD_SET_PARSER_DISP_CONFIG_IN_LENMAX_MCDI2 1020
#define MC_CMD_SET_PARSER_DISP_CONFIG_IN_LEN(num) (8+4*(num))
/* the type of configuration setting to change */
#define MC_CMD_SET_PARSER_DISP_CONFIG_IN_TYPE_OFST 0
@@ -14614,6 +15243,7 @@
#define MC_CMD_SET_PARSER_DISP_CONFIG_IN_VALUE_LEN 4
#define MC_CMD_SET_PARSER_DISP_CONFIG_IN_VALUE_MINNUM 1
#define MC_CMD_SET_PARSER_DISP_CONFIG_IN_VALUE_MAXNUM 61
+#define MC_CMD_SET_PARSER_DISP_CONFIG_IN_VALUE_MAXNUM_MCDI2 253
/* MC_CMD_SET_PARSER_DISP_CONFIG_OUT msgresponse */
#define MC_CMD_SET_PARSER_DISP_CONFIG_OUT_LEN 0
@@ -14644,6 +15274,7 @@
/* MC_CMD_GET_PARSER_DISP_CONFIG_OUT msgresponse */
#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_LENMIN 4
#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_LENMAX 252
+#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_LENMAX_MCDI2 1020
#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_LEN(num) (0+4*(num))
/* current value: the details depend on the type of configuration setting being
* read
@@ -14652,6 +15283,7 @@
#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_LEN 4
#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_MINNUM 1
#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_MAXNUM 63
+#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_MAXNUM_MCDI2 255
/***********************************/
@@ -14817,7 +15449,9 @@
/* MC_CMD_GET_PORT_MODES_OUT msgresponse */
#define MC_CMD_GET_PORT_MODES_OUT_LEN 12
-/* Bitmask of port modes available on the board (indexed by TLV_PORT_MODE_*) */
+/* Bitmask of port modes available on the board (indexed by TLV_PORT_MODE_*)
+ * that are supported for customer use in production firmware.
+ */
#define MC_CMD_GET_PORT_MODES_OUT_MODES_OFST 0
#define MC_CMD_GET_PORT_MODES_OUT_MODES_LEN 4
/* Default (canonical) board mode */
@@ -14827,6 +15461,58 @@
#define MC_CMD_GET_PORT_MODES_OUT_CURRENT_MODE_OFST 8
#define MC_CMD_GET_PORT_MODES_OUT_CURRENT_MODE_LEN 4
+/* MC_CMD_GET_PORT_MODES_OUT_V2 msgresponse */
+#define MC_CMD_GET_PORT_MODES_OUT_V2_LEN 16
+/* Bitmask of port modes available on the board (indexed by TLV_PORT_MODE_*)
+ * that are supported for customer use in production firmware.
+ */
+#define MC_CMD_GET_PORT_MODES_OUT_V2_MODES_OFST 0
+#define MC_CMD_GET_PORT_MODES_OUT_V2_MODES_LEN 4
+/* Default (canonical) board mode */
+#define MC_CMD_GET_PORT_MODES_OUT_V2_DEFAULT_MODE_OFST 4
+#define MC_CMD_GET_PORT_MODES_OUT_V2_DEFAULT_MODE_LEN 4
+/* Current board mode */
+#define MC_CMD_GET_PORT_MODES_OUT_V2_CURRENT_MODE_OFST 8
+#define MC_CMD_GET_PORT_MODES_OUT_V2_CURRENT_MODE_LEN 4
+/* Bitmask of engineering port modes available on the board (indexed by
+ * TLV_PORT_MODE_*). A superset of MC_CMD_GET_PORT_MODES_OUT/MODES that
+ * contains all modes implemented in firmware for a particular board. Modes
+ * listed in MODES are considered production modes and should be exposed in
+ * userland tools. Modes listed in in ENGINEERING_MODES, but not in MODES
+ * should be considered hidden (not to be exposed in userland tools) and for
+ * engineering use only. There are no other semantic differences and any mode
+ * listed in either MODES or ENGINEERING_MODES can be set on the board.
+ */
+#define MC_CMD_GET_PORT_MODES_OUT_V2_ENGINEERING_MODES_OFST 12
+#define MC_CMD_GET_PORT_MODES_OUT_V2_ENGINEERING_MODES_LEN 4
+
+
+/***********************************/
+/* MC_CMD_OVERRIDE_PORT_MODE
+ * Override flash config port mode for subsequent MC reboot(s). Override data
+ * is stored in the presistent data section of DMEM and activated on next MC
+ * warm reboot. A cold reboot resets the override. It is assumed that a
+ * sufficient number of PFs are available and that port mapping is valid for
+ * the new port mode, as the override does not affect PF configuration.
+ */
+#define MC_CMD_OVERRIDE_PORT_MODE 0x137
+#undef MC_CMD_0x137_PRIVILEGE_CTG
+
+#define MC_CMD_0x137_PRIVILEGE_CTG SRIOV_CTG_ADMIN
+
+/* MC_CMD_OVERRIDE_PORT_MODE_IN msgrequest */
+#define MC_CMD_OVERRIDE_PORT_MODE_IN_LEN 8
+#define MC_CMD_OVERRIDE_PORT_MODE_IN_FLAGS_OFST 0
+#define MC_CMD_OVERRIDE_PORT_MODE_IN_FLAGS_LEN 4
+#define MC_CMD_OVERRIDE_PORT_MODE_IN_ENABLE_LBN 0
+#define MC_CMD_OVERRIDE_PORT_MODE_IN_ENABLE_WIDTH 1
+/* New mode (TLV_PORT_MODE_*) to set, if override enabled */
+#define MC_CMD_OVERRIDE_PORT_MODE_IN_MODE_OFST 4
+#define MC_CMD_OVERRIDE_PORT_MODE_IN_MODE_LEN 4
+
+/* MC_CMD_OVERRIDE_PORT_MODE_OUT msgresponse */
+#define MC_CMD_OVERRIDE_PORT_MODE_OUT_LEN 0
+
/***********************************/
/* MC_CMD_READ_ATB
@@ -15145,12 +15831,14 @@
/* MC_CMD_XPM_READ_BYTES_OUT msgresponse */
#define MC_CMD_XPM_READ_BYTES_OUT_LENMIN 0
#define MC_CMD_XPM_READ_BYTES_OUT_LENMAX 252
+#define MC_CMD_XPM_READ_BYTES_OUT_LENMAX_MCDI2 1020
#define MC_CMD_XPM_READ_BYTES_OUT_LEN(num) (0+1*(num))
/* Data */
#define MC_CMD_XPM_READ_BYTES_OUT_DATA_OFST 0
#define MC_CMD_XPM_READ_BYTES_OUT_DATA_LEN 1
#define MC_CMD_XPM_READ_BYTES_OUT_DATA_MINNUM 0
#define MC_CMD_XPM_READ_BYTES_OUT_DATA_MAXNUM 252
+#define MC_CMD_XPM_READ_BYTES_OUT_DATA_MAXNUM_MCDI2 1020
/***********************************/
@@ -15165,6 +15853,7 @@
/* MC_CMD_XPM_WRITE_BYTES_IN msgrequest */
#define MC_CMD_XPM_WRITE_BYTES_IN_LENMIN 8
#define MC_CMD_XPM_WRITE_BYTES_IN_LENMAX 252
+#define MC_CMD_XPM_WRITE_BYTES_IN_LENMAX_MCDI2 1020
#define MC_CMD_XPM_WRITE_BYTES_IN_LEN(num) (8+1*(num))
/* Start address (byte) */
#define MC_CMD_XPM_WRITE_BYTES_IN_ADDR_OFST 0
@@ -15177,6 +15866,7 @@
#define MC_CMD_XPM_WRITE_BYTES_IN_DATA_LEN 1
#define MC_CMD_XPM_WRITE_BYTES_IN_DATA_MINNUM 0
#define MC_CMD_XPM_WRITE_BYTES_IN_DATA_MAXNUM 244
+#define MC_CMD_XPM_WRITE_BYTES_IN_DATA_MAXNUM_MCDI2 1012
/* MC_CMD_XPM_WRITE_BYTES_OUT msgresponse */
#define MC_CMD_XPM_WRITE_BYTES_OUT_LEN 0
@@ -15203,6 +15893,7 @@
/* MC_CMD_XPM_READ_SECTOR_OUT msgresponse */
#define MC_CMD_XPM_READ_SECTOR_OUT_LENMIN 4
#define MC_CMD_XPM_READ_SECTOR_OUT_LENMAX 36
+#define MC_CMD_XPM_READ_SECTOR_OUT_LENMAX_MCDI2 36
#define MC_CMD_XPM_READ_SECTOR_OUT_LEN(num) (4+1*(num))
/* Sector type */
#define MC_CMD_XPM_READ_SECTOR_OUT_TYPE_OFST 0
@@ -15217,6 +15908,7 @@
#define MC_CMD_XPM_READ_SECTOR_OUT_DATA_LEN 1
#define MC_CMD_XPM_READ_SECTOR_OUT_DATA_MINNUM 0
#define MC_CMD_XPM_READ_SECTOR_OUT_DATA_MAXNUM 32
+#define MC_CMD_XPM_READ_SECTOR_OUT_DATA_MAXNUM_MCDI2 32
/***********************************/
@@ -15231,6 +15923,7 @@
/* MC_CMD_XPM_WRITE_SECTOR_IN msgrequest */
#define MC_CMD_XPM_WRITE_SECTOR_IN_LENMIN 12
#define MC_CMD_XPM_WRITE_SECTOR_IN_LENMAX 44
+#define MC_CMD_XPM_WRITE_SECTOR_IN_LENMAX_MCDI2 44
#define MC_CMD_XPM_WRITE_SECTOR_IN_LEN(num) (12+1*(num))
/* If writing fails due to an uncorrectable error, try up to RETRIES following
* sectors (or until no more space available). If 0, only one write attempt is
@@ -15254,6 +15947,7 @@
#define MC_CMD_XPM_WRITE_SECTOR_IN_DATA_LEN 1
#define MC_CMD_XPM_WRITE_SECTOR_IN_DATA_MINNUM 0
#define MC_CMD_XPM_WRITE_SECTOR_IN_DATA_MAXNUM 32
+#define MC_CMD_XPM_WRITE_SECTOR_IN_DATA_MAXNUM_MCDI2 32
/* MC_CMD_XPM_WRITE_SECTOR_OUT msgresponse */
#define MC_CMD_XPM_WRITE_SECTOR_OUT_LEN 4
@@ -15302,6 +15996,7 @@
/* MC_CMD_XPM_BLANK_CHECK_OUT msgresponse */
#define MC_CMD_XPM_BLANK_CHECK_OUT_LENMIN 4
#define MC_CMD_XPM_BLANK_CHECK_OUT_LENMAX 252
+#define MC_CMD_XPM_BLANK_CHECK_OUT_LENMAX_MCDI2 1020
#define MC_CMD_XPM_BLANK_CHECK_OUT_LEN(num) (4+2*(num))
/* Total number of bad (non-blank) locations */
#define MC_CMD_XPM_BLANK_CHECK_OUT_BAD_COUNT_OFST 0
@@ -15313,6 +16008,7 @@
#define MC_CMD_XPM_BLANK_CHECK_OUT_BAD_ADDR_LEN 2
#define MC_CMD_XPM_BLANK_CHECK_OUT_BAD_ADDR_MINNUM 0
#define MC_CMD_XPM_BLANK_CHECK_OUT_BAD_ADDR_MAXNUM 124
+#define MC_CMD_XPM_BLANK_CHECK_OUT_BAD_ADDR_MAXNUM_MCDI2 508
/***********************************/
@@ -15648,12 +16344,14 @@
/* MC_CMD_GET_SECURITY_RULESET_VERSION_OUT msgresponse */
#define MC_CMD_GET_SECURITY_RULESET_VERSION_OUT_LENMIN 1
#define MC_CMD_GET_SECURITY_RULESET_VERSION_OUT_LENMAX 252
+#define MC_CMD_GET_SECURITY_RULESET_VERSION_OUT_LENMAX_MCDI2 1020
#define MC_CMD_GET_SECURITY_RULESET_VERSION_OUT_LEN(num) (0+1*(num))
/* Opaque hash value; length may vary depending on the hash scheme used */
#define MC_CMD_GET_SECURITY_RULESET_VERSION_OUT_VERSION_OFST 0
#define MC_CMD_GET_SECURITY_RULESET_VERSION_OUT_VERSION_LEN 1
#define MC_CMD_GET_SECURITY_RULESET_VERSION_OUT_VERSION_MINNUM 1
#define MC_CMD_GET_SECURITY_RULESET_VERSION_OUT_VERSION_MAXNUM 252
+#define MC_CMD_GET_SECURITY_RULESET_VERSION_OUT_VERSION_MAXNUM_MCDI2 1020
/***********************************/
@@ -15678,6 +16376,7 @@
/* MC_CMD_SECURITY_RULE_COUNTER_ALLOC_OUT msgresponse */
#define MC_CMD_SECURITY_RULE_COUNTER_ALLOC_OUT_LENMIN 4
#define MC_CMD_SECURITY_RULE_COUNTER_ALLOC_OUT_LENMAX 252
+#define MC_CMD_SECURITY_RULE_COUNTER_ALLOC_OUT_LENMAX_MCDI2 1020
#define MC_CMD_SECURITY_RULE_COUNTER_ALLOC_OUT_LEN(num) (4+4*(num))
/* the number of new counter IDs allocated (may be less than the number
* requested if resources are unavailable)
@@ -15689,6 +16388,7 @@
#define MC_CMD_SECURITY_RULE_COUNTER_ALLOC_OUT_COUNTER_ID_LEN 4
#define MC_CMD_SECURITY_RULE_COUNTER_ALLOC_OUT_COUNTER_ID_MINNUM 0
#define MC_CMD_SECURITY_RULE_COUNTER_ALLOC_OUT_COUNTER_ID_MAXNUM 62
+#define MC_CMD_SECURITY_RULE_COUNTER_ALLOC_OUT_COUNTER_ID_MAXNUM_MCDI2 254
/***********************************/
@@ -15707,6 +16407,7 @@
/* MC_CMD_SECURITY_RULE_COUNTER_FREE_IN msgrequest */
#define MC_CMD_SECURITY_RULE_COUNTER_FREE_IN_LENMIN 4
#define MC_CMD_SECURITY_RULE_COUNTER_FREE_IN_LENMAX 252
+#define MC_CMD_SECURITY_RULE_COUNTER_FREE_IN_LENMAX_MCDI2 1020
#define MC_CMD_SECURITY_RULE_COUNTER_FREE_IN_LEN(num) (4+4*(num))
/* the number of counter IDs to free */
#define MC_CMD_SECURITY_RULE_COUNTER_FREE_IN_NUM_COUNTERS_OFST 0
@@ -15716,6 +16417,7 @@
#define MC_CMD_SECURITY_RULE_COUNTER_FREE_IN_COUNTER_ID_LEN 4
#define MC_CMD_SECURITY_RULE_COUNTER_FREE_IN_COUNTER_ID_MINNUM 0
#define MC_CMD_SECURITY_RULE_COUNTER_FREE_IN_COUNTER_ID_MAXNUM 62
+#define MC_CMD_SECURITY_RULE_COUNTER_FREE_IN_COUNTER_ID_MAXNUM_MCDI2 254
/* MC_CMD_SECURITY_RULE_COUNTER_FREE_OUT msgresponse */
#define MC_CMD_SECURITY_RULE_COUNTER_FREE_OUT_LEN 0
@@ -15739,6 +16441,7 @@
/* MC_CMD_SUBNET_MAP_SET_NODE_IN msgrequest */
#define MC_CMD_SUBNET_MAP_SET_NODE_IN_LENMIN 6
#define MC_CMD_SUBNET_MAP_SET_NODE_IN_LENMAX 252
+#define MC_CMD_SUBNET_MAP_SET_NODE_IN_LENMAX_MCDI2 1020
#define MC_CMD_SUBNET_MAP_SET_NODE_IN_LEN(num) (4+2*(num))
/* node to update in the range 0 .. SUBNET_MAP_NUM_NODES-1 */
#define MC_CMD_SUBNET_MAP_SET_NODE_IN_NODE_ID_OFST 0
@@ -15752,6 +16455,7 @@
#define MC_CMD_SUBNET_MAP_SET_NODE_IN_ENTRY_LEN 2
#define MC_CMD_SUBNET_MAP_SET_NODE_IN_ENTRY_MINNUM 1
#define MC_CMD_SUBNET_MAP_SET_NODE_IN_ENTRY_MAXNUM 124
+#define MC_CMD_SUBNET_MAP_SET_NODE_IN_ENTRY_MAXNUM_MCDI2 508
/* MC_CMD_SUBNET_MAP_SET_NODE_OUT msgresponse */
#define MC_CMD_SUBNET_MAP_SET_NODE_OUT_LEN 0
@@ -15791,6 +16495,7 @@
/* MC_CMD_REMOTE_PORTRANGE_MAP_SET_TREE_IN msgrequest */
#define MC_CMD_REMOTE_PORTRANGE_MAP_SET_TREE_IN_LENMIN 4
#define MC_CMD_REMOTE_PORTRANGE_MAP_SET_TREE_IN_LENMAX 252
+#define MC_CMD_REMOTE_PORTRANGE_MAP_SET_TREE_IN_LENMAX_MCDI2 1020
#define MC_CMD_REMOTE_PORTRANGE_MAP_SET_TREE_IN_LEN(num) (0+4*(num))
/* PORTRANGE_TREE_NUM_ENTRIES new entries, each laid out as a
* PORTRANGE_TREE_ENTRY
@@ -15799,6 +16504,7 @@
#define MC_CMD_REMOTE_PORTRANGE_MAP_SET_TREE_IN_ENTRIES_LEN 4
#define MC_CMD_REMOTE_PORTRANGE_MAP_SET_TREE_IN_ENTRIES_MINNUM 1
#define MC_CMD_REMOTE_PORTRANGE_MAP_SET_TREE_IN_ENTRIES_MAXNUM 63
+#define MC_CMD_REMOTE_PORTRANGE_MAP_SET_TREE_IN_ENTRIES_MAXNUM_MCDI2 255
/* MC_CMD_REMOTE_PORTRANGE_MAP_SET_TREE_OUT msgresponse */
#define MC_CMD_REMOTE_PORTRANGE_MAP_SET_TREE_OUT_LEN 0
@@ -15822,6 +16528,7 @@
/* MC_CMD_LOCAL_PORTRANGE_MAP_SET_TREE_IN msgrequest */
#define MC_CMD_LOCAL_PORTRANGE_MAP_SET_TREE_IN_LENMIN 4
#define MC_CMD_LOCAL_PORTRANGE_MAP_SET_TREE_IN_LENMAX 252
+#define MC_CMD_LOCAL_PORTRANGE_MAP_SET_TREE_IN_LENMAX_MCDI2 1020
#define MC_CMD_LOCAL_PORTRANGE_MAP_SET_TREE_IN_LEN(num) (0+4*(num))
/* PORTRANGE_TREE_NUM_ENTRIES new entries, each laid out as a
* PORTRANGE_TREE_ENTRY
@@ -15830,6 +16537,7 @@
#define MC_CMD_LOCAL_PORTRANGE_MAP_SET_TREE_IN_ENTRIES_LEN 4
#define MC_CMD_LOCAL_PORTRANGE_MAP_SET_TREE_IN_ENTRIES_MINNUM 1
#define MC_CMD_LOCAL_PORTRANGE_MAP_SET_TREE_IN_ENTRIES_MAXNUM 63
+#define MC_CMD_LOCAL_PORTRANGE_MAP_SET_TREE_IN_ENTRIES_MAXNUM_MCDI2 255
/* MC_CMD_LOCAL_PORTRANGE_MAP_SET_TREE_OUT msgresponse */
#define MC_CMD_LOCAL_PORTRANGE_MAP_SET_TREE_OUT_LEN 0
@@ -15872,6 +16580,7 @@
/* MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN msgrequest */
#define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_LENMIN 4
#define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_LENMAX 68
+#define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_LENMAX_MCDI2 68
#define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_LEN(num) (4+4*(num))
/* Flags */
#define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_FLAGS_OFST 0
@@ -15888,6 +16597,7 @@
#define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_ENTRIES_LEN 4
#define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_ENTRIES_MINNUM 0
#define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_ENTRIES_MAXNUM 16
+#define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_ENTRIES_MAXNUM_MCDI2 16
/* MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_OUT msgresponse */
#define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_OUT_LEN 2
@@ -16014,6 +16724,7 @@
/* MC_CMD_TSA_BIND_IN_SET_KEY msgrequest */
#define MC_CMD_TSA_BIND_IN_SET_KEY_LENMIN 5
#define MC_CMD_TSA_BIND_IN_SET_KEY_LENMAX 252
+#define MC_CMD_TSA_BIND_IN_SET_KEY_LENMAX_MCDI2 1020
#define MC_CMD_TSA_BIND_IN_SET_KEY_LEN(num) (4+1*(num))
/* The operation requested. */
#define MC_CMD_TSA_BIND_IN_SET_KEY_OP_OFST 0
@@ -16028,6 +16739,7 @@
#define MC_CMD_TSA_BIND_IN_SET_KEY_DATKEY_LEN 1
#define MC_CMD_TSA_BIND_IN_SET_KEY_DATKEY_MINNUM 1
#define MC_CMD_TSA_BIND_IN_SET_KEY_DATKEY_MAXNUM 248
+#define MC_CMD_TSA_BIND_IN_SET_KEY_DATKEY_MAXNUM_MCDI2 1016
/* MC_CMD_TSA_BIND_IN_UNBIND msgrequest: Request an insecure unbinding
* operation.
@@ -16045,6 +16757,7 @@
*/
#define MC_CMD_TSA_BIND_IN_UNBIND_EXT_LENMIN 93
#define MC_CMD_TSA_BIND_IN_UNBIND_EXT_LENMAX 252
+#define MC_CMD_TSA_BIND_IN_UNBIND_EXT_LENMAX_MCDI2 1020
#define MC_CMD_TSA_BIND_IN_UNBIND_EXT_LEN(num) (92+1*(num))
/* The operation requested. */
#define MC_CMD_TSA_BIND_IN_UNBIND_EXT_OP_OFST 0
@@ -16082,6 +16795,7 @@
#define MC_CMD_TSA_BIND_IN_UNBIND_EXT_SIG_LEN 1
#define MC_CMD_TSA_BIND_IN_UNBIND_EXT_SIG_MINNUM 1
#define MC_CMD_TSA_BIND_IN_UNBIND_EXT_SIG_MAXNUM 160
+#define MC_CMD_TSA_BIND_IN_UNBIND_EXT_SIG_MAXNUM_MCDI2 928
/* MC_CMD_TSA_BIND_IN_SET_UNBINDTOKEN msgrequest */
#define MC_CMD_TSA_BIND_IN_SET_UNBINDTOKEN_LEN 20
@@ -16106,6 +16820,7 @@
*/
#define MC_CMD_TSA_BIND_IN_DECOMMISSION_LENMIN 109
#define MC_CMD_TSA_BIND_IN_DECOMMISSION_LENMAX 252
+#define MC_CMD_TSA_BIND_IN_DECOMMISSION_LENMAX_MCDI2 1020
#define MC_CMD_TSA_BIND_IN_DECOMMISSION_LEN(num) (108+1*(num))
/* This is the signature of the above mentioned fields- TSAID, USER and REASON.
* As per current requirements, the SIG opaque data blob contains ECDSA ECC-384
@@ -16118,6 +16833,7 @@
#define MC_CMD_TSA_BIND_IN_DECOMMISSION_SIG_LEN 1
#define MC_CMD_TSA_BIND_IN_DECOMMISSION_SIG_MINNUM 1
#define MC_CMD_TSA_BIND_IN_DECOMMISSION_SIG_MAXNUM 144
+#define MC_CMD_TSA_BIND_IN_DECOMMISSION_SIG_MAXNUM_MCDI2 912
/* The operation requested. */
#define MC_CMD_TSA_BIND_IN_DECOMMISSION_OP_OFST 0
#define MC_CMD_TSA_BIND_IN_DECOMMISSION_OP_LEN 4
@@ -16170,6 +16886,7 @@
*/
#define MC_CMD_TSA_BIND_IN_SECURE_UNBIND_LENMIN 97
#define MC_CMD_TSA_BIND_IN_SECURE_UNBIND_LENMAX 200
+#define MC_CMD_TSA_BIND_IN_SECURE_UNBIND_LENMAX_MCDI2 200
#define MC_CMD_TSA_BIND_IN_SECURE_UNBIND_LEN(num) (96+1*(num))
/* The operation requested, must be MC_CMD_TSA_BIND_OP_SECURE_UNBIND. */
#define MC_CMD_TSA_BIND_IN_SECURE_UNBIND_OP_OFST 0
@@ -16205,12 +16922,14 @@
#define MC_CMD_TSA_BIND_IN_SECURE_UNBIND_SIG_LEN 1
#define MC_CMD_TSA_BIND_IN_SECURE_UNBIND_SIG_MINNUM 1
#define MC_CMD_TSA_BIND_IN_SECURE_UNBIND_SIG_MAXNUM 104
+#define MC_CMD_TSA_BIND_IN_SECURE_UNBIND_SIG_MAXNUM_MCDI2 104
/* MC_CMD_TSA_BIND_IN_SECURE_DECOMMISSION msgrequest: Request a secure
* decommissioning operation.
*/
#define MC_CMD_TSA_BIND_IN_SECURE_DECOMMISSION_LENMIN 113
#define MC_CMD_TSA_BIND_IN_SECURE_DECOMMISSION_LENMAX 216
+#define MC_CMD_TSA_BIND_IN_SECURE_DECOMMISSION_LENMAX_MCDI2 216
#define MC_CMD_TSA_BIND_IN_SECURE_DECOMMISSION_LEN(num) (112+1*(num))
/* The operation requested, must be MC_CMD_TSA_BIND_OP_SECURE_DECOMMISSION. */
#define MC_CMD_TSA_BIND_IN_SECURE_DECOMMISSION_OP_OFST 0
@@ -16249,6 +16968,7 @@
#define MC_CMD_TSA_BIND_IN_SECURE_DECOMMISSION_SIG_LEN 1
#define MC_CMD_TSA_BIND_IN_SECURE_DECOMMISSION_SIG_MINNUM 1
#define MC_CMD_TSA_BIND_IN_SECURE_DECOMMISSION_SIG_MAXNUM 104
+#define MC_CMD_TSA_BIND_IN_SECURE_DECOMMISSION_SIG_MAXNUM_MCDI2 104
/* MC_CMD_TSA_BIND_IN_TEST_MCDI msgrequest: Test mode that emulates MCDI
* interface restrictions of a bound adapter. This operation is intended for
@@ -16271,6 +16991,7 @@
*/
#define MC_CMD_TSA_BIND_OUT_GET_ID_LENMIN 15
#define MC_CMD_TSA_BIND_OUT_GET_ID_LENMAX 252
+#define MC_CMD_TSA_BIND_OUT_GET_ID_LENMAX_MCDI2 1020
#define MC_CMD_TSA_BIND_OUT_GET_ID_LEN(num) (14+1*(num))
/* The protocol operation code MC_CMD_TSA_BIND_OP_GET_ID that is sent back to
* the caller.
@@ -16302,10 +17023,12 @@
#define MC_CMD_TSA_BIND_OUT_GET_ID_SIG_LEN 1
#define MC_CMD_TSA_BIND_OUT_GET_ID_SIG_MINNUM 1
#define MC_CMD_TSA_BIND_OUT_GET_ID_SIG_MAXNUM 238
+#define MC_CMD_TSA_BIND_OUT_GET_ID_SIG_MAXNUM_MCDI2 1006
/* MC_CMD_TSA_BIND_OUT_GET_TICKET msgresponse */
#define MC_CMD_TSA_BIND_OUT_GET_TICKET_LENMIN 5
#define MC_CMD_TSA_BIND_OUT_GET_TICKET_LENMAX 252
+#define MC_CMD_TSA_BIND_OUT_GET_TICKET_LENMAX_MCDI2 1020
#define MC_CMD_TSA_BIND_OUT_GET_TICKET_LEN(num) (4+1*(num))
/* The protocol operation code MC_CMD_TSA_BIND_OP_GET_TICKET that is sent back
* to the caller.
@@ -16320,6 +17043,7 @@
#define MC_CMD_TSA_BIND_OUT_GET_TICKET_TICKET_LEN 1
#define MC_CMD_TSA_BIND_OUT_GET_TICKET_TICKET_MINNUM 1
#define MC_CMD_TSA_BIND_OUT_GET_TICKET_TICKET_MAXNUM 248
+#define MC_CMD_TSA_BIND_OUT_GET_TICKET_TICKET_MAXNUM_MCDI2 1016
/* MC_CMD_TSA_BIND_OUT_SET_KEY msgresponse */
#define MC_CMD_TSA_BIND_OUT_SET_KEY_LEN 4
@@ -16391,6 +17115,7 @@
/* MC_CMD_TSA_BIND_OUT_GET_CERTIFICATE msgresponse */
#define MC_CMD_TSA_BIND_OUT_GET_CERTIFICATE_LENMIN 9
#define MC_CMD_TSA_BIND_OUT_GET_CERTIFICATE_LENMAX 252
+#define MC_CMD_TSA_BIND_OUT_GET_CERTIFICATE_LENMAX_MCDI2 1020
#define MC_CMD_TSA_BIND_OUT_GET_CERTIFICATE_LEN(num) (8+1*(num))
/* The protocol operation code MC_CMD_TSA_BIND_OP_GET_CERTIFICATE that is sent
* back to the caller.
@@ -16407,6 +17132,7 @@
#define MC_CMD_TSA_BIND_OUT_GET_CERTIFICATE_DATA_LEN 1
#define MC_CMD_TSA_BIND_OUT_GET_CERTIFICATE_DATA_MINNUM 1
#define MC_CMD_TSA_BIND_OUT_GET_CERTIFICATE_DATA_MAXNUM 244
+#define MC_CMD_TSA_BIND_OUT_GET_CERTIFICATE_DATA_MAXNUM_MCDI2 1012
/* MC_CMD_TSA_BIND_OUT_SECURE_UNBIND msgresponse: Response to secure unbind
* request.
@@ -16501,6 +17227,7 @@
/* MC_CMD_MANAGE_SECURITY_RULESET_CACHE_OUT msgresponse */
#define MC_CMD_MANAGE_SECURITY_RULESET_CACHE_OUT_LENMIN 5
#define MC_CMD_MANAGE_SECURITY_RULESET_CACHE_OUT_LENMAX 252
+#define MC_CMD_MANAGE_SECURITY_RULESET_CACHE_OUT_LENMAX_MCDI2 1020
#define MC_CMD_MANAGE_SECURITY_RULESET_CACHE_OUT_LEN(num) (4+1*(num))
/* indicates whether the persistent cache is valid (after completion of the
* requested operation in the case of rollback, commit, or invalidate)
@@ -16521,6 +17248,7 @@
#define MC_CMD_MANAGE_SECURITY_RULESET_CACHE_OUT_VERSION_LEN 1
#define MC_CMD_MANAGE_SECURITY_RULESET_CACHE_OUT_VERSION_MINNUM 1
#define MC_CMD_MANAGE_SECURITY_RULESET_CACHE_OUT_VERSION_MAXNUM 248
+#define MC_CMD_MANAGE_SECURITY_RULESET_CACHE_OUT_VERSION_MAXNUM_MCDI2 1016
/***********************************/
@@ -16536,6 +17264,7 @@
/* MC_CMD_NVRAM_PRIVATE_APPEND_IN msgrequest */
#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_LENMIN 9
#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_LENMAX 252
+#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_LENMAX_MCDI2 1020
#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_LEN(num) (8+1*(num))
/* The tag to be appended */
#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_TAG_OFST 0
@@ -16548,6 +17277,7 @@
#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_DATA_BUFFER_LEN 1
#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_DATA_BUFFER_MINNUM 1
#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_DATA_BUFFER_MAXNUM 244
+#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_DATA_BUFFER_MAXNUM_MCDI2 1012
/* MC_CMD_NVRAM_PRIVATE_APPEND_OUT msgresponse */
#define MC_CMD_NVRAM_PRIVATE_APPEND_OUT_LEN 0
@@ -16573,6 +17303,7 @@
/* MC_CMD_XPM_VERIFY_CONTENTS_OUT msgresponse */
#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_LENMIN 12
#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_LENMAX 252
+#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_LENMAX_MCDI2 1020
#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_LEN(num) (12+1*(num))
/* Number of sectors found (test builds only) */
#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_NUM_SECTORS_OFST 0
@@ -16588,6 +17319,7 @@
#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIGNATURE_LEN 1
#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIGNATURE_MINNUM 0
#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIGNATURE_MAXNUM 240
+#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIGNATURE_MAXNUM_MCDI2 1008
/***********************************/
@@ -16969,6 +17701,8 @@
* match any black/white-list filters and was denied by the default filter
*/
#define MC_CMD_TSA_INFO_OP_PKT_SAMPLE 0x2
+/* enum: Information about an unbind or decommission attempt. */
+#define MC_CMD_TSA_INFO_OP_UNBIND 0x3
/* MC_CMD_TSA_INFO_IN_LOCAL_IP msgrequest:
*
@@ -17073,6 +17807,34 @@
#define MC_CMD_TSA_INFO_IN_PKT_SAMPLE_PACKET_DATA_LEN 1
#define MC_CMD_TSA_INFO_IN_PKT_SAMPLE_PACKET_DATA_NUM 128
+/* MC_CMD_TSA_INFO_IN_UNBIND msgrequest: Information about an unbind or
+ * decommission attempt. The purpose of this event is to let the controller
+ * know about unbind and decommission attempts (both successful and failed)
+ * received from the adapter host. The event is not sent if the unbind or
+ * decommission request was received from the controller.
+ */
+#define MC_CMD_TSA_INFO_IN_UNBIND_LEN 12
+#define MC_CMD_TSA_INFO_IN_UNBIND_OP_HDR_OFST 0
+#define MC_CMD_TSA_INFO_IN_UNBIND_OP_HDR_LEN 4
+#define MC_CMD_TSA_INFO_IN_UNBIND_OP_LBN 0
+#define MC_CMD_TSA_INFO_IN_UNBIND_OP_WIDTH 16
+/* Type of the unbind attempt. */
+#define MC_CMD_TSA_INFO_IN_UNBIND_TYPE_OFST 4
+#define MC_CMD_TSA_INFO_IN_UNBIND_TYPE_LEN 4
+/* enum: This event is sent because MC_CMD_TSA_BIND_OP_SECURE_UNBIND was
+ * received from the adapter local host.
+ */
+#define MC_CMD_TSA_INFO_UNBIND_TYPE_SECURE_UNBIND 0x1
+/* enum: This event is sent because MC_CMD_TSA_BIND_OP_SECURE_DECOMMISSION was
+ * received from the adapter local host.
+ */
+#define MC_CMD_TSA_INFO_UNBIND_TYPE_SECURE_DECOMMISSION 0x2
+/* Result of the attempt. */
+#define MC_CMD_TSA_INFO_IN_UNBIND_RESULT_OFST 8
+#define MC_CMD_TSA_INFO_IN_UNBIND_RESULT_LEN 4
+/* Enum values, see field(s): */
+/* MC_CMD_TSA_BIND/MC_CMD_TSA_BIND_OUT_SECURE_UNBIND/RESULT */
+
/* MC_CMD_TSA_INFO_OUT msgresponse */
#define MC_CMD_TSA_INFO_OUT_LEN 0
@@ -17281,6 +18043,7 @@
/* MC_CMD_TSA_STATISTICS_IN_READ_CLEAR msgrequest */
#define MC_CMD_TSA_STATISTICS_IN_READ_CLEAR_LENMIN 20
#define MC_CMD_TSA_STATISTICS_IN_READ_CLEAR_LENMAX 252
+#define MC_CMD_TSA_STATISTICS_IN_READ_CLEAR_LENMAX_MCDI2 1020
#define MC_CMD_TSA_STATISTICS_IN_READ_CLEAR_LEN(num) (16+4*(num))
/* TSA statistics sub-operation code */
#define MC_CMD_TSA_STATISTICS_IN_READ_CLEAR_OP_CODE_OFST 0
@@ -17315,10 +18078,12 @@
#define MC_CMD_TSA_STATISTICS_IN_READ_CLEAR_COUNTER_ID_LEN 4
#define MC_CMD_TSA_STATISTICS_IN_READ_CLEAR_COUNTER_ID_MINNUM 1
#define MC_CMD_TSA_STATISTICS_IN_READ_CLEAR_COUNTER_ID_MAXNUM 59
+#define MC_CMD_TSA_STATISTICS_IN_READ_CLEAR_COUNTER_ID_MAXNUM_MCDI2 251
/* MC_CMD_TSA_STATISTICS_OUT_READ_CLEAR msgresponse */
#define MC_CMD_TSA_STATISTICS_OUT_READ_CLEAR_LENMIN 24
#define MC_CMD_TSA_STATISTICS_OUT_READ_CLEAR_LENMAX 248
+#define MC_CMD_TSA_STATISTICS_OUT_READ_CLEAR_LENMAX_MCDI2 1016
#define MC_CMD_TSA_STATISTICS_OUT_READ_CLEAR_LEN(num) (8+16*(num))
/* Number of statistics counters returned in this response */
#define MC_CMD_TSA_STATISTICS_OUT_READ_CLEAR_NUM_STATS_OFST 0
@@ -17330,6 +18095,7 @@
#define MC_CMD_TSA_STATISTICS_OUT_READ_CLEAR_STATS_COUNTERS_LEN 16
#define MC_CMD_TSA_STATISTICS_OUT_READ_CLEAR_STATS_COUNTERS_MINNUM 1
#define MC_CMD_TSA_STATISTICS_OUT_READ_CLEAR_STATS_COUNTERS_MAXNUM 15
+#define MC_CMD_TSA_STATISTICS_OUT_READ_CLEAR_STATS_COUNTERS_MAXNUM_MCDI2 63
/* MC_TSA_STATISTICS_ENTRY structuredef */
#define MC_TSA_STATISTICS_ENTRY_LEN 16
@@ -17399,6 +18165,7 @@
/* MC_CMD_TSA_CONFIG_IN_APPEND msgrequest */
#define MC_CMD_TSA_CONFIG_IN_APPEND_LENMIN 12
#define MC_CMD_TSA_CONFIG_IN_APPEND_LENMAX 252
+#define MC_CMD_TSA_CONFIG_IN_APPEND_LENMAX_MCDI2 1020
#define MC_CMD_TSA_CONFIG_IN_APPEND_LEN(num) (12+1*(num))
/* TSA configuration sub-operation code. The value shall be
* MC_CMD_TSA_CONFIG_OP_APPEND.
@@ -17416,6 +18183,7 @@
#define MC_CMD_TSA_CONFIG_IN_APPEND_DATA_LEN 1
#define MC_CMD_TSA_CONFIG_IN_APPEND_DATA_MINNUM 0
#define MC_CMD_TSA_CONFIG_IN_APPEND_DATA_MAXNUM 240
+#define MC_CMD_TSA_CONFIG_IN_APPEND_DATA_MAXNUM_MCDI2 1008
/* MC_CMD_TSA_CONFIG_OUT_APPEND msgresponse */
#define MC_CMD_TSA_CONFIG_OUT_APPEND_LEN 0
@@ -17445,6 +18213,7 @@
/* MC_CMD_TSA_CONFIG_OUT_READ msgresponse */
#define MC_CMD_TSA_CONFIG_OUT_READ_LENMIN 8
#define MC_CMD_TSA_CONFIG_OUT_READ_LENMAX 252
+#define MC_CMD_TSA_CONFIG_OUT_READ_LENMAX_MCDI2 1020
#define MC_CMD_TSA_CONFIG_OUT_READ_LEN(num) (8+1*(num))
/* The tag that was read */
#define MC_CMD_TSA_CONFIG_OUT_READ_TAG_OFST 0
@@ -17457,6 +18226,7 @@
#define MC_CMD_TSA_CONFIG_OUT_READ_DATA_LEN 1
#define MC_CMD_TSA_CONFIG_OUT_READ_DATA_MINNUM 0
#define MC_CMD_TSA_CONFIG_OUT_READ_DATA_MAXNUM 244
+#define MC_CMD_TSA_CONFIG_OUT_READ_DATA_MAXNUM_MCDI2 1012
/* MC_TSA_IPV4_ITEM structuredef */
#define MC_TSA_IPV4_ITEM_LEN 8
@@ -17515,6 +18285,7 @@
/* MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4 msgrequest */
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_LENMIN 16
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_LENMAX 248
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_LENMAX_MCDI2 1016
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_LEN(num) (8+8*(num))
/* Header containing information to identify which sub-operation of this
* command to perform. The header contains a 16-bit op-code. Unused space in
@@ -17534,6 +18305,7 @@
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_HI_OFST 12
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_MINNUM 1
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_MAXNUM 30
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_MAXNUM_MCDI2 126
/* MC_CMD_TSA_IPADDR_OUT_VALIDATE_IPV4 msgresponse */
#define MC_CMD_TSA_IPADDR_OUT_VALIDATE_IPV4_LEN 0
@@ -17541,6 +18313,7 @@
/* MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4 msgrequest */
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_LENMIN 16
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_LENMAX 248
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_LENMAX_MCDI2 1016
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_LEN(num) (8+8*(num))
/* Header containing information to identify which sub-operation of this
* command to perform. The header contains a 16-bit op-code. Unused space in
@@ -17560,6 +18333,7 @@
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_HI_OFST 12
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_MINNUM 1
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_MAXNUM 30
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_MAXNUM_MCDI2 126
/* MC_CMD_TSA_IPADDR_OUT_REMOVE_IPV4 msgresponse */
#define MC_CMD_TSA_IPADDR_OUT_REMOVE_IPV4_LEN 0
@@ -17989,6 +18763,7 @@
/* MC_CMD_GET_CERTIFICATE_OUT msgresponse */
#define MC_CMD_GET_CERTIFICATE_OUT_LENMIN 13
#define MC_CMD_GET_CERTIFICATE_OUT_LENMAX 252
+#define MC_CMD_GET_CERTIFICATE_OUT_LENMAX_MCDI2 1020
#define MC_CMD_GET_CERTIFICATE_OUT_LEN(num) (12+1*(num))
/* Type of the certificate. */
#define MC_CMD_GET_CERTIFICATE_OUT_TYPE_OFST 0
@@ -18008,6 +18783,7 @@
#define MC_CMD_GET_CERTIFICATE_OUT_DATA_LEN 1
#define MC_CMD_GET_CERTIFICATE_OUT_DATA_MINNUM 1
#define MC_CMD_GET_CERTIFICATE_OUT_DATA_MAXNUM 240
+#define MC_CMD_GET_CERTIFICATE_OUT_DATA_MAXNUM_MCDI2 1008
/***********************************/
@@ -18106,6 +18882,7 @@
/* MC_CMD_LTSSM_TRACE_POLL_OUT msgresponse */
#define MC_CMD_LTSSM_TRACE_POLL_OUT_LENMIN 16
#define MC_CMD_LTSSM_TRACE_POLL_OUT_LENMAX 248
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_LENMAX_MCDI2 1016
#define MC_CMD_LTSSM_TRACE_POLL_OUT_LEN(num) (8+8*(num))
#define MC_CMD_LTSSM_TRACE_POLL_OUT_FLAGS_OFST 0
#define MC_CMD_LTSSM_TRACE_POLL_OUT_FLAGS_LEN 4
@@ -18124,6 +18901,7 @@
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_HI_OFST 12
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_MINNUM 0
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_MAXNUM 30
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_MAXNUM_MCDI2 126
#define MC_CMD_LTSSM_TRACE_POLL_OUT_LTSSM_STATE_LBN 0
#define MC_CMD_LTSSM_TRACE_POLL_OUT_LTSSM_STATE_WIDTH 6
#define MC_CMD_LTSSM_TRACE_POLL_OUT_RDLH_LINK_UP_LBN 6
@@ -18140,5 +18918,205 @@
#define MC_CMD_LTSSM_TRACE_POLL_OUT_TIMESTAMP_US_OFST 12
#define MC_CMD_LTSSM_TRACE_POLL_OUT_TIMESTAMP_US_LEN 4
+
+/***********************************/
+/* MC_CMD_TELEMETRY_ENABLE
+ * This command enables telemetry processing of packets, allowing a remote host
+ * to gather information and analytics passing on the card. Enabling telemetry
+ * will have a performance cost. Not supported on all hardware and datapath
+ * variants. As of writing, only supported on Medford2 running full-featured
+ * firmware variant.
+ */
+#define MC_CMD_TELEMETRY_ENABLE 0x138
+#undef MC_CMD_0x138_PRIVILEGE_CTG
+
+#define MC_CMD_0x138_PRIVILEGE_CTG SRIOV_CTG_ADMIN
+
+/* MC_CMD_TELEMETRY_ENABLE_IN msgrequest */
+#define MC_CMD_TELEMETRY_ENABLE_IN_LEN 4
+#define MC_CMD_TELEMETRY_ENABLE_IN_STATE_OFST 0
+#define MC_CMD_TELEMETRY_ENABLE_IN_STATE_LEN 4
+/* enum: Disables telemetry functionality, returns the card to default
+ * behaviour of the configured datapath variant.
+ */
+#define MC_CMD_TELEMETRY_ENABLE_IN_DISABLE 0x0
+/* enum: Enables telemetry functionality on the currently configured datapath
+ * variant if supported.
+ */
+#define MC_CMD_TELEMETRY_ENABLE_IN_ENABLE 0x1
+
+/* MC_CMD_TELEMETRY_ENABLE_OUT msgresponse */
+#define MC_CMD_TELEMETRY_ENABLE_OUT_LEN 0
+
+/* TELEMETRY_CONFIG structuredef */
+#define TELEMETRY_CONFIG_LEN 36
+/* Bitfields to identify the list of config parameters included in the command.
+ * A bit-value of 1 indicates that the relevant config parameter field is
+ * valid; 0 indicates invalid and the config parameter field must be ignored by
+ * firmware. Firmware may however apply some default values for certain
+ * parameters.
+ */
+#define TELEMETRY_CONFIG_FLAGS_OFST 0
+#define TELEMETRY_CONFIG_FLAGS_LEN 4
+#define TELEMETRY_CONFIG_METRICS_COLLECTOR_IP_VALID_LBN 0
+#define TELEMETRY_CONFIG_METRICS_COLLECTOR_IP_VALID_WIDTH 1
+#define TELEMETRY_CONFIG_METRICS_COLLECTOR_PORT_VALID_LBN 1
+#define TELEMETRY_CONFIG_METRICS_COLLECTOR_PORT_VALID_WIDTH 1
+#define TELEMETRY_CONFIG_MONITOR_TIMEOUT_MS_VALID_LBN 2
+#define TELEMETRY_CONFIG_MONITOR_TIMEOUT_MS_VALID_WIDTH 1
+#define TELEMETRY_CONFIG_MAX_METRICS_COUNT_VALID_LBN 3
+#define TELEMETRY_CONFIG_MAX_METRICS_COUNT_VALID_WIDTH 1
+#define TELEMETRY_CONFIG_RESERVED1_LBN 4
+#define TELEMETRY_CONFIG_RESERVED1_WIDTH 28
+#define TELEMETRY_CONFIG_FLAGS_LBN 0
+#define TELEMETRY_CONFIG_FLAGS_WIDTH 32
+/* Collector IPv4/IPv6 address to which latency measurements are forwarded from
+ * the adapter (as bytes in network order; set last 12 bytes to 0 for IPv4
+ * address).
+ */
+#define TELEMETRY_CONFIG_METRICS_COLLECTOR_IP_OFST 4
+#define TELEMETRY_CONFIG_METRICS_COLLECTOR_IP_LEN 16
+#define TELEMETRY_CONFIG_METRICS_COLLECTOR_IP_LBN 32
+#define TELEMETRY_CONFIG_METRICS_COLLECTOR_IP_WIDTH 128
+/* Collector Port number to which latency measurements are forwarded from the
+ * adapter (as bytes in network order).
+ */
+#define TELEMETRY_CONFIG_METRICS_COLLECTOR_PORT_OFST 20
+#define TELEMETRY_CONFIG_METRICS_COLLECTOR_PORT_LEN 2
+#define TELEMETRY_CONFIG_METRICS_COLLECTOR_PORT_LBN 160
+#define TELEMETRY_CONFIG_METRICS_COLLECTOR_PORT_WIDTH 16
+/* Unused - set to 0. */
+#define TELEMETRY_CONFIG_RESERVED2_OFST 22
+#define TELEMETRY_CONFIG_RESERVED2_LEN 2
+#define TELEMETRY_CONFIG_RESERVED2_LBN 176
+#define TELEMETRY_CONFIG_RESERVED2_WIDTH 16
+/* MAC address of the collector (as bytes in network order). */
+#define TELEMETRY_CONFIG_METRICS_COLLECTOR_MAC_ADDR_OFST 24
+#define TELEMETRY_CONFIG_METRICS_COLLECTOR_MAC_ADDR_LEN 6
+#define TELEMETRY_CONFIG_METRICS_COLLECTOR_MAC_ADDR_LBN 192
+#define TELEMETRY_CONFIG_METRICS_COLLECTOR_MAC_ADDR_WIDTH 48
+/* Maximum number of latency measurements to be made on a telemetry flow. */
+#define TELEMETRY_CONFIG_MAX_METRICS_COUNT_OFST 30
+#define TELEMETRY_CONFIG_MAX_METRICS_COUNT_LEN 2
+#define TELEMETRY_CONFIG_MAX_METRICS_COUNT_LBN 240
+#define TELEMETRY_CONFIG_MAX_METRICS_COUNT_WIDTH 16
+/* Maximum duration for which a telemetry flow is monitored (in millisecs). */
+#define TELEMETRY_CONFIG_MONITOR_TIMEOUT_MS_OFST 32
+#define TELEMETRY_CONFIG_MONITOR_TIMEOUT_MS_LEN 4
+#define TELEMETRY_CONFIG_MONITOR_TIMEOUT_MS_LBN 256
+#define TELEMETRY_CONFIG_MONITOR_TIMEOUT_MS_WIDTH 32
+
+
+/***********************************/
+/* MC_CMD_TELEMETRY_CONFIG
+ * This top-level command includes various sub-opcodes that are used to apply
+ * (and read-back) telemetry related configuration parameters on the NIC.
+ * Reference - SF-120569-SW Telemetry Firmware Design.
+ */
+#define MC_CMD_TELEMETRY_CONFIG 0x139
+#undef MC_CMD_0x139_PRIVILEGE_CTG
+
+#define MC_CMD_0x139_PRIVILEGE_CTG SRIOV_CTG_ADMIN
+
+/* MC_CMD_TELEMETRY_CONFIG_IN msgrequest */
+#define MC_CMD_TELEMETRY_CONFIG_IN_LEN 4
+/* Telemetry configuration sub-operation code */
+#define MC_CMD_TELEMETRY_CONFIG_IN_OP_OFST 0
+#define MC_CMD_TELEMETRY_CONFIG_IN_OP_LEN 4
+/* enum: Configure parameters for telemetry measurements. */
+#define MC_CMD_TELEMETRY_CONFIG_OP_SET 0x1
+/* enum: Read current values of parameters for telemetry measurements. */
+#define MC_CMD_TELEMETRY_CONFIG_OP_GET 0x2
+
+/* MC_CMD_TELEMETRY_CONFIG_IN_SET msgrequest: This command configures the
+ * parameters necessary for tcp-latency measurements. The adapter adds a filter
+ * for every new tcp flow seen in both tx and rx directions and tracks the
+ * telemetry measurements related to the flow in a tracking table. Entries in
+ * the tracking table live as long as N measurements are made on the flow or
+ * the flow has been in the tracking table for the maximum configured duration.
+ * Telemetry measurements in this command refer to tcp-latency measurements for
+ * data-to-ack latency as well as data-to-data latency. All telemetry
+ * measurements are bundled into a UDP packet and forwarded to a collector
+ * whose IP address is configured using this command.
+ */
+#define MC_CMD_TELEMETRY_CONFIG_IN_SET_LEN 40
+/* Telemetry configuration sub-operation code. Must be set to
+ * MC_CMD_TELEMETRY_CONFIG_OP_SET.
+ */
+#define MC_CMD_TELEMETRY_CONFIG_IN_SET_OP_OFST 0
+#define MC_CMD_TELEMETRY_CONFIG_IN_SET_OP_LEN 4
+/* struct of type TELEMETRY_CONFIG. */
+#define MC_CMD_TELEMETRY_CONFIG_IN_SET_PARAMETERS_OFST 4
+#define MC_CMD_TELEMETRY_CONFIG_IN_SET_PARAMETERS_LEN 36
+
+/* MC_CMD_TELEMETRY_CONFIG_OUT_SET msgresponse */
+#define MC_CMD_TELEMETRY_CONFIG_OUT_SET_LEN 0
+
+/* MC_CMD_TELEMETRY_CONFIG_IN_GET msgrequest: This command reads out the
+ * current values of config parameters necessary for tcp-latency measurements.
+ * See MC_CMD_TELEMETRY_SET_CONFIG for more information about the configuration
+ * parameters.
+ */
+#define MC_CMD_TELEMETRY_CONFIG_IN_GET_LEN 4
+/* Telemetry configuration sub-operation code. Must be set to
+ * MC_CMD_TELEMETRY_CONFIG_OP_GET.
+ */
+#define MC_CMD_TELEMETRY_CONFIG_IN_GET_OP_OFST 0
+#define MC_CMD_TELEMETRY_CONFIG_IN_GET_OP_LEN 4
+
+/* MC_CMD_TELEMETRY_CONFIG_OUT_GET msgresponse */
+#define MC_CMD_TELEMETRY_CONFIG_OUT_GET_LEN 36
+/* struct of type TELEMETRY_CONFIG. */
+#define MC_CMD_TELEMETRY_CONFIG_OUT_GET_PARAMETERS_OFST 0
+#define MC_CMD_TELEMETRY_CONFIG_OUT_GET_PARAMETERS_LEN 36
+
+/* EF100_MCDI_EVENT structuredef: The structure of an MCDI_EVENT on EF100
+ * platforms
+ */
+#define EF100_MCDI_EVENT_LEN 8
+/* Defined by QMDA. Will be 1 for all SFC events */
+#define EF100_MCDI_EVENT_EV_DATA_FORMAT_LBN 0
+#define EF100_MCDI_EVENT_EV_DATA_FORMAT_WIDTH 1
+/* Defined by QMDA. The phase bit, changes each time round the event ring */
+#define EF100_MCDI_EVENT_EV_EVQ_PHASE_LBN 1
+#define EF100_MCDI_EVENT_EV_EVQ_PHASE_WIDTH 1
+/* Defined by QDMA. Meaning unclear. */
+#define EF100_MCDI_EVENT_EV_ERROR_LBN 2
+#define EF100_MCDI_EVENT_EV_ERROR_WIDTH 1
+/* Defined by QMDA. Indicates a descriptor was consumed. */
+#define EF100_MCDI_EVENT_EV_DESC_USED_LBN 3
+#define EF100_MCDI_EVENT_EV_DESC_USED_WIDTH 1
+/* Indicates the top-level type of the event. Event types are as documented in
+ * SF-119689-TC and defined in events.yml. For MCDI events it's always
+ * EF100_EV_MCDI. HW can generate other event type for its events.
+ */
+#define EF100_MCDI_EVENT_EV_TYPE_LBN 4
+#define EF100_MCDI_EVENT_EV_TYPE_WIDTH 4
+#define EF100_MCDI_EVENT_CODE_OFST 1
+#define EF100_MCDI_EVENT_CODE_LEN 1
+/* Enum values, see field(s): */
+/* MCDI_EVENT/CODE */
+#define EF100_MCDI_EVENT_CODE_LBN 8
+#define EF100_MCDI_EVENT_CODE_WIDTH 8
+/* Data associated with PTP events which doesn't fit into the main DATA field
+ */
+#define EF100_MCDI_EVENT_PTP_DATA_OFST 2
+#define EF100_MCDI_EVENT_PTP_DATA_LEN 1
+#define EF100_MCDI_EVENT_SRC_LBN 0
+#define EF100_MCDI_EVENT_SRC_WIDTH 8
+#define EF100_MCDI_EVENT_PTP_DATA_LBN 16
+#define EF100_MCDI_EVENT_PTP_DATA_WIDTH 8
+/* Set if this message continues into another event */
+#define EF100_MCDI_EVENT_CONT_LBN 24
+#define EF100_MCDI_EVENT_CONT_WIDTH 1
+#define EF100_MCDI_EVENT_LEVEL_LBN 25
+#define EF100_MCDI_EVENT_LEVEL_WIDTH 3
+/* Enum values, see field(s): */
+/* MCDI_EVENT/LEVEL */
+/* Data associated with this event. Format depends on the event code. */
+#define EF100_MCDI_EVENT_DATA_OFST 4
+#define EF100_MCDI_EVENT_DATA_LEN 4
+#define EF100_MCDI_EVENT_DATA_LBN 32
+#define EF100_MCDI_EVENT_DATA_WIDTH 32
+
#endif /* _SIENA_MC_DRIVER_PCOL_H */
-/*! \cidoxg_end */
diff --git a/drivers/net/sfc/base/efx_regs_mcdi_aoe.h b/drivers/net/sfc/base/efx_regs_mcdi_aoe.h
index 6aaf212f1..6bedfd71d 100644
--- a/drivers/net/sfc/base/efx_regs_mcdi_aoe.h
+++ b/drivers/net/sfc/base/efx_regs_mcdi_aoe.h
@@ -4,7 +4,11 @@
* All rights reserved.
*/
-/*! \cidoxg_firmware_mc_cmd */
+/*
+ * This file is automatically generated. DO NOT EDIT IT.
+ * To make changes, edit the .yml files in sfregistry under doc/mcdi/ and
+ * rebuild this file with "make -C doc mcdiheaders".
+ */
#ifndef _SIENA_MC_DRIVER_PCOL_AOE_H
#define _SIENA_MC_DRIVER_PCOL_AOE_H
@@ -271,6 +275,7 @@
/* MC_CMD_FC_IN_WRITE32 msgrequest */
#define MC_CMD_FC_IN_WRITE32_LENMIN 16
#define MC_CMD_FC_IN_WRITE32_LENMAX 252
+#define MC_CMD_FC_IN_WRITE32_LENMAX_MCDI2 1020
#define MC_CMD_FC_IN_WRITE32_LEN(num) (12+4*(num))
/* MC_CMD_FC_IN_CMD_OFST 0 */
/* MC_CMD_FC_IN_CMD_LEN 4 */
@@ -282,6 +287,7 @@
#define MC_CMD_FC_IN_WRITE32_BUFFER_LEN 4
#define MC_CMD_FC_IN_WRITE32_BUFFER_MINNUM 1
#define MC_CMD_FC_IN_WRITE32_BUFFER_MAXNUM 60
+#define MC_CMD_FC_IN_WRITE32_BUFFER_MAXNUM_MCDI2 252
/* MC_CMD_FC_IN_TRC_READ msgrequest */
#define MC_CMD_FC_IN_TRC_READ_LEN 12
@@ -517,6 +523,7 @@
/* MC_CMD_FC_IN_IO_REL_WRITE32 msgrequest */
#define MC_CMD_FC_IN_IO_REL_WRITE32_LENMIN 20
#define MC_CMD_FC_IN_IO_REL_WRITE32_LENMAX 252
+#define MC_CMD_FC_IN_IO_REL_WRITE32_LENMAX_MCDI2 1020
#define MC_CMD_FC_IN_IO_REL_WRITE32_LEN(num) (16+4*(num))
/* MC_CMD_FC_IN_CMD_OFST 0 */
/* MC_CMD_FC_IN_CMD_LEN 4 */
@@ -530,6 +537,7 @@
#define MC_CMD_FC_IN_IO_REL_WRITE32_BUFFER_LEN 4
#define MC_CMD_FC_IN_IO_REL_WRITE32_BUFFER_MINNUM 1
#define MC_CMD_FC_IN_IO_REL_WRITE32_BUFFER_MAXNUM 59
+#define MC_CMD_FC_IN_IO_REL_WRITE32_BUFFER_MAXNUM_MCDI2 251
/* MC_CMD_FC_IN_UHLINK msgrequest */
#define MC_CMD_FC_IN_UHLINK_LEN 8
@@ -1021,6 +1029,7 @@
/* MC_CMD_FC_IN_SPI_WRITE msgrequest */
#define MC_CMD_FC_IN_SPI_WRITE_LENMIN 16
#define MC_CMD_FC_IN_SPI_WRITE_LENMAX 252
+#define MC_CMD_FC_IN_SPI_WRITE_LENMAX_MCDI2 1020
#define MC_CMD_FC_IN_SPI_WRITE_LEN(num) (12+4*(num))
/* MC_CMD_FC_IN_CMD_OFST 0 */
/* MC_CMD_FC_IN_CMD_LEN 4 */
@@ -1032,6 +1041,7 @@
#define MC_CMD_FC_IN_SPI_WRITE_BUFFER_LEN 4
#define MC_CMD_FC_IN_SPI_WRITE_BUFFER_MINNUM 1
#define MC_CMD_FC_IN_SPI_WRITE_BUFFER_MAXNUM 60
+#define MC_CMD_FC_IN_SPI_WRITE_BUFFER_MAXNUM_MCDI2 252
/* MC_CMD_FC_IN_SPI_ERASE msgrequest */
#define MC_CMD_FC_IN_SPI_ERASE_LEN 16
@@ -1244,11 +1254,13 @@
/* MC_CMD_FC_OUT_READ32 msgresponse */
#define MC_CMD_FC_OUT_READ32_LENMIN 4
#define MC_CMD_FC_OUT_READ32_LENMAX 252
+#define MC_CMD_FC_OUT_READ32_LENMAX_MCDI2 1020
#define MC_CMD_FC_OUT_READ32_LEN(num) (0+4*(num))
#define MC_CMD_FC_OUT_READ32_BUFFER_OFST 0
#define MC_CMD_FC_OUT_READ32_BUFFER_LEN 4
#define MC_CMD_FC_OUT_READ32_BUFFER_MINNUM 1
#define MC_CMD_FC_OUT_READ32_BUFFER_MAXNUM 63
+#define MC_CMD_FC_OUT_READ32_BUFFER_MAXNUM_MCDI2 255
/* MC_CMD_FC_OUT_WRITE32 msgresponse */
#define MC_CMD_FC_OUT_WRITE32_LEN 0
@@ -1856,11 +1868,13 @@
/* MC_CMD_FC_OUT_IO_REL_READ32 msgresponse */
#define MC_CMD_FC_OUT_IO_REL_READ32_LENMIN 4
#define MC_CMD_FC_OUT_IO_REL_READ32_LENMAX 252
+#define MC_CMD_FC_OUT_IO_REL_READ32_LENMAX_MCDI2 1020
#define MC_CMD_FC_OUT_IO_REL_READ32_LEN(num) (0+4*(num))
#define MC_CMD_FC_OUT_IO_REL_READ32_BUFFER_OFST 0
#define MC_CMD_FC_OUT_IO_REL_READ32_BUFFER_LEN 4
#define MC_CMD_FC_OUT_IO_REL_READ32_BUFFER_MINNUM 1
#define MC_CMD_FC_OUT_IO_REL_READ32_BUFFER_MAXNUM 63
+#define MC_CMD_FC_OUT_IO_REL_READ32_BUFFER_MAXNUM_MCDI2 255
/* MC_CMD_FC_OUT_IO_REL_WRITE32 msgresponse */
#define MC_CMD_FC_OUT_IO_REL_WRITE32_LEN 0
@@ -2011,12 +2025,14 @@
/* MC_CMD_FC_OUT_DMA_READ msgresponse */
#define MC_CMD_FC_OUT_DMA_READ_LENMIN 1
#define MC_CMD_FC_OUT_DMA_READ_LENMAX 252
+#define MC_CMD_FC_OUT_DMA_READ_LENMAX_MCDI2 1020
#define MC_CMD_FC_OUT_DMA_READ_LEN(num) (0+1*(num))
/* The data read */
#define MC_CMD_FC_OUT_DMA_READ_DATA_OFST 0
#define MC_CMD_FC_OUT_DMA_READ_DATA_LEN 1
#define MC_CMD_FC_OUT_DMA_READ_DATA_MINNUM 1
#define MC_CMD_FC_OUT_DMA_READ_DATA_MAXNUM 252
+#define MC_CMD_FC_OUT_DMA_READ_DATA_MAXNUM_MCDI2 1020
/* MC_CMD_FC_OUT_TIMED_READ_SET msgresponse */
#define MC_CMD_FC_OUT_TIMED_READ_SET_LEN 4
@@ -2110,6 +2126,7 @@
/* MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT msgresponse */
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_LENMIN 8
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_LENMAX 248
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_LENMAX_MCDI2 1016
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_LEN(num) (0+8*(num))
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_SECONDS_OFST 0
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_SECONDS_LEN 4
@@ -2121,15 +2138,18 @@
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_HI_OFST 4
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_MINNUM 0
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_MAXNUM 31
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_MAXNUM_MCDI2 127
/* MC_CMD_FC_OUT_SPI_READ msgresponse */
#define MC_CMD_FC_OUT_SPI_READ_LENMIN 4
#define MC_CMD_FC_OUT_SPI_READ_LENMAX 252
+#define MC_CMD_FC_OUT_SPI_READ_LENMAX_MCDI2 1020
#define MC_CMD_FC_OUT_SPI_READ_LEN(num) (0+4*(num))
#define MC_CMD_FC_OUT_SPI_READ_BUFFER_OFST 0
#define MC_CMD_FC_OUT_SPI_READ_BUFFER_LEN 4
#define MC_CMD_FC_OUT_SPI_READ_BUFFER_MINNUM 1
#define MC_CMD_FC_OUT_SPI_READ_BUFFER_MAXNUM 63
+#define MC_CMD_FC_OUT_SPI_READ_BUFFER_MAXNUM_MCDI2 255
/* MC_CMD_FC_OUT_SPI_WRITE msgresponse */
#define MC_CMD_FC_OUT_SPI_WRITE_LEN 0
@@ -2254,6 +2274,8 @@
#define MC_CMD_AOE_OP_GET_ASIC_PORTS 0x19
/* enum: Get FC assert information and register dump */
#define MC_CMD_AOE_OP_GET_FC_ASSERT_INFO 0x1a
+/* enum: Set MUM startup FUSE byte with extended delay */
+#define MC_CMD_AOE_OP_MUM_STARTUP_FUSE 0x1b
/* MC_CMD_AOE_OUT msgresponse */
#define MC_CMD_AOE_OUT_LEN 0
@@ -2409,6 +2431,7 @@
/* MC_CMD_AOE_IN_JTAG_WRITE msgrequest */
#define MC_CMD_AOE_IN_JTAG_WRITE_LENMIN 12
#define MC_CMD_AOE_IN_JTAG_WRITE_LENMAX 252
+#define MC_CMD_AOE_IN_JTAG_WRITE_LENMAX_MCDI2 1020
#define MC_CMD_AOE_IN_JTAG_WRITE_LEN(num) (8+4*(num))
/* MC_CMD_AOE_IN_CMD_OFST 0 */
/* MC_CMD_AOE_IN_CMD_LEN 4 */
@@ -2418,6 +2441,7 @@
#define MC_CMD_AOE_IN_JTAG_WRITE_DATA_LEN 4
#define MC_CMD_AOE_IN_JTAG_WRITE_DATA_MINNUM 1
#define MC_CMD_AOE_IN_JTAG_WRITE_DATA_MAXNUM 61
+#define MC_CMD_AOE_IN_JTAG_WRITE_DATA_MAXNUM_MCDI2 253
/* MC_CMD_AOE_IN_FPGA_ACCESS msgrequest */
#define MC_CMD_AOE_IN_FPGA_ACCESS_LEN 8
@@ -2575,6 +2599,17 @@
#define MC_CMD_AOE_IN_FC_BOOT_CONTROL_BOOT_ENABLE_LBN 0
#define MC_CMD_AOE_IN_FC_BOOT_CONTROL_BOOT_ENABLE_WIDTH 1
+/* MC_CMD_AOE_IN_MUM_STARTUP_FUSE msgrequest: On AOE2, set MUM startup FUSE
+ * byte with extended delay of 64ms. On some servers with noisy power rails,
+ * this ensures that the MUM IO pins do not show spurious transitions while the
+ * power rails are stabilising. Note that this operation requires a hard-
+ * powercycle to take effect. See bug76446.
+ */
+#define MC_CMD_AOE_IN_MUM_STARTUP_FUSE_LEN 4
+/* Must be MC_CMD_AOE_OP_MUM_STARTUP_FUSE */
+/* MC_CMD_AOE_IN_CMD_OFST 0 */
+/* MC_CMD_AOE_IN_CMD_LEN 4 */
+
/* MC_CMD_AOE_OUT_GET_FC_ASSERT_INFO msgresponse */
#define MC_CMD_AOE_OUT_GET_FC_ASSERT_INFO_LEN 144
/* Assertion status flag. */
@@ -2757,12 +2792,14 @@
/* MC_CMD_AOE_OUT_FAN_FAILURES msgresponse */
#define MC_CMD_AOE_OUT_FAN_FAILURES_LENMIN 4
#define MC_CMD_AOE_OUT_FAN_FAILURES_LENMAX 252
+#define MC_CMD_AOE_OUT_FAN_FAILURES_LENMAX_MCDI2 1020
#define MC_CMD_AOE_OUT_FAN_FAILURES_LEN(num) (0+4*(num))
/* Failure counts for each fan */
#define MC_CMD_AOE_OUT_FAN_FAILURES_COUNT_OFST 0
#define MC_CMD_AOE_OUT_FAN_FAILURES_COUNT_LEN 4
#define MC_CMD_AOE_OUT_FAN_FAILURES_COUNT_MINNUM 1
#define MC_CMD_AOE_OUT_FAN_FAILURES_COUNT_MAXNUM 63
+#define MC_CMD_AOE_OUT_FAN_FAILURES_COUNT_MAXNUM_MCDI2 255
/* MC_CMD_AOE_OUT_CPLD_REPROGRAM msgresponse */
#define MC_CMD_AOE_OUT_CPLD_REPROGRAM_LEN 4
@@ -2795,6 +2832,7 @@
/* MC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO msgresponse */
#define MC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO_LENMIN 5
#define MC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO_LENMAX 252
+#define MC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO_LENMAX_MCDI2 1020
#define MC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO_LEN(num) (4+1*(num))
/* in bytes */
#define MC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO_DATALEN_OFST 0
@@ -2803,10 +2841,12 @@
#define MC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO_DATA_LEN 1
#define MC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO_DATA_MINNUM 1
#define MC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO_DATA_MAXNUM 248
+#define MC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO_DATA_MAXNUM_MCDI2 1016
/* MC_CMD_AOE_OUT_JTAG_WRITE msgresponse */
#define MC_CMD_AOE_OUT_JTAG_WRITE_LENMIN 12
#define MC_CMD_AOE_OUT_JTAG_WRITE_LENMAX 252
+#define MC_CMD_AOE_OUT_JTAG_WRITE_LENMAX_MCDI2 1020
#define MC_CMD_AOE_OUT_JTAG_WRITE_LEN(num) (8+4*(num))
/* Used to align the in and out data blocks so the MC can re-use the cmd */
#define MC_CMD_AOE_OUT_JTAG_WRITE_DATALEN_OFST 0
@@ -2818,6 +2858,7 @@
#define MC_CMD_AOE_OUT_JTAG_WRITE_DATA_LEN 4
#define MC_CMD_AOE_OUT_JTAG_WRITE_DATA_MINNUM 1
#define MC_CMD_AOE_OUT_JTAG_WRITE_DATA_MAXNUM 61
+#define MC_CMD_AOE_OUT_JTAG_WRITE_DATA_MAXNUM_MCDI2 253
/* MC_CMD_AOE_OUT_FPGA_ACCESS msgresponse */
#define MC_CMD_AOE_OUT_FPGA_ACCESS_LEN 0
@@ -2825,6 +2866,7 @@
/* MC_CMD_AOE_OUT_DDR msgresponse */
#define MC_CMD_AOE_OUT_DDR_LENMIN 17
#define MC_CMD_AOE_OUT_DDR_LENMAX 252
+#define MC_CMD_AOE_OUT_DDR_LENMAX_MCDI2 1020
#define MC_CMD_AOE_OUT_DDR_LEN(num) (16+1*(num))
/* Information on the module. */
#define MC_CMD_AOE_OUT_DDR_FLAGS_OFST 0
@@ -2851,6 +2893,7 @@
#define MC_CMD_AOE_OUT_DDR_SPD_LEN 1
#define MC_CMD_AOE_OUT_DDR_SPD_MINNUM 1
#define MC_CMD_AOE_OUT_DDR_SPD_MAXNUM 236
+#define MC_CMD_AOE_OUT_DDR_SPD_MAXNUM_MCDI2 1004
/* MC_CMD_AOE_OUT_SET_MTU_OFFSET msgresponse */
#define MC_CMD_AOE_OUT_SET_MTU_OFFSET_LEN 0
@@ -2910,5 +2953,12 @@
/* MC_CMD_AOE_OUT_FC_BOOT msgresponse */
#define MC_CMD_AOE_OUT_FC_BOOT_LEN 0
+/* MC_CMD_AOE_OUT_MUM_STARTUP_FUSE msgresponse */
+#define MC_CMD_AOE_OUT_MUM_STARTUP_FUSE_LEN 4
+/* Current value of startup FUSE byte (fusebyte#4) read back after the update
+ * operation.
+ */
+#define MC_CMD_AOE_OUT_MUM_STARTUP_FUSE_READBACK_VALUE_OFST 0
+#define MC_CMD_AOE_OUT_MUM_STARTUP_FUSE_READBACK_VALUE_LEN 4
+
#endif /* _SIENA_MC_DRIVER_PCOL_AOE_H */
-/*! \cidoxg_end */
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 28/38] net/sfc/base: add support for the Rx event mode w/o continue
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (26 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 27/38] net/sfc/base: update auto-generated MCDI definition headers Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 29/38] net/sfc/base: rename header with MCDI strings Andrew Rybchenko
` (10 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Mark Spender
From: Mark Spender <mspender@solarflare.com>
The recently added NO_CONT_EV mode is recommended for when looking for
maximum throughput on 100G links as it allows the firmware to operate
more efficiently. The biggest benefit is when using scatter and jumbo
frames, but it is also necessary to achieve line rate in other cases.
Support for NO_CONT_EV when scatter is disabled is simple - the main
datapth change is to always read the packet length from the prefix,
not the event. This requires storing a flag with the event queue so
the event handler knows NO_CONT_EV mode is in use.
Supporting NO_CONT_EV with scatter would require an API change.
(Now the ee_flags field in efx_evq_t is used on the datapath, move it
next to other fields which are also read on the datapath to try to avoid
reading an additional cache line.)
Signed-off-by: Mark Spender <mspender@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/ef10_ev.c | 65 +++++++++++++++++++++++++++------
drivers/net/sfc/base/ef10_nic.c | 8 ++++
drivers/net/sfc/base/ef10_rx.c | 23 +++++++++---
drivers/net/sfc/base/efx.h | 11 ++++++
drivers/net/sfc/base/efx_impl.h | 3 +-
5 files changed, 91 insertions(+), 19 deletions(-)
diff --git a/drivers/net/sfc/base/ef10_ev.c b/drivers/net/sfc/base/ef10_ev.c
index b80cb0a35..202930876 100644
--- a/drivers/net/sfc/base/ef10_ev.c
+++ b/drivers/net/sfc/base/ef10_ev.c
@@ -457,6 +457,23 @@ ef10_ev_qcreate(
goto fail2;
}
+ /*
+ * NO_CONT_EV mode is only requested from the firmware when creating
+ * receive queues, but here it needs to be specified at event queue
+ * creation, as the event handler needs to know which format is in use.
+ *
+ * If EFX_EVQ_FLAGS_NO_CONT_EV is specified, all receive queues for this
+ * event queue will be created in NO_CONT_EV mode.
+ *
+ * See SF-109306-TC 5.11 "Events for RXQs in NO_CONT_EV mode".
+ */
+ if (flags & EFX_EVQ_FLAGS_NO_CONT_EV) {
+ if (enp->en_nic_cfg.enc_no_cont_ev_mode_supported == B_FALSE) {
+ rc = EINVAL;
+ goto fail3;
+ }
+ }
+
/* Set up the handler table */
eep->ee_rx = ef10_ev_rx;
eep->ee_tx = ef10_ev_tx;
@@ -494,7 +511,7 @@ ef10_ev_qcreate(
rc = efx_mcdi_init_evq_v2(enp, index, esmp, ndescs, irq, us,
flags);
if (rc != 0)
- goto fail3;
+ goto fail4;
} else {
/*
* On Huntington we need to specify the settings to use.
@@ -511,11 +528,13 @@ ef10_ev_qcreate(
rc = efx_mcdi_init_evq(enp, index, esmp, ndescs, irq, us, flags,
low_latency);
if (rc != 0)
- goto fail4;
+ goto fail5;
}
return (0);
+fail5:
+ EFSYS_PROBE(fail5);
fail4:
EFSYS_PROBE(fail4);
fail3:
@@ -912,23 +931,47 @@ ef10_ev_rx(
if (mac_class == ESE_DZ_MAC_CLASS_UCAST)
flags |= EFX_PKT_UNICAST;
- /* Increment the count of descriptors read */
+ /*
+ * Increment the count of descriptors read.
+ *
+ * In NO_CONT_EV mode, RX_DSC_PTR_LBITS is actually a packet count, but
+ * when scatter is disabled, there is only one descriptor per packet and
+ * so it can be treated the same.
+ *
+ * TODO: Support scatter in NO_CONT_EV mode.
+ */
desc_count = (next_read_lbits - eersp->eers_rx_read_ptr) &
EFX_MASK32(ESF_DZ_RX_DSC_PTR_LBITS);
eersp->eers_rx_read_ptr += desc_count;
- /*
- * FIXME: add error checking to make sure this a batched event.
- * This could also be an aborted scatter, see Bug36629.
- */
- if (desc_count > 1) {
+ /* Calculate the index of the last descriptor consumed */
+ last_used_id = (eersp->eers_rx_read_ptr - 1) & eersp->eers_rx_mask;
+
+ if (eep->ee_flags & EFX_EVQ_FLAGS_NO_CONT_EV) {
+ if (desc_count > 1)
+ EFX_EV_QSTAT_INCR(eep, EV_RX_BATCH);
+
+ /* Always read the length from the prefix in NO_CONT_EV mode. */
+ flags |= EFX_PKT_PREFIX_LEN;
+
+ /*
+ * Check for an aborted scatter, signalled by the ABORT bit in
+ * NO_CONT_EV mode. The ABORT bit was not used before NO_CONT_EV
+ * mode was added as it was broken in Huntington silicon.
+ */
+ if (EFX_QWORD_FIELD(*eqp, ESF_EZ_RX_ABORT) != 0) {
+ flags |= EFX_DISCARD;
+ goto deliver;
+ }
+ } else if (desc_count > 1) {
+ /*
+ * FIXME: add error checking to make sure this a batched event.
+ * This could also be an aborted scatter, see Bug36629.
+ */
EFX_EV_QSTAT_INCR(eep, EV_RX_BATCH);
flags |= EFX_PKT_PREFIX_LEN;
}
- /* Calculate the index of the last descriptor consumed */
- last_used_id = (eersp->eers_rx_read_ptr - 1) & eersp->eers_rx_mask;
-
/* Check for errors that invalidate checksum and L3/L4 fields */
if (EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_TRUNC_ERR) != 0) {
/* RX frame truncated */
diff --git a/drivers/net/sfc/base/ef10_nic.c b/drivers/net/sfc/base/ef10_nic.c
index d68920638..39ca53f03 100644
--- a/drivers/net/sfc/base/ef10_nic.c
+++ b/drivers/net/sfc/base/ef10_nic.c
@@ -1197,6 +1197,14 @@ ef10_get_datapath_caps(
else
encp->enc_init_evq_v2_supported = B_FALSE;
+ /*
+ * Check if the NO_CONT_EV mode for RX events is supported.
+ */
+ if (CAP_FLAGS2(req, INIT_RXQ_NO_CONT_EV))
+ encp->enc_no_cont_ev_mode_supported = B_TRUE;
+ else
+ encp->enc_no_cont_ev_mode_supported = B_FALSE;
+
/*
* Check if firmware-verified NVRAM updates must be used.
*
diff --git a/drivers/net/sfc/base/ef10_rx.c b/drivers/net/sfc/base/ef10_rx.c
index 23b80d78f..3b296e488 100644
--- a/drivers/net/sfc/base/ef10_rx.c
+++ b/drivers/net/sfc/base/ef10_rx.c
@@ -15,7 +15,7 @@ static __checkReturn efx_rc_t
efx_mcdi_init_rxq(
__in efx_nic_t *enp,
__in uint32_t ndescs,
- __in uint32_t target_evq,
+ __in efx_evq_t *eep,
__in uint32_t label,
__in uint32_t instance,
__in efsys_mem_t *esmp,
@@ -38,6 +38,7 @@ efx_mcdi_init_rxq(
efx_rc_t rc;
uint32_t dma_mode;
boolean_t want_outer_classes;
+ boolean_t no_cont_ev;
EFSYS_ASSERT3U(ndescs, <=, encp->enc_rxq_max_ndescs);
@@ -47,6 +48,13 @@ efx_mcdi_init_rxq(
goto fail1;
}
+ no_cont_ev = (eep->ee_flags & EFX_EVQ_FLAGS_NO_CONT_EV);
+ if ((no_cont_ev == B_TRUE) && (disable_scatter == B_FALSE)) {
+ /* TODO: Support scatter in NO_CONT_EV mode */
+ rc = EINVAL;
+ goto fail2;
+ }
+
if (ps_bufsize > 0)
dma_mode = MC_CMD_INIT_RXQ_EXT_IN_PACKED_STREAM;
else if (es_bufs_per_desc > 0)
@@ -81,10 +89,10 @@ efx_mcdi_init_rxq(
req.emr_out_length = MC_CMD_INIT_RXQ_V3_OUT_LEN;
MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_SIZE, ndescs);
- MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_TARGET_EVQ, target_evq);
+ MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_TARGET_EVQ, eep->ee_index);
MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_LABEL, label);
MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_INSTANCE, instance);
- MCDI_IN_POPULATE_DWORD_9(req, INIT_RXQ_EXT_IN_FLAGS,
+ MCDI_IN_POPULATE_DWORD_10(req, INIT_RXQ_EXT_IN_FLAGS,
INIT_RXQ_EXT_IN_FLAG_BUFF_MODE, 0,
INIT_RXQ_EXT_IN_FLAG_HDR_SPLIT, 0,
INIT_RXQ_EXT_IN_FLAG_TIMESTAMP, 0,
@@ -94,7 +102,8 @@ efx_mcdi_init_rxq(
INIT_RXQ_EXT_IN_DMA_MODE,
dma_mode,
INIT_RXQ_EXT_IN_PACKED_STREAM_BUFF_SIZE, ps_bufsize,
- INIT_RXQ_EXT_IN_FLAG_WANT_OUTER_CLASSES, want_outer_classes);
+ INIT_RXQ_EXT_IN_FLAG_WANT_OUTER_CLASSES, want_outer_classes,
+ INIT_RXQ_EXT_IN_FLAG_NO_CONT_EV, no_cont_ev);
MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_OWNER_ID, 0);
MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_PORT_ID, EVB_PORT_ID_ASSIGNED);
@@ -127,11 +136,13 @@ efx_mcdi_init_rxq(
if (req.emr_rc != 0) {
rc = req.emr_rc;
- goto fail2;
+ goto fail3;
}
return (0);
+fail3:
+ EFSYS_PROBE(fail3);
fail2:
EFSYS_PROBE(fail2);
fail1:
@@ -1122,7 +1133,7 @@ ef10_rx_qcreate(
else
want_inner_classes = B_FALSE;
- if ((rc = efx_mcdi_init_rxq(enp, ndescs, eep->ee_index, label, index,
+ if ((rc = efx_mcdi_init_rxq(enp, ndescs, eep, label, index,
esmp, disable_scatter, want_inner_classes,
ps_buf_size, es_bufs_per_desc, es_max_dma_len,
es_buf_stride, hol_block_timeout)) != 0)
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index f7d0a4f67..f5ad095d4 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -1370,6 +1370,7 @@ typedef struct efx_nic_cfg_s {
boolean_t enc_allow_set_mac_with_installed_filters;
boolean_t enc_enhanced_set_mac_supported;
boolean_t enc_init_evq_v2_supported;
+ boolean_t enc_no_cont_ev_mode_supported;
boolean_t enc_rx_packed_stream_supported;
boolean_t enc_rx_var_packed_stream_supported;
boolean_t enc_rx_es_super_buffer_supported;
@@ -2000,6 +2001,16 @@ efx_evq_nbufs(
#define EFX_EVQ_FLAGS_NOTIFY_INTERRUPT (0x0) /* Interrupting (default) */
#define EFX_EVQ_FLAGS_NOTIFY_DISABLED (0x4) /* Non-interrupting */
+/*
+ * Use the NO_CONT_EV RX event format, which allows the firmware to operate more
+ * efficiently at high data rates. See SF-109306-TC 5.11 "Events for RXQs in
+ * NO_CONT_EV mode".
+ *
+ * NO_CONT_EV requires EVQ_RX_MERGE and RXQ_FORCED_EV_MERGING to both be set,
+ * which is the case when an event queue is set to THROUGHPUT mode.
+ */
+#define EFX_EVQ_FLAGS_NO_CONT_EV (0x10)
+
extern __checkReturn efx_rc_t
efx_ev_qcreate(
__in efx_nic_t *enp,
diff --git a/drivers/net/sfc/base/efx_impl.h b/drivers/net/sfc/base/efx_impl.h
index bad23f819..e2cdba692 100644
--- a/drivers/net/sfc/base/efx_impl.h
+++ b/drivers/net/sfc/base/efx_impl.h
@@ -760,6 +760,7 @@ typedef struct efx_evq_rxq_state_s {
struct efx_evq_s {
uint32_t ee_magic;
+ uint32_t ee_flags;
efx_nic_t *ee_enp;
unsigned int ee_index;
unsigned int ee_mask;
@@ -778,8 +779,6 @@ struct efx_evq_s {
#endif /* EFSYS_OPT_MCDI */
efx_evq_rxq_state_t ee_rxq_state[EFX_EV_RX_NLABELS];
-
- uint32_t ee_flags;
};
#define EFX_EVQ_MAGIC 0x08081997
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 29/38] net/sfc/base: rename header with MCDI strings
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (27 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 28/38] net/sfc/base: add support for the Rx event mode w/o continue Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 30/38] net/sfc/base: add Rx parse incomplete event queue statistic Andrew Rybchenko
` (9 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev
The header was incorrectly named on addition since it did not
match naming conventions.
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/efx_mcdi.h | 2 +-
.../sfc/base/{mc_driver_pcol_strs.h => efx_regs_mcdi_strs.h} | 0
2 files changed, 1 insertion(+), 1 deletion(-)
rename drivers/net/sfc/base/{mc_driver_pcol_strs.h => efx_regs_mcdi_strs.h} (100%)
diff --git a/drivers/net/sfc/base/efx_mcdi.h b/drivers/net/sfc/base/efx_mcdi.h
index ddf91c111..b8c199dd3 100644
--- a/drivers/net/sfc/base/efx_mcdi.h
+++ b/drivers/net/sfc/base/efx_mcdi.h
@@ -11,7 +11,7 @@
#include "efx_regs_mcdi.h"
#if EFSYS_OPT_NAMES
-#include "mc_driver_pcol_strs.h"
+#include "efx_regs_mcdi_strs.h"
#endif /* EFSYS_OPT_NAMES */
#ifdef __cplusplus
diff --git a/drivers/net/sfc/base/mc_driver_pcol_strs.h b/drivers/net/sfc/base/efx_regs_mcdi_strs.h
similarity index 100%
rename from drivers/net/sfc/base/mc_driver_pcol_strs.h
rename to drivers/net/sfc/base/efx_regs_mcdi_strs.h
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 30/38] net/sfc/base: add Rx parse incomplete event queue statistic
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (28 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 29/38] net/sfc/base: rename header with MCDI strings Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 31/38] net/sfc/base: make bundle partition type available for X2 Andrew Rybchenko
` (8 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Andrew Lee
From: Andrew Lee <alee@solarflare.com>
Signed-off-by: Andrew Lee <alee@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/ef10_ev.c | 3 ++-
drivers/net/sfc/base/efx.h | 3 ++-
drivers/net/sfc/base/efx_ev.c | 3 ++-
3 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/net/sfc/base/ef10_ev.c b/drivers/net/sfc/base/ef10_ev.c
index 202930876..6868787ed 100644
--- a/drivers/net/sfc/base/ef10_ev.c
+++ b/drivers/net/sfc/base/ef10_ev.c
@@ -824,6 +824,7 @@ ef10_ev_rx_packed_stream(
}
if (EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_PARSE_INCOMPLETE)) {
+ EFX_EV_QSTAT_INCR(eep, EV_RX_PARSE_INCOMPLETE);
flags |= EFX_PKT_PACKED_STREAM_PARSE_INCOMPLETE;
goto deliver;
}
@@ -991,7 +992,7 @@ ef10_ev_rx(
* or headers that are too long for the parser.
* Headers and checksums must be validated by the host.
*/
- /* TODO: EFX_EV_QSTAT_INCR(eep, EV_RX_PARSE_INCOMPLETE); */
+ EFX_EV_QSTAT_INCR(eep, EV_RX_PARSE_INCOMPLETE);
goto deliver;
}
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index f5ad095d4..f49ae2027 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -1928,7 +1928,7 @@ typedef struct efx_evq_s efx_evq_t;
#if EFSYS_OPT_QSTATS
-/* START MKCONFIG GENERATED EfxHeaderEventQueueBlock 6f3843f5fe7cc843 */
+/* START MKCONFIG GENERATED EfxHeaderEventQueueBlock 0a147ace40844969 */
typedef enum efx_ev_qstat_e {
EV_ALL,
EV_RX,
@@ -1967,6 +1967,7 @@ typedef enum efx_ev_qstat_e {
EV_DRIVER_TX_DSC_ERROR,
EV_DRV_GEN,
EV_MCDI_RESPONSE,
+ EV_RX_PARSE_INCOMPLETE,
EV_NQSTATS
} efx_ev_qstat_t;
diff --git a/drivers/net/sfc/base/efx_ev.c b/drivers/net/sfc/base/efx_ev.c
index b98623995..ada6db3d9 100644
--- a/drivers/net/sfc/base/efx_ev.c
+++ b/drivers/net/sfc/base/efx_ev.c
@@ -1382,7 +1382,7 @@ siena_ev_qcreate(
#if EFSYS_OPT_QSTATS
#if EFSYS_OPT_NAMES
-/* START MKCONFIG GENERATED EfxEventQueueStatNamesBlock c0f3bc5083b40532 */
+/* START MKCONFIG GENERATED EfxEventQueueStatNamesBlock ac223f7134058b4f */
static const char * const __efx_ev_qstat_name[] = {
"all",
"rx",
@@ -1421,6 +1421,7 @@ static const char * const __efx_ev_qstat_name[] = {
"driver_tx_dsc_error",
"drv_gen",
"mcdi_response",
+ "rx_parse_incomplete",
};
/* END MKCONFIG GENERATED EfxEventQueueStatNamesBlock */
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 31/38] net/sfc/base: make bundle partition type available for X2
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (29 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 30/38] net/sfc/base: add Rx parse incomplete event queue statistic Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 32/38] net/sfc/base: allow to specify Rx buffer size on queue setup Andrew Rybchenko
` (7 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev; +Cc: Richard Houldsworth
From: Richard Houldsworth <rhouldsworth@solarflare.com>
Supports the firmware update mechanism described in SF-121352-AN.
Signed-off-by: Richard Houldsworth <rhouldsworth@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/ef10_nvram.c | 1 +
drivers/net/sfc/base/efx.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/net/sfc/base/ef10_nvram.c b/drivers/net/sfc/base/ef10_nvram.c
index 8d1b64f25..d54f7df02 100644
--- a/drivers/net/sfc/base/ef10_nvram.c
+++ b/drivers/net/sfc/base/ef10_nvram.c
@@ -2269,6 +2269,7 @@ static ef10_parttbl_entry_t medford2_parttbl[] = {
PARTN_MAP_ENTRY(MUM_FIRMWARE, ALL, MUM_FIRMWARE),
PARTN_MAP_ENTRY(DYNCONFIG_DEFAULTS, ALL, DYNCONFIG_DEFAULTS),
PARTN_MAP_ENTRY(ROMCONFIG_DEFAULTS, ALL, ROMCONFIG_DEFAULTS),
+ PARTN_MAP_ENTRY(BUNDLE, ALL, BUNDLE),
};
static __checkReturn efx_rc_t
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index f49ae2027..71c335279 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -1585,6 +1585,7 @@ typedef enum efx_nvram_type_e {
EFX_NVRAM_MUM_FIRMWARE,
EFX_NVRAM_DYNCONFIG_DEFAULTS,
EFX_NVRAM_ROMCONFIG_DEFAULTS,
+ EFX_NVRAM_BUNDLE,
EFX_NVRAM_NTYPES,
} efx_nvram_type_t;
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 32/38] net/sfc/base: allow to specify Rx buffer size on queue setup
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (30 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 31/38] net/sfc/base: make bundle partition type available for X2 Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 33/38] net/sfc/base: pass Rx buffer size to RxQ init if supported Andrew Rybchenko
` (6 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev
Rx buffer size must be specified on Rx queue creation on
Riverhead.
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/ef10_rx.c | 46 +++++++++++++++++++--------------
drivers/net/sfc/base/efx.h | 1 +
drivers/net/sfc/base/efx_impl.h | 6 +++--
drivers/net/sfc/base/efx_rx.c | 12 +++++++--
drivers/net/sfc/sfc_rx.c | 1 +
5 files changed, 43 insertions(+), 23 deletions(-)
diff --git a/drivers/net/sfc/base/ef10_rx.c b/drivers/net/sfc/base/ef10_rx.c
index 3b296e488..5cb7da99b 100644
--- a/drivers/net/sfc/base/ef10_rx.c
+++ b/drivers/net/sfc/base/ef10_rx.c
@@ -1018,7 +1018,7 @@ ef10_rx_qcreate(
uint32_t es_buf_stride = 0;
uint32_t hol_block_timeout = 0;
- _NOTE(ARGUNUSED(id, erp, type_data))
+ _NOTE(ARGUNUSED(id, erp))
EFX_STATIC_ASSERT(EFX_EV_RX_NLABELS == (1 << ESF_DZ_RX_QLABEL_WIDTH));
EFSYS_ASSERT3U(label, <, EFX_EV_RX_NLABELS);
@@ -1031,13 +1031,18 @@ ef10_rx_qcreate(
switch (type) {
case EFX_RXQ_TYPE_DEFAULT:
+ if (type_data == NULL) {
+ rc = EINVAL;
+ goto fail2;
+ }
+ erp->er_buf_size = type_data->ertd_default.ed_buf_size;
ps_buf_size = 0;
break;
#if EFSYS_OPT_RX_PACKED_STREAM
case EFX_RXQ_TYPE_PACKED_STREAM:
if (type_data == NULL) {
rc = EINVAL;
- goto fail2;
+ goto fail3;
}
switch (type_data->ertd_packed_stream.eps_buf_size) {
case EFX_RXQ_PACKED_STREAM_BUF_SIZE_1M:
@@ -1057,15 +1062,16 @@ ef10_rx_qcreate(
break;
default:
rc = ENOTSUP;
- goto fail3;
+ goto fail4;
}
+ erp->er_buf_size = type_data->ertd_packed_stream.eps_buf_size;
break;
#endif /* EFSYS_OPT_RX_PACKED_STREAM */
#if EFSYS_OPT_RX_ES_SUPER_BUFFER
case EFX_RXQ_TYPE_ES_SUPER_BUFFER:
if (type_data == NULL) {
rc = EINVAL;
- goto fail4;
+ goto fail5;
}
ps_buf_size = 0;
es_bufs_per_desc =
@@ -1080,7 +1086,7 @@ ef10_rx_qcreate(
#endif /* EFSYS_OPT_RX_ES_SUPER_BUFFER */
default:
rc = ENOTSUP;
- goto fail5;
+ goto fail6;
}
#if EFSYS_OPT_RX_PACKED_STREAM
@@ -1088,13 +1094,13 @@ ef10_rx_qcreate(
/* Check if datapath firmware supports packed stream mode */
if (encp->enc_rx_packed_stream_supported == B_FALSE) {
rc = ENOTSUP;
- goto fail6;
+ goto fail7;
}
/* Check if packed stream allows configurable buffer sizes */
if ((ps_buf_size != MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_1M) &&
(encp->enc_rx_var_packed_stream_supported == B_FALSE)) {
rc = ENOTSUP;
- goto fail7;
+ goto fail8;
}
}
#else /* EFSYS_OPT_RX_PACKED_STREAM */
@@ -1105,17 +1111,17 @@ ef10_rx_qcreate(
if (es_bufs_per_desc > 0) {
if (encp->enc_rx_es_super_buffer_supported == B_FALSE) {
rc = ENOTSUP;
- goto fail8;
+ goto fail9;
}
if (!IS_P2ALIGNED(es_max_dma_len,
EFX_RX_ES_SUPER_BUFFER_BUF_ALIGNMENT)) {
rc = EINVAL;
- goto fail9;
+ goto fail10;
}
if (!IS_P2ALIGNED(es_buf_stride,
EFX_RX_ES_SUPER_BUFFER_BUF_ALIGNMENT)) {
rc = EINVAL;
- goto fail10;
+ goto fail11;
}
}
#else /* EFSYS_OPT_RX_ES_SUPER_BUFFER */
@@ -1137,7 +1143,7 @@ ef10_rx_qcreate(
esmp, disable_scatter, want_inner_classes,
ps_buf_size, es_bufs_per_desc, es_max_dma_len,
es_buf_stride, hol_block_timeout)) != 0)
- goto fail11;
+ goto fail12;
erp->er_eep = eep;
erp->er_label = label;
@@ -1148,34 +1154,36 @@ ef10_rx_qcreate(
return (0);
+fail12:
+ EFSYS_PROBE(fail12);
+#if EFSYS_OPT_RX_ES_SUPER_BUFFER
fail11:
EFSYS_PROBE(fail11);
-#if EFSYS_OPT_RX_ES_SUPER_BUFFER
fail10:
EFSYS_PROBE(fail10);
fail9:
EFSYS_PROBE(fail9);
-fail8:
- EFSYS_PROBE(fail8);
#endif /* EFSYS_OPT_RX_ES_SUPER_BUFFER */
#if EFSYS_OPT_RX_PACKED_STREAM
+fail8:
+ EFSYS_PROBE(fail8);
fail7:
EFSYS_PROBE(fail7);
+#endif /* EFSYS_OPT_RX_PACKED_STREAM */
fail6:
EFSYS_PROBE(fail6);
-#endif /* EFSYS_OPT_RX_PACKED_STREAM */
+#if EFSYS_OPT_RX_ES_SUPER_BUFFER
fail5:
EFSYS_PROBE(fail5);
-#if EFSYS_OPT_RX_ES_SUPER_BUFFER
-fail4:
- EFSYS_PROBE(fail4);
#endif /* EFSYS_OPT_RX_ES_SUPER_BUFFER */
#if EFSYS_OPT_RX_PACKED_STREAM
+fail4:
+ EFSYS_PROBE(fail4);
fail3:
EFSYS_PROBE(fail3);
+#endif /* EFSYS_OPT_RX_PACKED_STREAM */
fail2:
EFSYS_PROBE(fail2);
-#endif /* EFSYS_OPT_RX_PACKED_STREAM */
fail1:
EFSYS_PROBE1(fail1, efx_rc_t, rc);
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index 71c335279..35f896750 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -2527,6 +2527,7 @@ efx_rx_qcreate(
__in unsigned int index,
__in unsigned int label,
__in efx_rxq_type_t type,
+ __in size_t buf_size,
__in efsys_mem_t *esmp,
__in size_t ndescs,
__in uint32_t id,
diff --git a/drivers/net/sfc/base/efx_impl.h b/drivers/net/sfc/base/efx_impl.h
index e2cdba692..70e05232c 100644
--- a/drivers/net/sfc/base/efx_impl.h
+++ b/drivers/net/sfc/base/efx_impl.h
@@ -131,8 +131,9 @@ typedef struct efx_tx_ops_s {
} efx_tx_ops_t;
typedef union efx_rxq_type_data_u {
- /* Dummy member to have non-empty union if no options are enabled */
- uint32_t ertd_dummy;
+ struct {
+ size_t ed_buf_size;
+ } ertd_default;
#if EFSYS_OPT_RX_PACKED_STREAM
struct {
uint32_t eps_buf_size;
@@ -792,6 +793,7 @@ struct efx_rxq_s {
unsigned int er_index;
unsigned int er_label;
unsigned int er_mask;
+ size_t er_buf_size;
efsys_mem_t *er_esmp;
efx_evq_rxq_state_t *er_ev_qstate;
};
diff --git a/drivers/net/sfc/base/efx_rx.c b/drivers/net/sfc/base/efx_rx.c
index 8a12ef705..49c304c0b 100644
--- a/drivers/net/sfc/base/efx_rx.c
+++ b/drivers/net/sfc/base/efx_rx.c
@@ -693,6 +693,7 @@ efx_rx_qpost(
const efx_rx_ops_t *erxop = enp->en_erxop;
EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC);
+ EFSYS_ASSERT(erp->er_buf_size == 0 || size == erp->er_buf_size);
erxop->erxo_qpost(erp, addrp, size, ndescs, completed, added);
}
@@ -869,6 +870,7 @@ efx_rx_qcreate(
__in unsigned int index,
__in unsigned int label,
__in efx_rxq_type_t type,
+ __in size_t buf_size,
__in efsys_mem_t *esmp,
__in size_t ndescs,
__in uint32_t id,
@@ -876,7 +878,13 @@ efx_rx_qcreate(
__in efx_evq_t *eep,
__deref_out efx_rxq_t **erpp)
{
- return efx_rx_qcreate_internal(enp, index, label, type, NULL,
+ efx_rxq_type_data_t type_data;
+
+ memset(&type_data, 0, sizeof (type_data));
+
+ type_data.ertd_default.ed_buf_size = buf_size;
+
+ return efx_rx_qcreate_internal(enp, index, label, type, &type_data,
esmp, ndescs, id, flags, eep, erpp);
}
@@ -1614,7 +1622,6 @@ siena_rx_qcreate(
efx_rc_t rc;
_NOTE(ARGUNUSED(esmp))
- _NOTE(ARGUNUSED(type_data))
EFX_STATIC_ASSERT(EFX_EV_RX_NLABELS ==
(1 << FRF_AZ_RX_DESCQ_LABEL_WIDTH));
@@ -1637,6 +1644,7 @@ siena_rx_qcreate(
switch (type) {
case EFX_RXQ_TYPE_DEFAULT:
+ erp->er_buf_size = type_data->ertd_default.ed_buf_size;
break;
default:
diff --git a/drivers/net/sfc/sfc_rx.c b/drivers/net/sfc/sfc_rx.c
index 20910d212..4b1d01e66 100644
--- a/drivers/net/sfc/sfc_rx.c
+++ b/drivers/net/sfc/sfc_rx.c
@@ -692,6 +692,7 @@ sfc_rx_qstart(struct sfc_adapter *sa, unsigned int sw_index)
switch (rxq_info->type) {
case EFX_RXQ_TYPE_DEFAULT:
rc = efx_rx_qcreate(sa->nic, rxq->hw_index, 0, rxq_info->type,
+ rxq->buf_size,
&rxq->mem, rxq_info->entries, 0 /* not used on EF10 */,
rxq_info->type_flags, evq->common, &rxq->common);
break;
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 33/38] net/sfc/base: pass Rx buffer size to RxQ init if supported
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (31 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 32/38] net/sfc/base: allow to specify Rx buffer size on queue setup Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 34/38] net/sfc/base: simplify EF10 family conditional code checks Andrew Rybchenko
` (5 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev
Riverhead requires Rx buffer size to be specified in INIT_RXQ.
If the parameter is not supported (e.g. on EF10 family adapters),
zero must be used on INIT_RXQ.
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/ef10_nic.c | 10 ++++++++++
drivers/net/sfc/base/ef10_rx.c | 15 ++++++++++-----
drivers/net/sfc/base/efx.h | 1 +
3 files changed, 21 insertions(+), 5 deletions(-)
diff --git a/drivers/net/sfc/base/ef10_nic.c b/drivers/net/sfc/base/ef10_nic.c
index 39ca53f03..6ba2fe3b9 100644
--- a/drivers/net/sfc/base/ef10_nic.c
+++ b/drivers/net/sfc/base/ef10_nic.c
@@ -1205,6 +1205,16 @@ ef10_get_datapath_caps(
else
encp->enc_no_cont_ev_mode_supported = B_FALSE;
+ /*
+ * Check if buffer size may and must be specified on INIT_RXQ.
+ * It may be always specified to efx_rx_qcreate(), but will be
+ * just kept libefx internal if MCDI does not support it.
+ */
+ if (CAP_FLAGS2(req, INIT_RXQ_WITH_BUFFER_SIZE))
+ encp->enc_init_rxq_with_buffer_size = B_TRUE;
+ else
+ encp->enc_init_rxq_with_buffer_size = B_FALSE;
+
/*
* Check if firmware-verified NVRAM updates must be used.
*
diff --git a/drivers/net/sfc/base/ef10_rx.c b/drivers/net/sfc/base/ef10_rx.c
index 5cb7da99b..c060d2e4d 100644
--- a/drivers/net/sfc/base/ef10_rx.c
+++ b/drivers/net/sfc/base/ef10_rx.c
@@ -21,6 +21,7 @@ efx_mcdi_init_rxq(
__in efsys_mem_t *esmp,
__in boolean_t disable_scatter,
__in boolean_t want_inner_classes,
+ __in uint32_t buf_size,
__in uint32_t ps_bufsize,
__in uint32_t es_bufs_per_desc,
__in uint32_t es_max_dma_len,
@@ -29,8 +30,8 @@ efx_mcdi_init_rxq(
{
efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
efx_mcdi_req_t req;
- EFX_MCDI_DECLARE_BUF(payload, MC_CMD_INIT_RXQ_V3_IN_LEN,
- MC_CMD_INIT_RXQ_V3_OUT_LEN);
+ EFX_MCDI_DECLARE_BUF(payload, MC_CMD_INIT_RXQ_V4_IN_LEN,
+ MC_CMD_INIT_RXQ_V4_OUT_LEN);
int npages = efx_rxq_nbufs(enp, ndescs);
int i;
efx_qword_t *dma_addr;
@@ -84,9 +85,9 @@ efx_mcdi_init_rxq(
req.emr_cmd = MC_CMD_INIT_RXQ;
req.emr_in_buf = payload;
- req.emr_in_length = MC_CMD_INIT_RXQ_V3_IN_LEN;
+ req.emr_in_length = MC_CMD_INIT_RXQ_V4_IN_LEN;
req.emr_out_buf = payload;
- req.emr_out_length = MC_CMD_INIT_RXQ_V3_OUT_LEN;
+ req.emr_out_length = MC_CMD_INIT_RXQ_V4_OUT_LEN;
MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_SIZE, ndescs);
MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_TARGET_EVQ, eep->ee_index);
@@ -120,6 +121,10 @@ efx_mcdi_init_rxq(
hol_block_timeout);
}
+ if (encp->enc_init_rxq_with_buffer_size)
+ MCDI_IN_SET_DWORD(req, INIT_RXQ_V4_IN_BUFFER_SIZE_BYTES,
+ buf_size);
+
dma_addr = MCDI_IN2(req, efx_qword_t, INIT_RXQ_IN_DMA_ADDR);
addr = EFSYS_MEM_ADDR(esmp);
@@ -1140,7 +1145,7 @@ ef10_rx_qcreate(
want_inner_classes = B_FALSE;
if ((rc = efx_mcdi_init_rxq(enp, ndescs, eep, label, index,
- esmp, disable_scatter, want_inner_classes,
+ esmp, disable_scatter, want_inner_classes, erp->er_buf_size,
ps_buf_size, es_bufs_per_desc, es_max_dma_len,
es_buf_stride, hol_block_timeout)) != 0)
goto fail12;
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index 35f896750..2cd2c36c3 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -1371,6 +1371,7 @@ typedef struct efx_nic_cfg_s {
boolean_t enc_enhanced_set_mac_supported;
boolean_t enc_init_evq_v2_supported;
boolean_t enc_no_cont_ev_mode_supported;
+ boolean_t enc_init_rxq_with_buffer_size;
boolean_t enc_rx_packed_stream_supported;
boolean_t enc_rx_var_packed_stream_supported;
boolean_t enc_rx_es_super_buffer_supported;
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 34/38] net/sfc/base: simplify EF10 family conditional code checks
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (32 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 33/38] net/sfc/base: pass Rx buffer size to RxQ init if supported Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 35/38] net/sfc/base: simplify EF10 family run-time checks Andrew Rybchenko
` (4 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev
Add EFX_OPTS_EF10() which may be used as synonym of any EF10-based
NIC (i.e. Huntigton, Medford or Medford2 at the time of addition).
Suggested-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/ef10_ev.c | 4 +-
drivers/net/sfc/base/ef10_filter.c | 4 +-
drivers/net/sfc/base/ef10_intr.c | 4 +-
drivers/net/sfc/base/ef10_mac.c | 4 +-
drivers/net/sfc/base/ef10_mcdi.c | 4 +-
drivers/net/sfc/base/ef10_nic.c | 4 +-
drivers/net/sfc/base/ef10_nvram.c | 4 +-
drivers/net/sfc/base/ef10_phy.c | 4 +-
drivers/net/sfc/base/ef10_rx.c | 4 +-
drivers/net/sfc/base/ef10_tx.c | 4 +-
drivers/net/sfc/base/ef10_vpd.c | 4 +-
drivers/net/sfc/base/efx.h | 8 +--
drivers/net/sfc/base/efx_bootcfg.c | 4 +-
drivers/net/sfc/base/efx_check.h | 99 +++++++++++++-----------------
drivers/net/sfc/base/efx_ev.c | 4 +-
drivers/net/sfc/base/efx_filter.c | 4 +-
drivers/net/sfc/base/efx_impl.h | 12 ++--
drivers/net/sfc/base/efx_intr.c | 4 +-
drivers/net/sfc/base/efx_mac.c | 4 +-
drivers/net/sfc/base/efx_mcdi.c | 12 ++--
drivers/net/sfc/base/efx_mcdi.h | 4 +-
drivers/net/sfc/base/efx_nvram.c | 4 +-
drivers/net/sfc/base/efx_phy.c | 4 +-
drivers/net/sfc/base/efx_rx.c | 4 +-
drivers/net/sfc/base/efx_sram.c | 8 +--
drivers/net/sfc/base/efx_vpd.c | 4 +-
26 files changed, 105 insertions(+), 118 deletions(-)
diff --git a/drivers/net/sfc/base/ef10_ev.c b/drivers/net/sfc/base/ef10_ev.c
index 6868787ed..f590f37f5 100644
--- a/drivers/net/sfc/base/ef10_ev.c
+++ b/drivers/net/sfc/base/ef10_ev.c
@@ -10,7 +10,7 @@
#include "mcdi_mon.h"
#endif
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
#if EFSYS_OPT_QSTATS
#define EFX_EV_QSTAT_INCR(_eep, _stat) \
@@ -1478,4 +1478,4 @@ ef10_ev_rxlabel_fini(
#endif
}
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
diff --git a/drivers/net/sfc/base/ef10_filter.c b/drivers/net/sfc/base/ef10_filter.c
index afe4064d9..0b3fbf78b 100644
--- a/drivers/net/sfc/base/ef10_filter.c
+++ b/drivers/net/sfc/base/ef10_filter.c
@@ -7,7 +7,7 @@
#include "efx.h"
#include "efx_impl.h"
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
#if EFSYS_OPT_FILTER
@@ -1773,4 +1773,4 @@ ef10_filter_default_rxq_clear(
#endif /* EFSYS_OPT_FILTER */
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
diff --git a/drivers/net/sfc/base/ef10_intr.c b/drivers/net/sfc/base/ef10_intr.c
index efa157125..b7822a259 100644
--- a/drivers/net/sfc/base/ef10_intr.c
+++ b/drivers/net/sfc/base/ef10_intr.c
@@ -8,7 +8,7 @@
#include "efx_impl.h"
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
__checkReturn efx_rc_t
ef10_intr_init(
@@ -172,4 +172,4 @@ ef10_intr_fini(
_NOTE(ARGUNUSED(enp))
}
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
diff --git a/drivers/net/sfc/base/ef10_mac.c b/drivers/net/sfc/base/ef10_mac.c
index 9f10f6f79..28dba9290 100644
--- a/drivers/net/sfc/base/ef10_mac.c
+++ b/drivers/net/sfc/base/ef10_mac.c
@@ -8,7 +8,7 @@
#include "efx_impl.h"
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
__checkReturn efx_rc_t
ef10_mac_poll(
@@ -1041,4 +1041,4 @@ ef10_mac_stats_update(
#endif /* EFSYS_OPT_MAC_STATS */
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
diff --git a/drivers/net/sfc/base/ef10_mcdi.c b/drivers/net/sfc/base/ef10_mcdi.c
index 8a3fc3b46..574879425 100644
--- a/drivers/net/sfc/base/ef10_mcdi.c
+++ b/drivers/net/sfc/base/ef10_mcdi.c
@@ -8,7 +8,7 @@
#include "efx_impl.h"
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
#if EFSYS_OPT_MCDI
@@ -322,4 +322,4 @@ ef10_mcdi_feature_supported(
#endif /* EFSYS_OPT_MCDI */
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
diff --git a/drivers/net/sfc/base/ef10_nic.c b/drivers/net/sfc/base/ef10_nic.c
index 6ba2fe3b9..8c17f4a75 100644
--- a/drivers/net/sfc/base/ef10_nic.c
+++ b/drivers/net/sfc/base/ef10_nic.c
@@ -10,7 +10,7 @@
#include "mcdi_mon.h"
#endif
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
#include "ef10_tlv_layout.h"
@@ -2571,4 +2571,4 @@ efx_mcdi_set_nic_global(
#endif /* EFSYS_OPT_FW_SUBVARIANT_AWARE */
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
diff --git a/drivers/net/sfc/base/ef10_nvram.c b/drivers/net/sfc/base/ef10_nvram.c
index d54f7df02..2aed42131 100644
--- a/drivers/net/sfc/base/ef10_nvram.c
+++ b/drivers/net/sfc/base/ef10_nvram.c
@@ -7,7 +7,7 @@
#include "efx.h"
#include "efx_impl.h"
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
#if EFSYS_OPT_VPD || EFSYS_OPT_NVRAM
@@ -2487,4 +2487,4 @@ ef10_nvram_partn_rw_finish(
#endif /* EFSYS_OPT_NVRAM */
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
diff --git a/drivers/net/sfc/base/ef10_phy.c b/drivers/net/sfc/base/ef10_phy.c
index 84ccdde5d..737c52e10 100644
--- a/drivers/net/sfc/base/ef10_phy.c
+++ b/drivers/net/sfc/base/ef10_phy.c
@@ -7,7 +7,7 @@
#include "efx.h"
#include "efx_impl.h"
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
static void
mcdi_phy_decode_cap(
@@ -755,4 +755,4 @@ ef10_bist_stop(
#endif /* EFSYS_OPT_BIST */
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
diff --git a/drivers/net/sfc/base/ef10_rx.c b/drivers/net/sfc/base/ef10_rx.c
index c060d2e4d..27514c1cb 100644
--- a/drivers/net/sfc/base/ef10_rx.c
+++ b/drivers/net/sfc/base/ef10_rx.c
@@ -8,7 +8,7 @@
#include "efx_impl.h"
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
static __checkReturn efx_rc_t
@@ -1225,4 +1225,4 @@ ef10_rx_fini(
#endif /* EFSYS_OPT_RX_SCALE */
}
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
diff --git a/drivers/net/sfc/base/ef10_tx.c b/drivers/net/sfc/base/ef10_tx.c
index 82be77f13..6a908167b 100644
--- a/drivers/net/sfc/base/ef10_tx.c
+++ b/drivers/net/sfc/base/ef10_tx.c
@@ -8,7 +8,7 @@
#include "efx_impl.h"
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
#if EFSYS_OPT_QSTATS
#define EFX_TX_QSTAT_INCR(_etp, _stat) \
@@ -769,4 +769,4 @@ ef10_tx_qstats_update(
#endif /* EFSYS_OPT_QSTATS */
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
diff --git a/drivers/net/sfc/base/ef10_vpd.c b/drivers/net/sfc/base/ef10_vpd.c
index 097fe1d4e..b21861bb0 100644
--- a/drivers/net/sfc/base/ef10_vpd.c
+++ b/drivers/net/sfc/base/ef10_vpd.c
@@ -10,7 +10,7 @@
#if EFSYS_OPT_VPD
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
#include "ef10_tlv_layout.h"
@@ -445,6 +445,6 @@ ef10_vpd_fini(
}
}
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
#endif /* EFSYS_OPT_VPD */
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index 2cd2c36c3..293a0e254 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -209,8 +209,8 @@ efx_nic_check_pcie_link_speed(
#if EFSYS_OPT_MCDI
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
-/* Huntington and Medford require MCDIv2 commands */
+#if EFX_OPTS_EF10()
+/* EF10 architecture NICs require MCDIv2 commands */
#define WITH_MCDI_V2 1
#endif
@@ -1329,11 +1329,11 @@ typedef struct efx_nic_cfg_s {
#if EFSYS_OPT_BIST
uint32_t enc_bist_mask;
#endif /* EFSYS_OPT_BIST */
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
uint32_t enc_pf;
uint32_t enc_vf;
uint32_t enc_privilege_mask;
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
boolean_t enc_bug26807_workaround;
boolean_t enc_bug35388_workaround;
boolean_t enc_bug41750_workaround;
diff --git a/drivers/net/sfc/base/efx_bootcfg.c b/drivers/net/sfc/base/efx_bootcfg.c
index 3b0401e89..73d779ec7 100644
--- a/drivers/net/sfc/base/efx_bootcfg.c
+++ b/drivers/net/sfc/base/efx_bootcfg.c
@@ -847,7 +847,7 @@ efx_bootcfg_read(
goto fail1;
}
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
sector_number = enp->en_nic_cfg.enc_pf;
#else
sector_number = 0;
@@ -1000,7 +1000,7 @@ efx_bootcfg_write(
efx_rc_t rc;
uint32_t sector_number;
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
sector_number = enp->en_nic_cfg.enc_pf;
#else
sector_number = 0;
diff --git a/drivers/net/sfc/base/efx_check.h b/drivers/net/sfc/base/efx_check.h
index ef5eadc62..4800f772b 100644
--- a/drivers/net/sfc/base/efx_check.h
+++ b/drivers/net/sfc/base/efx_check.h
@@ -17,6 +17,10 @@
* from client code (and do not reappear in merges from other branches).
*/
+/* Check family options for EF10 architecture controllers. */
+#define EFX_OPTS_EF10() \
+ (EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2)
+
#ifdef EFSYS_OPT_FALCON
# error "FALCON is obsolete and is not supported."
#endif
@@ -30,9 +34,8 @@
#if EFSYS_OPT_CHECK_REG
/* Verify chip implements accessed registers */
-# if !(EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON || \
- EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2)
-# error "CHECK_REG requires SIENA or HUNTINGTON or MEDFORD or MEDFORD2"
+# if !(EFX_OPTS_EF10() || EFSYS_OPT_SIENA)
+# error "CHECK_REG requires EF10 arch or SIENA"
# endif
#endif /* EFSYS_OPT_CHECK_REG */
@@ -45,17 +48,15 @@
#if EFSYS_OPT_DIAG
/* Support diagnostic hardware tests */
-# if !(EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON || \
- EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2)
-# error "DIAG requires SIENA or HUNTINGTON or MEDFORD or MEDFORD2"
+# if !(EFX_OPTS_EF10() || EFSYS_OPT_SIENA)
+# error "DIAG requires EF10 arch or SIENA"
# endif
#endif /* EFSYS_OPT_DIAG */
#if EFSYS_OPT_EV_PREFETCH
/* Support optimized EVQ data access */
-# if !(EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON || \
- EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2)
-# error "EV_PREFETCH requires SIENA or HUNTINGTON or MEDFORD or MEDFORD2"
+# if !(EFX_OPTS_EF10() || EFSYS_OPT_SIENA)
+# error "EV_PREFETCH requires EF10 arch or SIENA"
# endif
#endif /* EFSYS_OPT_EV_PREFETCH */
@@ -65,23 +66,21 @@
#if EFSYS_OPT_FILTER
/* Support hardware packet filters */
-# if !(EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON || \
- EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2)
-# error "FILTER requires SIENA or HUNTINGTON or MEDFORD or MEDFORD2"
+# if !(EFX_OPTS_EF10() || EFSYS_OPT_SIENA)
+# error "FILTER requires EF10 arch or SIENA"
# endif
#endif /* EFSYS_OPT_FILTER */
-#if (EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2)
+#if EFX_OPTS_EF10()
# if !EFSYS_OPT_FILTER
-# error "HUNTINGTON or MEDFORD or MEDFORD2 requires FILTER"
+# error "EF10 arch requires FILTER"
# endif
-#endif /* EFSYS_OPT_HUNTINGTON */
+#endif /* EFX_OPTS_EF10() */
#if EFSYS_OPT_LOOPBACK
/* Support hardware loopback modes */
-# if !(EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON || \
- EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2)
-# error "LOOPBACK requires SIENA or HUNTINGTON or MEDFORD or MEDFORD2"
+# if !(EFX_OPTS_EF10() || EFSYS_OPT_SIENA)
+# error "LOOPBACK requires EF10 arch or SIENA"
# endif
#endif /* EFSYS_OPT_LOOPBACK */
@@ -95,24 +94,21 @@
#if EFSYS_OPT_MAC_STATS
/* Support MAC statistics */
-# if !(EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON || \
- EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2)
-# error "MAC_STATS requires SIENA or HUNTINGTON or MEDFORD or MEDFORD2"
+# if !(EFX_OPTS_EF10() || EFSYS_OPT_SIENA)
+# error "MAC_STATS requires EF10 arch or SIENA"
# endif
#endif /* EFSYS_OPT_MAC_STATS */
#if EFSYS_OPT_MCDI
/* Support management controller messages */
-# if !(EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON || \
- EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2)
-# error "MCDI requires SIENA or HUNTINGTON or MEDFORD or MEDFORD2"
+# if !(EFX_OPTS_EF10() || EFSYS_OPT_SIENA)
+# error "MCDI requires EF10 arch or SIENA"
# endif
#endif /* EFSYS_OPT_MCDI */
-#if (EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON || \
- EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2)
+#if (EFX_OPTS_EF10() || EFSYS_OPT_SIENA)
# if !EFSYS_OPT_MCDI
-# error "SIENA or HUNTINGTON or MEDFORD or MEDFORD2 requires MCDI"
+# error "EF10 arch or SIENA requires MCDI"
# endif
#endif
@@ -152,17 +148,15 @@
#if EFSYS_OPT_MON_STATS
/* Support monitor statistics (voltage/temperature) */
-# if !(EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON || \
- EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2)
-# error "MON_STATS requires SIENA or HUNTINGTON or MEDFORD or MEDFORD2"
+# if !(EFX_OPTS_EF10() || EFSYS_OPT_SIENA)
+# error "MON_STATS requires EF10 arch or SIENA"
# endif
#endif /* EFSYS_OPT_MON_STATS */
#if EFSYS_OPT_MON_MCDI
/* Support Monitor via mcdi */
-# if !(EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON || \
- EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2)
-# error "MON_MCDI requires SIENA or HUNTINGTON or MEDFORD or MEDFORD2"
+# if !(EFX_OPTS_EF10() || EFSYS_OPT_SIENA)
+# error "MON_MCDI requires EF10 arch or SIENA"
# endif
#endif /* EFSYS_OPT_MON_MCDI*/
@@ -176,9 +170,8 @@
#if EFSYS_OPT_NVRAM
/* Support non volatile configuration */
-# if !(EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON || \
- EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2)
-# error "NVRAM requires SIENA or HUNTINGTON or MEDFORD or MEDFORD2"
+# if !(EFX_OPTS_EF10() || EFSYS_OPT_SIENA)
+# error "NVRAM requires EF10 arch or SIENA"
# endif
#endif /* EFSYS_OPT_NVRAM */
@@ -218,9 +211,8 @@
#if EFSYS_OPT_PHY_LED_CONTROL
/* Support for PHY LED control */
-# if !(EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON || \
- EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2)
-# error "PHY_LED_CONTROL requires SIENA or HUNTINGTON or MEDFORD or MEDFORD2"
+# if !(EFX_OPTS_EF10() || EFSYS_OPT_SIENA)
+# error "PHY_LED_CONTROL requires EF10 arch or SIENA"
# endif
#endif /* EFSYS_OPT_PHY_LED_CONTROL */
@@ -265,9 +257,8 @@
#if EFSYS_OPT_QSTATS
/* Support EVQ/RXQ/TXQ statistics */
-# if !(EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON || \
- EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2)
-# error "QSTATS requires SIENA or HUNTINGTON or MEDFORD or MEDFORD2"
+# if !(EFX_OPTS_EF10() || EFSYS_OPT_SIENA)
+# error "QSTATS requires EF10 arch or SIENA"
# endif
#endif /* EFSYS_OPT_QSTATS */
@@ -277,17 +268,15 @@
#if EFSYS_OPT_RX_SCALE
/* Support receive scaling (RSS) */
-# if !(EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON || \
- EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2)
-# error "RX_SCALE requires SIENA or HUNTINGTON or MEDFORD or MEDFORD2"
+# if !(EFX_OPTS_EF10() || EFSYS_OPT_SIENA)
+# error "RX_SCALE requires EF10 arch or SIENA"
# endif
#endif /* EFSYS_OPT_RX_SCALE */
#if EFSYS_OPT_RX_SCATTER
/* Support receive scatter DMA */
-# if !(EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON || \
- EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2)
-# error "RX_SCATTER requires SIENA or HUNTINGTON or MEDFORD or MEDFORD2"
+# if !(EFX_OPTS_EF10() || EFSYS_OPT_SIENA)
+# error "RX_SCATTER requires EF10 arch or SIENA"
# endif
#endif /* EFSYS_OPT_RX_SCATTER */
@@ -297,9 +286,8 @@
#if EFSYS_OPT_VPD
/* Support PCI Vital Product Data (VPD) */
-# if !(EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON || \
- EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2)
-# error "VPD requires SIENA or HUNTINGTON or MEDFORD or MEDFORD2"
+# if !(EFX_OPTS_EF10() || EFSYS_OPT_SIENA)
+# error "VPD requires EF10 arch or SIENA"
# endif
#endif /* EFSYS_OPT_VPD */
@@ -313,9 +301,8 @@
#if EFSYS_OPT_BIST
/* Support BIST */
-# if !(EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON || \
- EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2)
-# error "BIST requires SIENA or HUNTINGTON or MEDFORD or MEDFORD2"
+# if !(EFX_OPTS_EF10() || EFSYS_OPT_SIENA)
+# error "BIST requires EF10 arch or SIENA"
# endif
#endif /* EFSYS_OPT_BIST */
@@ -338,8 +325,8 @@
#if EFSYS_OPT_RX_PACKED_STREAM
/* Support packed stream mode */
-# if !(EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2)
-# error "PACKED_STREAM requires HUNTINGTON or MEDFORD or MEDFORD2"
+# if !EFX_OPTS_EF10()
+# error "PACKED_STREAM requires EF10 arch"
# endif
#endif
diff --git a/drivers/net/sfc/base/efx_ev.c b/drivers/net/sfc/base/efx_ev.c
index ada6db3d9..69224cbc5 100644
--- a/drivers/net/sfc/base/efx_ev.c
+++ b/drivers/net/sfc/base/efx_ev.c
@@ -91,7 +91,7 @@ static const efx_ev_ops_t __efx_ev_siena_ops = {
};
#endif /* EFSYS_OPT_SIENA */
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
static const efx_ev_ops_t __efx_ev_ef10_ops = {
ef10_ev_init, /* eevo_init */
ef10_ev_fini, /* eevo_fini */
@@ -104,7 +104,7 @@ static const efx_ev_ops_t __efx_ev_ef10_ops = {
ef10_ev_qstats_update, /* eevo_qstats_update */
#endif
};
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
__checkReturn efx_rc_t
diff --git a/drivers/net/sfc/base/efx_filter.c b/drivers/net/sfc/base/efx_filter.c
index a7523b38b..7efb38064 100644
--- a/drivers/net/sfc/base/efx_filter.c
+++ b/drivers/net/sfc/base/efx_filter.c
@@ -56,7 +56,7 @@ static const efx_filter_ops_t __efx_filter_siena_ops = {
};
#endif /* EFSYS_OPT_SIENA */
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
static const efx_filter_ops_t __efx_filter_ef10_ops = {
ef10_filter_init, /* efo_init */
ef10_filter_fini, /* efo_fini */
@@ -66,7 +66,7 @@ static const efx_filter_ops_t __efx_filter_ef10_ops = {
ef10_filter_supported_filters, /* efo_supported_filters */
ef10_filter_reconfigure, /* efo_reconfigure */
};
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
__checkReturn efx_rc_t
efx_filter_insert(
diff --git a/drivers/net/sfc/base/efx_impl.h b/drivers/net/sfc/base/efx_impl.h
index 70e05232c..748d45a3b 100644
--- a/drivers/net/sfc/base/efx_impl.h
+++ b/drivers/net/sfc/base/efx_impl.h
@@ -33,9 +33,9 @@
#include "medford2_impl.h"
#endif /* EFSYS_OPT_MEDFORD2 */
-#if (EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2)
+#if EFX_OPTS_EF10()
#include "ef10_impl.h"
-#endif /* (EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2) */
+#endif /* EFX_OPTS_EF10() */
#ifdef __cplusplus
extern "C" {
@@ -431,9 +431,9 @@ typedef struct efx_filter_s {
#if EFSYS_OPT_SIENA
siena_filter_t *ef_siena_filter;
#endif /* EFSYS_OPT_SIENA */
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
ef10_filter_table_t *ef_ef10_filter_table;
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
} efx_filter_t;
#if EFSYS_OPT_SIENA
@@ -717,7 +717,7 @@ struct efx_nic_s {
#endif /* EFSYS_OPT_SIENA */
int enu_unused;
} en_u;
-#if (EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2)
+#if EFX_OPTS_EF10()
union en_arch {
struct {
int ena_vi_base;
@@ -738,7 +738,7 @@ struct efx_nic_s {
size_t ena_wc_mem_map_size;
} ef10;
} en_arch;
-#endif /* (EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2) */
+#endif /* EFX_OPTS_EF10() */
};
diff --git a/drivers/net/sfc/base/efx_intr.c b/drivers/net/sfc/base/efx_intr.c
index 4c68b1091..5f0119b5d 100644
--- a/drivers/net/sfc/base/efx_intr.c
+++ b/drivers/net/sfc/base/efx_intr.c
@@ -75,7 +75,7 @@ static const efx_intr_ops_t __efx_intr_siena_ops = {
};
#endif /* EFSYS_OPT_SIENA */
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
static const efx_intr_ops_t __efx_intr_ef10_ops = {
ef10_intr_init, /* eio_init */
ef10_intr_enable, /* eio_enable */
@@ -87,7 +87,7 @@ static const efx_intr_ops_t __efx_intr_ef10_ops = {
ef10_intr_fatal, /* eio_fatal */
ef10_intr_fini, /* eio_fini */
};
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
__checkReturn efx_rc_t
efx_intr_init(
diff --git a/drivers/net/sfc/base/efx_mac.c b/drivers/net/sfc/base/efx_mac.c
index 57436b95a..673bc4f4e 100644
--- a/drivers/net/sfc/base/efx_mac.c
+++ b/drivers/net/sfc/base/efx_mac.c
@@ -39,7 +39,7 @@ static const efx_mac_ops_t __efx_mac_siena_ops = {
};
#endif /* EFSYS_OPT_SIENA */
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
static const efx_mac_ops_t __efx_mac_ef10_ops = {
ef10_mac_poll, /* emo_poll */
ef10_mac_up, /* emo_up */
@@ -62,7 +62,7 @@ static const efx_mac_ops_t __efx_mac_ef10_ops = {
ef10_mac_stats_update /* emo_stats_update */
#endif /* EFSYS_OPT_MAC_STATS */
};
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
__checkReturn efx_rc_t
efx_mac_pdu_set(
diff --git a/drivers/net/sfc/base/efx_mcdi.c b/drivers/net/sfc/base/efx_mcdi.c
index c896aa0bf..adc2eb8e8 100644
--- a/drivers/net/sfc/base/efx_mcdi.c
+++ b/drivers/net/sfc/base/efx_mcdi.c
@@ -45,7 +45,7 @@ static const efx_mcdi_ops_t __efx_mcdi_siena_ops = {
#endif /* EFSYS_OPT_SIENA */
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
static const efx_mcdi_ops_t __efx_mcdi_ef10_ops = {
ef10_mcdi_init, /* emco_init */
@@ -58,7 +58,7 @@ static const efx_mcdi_ops_t __efx_mcdi_ef10_ops = {
ef10_mcdi_get_timeout, /* emco_get_timeout */
};
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
@@ -1642,7 +1642,7 @@ efx_mcdi_mac_spoofing_supported(
#if EFSYS_OPT_BIST
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
/*
* Enter bist offline mode. This is a fw mode which puts the NIC into a state
* where memory BIST tests can be run and not much else can interfere or happen.
@@ -1678,7 +1678,7 @@ efx_mcdi_bist_enable_offline(
return (rc);
}
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
__checkReturn efx_rc_t
efx_mcdi_bist_start(
@@ -1961,7 +1961,7 @@ efx_mcdi_mac_stats_periodic(
#endif /* EFSYS_OPT_MAC_STATS */
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
/*
* This function returns the pf and vf number of a function. If it is a pf the
@@ -2058,7 +2058,7 @@ efx_mcdi_privilege_mask(
return (rc);
}
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
__checkReturn efx_rc_t
efx_mcdi_set_workaround(
diff --git a/drivers/net/sfc/base/efx_mcdi.h b/drivers/net/sfc/base/efx_mcdi.h
index b8c199dd3..a9e025537 100644
--- a/drivers/net/sfc/base/efx_mcdi.h
+++ b/drivers/net/sfc/base/efx_mcdi.h
@@ -170,11 +170,11 @@ efx_mcdi_mac_spoofing_supported(
#if EFSYS_OPT_BIST
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
extern __checkReturn efx_rc_t
efx_mcdi_bist_enable_offline(
__in efx_nic_t *enp);
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
extern __checkReturn efx_rc_t
efx_mcdi_bist_start(
__in efx_nic_t *enp,
diff --git a/drivers/net/sfc/base/efx_nvram.c b/drivers/net/sfc/base/efx_nvram.c
index 5296c59b8..5c611c366 100644
--- a/drivers/net/sfc/base/efx_nvram.c
+++ b/drivers/net/sfc/base/efx_nvram.c
@@ -30,7 +30,7 @@ static const efx_nvram_ops_t __efx_nvram_siena_ops = {
#endif /* EFSYS_OPT_SIENA */
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
static const efx_nvram_ops_t __efx_nvram_ef10_ops = {
#if EFSYS_OPT_DIAG
@@ -49,7 +49,7 @@ static const efx_nvram_ops_t __efx_nvram_ef10_ops = {
ef10_nvram_buffer_validate, /* envo_buffer_validate */
};
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
__checkReturn efx_rc_t
efx_nvram_init(
diff --git a/drivers/net/sfc/base/efx_phy.c b/drivers/net/sfc/base/efx_phy.c
index 36a7bbd3d..e3c6aa9f3 100644
--- a/drivers/net/sfc/base/efx_phy.c
+++ b/drivers/net/sfc/base/efx_phy.c
@@ -28,7 +28,7 @@ static const efx_phy_ops_t __efx_phy_siena_ops = {
};
#endif /* EFSYS_OPT_SIENA */
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
static const efx_phy_ops_t __efx_phy_ef10_ops = {
ef10_phy_power, /* epo_power */
NULL, /* epo_reset */
@@ -46,7 +46,7 @@ static const efx_phy_ops_t __efx_phy_ef10_ops = {
ef10_bist_stop, /* epo_bist_stop */
#endif /* EFSYS_OPT_BIST */
};
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
__checkReturn efx_rc_t
efx_phy_probe(
diff --git a/drivers/net/sfc/base/efx_rx.c b/drivers/net/sfc/base/efx_rx.c
index 49c304c0b..26999a92f 100644
--- a/drivers/net/sfc/base/efx_rx.c
+++ b/drivers/net/sfc/base/efx_rx.c
@@ -151,7 +151,7 @@ static const efx_rx_ops_t __efx_rx_siena_ops = {
};
#endif /* EFSYS_OPT_SIENA */
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
static const efx_rx_ops_t __efx_rx_ef10_ops = {
ef10_rx_init, /* erxo_init */
ef10_rx_fini, /* erxo_fini */
@@ -178,7 +178,7 @@ static const efx_rx_ops_t __efx_rx_ef10_ops = {
ef10_rx_qcreate, /* erxo_qcreate */
ef10_rx_qdestroy, /* erxo_qdestroy */
};
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
__checkReturn efx_rc_t
diff --git a/drivers/net/sfc/base/efx_sram.c b/drivers/net/sfc/base/efx_sram.c
index 7851ff133..de0612edd 100644
--- a/drivers/net/sfc/base/efx_sram.c
+++ b/drivers/net/sfc/base/efx_sram.c
@@ -25,7 +25,7 @@ efx_sram_buf_tbl_set(
EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC);
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
if (enp->en_family == EFX_FAMILY_HUNTINGTON ||
enp->en_family == EFX_FAMILY_MEDFORD ||
enp->en_family == EFX_FAMILY_MEDFORD2) {
@@ -40,7 +40,7 @@ efx_sram_buf_tbl_set(
return (0);
}
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
if (stop >= EFX_BUF_TBL_SIZE) {
rc = EFBIG;
@@ -148,7 +148,7 @@ efx_sram_buf_tbl_clear(
EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC);
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
if (enp->en_family == EFX_FAMILY_HUNTINGTON ||
enp->en_family == EFX_FAMILY_MEDFORD ||
enp->en_family == EFX_FAMILY_MEDFORD2) {
@@ -163,7 +163,7 @@ efx_sram_buf_tbl_clear(
return;
}
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
EFSYS_ASSERT3U(stop, <, EFX_BUF_TBL_SIZE);
diff --git a/drivers/net/sfc/base/efx_vpd.c b/drivers/net/sfc/base/efx_vpd.c
index 6d783d742..826752177 100644
--- a/drivers/net/sfc/base/efx_vpd.c
+++ b/drivers/net/sfc/base/efx_vpd.c
@@ -44,7 +44,7 @@ static const efx_vpd_ops_t __efx_vpd_siena_ops = {
#endif /* EFSYS_OPT_SIENA */
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
static const efx_vpd_ops_t __efx_vpd_ef10_ops = {
ef10_vpd_init, /* evpdo_init */
@@ -59,7 +59,7 @@ static const efx_vpd_ops_t __efx_vpd_ef10_ops = {
ef10_vpd_fini, /* evpdo_fini */
};
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
__checkReturn efx_rc_t
efx_vpd_init(
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 35/38] net/sfc/base: simplify EF10 family run-time checks
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (33 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 34/38] net/sfc/base: simplify EF10 family conditional code checks Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 36/38] net/sfc/base: avoid division by 0 if no event queue timers Andrew Rybchenko
` (3 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev
Add EFX_FAMILY_IS_EF10() which may be used as synonym of any EF10-based
NIC family (i.e. Huntigton, Medford or Medford2 at the time of addition).
Suggested-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/ef10_ev.c | 4 +--
drivers/net/sfc/base/ef10_filter.c | 20 ++++-----------
drivers/net/sfc/base/ef10_intr.c | 12 +++------
drivers/net/sfc/base/ef10_mac.c | 4 +--
drivers/net/sfc/base/ef10_mcdi.c | 12 +++------
drivers/net/sfc/base/ef10_nic.c | 40 ++++++++----------------------
drivers/net/sfc/base/ef10_vpd.c | 32 ++++++------------------
drivers/net/sfc/base/efx_impl.h | 5 ++++
drivers/net/sfc/base/efx_sram.c | 8 ++----
9 files changed, 38 insertions(+), 99 deletions(-)
diff --git a/drivers/net/sfc/base/ef10_ev.c b/drivers/net/sfc/base/ef10_ev.c
index f590f37f5..d2c27e0d2 100644
--- a/drivers/net/sfc/base/ef10_ev.c
+++ b/drivers/net/sfc/base/ef10_ev.c
@@ -553,9 +553,7 @@ ef10_ev_qdestroy(
{
efx_nic_t *enp = eep->ee_enp;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
(void) efx_mcdi_fini_evq(enp, eep->ee_index);
}
diff --git a/drivers/net/sfc/base/ef10_filter.c b/drivers/net/sfc/base/ef10_filter.c
index 0b3fbf78b..9c09a0de2 100644
--- a/drivers/net/sfc/base/ef10_filter.c
+++ b/drivers/net/sfc/base/ef10_filter.c
@@ -94,9 +94,7 @@ ef10_filter_init(
efx_rc_t rc;
ef10_filter_table_t *eftp;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
#define MATCH_MASK(match) (EFX_MASK32(match) << EFX_LOW_BIT(match))
EFX_STATIC_ASSERT(EFX_FILTER_MATCH_REM_HOST ==
@@ -154,9 +152,7 @@ ef10_filter_init(
ef10_filter_fini(
__in efx_nic_t *enp)
{
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
if (enp->en_filter.ef_ef10_filter_table != NULL) {
EFSYS_KMEM_FREE(enp->en_esip, sizeof (ef10_filter_table_t),
@@ -545,9 +541,7 @@ ef10_filter_restore(
efsys_lock_state_t state;
efx_rc_t rc;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
for (tbl_id = 0; tbl_id < EFX_EF10_FILTER_TBL_ROWS; tbl_id++) {
@@ -621,9 +615,7 @@ ef10_filter_add_internal(
efsys_lock_state_t state;
boolean_t locked = B_FALSE;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
hash = ef10_filter_hash(spec);
@@ -894,9 +886,7 @@ ef10_filter_delete(
efsys_lock_state_t state;
boolean_t locked = B_FALSE;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
hash = ef10_filter_hash(spec);
diff --git a/drivers/net/sfc/base/ef10_intr.c b/drivers/net/sfc/base/ef10_intr.c
index b7822a259..ac9a62018 100644
--- a/drivers/net/sfc/base/ef10_intr.c
+++ b/drivers/net/sfc/base/ef10_intr.c
@@ -55,9 +55,7 @@ efx_mcdi_trigger_interrupt(
MC_CMD_TRIGGER_INTERRUPT_OUT_LEN);
efx_rc_t rc;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
if (level >= enp->en_nic_cfg.enc_intr_limit) {
rc = EINVAL;
@@ -128,9 +126,7 @@ ef10_intr_status_line(
{
efx_dword_t dword;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
/* Read the queue mask and implicitly acknowledge the interrupt. */
EFX_BAR_READD(enp, ER_DZ_BIU_INT_ISR_REG, &dword, B_FALSE);
@@ -147,9 +143,7 @@ ef10_intr_status_message(
__in unsigned int message,
__out boolean_t *fatalp)
{
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
_NOTE(ARGUNUSED(enp, message))
diff --git a/drivers/net/sfc/base/ef10_mac.c b/drivers/net/sfc/base/ef10_mac.c
index 28dba9290..3f3153889 100644
--- a/drivers/net/sfc/base/ef10_mac.c
+++ b/drivers/net/sfc/base/ef10_mac.c
@@ -351,9 +351,7 @@ ef10_mac_multicast_list_set(
const efx_mac_ops_t *emop = epp->ep_emop;
efx_rc_t rc;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
if ((rc = emop->emo_reconfigure(enp)) != 0)
goto fail1;
diff --git a/drivers/net/sfc/base/ef10_mcdi.c b/drivers/net/sfc/base/ef10_mcdi.c
index 574879425..d1c6da404 100644
--- a/drivers/net/sfc/base/ef10_mcdi.c
+++ b/drivers/net/sfc/base/ef10_mcdi.c
@@ -27,9 +27,7 @@ ef10_mcdi_init(
efx_dword_t dword;
efx_rc_t rc;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
EFSYS_ASSERT(enp->en_features & EFX_FEATURE_MCDI_DMA);
/*
@@ -135,9 +133,7 @@ ef10_mcdi_send_request(
efx_dword_t dword;
unsigned int pos;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
/* Write the header */
for (pos = 0; pos < hdr_len; pos += sizeof (efx_dword_t)) {
@@ -259,9 +255,7 @@ ef10_mcdi_feature_supported(
uint32_t privilege_mask = encp->enc_privilege_mask;
efx_rc_t rc;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
/*
* Use privilege mask state at MCDI attach.
diff --git a/drivers/net/sfc/base/ef10_nic.c b/drivers/net/sfc/base/ef10_nic.c
index 8c17f4a75..e5e84690e 100644
--- a/drivers/net/sfc/base/ef10_nic.c
+++ b/drivers/net/sfc/base/ef10_nic.c
@@ -24,9 +24,7 @@ efx_mcdi_get_port_assignment(
MC_CMD_GET_PORT_ASSIGNMENT_OUT_LEN);
efx_rc_t rc;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
req.emr_cmd = MC_CMD_GET_PORT_ASSIGNMENT;
req.emr_in_buf = payload;
@@ -70,9 +68,7 @@ efx_mcdi_get_port_modes(
MC_CMD_GET_PORT_MODES_OUT_LEN);
efx_rc_t rc;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
req.emr_cmd = MC_CMD_GET_PORT_MODES;
req.emr_in_buf = payload;
@@ -308,9 +304,7 @@ efx_mcdi_get_mac_address_pf(
MC_CMD_GET_MAC_ADDRESSES_OUT_LEN);
efx_rc_t rc;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
req.emr_cmd = MC_CMD_GET_MAC_ADDRESSES;
req.emr_in_buf = payload;
@@ -366,9 +360,7 @@ efx_mcdi_get_mac_address_vf(
MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_LENMAX);
efx_rc_t rc;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
req.emr_cmd = MC_CMD_VPORT_GET_MAC_ADDRESSES;
req.emr_in_buf = payload;
@@ -430,9 +422,7 @@ efx_mcdi_get_clock(
MC_CMD_GET_CLOCK_OUT_LEN);
efx_rc_t rc;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
req.emr_cmd = MC_CMD_GET_CLOCK;
req.emr_in_buf = payload;
@@ -892,9 +882,7 @@ ef10_nic_pio_alloc(
uint32_t buf, blk;
efx_rc_t rc;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
EFSYS_ASSERT(bufnump);
EFSYS_ASSERT(handlep);
EFSYS_ASSERT(blknump);
@@ -1963,9 +1951,7 @@ ef10_nic_probe(
efx_drv_cfg_t *edcp = &(enp->en_drv_cfg);
efx_rc_t rc;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
/* Read and clear any assertion state */
if ((rc = efx_mcdi_read_assertion(enp)) != 0)
@@ -2177,9 +2163,7 @@ ef10_nic_init(
uint32_t vi_window_size;
efx_rc_t rc;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
/* Enable reporting of some events (e.g. link change) */
if ((rc = efx_mcdi_log_ctrl(enp)) != 0)
@@ -2340,9 +2324,7 @@ ef10_nic_get_vi_pool(
__in efx_nic_t *enp,
__out uint32_t *vi_countp)
{
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
/*
* Report VIs that the client driver can use.
@@ -2362,9 +2344,7 @@ ef10_nic_get_bar_region(
{
efx_rc_t rc;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
/*
* TODO: Specify host memory mapping alignment and granularity
diff --git a/drivers/net/sfc/base/ef10_vpd.c b/drivers/net/sfc/base/ef10_vpd.c
index b21861bb0..d56747b7d 100644
--- a/drivers/net/sfc/base/ef10_vpd.c
+++ b/drivers/net/sfc/base/ef10_vpd.c
@@ -25,9 +25,7 @@ ef10_vpd_init(
efx_rc_t rc;
EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
if (enp->en_nic_cfg.enc_vpd_is_global) {
tag = TLV_TAG_GLOBAL_STATIC_VPD;
@@ -82,9 +80,7 @@ ef10_vpd_size(
{
efx_rc_t rc;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
/*
* This function returns the total size the user should allocate
@@ -116,9 +112,7 @@ ef10_vpd_read(
uint32_t tag;
efx_rc_t rc;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
if (enp->en_nic_cfg.enc_vpd_is_global) {
tag = TLV_TAG_GLOBAL_DYNAMIC_VPD;
@@ -172,9 +166,7 @@ ef10_vpd_verify(
unsigned int dcont;
efx_rc_t rc;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
/*
* Strictly you could take the view that dynamic vpd is optional.
@@ -294,9 +286,7 @@ ef10_vpd_get(
uint8_t length;
efx_rc_t rc;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
/* Attempt to satisfy the request from svpd first */
if (enp->en_arch.ef10.ena_svpd_length > 0) {
@@ -341,9 +331,7 @@ ef10_vpd_set(
{
efx_rc_t rc;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
/* If the provided (tag,keyword) exists in svpd, then it is readonly */
if (enp->en_arch.ef10.ena_svpd_length > 0) {
@@ -395,9 +383,7 @@ ef10_vpd_write(
uint32_t tag;
efx_rc_t rc;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
if (enp->en_nic_cfg.enc_vpd_is_global) {
tag = TLV_TAG_GLOBAL_DYNAMIC_VPD;
@@ -432,9 +418,7 @@ ef10_vpd_write(
ef10_vpd_fini(
__in efx_nic_t *enp)
{
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2);
+ EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
if (enp->en_arch.ef10.ena_svpd_length > 0) {
EFSYS_KMEM_FREE(enp->en_esip, enp->en_arch.ef10.ena_svpd_length,
diff --git a/drivers/net/sfc/base/efx_impl.h b/drivers/net/sfc/base/efx_impl.h
index 748d45a3b..eb2bdc959 100644
--- a/drivers/net/sfc/base/efx_impl.h
+++ b/drivers/net/sfc/base/efx_impl.h
@@ -741,6 +741,11 @@ struct efx_nic_s {
#endif /* EFX_OPTS_EF10() */
};
+#define EFX_FAMILY_IS_EF10(_enp) \
+ ((_enp)->en_family == EFX_FAMILY_MEDFORD2 || \
+ (_enp)->en_family == EFX_FAMILY_MEDFORD || \
+ (_enp)->en_family == EFX_FAMILY_HUNTINGTON)
+
#define EFX_NIC_MAGIC 0x02121996
diff --git a/drivers/net/sfc/base/efx_sram.c b/drivers/net/sfc/base/efx_sram.c
index de0612edd..599bc5d75 100644
--- a/drivers/net/sfc/base/efx_sram.c
+++ b/drivers/net/sfc/base/efx_sram.c
@@ -26,9 +26,7 @@ efx_sram_buf_tbl_set(
EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC);
#if EFX_OPTS_EF10()
- if (enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2) {
+ if (EFX_FAMILY_IS_EF10(enp)) {
/*
* FIXME: the efx_sram_buf_tbl_*() functionality needs to be
* pulled inside the Falcon/Siena queue create/destroy code,
@@ -149,9 +147,7 @@ efx_sram_buf_tbl_clear(
EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC);
#if EFX_OPTS_EF10()
- if (enp->en_family == EFX_FAMILY_HUNTINGTON ||
- enp->en_family == EFX_FAMILY_MEDFORD ||
- enp->en_family == EFX_FAMILY_MEDFORD2) {
+ if (EFX_FAMILY_IS_EF10(enp)) {
/*
* FIXME: the efx_sram_buf_tbl_*() functionality needs to be
* pulled inside the Falcon/Siena queue create/destroy code,
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 36/38] net/sfc/base: avoid division by 0 if no event queue timers
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (34 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 35/38] net/sfc/base: simplify EF10 family run-time checks Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 37/38] net/sfc/base: improve MCDI interface header inclusion Andrew Rybchenko
` (2 subsequent siblings)
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev
If event queue timers are not supported, enc_evq_timer_quantum_ns and
enc_evq_timer_max_us should be set to 0. Make sure that division by 0
does not happen in libefx, if public function efx_ev_usecs_to_ticks()
is used in this case.
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/efx_ev.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/net/sfc/base/efx_ev.c b/drivers/net/sfc/base/efx_ev.c
index 69224cbc5..7b5130291 100644
--- a/drivers/net/sfc/base/efx_ev.c
+++ b/drivers/net/sfc/base/efx_ev.c
@@ -566,6 +566,12 @@ efx_ev_usecs_to_ticks(
{
efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
unsigned int ticks;
+ efx_rc_t rc;
+
+ if (encp->enc_evq_timer_quantum_ns == 0) {
+ rc = ENOTSUP;
+ goto fail1;
+ }
/* Convert microseconds to a timer tick count */
if (us == 0)
@@ -577,6 +583,10 @@ efx_ev_usecs_to_ticks(
*ticksp = ticks;
return (0);
+
+fail1:
+ EFSYS_PROBE1(fail1, efx_rc_t, rc);
+ return (rc);
}
__checkReturn efx_rc_t
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 37/38] net/sfc/base: improve MCDI interface header inclusion
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (35 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 36/38] net/sfc/base: avoid division by 0 if no event queue timers Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-07 16:29 ` [PATCH 38/38] net/sfc/base: share macro to increment per-event type stats Andrew Rybchenko
2019-02-08 13:18 ` [PATCH 00/38] net/sfc: update base driver Ferruh Yigit
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev
Include efx_mcdi.h from main internal header efx_impl.h directly
instead of indirect inclusion via family-specific header.
It avoids duplication and fixes Medford and Medford2 cases where
the header inclusion is lost.
Correctness is still guaranteed by checks in efx_check.h which
require EFSYS_OPT_MCDI for corresponding families and do not
allow to enable the option if no family requires it.
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/efx_impl.h | 3 +++
drivers/net/sfc/base/hunt_impl.h | 1 -
drivers/net/sfc/base/siena_impl.h | 1 -
3 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/net/sfc/base/efx_impl.h b/drivers/net/sfc/base/efx_impl.h
index eb2bdc959..56d293b40 100644
--- a/drivers/net/sfc/base/efx_impl.h
+++ b/drivers/net/sfc/base/efx_impl.h
@@ -10,6 +10,9 @@
#include "efx.h"
#include "efx_regs.h"
#include "efx_regs_ef10.h"
+#if EFSYS_OPT_MCDI
+#include "efx_mcdi.h"
+#endif /* EFSYS_OPT_MCDI */
/* FIXME: Add definition for driver generated software events */
#ifndef ESE_DZ_EV_CODE_DRV_GEN_EV
diff --git a/drivers/net/sfc/base/hunt_impl.h b/drivers/net/sfc/base/hunt_impl.h
index a76602d52..3c1cb6214 100644
--- a/drivers/net/sfc/base/hunt_impl.h
+++ b/drivers/net/sfc/base/hunt_impl.h
@@ -10,7 +10,6 @@
#include "efx.h"
#include "efx_regs.h"
#include "efx_regs_ef10.h"
-#include "efx_mcdi.h"
#ifdef __cplusplus
extern "C" {
diff --git a/drivers/net/sfc/base/siena_impl.h b/drivers/net/sfc/base/siena_impl.h
index 4af9845fe..1adb8a437 100644
--- a/drivers/net/sfc/base/siena_impl.h
+++ b/drivers/net/sfc/base/siena_impl.h
@@ -9,7 +9,6 @@
#include "efx.h"
#include "efx_regs.h"
-#include "efx_mcdi.h"
#include "siena_flash.h"
#ifdef __cplusplus
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 38/38] net/sfc/base: share macro to increment per-event type stats
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (36 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 37/38] net/sfc/base: improve MCDI interface header inclusion Andrew Rybchenko
@ 2019-02-07 16:29 ` Andrew Rybchenko
2019-02-08 13:18 ` [PATCH 00/38] net/sfc: update base driver Ferruh Yigit
38 siblings, 0 replies; 40+ messages in thread
From: Andrew Rybchenko @ 2019-02-07 16:29 UTC (permalink / raw)
To: dev
Move duplicate macro to increment per-event type stats to
internal header. These stats are NIC family independent and
stored in generic event queue structure.
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/base/ef10_ev.c | 10 ----------
drivers/net/sfc/base/efx_ev.c | 10 ----------
drivers/net/sfc/base/efx_impl.h | 10 ++++++++++
3 files changed, 10 insertions(+), 20 deletions(-)
diff --git a/drivers/net/sfc/base/ef10_ev.c b/drivers/net/sfc/base/ef10_ev.c
index d2c27e0d2..99cae3fa3 100644
--- a/drivers/net/sfc/base/ef10_ev.c
+++ b/drivers/net/sfc/base/ef10_ev.c
@@ -12,16 +12,6 @@
#if EFX_OPTS_EF10()
-#if EFSYS_OPT_QSTATS
-#define EFX_EV_QSTAT_INCR(_eep, _stat) \
- do { \
- (_eep)->ee_stat[_stat]++; \
- _NOTE(CONSTANTCONDITION) \
- } while (B_FALSE)
-#else
-#define EFX_EV_QSTAT_INCR(_eep, _stat)
-#endif
-
/*
* Non-interrupting event queue requires interrrupting event queue to
* refer to for wake-up events even if wake ups are never used.
diff --git a/drivers/net/sfc/base/efx_ev.c b/drivers/net/sfc/base/efx_ev.c
index 7b5130291..b9fc5caae 100644
--- a/drivers/net/sfc/base/efx_ev.c
+++ b/drivers/net/sfc/base/efx_ev.c
@@ -10,16 +10,6 @@
#include "mcdi_mon.h"
#endif
-#if EFSYS_OPT_QSTATS
-#define EFX_EV_QSTAT_INCR(_eep, _stat) \
- do { \
- (_eep)->ee_stat[_stat]++; \
- _NOTE(CONSTANTCONDITION) \
- } while (B_FALSE)
-#else
-#define EFX_EV_QSTAT_INCR(_eep, _stat)
-#endif
-
#define EFX_EV_PRESENT(_qword) \
(EFX_QWORD_FIELD((_qword), EFX_DWORD_0) != 0xffffffff && \
EFX_QWORD_FIELD((_qword), EFX_DWORD_1) != 0xffffffff)
diff --git a/drivers/net/sfc/base/efx_impl.h b/drivers/net/sfc/base/efx_impl.h
index 56d293b40..f148c870c 100644
--- a/drivers/net/sfc/base/efx_impl.h
+++ b/drivers/net/sfc/base/efx_impl.h
@@ -794,6 +794,16 @@ struct efx_evq_s {
#define EFX_EVQ_SIENA_TIMER_QUANTUM_NS 6144 /* 768 cycles */
+#if EFSYS_OPT_QSTATS
+#define EFX_EV_QSTAT_INCR(_eep, _stat) \
+ do { \
+ (_eep)->ee_stat[_stat]++; \
+ _NOTE(CONSTANTCONDITION) \
+ } while (B_FALSE)
+#else
+#define EFX_EV_QSTAT_INCR(_eep, _stat)
+#endif
+
struct efx_rxq_s {
uint32_t er_magic;
efx_nic_t *er_enp;
--
2.17.1
^ permalink raw reply related [flat|nested] 40+ messages in thread* Re: [PATCH 00/38] net/sfc: update base driver
2019-02-07 16:29 [PATCH 00/38] net/sfc: update base driver Andrew Rybchenko
` (37 preceding siblings ...)
2019-02-07 16:29 ` [PATCH 38/38] net/sfc/base: share macro to increment per-event type stats Andrew Rybchenko
@ 2019-02-08 13:18 ` Ferruh Yigit
38 siblings, 0 replies; 40+ messages in thread
From: Ferruh Yigit @ 2019-02-08 13:18 UTC (permalink / raw)
To: Andrew Rybchenko, dev
On 2/7/2019 4:29 PM, Andrew Rybchenko wrote:
> Update Solarflare libefx and make related changes in the PMD itself.
>
> Andrew Lee (1):
> net/sfc/base: add Rx parse incomplete event queue statistic
>
> Andrew Rybchenko (9):
> net/sfc/base: update auto-generated MCDI definition headers
> net/sfc/base: rename header with MCDI strings
> net/sfc/base: allow to specify Rx buffer size on queue setup
> net/sfc/base: pass Rx buffer size to RxQ init if supported
> net/sfc/base: simplify EF10 family conditional code checks
> net/sfc/base: simplify EF10 family run-time checks
> net/sfc/base: avoid division by 0 if no event queue timers
> net/sfc/base: improve MCDI interface header inclusion
> net/sfc/base: share macro to increment per-event type stats
>
> Igor Romanov (22):
> net/sfc/base: remove min define for number of Tx descs
> net/sfc/base: define max desc number for every EF10 NIC
> net/sfc/base: remove min/max defines for number of Rx descs
> net/sfc/base: remove min/max defines for number of events
> net/sfc: use NIC min number of Tx descs instead of define
> net/sfc: use NIC Rx descs limits instead of defines
> net/sfc: use NIC EVQ descs limits instead of defines
> net/sfc/base: move Tx descs number check to generic place
> net/sfc/base: move Rx descs number check to generic place
> net/sfc/base: move EVQ descs number check to generic place
> net/sfc/base: move a macro to Siena implementation header
> net/sfc/base: make max number of TxQ bufs EF10-specific
> net/sfc/base: make NIC pointer const in NIC config get
> net/sfc/base: support different Tx descriptor sizes
> net/sfc/base: support different Rx descriptor sizes
> net/sfc/base: support different event descriptor sizes
> net/sfc/base: round number of queue buffers up
> net/sfc: use NIC Tx descritor size instead of common
> net/sfc: use NIC Rx descritor size instead of common
> net/sfc: use NIC event descritor size instead of common
> net/sfc/base: remove deprecated min/max desc defines
> net/sfc/base: remove deprecated macros that get queue sizes
>
> Ivan Malov (1):
> net/sfc/base: report support for Tx checksum op descriptors
>
> Mark Spender (2):
> net/sfc/base: ensure EvQ poll stops when abort is requested
> net/sfc/base: add support for the Rx event mode w/o continue
>
> Richard Houldsworth (3):
> net/sfc/base: correct annotations where NULL input is OK
> net/sfc/base: update external port number calculation
> net/sfc/base: make bundle partition type available for X2
Series applied to dpdk-next-net/master, thanks.
^ permalink raw reply [flat|nested] 40+ messages in thread