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From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: thierry.reding@gmail.com, jonathanh@nvidia.com, talho@nvidia.com,
	skomatineni@nvidia.com
Cc: wsa@the-dreams.de, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org
Subject: [PATCH V2] i2c: tegra: fix tegra186 hw feature support
Date: Mon, 18 Feb 2019 13:07:36 -0800	[thread overview]
Message-ID: <1550524059-28900-2-git-send-email-skomatineni@nvidia.com> (raw)
In-Reply-To: <1550524059-28900-1-git-send-email-skomatineni@nvidia.com>

Tegra186 does not have master fifo control register and instead
uses fifo control register like prior tegra chipset.

This patch fixes this and prevents crashing during boot when
accessing fifo control registers.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
 drivers/i2c/busses/i2c-tegra.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index a4cd79c9f7a7..e6851904acc1 100644
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -1436,7 +1436,7 @@ static const struct tegra_i2c_hw_feature tegra186_i2c_hw = {
 	.has_config_load_reg = true,
 	.has_multi_master_mode = true,
 	.has_slcg_override_reg = true,
-	.has_mst_fifo = true,
+	.has_mst_fifo = false,
 	.quirks = &tegra_i2c_quirks,
 	.supports_bus_clear = true,
 	.has_apb_dma = false,
-- 
2.7.4

WARNING: multiple messages have this Message-ID (diff)
From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: <thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
	<talho@nvidia.com>, <skomatineni@nvidia.com>
Cc: <wsa@the-dreams.de>, <linux-tegra@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <linux-i2c@vger.kernel.org>
Subject: [PATCH V2] i2c: tegra: fix tegra186 hw feature support
Date: Mon, 18 Feb 2019 13:07:36 -0800	[thread overview]
Message-ID: <1550524059-28900-2-git-send-email-skomatineni@nvidia.com> (raw)
In-Reply-To: <1550524059-28900-1-git-send-email-skomatineni@nvidia.com>

Tegra186 does not have master fifo control register and instead
uses fifo control register like prior tegra chipset.

This patch fixes this and prevents crashing during boot when
accessing fifo control registers.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
 drivers/i2c/busses/i2c-tegra.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index a4cd79c9f7a7..e6851904acc1 100644
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -1436,7 +1436,7 @@ static const struct tegra_i2c_hw_feature tegra186_i2c_hw = {
 	.has_config_load_reg = true,
 	.has_multi_master_mode = true,
 	.has_slcg_override_reg = true,
-	.has_mst_fifo = true,
+	.has_mst_fifo = false,
 	.quirks = &tegra_i2c_quirks,
 	.supports_bus_clear = true,
 	.has_apb_dma = false,
-- 
2.7.4


  reply	other threads:[~2019-02-18 21:07 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-18 21:07 [PATCH V2] i2c: tegra: fix tegra186 hw feature support for has_mst_fifo_reg Sowjanya Komatineni
2019-02-18 21:07 ` Sowjanya Komatineni
2019-02-18 21:07 ` Sowjanya Komatineni [this message]
2019-02-18 21:07   ` [PATCH V2] i2c: tegra: fix tegra186 hw feature support Sowjanya Komatineni

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