From: Aisheng Dong <aisheng.dong@nxp.com> To: "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org> Cc: Aisheng Dong <aisheng.dong@nxp.com>, Mark Rutland <mark.rutland@arm.com>, "dongas86@gmail.com" <dongas86@gmail.com>, "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>, "catalin.marinas@arm.com" <catalin.marinas@arm.com>, "will.deacon@arm.com" <will.deacon@arm.com>, "robh+dt@kernel.org" <robh+dt@kernel.org>, dl-linux-imx <linux-imx@nxp.com>, "kernel@pengutronix.de" <kernel@pengutronix.de>, Fabio Estevam <fabio.estevam@nxp.com>, "shawnguo@kernel.org" <shawnguo@kernel.org> Subject: [PATCH 05/14] arm64: dts: imx8: add lsio lpcg clocks Date: Thu, 21 Feb 2019 18:25:09 +0000 [thread overview] Message-ID: <1550773093-13349-6-git-send-email-aisheng.dong@nxp.com> (raw) In-Reply-To: <1550773093-13349-1-git-send-email-aisheng.dong@nxp.com> Add lsio lpcg clocks Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> --- arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi | 107 +++++++++++++++++++++++- 1 file changed, 106 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi index 5c4c2fb..cf9223d 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi @@ -132,7 +132,112 @@ lsio_subsys: bus@5d000000 { clock-output-names = "pwm7_clk"; }; - lsio_lpcg: clock-controller@5d400000 { + /* LPCG clocks */ + pwm0_lpcg: clock-controller@5d400000 { + reg = <0x5d400000 0x10000>; + #clock-cells = <1>; + clocks = <&pwm0_clk>, <&pwm0_clk>, <&pwm0_clk>, + <&lsio_bus_clk>, <&pwm0_clk>; + bit-offset = <0 4 16 20 24>; + clock-output-names = "pwm0_lpcg_ipg_clk", + "pwm0_lpcg_ipg_hf_clk", + "pwm0_lpcg_ipg_s_clk", + "pwm0_lpcg_ipg_slv_clk", + "pwm0_lpcg_ipg_mstr_clk"; + }; + + pwm1_lpcg: clock-controller@5d410000 { + reg = <0x5d410000 0x10000>; + #clock-cells = <1>; + clocks = <&pwm1_clk>, <&pwm1_clk>, <&pwm1_clk>, + <&lsio_bus_clk>, <&pwm1_clk>; + bit-offset = <0 4 16 20 24>; + clock-output-names = "pwm1_lpcg_ipg_clk", + "pwm1_lpcg_ipg_hf_clk", + "pwm1_lpcg_ipg_s_clk", + "pwm1_lpcg_ipg_slv_clk", + "pwm1_lpcg_ipg_mstr_clk"; + }; + + pwm2_lpcg: clock-controller@5d420000 { + reg = <0x5d420000 0x10000>; + #clock-cells = <1>; + clocks = <&pwm2_clk>, <&pwm2_clk>, <&pwm2_clk>, + <&lsio_bus_clk>, <&pwm2_clk>; + bit-offset = <0 4 16 20 24>; + clock-output-names = "pwm2_lpcg_ipg_clk", + "pwm2_lpcg_ipg_hf_clk", + "pwm2_lpcg_ipg_s_clk", + "pwm2_lpcg_ipg_slv_clk", + "pwm2_lpcg_ipg_mstr_clk"; + }; + + pwm3_lpcg: clock-controller@5d430000 { + reg = <0x5d430000 0x10000>; + #clock-cells = <1>; + clocks = <&pwm3_clk>, <&pwm3_clk>, <&pwm3_clk>, + <&lsio_bus_clk>, <&pwm3_clk>; + bit-offset = <0 4 16 20 24>; + clock-output-names = "pwm3_lpcg_ipg_clk", + "pwm3_lpcg_ipg_hf_clk", + "pwm3_lpcg_ipg_s_clk", + "pwm3_lpcg_ipg_slv_clk", + "pwm3_lpcg_ipg_mstr_clk"; + }; + + pwm4_lpcg: clock-controller@5d440000 { + reg = <0x5d440000 0x10000>; + #clock-cells = <1>; + clocks = <&pwm4_clk>, <&pwm4_clk>, <&pwm4_clk>, + <&lsio_bus_clk>, <&pwm4_clk>; + bit-offset = <0 4 16 20 24>; + clock-output-names = "pwm4_lpcg_ipg_clk", + "pwm4_lpcg_ipg_hf_clk", + "pwm4_lpcg_ipg_s_clk", + "pwm4_lpcg_ipg_slv_clk", + "pwm4_lpcg_ipg_mstr_clk"; + }; + + pwm5_lpcg: clock-controller@5d450000 { + reg = <0x5d450000 0x10000>; + #clock-cells = <1>; + clocks = <&pwm5_clk>, <&pwm5_clk>, <&pwm5_clk>, + <&lsio_bus_clk>, <&pwm5_clk>; + bit-offset = <0 4 16 20 24>; + clock-output-names = "pwm5_lpcg_ipg_clk", + "pwm5_lpcg_ipg_hf_clk", + "pwm5_lpcg_ipg_s_clk", + "pwm5_lpcg_ipg_slv_clk", + "pwm5_lpcg_ipg_mstr_clk"; + }; + + pwm6_lpcg: clock-controller@5d460000 { + reg = <0x5d460000 0x10000>; + #clock-cells = <1>; + clocks = <&pwm6_clk>, <&pwm6_clk>, <&pwm6_clk>, + <&lsio_bus_clk>, <&pwm6_clk>; + bit-offset = <0 4 16 20 24>; + clock-output-names = "pwm6_lpcg_ipg_clk", + "pwm6_lpcg_ipg_hf_clk", + "pwm6_lpcg_ipg_s_clk", + "pwm6_lpcg_ipg_slv_clk", + "pwm6_lpcg_ipg_mstr_clk"; + }; + + pwm7_lpcg: clock-controller@5d470000 { + reg = <0x5d470000 0x10000>; + #clock-cells = <1>; + clocks = <&pwm7_clk>, <&pwm7_clk>, <&pwm7_clk>, + <&lsio_bus_clk>, <&pwm7_clk>; + bit-offset = <0 4 16 20 24>; + clock-output-names = "pwm7_lpcg_ipg_clk", + "pwm7_lpcg_ipg_hf_clk", + "pwm7_lpcg_ipg_s_clk", + "pwm7_lpcg_ipg_slv_clk", + "pwm7_lpcg_ipg_mstr_clk"; + }; + + lsio_lpcg: clock-controller-legacy@5d400000 { reg = <0x5d400000 0x400000>; #clock-cells = <1>; }; -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Aisheng Dong <aisheng.dong@nxp.com> To: "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org> Cc: Aisheng Dong <aisheng.dong@nxp.com>, Mark Rutland <mark.rutland@arm.com>, "dongas86@gmail.com" <dongas86@gmail.com>, "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>, "catalin.marinas@arm.com" <catalin.marinas@arm.com>, "will.deacon@arm.com" <will.deacon@arm.com>, "robh+dt@kernel.org" <robh+dt@kernel.org>, dl-linux-imx <linux-imx@nxp.com>, "kernel@pengutronix.de" <kernel@pengutronix.de>, Fabio Estevam <fabio.estevam@nxp.com>, "shawnguo@kernel.org" <shawnguo@kernel.org> Subject: [PATCH 05/14] arm64: dts: imx8: add lsio lpcg clocks Date: Thu, 21 Feb 2019 18:25:09 +0000 [thread overview] Message-ID: <1550773093-13349-6-git-send-email-aisheng.dong@nxp.com> (raw) In-Reply-To: <1550773093-13349-1-git-send-email-aisheng.dong@nxp.com> Add lsio lpcg clocks Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> --- arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi | 107 +++++++++++++++++++++++- 1 file changed, 106 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi index 5c4c2fb..cf9223d 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi @@ -132,7 +132,112 @@ lsio_subsys: bus@5d000000 { clock-output-names = "pwm7_clk"; }; - lsio_lpcg: clock-controller@5d400000 { + /* LPCG clocks */ + pwm0_lpcg: clock-controller@5d400000 { + reg = <0x5d400000 0x10000>; + #clock-cells = <1>; + clocks = <&pwm0_clk>, <&pwm0_clk>, <&pwm0_clk>, + <&lsio_bus_clk>, <&pwm0_clk>; + bit-offset = <0 4 16 20 24>; + clock-output-names = "pwm0_lpcg_ipg_clk", + "pwm0_lpcg_ipg_hf_clk", + "pwm0_lpcg_ipg_s_clk", + "pwm0_lpcg_ipg_slv_clk", + "pwm0_lpcg_ipg_mstr_clk"; + }; + + pwm1_lpcg: clock-controller@5d410000 { + reg = <0x5d410000 0x10000>; + #clock-cells = <1>; + clocks = <&pwm1_clk>, <&pwm1_clk>, <&pwm1_clk>, + <&lsio_bus_clk>, <&pwm1_clk>; + bit-offset = <0 4 16 20 24>; + clock-output-names = "pwm1_lpcg_ipg_clk", + "pwm1_lpcg_ipg_hf_clk", + "pwm1_lpcg_ipg_s_clk", + "pwm1_lpcg_ipg_slv_clk", + "pwm1_lpcg_ipg_mstr_clk"; + }; + + pwm2_lpcg: clock-controller@5d420000 { + reg = <0x5d420000 0x10000>; + #clock-cells = <1>; + clocks = <&pwm2_clk>, <&pwm2_clk>, <&pwm2_clk>, + <&lsio_bus_clk>, <&pwm2_clk>; + bit-offset = <0 4 16 20 24>; + clock-output-names = "pwm2_lpcg_ipg_clk", + "pwm2_lpcg_ipg_hf_clk", + "pwm2_lpcg_ipg_s_clk", + "pwm2_lpcg_ipg_slv_clk", + "pwm2_lpcg_ipg_mstr_clk"; + }; + + pwm3_lpcg: clock-controller@5d430000 { + reg = <0x5d430000 0x10000>; + #clock-cells = <1>; + clocks = <&pwm3_clk>, <&pwm3_clk>, <&pwm3_clk>, + <&lsio_bus_clk>, <&pwm3_clk>; + bit-offset = <0 4 16 20 24>; + clock-output-names = "pwm3_lpcg_ipg_clk", + "pwm3_lpcg_ipg_hf_clk", + "pwm3_lpcg_ipg_s_clk", + "pwm3_lpcg_ipg_slv_clk", + "pwm3_lpcg_ipg_mstr_clk"; + }; + + pwm4_lpcg: clock-controller@5d440000 { + reg = <0x5d440000 0x10000>; + #clock-cells = <1>; + clocks = <&pwm4_clk>, <&pwm4_clk>, <&pwm4_clk>, + <&lsio_bus_clk>, <&pwm4_clk>; + bit-offset = <0 4 16 20 24>; + clock-output-names = "pwm4_lpcg_ipg_clk", + "pwm4_lpcg_ipg_hf_clk", + "pwm4_lpcg_ipg_s_clk", + "pwm4_lpcg_ipg_slv_clk", + "pwm4_lpcg_ipg_mstr_clk"; + }; + + pwm5_lpcg: clock-controller@5d450000 { + reg = <0x5d450000 0x10000>; + #clock-cells = <1>; + clocks = <&pwm5_clk>, <&pwm5_clk>, <&pwm5_clk>, + <&lsio_bus_clk>, <&pwm5_clk>; + bit-offset = <0 4 16 20 24>; + clock-output-names = "pwm5_lpcg_ipg_clk", + "pwm5_lpcg_ipg_hf_clk", + "pwm5_lpcg_ipg_s_clk", + "pwm5_lpcg_ipg_slv_clk", + "pwm5_lpcg_ipg_mstr_clk"; + }; + + pwm6_lpcg: clock-controller@5d460000 { + reg = <0x5d460000 0x10000>; + #clock-cells = <1>; + clocks = <&pwm6_clk>, <&pwm6_clk>, <&pwm6_clk>, + <&lsio_bus_clk>, <&pwm6_clk>; + bit-offset = <0 4 16 20 24>; + clock-output-names = "pwm6_lpcg_ipg_clk", + "pwm6_lpcg_ipg_hf_clk", + "pwm6_lpcg_ipg_s_clk", + "pwm6_lpcg_ipg_slv_clk", + "pwm6_lpcg_ipg_mstr_clk"; + }; + + pwm7_lpcg: clock-controller@5d470000 { + reg = <0x5d470000 0x10000>; + #clock-cells = <1>; + clocks = <&pwm7_clk>, <&pwm7_clk>, <&pwm7_clk>, + <&lsio_bus_clk>, <&pwm7_clk>; + bit-offset = <0 4 16 20 24>; + clock-output-names = "pwm7_lpcg_ipg_clk", + "pwm7_lpcg_ipg_hf_clk", + "pwm7_lpcg_ipg_s_clk", + "pwm7_lpcg_ipg_slv_clk", + "pwm7_lpcg_ipg_mstr_clk"; + }; + + lsio_lpcg: clock-controller-legacy@5d400000 { reg = <0x5d400000 0x400000>; #clock-cells = <1>; }; -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-02-21 18:25 UTC|newest] Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-02-21 18:24 [PATCH 00/14] arm64: dts: imx8: architecture improvement and adding imx8qm support Aisheng Dong 2019-02-21 18:24 ` [PATCH 01/14] arm64: dts: imx8qxp: orginize dts in subsystems Aisheng Dong 2019-02-21 18:24 ` Aisheng Dong 2019-04-02 4:16 ` Shawn Guo 2019-04-02 4:16 ` Shawn Guo 2019-04-02 14:38 ` Aisheng Dong 2019-04-02 14:38 ` Aisheng Dong 2019-02-21 18:24 ` [PATCH 02/14] arm64: dts: imx8: add lsio scu clocks Aisheng Dong 2019-02-21 18:24 ` Aisheng Dong 2019-02-21 18:25 ` [PATCH 03/14] arm64: dts: imx8: add conn " Aisheng Dong 2019-02-21 18:25 ` Aisheng Dong 2019-02-21 18:25 ` [PATCH 04/14] arm64: dts: imx8: add adma " Aisheng Dong 2019-02-21 18:25 ` Aisheng Dong 2019-02-21 18:25 ` Aisheng Dong [this message] 2019-02-21 18:25 ` [PATCH 05/14] arm64: dts: imx8: add lsio lpcg clocks Aisheng Dong 2019-02-21 18:25 ` [PATCH 06/14] arm64: dts: imx8: add conn " Aisheng Dong 2019-02-21 18:25 ` Aisheng Dong 2019-02-21 18:25 ` [PATCH 07/14] arm64: dts: imx8: add adma " Aisheng Dong 2019-02-21 18:25 ` Aisheng Dong 2019-02-21 18:25 ` [PATCH 08/14] arm64: dts: imx8: switch to new clock binding Aisheng Dong 2019-02-21 18:25 ` Aisheng Dong 2019-02-21 18:25 ` [PATCH 09/14] arm64: dts: imx8qm: add lsio ss support Aisheng Dong 2019-02-21 18:25 ` Aisheng Dong 2019-02-21 18:25 ` [PATCH 10/14] arm64: dts: imx8qm: add conn " Aisheng Dong 2019-02-21 18:25 ` Aisheng Dong 2019-02-21 18:25 ` [PATCH 11/14] arm64: dts: imx8: split adma ss into dma and audio ss Aisheng Dong 2019-02-21 18:25 ` [PATCH 12/14] arm64: dts: imx8qm: add dma ss support Aisheng Dong 2019-02-21 18:25 ` Aisheng Dong 2019-02-21 18:25 ` [PATCH 13/14] arm64: dts: imx: add imx8qm common dts file Aisheng Dong 2019-02-21 18:25 ` Aisheng Dong 2019-02-21 18:25 ` [PATCH 14/14] arm64: dts: imx: add imx8qm mek support Aisheng Dong 2019-02-21 18:25 ` Aisheng Dong 2019-03-26 13:16 ` [PATCH 00/14] arm64: dts: imx8: architecture improvement and adding imx8qm support Aisheng Dong 2019-04-02 4:28 ` Shawn Guo 2019-04-02 14:42 ` Aisheng Dong
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