All of lore.kernel.org
 help / color / mirror / Atom feed
From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: adrian.hunter@intel.com, ulf.hansson@linaro.org,
	robh+dt@kernel.org, mark.rutland@arm.com, riteshh@codeaurora.org
Cc: thierry.reding@gmail.com, jonathanh@nvidia.com, anrao@nvidia.com,
	linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
	Sowjanya Komatineni <skomatineni@nvidia.com>
Subject: [PATCH V1 02/11] mmc: sdhci: allow host to specify maximum tuning loops
Date: Fri, 1 Mar 2019 21:20:16 -0800	[thread overview]
Message-ID: <1551504025-3541-2-git-send-email-skomatineni@nvidia.com> (raw)
In-Reply-To: <1551504025-3541-1-git-send-email-skomatineni@nvidia.com>

As per the Host Controller Standard Specification Version 4.20,
limitation of tuning iteration count is removed as PLL locking
time can be longer than UHS-1 tuning due to larger PVT fluctuation
and it will result in increase of tuning iteration to complete the
tuning.

This patch creates a hook get_max_tuning_loop_count to allow hosts
to specify maximum tuning iterations and updates execute_tuning
to use the specified maximum tuning iteration count.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
 drivers/mmc/host/sdhci.c | 7 +++++--
 drivers/mmc/host/sdhci.h | 1 +
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index a8141ff9be03..e9e919218006 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -2366,12 +2366,15 @@ EXPORT_SYMBOL_GPL(sdhci_send_tuning);
 static int __sdhci_execute_tuning(struct sdhci_host *host, u32 opcode)
 {
 	int i;
+	int tuning_loop_count = MAX_TUNING_LOOP;
 
+	if (host->ops->get_max_tuning_loop_count)
+		tuning_loop_count = host->ops->get_max_tuning_loop_count(host);
 	/*
 	 * Issue opcode repeatedly till Execute Tuning is set to 0 or the number
-	 * of loops reaches 40 times.
+	 * of loops reaches tuning loop count.
 	 */
-	for (i = 0; i < MAX_TUNING_LOOP; i++) {
+	for (i = 0; i < tuning_loop_count; i++) {
 		u16 ctrl;
 
 		sdhci_send_tuning(host, opcode);
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 01002cba1359..c80e0d6f9b10 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -638,6 +638,7 @@ struct sdhci_ops {
 	unsigned int    (*get_ro)(struct sdhci_host *host);
 	void		(*reset)(struct sdhci_host *host, u8 mask);
 	int	(*platform_execute_tuning)(struct sdhci_host *host, u32 opcode);
+	int	(*get_max_tuning_loop_count)(struct sdhci_host *host);
 	void	(*set_uhs_signaling)(struct sdhci_host *host, unsigned int uhs);
 	void	(*hw_reset)(struct sdhci_host *host);
 	void    (*adma_workaround)(struct sdhci_host *host, u32 intmask);
-- 
2.7.4

WARNING: multiple messages have this Message-ID (diff)
From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: <adrian.hunter@intel.com>, <ulf.hansson@linaro.org>,
	<robh+dt@kernel.org>, <mark.rutland@arm.com>,
	<riteshh@codeaurora.org>
Cc: <thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
	<anrao@nvidia.com>, <linux-tegra@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <linux-mmc@vger.kernel.org>,
	<devicetree@vger.kernel.org>,
	Sowjanya Komatineni <skomatineni@nvidia.com>
Subject: [PATCH V1 02/11] mmc: sdhci: allow host to specify maximum tuning loops
Date: Fri, 1 Mar 2019 21:20:16 -0800	[thread overview]
Message-ID: <1551504025-3541-2-git-send-email-skomatineni@nvidia.com> (raw)
In-Reply-To: <1551504025-3541-1-git-send-email-skomatineni@nvidia.com>

As per the Host Controller Standard Specification Version 4.20,
limitation of tuning iteration count is removed as PLL locking
time can be longer than UHS-1 tuning due to larger PVT fluctuation
and it will result in increase of tuning iteration to complete the
tuning.

This patch creates a hook get_max_tuning_loop_count to allow hosts
to specify maximum tuning iterations and updates execute_tuning
to use the specified maximum tuning iteration count.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
 drivers/mmc/host/sdhci.c | 7 +++++--
 drivers/mmc/host/sdhci.h | 1 +
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index a8141ff9be03..e9e919218006 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -2366,12 +2366,15 @@ EXPORT_SYMBOL_GPL(sdhci_send_tuning);
 static int __sdhci_execute_tuning(struct sdhci_host *host, u32 opcode)
 {
 	int i;
+	int tuning_loop_count = MAX_TUNING_LOOP;
 
+	if (host->ops->get_max_tuning_loop_count)
+		tuning_loop_count = host->ops->get_max_tuning_loop_count(host);
 	/*
 	 * Issue opcode repeatedly till Execute Tuning is set to 0 or the number
-	 * of loops reaches 40 times.
+	 * of loops reaches tuning loop count.
 	 */
-	for (i = 0; i < MAX_TUNING_LOOP; i++) {
+	for (i = 0; i < tuning_loop_count; i++) {
 		u16 ctrl;
 
 		sdhci_send_tuning(host, opcode);
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 01002cba1359..c80e0d6f9b10 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -638,6 +638,7 @@ struct sdhci_ops {
 	unsigned int    (*get_ro)(struct sdhci_host *host);
 	void		(*reset)(struct sdhci_host *host, u8 mask);
 	int	(*platform_execute_tuning)(struct sdhci_host *host, u32 opcode);
+	int	(*get_max_tuning_loop_count)(struct sdhci_host *host);
 	void	(*set_uhs_signaling)(struct sdhci_host *host, unsigned int uhs);
 	void	(*hw_reset)(struct sdhci_host *host);
 	void    (*adma_workaround)(struct sdhci_host *host, u32 intmask);
-- 
2.7.4


  reply	other threads:[~2019-03-02  5:20 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-02  5:20 [PATCH V1 01/11] mmc: tegra: fix ddr signaling for non-ddr modes Sowjanya Komatineni
2019-03-02  5:20 ` Sowjanya Komatineni
2019-03-02  5:20 ` Sowjanya Komatineni [this message]
2019-03-02  5:20   ` [PATCH V1 02/11] mmc: sdhci: allow host to specify maximum tuning loops Sowjanya Komatineni
2019-03-08 11:50   ` Adrian Hunter
2019-03-02  5:20 ` [PATCH V1 03/11] mmc: sdhci: add support for post tuning process Sowjanya Komatineni
2019-03-02  5:20   ` Sowjanya Komatineni
2019-03-08 11:55   ` Adrian Hunter
2019-03-02  5:20 ` [PATCH V1 04/11] mmc: tegra: update hw " Sowjanya Komatineni
2019-03-02  5:20   ` Sowjanya Komatineni
2019-03-08 12:07   ` Adrian Hunter
2019-03-02  5:20 ` [PATCH V1 05/11] dt-bindings: mmc: tegra: document Tegra194 compatible string Sowjanya Komatineni
2019-03-02  5:20   ` Sowjanya Komatineni
2019-03-02  5:20 ` [PATCH V1 06/11] arm64: tegra: fix default tap and trim values Sowjanya Komatineni
2019-03-02  5:20   ` Sowjanya Komatineni
2019-03-02  5:20 ` [PATCH V1 07/11] mmc: cqhci: add quirk for setting DCMD CMD_TIMING Sowjanya Komatineni
2019-03-02  5:20   ` Sowjanya Komatineni
2019-03-06 13:00   ` Adrian Hunter
2019-03-07  2:43     ` Ritesh Harjani
2019-03-07 18:16       ` Sowjanya Komatineni
2019-03-08 12:29         ` Adrian Hunter
2019-03-09  5:14           ` Sowjanya Komatineni
2019-03-13  2:31         ` Ritesh Harjani
2019-03-13  9:56           ` Hunter, Adrian
2019-03-13 15:47             ` Sowjanya Komatineni
2019-03-02  5:20 ` [PATCH V1 08/11] mmc: tegra: add Tegra186 WAR for CQE Sowjanya Komatineni
2019-03-02  5:20   ` Sowjanya Komatineni
2019-03-02  5:20 ` [PATCH V1 09/11] mmc: cqhci: add CQHCI_SSC1 register CBC field mask Sowjanya Komatineni
2019-03-02  5:20   ` Sowjanya Komatineni
2019-03-08 12:14   ` Adrian Hunter
2019-03-02  5:20 ` [PATCH V1 10/11] mmc: tegra: fix CQE resume sequence Sowjanya Komatineni
2019-03-02  5:20   ` Sowjanya Komatineni
2019-03-08 12:59   ` Adrian Hunter
2019-03-02  5:20 ` [PATCH V1 11/11] arm64: tegra: enable command queue for tegra186 sdmmc4 Sowjanya Komatineni
2019-03-02  5:20   ` Sowjanya Komatineni
2019-03-07 21:31 ` [PATCH V1 01/11] mmc: tegra: fix ddr signaling for non-ddr modes Jon Hunter
2019-03-07 21:31   ` Jon Hunter
2019-03-08 11:44 ` Adrian Hunter

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1551504025-3541-2-git-send-email-skomatineni@nvidia.com \
    --to=skomatineni@nvidia.com \
    --cc=adrian.hunter@intel.com \
    --cc=anrao@nvidia.com \
    --cc=devicetree@vger.kernel.org \
    --cc=jonathanh@nvidia.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mmc@vger.kernel.org \
    --cc=linux-tegra@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=riteshh@codeaurora.org \
    --cc=robh+dt@kernel.org \
    --cc=thierry.reding@gmail.com \
    --cc=ulf.hansson@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.