[U-Boot] [RESEND][PATCH v1 0/4] usb: dwc2_udc_otg: Add tx_fifo_sz array support

[U-Boot] [RESEND][PATCH v1 0/4] usb: dwc2_udc_otg: Add tx_fifo_sz array support

[Patrice Chotard]

dwc2 bindings specifies that g-tx-fifo-size is an array of tx fifo size
for endpoint (except ep0) as shown below:
  - g-tx-fifo-size = <256 128 128 64 64 32>;

Current implementation apply the same fifo size to all tx fifo.
In order to apply different fifo size, introduce a tx_fifo_sz array
filled with DT g-tx-fifo-size entry.

All DWC2 variant doesn't implement 16 hardware endpoint as currently
hardcoded. This information can be retrieved from HWCFG4 register. This series
is also addressing this point.

This series adds:
  - Read max hardware endpoint from HWCFG4 register
  - Add tx fifo size array support
  _ Update stm32mp1 board and DT to use tx_fifo_sz array


Patrice Chotard (4):
  usb: dwc2_udc_otg: Read MAX_HW_ENDPOINT from HWCFG4 register
  usb: dwc2_udc_otg: Add tx_fifo_sz array support
  board: stm32mp1: Add tx_fifo_sz_array support
  ARM: dts: stm32: Remove g-tx-fifo-size from stm32mp157c-ev1-u-boot

 arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi |  4 ----
 board/st/stm32mp1/stm32mp1.c             | 11 +++++++++--
 drivers/usb/gadget/dwc2_udc_otg.c        | 18 ++++++++++++++++--
 drivers/usb/gadget/dwc2_udc_otg_priv.h   |  1 -
 drivers/usb/gadget/dwc2_udc_otg_regs.h   | 17 ++++++++++++-----
 include/usb/dwc2_udc.h                   |  6 ++++++
 6 files changed, 43 insertions(+), 14 deletions(-)

-- 
1.9.1

[U-Boot] [RESEND][PATCH v1 1/4] usb: dwc2_udc_otg: Read MAX_HW_ENDPOINT from HWCFG4 register

[Patrice Chotard]

Some DWC2 ip variant doesn't use 16 hardware endpoint as hardcoded
in the driver. Bits INEps [29:26] of HWCFG4 register allows to get
this information.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---

 drivers/usb/gadget/dwc2_udc_otg.c      |  7 ++++++-
 drivers/usb/gadget/dwc2_udc_otg_priv.h |  1 -
 drivers/usb/gadget/dwc2_udc_otg_regs.h | 17 ++++++++++++-----
 3 files changed, 18 insertions(+), 7 deletions(-)

diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
index 3c7ad033e3f7..3f0a012949ec 100644
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -400,6 +400,7 @@ static void reconfig_usbd(struct dwc2_udc *dev)
 	unsigned int uTemp = writel(CORE_SOFT_RESET, &reg->grstctl);
 	uint32_t dflt_gusbcfg;
 	uint32_t rx_fifo_sz, tx_fifo_sz, np_tx_fifo_sz;
+	u32 max_hw_ep;
 
 	debug("Reseting OTG controller\n");
 
@@ -482,7 +483,11 @@ static void reconfig_usbd(struct dwc2_udc *dev)
 	writel((np_tx_fifo_sz << 16) | rx_fifo_sz,
 	       &reg->gnptxfsiz);
 
-	for (i = 1; i < DWC2_MAX_HW_ENDPOINTS; i++)
+	/* retrieve the number of TX fifo */
+	max_hw_ep = (readl(&reg->ghwcfg4) & GHWCFG4_NUM_IN_EPS_MASK) >>
+		    GHWCFG4_NUM_IN_EPS_SHIFT;
+
+	for (i = 1; i < max_hw_ep; i++)
 		writel((rx_fifo_sz + np_tx_fifo_sz + tx_fifo_sz*(i-1)) |
 			tx_fifo_sz << 16, &reg->dieptxf[i-1]);
 
diff --git a/drivers/usb/gadget/dwc2_udc_otg_priv.h b/drivers/usb/gadget/dwc2_udc_otg_priv.h
index aaa90187fb76..e72b22ac61e1 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_priv.h
+++ b/drivers/usb/gadget/dwc2_udc_otg_priv.h
@@ -23,7 +23,6 @@
 #define EP_FIFO_SIZE2		1024
 /* ep0-control, ep1in-bulk, ep2out-bulk, ep3in-int */
 #define DWC2_MAX_ENDPOINTS	4
-#define DWC2_MAX_HW_ENDPOINTS	16
 
 #define WAIT_FOR_SETUP          0
 #define DATA_STATE_XMIT         1
diff --git a/drivers/usb/gadget/dwc2_udc_otg_regs.h b/drivers/usb/gadget/dwc2_udc_otg_regs.h
index a1829b3fd121..16be64c727ca 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_regs.h
+++ b/drivers/usb/gadget/dwc2_udc_otg_regs.h
@@ -60,22 +60,24 @@ struct dwc2_usbotg_reg {
 	u32 grxstsp; /* Receive Status Debug Pop/Status Pop */
 	u32 grxfsiz; /* Receive FIFO Size */
 	u32 gnptxfsiz; /* Non-Periodic Transmit FIFO Size */
-	u8  res1[216];
+	u8  res1[36];
+	u32 ghwcfg4; /* User HW Config4 */
+	u8  res2[176];
 	u32 dieptxf[15]; /* Device Periodic Transmit FIFO size register */
-	u8  res2[1728];
+	u8  res3[1728];
 	/* Device Configuration */
 	u32 dcfg; /* Device Configuration Register */
 	u32 dctl; /* Device Control */
 	u32 dsts; /* Device Status */
-	u8  res3[4];
+	u8  res4[4];
 	u32 diepmsk; /* Device IN Endpoint Common Interrupt Mask */
 	u32 doepmsk; /* Device OUT Endpoint Common Interrupt Mask */
 	u32 daint; /* Device All Endpoints Interrupt */
 	u32 daintmsk; /* Device All Endpoints Interrupt Mask */
-	u8  res4[224];
+	u8  res5[224];
 	struct dwc2_dev_in_endp in_endp[16];
 	struct dwc2_dev_out_endp out_endp[16];
-	u8  res5[768];
+	u8  res6[768];
 	struct ep_fifo ep[16];
 };
 
@@ -269,4 +271,9 @@ struct dwc2_usbotg_reg {
 /* Device ALL Endpoints Interrupt Register (DAINT) */
 #define DAINT_IN_EP_INT(x)                        (x << 0)
 #define DAINT_OUT_EP_INT(x)                       (x << 16)
+
+/* User HW Config4 */
+#define GHWCFG4_NUM_IN_EPS_MASK		(0xf << 26)
+#define GHWCFG4_NUM_IN_EPS_SHIFT	26
+
 #endif
-- 
1.9.1

[U-Boot] [RESEND][PATCH v1 2/4] usb: dwc2_udc_otg: Add tx_fifo_sz array support

[Patrice Chotard]

All TX fifo size can be different, add tx_fifo_sz_array[]
into dwc2_plat_otg_data to be able to set them.

tx_fifo_sz_array[] is 17 Bytes long and can contains max 16
tx fifo size (synopsys IP supports max 16 IN endpoints).
First entry of tx_fifo_sz_array[] is the number of valid
fifo size the array contains.

In case of tx_fifo_sz_array[] doesn't contains the same
number of element than max hardware endpoint, display
a warning message.

Compatibility with board which doesn't use tx_fifo_sz_array[]
(Rockchip rk322x/rk3128/rv1108/rk3288/rk3036) is kept.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---

 drivers/usb/gadget/dwc2_udc_otg.c | 13 +++++++++++--
 include/usb/dwc2_udc.h            |  6 ++++++
 2 files changed, 17 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
index 3f0a012949ec..b9e4f0b5193d 100644
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -401,6 +401,7 @@ static void reconfig_usbd(struct dwc2_udc *dev)
 	uint32_t dflt_gusbcfg;
 	uint32_t rx_fifo_sz, tx_fifo_sz, np_tx_fifo_sz;
 	u32 max_hw_ep;
+	int pdata_hw_ep;
 
 	debug("Reseting OTG controller\n");
 
@@ -486,11 +487,19 @@ static void reconfig_usbd(struct dwc2_udc *dev)
 	/* retrieve the number of TX fifo */
 	max_hw_ep = (readl(&reg->ghwcfg4) & GHWCFG4_NUM_IN_EPS_MASK) >>
 		    GHWCFG4_NUM_IN_EPS_SHIFT;
+	pdata_hw_ep = dev->pdata->tx_fifo_sz_array[DWC2_SIZE_NB_OFFS];
 
-	for (i = 1; i < max_hw_ep; i++)
+	if (pdata_hw_ep && max_hw_ep != pdata_hw_ep)
+		pr_warn("Got %d hw endpoint and %d tx-fifo-size in array !!\n",
+			max_hw_ep, pdata_hw_ep);
+
+	for (i = 1; i < max_hw_ep; i++) {
+		if (pdata_hw_ep)
+			tx_fifo_sz = dev->pdata->tx_fifo_sz_array[i +
+				     DWC2_SIZE_OFFS];
 		writel((rx_fifo_sz + np_tx_fifo_sz + tx_fifo_sz*(i-1)) |
 			tx_fifo_sz << 16, &reg->dieptxf[i-1]);
-
+	}
 	/* Flush the RX FIFO */
 	writel(RX_FIFO_FLUSH, &reg->grstctl);
 	while (readl(&reg->grstctl) & RX_FIFO_FLUSH)
diff --git a/include/usb/dwc2_udc.h b/include/usb/dwc2_udc.h
index 4068de045dc2..871aecdca322 100644
--- a/include/usb/dwc2_udc.h
+++ b/include/usb/dwc2_udc.h
@@ -10,6 +10,10 @@
 
 #define PHY0_SLEEP              (1 << 5)
 
+#define DWC2_MAX_HW_ENDPOINTS	16
+#define DWC2_SIZE_NB_OFFS	0
+#define DWC2_SIZE_OFFS		1
+
 struct dwc2_plat_otg_data {
 	void		*priv;
 	int		phy_of_node;
@@ -22,6 +26,8 @@ struct dwc2_plat_otg_data {
 	unsigned int	rx_fifo_sz;
 	unsigned int	np_tx_fifo_sz;
 	unsigned int	tx_fifo_sz;
+	/* [0] number of element, [1..17] tx_fifo_sz (max 16 endpoints)*/
+	unsigned int	tx_fifo_sz_array[DWC2_MAX_HW_ENDPOINTS + 1];
 };
 
 int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata);
-- 
1.9.1

[U-Boot] [RESEND][PATCH v1 3/4] board: stm32mp1: Add tx_fifo_sz_array support

[Patrice Chotard]

Allows to use an array of tx-fifo-size defined in device tree
as following:
   g-tx-fifo-size = <128 128 64 64 64 64 32 32>;

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---

 board/st/stm32mp1/stm32mp1.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index 54feca0ecff5..81c080ff3199 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -42,6 +42,7 @@ int board_usb_init(int index, enum usb_init_type init)
 	int node;
 	int phy_provider;
 	int ret;
+	int count;
 
 	/* find the usb otg node */
 	node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2");
@@ -138,8 +139,14 @@ int board_usb_init(int index, enum usb_init_type init)
 						     "g-rx-fifo-size", 0);
 	stm32mp_otg_data.np_tx_fifo_sz = fdtdec_get_int(blob, node,
 							"g-np-tx-fifo-size", 0);
-	stm32mp_otg_data.tx_fifo_sz = fdtdec_get_int(blob, node,
-						     "g-tx-fifo-size", 0);
+
+	count = fdtdec_get_int_array_count(blob, node, "g-tx-fifo-size",
+			&stm32mp_otg_data.tx_fifo_sz_array[DWC2_SIZE_OFFS],
+			ARRAY_SIZE(stm32mp_otg_data.tx_fifo_sz_array));
+
+	if (count != -FDT_ERR_NOTFOUND)
+		stm32mp_otg_data.tx_fifo_sz_array[DWC2_SIZE_NB_OFFS] = count;
+
 	/* Enable voltage level detector */
 	if (!(fdtdec_parse_phandle_with_args(blob, node, "usb33d-supply",
 					     NULL, 0, 0, &args))) {
-- 
1.9.1

[U-Boot] [RESEND][PATCH v1 4/4] ARM: dts: stm32: Remove g-tx-fifo-size from stm32mp157c-ev1-u-boot

[Patrice Chotard]

As dwc2_udc_otg driver has been updated and is able to manage
an array of tx-fifo-size, g-tx-fifo-size doesn't need to be
overloaded anymore in u-boot DT file.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---

 arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi
index 30b173478c6c..2edc5be85e11 100644
--- a/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi
@@ -25,10 +25,6 @@
 	regulator-always-on;
 };
 
-&usbotg_hs {
-	g-tx-fifo-size = <576>;
-};
-
 /* SPL part **************************************/
 &qspi {
 	u-boot,dm-spl;
-- 
1.9.1

[U-Boot] [RESEND][PATCH v1 2/4] usb: dwc2_udc_otg: Add tx_fifo_sz array support

[Marek Vasut]

On 3/14/19 11:51 AM, Patrice Chotard wrote:
> All TX fifo size can be different, add tx_fifo_sz_array[]
> into dwc2_plat_otg_data to be able to set them.
> 
> tx_fifo_sz_array[] is 17 Bytes long and can contains max 16
> tx fifo size (synopsys IP supports max 16 IN endpoints).
> First entry of tx_fifo_sz_array[] is the number of valid
> fifo size the array contains.
> 
> In case of tx_fifo_sz_array[] doesn't contains the same
> number of element than max hardware endpoint, display
> a warning message.
> 
> Compatibility with board which doesn't use tx_fifo_sz_array[]
> (Rockchip rk322x/rk3128/rv1108/rk3288/rk3036) is kept.
> 
> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
> ---
> 
>  drivers/usb/gadget/dwc2_udc_otg.c | 13 +++++++++++--
>  include/usb/dwc2_udc.h            |  6 ++++++
>  2 files changed, 17 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
> index 3f0a012949ec..b9e4f0b5193d 100644
> --- a/drivers/usb/gadget/dwc2_udc_otg.c
> +++ b/drivers/usb/gadget/dwc2_udc_otg.c
> @@ -401,6 +401,7 @@ static void reconfig_usbd(struct dwc2_udc *dev)
>  	uint32_t dflt_gusbcfg;
>  	uint32_t rx_fifo_sz, tx_fifo_sz, np_tx_fifo_sz;
>  	u32 max_hw_ep;
> +	int pdata_hw_ep;
>  
>  	debug("Reseting OTG controller\n");
>  
> @@ -486,11 +487,19 @@ static void reconfig_usbd(struct dwc2_udc *dev)
>  	/* retrieve the number of TX fifo */
>  	max_hw_ep = (readl(&reg->ghwcfg4) & GHWCFG4_NUM_IN_EPS_MASK) >>
>  		    GHWCFG4_NUM_IN_EPS_SHIFT;
> +	pdata_hw_ep = dev->pdata->tx_fifo_sz_array[DWC2_SIZE_NB_OFFS];
>  
> -	for (i = 1; i < max_hw_ep; i++)
> +	if (pdata_hw_ep && max_hw_ep != pdata_hw_ep)
> +		pr_warn("Got %d hw endpoint and %d tx-fifo-size in array !!\n",
> +			max_hw_ep, pdata_hw_ep);

dev_warn() ? Also reword the warning a bit, it's not clear to me what it
warns about.

> +
> +	for (i = 1; i < max_hw_ep; i++) {
> +		if (pdata_hw_ep)
> +			tx_fifo_sz = dev->pdata->tx_fifo_sz_array[i +
> +				     DWC2_SIZE_OFFS];
>  		writel((rx_fifo_sz + np_tx_fifo_sz + tx_fifo_sz*(i-1)) |
>  			tx_fifo_sz << 16, &reg->dieptxf[i-1]);
> -
> +	}
>  	/* Flush the RX FIFO */
>  	writel(RX_FIFO_FLUSH, &reg->grstctl);
>  	while (readl(&reg->grstctl) & RX_FIFO_FLUSH)
> diff --git a/include/usb/dwc2_udc.h b/include/usb/dwc2_udc.h
> index 4068de045dc2..871aecdca322 100644
> --- a/include/usb/dwc2_udc.h
> +++ b/include/usb/dwc2_udc.h
> @@ -10,6 +10,10 @@
>  
>  #define PHY0_SLEEP              (1 << 5)
>  
> +#define DWC2_MAX_HW_ENDPOINTS	16
> +#define DWC2_SIZE_NB_OFFS	0
> +#define DWC2_SIZE_OFFS		1
> +
>  struct dwc2_plat_otg_data {
>  	void		*priv;
>  	int		phy_of_node;
> @@ -22,6 +26,8 @@ struct dwc2_plat_otg_data {
>  	unsigned int	rx_fifo_sz;
>  	unsigned int	np_tx_fifo_sz;
>  	unsigned int	tx_fifo_sz;
> +	/* [0] number of element, [1..17] tx_fifo_sz (max 16 endpoints)*/

Just create a separate entry for the array size, please.
Could be unsigned char too.

> +	unsigned int	tx_fifo_sz_array[DWC2_MAX_HW_ENDPOINTS + 1];
>  };
>  
>  int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata);
> 


-- 
Best regards,
Marek Vasut

[U-Boot] [RESEND][PATCH v1 3/4] board: stm32mp1: Add tx_fifo_sz_array support

[Marek Vasut]

On 3/14/19 11:51 AM, Patrice Chotard wrote:
> Allows to use an array of tx-fifo-size defined in device tree
> as following:
>    g-tx-fifo-size = <128 128 64 64 64 64 32 32>;
> 
> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
> ---
> 
>  board/st/stm32mp1/stm32mp1.c | 11 +++++++++--
>  1 file changed, 9 insertions(+), 2 deletions(-)
> 
> diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
> index 54feca0ecff5..81c080ff3199 100644
> --- a/board/st/stm32mp1/stm32mp1.c
> +++ b/board/st/stm32mp1/stm32mp1.c
> @@ -42,6 +42,7 @@ int board_usb_init(int index, enum usb_init_type init)
>  	int node;
>  	int phy_provider;
>  	int ret;
> +	int count;
>  
>  	/* find the usb otg node */
>  	node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2");
> @@ -138,8 +139,14 @@ int board_usb_init(int index, enum usb_init_type init)
>  						     "g-rx-fifo-size", 0);
>  	stm32mp_otg_data.np_tx_fifo_sz = fdtdec_get_int(blob, node,
>  							"g-np-tx-fifo-size", 0);
> -	stm32mp_otg_data.tx_fifo_sz = fdtdec_get_int(blob, node,
> -						     "g-tx-fifo-size", 0);
> +
> +	count = fdtdec_get_int_array_count(blob, node, "g-tx-fifo-size",
> +			&stm32mp_otg_data.tx_fifo_sz_array[DWC2_SIZE_OFFS],
> +			ARRAY_SIZE(stm32mp_otg_data.tx_fifo_sz_array));
> +
> +	if (count != -FDT_ERR_NOTFOUND)
> +		stm32mp_otg_data.tx_fifo_sz_array[DWC2_SIZE_NB_OFFS] = count;

This should be in the driver , not board code.

>  	/* Enable voltage level detector */
>  	if (!(fdtdec_parse_phandle_with_args(blob, node, "usb33d-supply",
>  					     NULL, 0, 0, &args))) {
> 


-- 
Best regards,
Marek Vasut

[U-Boot] [RESEND][PATCH v1 2/4] usb: dwc2_udc_otg: Add tx_fifo_sz array support

[Patrice CHOTARD]

Hi Marek

On 3/14/19 12:59 PM, Marek Vasut wrote:
> On 3/14/19 11:51 AM, Patrice Chotard wrote:
>> All TX fifo size can be different, add tx_fifo_sz_array[]
>> into dwc2_plat_otg_data to be able to set them.
>>
>> tx_fifo_sz_array[] is 17 Bytes long and can contains max 16
>> tx fifo size (synopsys IP supports max 16 IN endpoints).
>> First entry of tx_fifo_sz_array[] is the number of valid
>> fifo size the array contains.
>>
>> In case of tx_fifo_sz_array[] doesn't contains the same
>> number of element than max hardware endpoint, display
>> a warning message.
>>
>> Compatibility with board which doesn't use tx_fifo_sz_array[]
>> (Rockchip rk322x/rk3128/rv1108/rk3288/rk3036) is kept.
>>
>> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
>> ---
>>
>>  drivers/usb/gadget/dwc2_udc_otg.c | 13 +++++++++++--
>>  include/usb/dwc2_udc.h            |  6 ++++++
>>  2 files changed, 17 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
>> index 3f0a012949ec..b9e4f0b5193d 100644
>> --- a/drivers/usb/gadget/dwc2_udc_otg.c
>> +++ b/drivers/usb/gadget/dwc2_udc_otg.c
>> @@ -401,6 +401,7 @@ static void reconfig_usbd(struct dwc2_udc *dev)
>>  	uint32_t dflt_gusbcfg;
>>  	uint32_t rx_fifo_sz, tx_fifo_sz, np_tx_fifo_sz;
>>  	u32 max_hw_ep;
>> +	int pdata_hw_ep;
>>  
>>  	debug("Reseting OTG controller\n");
>>  
>> @@ -486,11 +487,19 @@ static void reconfig_usbd(struct dwc2_udc *dev)
>>  	/* retrieve the number of TX fifo */
>>  	max_hw_ep = (readl(&reg->ghwcfg4) & GHWCFG4_NUM_IN_EPS_MASK) >>
>>  		    GHWCFG4_NUM_IN_EPS_SHIFT;
>> +	pdata_hw_ep = dev->pdata->tx_fifo_sz_array[DWC2_SIZE_NB_OFFS];
>>  
>> -	for (i = 1; i < max_hw_ep; i++)
>> +	if (pdata_hw_ep && max_hw_ep != pdata_hw_ep)
>> +		pr_warn("Got %d hw endpoint and %d tx-fifo-size in array !!\n",
>> +			max_hw_ep, pdata_hw_ep);
> 
> dev_warn() ? Also reword the warning a bit, it's not clear to me what it
> warns about.

Ok, i will reword it to make it clearer.

> 
>> +
>> +	for (i = 1; i < max_hw_ep; i++) {
>> +		if (pdata_hw_ep)
>> +			tx_fifo_sz = dev->pdata->tx_fifo_sz_array[i +
>> +				     DWC2_SIZE_OFFS];
>>  		writel((rx_fifo_sz + np_tx_fifo_sz + tx_fifo_sz*(i-1)) |
>>  			tx_fifo_sz << 16, &reg->dieptxf[i-1]);
>> -
>> +	}
>>  	/* Flush the RX FIFO */
>>  	writel(RX_FIFO_FLUSH, &reg->grstctl);
>>  	while (readl(&reg->grstctl) & RX_FIFO_FLUSH)
>> diff --git a/include/usb/dwc2_udc.h b/include/usb/dwc2_udc.h
>> index 4068de045dc2..871aecdca322 100644
>> --- a/include/usb/dwc2_udc.h
>> +++ b/include/usb/dwc2_udc.h
>> @@ -10,6 +10,10 @@
>>  
>>  #define PHY0_SLEEP              (1 << 5)
>>  
>> +#define DWC2_MAX_HW_ENDPOINTS	16
>> +#define DWC2_SIZE_NB_OFFS	0
>> +#define DWC2_SIZE_OFFS		1
>> +
>>  struct dwc2_plat_otg_data {
>>  	void		*priv;
>>  	int		phy_of_node;
>> @@ -22,6 +26,8 @@ struct dwc2_plat_otg_data {
>>  	unsigned int	rx_fifo_sz;
>>  	unsigned int	np_tx_fifo_sz;
>>  	unsigned int	tx_fifo_sz;
>> +	/* [0] number of element, [1..17] tx_fifo_sz (max 16 endpoints)*/
> 
> Just create a separate entry for the array size, please.
> Could be unsigned char too.

ok

> 
>> +	unsigned int	tx_fifo_sz_array[DWC2_MAX_HW_ENDPOINTS + 1];
>>  };
>>  
>>  int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata);
>>
> 
> 

Thanks

Patrice

[U-Boot] [RESEND][PATCH v1 3/4] board: stm32mp1: Add tx_fifo_sz_array support

[Patrice CHOTARD]

Hi Marek

+Patrick

On 3/14/19 1:00 PM, Marek Vasut wrote:
> On 3/14/19 11:51 AM, Patrice Chotard wrote:
>> Allows to use an array of tx-fifo-size defined in device tree
>> as following:
>>    g-tx-fifo-size = <128 128 64 64 64 64 32 32>;
>>
>> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
>> ---
>>
>>  board/st/stm32mp1/stm32mp1.c | 11 +++++++++--
>>  1 file changed, 9 insertions(+), 2 deletions(-)
>>
>> diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
>> index 54feca0ecff5..81c080ff3199 100644
>> --- a/board/st/stm32mp1/stm32mp1.c
>> +++ b/board/st/stm32mp1/stm32mp1.c
>> @@ -42,6 +42,7 @@ int board_usb_init(int index, enum usb_init_type init)
>>  	int node;
>>  	int phy_provider;
>>  	int ret;
>> +	int count;
>>  
>>  	/* find the usb otg node */
>>  	node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2");
>> @@ -138,8 +139,14 @@ int board_usb_init(int index, enum usb_init_type init)
>>  						     "g-rx-fifo-size", 0);
>>  	stm32mp_otg_data.np_tx_fifo_sz = fdtdec_get_int(blob, node,
>>  							"g-np-tx-fifo-size", 0);
>> -	stm32mp_otg_data.tx_fifo_sz = fdtdec_get_int(blob, node,
>> -						     "g-tx-fifo-size", 0);
>> +
>> +	count = fdtdec_get_int_array_count(blob, node, "g-tx-fifo-size",
>> +			&stm32mp_otg_data.tx_fifo_sz_array[DWC2_SIZE_OFFS],
>> +			ARRAY_SIZE(stm32mp_otg_data.tx_fifo_sz_array));
>> +
>> +	if (count != -FDT_ERR_NOTFOUND)
>> +		stm32mp_otg_data.tx_fifo_sz_array[DWC2_SIZE_NB_OFFS] = count;
> 
> This should be in the driver , not board code.

Ok, Patrick Delaunay will rework the dwc2 gadget driver to be able to
retrieve device tree properties.
The series will be sent soon.

> 
>>  	/* Enable voltage level detector */
>>  	if (!(fdtdec_parse_phandle_with_args(blob, node, "usb33d-supply",
>>  					     NULL, 0, 0, &args))) {
>>
> 
> 

Thanks

Patrice

[U-Boot] [RESEND][PATCH v1 3/4] board: stm32mp1: Add tx_fifo_sz_array support

[Marek Vasut]

On 3/18/19 5:59 PM, Patrice CHOTARD wrote:
> Hi Marek
> 
> +Patrick
> 
> On 3/14/19 1:00 PM, Marek Vasut wrote:
>> On 3/14/19 11:51 AM, Patrice Chotard wrote:
>>> Allows to use an array of tx-fifo-size defined in device tree
>>> as following:
>>>    g-tx-fifo-size = <128 128 64 64 64 64 32 32>;
>>>
>>> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
>>> ---
>>>
>>>  board/st/stm32mp1/stm32mp1.c | 11 +++++++++--
>>>  1 file changed, 9 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
>>> index 54feca0ecff5..81c080ff3199 100644
>>> --- a/board/st/stm32mp1/stm32mp1.c
>>> +++ b/board/st/stm32mp1/stm32mp1.c
>>> @@ -42,6 +42,7 @@ int board_usb_init(int index, enum usb_init_type init)
>>>  	int node;
>>>  	int phy_provider;
>>>  	int ret;
>>> +	int count;
>>>  
>>>  	/* find the usb otg node */
>>>  	node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2");
>>> @@ -138,8 +139,14 @@ int board_usb_init(int index, enum usb_init_type init)
>>>  						     "g-rx-fifo-size", 0);
>>>  	stm32mp_otg_data.np_tx_fifo_sz = fdtdec_get_int(blob, node,
>>>  							"g-np-tx-fifo-size", 0);
>>> -	stm32mp_otg_data.tx_fifo_sz = fdtdec_get_int(blob, node,
>>> -						     "g-tx-fifo-size", 0);
>>> +
>>> +	count = fdtdec_get_int_array_count(blob, node, "g-tx-fifo-size",
>>> +			&stm32mp_otg_data.tx_fifo_sz_array[DWC2_SIZE_OFFS],
>>> +			ARRAY_SIZE(stm32mp_otg_data.tx_fifo_sz_array));
>>> +
>>> +	if (count != -FDT_ERR_NOTFOUND)
>>> +		stm32mp_otg_data.tx_fifo_sz_array[DWC2_SIZE_NB_OFFS] = count;
>>
>> This should be in the driver , not board code.
> 
> Ok, Patrick Delaunay will rework the dwc2 gadget driver to be able to
> retrieve device tree properties.
> The series will be sent soon.

Thanks.

That said, are these fixes for current release or stuff for the next one ?

-- 
Best regards,
Marek Vasut

[U-Boot] [RESEND][PATCH v1 3/4] board: stm32mp1: Add tx_fifo_sz_array support

[Patrick DELAUNAY]

> From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Marek Vasut
> Sent: lundi 18 mars 2019 19:47
> 
> On 3/18/19 5:59 PM, Patrice CHOTARD wrote:
> > Hi Marek
> >
> > +Patrick
> >
> > On 3/14/19 1:00 PM, Marek Vasut wrote:
> >> On 3/14/19 11:51 AM, Patrice Chotard wrote:
> >>> Allows to use an array of tx-fifo-size defined in device tree as
> >>> following:
> >>>    g-tx-fifo-size = <128 128 64 64 64 64 32 32>;
> >>>
> >>> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
> >>> ---
> >>>
> >>>  board/st/stm32mp1/stm32mp1.c | 11 +++++++++--
> >>>  1 file changed, 9 insertions(+), 2 deletions(-)
> >>>
> >>> diff --git a/board/st/stm32mp1/stm32mp1.c
> >>> b/board/st/stm32mp1/stm32mp1.c index 54feca0ecff5..81c080ff3199
> >>> 100644
> >>> --- a/board/st/stm32mp1/stm32mp1.c
> >>> +++ b/board/st/stm32mp1/stm32mp1.c
> >>> @@ -42,6 +42,7 @@ int board_usb_init(int index, enum usb_init_type init)
> >>>  	int node;
> >>>  	int phy_provider;
> >>>  	int ret;
> >>> +	int count;
> >>>
> >>>  	/* find the usb otg node */
> >>>  	node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2"); @@
> >>> -138,8 +139,14 @@ int board_usb_init(int index, enum usb_init_type init)
> >>>  						     "g-rx-fifo-size", 0);
> >>>  	stm32mp_otg_data.np_tx_fifo_sz = fdtdec_get_int(blob, node,
> >>>  							"g-np-tx-fifo-size", 0);
> >>> -	stm32mp_otg_data.tx_fifo_sz = fdtdec_get_int(blob, node,
> >>> -						     "g-tx-fifo-size", 0);
> >>> +
> >>> +	count = fdtdec_get_int_array_count(blob, node, "g-tx-fifo-size",
> >>> +
> 	&stm32mp_otg_data.tx_fifo_sz_array[DWC2_SIZE_OFFS],
> >>> +			ARRAY_SIZE(stm32mp_otg_data.tx_fifo_sz_array));
> >>> +
> >>> +	if (count != -FDT_ERR_NOTFOUND)
> >>> +		stm32mp_otg_data.tx_fifo_sz_array[DWC2_SIZE_NB_OFFS] =
> count;
> >>
> >> This should be in the driver , not board code.
> >
> > Ok, Patrick Delaunay will rework the dwc2 gadget driver to be able to
> > retrieve device tree properties.
> > The series will be sent soon.
> 
> Thanks.
> 
> That said, are these fixes for current release or stuff for the next one ?

I am preparing a serie for the next release.
I think it is too late for the current one and the serie depends of the stm32mp1 baord update not yet merged.

- DWC2 USB gadget migration to driver model (minimal)
- change STM32MP1 board to use USB gadget uclass
- introduce STUSB1600 Type C controller for DK2

These Seis will superseded the Patrice patch.

=> after this serie, the USB should be work in upstream tree for stm32mp1 board.
 
I expect to sent the serie next week.

Regards

> --
> Best regards,
> Marek Vasut
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> https://lists.denx.de/listinfo/u-boot

Regards
Patrick

[U-Boot] [RESEND][PATCH v1 3/4] board: stm32mp1: Add tx_fifo_sz_array support

[Marek Vasut]

On 3/22/19 11:18 AM, Patrick DELAUNAY wrote:
>> From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Marek Vasut
>> Sent: lundi 18 mars 2019 19:47
>>
>> On 3/18/19 5:59 PM, Patrice CHOTARD wrote:
>>> Hi Marek
>>>
>>> +Patrick
>>>
>>> On 3/14/19 1:00 PM, Marek Vasut wrote:
>>>> On 3/14/19 11:51 AM, Patrice Chotard wrote:
>>>>> Allows to use an array of tx-fifo-size defined in device tree as
>>>>> following:
>>>>>    g-tx-fifo-size = <128 128 64 64 64 64 32 32>;
>>>>>
>>>>> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
>>>>> ---
>>>>>
>>>>>  board/st/stm32mp1/stm32mp1.c | 11 +++++++++--
>>>>>  1 file changed, 9 insertions(+), 2 deletions(-)
>>>>>
>>>>> diff --git a/board/st/stm32mp1/stm32mp1.c
>>>>> b/board/st/stm32mp1/stm32mp1.c index 54feca0ecff5..81c080ff3199
>>>>> 100644
>>>>> --- a/board/st/stm32mp1/stm32mp1.c
>>>>> +++ b/board/st/stm32mp1/stm32mp1.c
>>>>> @@ -42,6 +42,7 @@ int board_usb_init(int index, enum usb_init_type init)
>>>>>  	int node;
>>>>>  	int phy_provider;
>>>>>  	int ret;
>>>>> +	int count;
>>>>>
>>>>>  	/* find the usb otg node */
>>>>>  	node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2"); @@
>>>>> -138,8 +139,14 @@ int board_usb_init(int index, enum usb_init_type init)
>>>>>  						     "g-rx-fifo-size", 0);
>>>>>  	stm32mp_otg_data.np_tx_fifo_sz = fdtdec_get_int(blob, node,
>>>>>  							"g-np-tx-fifo-size", 0);
>>>>> -	stm32mp_otg_data.tx_fifo_sz = fdtdec_get_int(blob, node,
>>>>> -						     "g-tx-fifo-size", 0);
>>>>> +
>>>>> +	count = fdtdec_get_int_array_count(blob, node, "g-tx-fifo-size",
>>>>> +
>> 	&stm32mp_otg_data.tx_fifo_sz_array[DWC2_SIZE_OFFS],
>>>>> +			ARRAY_SIZE(stm32mp_otg_data.tx_fifo_sz_array));
>>>>> +
>>>>> +	if (count != -FDT_ERR_NOTFOUND)
>>>>> +		stm32mp_otg_data.tx_fifo_sz_array[DWC2_SIZE_NB_OFFS] =
>> count;
>>>>
>>>> This should be in the driver , not board code.
>>>
>>> Ok, Patrick Delaunay will rework the dwc2 gadget driver to be able to
>>> retrieve device tree properties.
>>> The series will be sent soon.
>>
>> Thanks.
>>
>> That said, are these fixes for current release or stuff for the next one ?
> 
> I am preparing a serie for the next release.
> I think it is too late for the current one and the serie depends of the stm32mp1 baord update not yet merged.
> 
> - DWC2 USB gadget migration to driver model (minimal)
> - change STM32MP1 board to use USB gadget uclass
> - introduce STUSB1600 Type C controller for DK2
> 
> These Seis will superseded the Patrice patch.
> 
> => after this serie, the USB should be work in upstream tree for stm32mp1 board.
>  
> I expect to sent the serie next week.

OK, cool, thanks!

-- 
Best regards,
Marek Vasut

[U-Boot] [RESEND][PATCH v1 3/4] board: stm32mp1: Add tx_fifo_sz_array support

[Patrick DELAUNAY]

Hi Marek

> From: Marek Vasut <marex@denx.de>
> Sent: vendredi 22 mars 2019 11:51
> 
> On 3/22/19 11:18 AM, Patrick DELAUNAY wrote:
> >> From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Marek Vasut
> >> Sent: lundi 18 mars 2019 19:47
> >>
> >> On 3/18/19 5:59 PM, Patrice CHOTARD wrote:
> >>> Hi Marek
> >>>
....
> >>>>
> >>>> This should be in the driver , not board code.
> >>>
> >>> Ok, Patrick Delaunay will rework the dwc2 gadget driver to be able
> >>> to retrieve device tree properties.
> >>> The series will be sent soon.
> >>
> >> Thanks.
> >>
> >> That said, are these fixes for current release or stuff for the next one ?
> >
> > I am preparing a serie for the next release.
> > I think it is too late for the current one and the serie depends of the stm32mp1
> baord update not yet merged.
> >
> > - DWC2 USB gadget migration to driver model (minimal)
> > - change STM32MP1 board to use USB gadget uclass
> > - introduce STUSB1600 Type C controller for DK2
> >
> > These Seis will superseded the Patrice patch.
> >
> > => after this serie, the USB should be work in upstream tree for stm32mp1
> board.
> >
> > I expect to sent the serie next week.
> 
> OK, cool, thanks!

FYI: superseded by the serie 
 http://patchwork.ozlabs.org/project/uboot/list/?series=99946 

> 
> --
> Best regards,
> Marek Vasut

Regards
Patrick