All of lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH] powerpc/pseries/mce: fix misleading print for TLB mutlihit.
@ 2019-03-26 12:30 ` Mahesh J Salgaonkar
  0 siblings, 0 replies; 6+ messages in thread
From: Mahesh J Salgaonkar @ 2019-03-26 12:30 UTC (permalink / raw)
  To: linuxppc-dev; +Cc: Aneesh Kumar K.V, stable, Nicholas Piggin, Michael Ellerman

From: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>

On pseries, TLB multihit are reported as D-Cache Multihit. This is because
the wrongly populated mc_err_types[] array. Per PAPR, TLB error type is 0x04
and mc_err_types[4] points to "D-Cache" instead of "TLB" string. Fixup the
mc_err_types[] array.

Machine check error type per PAPR:
0x00 = Uncorrectable Memory Error (UE)
0x01 = SLB error
0x02 = ERAT Error
0x04 = TLB error
0x05 = D-Cache error
0x07 = I-Cache error

Fixes: 8f0b80561f21 ("powerpc/pseries: Display machine check error details.")
Cc: <stable@vger.kernel.org> # v4.19+
Reported-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
---
 arch/powerpc/platforms/pseries/ras.c |    1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c
index d97d52772789..452dcfd7e5dd 100644
--- a/arch/powerpc/platforms/pseries/ras.c
+++ b/arch/powerpc/platforms/pseries/ras.c
@@ -550,6 +550,7 @@ static void pseries_print_mce_info(struct pt_regs *regs,
 		"UE",
 		"SLB",
 		"ERAT",
+		"Unknown",
 		"TLB",
 		"D-Cache",
 		"Unknown",


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH] powerpc/pseries/mce: fix misleading print for TLB mutlihit.
@ 2019-03-26 12:30 ` Mahesh J Salgaonkar
  0 siblings, 0 replies; 6+ messages in thread
From: Mahesh J Salgaonkar @ 2019-03-26 12:30 UTC (permalink / raw)
  To: linuxppc-dev; +Cc: Aneesh Kumar K.V, Nicholas Piggin, stable

From: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>

On pseries, TLB multihit are reported as D-Cache Multihit. This is because
the wrongly populated mc_err_types[] array. Per PAPR, TLB error type is 0x04
and mc_err_types[4] points to "D-Cache" instead of "TLB" string. Fixup the
mc_err_types[] array.

Machine check error type per PAPR:
0x00 = Uncorrectable Memory Error (UE)
0x01 = SLB error
0x02 = ERAT Error
0x04 = TLB error
0x05 = D-Cache error
0x07 = I-Cache error

Fixes: 8f0b80561f21 ("powerpc/pseries: Display machine check error details.")
Cc: <stable@vger.kernel.org> # v4.19+
Reported-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
---
 arch/powerpc/platforms/pseries/ras.c |    1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c
index d97d52772789..452dcfd7e5dd 100644
--- a/arch/powerpc/platforms/pseries/ras.c
+++ b/arch/powerpc/platforms/pseries/ras.c
@@ -550,6 +550,7 @@ static void pseries_print_mce_info(struct pt_regs *regs,
 		"UE",
 		"SLB",
 		"ERAT",
+		"Unknown",
 		"TLB",
 		"D-Cache",
 		"Unknown",


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH] powerpc/pseries/mce: fix misleading print for TLB mutlihit.
  2019-03-26 12:30 ` Mahesh J Salgaonkar
@ 2019-03-27 11:37   ` Michael Ellerman
  -1 siblings, 0 replies; 6+ messages in thread
From: Michael Ellerman @ 2019-03-27 11:37 UTC (permalink / raw)
  To: Mahesh J Salgaonkar, linuxppc-dev
  Cc: Aneesh Kumar K.V, stable, Nicholas Piggin

Mahesh J Salgaonkar <mahesh@linux.vnet.ibm.com> writes:

> From: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
>
> On pseries, TLB multihit are reported as D-Cache Multihit. This is because
> the wrongly populated mc_err_types[] array. Per PAPR, TLB error type is 0x04
> and mc_err_types[4] points to "D-Cache" instead of "TLB" string. Fixup the
> mc_err_types[] array.
>
> Machine check error type per PAPR:
> 0x00 = Uncorrectable Memory Error (UE)
> 0x01 = SLB error
> 0x02 = ERAT Error
> 0x04 = TLB error
> 0x05 = D-Cache error
> 0x07 = I-Cache error
>
> Fixes: 8f0b80561f21 ("powerpc/pseries: Display machine check error details.")
> Cc: <stable@vger.kernel.org> # v4.19+
> Reported-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
> Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
> ---
>  arch/powerpc/platforms/pseries/ras.c |    1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c
> index d97d52772789..452dcfd7e5dd 100644
> --- a/arch/powerpc/platforms/pseries/ras.c
> +++ b/arch/powerpc/platforms/pseries/ras.c
> @@ -550,6 +550,7 @@ static void pseries_print_mce_info(struct pt_regs *regs,
>  		"UE",
>  		"SLB",
>  		"ERAT",
> +		"Unknown",
>  		"TLB",
>  		"D-Cache",
>  		"Unknown",

It seems like we might have avoided the bug if we'd numbered them from
the start, eg.

	static const char * const mc_err_types[] = {
		[0] = "UE",
		[1] = "SLB",
		[2] = "ERAT",
		[3] = "Unknown",
		[4] = "TLB",
		[5] = "D-Cache",
		[6] = "Unknown",
		[7] = "I-Cache",
	};


cheers

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] powerpc/pseries/mce: fix misleading print for TLB mutlihit.
@ 2019-03-27 11:37   ` Michael Ellerman
  0 siblings, 0 replies; 6+ messages in thread
From: Michael Ellerman @ 2019-03-27 11:37 UTC (permalink / raw)
  To: Mahesh J Salgaonkar, linuxppc-dev
  Cc: Aneesh Kumar K.V, Nicholas Piggin, stable

Mahesh J Salgaonkar <mahesh@linux.vnet.ibm.com> writes:

> From: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
>
> On pseries, TLB multihit are reported as D-Cache Multihit. This is because
> the wrongly populated mc_err_types[] array. Per PAPR, TLB error type is 0x04
> and mc_err_types[4] points to "D-Cache" instead of "TLB" string. Fixup the
> mc_err_types[] array.
>
> Machine check error type per PAPR:
> 0x00 = Uncorrectable Memory Error (UE)
> 0x01 = SLB error
> 0x02 = ERAT Error
> 0x04 = TLB error
> 0x05 = D-Cache error
> 0x07 = I-Cache error
>
> Fixes: 8f0b80561f21 ("powerpc/pseries: Display machine check error details.")
> Cc: <stable@vger.kernel.org> # v4.19+
> Reported-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
> Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
> ---
>  arch/powerpc/platforms/pseries/ras.c |    1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c
> index d97d52772789..452dcfd7e5dd 100644
> --- a/arch/powerpc/platforms/pseries/ras.c
> +++ b/arch/powerpc/platforms/pseries/ras.c
> @@ -550,6 +550,7 @@ static void pseries_print_mce_info(struct pt_regs *regs,
>  		"UE",
>  		"SLB",
>  		"ERAT",
> +		"Unknown",
>  		"TLB",
>  		"D-Cache",
>  		"Unknown",

It seems like we might have avoided the bug if we'd numbered them from
the start, eg.

	static const char * const mc_err_types[] = {
		[0] = "UE",
		[1] = "SLB",
		[2] = "ERAT",
		[3] = "Unknown",
		[4] = "TLB",
		[5] = "D-Cache",
		[6] = "Unknown",
		[7] = "I-Cache",
	};


cheers

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: powerpc/pseries/mce: fix misleading print for TLB mutlihit.
  2019-03-26 12:30 ` Mahesh J Salgaonkar
@ 2019-03-31 10:13   ` Michael Ellerman
  -1 siblings, 0 replies; 6+ messages in thread
From: Michael Ellerman @ 2019-03-31 10:13 UTC (permalink / raw)
  To: Mahesh J Salgaonkar, linuxppc-dev
  Cc: Aneesh Kumar K.V, Nicholas Piggin, stable

On Tue, 2019-03-26 at 12:30:31 UTC, Mahesh J Salgaonkar wrote:
> From: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
> 
> On pseries, TLB multihit are reported as D-Cache Multihit. This is because
> the wrongly populated mc_err_types[] array. Per PAPR, TLB error type is 0x04
> and mc_err_types[4] points to "D-Cache" instead of "TLB" string. Fixup the
> mc_err_types[] array.
> 
> Machine check error type per PAPR:
> 0x00 = Uncorrectable Memory Error (UE)
> 0x01 = SLB error
> 0x02 = ERAT Error
> 0x04 = TLB error
> 0x05 = D-Cache error
> 0x07 = I-Cache error
> 
> Fixes: 8f0b80561f21 ("powerpc/pseries: Display machine check error details.")
> Cc: <stable@vger.kernel.org> # v4.19+
> Reported-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
> Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>

Applied to powerpc fixes, thanks.

https://git.kernel.org/powerpc/c/6f845ebec2706841d15831fab3ffffcf

cheers

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: powerpc/pseries/mce: fix misleading print for TLB mutlihit.
@ 2019-03-31 10:13   ` Michael Ellerman
  0 siblings, 0 replies; 6+ messages in thread
From: Michael Ellerman @ 2019-03-31 10:13 UTC (permalink / raw)
  To: Mahesh J Salgaonkar, linuxppc-dev
  Cc: Aneesh Kumar K.V, stable, Nicholas Piggin

On Tue, 2019-03-26 at 12:30:31 UTC, Mahesh J Salgaonkar wrote:
> From: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
> 
> On pseries, TLB multihit are reported as D-Cache Multihit. This is because
> the wrongly populated mc_err_types[] array. Per PAPR, TLB error type is 0x04
> and mc_err_types[4] points to "D-Cache" instead of "TLB" string. Fixup the
> mc_err_types[] array.
> 
> Machine check error type per PAPR:
> 0x00 = Uncorrectable Memory Error (UE)
> 0x01 = SLB error
> 0x02 = ERAT Error
> 0x04 = TLB error
> 0x05 = D-Cache error
> 0x07 = I-Cache error
> 
> Fixes: 8f0b80561f21 ("powerpc/pseries: Display machine check error details.")
> Cc: <stable@vger.kernel.org> # v4.19+
> Reported-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
> Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>

Applied to powerpc fixes, thanks.

https://git.kernel.org/powerpc/c/6f845ebec2706841d15831fab3ffffcf

cheers

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2019-03-31 10:17 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-03-26 12:30 [PATCH] powerpc/pseries/mce: fix misleading print for TLB mutlihit Mahesh J Salgaonkar
2019-03-26 12:30 ` Mahesh J Salgaonkar
2019-03-27 11:37 ` Michael Ellerman
2019-03-27 11:37   ` Michael Ellerman
2019-03-31 10:13 ` Michael Ellerman
2019-03-31 10:13   ` Michael Ellerman

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.