[PATCH V3 00/13] Add USB2.0 support

[PATCH V3 00/13] Add USB2.0 support

[Biju Das]

This series adds USB 2.0 support for the RZ/G1C SoC. RZ/G1C
SoC is similar to R-Car Gen2 SoC, but there are some differences

- It has a shared pll reset register for hsusb0/hsusb1 and this register 
  reside in hsusb0 block.

- Each USB host needs to deassert the pll reset of hsusb block apart from
  initializing interrupt enable,OVC detection timer and suspend/resume timer
  register.

To address the above scenarios, created a ehci-r8a77470 host controller
driver.

This patchset is based on linux_next next-20190401 branch.

V2-->V3
 * Incorporated Alan's review comment for dropping ehci-r8a77470 host driver
 * Incorporated shimoda-san's comments.
   Ref: https://patchwork.kernel.org/patch/10879899/

V1-->V2
 * Incorporated Rob's review comment
   Ref: https://patchwork.kernel.org/patch/10655853/
 * Incorporated Shimoda-San's review comment
   Ref: https://patchwork.kernel.org/patch/10655855/
 * Created ehci-r8a77470 host driver.

Biju Das (13):
  dt-bindings: phy: rcar-gen2: Add r8a77470 support
  phy: renesas: phy-rcar-gen2: Add support for r8a77470
  dt-bindings: rcar-gen3-phy-usb2: Add r8a77470 support
  phy: rcar-gen3-usb2: Add support for r8a77470
  ARM: shmobile: Enable PHY_RCAR_GEN3_USB2 in shmobile_defconfig
  dt-bindings: usb: renesas_usbhs: Add support for r8a77470
  ARM: shmobile: Enable USB [EO]HCI HCD PLATFORM support in
    shmobile_defconfig
  ARM: dts: r8a77470: Add USB PHY DT support
  ARM: dts: iwg23s-sbc: Enable USB Phy[01]
  ARM: dts: r8a77470: Add USB2.0 Host (EHCI/OHCI) device
  ARM: dts: iwg23s-sbc: Enable USB USB2.0 Host
  ARM: dts: r8a77470: Add HSUSB device nodes
  ARM: dts: iwg23s-sbc: Enable HS-USB

 .../devicetree/bindings/phy/rcar-gen2-phy.txt      |  57 ++++++++-
 .../devicetree/bindings/phy/rcar-gen3-phy-usb2.txt |   6 +-
 .../devicetree/bindings/usb/renesas_usbhs.txt      |   1 +
 arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts          |  44 +++++++
 arch/arm/boot/dts/r8a77470.dtsi                    | 141 +++++++++++++++++++++
 arch/arm/configs/shmobile_defconfig                |   3 +
 drivers/phy/renesas/Kconfig                        |   2 +-
 drivers/phy/renesas/phy-rcar-gen2.c                |  86 ++++++++++++-
 drivers/phy/renesas/phy-rcar-gen3-usb2.c           |  19 ++-
 9 files changed, 349 insertions(+), 10 deletions(-)

-- 
2.7.4

[PATCH V3 01/13] dt-bindings: phy: rcar-gen2: Add r8a77470 support

[Biju Das]

Add USB PHY support for r8a77470 SoC. Renesas RZ/G1C (R8A77470)
USB PHY is similar to the R-Car Gen2 family, but has the below
feature compared to other RZ/G1 and R-Car Gen2/3 SoCs

It has a shared pll reset for usbphy0/usbphy1 and this register
reside in usbphy0 block.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
V2-->V3
  * No Change
V1-->V2
  * Incorporated Rob's review comment
    https://patchwork.kernel.org/patch/10655853/
---
 .../devicetree/bindings/phy/rcar-gen2-phy.txt      | 57 ++++++++++++++++++++--
 1 file changed, 53 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt b/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt
index 4f0879a..ac96d64 100644
--- a/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt
+++ b/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt
@@ -7,6 +7,7 @@ Required properties:
 - compatible: "renesas,usb-phy-r8a7743" if the device is a part of R8A7743 SoC.
 	      "renesas,usb-phy-r8a7744" if the device is a part of R8A7744 SoC.
 	      "renesas,usb-phy-r8a7745" if the device is a part of R8A7745 SoC.
+	      "renesas,usb-phy-r8a77470" if the device is a part of R8A77470 SoC.
 	      "renesas,usb-phy-r8a7790" if the device is a part of R8A7790 SoC.
 	      "renesas,usb-phy-r8a7791" if the device is a part of R8A7791 SoC.
 	      "renesas,usb-phy-r8a7794" if the device is a part of R8A7794 SoC.
@@ -30,7 +31,7 @@ channels. These subnodes must contain the following properties:
 - #phy-cells: see phy-bindings.txt in the same directory, must be <1>.
 
 The phandle's argument in the PHY specifier is the USB controller selector for
-the USB channel; see the selector meanings below:
+the USB channel other than r8a77470 SoC; see the selector meanings below:
 
 +-----------+---------------+---------------+
 |\ Selector |               |               |
@@ -41,6 +42,16 @@ the USB channel; see the selector meanings below:
 | 2         | PCI EHCI/OHCI | xHCI          |
 +-----------+---------------+---------------+
 
+For r8a77470 SoC;see the selector meaning below:
+
++-----------+---------------+---------------+
+|\ Selector |               |               |
++ --------- +       0       |       1       |
+| Channel  \|               |               |
++-----------+---------------+---------------+
+| 0         | EHCI/OHCI     | HS-USB        |
++-----------+---------------+---------------+
+
 Example (Lager board):
 
 	usb-phy@e6590100 {
@@ -48,15 +59,53 @@ Example (Lager board):
 		reg = <0 0xe6590100 0 0x100>;
 		#address-cells = <1>;
 		#size-cells = <0>;
-		clocks = <&mstp7_clks R8A7790_CLK_HSUSB>;
+		clocks = <&cpg CPG_MOD 704>;
 		clock-names = "usbhs";
+		power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+		resets = <&cpg 704>;
 
-		usb-channel@0 {
+		usb0: usb-channel@0 {
 			reg = <0>;
 			#phy-cells = <1>;
 		};
-		usb-channel@2 {
+		usb2: usb-channel@2 {
 			reg = <2>;
 			#phy-cells = <1>;
 		};
 	};
+
+Example (iWave RZ/G1C sbc):
+
+	usbphy0: usb-phy0@e6590100 {
+		compatible = "renesas,usb-phy-r8a77470",
+			     "renesas,rcar-gen2-usb-phy";
+		reg = <0 0xe6590100 0 0x100>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cpg CPG_MOD 704>;
+		clock-names = "usbhs";
+		power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+		resets = <&cpg 704>;
+
+		usb0: usb-channel@0 {
+			reg = <0>;
+			#phy-cells = <1>;
+		};
+	};
+
+	usbphy1: usb-phy@e6598100 {
+		compatible = "renesas,usb-phy-r8a77470",
+			     "renesas,rcar-gen2-usb-phy";
+		reg = <0 0xe6598100 0 0x100>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cpg CPG_MOD 706>;
+		clock-names = "usbhs";
+		power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+		resets = <&cpg 706>;
+
+		usb1: usb-channel@0 {
+			reg = <0>;
+			#phy-cells = <1>;
+		};
+	};
-- 
2.7.4

[PATCH V3 02/13] phy: renesas: phy-rcar-gen2: Add support for r8a77470

[Biju Das]

This patch adds support for RZ/G1C (r8a77470) SoC. RZ/G1C SoC has a
PLL register shared between hsusb0 and hsusb1. Compared to other RZ/G1
and R-Car Gen2/3, USB Host needs to deassert the pll reset.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
V2-->V3
 * No change
V1-->V2
 * Incorporated shimoda-san's review comment
 Ref: https://patchwork.kernel.org/patch/10655855/
---
 drivers/phy/renesas/phy-rcar-gen2.c | 86 ++++++++++++++++++++++++++++++++++++-
 1 file changed, 84 insertions(+), 2 deletions(-)

diff --git a/drivers/phy/renesas/phy-rcar-gen2.c b/drivers/phy/renesas/phy-rcar-gen2.c
index 72eeb06..5897386 100644
--- a/drivers/phy/renesas/phy-rcar-gen2.c
+++ b/drivers/phy/renesas/phy-rcar-gen2.c
@@ -4,6 +4,7 @@
  *
  * Copyright (C) 2014 Renesas Solutions Corp.
  * Copyright (C) 2014 Cogent Embedded, Inc.
+ * Copyright (C) 2019 Renesas Electronics Corp.
  */
 
 #include <linux/clk.h>
@@ -15,6 +16,7 @@
 #include <linux/platform_device.h>
 #include <linux/spinlock.h>
 #include <linux/atomic.h>
+#include <linux/sys_soc.h>
 
 #define USBHS_LPSTS			0x02
 #define USBHS_UGCTRL			0x80
@@ -35,6 +37,8 @@
 #define USBHS_UGCTRL2_USB0SEL		0x00000030
 #define USBHS_UGCTRL2_USB0SEL_PCI	0x00000010
 #define USBHS_UGCTRL2_USB0SEL_HS_USB	0x00000030
+#define USBHS_UGCTRL2_USB0SEL_USB20	0x00000010
+#define USBHS_UGCTRL2_USB0SEL_HS_USB20	0x00000020
 
 /* USB General status register (UGSTS) */
 #define USBHS_UGSTS_LOCK		0x00000100 /* From technical update */
@@ -180,6 +184,60 @@ static int rcar_gen2_phy_power_off(struct phy *p)
 	return 0;
 }
 
+static int rz_g1c_phy_power_on(struct phy *p)
+{
+	struct rcar_gen2_phy *phy = phy_get_drvdata(p);
+	struct rcar_gen2_phy_driver *drv = phy->channel->drv;
+	void __iomem *base = drv->base;
+	unsigned long flags;
+	u32 value;
+
+	spin_lock_irqsave(&drv->lock, flags);
+
+	/* Power on USBHS PHY */
+	value = readl(base + USBHS_UGCTRL);
+	value &= ~USBHS_UGCTRL_PLLRESET;
+	writel(value, base + USBHS_UGCTRL);
+
+	/* As per the data sheet wait 340 micro sec for power stable */
+	udelay(340);
+
+	if (phy->select_value == USBHS_UGCTRL2_USB0SEL_HS_USB20) {
+		value = readw(base + USBHS_LPSTS);
+		value |= USBHS_LPSTS_SUSPM;
+		writew(value, base + USBHS_LPSTS);
+	}
+
+	spin_unlock_irqrestore(&drv->lock, flags);
+
+	return 0;
+}
+
+static int rz_g1c_phy_power_off(struct phy *p)
+{
+	struct rcar_gen2_phy *phy = phy_get_drvdata(p);
+	struct rcar_gen2_phy_driver *drv = phy->channel->drv;
+	void __iomem *base = drv->base;
+	unsigned long flags;
+	u32 value;
+
+	spin_lock_irqsave(&drv->lock, flags);
+	/* Power off USBHS PHY */
+	if (phy->select_value == USBHS_UGCTRL2_USB0SEL_HS_USB20) {
+		value = readw(base + USBHS_LPSTS);
+		value &= ~USBHS_LPSTS_SUSPM;
+		writew(value, base + USBHS_LPSTS);
+	}
+
+	value = readl(base + USBHS_UGCTRL);
+	value |= USBHS_UGCTRL_PLLRESET;
+	writel(value, base + USBHS_UGCTRL);
+
+	spin_unlock_irqrestore(&drv->lock, flags);
+
+	return 0;
+}
+
 static const struct phy_ops rcar_gen2_phy_ops = {
 	.init		= rcar_gen2_phy_init,
 	.exit		= rcar_gen2_phy_exit,
@@ -188,6 +246,14 @@ static const struct phy_ops rcar_gen2_phy_ops = {
 	.owner		= THIS_MODULE,
 };
 
+static const struct phy_ops rz_g1c_phy_ops = {
+	.init		= rcar_gen2_phy_init,
+	.exit		= rcar_gen2_phy_exit,
+	.power_on	= rz_g1c_phy_power_on,
+	.power_off	= rz_g1c_phy_power_off,
+	.owner		= THIS_MODULE,
+};
+
 static const struct of_device_id rcar_gen2_phy_match_table[] = {
 	{ .compatible = "renesas,usb-phy-r8a7790" },
 	{ .compatible = "renesas,usb-phy-r8a7791" },
@@ -224,11 +290,20 @@ static const u32 select_mask[] = {
 	[2]	= USBHS_UGCTRL2_USB2SEL,
 };
 
-static const u32 select_value[][PHYS_PER_CHANNEL] = {
+static const u32 pci_select_value[][PHYS_PER_CHANNEL] = {
 	[0]	= { USBHS_UGCTRL2_USB0SEL_PCI, USBHS_UGCTRL2_USB0SEL_HS_USB },
 	[2]	= { USBHS_UGCTRL2_USB2SEL_PCI, USBHS_UGCTRL2_USB2SEL_USB30 },
 };
 
+static const u32 usb20_select_value[][PHYS_PER_CHANNEL] = {
+	{ USBHS_UGCTRL2_USB0SEL_USB20, USBHS_UGCTRL2_USB0SEL_HS_USB20 },
+};
+
+static struct soc_device_attribute soc_r8a77470[] = {
+	{ .soc_id = "r8a77470" },
+	{ /* sentinel */ }
+};
+
 static int rcar_gen2_phy_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
@@ -238,6 +313,8 @@ static int rcar_gen2_phy_probe(struct platform_device *pdev)
 	struct resource *res;
 	void __iomem *base;
 	struct clk *clk;
+	const struct phy_ops *gen2_phy_ops = &rcar_gen2_phy_ops;
+	const u32 (*select_value)[PHYS_PER_CHANNEL]  = pci_select_value;
 	int i = 0;
 
 	if (!dev->of_node) {
@@ -266,6 +343,11 @@ static int rcar_gen2_phy_probe(struct platform_device *pdev)
 	drv->clk = clk;
 	drv->base = base;
 
+	if (soc_device_match(soc_r8a77470)) {
+		select_value = usb20_select_value;
+		gen2_phy_ops = &rz_g1c_phy_ops;
+	}
+
 	drv->num_channels = of_get_child_count(dev->of_node);
 	drv->channels = devm_kcalloc(dev, drv->num_channels,
 				     sizeof(struct rcar_gen2_channel),
@@ -297,7 +379,7 @@ static int rcar_gen2_phy_probe(struct platform_device *pdev)
 			phy->select_value = select_value[channel_num][n];
 
 			phy->phy = devm_phy_create(dev, NULL,
-						   &rcar_gen2_phy_ops);
+						   gen2_phy_ops);
 			if (IS_ERR(phy->phy)) {
 				dev_err(dev, "Failed to create PHY\n");
 				return PTR_ERR(phy->phy);
-- 
2.7.4

[PATCH V3 03/13] dt-bindings: rcar-gen3-phy-usb2: Add r8a77470 support

[Biju Das]

Document RZ/G1C (R8A77470) SoC bindings.

For RZ/G1C, this driver is used to enable interrupt generation and
initializing timing registers which is part of phy_init code.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
V2-->V3
  * New patch
    https://patchwork.kernel.org/patch/10879899/
---
 Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt b/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt
index ad9c290..23894db 100644
--- a/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt
+++ b/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt
@@ -1,10 +1,12 @@
 * Renesas R-Car generation 3 USB 2.0 PHY
 
 This file provides information on what the device node for the R-Car generation
-3 and RZ/G2 USB 2.0 PHY contain.
+3, RZ/G1C and RZ/G2 USB 2.0 PHY contain.
 
 Required properties:
-- compatible: "renesas,usb2-phy-r8a774a1" if the device is a part of an R8A774A1
+- compatible: "renesas,usb2-phy-r8a77470" if the device is a part of an R8A77470
+	      SoC.
+	      "renesas,usb2-phy-r8a774a1" if the device is a part of an R8A774A1
 	      SoC.
 	      "renesas,usb2-phy-r8a774c0" if the device is a part of an R8A774C0
 	      SoC.
-- 
2.7.4

[PATCH V3 04/13] phy: rcar-gen3-usb2: Add support for r8a77470

[Biju Das]

This patch adds support for r8a77470 (RZ/G1C). We can reuse this driver for
initializing timing/interrupt generation registers.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
V1-->V2
 * Incorporated shimoda-san's review comment
 Ref: https://patchwork.kernel.org/patch/10655855/
---
 drivers/phy/renesas/Kconfig              |  2 +-
 drivers/phy/renesas/phy-rcar-gen3-usb2.c | 19 ++++++++++++++++++-
 2 files changed, 19 insertions(+), 2 deletions(-)

diff --git a/drivers/phy/renesas/Kconfig b/drivers/phy/renesas/Kconfig
index e340a92..961ccb1 100644
--- a/drivers/phy/renesas/Kconfig
+++ b/drivers/phy/renesas/Kconfig
@@ -19,7 +19,7 @@ config PHY_RCAR_GEN3_PCIE
 config PHY_RCAR_GEN3_USB2
 	tristate "Renesas R-Car generation 3 USB 2.0 PHY driver"
 	depends on ARCH_RENESAS
-	depends on EXTCON
+	depends on EXTCON || ARCH_R8A77470
 	depends on USB_SUPPORT
 	select GENERIC_PHY
 	select USB_COMMON
diff --git a/drivers/phy/renesas/phy-rcar-gen3-usb2.c b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
index 0a34782..ac33a02 100644
--- a/drivers/phy/renesas/phy-rcar-gen3-usb2.c
+++ b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
@@ -22,6 +22,7 @@
 #include <linux/regulator/consumer.h>
 #include <linux/usb/of.h>
 #include <linux/workqueue.h>
+#include <linux/sys_soc.h>
 
 /******* USB2.0 Host registers (original offset is +0x200) *******/
 #define USB2_INT_ENABLE		0x000
@@ -393,6 +394,12 @@ static const struct phy_ops rcar_gen3_phy_usb2_ops = {
 	.owner		= THIS_MODULE,
 };
 
+static const struct phy_ops rz_g1c_phy_usb2_ops = {
+	.init		= rcar_gen3_phy_usb2_init,
+	.exit		= rcar_gen3_phy_usb2_exit,
+	.owner		= THIS_MODULE,
+};
+
 static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
 {
 	struct rcar_gen3_chan *ch = _ch;
@@ -411,6 +418,7 @@ static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
 }
 
 static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
+	{ .compatible = "renesas,usb2-phy-r8a77470" },
 	{ .compatible = "renesas,usb2-phy-r8a7795" },
 	{ .compatible = "renesas,usb2-phy-r8a7796" },
 	{ .compatible = "renesas,usb2-phy-r8a77965" },
@@ -425,12 +433,18 @@ static const unsigned int rcar_gen3_phy_cable[] = {
 	EXTCON_NONE,
 };
 
+static struct soc_device_attribute soc_r8a77470[] = {
+	{ .soc_id = "r8a77470" },
+	{ /* sentinel */ }
+};
+
 static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
 	struct rcar_gen3_chan *channel;
 	struct phy_provider *provider;
 	struct resource *res;
+	const struct phy_ops *phy_usb2_ops = &rcar_gen3_phy_usb2_ops;
 	int irq, ret = 0;
 
 	if (!dev->of_node) {
@@ -481,7 +495,10 @@ static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
 	 * And then, phy-core will manage runtime pm for this device.
 	 */
 	pm_runtime_enable(dev);
-	channel->phy = devm_phy_create(dev, NULL, &rcar_gen3_phy_usb2_ops);
+	if (soc_device_match(soc_r8a77470))
+		phy_usb2_ops = &rz_g1c_phy_usb2_ops;
+
+	channel->phy = devm_phy_create(dev, NULL, phy_usb2_ops);
 	if (IS_ERR(channel->phy)) {
 		dev_err(dev, "Failed to create USB2 PHY\n");
 		ret = PTR_ERR(channel->phy);
-- 
2.7.4

[PATCH V3 05/13] ARM: shmobile: Enable PHY_RCAR_GEN3_USB2 in shmobile_defconfig

[Biju Das]

Enable PHY_RCAR_GEN3_USB2 in shmobile_defconfig so that boards
based on RZ/G1C SoC design can use the corresponding driver.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
V2-->V3
 * New patch
   https://patchwork.kernel.org/patch/10879899/
---
 arch/arm/configs/shmobile_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig
index 9b0efac..ff9348d 100644
--- a/arch/arm/configs/shmobile_defconfig
+++ b/arch/arm/configs/shmobile_defconfig
@@ -197,6 +197,7 @@ CONFIG_PWM_RENESAS_TPU=y
 CONFIG_RESET_CONTROLLER=y
 CONFIG_GENERIC_PHY=y
 CONFIG_PHY_RCAR_GEN2=y
+CONFIG_PHY_RCAR_GEN3_USB2=y
 # CONFIG_DNOTIFY is not set
 CONFIG_MSDOS_FS=y
 CONFIG_VFAT_FS=y
-- 
2.7.4

[PATCH V3 05/13] ARM: shmobile: Enable PHY_RCAR_GEN3_USB2 in shmobile_defconfig

[Biju Das]

Enable PHY_RCAR_GEN3_USB2 in shmobile_defconfig so that boards
based on RZ/G1C SoC design can use the corresponding driver.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
V2-->V3
 * New patch
   https://patchwork.kernel.org/patch/10879899/
---
 arch/arm/configs/shmobile_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig
index 9b0efac..ff9348d 100644
--- a/arch/arm/configs/shmobile_defconfig
+++ b/arch/arm/configs/shmobile_defconfig
@@ -197,6 +197,7 @@ CONFIG_PWM_RENESAS_TPU=y
 CONFIG_RESET_CONTROLLER=y
 CONFIG_GENERIC_PHY=y
 CONFIG_PHY_RCAR_GEN2=y
+CONFIG_PHY_RCAR_GEN3_USB2=y
 # CONFIG_DNOTIFY is not set
 CONFIG_MSDOS_FS=y
 CONFIG_VFAT_FS=y
-- 
2.7.4


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[PATCH V3 06/13] dt-bindings: usb: renesas_usbhs: Add support for r8a77470

[Biju Das]

Document support for RZ/G1C (R8A77470) SoC.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
V2-->V3
  * No change
V1-->V2
  * New patch
---
 Documentation/devicetree/bindings/usb/renesas_usbhs.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/usb/renesas_usbhs.txt b/Documentation/devicetree/bindings/usb/renesas_usbhs.txt
index d93b6a1..b8acc2a 100644
--- a/Documentation/devicetree/bindings/usb/renesas_usbhs.txt
+++ b/Documentation/devicetree/bindings/usb/renesas_usbhs.txt
@@ -6,6 +6,7 @@ Required properties:
 	- "renesas,usbhs-r8a7743" for r8a7743 (RZ/G1M) compatible device
 	- "renesas,usbhs-r8a7744" for r8a7744 (RZ/G1N) compatible device
 	- "renesas,usbhs-r8a7745" for r8a7745 (RZ/G1E) compatible device
+	- "renesas,usbhs-r8a77470" for r8a77470 (RZ/G1C) compatible device
 	- "renesas,usbhs-r8a774a1" for r8a774a1 (RZ/G2M) compatible device
 	- "renesas,usbhs-r8a774c0" for r8a774c0 (RZ/G2E) compatible device
 	- "renesas,usbhs-r8a7790" for r8a7790 (R-Car H2) compatible device
-- 
2.7.4

[PATCH V3 07/13] ARM: shmobile: Enable USB [EO]HCI HCD PLATFORM support in shmobile_defconfig

[Biju Das]

The USB [EO]HCI controller on RZ/G1C SoC doesn't have PCI bridge like
other R-Car Gen2 devices. So enable generic USB [EO]HCI HCD PLATFORM
support in shmobile_defconfig.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
V2-->V3
 * New patch
---
 arch/arm/configs/shmobile_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig
index ff9348d..78425dd 100644
--- a/arch/arm/configs/shmobile_defconfig
+++ b/arch/arm/configs/shmobile_defconfig
@@ -146,7 +146,9 @@ CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_PLATFORM=y
 CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_HCD_PLATFORM=y
 CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_PLATFORM=y
 CONFIG_USB_R8A66597_HCD=y
 CONFIG_USB_RENESAS_USBHS=y
 CONFIG_USB_GADGET=y
-- 
2.7.4

[PATCH V3 07/13] ARM: shmobile: Enable USB [EO]HCI HCD PLATFORM support in shmobile_defconfig

[Biju Das]

The USB [EO]HCI controller on RZ/G1C SoC doesn't have PCI bridge like
other R-Car Gen2 devices. So enable generic USB [EO]HCI HCD PLATFORM
support in shmobile_defconfig.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
V2-->V3
 * New patch
---
 arch/arm/configs/shmobile_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig
index ff9348d..78425dd 100644
--- a/arch/arm/configs/shmobile_defconfig
+++ b/arch/arm/configs/shmobile_defconfig
@@ -146,7 +146,9 @@ CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_PLATFORM=y
 CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_HCD_PLATFORM=y
 CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_PLATFORM=y
 CONFIG_USB_R8A66597_HCD=y
 CONFIG_USB_RENESAS_USBHS=y
 CONFIG_USB_GADGET=y
-- 
2.7.4


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH V3 08/13] ARM: dts: r8a77470: Add USB PHY DT support

[Biju Das]

Define the r8a77470 generic part of the USB PHY device node.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
V2-->V3
  * Added gen3 usb2 phy nodes
V1-->V2
 * New patch
---
 arch/arm/boot/dts/r8a77470.dtsi | 56 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index 493cf2b..dcd2975 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -325,6 +325,42 @@
 			status = "disabled";
 		};
 
+		usbphy0: usb-phy@e6590100 {
+			compatible = "renesas,usb-phy-r8a77470",
+				     "renesas,rcar-gen2-usb-phy";
+			reg = <0 0xe6590100 0 0x100>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&cpg CPG_MOD 704>;
+			clock-names = "usbhs";
+			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+			resets = <&cpg 704>;
+			status = "disabled";
+
+			usb0: usb-channel@0 {
+				reg = <0>;
+				#phy-cells = <1>;
+			};
+		};
+
+		usbphy1: usb-phy@e6598100 {
+			compatible = "renesas,usb-phy-r8a77470",
+				     "renesas,rcar-gen2-usb-phy";
+			reg = <0 0xe6598100 0 0x100>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&cpg CPG_MOD 706>;
+			clock-names = "usbhs";
+			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+			resets = <&cpg 706>;
+			status = "disabled";
+
+			usb1: usb-channel@0 {
+				reg = <0>;
+				#phy-cells = <1>;
+			};
+		};
+
 		usb_dmac00: dma-controller@e65a0000 {
 			compatible = "renesas,r8a77470-usb-dmac",
 				     "renesas,usb-dmac";
@@ -588,6 +624,26 @@
 			status = "disabled";
 		};
 
+		usb2_phy0: usb-phy@ee080200 {
+			compatible = "renesas,usb2-phy-r8a77470";
+			reg = <0 0xee080200 0 0x700>;
+			clocks = <&cpg CPG_MOD 703>;
+			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+			resets = <&cpg 703>;
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+
+		usb2_phy1: usb-phy@ee0c0200 {
+			compatible = "renesas,usb2-phy-r8a77470";
+			reg = <0 0xee0c0200 0 0x700>;
+			clocks = <&cpg CPG_MOD 705>;
+			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+			resets = <&cpg 705>;
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+
 		sdhi0: sd@ee100000 {
 			compatible = "renesas,sdhi-r8a77470",
 				     "renesas,rcar-gen2-sdhi";
-- 
2.7.4

[PATCH V3 09/13] ARM: dts: iwg23s-sbc: Enable USB Phy[01]

[Biju Das]

Enable USB phy[01] on iWave iwg23s sbc based on RZ/G1C SoC.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
V2-->V3
 * Added gen3 usb2 phy nodes
V1-->V2
 * No change
---
 arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 32 +++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
index 9f9eb15..7ae7ee1 100644
--- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
+++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
@@ -214,6 +214,16 @@
 		function = "sdhi2";
 		power-source = <1800>;
 	};
+
+	usb0_pins: usb0 {
+		groups = "usb0";
+		function = "usb0";
+	};
+
+	usb1_pins: usb1 {
+		groups = "usb1";
+		function = "usb1";
+	};
 };
 
 &qspi0 {
@@ -274,3 +284,25 @@
 	sd-uhs-sdr50;
 	status = "okay";
 };
+
+&usb2_phy0 {
+	status = "okay";
+};
+
+&usb2_phy1 {
+	status = "okay";
+};
+
+&usbphy0 {
+	pinctrl-0 = <&usb0_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+};
+
+&usbphy1 {
+	pinctrl-0 = <&usb1_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+};
-- 
2.7.4

[PATCH V3 10/13] ARM: dts: r8a77470: Add USB2.0 Host (EHCI/OHCI) device

[Biju Das]

Define the r8a77470 generic part of the USB2.0 Host Controller device
nodes (ehci[01]/ohci[01]).

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
V2-->V3
 * Updated phys property on host nodes. using generic-ehci compatible for ehci nodes.
V1-->V2
 * New patch
---
 arch/arm/boot/dts/r8a77470.dtsi | 50 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index dcd2975..482521c 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -624,6 +624,31 @@
 			status = "disabled";
 		};
 
+		ohci0: usb@ee080000 {
+			compatible = "generic-ohci";
+			reg = <0 0xee080000 0 0x100>;
+			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 703>;
+			phys = <&usb0 0>, <&usb2_phy0>;
+			phy-names = "usb";
+			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+			resets = <&cpg 703>;
+			status = "disabled";
+		};
+
+		ehci0: usb@ee080100 {
+			compatible = "generic-ehci";
+			reg = <0 0xee080100 0 0x100>;
+			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 703>;
+			phys = <&usb0 0>, <&usb2_phy0>;
+			phy-names = "usb";
+			companion = <&ohci0>;
+			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+			resets = <&cpg 703>;
+			status = "disabled";
+		};
+
 		usb2_phy0: usb-phy@ee080200 {
 			compatible = "renesas,usb2-phy-r8a77470";
 			reg = <0 0xee080200 0 0x700>;
@@ -634,6 +659,31 @@
 			status = "disabled";
 		};
 
+		ohci1: usb@ee0c0000 {
+			compatible = "generic-ohci";
+			reg = <0 0xee0c0000 0 0x100>;
+			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 705>;
+			phys = <&usb0 1>, <&usb1 0>;
+			phy-names = "usb";
+			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+			resets = <&cpg 705>;
+			status = "disabled";
+		};
+
+		ehci1: usb@ee0c0100 {
+			compatible = "generic-ehci";
+			reg = <0 0xee0c0100 0 0x100>;
+			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 705>;
+			phys = <&usb0 1>, <&usb2_phy1>, <&usb1 0>;
+			phy-names = "usb";
+			companion = <&ohci1>;
+			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+			resets = <&cpg 705>;
+			status = "disabled";
+		};
+
 		usb2_phy1: usb-phy@ee0c0200 {
 			compatible = "renesas,usb2-phy-r8a77470";
 			reg = <0 0xee0c0200 0 0x700>;
-- 
2.7.4

[PATCH V3 11/13] ARM: dts: iwg23s-sbc: Enable USB USB2.0 Host

[Biju Das]

Enable USB2.0 host on the iwg23s sbc.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
V2-->V3
 * No change
V1-->V2
 * No change
---
 arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
index 7ae7ee1..366832c 100644
--- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
+++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
@@ -106,6 +106,10 @@
 	};
 };
 
+&ehci1 {
+	status = "okay";
+};
+
 &extal_clk {
 	clock-frequency = <20000000>;
 };
@@ -166,6 +170,10 @@
 	};
 };
 
+&ohci1 {
+	status = "okay";
+};
+
 &pfc {
 	avb_pins: avb {
 		groups = "avb_mdio", "avb_gmii_tx_rx";
-- 
2.7.4

[PATCH V3 12/13] ARM: dts: r8a77470: Add HSUSB device nodes

[Biju Das]

Define the r8a77470 generic part of the HSUSB0/1 device nodes.

Currently the renesas_usbhs driver doesn't handle multiple phys and we
don't have a proper hardware to validate such driver changes.

So for hsusb1 it is assumed that usbphy0 will be enabled by either
channel0 host or device.

In future, if any boards support hsusb1, we will need to add multiple phy
support in the renesas_usbhs driver and override the board dts to enable
the same.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
V2-->V3
 * No Change
V1-->V2
 * New patch
---
 arch/arm/boot/dts/r8a77470.dtsi | 35 +++++++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index 482521c..b855e95 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -325,6 +325,23 @@
 			status = "disabled";
 		};
 
+		hsusb0: hsusb@e6590000 {
+			compatible = "renesas,usbhs-r8a77470",
+				     "renesas,rcar-gen2-usbhs";
+			reg = <0 0xe6590000 0 0x100>;
+			interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 704>;
+			dmas = <&usb_dmac00 0>, <&usb_dmac00 1>,
+			       <&usb_dmac10 0>, <&usb_dmac10 1>;
+			dma-names = "ch0", "ch1", "ch2", "ch3";
+			renesas,buswait = <4>;
+			phys = <&usb0 1>;
+			phy-names = "usb";
+			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+			resets = <&cpg 704>;
+			status = "disabled";
+		};
+
 		usbphy0: usb-phy@e6590100 {
 			compatible = "renesas,usb-phy-r8a77470",
 				     "renesas,rcar-gen2-usb-phy";
@@ -343,6 +360,24 @@
 			};
 		};
 
+		hsusb1: hsusb@e6598000 {
+			compatible = "renesas,usbhs-r8a77470",
+				     "renesas,rcar-gen2-usbhs";
+			reg = <0 0xe6598000 0 0x100>;
+			interrupts = <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 706>;
+			dmas = <&usb_dmac01 0>, <&usb_dmac01 1>,
+			       <&usb_dmac11 0>, <&usb_dmac11 1>;
+			dma-names = "ch0", "ch1", "ch2", "ch3";
+			renesas,buswait = <4>;
+			/* We need to turn on usbphy0 to make usbphy1 to work */
+			phys = <&usb1 1>;
+			phy-names = "usb";
+			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+			resets = <&cpg 706>;
+			status = "disabled";
+		};
+
 		usbphy1: usb-phy@e6598100 {
 			compatible = "renesas,usb-phy-r8a77470",
 				     "renesas,rcar-gen2-usb-phy";
-- 
2.7.4

[PATCH V3 13/13] ARM: dts: iwg23s-sbc: Enable HS-USB

[Biju Das]

Enable HS-USB device for the iWave SBC based on RZ/G1C.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
V2-->V3
 * No change
V1-->V2
 * New patch
---
 arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
index 366832c..2840eb0 100644
--- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
+++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
@@ -123,6 +123,10 @@
 	};
 };
 
+&hsusb0 {
+	status = "okay";
+};
+
 &i2c3 {
 	pinctrl-0 = <&i2c3_pins>;
 	pinctrl-names = "default";
-- 
2.7.4

Re: [PATCH V3 01/13] dt-bindings: phy: rcar-gen2: Add r8a77470 support

[Rob Herring]

On Wed,  3 Apr 2019 11:28:32 +0100, Biju Das wrote:
> Add USB PHY support for r8a77470 SoC. Renesas RZ/G1C (R8A77470)
> USB PHY is similar to the R-Car Gen2 family, but has the below
> feature compared to other RZ/G1 and R-Car Gen2/3 SoCs
> 
> It has a shared pll reset for usbphy0/usbphy1 and this register
> reside in usbphy0 block.
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> ---
> V2-->V3
>   * No Change
> V1-->V2
>   * Incorporated Rob's review comment
>     https://patchwork.kernel.org/patch/10655853/
> ---
>  .../devicetree/bindings/phy/rcar-gen2-phy.txt      | 57 ++++++++++++++++++++--
>  1 file changed, 53 insertions(+), 4 deletions(-)
> 

Reviewed-by: Rob Herring <robh@kernel.org>

Re: [PATCH V3 03/13] dt-bindings: rcar-gen3-phy-usb2: Add r8a77470 support

[Rob Herring]

On Wed,  3 Apr 2019 11:28:34 +0100, Biju Das wrote:
> Document RZ/G1C (R8A77470) SoC bindings.
> 
> For RZ/G1C, this driver is used to enable interrupt generation and
> initializing timing registers which is part of phy_init code.
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> ---
> V2-->V3
>   * New patch
>     https://patchwork.kernel.org/patch/10879899/
> ---
>  Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 

Reviewed-by: Rob Herring <robh@kernel.org>

Re: [PATCH V3 06/13] dt-bindings: usb: renesas_usbhs: Add support for r8a77470

[Rob Herring]

On Wed,  3 Apr 2019 11:28:37 +0100, Biju Das wrote:
> Document support for RZ/G1C (R8A77470) SoC.
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> ---
> V2-->V3
>   * No change
> V1-->V2
>   * New patch
> ---
>  Documentation/devicetree/bindings/usb/renesas_usbhs.txt | 1 +
>  1 file changed, 1 insertion(+)
> 

Reviewed-by: Rob Herring <robh@kernel.org>

RE: [PATCH V3 01/13] dt-bindings: phy: rcar-gen2: Add r8a77470 support

[Yoshihiro Shimoda]

Hi Biju-san,

> From: Biju Das, Sent: Wednesday, April 3, 2019 7:29 PM
> 
> Add USB PHY support for r8a77470 SoC. Renesas RZ/G1C (R8A77470)
> USB PHY is similar to the R-Car Gen2 family, but has the below
> feature compared to other RZ/G1 and R-Car Gen2/3 SoCs
> 
> It has a shared pll reset for usbphy0/usbphy1 and this register
> reside in usbphy0 block.
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>

Thank you for the patch!

Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

Best regards,
Yoshihiro Shimoda

RE: [PATCH V3 01/13] dt-bindings: phy: rcar-gen2: Add r8a77470 support

[Yoshihiro Shimoda]

Hi Biju-san,

> From: Biju Das, Sent: Wednesday, April 3, 2019 7:29 PM
> 
> Add USB PHY support for r8a77470 SoC. Renesas RZ/G1C (R8A77470)
> USB PHY is similar to the R-Car Gen2 family, but has the below
> feature compared to other RZ/G1 and R-Car Gen2/3 SoCs
> 
> It has a shared pll reset for usbphy0/usbphy1 and this register
> reside in usbphy0 block.
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>

Thank you for the patch!

Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

Best regards,
Yoshihiro Shimoda

RE: [PATCH V3 02/13] phy: renesas: phy-rcar-gen2: Add support for r8a77470

[Yoshihiro Shimoda]

Hi Biju-san,

> From: Biju Das, Sent: Wednesday, April 3, 2019 7:29 PM
> 
> This patch adds support for RZ/G1C (r8a77470) SoC. RZ/G1C SoC has a
> PLL register shared between hsusb0 and hsusb1. Compared to other RZ/G1
> and R-Car Gen2/3, USB Host needs to deassert the pll reset.
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> ---

Thank you for the patch!

Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

Best regards,
Yoshihiro Shimoda

RE: [PATCH V3 03/13] dt-bindings: rcar-gen3-phy-usb2: Add r8a77470 support

[Yoshihiro Shimoda]

Hi Biju-san,

> From: Biju Das, Sent: Wednesday, April 3, 2019 7:29 PM
> 
> Document RZ/G1C (R8A77470) SoC bindings.
> 
> For RZ/G1C, this driver is used to enable interrupt generation and
> initializing timing registers which is part of phy_init code.
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> ---

Thank you for the patch!

Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

Best regards,
Yoshihiro Shimoda

RE: [PATCH V3 03/13] dt-bindings: rcar-gen3-phy-usb2: Add r8a77470 support

[Yoshihiro Shimoda]

Hi Biju-san,

> From: Biju Das, Sent: Wednesday, April 3, 2019 7:29 PM
> 
> Document RZ/G1C (R8A77470) SoC bindings.
> 
> For RZ/G1C, this driver is used to enable interrupt generation and
> initializing timing registers which is part of phy_init code.
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> ---

Thank you for the patch!

Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

Best regards,
Yoshihiro Shimoda

Re: [PATCH V3 04/13] phy: rcar-gen3-usb2: Add support for r8a77470

[Kishon Vijay Abraham I]

Hi Biju,

On 03/04/19 3:58 PM, Biju Das wrote:
> This patch adds support for r8a77470 (RZ/G1C). We can reuse this driver for
> initializing timing/interrupt generation registers.
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> ---
> V1-->V2
>  * Incorporated shimoda-san's review comment
>  Ref: https://patchwork.kernel.org/patch/10655855/
> ---
>  drivers/phy/renesas/Kconfig              |  2 +-
>  drivers/phy/renesas/phy-rcar-gen3-usb2.c | 19 ++++++++++++++++++-
>  2 files changed, 19 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/phy/renesas/Kconfig b/drivers/phy/renesas/Kconfig
> index e340a92..961ccb1 100644
> --- a/drivers/phy/renesas/Kconfig
> +++ b/drivers/phy/renesas/Kconfig
> @@ -19,7 +19,7 @@ config PHY_RCAR_GEN3_PCIE
>  config PHY_RCAR_GEN3_USB2
>  	tristate "Renesas R-Car generation 3 USB 2.0 PHY driver"
>  	depends on ARCH_RENESAS
> -	depends on EXTCON
> +	depends on EXTCON || ARCH_R8A77470
>  	depends on USB_SUPPORT
>  	select GENERIC_PHY
>  	select USB_COMMON
> diff --git a/drivers/phy/renesas/phy-rcar-gen3-usb2.c b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
> index 0a34782..ac33a02 100644
> --- a/drivers/phy/renesas/phy-rcar-gen3-usb2.c
> +++ b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
> @@ -22,6 +22,7 @@
>  #include <linux/regulator/consumer.h>
>  #include <linux/usb/of.h>
>  #include <linux/workqueue.h>
> +#include <linux/sys_soc.h>
>  
>  /******* USB2.0 Host registers (original offset is +0x200) *******/
>  #define USB2_INT_ENABLE		0x000
> @@ -393,6 +394,12 @@ static const struct phy_ops rcar_gen3_phy_usb2_ops = {
>  	.owner		= THIS_MODULE,
>  };
>  
> +static const struct phy_ops rz_g1c_phy_usb2_ops = {
> +	.init		= rcar_gen3_phy_usb2_init,
> +	.exit		= rcar_gen3_phy_usb2_exit,
> +	.owner		= THIS_MODULE,
> +};
> +
>  static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
>  {
>  	struct rcar_gen3_chan *ch = _ch;
> @@ -411,6 +418,7 @@ static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
>  }
>  
>  static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
> +	{ .compatible = "renesas,usb2-phy-r8a77470" },
>  	{ .compatible = "renesas,usb2-phy-r8a7795" },
>  	{ .compatible = "renesas,usb2-phy-r8a7796" },
>  	{ .compatible = "renesas,usb2-phy-r8a77965" },
> @@ -425,12 +433,18 @@ static const unsigned int rcar_gen3_phy_cable[] = {
>  	EXTCON_NONE,
>  };
>  
> +static struct soc_device_attribute soc_r8a77470[] = {
> +	{ .soc_id = "r8a77470" },
> +	{ /* sentinel */ }
> +};
> +
>  static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
>  {
>  	struct device *dev = &pdev->dev;
>  	struct rcar_gen3_chan *channel;
>  	struct phy_provider *provider;
>  	struct resource *res;
> +	const struct phy_ops *phy_usb2_ops = &rcar_gen3_phy_usb2_ops;
>  	int irq, ret = 0;
>  
>  	if (!dev->of_node) {
> @@ -481,7 +495,10 @@ static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
>  	 * And then, phy-core will manage runtime pm for this device.
>  	 */
>  	pm_runtime_enable(dev);
> -	channel->phy = devm_phy_create(dev, NULL, &rcar_gen3_phy_usb2_ops);
> +	if (soc_device_match(soc_r8a77470))
> +		phy_usb2_ops = &rz_g1c_phy_usb2_ops;

Why not have the phy_ops in driver_data since you anyways have a new compatible
for r8a77470?

Thanks
Kishon

RE: [PATCH V3 04/13] phy: rcar-gen3-usb2: Add support for r8a77470

[Yoshihiro Shimoda]

Hi Biju-san,

Thank you for the patch!

> From: Biju Das, Sent: Wednesday, April 3, 2019 7:29 PM
> 
> This patch adds support for r8a77470 (RZ/G1C). We can reuse this driver for
> initializing timing/interrupt generation registers.
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> ---

It seems good to me. However, since Fabrizio-san and I have submitted patch(es)
for the driver around the same time, I'm confusing how to handle this patch.

< At March 1, 2019, 11:05 a.m. UTC >
https://patchwork.kernel.org/patch/10834975/

- Kishon-san said "merged" at April 1, but I mentioned this patch breaks R-Car D3.
- I checked today's his repo, but it doesn't seem to merge it.
- I don't get any feedback.

< At April 1, 2019, 12:01 p.m. UTC >
https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=99561

- Got Simon-san and Fabrizio-san's review.

and then, 

< At April 3, 2019, 10:28 a.m. UTC >
https://patchwork.kernel.org/patch/10883265/

> V1-->V2
>  * Incorporated shimoda-san's review comment
>  Ref: https://patchwork.kernel.org/patch/10655855/
> ---
>  drivers/phy/renesas/Kconfig              |  2 +-
>  drivers/phy/renesas/phy-rcar-gen3-usb2.c | 19 ++++++++++++++++++-
>  2 files changed, 19 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/phy/renesas/Kconfig b/drivers/phy/renesas/Kconfig
> index e340a92..961ccb1 100644
> --- a/drivers/phy/renesas/Kconfig
> +++ b/drivers/phy/renesas/Kconfig
> @@ -19,7 +19,7 @@ config PHY_RCAR_GEN3_PCIE
>  config PHY_RCAR_GEN3_USB2
>  	tristate "Renesas R-Car generation 3 USB 2.0 PHY driver"
>  	depends on ARCH_RENESAS
> -	depends on EXTCON
> +	depends on EXTCON || ARCH_R8A77470

If EXTCON=m, build error might happen like below.
https://marc.info/?l=linux-renesas-soc&m=154220057305761&w=2

Is it enough about "depends on EXTCON || !EXTCON" for your environment?

Best regards,
Yoshihiro Shimoda

Re: [PATCH V3 05/13] ARM: shmobile: Enable PHY_RCAR_GEN3_USB2 in shmobile_defconfig

[Simon Horman]

On Wed, Apr 03, 2019 at 11:28:36AM +0100, Biju Das wrote:
> Enable PHY_RCAR_GEN3_USB2 in shmobile_defconfig so that boards
> based on RZ/G1C SoC design can use the corresponding driver.
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>

Thanks Biju,

This looks fine to me but I will wait to see if there are other reviews
before applying.

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

> ---
> V2-->V3
>  * New patch
>    https://patchwork.kernel.org/patch/10879899/
> ---
>  arch/arm/configs/shmobile_defconfig | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig
> index 9b0efac..ff9348d 100644
> --- a/arch/arm/configs/shmobile_defconfig
> +++ b/arch/arm/configs/shmobile_defconfig
> @@ -197,6 +197,7 @@ CONFIG_PWM_RENESAS_TPU=y
>  CONFIG_RESET_CONTROLLER=y
>  CONFIG_GENERIC_PHY=y
>  CONFIG_PHY_RCAR_GEN2=y
> +CONFIG_PHY_RCAR_GEN3_USB2=y
>  # CONFIG_DNOTIFY is not set
>  CONFIG_MSDOS_FS=y
>  CONFIG_VFAT_FS=y
> -- 
> 2.7.4
> 

Re: [PATCH V3 05/13] ARM: shmobile: Enable PHY_RCAR_GEN3_USB2 in shmobile_defconfig

[Simon Horman]

On Wed, Apr 03, 2019 at 11:28:36AM +0100, Biju Das wrote:
> Enable PHY_RCAR_GEN3_USB2 in shmobile_defconfig so that boards
> based on RZ/G1C SoC design can use the corresponding driver.
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>

Thanks Biju,

This looks fine to me but I will wait to see if there are other reviews
before applying.

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

> ---
> V2-->V3
>  * New patch
>    https://patchwork.kernel.org/patch/10879899/
> ---
>  arch/arm/configs/shmobile_defconfig | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig
> index 9b0efac..ff9348d 100644
> --- a/arch/arm/configs/shmobile_defconfig
> +++ b/arch/arm/configs/shmobile_defconfig
> @@ -197,6 +197,7 @@ CONFIG_PWM_RENESAS_TPU=y
>  CONFIG_RESET_CONTROLLER=y
>  CONFIG_GENERIC_PHY=y
>  CONFIG_PHY_RCAR_GEN2=y
> +CONFIG_PHY_RCAR_GEN3_USB2=y
>  # CONFIG_DNOTIFY is not set
>  CONFIG_MSDOS_FS=y
>  CONFIG_VFAT_FS=y
> -- 
> 2.7.4
> 

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH V3 06/13] dt-bindings: usb: renesas_usbhs: Add support for r8a77470

[Simon Horman]

On Wed, Apr 03, 2019 at 11:28:37AM +0100, Biju Das wrote:
> Document support for RZ/G1C (R8A77470) SoC.
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

> ---
> V2-->V3
>   * No change
> V1-->V2
>   * New patch
> ---
>  Documentation/devicetree/bindings/usb/renesas_usbhs.txt | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/usb/renesas_usbhs.txt b/Documentation/devicetree/bindings/usb/renesas_usbhs.txt
> index d93b6a1..b8acc2a 100644
> --- a/Documentation/devicetree/bindings/usb/renesas_usbhs.txt
> +++ b/Documentation/devicetree/bindings/usb/renesas_usbhs.txt
> @@ -6,6 +6,7 @@ Required properties:
>  	- "renesas,usbhs-r8a7743" for r8a7743 (RZ/G1M) compatible device
>  	- "renesas,usbhs-r8a7744" for r8a7744 (RZ/G1N) compatible device
>  	- "renesas,usbhs-r8a7745" for r8a7745 (RZ/G1E) compatible device
> +	- "renesas,usbhs-r8a77470" for r8a77470 (RZ/G1C) compatible device
>  	- "renesas,usbhs-r8a774a1" for r8a774a1 (RZ/G2M) compatible device
>  	- "renesas,usbhs-r8a774c0" for r8a774c0 (RZ/G2E) compatible device
>  	- "renesas,usbhs-r8a7790" for r8a7790 (R-Car H2) compatible device
> -- 
> 2.7.4
> 

Re: [PATCH V3 07/13] ARM: shmobile: Enable USB [EO]HCI HCD PLATFORM support in shmobile_defconfig

[Simon Horman]

On Wed, Apr 03, 2019 at 11:28:38AM +0100, Biju Das wrote:
> The USB [EO]HCI controller on RZ/G1C SoC doesn't have PCI bridge like
> other R-Car Gen2 devices. So enable generic USB [EO]HCI HCD PLATFORM
> support in shmobile_defconfig.
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>

Thanks Biju,

This looks fine to me but I will wait to see if there are other reviews
before applying.

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

> ---
> V2-->V3
>  * New patch
> ---
>  arch/arm/configs/shmobile_defconfig | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig
> index ff9348d..78425dd 100644
> --- a/arch/arm/configs/shmobile_defconfig
> +++ b/arch/arm/configs/shmobile_defconfig
> @@ -146,7 +146,9 @@ CONFIG_USB=y
>  CONFIG_USB_XHCI_HCD=y
>  CONFIG_USB_XHCI_PLATFORM=y
>  CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_EHCI_HCD_PLATFORM=y
>  CONFIG_USB_OHCI_HCD=y
> +CONFIG_USB_OHCI_HCD_PLATFORM=y
>  CONFIG_USB_R8A66597_HCD=y
>  CONFIG_USB_RENESAS_USBHS=y
>  CONFIG_USB_GADGET=y
> -- 
> 2.7.4
> 

Re: [PATCH V3 07/13] ARM: shmobile: Enable USB [EO]HCI HCD PLATFORM support in shmobile_defconfig

[Simon Horman]

On Wed, Apr 03, 2019 at 11:28:38AM +0100, Biju Das wrote:
> The USB [EO]HCI controller on RZ/G1C SoC doesn't have PCI bridge like
> other R-Car Gen2 devices. So enable generic USB [EO]HCI HCD PLATFORM
> support in shmobile_defconfig.
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>

Thanks Biju,

This looks fine to me but I will wait to see if there are other reviews
before applying.

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

> ---
> V2-->V3
>  * New patch
> ---
>  arch/arm/configs/shmobile_defconfig | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig
> index ff9348d..78425dd 100644
> --- a/arch/arm/configs/shmobile_defconfig
> +++ b/arch/arm/configs/shmobile_defconfig
> @@ -146,7 +146,9 @@ CONFIG_USB=y
>  CONFIG_USB_XHCI_HCD=y
>  CONFIG_USB_XHCI_PLATFORM=y
>  CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_EHCI_HCD_PLATFORM=y
>  CONFIG_USB_OHCI_HCD=y
> +CONFIG_USB_OHCI_HCD_PLATFORM=y
>  CONFIG_USB_R8A66597_HCD=y
>  CONFIG_USB_RENESAS_USBHS=y
>  CONFIG_USB_GADGET=y
> -- 
> 2.7.4
> 

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH V3 08/13] ARM: dts: r8a77470: Add USB PHY DT support

[Simon Horman]

On Wed, Apr 03, 2019 at 11:28:39AM +0100, Biju Das wrote:
> Define the r8a77470 generic part of the USB PHY device node.
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>

Thanks,

This looks fine to me but I will wait to see if there are other reviews
before applying.

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

> ---
> V2-->V3
>   * Added gen3 usb2 phy nodes
> V1-->V2
>  * New patch
> ---
>  arch/arm/boot/dts/r8a77470.dtsi | 56 +++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 56 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
> index 493cf2b..dcd2975 100644
> --- a/arch/arm/boot/dts/r8a77470.dtsi
> +++ b/arch/arm/boot/dts/r8a77470.dtsi
> @@ -325,6 +325,42 @@
>  			status = "disabled";
>  		};
>  
> +		usbphy0: usb-phy@e6590100 {
> +			compatible = "renesas,usb-phy-r8a77470",
> +				     "renesas,rcar-gen2-usb-phy";
> +			reg = <0 0xe6590100 0 0x100>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			clocks = <&cpg CPG_MOD 704>;
> +			clock-names = "usbhs";
> +			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
> +			resets = <&cpg 704>;
> +			status = "disabled";
> +
> +			usb0: usb-channel@0 {
> +				reg = <0>;
> +				#phy-cells = <1>;
> +			};
> +		};
> +
> +		usbphy1: usb-phy@e6598100 {
> +			compatible = "renesas,usb-phy-r8a77470",
> +				     "renesas,rcar-gen2-usb-phy";
> +			reg = <0 0xe6598100 0 0x100>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			clocks = <&cpg CPG_MOD 706>;
> +			clock-names = "usbhs";
> +			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
> +			resets = <&cpg 706>;
> +			status = "disabled";
> +
> +			usb1: usb-channel@0 {
> +				reg = <0>;
> +				#phy-cells = <1>;
> +			};
> +		};
> +
>  		usb_dmac00: dma-controller@e65a0000 {
>  			compatible = "renesas,r8a77470-usb-dmac",
>  				     "renesas,usb-dmac";
> @@ -588,6 +624,26 @@
>  			status = "disabled";
>  		};
>  
> +		usb2_phy0: usb-phy@ee080200 {
> +			compatible = "renesas,usb2-phy-r8a77470";
> +			reg = <0 0xee080200 0 0x700>;
> +			clocks = <&cpg CPG_MOD 703>;
> +			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
> +			resets = <&cpg 703>;
> +			#phy-cells = <0>;
> +			status = "disabled";
> +		};
> +
> +		usb2_phy1: usb-phy@ee0c0200 {
> +			compatible = "renesas,usb2-phy-r8a77470";
> +			reg = <0 0xee0c0200 0 0x700>;
> +			clocks = <&cpg CPG_MOD 705>;
> +			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
> +			resets = <&cpg 705>;
> +			#phy-cells = <0>;
> +			status = "disabled";
> +		};
> +
>  		sdhi0: sd@ee100000 {
>  			compatible = "renesas,sdhi-r8a77470",
>  				     "renesas,rcar-gen2-sdhi";
> -- 
> 2.7.4
> 

Re: [PATCH V3 09/13] ARM: dts: iwg23s-sbc: Enable USB Phy[01]

[Simon Horman]

On Wed, Apr 03, 2019 at 11:28:40AM +0100, Biju Das wrote:
> Enable USB phy[01] on iWave iwg23s sbc based on RZ/G1C SoC.
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>

Thanks,

This looks fine to me but I will wait to see if there are other reviews
before applying.

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Re: [PATCH V3 10/13] ARM: dts: r8a77470: Add USB2.0 Host (EHCI/OHCI) device

[Simon Horman]

On Wed, Apr 03, 2019 at 11:28:41AM +0100, Biju Das wrote:
> Define the r8a77470 generic part of the USB2.0 Host Controller device
> nodes (ehci[01]/ohci[01]).
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>

Thanks,

This looks fine to me but I will wait to see if there are other reviews
before applying.

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Re: [PATCH V3 11/13] ARM: dts: iwg23s-sbc: Enable USB USB2.0 Host

[Simon Horman]

On Wed, Apr 03, 2019 at 11:28:42AM +0100, Biju Das wrote:
> Enable USB2.0 host on the iwg23s sbc.
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>

Thanks,

This looks fine to me but I will wait to see if there are other reviews
before applying.

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Re: [PATCH V3 12/13] ARM: dts: r8a77470: Add HSUSB device nodes

[Simon Horman]

On Wed, Apr 03, 2019 at 11:28:43AM +0100, Biju Das wrote:
> Define the r8a77470 generic part of the HSUSB0/1 device nodes.
> 
> Currently the renesas_usbhs driver doesn't handle multiple phys and we
> don't have a proper hardware to validate such driver changes.
> 
> So for hsusb1 it is assumed that usbphy0 will be enabled by either
> channel0 host or device.
> 
> In future, if any boards support hsusb1, we will need to add multiple phy
> support in the renesas_usbhs driver and override the board dts to enable
> the same.
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>

Thanks,

This looks fine to me but I will wait to see if there are other reviews
before applying.

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Re: [PATCH V3 13/13] ARM: dts: iwg23s-sbc: Enable HS-USB

[Simon Horman]

On Wed, Apr 03, 2019 at 11:28:44AM +0100, Biju Das wrote:
> Enable HS-USB device for the iWave SBC based on RZ/G1C.
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>

Thanks,

This looks fine to me but I will wait to see if there are other reviews
before applying.

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

RE: [PATCH V3 04/13] phy: rcar-gen3-usb2: Add support for r8a77470

[Biju Das]

Hi Kishon,

Thanks for the feedback.

> Subject: Re: [PATCH V3 04/13] phy: rcar-gen3-usb2: Add support for r8a77470
> 
> Hi Biju,
> 
> On 03/04/19 3:58 PM, Biju Das wrote:
> > This patch adds support for r8a77470 (RZ/G1C). We can reuse this
> > driver for initializing timing/interrupt generation registers.
> >
> > Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> > ---
> > V1-->V2
> >  * Incorporated shimoda-san's review comment
> >  Ref: https://patchwork.kernel.org/patch/10655855/
> > ---
> >  drivers/phy/renesas/Kconfig              |  2 +-
> >  drivers/phy/renesas/phy-rcar-gen3-usb2.c | 19 ++++++++++++++++++-
> >  2 files changed, 19 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/phy/renesas/Kconfig b/drivers/phy/renesas/Kconfig
> > index e340a92..961ccb1 100644
> > --- a/drivers/phy/renesas/Kconfig
> > +++ b/drivers/phy/renesas/Kconfig
> > @@ -19,7 +19,7 @@ config PHY_RCAR_GEN3_PCIE  config
> PHY_RCAR_GEN3_USB2
> >  	tristate "Renesas R-Car generation 3 USB 2.0 PHY driver"
> >  	depends on ARCH_RENESAS
> > -	depends on EXTCON
> > +	depends on EXTCON || ARCH_R8A77470
> >  	depends on USB_SUPPORT
> >  	select GENERIC_PHY
> >  	select USB_COMMON
> > diff --git a/drivers/phy/renesas/phy-rcar-gen3-usb2.c
> > b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
> > index 0a34782..ac33a02 100644
> > --- a/drivers/phy/renesas/phy-rcar-gen3-usb2.c
> > +++ b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
> > @@ -22,6 +22,7 @@
> >  #include <linux/regulator/consumer.h>  #include <linux/usb/of.h>
> > #include <linux/workqueue.h>
> > +#include <linux/sys_soc.h>
> >
> >  /******* USB2.0 Host registers (original offset is +0x200) *******/
> >  #define USB2_INT_ENABLE		0x000
> > @@ -393,6 +394,12 @@ static const struct phy_ops
> rcar_gen3_phy_usb2_ops = {
> >  	.owner		= THIS_MODULE,
> >  };
> >
> > +static const struct phy_ops rz_g1c_phy_usb2_ops = {
> > +	.init		= rcar_gen3_phy_usb2_init,
> > +	.exit		= rcar_gen3_phy_usb2_exit,
> > +	.owner		= THIS_MODULE,
> > +};
> > +
> >  static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)  {
> >  	struct rcar_gen3_chan *ch = _ch;
> > @@ -411,6 +418,7 @@ static irqreturn_t rcar_gen3_phy_usb2_irq(int irq,
> > void *_ch)  }
> >
> >  static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
> > +	{ .compatible = "renesas,usb2-phy-r8a77470" },
> >  	{ .compatible = "renesas,usb2-phy-r8a7795" },
> >  	{ .compatible = "renesas,usb2-phy-r8a7796" },
> >  	{ .compatible = "renesas,usb2-phy-r8a77965" }, @@ -425,12 +433,18
> @@
> > static const unsigned int rcar_gen3_phy_cable[] = {
> >  	EXTCON_NONE,
> >  };
> >
> > +static struct soc_device_attribute soc_r8a77470[] = {
> > +	{ .soc_id = "r8a77470" },
> > +	{ /* sentinel */ }
> > +};
> > +
> >  static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)  {
> >  	struct device *dev = &pdev->dev;
> >  	struct rcar_gen3_chan *channel;
> >  	struct phy_provider *provider;
> >  	struct resource *res;
> > +	const struct phy_ops *phy_usb2_ops = &rcar_gen3_phy_usb2_ops;
> >  	int irq, ret = 0;
> >
> >  	if (!dev->of_node) {
> > @@ -481,7 +495,10 @@ static int rcar_gen3_phy_usb2_probe(struct
> platform_device *pdev)
> >  	 * And then, phy-core will manage runtime pm for this device.
> >  	 */
> >  	pm_runtime_enable(dev);
> > -	channel->phy = devm_phy_create(dev, NULL,
> &rcar_gen3_phy_usb2_ops);
> > +	if (soc_device_match(soc_r8a77470))
> > +		phy_usb2_ops = &rz_g1c_phy_usb2_ops;
> 
> Why not have the phy_ops in driver_data since you anyways have a new
> compatible for r8a77470?

SoC device match will take care of SoC revision. We have multiple revision of SoC variants like ES1.0, ES1.1
There is another  SoC similar to RZ/G1C known as R-Car E2X.   If you add it in compatible, it takes care only about the SoC , not the SoC revisions.

Regards,
Biju

Re: [PATCH V3 04/13] phy: rcar-gen3-usb2: Add support for r8a77470

[Kishon Vijay Abraham I]

Hi,

On 09/04/19 4:50 PM, Biju Das wrote:
> Hi Kishon,
> 
> Thanks for the feedback.
> 
>> Subject: Re: [PATCH V3 04/13] phy: rcar-gen3-usb2: Add support for r8a77470
>>
>> Hi Biju,
>>
>> On 03/04/19 3:58 PM, Biju Das wrote:
>>> This patch adds support for r8a77470 (RZ/G1C). We can reuse this
>>> driver for initializing timing/interrupt generation registers.
>>>
>>> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
>>> ---
>>> V1-->V2
>>>  * Incorporated shimoda-san's review comment
>>>  Ref: https://patchwork.kernel.org/patch/10655855/
>>> ---
>>>  drivers/phy/renesas/Kconfig              |  2 +-
>>>  drivers/phy/renesas/phy-rcar-gen3-usb2.c | 19 ++++++++++++++++++-
>>>  2 files changed, 19 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/phy/renesas/Kconfig b/drivers/phy/renesas/Kconfig
>>> index e340a92..961ccb1 100644
>>> --- a/drivers/phy/renesas/Kconfig
>>> +++ b/drivers/phy/renesas/Kconfig
>>> @@ -19,7 +19,7 @@ config PHY_RCAR_GEN3_PCIE  config
>> PHY_RCAR_GEN3_USB2
>>>  	tristate "Renesas R-Car generation 3 USB 2.0 PHY driver"
>>>  	depends on ARCH_RENESAS
>>> -	depends on EXTCON
>>> +	depends on EXTCON || ARCH_R8A77470
>>>  	depends on USB_SUPPORT
>>>  	select GENERIC_PHY
>>>  	select USB_COMMON
>>> diff --git a/drivers/phy/renesas/phy-rcar-gen3-usb2.c
>>> b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
>>> index 0a34782..ac33a02 100644
>>> --- a/drivers/phy/renesas/phy-rcar-gen3-usb2.c
>>> +++ b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
>>> @@ -22,6 +22,7 @@
>>>  #include <linux/regulator/consumer.h>  #include <linux/usb/of.h>
>>> #include <linux/workqueue.h>
>>> +#include <linux/sys_soc.h>
>>>
>>>  /******* USB2.0 Host registers (original offset is +0x200) *******/
>>>  #define USB2_INT_ENABLE		0x000
>>> @@ -393,6 +394,12 @@ static const struct phy_ops
>> rcar_gen3_phy_usb2_ops = {
>>>  	.owner		= THIS_MODULE,
>>>  };
>>>
>>> +static const struct phy_ops rz_g1c_phy_usb2_ops = {
>>> +	.init		= rcar_gen3_phy_usb2_init,
>>> +	.exit		= rcar_gen3_phy_usb2_exit,
>>> +	.owner		= THIS_MODULE,
>>> +};
>>> +
>>>  static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)  {
>>>  	struct rcar_gen3_chan *ch = _ch;
>>> @@ -411,6 +418,7 @@ static irqreturn_t rcar_gen3_phy_usb2_irq(int irq,
>>> void *_ch)  }
>>>
>>>  static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
>>> +	{ .compatible = "renesas,usb2-phy-r8a77470" },
>>>  	{ .compatible = "renesas,usb2-phy-r8a7795" },
>>>  	{ .compatible = "renesas,usb2-phy-r8a7796" },
>>>  	{ .compatible = "renesas,usb2-phy-r8a77965" }, @@ -425,12 +433,18
>> @@
>>> static const unsigned int rcar_gen3_phy_cable[] = {
>>>  	EXTCON_NONE,
>>>  };
>>>
>>> +static struct soc_device_attribute soc_r8a77470[] = {
>>> +	{ .soc_id = "r8a77470" },
>>> +	{ /* sentinel */ }
>>> +};
>>> +
>>>  static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)  {
>>>  	struct device *dev = &pdev->dev;
>>>  	struct rcar_gen3_chan *channel;
>>>  	struct phy_provider *provider;
>>>  	struct resource *res;
>>> +	const struct phy_ops *phy_usb2_ops = &rcar_gen3_phy_usb2_ops;
>>>  	int irq, ret = 0;
>>>
>>>  	if (!dev->of_node) {
>>> @@ -481,7 +495,10 @@ static int rcar_gen3_phy_usb2_probe(struct
>> platform_device *pdev)
>>>  	 * And then, phy-core will manage runtime pm for this device.
>>>  	 */
>>>  	pm_runtime_enable(dev);
>>> -	channel->phy = devm_phy_create(dev, NULL,
>> &rcar_gen3_phy_usb2_ops);
>>> +	if (soc_device_match(soc_r8a77470))
>>> +		phy_usb2_ops = &rz_g1c_phy_usb2_ops;
>>
>> Why not have the phy_ops in driver_data since you anyways have a new
>> compatible for r8a77470?
> 
> SoC device match will take care of SoC revision. We have multiple revision of SoC variants like ES1.0, ES1.1
> There is another  SoC similar to RZ/G1C known as R-Car E2X.   If you add it in compatible, it takes care only about the SoC , not the SoC revisions.

We should add that when there's really a configuration change between ES1.0 and
ES1.1. Even the phy_ops can be the same with power_on/power_off return for
r8a77470 unless you have planned to add something later.

Thanks
Kishon

RE: [PATCH V3 04/13] phy: rcar-gen3-usb2: Add support for r8a77470

[Biju Das]

Hi Shimoda-San,

Thanks for the feedback.

> Subject: RE: [PATCH V3 04/13] phy: rcar-gen3-usb2: Add support for r8a77470
> 
> Hi Biju-san,
> 
> Thank you for the patch!
> 
> > From: Biju Das, Sent: Wednesday, April 3, 2019 7:29 PM
> >
> > This patch adds support for r8a77470 (RZ/G1C). We can reuse this
> > driver for initializing timing/interrupt generation registers.
> >
> > Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> > ---
> 
> It seems good to me. However, since Fabrizio-san and I have submitted
> patch(es) for the driver around the same time, I'm confusing how to handle
> this patch.
> 
> < At March 1, 2019, 11:05 a.m. UTC >
> https://patchwork.kernel.org/patch/10834975/
> 
> - Kishon-san said "merged" at April 1, but I mentioned this patch breaks R-Car
> D3.
> - I checked today's his repo, but it doesn't seem to merge it.
> - I don't get any feedback.
> 
> < At April 1, 2019, 12:01 p.m. UTC >
> https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=99561
> 
> - Got Simon-san and Fabrizio-san's review.
> 
> and then,
> 
> < At April 3, 2019, 10:28 a.m. UTC >
> https://patchwork.kernel.org/patch/10883265/
> 
> > V1-->V2
> >  * Incorporated shimoda-san's review comment
> >  Ref: https://patchwork.kernel.org/patch/10655855/
> > ---
> >  drivers/phy/renesas/Kconfig              |  2 +-
> >  drivers/phy/renesas/phy-rcar-gen3-usb2.c | 19 ++++++++++++++++++-
> >  2 files changed, 19 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/phy/renesas/Kconfig b/drivers/phy/renesas/Kconfig
> > index e340a92..961ccb1 100644
> > --- a/drivers/phy/renesas/Kconfig
> > +++ b/drivers/phy/renesas/Kconfig
> > @@ -19,7 +19,7 @@ config PHY_RCAR_GEN3_PCIE  config
> PHY_RCAR_GEN3_USB2
> >  	tristate "Renesas R-Car generation 3 USB 2.0 PHY driver"
> >  	depends on ARCH_RENESAS
> > -	depends on EXTCON
> > +	depends on EXTCON || ARCH_R8A77470
> 
> If EXTCON=m, build error might happen like below.
> https://marc.info/?l=linux-renesas-soc&m=154220057305761&w=2
> 
> Is it enough about "depends on EXTCON || !EXTCON" for your environment?

Yes, it is fine. I will send V4 with this change along with kishon's review comment.

Regards,
Biju

RE: [PATCH V3 04/13] phy: rcar-gen3-usb2: Add support for r8a77470

[Biju Das]

Hi Kishon,

Thanks for the feedback.

> >> Subject: Re: [PATCH V3 04/13] phy: rcar-gen3-usb2: Add support for
> >> r8a77470
> >>
> >> Hi Biju,
> >>
> >> On 03/04/19 3:58 PM, Biju Das wrote:
> >>> This patch adds support for r8a77470 (RZ/G1C). We can reuse this
> >>> driver for initializing timing/interrupt generation registers.
> >>>
> >>> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> >>> ---
> >>> V1-->V2
> >>>  * Incorporated shimoda-san's review comment
> >>>  Ref: https://patchwork.kernel.org/patch/10655855/
> >>> ---
> >>>  drivers/phy/renesas/Kconfig              |  2 +-
> >>>  drivers/phy/renesas/phy-rcar-gen3-usb2.c | 19 ++++++++++++++++++-
> >>>  2 files changed, 19 insertions(+), 2 deletions(-)
> >>>
> >>> diff --git a/drivers/phy/renesas/Kconfig
> >>> b/drivers/phy/renesas/Kconfig index e340a92..961ccb1 100644
> >>> --- a/drivers/phy/renesas/Kconfig
> >>> +++ b/drivers/phy/renesas/Kconfig
> >>> @@ -19,7 +19,7 @@ config PHY_RCAR_GEN3_PCIE  config
> >> PHY_RCAR_GEN3_USB2
> >>>  	tristate "Renesas R-Car generation 3 USB 2.0 PHY driver"
> >>>  	depends on ARCH_RENESAS
> >>> -	depends on EXTCON
> >>> +	depends on EXTCON || ARCH_R8A77470
> >>>  	depends on USB_SUPPORT
> >>>  	select GENERIC_PHY
> >>>  	select USB_COMMON
> >>> diff --git a/drivers/phy/renesas/phy-rcar-gen3-usb2.c
> >>> b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
> >>> index 0a34782..ac33a02 100644
> >>> --- a/drivers/phy/renesas/phy-rcar-gen3-usb2.c
> >>> +++ b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
> >>> @@ -22,6 +22,7 @@
> >>>  #include <linux/regulator/consumer.h>  #include <linux/usb/of.h>
> >>> #include <linux/workqueue.h>
> >>> +#include <linux/sys_soc.h>
> >>>
> >>>  /******* USB2.0 Host registers (original offset is +0x200) *******/
> >>>  #define USB2_INT_ENABLE		0x000
> >>> @@ -393,6 +394,12 @@ static const struct phy_ops
> >> rcar_gen3_phy_usb2_ops = {
> >>>  	.owner		= THIS_MODULE,
> >>>  };
> >>>
> >>> +static const struct phy_ops rz_g1c_phy_usb2_ops = {
> >>> +	.init		= rcar_gen3_phy_usb2_init,
> >>> +	.exit		= rcar_gen3_phy_usb2_exit,
> >>> +	.owner		= THIS_MODULE,
> >>> +};
> >>> +
> >>>  static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)  {
> >>>  	struct rcar_gen3_chan *ch = _ch;
> >>> @@ -411,6 +418,7 @@ static irqreturn_t rcar_gen3_phy_usb2_irq(int
> >>> irq, void *_ch)  }
> >>>
> >>>  static const struct of_device_id rcar_gen3_phy_usb2_match_table[] =
> >>> {
> >>> +	{ .compatible = "renesas,usb2-phy-r8a77470" },
> >>>  	{ .compatible = "renesas,usb2-phy-r8a7795" },
> >>>  	{ .compatible = "renesas,usb2-phy-r8a7796" },
> >>>  	{ .compatible = "renesas,usb2-phy-r8a77965" }, @@ -425,12 +433,18
> >> @@
> >>> static const unsigned int rcar_gen3_phy_cable[] = {
> >>>  	EXTCON_NONE,
> >>>  };
> >>>
> >>> +static struct soc_device_attribute soc_r8a77470[] = {
> >>> +	{ .soc_id = "r8a77470" },
> >>> +	{ /* sentinel */ }
> >>> +};
> >>> +
> >>>  static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)  {
> >>>  	struct device *dev = &pdev->dev;
> >>>  	struct rcar_gen3_chan *channel;
> >>>  	struct phy_provider *provider;
> >>>  	struct resource *res;
> >>> +	const struct phy_ops *phy_usb2_ops = &rcar_gen3_phy_usb2_ops;
> >>>  	int irq, ret = 0;
> >>>
> >>>  	if (!dev->of_node) {
> >>> @@ -481,7 +495,10 @@ static int rcar_gen3_phy_usb2_probe(struct
> >> platform_device *pdev)
> >>>  	 * And then, phy-core will manage runtime pm for this device.
> >>>  	 */
> >>>  	pm_runtime_enable(dev);
> >>> -	channel->phy = devm_phy_create(dev, NULL,
> >> &rcar_gen3_phy_usb2_ops);
> >>> +	if (soc_device_match(soc_r8a77470))
> >>> +		phy_usb2_ops = &rz_g1c_phy_usb2_ops;
> >>
> >> Why not have the phy_ops in driver_data since you anyways have a new
> >> compatible for r8a77470?
> >
> > SoC device match will take care of SoC revision. We have multiple revision
> of SoC variants like ES1.0, ES1.1
> > There is another  SoC similar to RZ/G1C known as R-Car E2X.   If you add it in
> compatible, it takes care only about the SoC , not the SoC revisions.
> 
> We should add that when there's really a configuration change between
> ES1.0 and ES1.1. Even the phy_ops can be the same with
> power_on/power_off return for
> r8a77470 unless you have planned to add something later.

OK. I will add phy_ops in driver_data and remove soc_device_match.

On future if there is a configuration change/need for a quirks between SoC versions
will add the same.

Regards,
Biju