* [PATCH 1/2] drm/i915: Shortcut readiness to reset check
@ 2019-04-12 16:16 Mika Kuoppala
2019-04-12 16:16 ` [PATCH 2/2] drm/i915: Handle catastrophic error on engine reset Mika Kuoppala
` (4 more replies)
0 siblings, 5 replies; 10+ messages in thread
From: Mika Kuoppala @ 2019-04-12 16:16 UTC (permalink / raw)
To: intel-gfx
If the engine says it is ready for reset, it is ready
so avoid further dancing and proceed.
v2: reg (Chris)
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_reset.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reset.c b/drivers/gpu/drm/i915/i915_reset.c
index 68875ba43b8d..d874a62103e5 100644
--- a/drivers/gpu/drm/i915/i915_reset.c
+++ b/drivers/gpu/drm/i915/i915_reset.c
@@ -490,14 +490,20 @@ static int gen11_reset_engines(struct drm_i915_private *i915,
static int gen8_engine_reset_prepare(struct intel_engine_cs *engine)
{
struct intel_uncore *uncore = engine->uncore;
+ const i915_reg_t reg = RING_RESET_CTL(engine->mmio_base);
+ u32 ctl;
int ret;
+ ctl = intel_uncore_read_fw(uncore, reg);
+ if (ctl & RESET_CTL_READY_TO_RESET)
+ return 0;
+
intel_uncore_write_fw(uncore,
- RING_RESET_CTL(engine->mmio_base),
+ reg,
_MASKED_BIT_ENABLE(RESET_CTL_REQUEST_RESET));
ret = __intel_wait_for_register_fw(uncore,
- RING_RESET_CTL(engine->mmio_base),
+ reg,
RESET_CTL_READY_TO_RESET,
RESET_CTL_READY_TO_RESET,
700, 0,
--
2.17.1
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^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/2] drm/i915: Handle catastrophic error on engine reset
2019-04-12 16:16 [PATCH 1/2] drm/i915: Shortcut readiness to reset check Mika Kuoppala
@ 2019-04-12 16:16 ` Mika Kuoppala
2019-04-12 16:24 ` Chris Wilson
2019-04-12 16:21 ` [PATCH 1/2] drm/i915: Shortcut readiness to reset check Chris Wilson
` (3 subsequent siblings)
4 siblings, 1 reply; 10+ messages in thread
From: Mika Kuoppala @ 2019-04-12 16:16 UTC (permalink / raw)
To: intel-gfx
If cat error is set, we need to clear it by acking it. Further,
if it is set, we must not do a normal request for reset.
v2: avoid goto (Chris)
Bspec: 12567
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 6 ++++--
drivers/gpu/drm/i915/i915_reset.c | 32 ++++++++++++++++++-------------
2 files changed, 23 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 8ad2f0a03f28..c1c0f7ab03e9 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2446,8 +2446,10 @@ enum i915_power_well_id {
#define RING_HWS_PGA(base) _MMIO((base) + 0x80)
#define RING_HWS_PGA_GEN6(base) _MMIO((base) + 0x2080)
#define RING_RESET_CTL(base) _MMIO((base) + 0xd0)
-#define RESET_CTL_REQUEST_RESET (1 << 0)
-#define RESET_CTL_READY_TO_RESET (1 << 1)
+#define RESET_CTL_CAT_ERROR REG_BIT(2)
+#define RESET_CTL_READY_TO_RESET REG_BIT(1)
+#define RESET_CTL_REQUEST_RESET REG_BIT(0)
+
#define RING_SEMA_WAIT_POLL(base) _MMIO((base) + 0x24c)
#define HSW_GTT_CACHE_EN _MMIO(0x4024)
diff --git a/drivers/gpu/drm/i915/i915_reset.c b/drivers/gpu/drm/i915/i915_reset.c
index d874a62103e5..75d66c47db48 100644
--- a/drivers/gpu/drm/i915/i915_reset.c
+++ b/drivers/gpu/drm/i915/i915_reset.c
@@ -491,25 +491,31 @@ static int gen8_engine_reset_prepare(struct intel_engine_cs *engine)
{
struct intel_uncore *uncore = engine->uncore;
const i915_reg_t reg = RING_RESET_CTL(engine->mmio_base);
- u32 ctl;
+ u32 ctl, ack = 0, mask = 0, request = 0;
int ret;
ctl = intel_uncore_read_fw(uncore, reg);
- if (ctl & RESET_CTL_READY_TO_RESET)
+
+ if (ctl & RESET_CTL_CAT_ERROR) {
+ request |= RESET_CTL_CAT_ERROR;
+ mask |= RESET_CTL_CAT_ERROR;
+ /* HAS#396813: Avoid reset request if cat error */
+ } else if (!(ctl & RESET_CTL_READY_TO_RESET)) {
+ request |= RESET_CTL_REQUEST_RESET;
+ mask |= RESET_CTL_READY_TO_RESET;
+ ack |= RESET_CTL_READY_TO_RESET;
+ } else {
return 0;
+ }
- intel_uncore_write_fw(uncore,
- reg,
- _MASKED_BIT_ENABLE(RESET_CTL_REQUEST_RESET));
-
- ret = __intel_wait_for_register_fw(uncore,
- reg,
- RESET_CTL_READY_TO_RESET,
- RESET_CTL_READY_TO_RESET,
- 700, 0,
- NULL);
+ intel_uncore_write_fw(uncore, reg, _MASKED_BIT_ENABLE(request));
+
+ ret = __intel_wait_for_register_fw(uncore, reg, mask, ack,
+ 700, 0, NULL);
if (ret)
- DRM_ERROR("%s: reset request timeout\n", engine->name);
+ DRM_ERROR("%s: reset request 0x%08x timeout 0x%08x\n",
+ engine->name, request,
+ intel_uncore_read_fw(uncore, reg));
return ret;
}
--
2.17.1
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^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] drm/i915: Shortcut readiness to reset check
2019-04-12 16:16 [PATCH 1/2] drm/i915: Shortcut readiness to reset check Mika Kuoppala
2019-04-12 16:16 ` [PATCH 2/2] drm/i915: Handle catastrophic error on engine reset Mika Kuoppala
@ 2019-04-12 16:21 ` Chris Wilson
2019-04-12 16:53 ` Mika Kuoppala
2019-04-12 16:45 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] " Patchwork
` (2 subsequent siblings)
4 siblings, 1 reply; 10+ messages in thread
From: Chris Wilson @ 2019-04-12 16:21 UTC (permalink / raw)
To: Mika Kuoppala, intel-gfx
Quoting Mika Kuoppala (2019-04-12 17:16:28)
> If the engine says it is ready for reset, it is ready
> so avoid further dancing and proceed.
>
> v2: reg (Chris)
>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Just starting at this to see if it's worth pulling a bit more of patch 2
(mask, ack, request) into this one. I think so, marginally.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
_______________________________________________
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 2/2] drm/i915: Handle catastrophic error on engine reset
2019-04-12 16:16 ` [PATCH 2/2] drm/i915: Handle catastrophic error on engine reset Mika Kuoppala
@ 2019-04-12 16:24 ` Chris Wilson
2019-04-12 16:53 ` Mika Kuoppala
0 siblings, 1 reply; 10+ messages in thread
From: Chris Wilson @ 2019-04-12 16:24 UTC (permalink / raw)
To: Mika Kuoppala, intel-gfx
Quoting Mika Kuoppala (2019-04-12 17:16:29)
> If cat error is set, we need to clear it by acking it. Further,
> if it is set, we must not do a normal request for reset.
>
> v2: avoid goto (Chris)
>
> Bspec: 12567
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 6 ++++--
> drivers/gpu/drm/i915/i915_reset.c | 32 ++++++++++++++++++-------------
> 2 files changed, 23 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 8ad2f0a03f28..c1c0f7ab03e9 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -2446,8 +2446,10 @@ enum i915_power_well_id {
> #define RING_HWS_PGA(base) _MMIO((base) + 0x80)
> #define RING_HWS_PGA_GEN6(base) _MMIO((base) + 0x2080)
> #define RING_RESET_CTL(base) _MMIO((base) + 0xd0)
> -#define RESET_CTL_REQUEST_RESET (1 << 0)
> -#define RESET_CTL_READY_TO_RESET (1 << 1)
> +#define RESET_CTL_CAT_ERROR REG_BIT(2)
> +#define RESET_CTL_READY_TO_RESET REG_BIT(1)
> +#define RESET_CTL_REQUEST_RESET REG_BIT(0)
> +
> #define RING_SEMA_WAIT_POLL(base) _MMIO((base) + 0x24c)
>
> #define HSW_GTT_CACHE_EN _MMIO(0x4024)
> diff --git a/drivers/gpu/drm/i915/i915_reset.c b/drivers/gpu/drm/i915/i915_reset.c
> index d874a62103e5..75d66c47db48 100644
> --- a/drivers/gpu/drm/i915/i915_reset.c
> +++ b/drivers/gpu/drm/i915/i915_reset.c
> @@ -491,25 +491,31 @@ static int gen8_engine_reset_prepare(struct intel_engine_cs *engine)
> {
> struct intel_uncore *uncore = engine->uncore;
> const i915_reg_t reg = RING_RESET_CTL(engine->mmio_base);
> - u32 ctl;
> + u32 ctl, ack = 0, mask = 0, request = 0;
> int ret;
>
> ctl = intel_uncore_read_fw(uncore, reg);
> - if (ctl & RESET_CTL_READY_TO_RESET)
> +
> + if (ctl & RESET_CTL_CAT_ERROR) {
> + request |= RESET_CTL_CAT_ERROR;
> + mask |= RESET_CTL_CAT_ERROR;
> + /* HAS#396813: Avoid reset request if cat error */
Comment before would be our usual practice.
With the if blocks, we can just assign the values, no need for |=, just
remember to add ack here.
> + } else if (!(ctl & RESET_CTL_READY_TO_RESET)) {
> + request |= RESET_CTL_REQUEST_RESET;
> + mask |= RESET_CTL_READY_TO_RESET;
> + ack |= RESET_CTL_READY_TO_RESET;
> + } else {
> return 0;
> + }
>
> - intel_uncore_write_fw(uncore,
> - reg,
> - _MASKED_BIT_ENABLE(RESET_CTL_REQUEST_RESET));
> -
> - ret = __intel_wait_for_register_fw(uncore,
> - reg,
> - RESET_CTL_READY_TO_RESET,
> - RESET_CTL_READY_TO_RESET,
> - 700, 0,
> - NULL);
> + intel_uncore_write_fw(uncore, reg, _MASKED_BIT_ENABLE(request));
> +
> + ret = __intel_wait_for_register_fw(uncore, reg, mask, ack,
> + 700, 0, NULL);
> if (ret)
> - DRM_ERROR("%s: reset request timeout\n", engine->name);
> + DRM_ERROR("%s: reset request 0x%08x timeout 0x%08x\n",
> + engine->name, request,
> + intel_uncore_read_fw(uncore, reg));
"%s reset request timed out: {request:%08x, RESET_CTL:%08x}"
makes more sense to me -- I was struggling with the intermix of
request/timeout and the values.
-Chris
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Shortcut readiness to reset check
2019-04-12 16:16 [PATCH 1/2] drm/i915: Shortcut readiness to reset check Mika Kuoppala
2019-04-12 16:16 ` [PATCH 2/2] drm/i915: Handle catastrophic error on engine reset Mika Kuoppala
2019-04-12 16:21 ` [PATCH 1/2] drm/i915: Shortcut readiness to reset check Chris Wilson
@ 2019-04-12 16:45 ` Patchwork
2019-04-12 18:01 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Shortcut readiness to reset check (rev3) Patchwork
2019-04-12 20:24 ` ✓ Fi.CI.IGT: " Patchwork
4 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2019-04-12 16:45 UTC (permalink / raw)
To: Mika Kuoppala; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Shortcut readiness to reset check
URL : https://patchwork.freedesktop.org/series/59413/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5923 -> Patchwork_12781
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_12781 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_12781, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/59413/revisions/1/mbox/
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_12781:
### IGT changes ###
#### Possible regressions ####
* igt@runner@aborted:
- fi-icl-y: NOTRUN -> FAIL
Known issues
------------
Here are the changes found in Patchwork_12781 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_cs_nop@fork-compute0:
- fi-icl-y: NOTRUN -> SKIP [fdo#109315] +17
* igt@amdgpu/amd_cs_nop@sync-fork-compute0:
- fi-icl-u3: NOTRUN -> SKIP [fdo#109315] +17
* igt@gem_exec_basic@basic-bsd2:
- fi-icl-y: NOTRUN -> SKIP [fdo#109276] +7
* igt@gem_exec_basic@gtt-bsd1:
- fi-icl-u3: NOTRUN -> SKIP [fdo#109276] +7
* igt@gem_exec_parse@basic-rejected:
- fi-icl-u3: NOTRUN -> SKIP [fdo#109289] +1
- fi-icl-y: NOTRUN -> SKIP [fdo#109289] +1
* igt@i915_selftest@live_contexts:
- fi-icl-y: NOTRUN -> INCOMPLETE [fdo#108569]
* igt@i915_selftest@live_evict:
- fi-bsw-kefka: PASS -> DMESG-WARN [fdo#107709]
* igt@i915_selftest@live_execlists:
- fi-apl-guc: PASS -> INCOMPLETE [fdo#103927] / [fdo#109720]
* igt@kms_busy@basic-flip-c:
- fi-blb-e6850: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
* igt@kms_chamelium@dp-crc-fast:
- fi-blb-e6850: NOTRUN -> SKIP [fdo#109271] +43
- fi-icl-y: NOTRUN -> SKIP [fdo#109284] +8
* igt@kms_chamelium@hdmi-edid-read:
- fi-icl-u3: NOTRUN -> SKIP [fdo#109284] +8
* igt@kms_force_connector_basic@force-load-detect:
- fi-icl-y: NOTRUN -> SKIP [fdo#109285] +3
* igt@kms_force_connector_basic@prune-stale-modes:
- fi-icl-u3: NOTRUN -> SKIP [fdo#109285] +3
* igt@kms_pipe_crc_basic@read-crc-pipe-a:
- fi-byt-clapper: PASS -> FAIL [fdo#103191] +2
* igt@kms_psr@primary_mmap_gtt:
- fi-icl-y: NOTRUN -> SKIP [fdo#110189] +3
* igt@prime_vgem@basic-fence-flip:
- fi-icl-y: NOTRUN -> SKIP [fdo#109294]
* igt@runner@aborted:
- fi-bsw-kefka: NOTRUN -> FAIL [fdo#107709]
- fi-apl-guc: NOTRUN -> FAIL [fdo#108622] / [fdo#109720]
#### Possible fixes ####
* igt@gem_exec_basic@basic-blt:
- fi-icl-y: INCOMPLETE [fdo#110246] -> PASS
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: INCOMPLETE [fdo#107718] -> PASS
* igt@i915_selftest@live_contexts:
- fi-bdw-gvtdvm: DMESG-FAIL [fdo#110235 ] -> PASS
- fi-skl-gvtdvm: DMESG-FAIL [fdo#110235 ] -> PASS
* igt@kms_frontbuffer_tracking@basic:
- fi-byt-clapper: FAIL [fdo#103167] -> PASS
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#107709]: https://bugs.freedesktop.org/show_bug.cgi?id=107709
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#108622]: https://bugs.freedesktop.org/show_bug.cgi?id=108622
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109294]: https://bugs.freedesktop.org/show_bug.cgi?id=109294
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109720]: https://bugs.freedesktop.org/show_bug.cgi?id=109720
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110235 ]: https://bugs.freedesktop.org/show_bug.cgi?id=110235
[fdo#110246]: https://bugs.freedesktop.org/show_bug.cgi?id=110246
Participating hosts (48 -> 42)
------------------------------
Additional (1): fi-icl-u3
Missing (7): fi-kbl-soraka fi-byt-squawks fi-icl-u2 fi-bsw-cyan fi-kbl-7500u fi-ctg-p8600 fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_5923 -> Patchwork_12781
CI_DRM_5923: 8f69ca66d43ef57be72394ba23c2ff1718d94164 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4945: a52cc643cfe6733465cfc9ccb3d21cbdc4fd7506 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12781: c654ecccfc92f8305e8a4ddbc9c4b8783232fcc5 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
c654ecccfc92 drm/i915: Handle catastrophic error on engine reset
ae7fd08a4d65 drm/i915: Shortcut readiness to reset check
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12781/
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 1/2] drm/i915: Shortcut readiness to reset check
2019-04-12 16:21 ` [PATCH 1/2] drm/i915: Shortcut readiness to reset check Chris Wilson
@ 2019-04-12 16:53 ` Mika Kuoppala
0 siblings, 0 replies; 10+ messages in thread
From: Mika Kuoppala @ 2019-04-12 16:53 UTC (permalink / raw)
To: intel-gfx
If the engine says it is ready for reset, it is ready
so avoid further dancing and proceed.
v2: reg (Chris)
v3: request, ack, mask from following patch (Chris)
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_reset.c | 23 ++++++++++++++---------
1 file changed, 14 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reset.c b/drivers/gpu/drm/i915/i915_reset.c
index 68875ba43b8d..ab628a8f6c1f 100644
--- a/drivers/gpu/drm/i915/i915_reset.c
+++ b/drivers/gpu/drm/i915/i915_reset.c
@@ -490,18 +490,23 @@ static int gen11_reset_engines(struct drm_i915_private *i915,
static int gen8_engine_reset_prepare(struct intel_engine_cs *engine)
{
struct intel_uncore *uncore = engine->uncore;
+ const i915_reg_t reg = RING_RESET_CTL(engine->mmio_base);
+ u32 ctl, request, mask, ack;
int ret;
- intel_uncore_write_fw(uncore,
- RING_RESET_CTL(engine->mmio_base),
- _MASKED_BIT_ENABLE(RESET_CTL_REQUEST_RESET));
+ ctl = intel_uncore_read_fw(uncore, reg);
+ if (!(ctl & RESET_CTL_READY_TO_RESET)) {
+ request = RESET_CTL_REQUEST_RESET;
+ mask = RESET_CTL_READY_TO_RESET;
+ ack = RESET_CTL_READY_TO_RESET;
+ } else {
+ return 0;
+ }
- ret = __intel_wait_for_register_fw(uncore,
- RING_RESET_CTL(engine->mmio_base),
- RESET_CTL_READY_TO_RESET,
- RESET_CTL_READY_TO_RESET,
- 700, 0,
- NULL);
+ intel_uncore_write_fw(uncore, reg, _MASKED_BIT_ENABLE(request));
+
+ ret = __intel_wait_for_register_fw(uncore, reg, mask, ack,
+ 700, 0, NULL);
if (ret)
DRM_ERROR("%s: reset request timeout\n", engine->name);
--
2.17.1
_______________________________________________
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^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/2] drm/i915: Handle catastrophic error on engine reset
2019-04-12 16:24 ` Chris Wilson
@ 2019-04-12 16:53 ` Mika Kuoppala
2019-04-12 16:56 ` Chris Wilson
0 siblings, 1 reply; 10+ messages in thread
From: Mika Kuoppala @ 2019-04-12 16:53 UTC (permalink / raw)
To: intel-gfx
If cat error is set, we need to clear it by acking it. Further,
if it is set, we must not do a normal request for reset.
v2: avoid goto (Chris)
v3: comment, error format, direct assign (Chris)
Bspec: 12567
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 6 ++++--
drivers/gpu/drm/i915/i915_reset.c | 18 ++++++++++++++++--
2 files changed, 20 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 8ad2f0a03f28..c1c0f7ab03e9 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2446,8 +2446,10 @@ enum i915_power_well_id {
#define RING_HWS_PGA(base) _MMIO((base) + 0x80)
#define RING_HWS_PGA_GEN6(base) _MMIO((base) + 0x2080)
#define RING_RESET_CTL(base) _MMIO((base) + 0xd0)
-#define RESET_CTL_REQUEST_RESET (1 << 0)
-#define RESET_CTL_READY_TO_RESET (1 << 1)
+#define RESET_CTL_CAT_ERROR REG_BIT(2)
+#define RESET_CTL_READY_TO_RESET REG_BIT(1)
+#define RESET_CTL_REQUEST_RESET REG_BIT(0)
+
#define RING_SEMA_WAIT_POLL(base) _MMIO((base) + 0x24c)
#define HSW_GTT_CACHE_EN _MMIO(0x4024)
diff --git a/drivers/gpu/drm/i915/i915_reset.c b/drivers/gpu/drm/i915/i915_reset.c
index ab628a8f6c1f..8707effc29c4 100644
--- a/drivers/gpu/drm/i915/i915_reset.c
+++ b/drivers/gpu/drm/i915/i915_reset.c
@@ -495,7 +495,19 @@ static int gen8_engine_reset_prepare(struct intel_engine_cs *engine)
int ret;
ctl = intel_uncore_read_fw(uncore, reg);
- if (!(ctl & RESET_CTL_READY_TO_RESET)) {
+
+ if (ctl & RESET_CTL_CAT_ERROR) {
+ request = RESET_CTL_CAT_ERROR;
+ mask = RESET_CTL_CAT_ERROR;
+
+ /* Catastrophic errors need to be cleared */
+ ack = 0;
+
+ /*
+ * For cat errors, ready for reset sequence
+ * needs to be bypassed: HAS#396813
+ */
+ } else if (!(ctl & RESET_CTL_READY_TO_RESET)) {
request = RESET_CTL_REQUEST_RESET;
mask = RESET_CTL_READY_TO_RESET;
ack = RESET_CTL_READY_TO_RESET;
@@ -508,7 +520,9 @@ static int gen8_engine_reset_prepare(struct intel_engine_cs *engine)
ret = __intel_wait_for_register_fw(uncore, reg, mask, ack,
700, 0, NULL);
if (ret)
- DRM_ERROR("%s: reset request timeout\n", engine->name);
+ DRM_ERROR("%s reset request timed out: {request: %08x, RESET_CTL: %08x}\n",
+ engine->name, request,
+ intel_uncore_read_fw(uncore, reg));
return ret;
}
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 2/2] drm/i915: Handle catastrophic error on engine reset
2019-04-12 16:53 ` Mika Kuoppala
@ 2019-04-12 16:56 ` Chris Wilson
0 siblings, 0 replies; 10+ messages in thread
From: Chris Wilson @ 2019-04-12 16:56 UTC (permalink / raw)
To: Mika Kuoppala, intel-gfx
Quoting Mika Kuoppala (2019-04-12 17:53:53)
> If cat error is set, we need to clear it by acking it. Further,
> if it is set, we must not do a normal request for reset.
>
> v2: avoid goto (Chris)
> v3: comment, error format, direct assign (Chris)
> Bspec: 12567
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Lgtm,
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Now if we only knew of a source of catastrophic errors...
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Shortcut readiness to reset check (rev3)
2019-04-12 16:16 [PATCH 1/2] drm/i915: Shortcut readiness to reset check Mika Kuoppala
` (2 preceding siblings ...)
2019-04-12 16:45 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] " Patchwork
@ 2019-04-12 18:01 ` Patchwork
2019-04-12 20:24 ` ✓ Fi.CI.IGT: " Patchwork
4 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2019-04-12 18:01 UTC (permalink / raw)
To: Mika Kuoppala; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Shortcut readiness to reset check (rev3)
URL : https://patchwork.freedesktop.org/series/59413/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5923 -> Patchwork_12782
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/59413/revisions/3/mbox/
Known issues
------------
Here are the changes found in Patchwork_12782 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_cs_nop@sync-fork-compute0:
- fi-icl-u3: NOTRUN -> SKIP [fdo#109315] +17
* igt@gem_exec_basic@gtt-bsd1:
- fi-icl-u3: NOTRUN -> SKIP [fdo#109276] +7
* igt@gem_exec_parse@basic-rejected:
- fi-icl-u3: NOTRUN -> SKIP [fdo#109289] +1
* igt@i915_selftest@live_hangcheck:
- fi-skl-iommu: PASS -> INCOMPLETE [fdo#108602] / [fdo#108744]
* igt@kms_busy@basic-flip-c:
- fi-blb-e6850: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
* igt@kms_chamelium@dp-crc-fast:
- fi-blb-e6850: NOTRUN -> SKIP [fdo#109271] +43
* igt@kms_chamelium@hdmi-edid-read:
- fi-icl-u3: NOTRUN -> SKIP [fdo#109284] +8
* igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size:
- fi-glk-dsi: PASS -> INCOMPLETE [fdo#103359] / [k.org#198133]
* igt@kms_force_connector_basic@prune-stale-modes:
- fi-icl-u3: NOTRUN -> SKIP [fdo#109285] +3
* igt@runner@aborted:
- fi-skl-iommu: NOTRUN -> FAIL [fdo#104108] / [fdo#108602]
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: INCOMPLETE [fdo#107718] -> PASS
* igt@i915_selftest@live_contexts:
- fi-bdw-gvtdvm: DMESG-FAIL [fdo#110235 ] -> PASS
[fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#108602]: https://bugs.freedesktop.org/show_bug.cgi?id=108602
[fdo#108744]: https://bugs.freedesktop.org/show_bug.cgi?id=108744
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#110235 ]: https://bugs.freedesktop.org/show_bug.cgi?id=110235
[k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133
Participating hosts (48 -> 44)
------------------------------
Additional (1): fi-icl-u3
Missing (5): fi-kbl-soraka fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_5923 -> Patchwork_12782
CI_DRM_5923: 8f69ca66d43ef57be72394ba23c2ff1718d94164 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4945: a52cc643cfe6733465cfc9ccb3d21cbdc4fd7506 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12782: 19b32015538cbfd2d6bb9720d6fe25989273da16 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
19b32015538c drm/i915: Handle catastrophic error on engine reset
61460a002ae6 drm/i915: Shortcut readiness to reset check
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12782/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Shortcut readiness to reset check (rev3)
2019-04-12 16:16 [PATCH 1/2] drm/i915: Shortcut readiness to reset check Mika Kuoppala
` (3 preceding siblings ...)
2019-04-12 18:01 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Shortcut readiness to reset check (rev3) Patchwork
@ 2019-04-12 20:24 ` Patchwork
4 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2019-04-12 20:24 UTC (permalink / raw)
To: Mika Kuoppala; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Shortcut readiness to reset check (rev3)
URL : https://patchwork.freedesktop.org/series/59413/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5923_full -> Patchwork_12782_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_12782_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_isolation@bcs0-s3:
- shard-apl: PASS -> DMESG-WARN [fdo#108566] +3
* igt@gem_softpin@noreloc-s3:
- shard-skl: PASS -> INCOMPLETE [fdo#104108] / [fdo#107773]
* igt@gem_tiled_swapping@non-threaded:
- shard-iclb: PASS -> DMESG-WARN [fdo#108686]
* igt@i915_pm_rpm@i2c:
- shard-iclb: PASS -> DMESG-WARN [fdo#109982]
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-kbl: PASS -> DMESG-WARN [fdo#103313]
* igt@kms_frontbuffer_tracking@fbc-stridechange:
- shard-skl: NOTRUN -> FAIL [fdo#103167]
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-mmap-gtt:
- shard-iclb: PASS -> FAIL [fdo#109247] +10
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt:
- shard-iclb: PASS -> FAIL [fdo#103167] +5
* igt@kms_lease@cursor_implicit_plane:
- shard-skl: NOTRUN -> FAIL [fdo#110278]
* igt@kms_lease@page_flip_implicit_plane:
- shard-skl: NOTRUN -> FAIL [fdo#110281]
* igt@kms_panel_fitting@legacy:
- shard-skl: NOTRUN -> FAIL [fdo#105456]
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- shard-skl: PASS -> INCOMPLETE [fdo#104108]
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
- shard-kbl: PASS -> DMESG-WARN [fdo#108566] +1
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-f:
- shard-skl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +14
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: PASS -> FAIL [fdo#108145] +1
* igt@kms_plane_alpha_blend@pipe-c-alpha-7efc:
- shard-skl: NOTRUN -> FAIL [fdo#108145] +4
* igt@kms_psr@primary_blt:
- shard-iclb: PASS -> FAIL [fdo#107383] / [fdo#110215] +2
* igt@kms_psr@psr2_no_drrs:
- shard-iclb: PASS -> SKIP [fdo#109441] +1
* igt@kms_rotation_crc@multiplane-rotation:
- shard-kbl: PASS -> INCOMPLETE [fdo#103665]
* igt@kms_sysfs_edid_timing:
- shard-skl: NOTRUN -> FAIL [fdo#100047]
* igt@perf_pmu@busy-accuracy-50-vcs1:
- shard-skl: NOTRUN -> SKIP [fdo#109271] +140
#### Possible fixes ####
* igt@gem_softpin@noreloc-s3:
- shard-kbl: DMESG-WARN [fdo#103313] -> PASS
* igt@i915_pm_rpm@universal-planes:
- shard-skl: INCOMPLETE [fdo#107807] -> PASS
* igt@i915_selftest@live_workarounds:
- shard-iclb: DMESG-FAIL [fdo#108954] -> PASS
* igt@i915_suspend@sysfs-reader:
- shard-apl: DMESG-WARN [fdo#108566] -> PASS +5
* igt@kms_flip@flip-vs-expired-vblank:
- shard-skl: FAIL [fdo#105363] -> PASS
- shard-glk: FAIL [fdo#105363] -> PASS
* igt@kms_flip@flip-vs-suspend:
- shard-skl: INCOMPLETE [fdo#109507] -> PASS
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-blt:
- shard-iclb: FAIL [fdo#109247] -> PASS +16
* igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw:
- shard-iclb: FAIL [fdo#103167] -> PASS +3
* igt@kms_plane@pixel-format-pipe-b-planes-source-clamping:
- shard-glk: SKIP [fdo#109271] -> PASS
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: FAIL [fdo#110403] -> PASS
* igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping:
- shard-glk: SKIP [fdo#109271] / [fdo#109278] -> PASS
* igt@kms_psr@psr2_primary_mmap_cpu:
- shard-iclb: SKIP [fdo#109441] -> PASS
* igt@kms_psr@suspend:
- shard-skl: INCOMPLETE [fdo#107773] -> PASS
- shard-iclb: FAIL [fdo#107383] / [fdo#110215] -> PASS
* igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
- shard-kbl: DMESG-FAIL [fdo#105763] -> PASS
* igt@kms_rotation_crc@multiplane-rotation-cropping-top:
- shard-kbl: FAIL [fdo#109016] -> PASS
* igt@kms_setmode@basic:
- shard-apl: FAIL [fdo#99912] -> PASS
* igt@tools_test@tools_test:
- shard-snb: SKIP [fdo#109271] -> PASS
#### Warnings ####
* igt@i915_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-skl: INCOMPLETE [fdo#107807] -> SKIP [fdo#109271]
[fdo#100047]: https://bugs.freedesktop.org/show_bug.cgi?id=100047
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103313]: https://bugs.freedesktop.org/show_bug.cgi?id=103313
[fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#105456]: https://bugs.freedesktop.org/show_bug.cgi?id=105456
[fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
[fdo#107383]: https://bugs.freedesktop.org/show_bug.cgi?id=107383
[fdo#107773]: https://bugs.freedesktop.org/show_bug.cgi?id=107773
[fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
[fdo#108954]: https://bugs.freedesktop.org/show_bug.cgi?id=108954
[fdo#109016]: https://bugs.freedesktop.org/show_bug.cgi?id=109016
[fdo#109247]: https://bugs.freedesktop.org/show_bug.cgi?id=109247
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
[fdo#109982]: https://bugs.freedesktop.org/show_bug.cgi?id=109982
[fdo#110215]: https://bugs.freedesktop.org/show_bug.cgi?id=110215
[fdo#110278]: https://bugs.freedesktop.org/show_bug.cgi?id=110278
[fdo#110281]: https://bugs.freedesktop.org/show_bug.cgi?id=110281
[fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (10 -> 9)
------------------------------
Missing (1): shard-hsw
Build changes
-------------
* Linux: CI_DRM_5923 -> Patchwork_12782
CI_DRM_5923: 8f69ca66d43ef57be72394ba23c2ff1718d94164 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4945: a52cc643cfe6733465cfc9ccb3d21cbdc4fd7506 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12782: 19b32015538cbfd2d6bb9720d6fe25989273da16 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12782/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2019-04-12 20:24 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-04-12 16:16 [PATCH 1/2] drm/i915: Shortcut readiness to reset check Mika Kuoppala
2019-04-12 16:16 ` [PATCH 2/2] drm/i915: Handle catastrophic error on engine reset Mika Kuoppala
2019-04-12 16:24 ` Chris Wilson
2019-04-12 16:53 ` Mika Kuoppala
2019-04-12 16:56 ` Chris Wilson
2019-04-12 16:21 ` [PATCH 1/2] drm/i915: Shortcut readiness to reset check Chris Wilson
2019-04-12 16:53 ` Mika Kuoppala
2019-04-12 16:45 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] " Patchwork
2019-04-12 18:01 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Shortcut readiness to reset check (rev3) Patchwork
2019-04-12 20:24 ` ✓ Fi.CI.IGT: " Patchwork
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