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From: Chris Wilson <chris@chris-wilson.co.uk>
To: "Mika Kuoppala" <mika.kuoppala@linux.intel.com>,
	"Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Enable workaround for pixel shader dispatch hang
Date: Mon, 15 Apr 2019 15:29:17 +0100	[thread overview]
Message-ID: <155533855762.22690.16020079162221136181@skylake-alporthouse-com> (raw)
In-Reply-To: <20190415142511.GA24299@intel.com>

Quoting Ville Syrjälä (2019-04-15 15:25:11)
> On Mon, Apr 15, 2019 at 05:21:22PM +0300, Mika Kuoppala wrote:
> > diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
> > index ccaf63679435..4f1a7500ca07 100644
> > --- a/drivers/gpu/drm/i915/intel_workarounds.c
> > +++ b/drivers/gpu/drm/i915/intel_workarounds.c
> > @@ -294,6 +294,15 @@ static void gen9_ctx_workarounds_init(struct intel_engine_cs *engine)
> >                         FLOW_CONTROL_ENABLE |
> >                         PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE);
> >  
> > +     /* Bspec wa: 0651, skl G0 onwards */
> > +     if (!IS_SKL_REVID(i915, SKL_REVID_A0, SKL_REVID_F0)) {
> 
> Aren't all those pre-production?

intel_detect_preproduction_hw() says yes.
-Chris
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  reply	other threads:[~2019-04-15 14:29 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-15 14:21 [PATCH] drm/i915: Enable workaround for pixel shader dispatch hang Mika Kuoppala
2019-04-15 14:23 ` Chris Wilson
2019-04-15 14:25 ` Ville Syrjälä
2019-04-15 14:29   ` Chris Wilson [this message]
2019-04-15 14:34     ` Mika Kuoppala
2019-04-15 14:38 ` Mika Kuoppala
2019-04-15 14:45 ` Mika Kuoppala
2019-04-16  8:24   ` Chris Wilson
2019-04-16 13:26     ` Mika Kuoppala
2019-04-16 13:30       ` Chris Wilson
2019-04-15 15:43 ` ✗ Fi.CI.BAT: failure for drm/i915: Enable workaround for pixel shader dispatch hang (rev3) Patchwork

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