* [U-Boot] [PATCH] armv8: lx2160ardb: invert AQR107 pins polarity
@ 2019-04-22 8:57 Florin Chiculita
2019-05-22 12:32 ` [U-Boot] [EXT] " Prabhakar Kushwaha
0 siblings, 1 reply; 2+ messages in thread
From: Florin Chiculita @ 2019-04-22 8:57 UTC (permalink / raw)
To: u-boot
AQR107 PHYs interrupt pins are active-low, while the GIC expects a
level-high signal.
Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
---
board/freescale/lx2160a/lx2160a.c | 8 ++++++++
include/configs/lx2160ardb.h | 1 +
2 files changed, 9 insertions(+)
diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index b763f6d..fa4520b 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -461,12 +461,20 @@ unsigned long get_board_ddr_clk(void)
int board_init(void)
{
+#if defined(CONFIG_FSL_MC_ENET) && defined(CONFIG_TARGET_LX2160ARDB)
+ u32 __iomem *irq_ccsr = (u32 __iomem *)ISC_BASE;
+#endif
#ifdef CONFIG_ENV_IS_NOWHERE
gd->env_addr = (ulong)&default_environment[0];
#endif
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
+#if defined(CONFIG_FSL_MC_ENET) && defined(CONFIG_TARGET_LX2160ARDB)
+ /* invert AQR107 IRQ pins polarity */
+ out_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR107_IRQ_MASK);
+#endif
+
#ifdef CONFIG_FSL_CAAM
sec_init();
#endif
diff --git a/include/configs/lx2160ardb.h b/include/configs/lx2160ardb.h
index 7acd93c..31dd43d 100644
--- a/include/configs/lx2160ardb.h
+++ b/include/configs/lx2160ardb.h
@@ -60,6 +60,7 @@
#define AQR107_PHY_ADDR1 0x04
#define AQR107_PHY_ADDR2 0x05
+#define AQR107_IRQ_MASK 0x0C
#define CORTINA_NO_FW_UPLOAD
#define CORTINA_PHY_ADDR1 0x0
--
1.9.3
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [U-Boot] [EXT] [PATCH] armv8: lx2160ardb: invert AQR107 pins polarity
2019-04-22 8:57 [U-Boot] [PATCH] armv8: lx2160ardb: invert AQR107 pins polarity Florin Chiculita
@ 2019-05-22 12:32 ` Prabhakar Kushwaha
0 siblings, 0 replies; 2+ messages in thread
From: Prabhakar Kushwaha @ 2019-05-22 12:32 UTC (permalink / raw)
To: u-boot
> -----Original Message-----
> From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Florin Chiculita
> Sent: Monday, April 22, 2019 2:28 PM
> To: u-boot at lists.denx.de
> Subject: [EXT] [U-Boot] [PATCH] armv8: lx2160ardb: invert AQR107 pins polarity
>
> WARNING: This email was created outside of NXP. DO NOT CLICK links or
> attachments unless you recognize the sender and know the content is safe.
>
>
>
> AQR107 PHYs interrupt pins are active-low, while the GIC expects a level-high
> signal.
>
> Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
> ---
updated subject and applied to fsl-qoriq master, awaiting upstream
--pk
^ permalink raw reply [flat|nested] 2+ messages in thread
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2019-04-22 8:57 [U-Boot] [PATCH] armv8: lx2160ardb: invert AQR107 pins polarity Florin Chiculita
2019-05-22 12:32 ` [U-Boot] [EXT] " Prabhakar Kushwaha
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