* [U-Boot] [PATCH v1] ARM: socfpga: stratix10: Probe FPGA status before bridge enable
@ 2019-05-03 8:18 chee.hong.ang at intel.com
2019-05-03 15:10 ` Marek Vasut
0 siblings, 1 reply; 2+ messages in thread
From: chee.hong.ang at intel.com @ 2019-05-03 8:18 UTC (permalink / raw)
To: u-boot
From: "Ang, Chee Hong" <chee.hong.ang@intel.com>
Send CONFIG_STATUS and RECONFIG_STATUS mailbox commands to Secure
Device Manager (SDM) to get the status of FPGA and make sure the
FPGA is in user mode before enable the bridge.
Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
---
arch/arm/mach-socfpga/misc_s10.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/mach-socfpga/misc_s10.c b/arch/arm/mach-socfpga/misc_s10.c
index 113eace..0e4133f 100644
--- a/arch/arm/mach-socfpga/misc_s10.c
+++ b/arch/arm/mach-socfpga/misc_s10.c
@@ -16,6 +16,7 @@
#include <asm/arch/misc.h>
#include <asm/pl310.h>
#include <linux/libfdt.h>
+#include <asm/arch/mailbox_s10.h>
#include <dt-bindings/reset/altr,rst-mgr-s10.h>
@@ -152,5 +153,16 @@ int arch_early_init_r(void)
void do_bridge_reset(int enable)
{
+ /* Check FPGA status before bridge enable */
+ if (enable) {
+ int ret = mbox_get_fpga_config_status(MBOX_RECONFIG_STATUS);
+
+ if (ret && ret != MBOX_CFGSTAT_STATE_CONFIG)
+ ret = mbox_get_fpga_config_status(MBOX_CONFIG_STATUS);
+
+ if (ret)
+ return;
+ }
+
socfpga_bridges_reset(enable);
}
--
2.7.4
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [U-Boot] [PATCH v1] ARM: socfpga: stratix10: Probe FPGA status before bridge enable
2019-05-03 8:18 [U-Boot] [PATCH v1] ARM: socfpga: stratix10: Probe FPGA status before bridge enable chee.hong.ang at intel.com
@ 2019-05-03 15:10 ` Marek Vasut
0 siblings, 0 replies; 2+ messages in thread
From: Marek Vasut @ 2019-05-03 15:10 UTC (permalink / raw)
To: u-boot
On 5/3/19 10:18 AM, chee.hong.ang at intel.com wrote:
> From: "Ang, Chee Hong" <chee.hong.ang@intel.com>
>
> Send CONFIG_STATUS and RECONFIG_STATUS mailbox commands to Secure
> Device Manager (SDM) to get the status of FPGA and make sure the
> FPGA is in user mode before enable the bridge.
>
> Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
> ---
> arch/arm/mach-socfpga/misc_s10.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm/mach-socfpga/misc_s10.c b/arch/arm/mach-socfpga/misc_s10.c
> index 113eace..0e4133f 100644
> --- a/arch/arm/mach-socfpga/misc_s10.c
> +++ b/arch/arm/mach-socfpga/misc_s10.c
> @@ -16,6 +16,7 @@
> #include <asm/arch/misc.h>
> #include <asm/pl310.h>
> #include <linux/libfdt.h>
> +#include <asm/arch/mailbox_s10.h>
>
> #include <dt-bindings/reset/altr,rst-mgr-s10.h>
>
> @@ -152,5 +153,16 @@ int arch_early_init_r(void)
>
> void do_bridge_reset(int enable)
> {
> + /* Check FPGA status before bridge enable */
> + if (enable) {
> + int ret = mbox_get_fpga_config_status(MBOX_RECONFIG_STATUS);
> +
> + if (ret && ret != MBOX_CFGSTAT_STATE_CONFIG)
> + ret = mbox_get_fpga_config_status(MBOX_CONFIG_STATUS);
> +
> + if (ret)
> + return;
> + }
> +
> socfpga_bridges_reset(enable);
> }
>
Applied, thanks
--
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 2+ messages in thread
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2019-05-03 8:18 [U-Boot] [PATCH v1] ARM: socfpga: stratix10: Probe FPGA status before bridge enable chee.hong.ang at intel.com
2019-05-03 15:10 ` Marek Vasut
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