[U-Boot] [PATCH 00/12] SPI flash STM32 MCU's fixes

[U-Boot] [PATCH 00/12] SPI flash STM32 MCU's fixes

[Patrice Chotard]

This series update MCU's DT in order to fix SPI flash
configuration:
  - Adds MPU region dedicated for SPI flash used in memory mapped mode.
  - Fixes compatible string.
  - Fixes memory map size.
  - Updates spi-tx-bus-width and spi-rx-bus-width property values.
  - Adds QSPI flash support for STM32F469-disco board


Patrice Chotard (12):
  mach-stm32: Add MPU region for spi-nor memory mapped region
  ARM: dts: stm32: Fix qspi memory map size for stm32f7 boards
  ARM: dts: stm32: add qspi flash compatible string for stm32f769-disco
  ARM: dts: stm32: add qspi flash compatible string for stm32f746-eval
  ARM: dts: stm32: Set spi-rx/tx-bus-width to 4 for stm32f746-eval
  ARM: dts: stm32: Set spi-rx/tx-bus-width to 4 for stm32f746-disco
  ARM: dts: stm32: Remove useless spi-nor compatible string
  ARM: dts: stm32: Set spi-rx/tx-bus-width to 4 for stm32f769-disco
  ARM: dts: stm32: Add qspi support for stm32f469-disco board
  spi: Kconfig: Add STM32F4 support for STM32_QSPI driver
  configs: stm32f469-disco: Enable QSPI relative flags
  configs: stm32f469-disco: Disable PINCTRL_FULL flag

 arch/arm/dts/stm32746g-eval-u-boot.dtsi  |  6 +++--
 arch/arm/dts/stm32f469-disco-u-boot.dtsi | 39 ++++++++++++++++++++++++++++++++
 arch/arm/dts/stm32f746-disco-u-boot.dtsi |  8 +++----
 arch/arm/dts/stm32f769-disco-u-boot.dtsi |  3 +++
 arch/arm/mach-stm32/soc.c                |  3 +++
 configs/stm32f469-discovery_defconfig    |  9 ++++++++
 drivers/spi/Kconfig                      |  2 +-
 7 files changed, 63 insertions(+), 7 deletions(-)

-- 
1.9.1

[U-Boot] [PATCH 01/12] mach-stm32: Add MPU region for spi-nor memory mapped region

[Patrice Chotard]

The Quad-SPI interface is able to manage up to 256Mbytes Flash
memory starting from 0x90000000 to 0x9FFFFFFF in the memory
mapped mode.
Add a dedicated MPU region into stm32_region_config.

See application note AN4760 available at www.st.com

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---

 arch/arm/mach-stm32/soc.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/mach-stm32/soc.c b/arch/arm/mach-stm32/soc.c
index 738305c..6ae31d3 100644
--- a/arch/arm/mach-stm32/soc.c
+++ b/arch/arm/mach-stm32/soc.c
@@ -21,6 +21,9 @@ int arch_cpu_init(void)
 		O_I_WB_RD_WR_ALLOC, REGION_16MB },
 #endif
 
+		{ 0x90000000, REGION_1, XN_DIS, PRIV_RW_USR_RW,
+		SHARED_WRITE_BUFFERED, REGION_256MB },
+
 #if defined(CONFIG_STM32F7) || defined(CONFIG_STM32H7)
 		{ 0xC0000000, REGION_0, XN_DIS, PRIV_RW_USR_RW,
 		O_I_WB_RD_WR_ALLOC, REGION_512MB },
-- 
1.9.1

[U-Boot] [PATCH 02/12] ARM: dts: stm32: Fix qspi memory map size for stm32f7 boards

[Patrice Chotard]

stm32f746-disco embeds a 16Mb qspi flash, stm32f746-eval and
stm32f769-disco embeds a 64Mb qspi flash.
Update the reg property accordingly

Remove deprecated memory-map property.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---

 arch/arm/dts/stm32746g-eval-u-boot.dtsi  | 1 +
 arch/arm/dts/stm32f746-disco-u-boot.dtsi | 2 +-
 arch/arm/dts/stm32f769-disco-u-boot.dtsi | 1 +
 3 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/stm32746g-eval-u-boot.dtsi b/arch/arm/dts/stm32746g-eval-u-boot.dtsi
index 9b55bb7..935d44d 100644
--- a/arch/arm/dts/stm32746g-eval-u-boot.dtsi
+++ b/arch/arm/dts/stm32746g-eval-u-boot.dtsi
@@ -177,6 +177,7 @@
 };
 
 &qspi {
+	reg = <0xA0001000 0x1000>, <0x90000000 0x4000000>;
 	qflash0: n25q512a {
 		#address-cells = <1>;
 		#size-cells = <1>;
diff --git a/arch/arm/dts/stm32f746-disco-u-boot.dtsi b/arch/arm/dts/stm32f746-disco-u-boot.dtsi
index bc337b1..a6799be 100644
--- a/arch/arm/dts/stm32f746-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f746-disco-u-boot.dtsi
@@ -234,6 +234,7 @@
 };
 
 &qspi {
+	reg = <0xA0001000 0x1000>, <0x90000000 0x1000000>;
 	qflash0: n25q128a {
 		#address-cells = <1>;
 		#size-cells = <1>;
@@ -241,7 +242,6 @@
 		spi-max-frequency = <108000000>;
 		spi-tx-bus-width = <1>;
 		spi-rx-bus-width = <1>;
-		memory-map = <0x90000000 0x1000000>;
 		reg = <0>;
 	};
 };
diff --git a/arch/arm/dts/stm32f769-disco-u-boot.dtsi b/arch/arm/dts/stm32f769-disco-u-boot.dtsi
index e9e43cb..96770da 100644
--- a/arch/arm/dts/stm32f769-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f769-disco-u-boot.dtsi
@@ -155,6 +155,7 @@
 };
 
 &qspi {
+	reg = <0xA0001000 0x1000>, <0x90000000 0x4000000>;
 	flash0: mx66l51235l {
 		#address-cells = <1>;
 		#size-cells = <1>;
-- 
1.9.1

[U-Boot] [PATCH 03/12] ARM: dts: stm32: add qspi flash compatible string for stm32f769-disco

[Patrice Chotard]

Add missing flash compatible string to be able to read/write into
qspi flash.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---

 arch/arm/dts/stm32f769-disco-u-boot.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/dts/stm32f769-disco-u-boot.dtsi b/arch/arm/dts/stm32f769-disco-u-boot.dtsi
index 96770da..1e8cd6d 100644
--- a/arch/arm/dts/stm32f769-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f769-disco-u-boot.dtsi
@@ -159,6 +159,7 @@
 	flash0: mx66l51235l {
 		#address-cells = <1>;
 		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
 		spi-max-frequency = <108000000>;
 		spi-rx-bus-width = <4>;
 		reg = <0>;
-- 
1.9.1

[U-Boot] [PATCH 04/12] ARM: dts: stm32: add qspi flash compatible string for stm32f746-eval

[Patrice Chotard]

Add missing flash compatible string to be able to read/write into
qspi flash.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---

 arch/arm/dts/stm32746g-eval-u-boot.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/dts/stm32746g-eval-u-boot.dtsi b/arch/arm/dts/stm32746g-eval-u-boot.dtsi
index 935d44d..58c6adb 100644
--- a/arch/arm/dts/stm32746g-eval-u-boot.dtsi
+++ b/arch/arm/dts/stm32746g-eval-u-boot.dtsi
@@ -181,6 +181,7 @@
 	qflash0: n25q512a {
 		#address-cells = <1>;
 		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
 		spi-max-frequency = <108000000>;
 		spi-tx-bus-width = <1>;
 		spi-rx-bus-width = <1>;
-- 
1.9.1

[U-Boot] [PATCH 05/12] ARM: dts: stm32: Set spi-rx/tx-bus-width to 4 for stm32f746-eval

[Patrice Chotard]

As n25q512a qspi flash supports quad input fast program and
quad input fast read, set spi-tx_bus-width and spi-rx_bus-width
to 4.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---

 arch/arm/dts/stm32746g-eval-u-boot.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/stm32746g-eval-u-boot.dtsi b/arch/arm/dts/stm32746g-eval-u-boot.dtsi
index 58c6adb..d5fb927 100644
--- a/arch/arm/dts/stm32746g-eval-u-boot.dtsi
+++ b/arch/arm/dts/stm32746g-eval-u-boot.dtsi
@@ -183,8 +183,8 @@
 		#size-cells = <1>;
 		compatible = "jedec,spi-nor";
 		spi-max-frequency = <108000000>;
-		spi-tx-bus-width = <1>;
-		spi-rx-bus-width = <1>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
 		reg = <0>;
 	};
 };
-- 
1.9.1

[U-Boot] [PATCH 06/12] ARM: dts: stm32: Set spi-rx/tx-bus-width to 4 for stm32f746-disco

[Patrice Chotard]

As n25q128 qspi flash supports quad input fast program and
quad input fast read, set spi-tx_bus-width and spi-rx_bus-width
to 4.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---

 arch/arm/dts/stm32f746-disco-u-boot.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/stm32f746-disco-u-boot.dtsi b/arch/arm/dts/stm32f746-disco-u-boot.dtsi
index a6799be..bbe90fa 100644
--- a/arch/arm/dts/stm32f746-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f746-disco-u-boot.dtsi
@@ -240,8 +240,8 @@
 		#size-cells = <1>;
 		compatible = "micron,n25q128a13", "jedec,spi-nor";
 		spi-max-frequency = <108000000>;
-		spi-tx-bus-width = <1>;
-		spi-rx-bus-width = <1>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
 		reg = <0>;
 	};
 };
-- 
1.9.1

[U-Boot] [PATCH 07/12] ARM: dts: stm32: Remove useless spi-nor compatible string

[Patrice Chotard]

Compatible string "micron,n25q128a13" is useless, remove it.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---

 arch/arm/dts/stm32f746-disco-u-boot.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/dts/stm32f746-disco-u-boot.dtsi b/arch/arm/dts/stm32f746-disco-u-boot.dtsi
index bbe90fa..ade7285 100644
--- a/arch/arm/dts/stm32f746-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f746-disco-u-boot.dtsi
@@ -238,7 +238,7 @@
 	qflash0: n25q128a {
 		#address-cells = <1>;
 		#size-cells = <1>;
-		compatible = "micron,n25q128a13", "jedec,spi-nor";
+		compatible = "jedec,spi-nor";
 		spi-max-frequency = <108000000>;
 		spi-tx-bus-width = <4>;
 		spi-rx-bus-width = <4>;
-- 
1.9.1

[U-Boot] [PATCH 08/12] ARM: dts: stm32: Set spi-rx/tx-bus-width to 4 for stm32f769-disco

[Patrice Chotard]

As mx66l512 qspi flash supports quad input fast program and
quad input fast read, set spi-tx_bus-width and spi-rx_bus-width
to 4.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---

 arch/arm/dts/stm32f769-disco-u-boot.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/dts/stm32f769-disco-u-boot.dtsi b/arch/arm/dts/stm32f769-disco-u-boot.dtsi
index 1e8cd6d..53a645d 100644
--- a/arch/arm/dts/stm32f769-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f769-disco-u-boot.dtsi
@@ -161,6 +161,7 @@
 		#size-cells = <1>;
 		compatible = "jedec,spi-nor";
 		spi-max-frequency = <108000000>;
+		spi-tx-bus-width = <4>;
 		spi-rx-bus-width = <4>;
 		reg = <0>;
 	};
-- 
1.9.1

[U-Boot] [PATCH 09/12] ARM: dts: stm32: Add qspi support for stm32f469-disco board

[Patrice Chotard]

Add device tree nodes to support qspi for stm32f469-disco board.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---

 arch/arm/dts/stm32f469-disco-u-boot.dtsi | 39 ++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
index a980ac4..3da308e 100644
--- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
@@ -23,6 +23,7 @@
 		gpio8 = &gpioi;
 		gpio9 = &gpioj;
 		gpio10 = &gpiok;
+		spi0 = &qspi;
 	};
 
 	soc {
@@ -64,6 +65,19 @@
 			       st,sdram-refcount = < 1292 >;
 		       };
 		};
+
+		qspi: quadspi at A0001000 {
+			compatible = "st,stm32-qspi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xA0001000 0x1000>, <0x90000000 0x10000000>;
+			reg-names = "qspi", "qspi_mm";
+			interrupts = <91>;
+			spi-max-frequency = <108000000>;
+			clocks = <&rcc 0 STM32F4_AHB3_CLOCK(QSPI)>;
+			resets = <&rcc STM32F4_AHB3_RESET(QSPI)>;
+			pinctrl-0 = <&qspi_pins>;
+		};
 	};
 };
 
@@ -205,6 +219,18 @@
 		};
 	};
 
+	qspi_pins: qspi at 0 {
+		pins {
+			pinmux = <STM32_PINMUX('F',10, AF9)>, /* CLK */
+				 <STM32_PINMUX('B', 6, AF10)>, /* BK1_NCS */
+				 <STM32_PINMUX('F', 8, AF10)>, /* BK1_IO0 */
+				 <STM32_PINMUX('F', 9, AF10)>, /* BK1_IO1 */
+				 <STM32_PINMUX('F', 7, AF9)>, /* BK1_IO2 */
+				 <STM32_PINMUX('F', 6, AF9)>; /* BK1_IO3 */
+			slew-rate = <2>;
+		};
+	};
+
 	usart3_pins_a: usart3 at 0	{
 		u-boot,dm-pre-reloc;
 		pins1 {
@@ -227,3 +253,16 @@
 &syscfg {
 	u-boot,dm-pre-reloc;
 };
+
+&qspi {
+	reg = <0xA0001000 0x1000>, <0x90000000 0x1000000>;
+	flash0: n25q128a {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		spi-max-frequency = <108000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+		reg = <0>;
+	};
+};
-- 
1.9.1

[U-Boot] [PATCH 10/12] spi: Kconfig: Add STM32F4 support for STM32_QSPI driver

[Patrice Chotard]

Allow to select STM32_QSPI driver on STM32F4 SoCs.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---

 drivers/spi/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index fb794ad..e9dadf0 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -222,7 +222,7 @@ config SPI_SUNXI
 
 config STM32_QSPI
 	bool "STM32F7 QSPI driver"
-	depends on STM32F7 || ARCH_STM32MP
+	depends on STM32F4 || STM32F7 || ARCH_STM32MP
 	help
 	  Enable the STM32F7 Quad-SPI (QSPI) driver. This driver can be
 	  used to access the SPI NOR flash chips on platforms embedding
-- 
1.9.1

[U-Boot] [PATCH 11/12] configs: stm32f469-disco: Enable QSPI relative flags

[Patrice Chotard]

Enable CMD_SF, MTD, DM_SPI_FLASH, SPI_FLASH, SPI, DM_SPI and
STM32_QSPI flags to be able to use the embedded n25q128a QSPI flash
on stm32f469-disco board.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---

 configs/stm32f469-discovery_defconfig | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/configs/stm32f469-discovery_defconfig b/configs/stm32f469-discovery_defconfig
index 377f19b..174f807 100644
--- a/configs/stm32f469-discovery_defconfig
+++ b/configs/stm32f469-discovery_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GPT=y
 # CONFIG_RANDOM_UUID is not set
 CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MII is not set
 CONFIG_CMD_CACHE=y
@@ -25,4 +26,11 @@ CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="stm32f469-disco"
 CONFIG_DM_MMC=y
 CONFIG_ARM_PL180_MMCI=y
+CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_STM32_QSPI=y
-- 
1.9.1

[U-Boot] [PATCH 12/12] configs: stm32f469-disco: Disable PINCTRL_FULL flag

[Patrice Chotard]

Disable unused PINCTRL_FULL flag.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---

 configs/stm32f469-discovery_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/stm32f469-discovery_defconfig b/configs/stm32f469-discovery_defconfig
index 174f807..dcd0697 100644
--- a/configs/stm32f469-discovery_defconfig
+++ b/configs/stm32f469-discovery_defconfig
@@ -31,6 +31,7 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_PINCTRL_FULL is not set
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_STM32_QSPI=y
-- 
1.9.1