From: Weiyi Lu <weiyi.lu@mediatek.com>
To: Stephen Boyd <sboyd@kernel.org>
Cc: Matthias Brugger <matthias.bgg@gmail.com>,
James Liao <jamesjj.liao@mediatek.com>,
Fan Chen <fan.chen@mediatek.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>, <linux-clk@vger.kernel.org>,
<srv_heupstream@mediatek.com>,
Biao Huang <biao.huang@mediatek.com>
Subject: Re: [RFC v1] clk: core: support clocks that need to be enabled during re-parent
Date: Wed, 26 Jun 2019 09:05:22 +0800 [thread overview]
Message-ID: <1561511122.24282.10.camel@mtksdaap41> (raw)
In-Reply-To: <20190625221415.B0DC22086D@mail.kernel.org>
On Tue, 2019-06-25 at 15:14 -0700, Stephen Boyd wrote:
> Quoting Weiyi Lu (2019-06-09 20:44:53)
> > When using property assigned-clock-parents to assign parent clocks,
> > core clocks might still be disabled during re-parent.
> > Add flag 'CLK_OPS_CORE_ENABLE' for those clocks must be enabled
> > during re-parent.
> >
> > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
>
> Can you further describe the scenario where this is a problem? Is it
> some sort of clk that is enabled by default out of the bootloader and is
> then configured to have an 'assigned-clock-parents' property to change
> the parent, but that clk needs to be "enabled" so that the framework
> turns on the parents for the parent switch?
When driver is built as module(.ko) and install at runtime after the
whole initialization stage. Clk might already be turned off before
configuring by assigned-clock-parents. For such clock design that need
to have clock enabled during re-parent, the configuration of
assigned-clock-parents might be failed. That's the problem we have now.
Do you have any suggestion for such usage of clocks? Many thanks.
>
WARNING: multiple messages have this Message-ID (diff)
From: Weiyi Lu <weiyi.lu@mediatek.com>
To: Stephen Boyd <sboyd@kernel.org>
Cc: Matthias Brugger <matthias.bgg@gmail.com>,
James Liao <jamesjj.liao@mediatek.com>,
Fan Chen <fan.chen@mediatek.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org,
linux-clk@vger.kernel.org, srv_heupstream@mediatek.com,
Biao Huang <biao.huang@mediatek.com>
Subject: Re: [RFC v1] clk: core: support clocks that need to be enabled during re-parent
Date: Wed, 26 Jun 2019 09:05:22 +0800 [thread overview]
Message-ID: <1561511122.24282.10.camel@mtksdaap41> (raw)
In-Reply-To: <20190625221415.B0DC22086D@mail.kernel.org>
On Tue, 2019-06-25 at 15:14 -0700, Stephen Boyd wrote:
> Quoting Weiyi Lu (2019-06-09 20:44:53)
> > When using property assigned-clock-parents to assign parent clocks,
> > core clocks might still be disabled during re-parent.
> > Add flag 'CLK_OPS_CORE_ENABLE' for those clocks must be enabled
> > during re-parent.
> >
> > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
>
> Can you further describe the scenario where this is a problem? Is it
> some sort of clk that is enabled by default out of the bootloader and is
> then configured to have an 'assigned-clock-parents' property to change
> the parent, but that clk needs to be "enabled" so that the framework
> turns on the parents for the parent switch?
When driver is built as module(.ko) and install at runtime after the
whole initialization stage. Clk might already be turned off before
configuring by assigned-clock-parents. For such clock design that need
to have clock enabled during re-parent, the configuration of
assigned-clock-parents might be failed. That's the problem we have now.
Do you have any suggestion for such usage of clocks? Many thanks.
>
WARNING: multiple messages have this Message-ID (diff)
From: Weiyi Lu <weiyi.lu@mediatek.com>
To: Stephen Boyd <sboyd@kernel.org>
Cc: James Liao <jamesjj.liao@mediatek.com>,
srv_heupstream@mediatek.com, Biao Huang <biao.huang@mediatek.com>,
linux-kernel@vger.kernel.org, Fan Chen <fan.chen@mediatek.com>,
linux-mediatek@lists.infradead.org,
Matthias Brugger <matthias.bgg@gmail.com>,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [RFC v1] clk: core: support clocks that need to be enabled during re-parent
Date: Wed, 26 Jun 2019 09:05:22 +0800 [thread overview]
Message-ID: <1561511122.24282.10.camel@mtksdaap41> (raw)
In-Reply-To: <20190625221415.B0DC22086D@mail.kernel.org>
On Tue, 2019-06-25 at 15:14 -0700, Stephen Boyd wrote:
> Quoting Weiyi Lu (2019-06-09 20:44:53)
> > When using property assigned-clock-parents to assign parent clocks,
> > core clocks might still be disabled during re-parent.
> > Add flag 'CLK_OPS_CORE_ENABLE' for those clocks must be enabled
> > during re-parent.
> >
> > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
>
> Can you further describe the scenario where this is a problem? Is it
> some sort of clk that is enabled by default out of the bootloader and is
> then configured to have an 'assigned-clock-parents' property to change
> the parent, but that clk needs to be "enabled" so that the framework
> turns on the parents for the parent switch?
When driver is built as module(.ko) and install at runtime after the
whole initialization stage. Clk might already be turned off before
configuring by assigned-clock-parents. For such clock design that need
to have clock enabled during re-parent, the configuration of
assigned-clock-parents might be failed. That's the problem we have now.
Do you have any suggestion for such usage of clocks? Many thanks.
>
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-06-26 1:05 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-10 3:44 [RFC v1] clk: core: support clocks that need to be enabled during re-parent Weiyi Lu
2019-06-10 3:44 ` Weiyi Lu
2019-06-10 3:44 ` Weiyi Lu
2019-06-10 5:54 ` Greg KH
2019-06-10 5:54 ` Greg KH
2019-06-25 22:14 ` Stephen Boyd
2019-06-25 22:14 ` Stephen Boyd
2019-06-25 22:14 ` Stephen Boyd
2019-06-26 1:05 ` Weiyi Lu [this message]
2019-06-26 1:05 ` Weiyi Lu
2019-06-26 1:05 ` Weiyi Lu
2019-06-26 3:52 ` Stephen Boyd
2019-06-26 3:52 ` Stephen Boyd
2019-09-03 3:08 ` Weiyi Lu
2019-09-03 3:08 ` Weiyi Lu
2019-09-03 3:08 ` Weiyi Lu
2021-01-23 18:42 ` Laurent Pinchart
2021-01-23 18:42 ` Laurent Pinchart
2021-01-23 18:42 ` Laurent Pinchart
2021-02-11 3:26 ` Stephen Boyd
2021-02-11 3:26 ` Stephen Boyd
2021-02-11 3:26 ` Stephen Boyd
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