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From: Liu Yi L <yi.l.liu@intel.com>
To: qemu-devel@nongnu.org, mst@redhat.com, pbonzini@redhat.com,
	alex.williamson@redhat.com, peterx@redhat.com
Cc: eric.auger@redhat.com, david@gibson.dropbear.id.au,
	tianyu.lan@intel.com, kevin.tian@intel.com, yi.l.liu@intel.com,
	jun.j.tian@intel.com, yi.y.sun@intel.com, kvm@vger.kernel.org,
	Jacob Pan <jacob.jun.pan@linux.intel.com>,
	Yi Sun <yi.y.sun@linux.intel.com>
Subject: [RFC v1 18/18] intel_iommu: do not passdown pasid bind for PASID #0
Date: Fri,  5 Jul 2019 19:01:51 +0800	[thread overview]
Message-ID: <1562324511-2910-19-git-send-email-yi.l.liu@intel.com> (raw)
In-Reply-To: <1562324511-2910-1-git-send-email-yi.l.liu@intel.com>

RID_PASID field was introduced in VT-d 3.0 spec, it is used for DMA
requests w/o PASID in scalable mode VT-d. It is also known as IOVA.
And in VT-d 3.1 spec, there is further definition on it:

"Implementations not supporting RID_PASID capability (ECAP_REG.RPS is
0b), use a PASID value of 0 to perform address translation for requests
without PASID."

This patch adds a check on the PASIDs which are going to be bound to
device. For PASID #0, no need to passdown pasid binding since PASID #0
is used as RID_PASID for requests without pasid. Reason is current Intel
vIOMMU supports guest IOVA by shadowing guest 2nd level page table.
However, in future, if guest OS uses 1st level page table to store IOVA
mappings, thus guest IOVA support will also be done via nested translation
in host side. Then vIOMMU could passdown the pasid binding for PASID #0
to host with a special PASID value. A special PASID value is to indicate
host to bind the guest page table to a proper PASID. e.g PASID value from
RID_PASID field for PF/VF or default PASID for ADI (Assignable Device
Interface in Scalable IOV solution).

Cc: Kevin Tian <kevin.tian@intel.com>
Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
Cc: Peter Xu <peterx@redhat.com>
Cc: Yi Sun <yi.y.sun@linux.intel.com>
Signed-off-by: Liu Yi L <yi.l.liu@intel.com>
---
 hw/i386/intel_iommu.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index e4286e5..ee55209 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -1853,6 +1853,14 @@ static void vtd_bind_guest_pasid(IntelIOMMUState *s, int bus_n,
 {
     PCIBus *bus;
     struct gpasid_bind_data *g_bind_data;
+
+    if (pasid < VTD_MIN_HPASID) {
+        /*
+         * If pasid < VTD_HPASID_MIN, this pasid is not allocated
+         * from host. No need to passdown the changes on it to host.
+         */
+        return;
+    }
     bus = vtd_find_pci_bus_from_bus_num(s, bus_n);
     g_bind_data = g_malloc0(sizeof(*g_bind_data));
 
-- 
2.7.4


WARNING: multiple messages have this Message-ID (diff)
From: Liu Yi L <yi.l.liu@intel.com>
To: qemu-devel@nongnu.org, mst@redhat.com, pbonzini@redhat.com,
	alex.williamson@redhat.com, peterx@redhat.com
Cc: tianyu.lan@intel.com, kevin.tian@intel.com, yi.l.liu@intel.com,
	Yi Sun <yi.y.sun@linux.intel.com>,
	kvm@vger.kernel.org, jun.j.tian@intel.com, eric.auger@redhat.com,
	yi.y.sun@intel.com, Jacob Pan <jacob.jun.pan@linux.intel.com>,
	david@gibson.dropbear.id.au
Subject: [Qemu-devel] [RFC v1 18/18] intel_iommu: do not passdown pasid bind for PASID #0
Date: Fri,  5 Jul 2019 19:01:51 +0800	[thread overview]
Message-ID: <1562324511-2910-19-git-send-email-yi.l.liu@intel.com> (raw)
In-Reply-To: <1562324511-2910-1-git-send-email-yi.l.liu@intel.com>

RID_PASID field was introduced in VT-d 3.0 spec, it is used for DMA
requests w/o PASID in scalable mode VT-d. It is also known as IOVA.
And in VT-d 3.1 spec, there is further definition on it:

"Implementations not supporting RID_PASID capability (ECAP_REG.RPS is
0b), use a PASID value of 0 to perform address translation for requests
without PASID."

This patch adds a check on the PASIDs which are going to be bound to
device. For PASID #0, no need to passdown pasid binding since PASID #0
is used as RID_PASID for requests without pasid. Reason is current Intel
vIOMMU supports guest IOVA by shadowing guest 2nd level page table.
However, in future, if guest OS uses 1st level page table to store IOVA
mappings, thus guest IOVA support will also be done via nested translation
in host side. Then vIOMMU could passdown the pasid binding for PASID #0
to host with a special PASID value. A special PASID value is to indicate
host to bind the guest page table to a proper PASID. e.g PASID value from
RID_PASID field for PF/VF or default PASID for ADI (Assignable Device
Interface in Scalable IOV solution).

Cc: Kevin Tian <kevin.tian@intel.com>
Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
Cc: Peter Xu <peterx@redhat.com>
Cc: Yi Sun <yi.y.sun@linux.intel.com>
Signed-off-by: Liu Yi L <yi.l.liu@intel.com>
---
 hw/i386/intel_iommu.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index e4286e5..ee55209 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -1853,6 +1853,14 @@ static void vtd_bind_guest_pasid(IntelIOMMUState *s, int bus_n,
 {
     PCIBus *bus;
     struct gpasid_bind_data *g_bind_data;
+
+    if (pasid < VTD_MIN_HPASID) {
+        /*
+         * If pasid < VTD_HPASID_MIN, this pasid is not allocated
+         * from host. No need to passdown the changes on it to host.
+         */
+        return;
+    }
     bus = vtd_find_pci_bus_from_bus_num(s, bus_n);
     g_bind_data = g_malloc0(sizeof(*g_bind_data));
 
-- 
2.7.4



  parent reply	other threads:[~2019-07-06 11:19 UTC|newest]

Thread overview: 116+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-05 11:01 [RFC v1 00/18] intel_iommu: expose Shared Virtual Addressing to VM Liu Yi L
2019-07-05 11:01 ` [Qemu-devel] " Liu Yi L
2019-07-05 11:01 ` [RFC v1 01/18] linux-headers: import iommu.h from kernel Liu Yi L
2019-07-05 11:01   ` [Qemu-devel] " Liu Yi L
2019-07-05 11:01 ` [RFC v1 02/18] linux-headers: import vfio.h " Liu Yi L
2019-07-05 11:01   ` [Qemu-devel] " Liu Yi L
2019-07-09  1:58   ` Peter Xu
2019-07-09  1:58     ` [Qemu-devel] " Peter Xu
2019-07-09  8:37     ` Auger Eric
2019-07-09  8:37       ` [Qemu-devel] " Auger Eric
2019-07-10 12:31       ` Liu, Yi L
2019-07-10 12:31         ` [Qemu-devel] " Liu, Yi L
2019-07-10 12:29     ` Liu, Yi L
2019-07-10 12:29       ` [Qemu-devel] " Liu, Yi L
2019-07-05 11:01 ` [RFC v1 03/18] hw/pci: introduce PCIPASIDOps to PCIDevice Liu Yi L
2019-07-05 11:01   ` [Qemu-devel] " Liu Yi L
2019-07-09  2:12   ` Peter Xu
2019-07-09  2:12     ` [Qemu-devel] " Peter Xu
2019-07-09 10:41     ` Auger Eric
2019-07-09 10:41       ` [Qemu-devel] " Auger Eric
2019-07-10 11:08     ` Liu, Yi L
2019-07-10 11:08       ` [Qemu-devel] " Liu, Yi L
2019-07-11  3:51       ` david
2019-07-11  3:51         ` [Qemu-devel] " david
2019-07-11  7:13         ` Liu, Yi L
2019-07-11  7:13           ` [Qemu-devel] " Liu, Yi L
2019-07-05 11:01 ` [RFC v1 04/18] intel_iommu: add "sm_model" option Liu Yi L
2019-07-05 11:01   ` [Qemu-devel] " Liu Yi L
2019-07-09  2:15   ` Peter Xu
2019-07-09  2:15     ` [Qemu-devel] " Peter Xu
2019-07-10 12:14     ` Liu, Yi L
2019-07-10 12:14       ` [Qemu-devel] " Liu, Yi L
2019-07-11  1:03       ` Peter Xu
2019-07-11  1:03         ` [Qemu-devel] " Peter Xu
2019-07-11  6:25         ` Liu, Yi L
2019-07-11  6:25           ` [Qemu-devel] " Liu, Yi L
2019-07-05 11:01 ` [RFC v1 05/18] vfio/pci: add pasid alloc/free implementation Liu Yi L
2019-07-05 11:01   ` [Qemu-devel] " Liu Yi L
2019-07-09  2:23   ` Peter Xu
2019-07-09  2:23     ` [Qemu-devel] " Peter Xu
2019-07-10 12:16     ` Liu, Yi L
2019-07-10 12:16       ` [Qemu-devel] " Liu, Yi L
2019-07-15  2:55   ` David Gibson
2019-07-15  2:55     ` [Qemu-devel] " David Gibson
2019-07-16 10:25     ` Liu, Yi L
2019-07-16 10:25       ` [Qemu-devel] " Liu, Yi L
2019-07-17  3:06       ` David Gibson
2019-07-17  3:06         ` [Qemu-devel] " David Gibson
2019-07-22  7:02         ` Liu, Yi L
2019-07-22  7:02           ` [Qemu-devel] " Liu, Yi L
2019-07-23  3:57           ` David Gibson
2019-07-23  3:57             ` [Qemu-devel] " David Gibson
2019-07-24  4:57             ` Liu, Yi L
2019-07-24  4:57               ` [Qemu-devel] " Liu, Yi L
2019-07-24  9:33               ` Auger Eric
2019-07-24  9:33                 ` [Qemu-devel] " Auger Eric
2019-07-25  3:40                 ` David Gibson
2019-07-25  3:40                   ` [Qemu-devel] " David Gibson
2019-07-26  5:18                 ` Liu, Yi L
2019-07-26  5:18                   ` [Qemu-devel] " Liu, Yi L
2019-08-02  7:36                   ` Auger Eric
2019-08-02  7:36                     ` [Qemu-devel] " Auger Eric
2019-07-05 11:01 ` [RFC v1 06/18] intel_iommu: support virtual command emulation and pasid request Liu Yi L
2019-07-05 11:01   ` [Qemu-devel] " Liu Yi L
2019-07-09  3:19   ` Peter Xu
2019-07-09  3:19     ` [Qemu-devel] " Peter Xu
2019-07-10 11:51     ` Liu, Yi L
2019-07-10 11:51       ` [Qemu-devel] " Liu, Yi L
2019-07-11  1:13       ` Peter Xu
2019-07-11  1:13         ` [Qemu-devel] " Peter Xu
2019-07-11  6:59         ` Liu, Yi L
2019-07-11  6:59           ` [Qemu-devel] " Liu, Yi L
2019-07-05 11:01 ` [RFC v1 07/18] hw/pci: add pci_device_bind/unbind_gpasid Liu Yi L
2019-07-05 11:01   ` [Qemu-devel] " Liu Yi L
2019-07-09  8:37   ` Auger Eric
2019-07-09  8:37     ` [Qemu-devel] " Auger Eric
2019-07-10 12:18     ` Liu, Yi L
2019-07-10 12:18       ` [Qemu-devel] " Liu, Yi L
2019-07-05 11:01 ` [RFC v1 08/18] vfio/pci: add vfio bind/unbind_gpasid implementation Liu Yi L
2019-07-05 11:01   ` [Qemu-devel] " Liu Yi L
2019-07-09  8:37   ` Auger Eric
2019-07-09  8:37     ` [Qemu-devel] " Auger Eric
2019-07-10 12:30     ` Liu, Yi L
2019-07-10 12:30       ` [Qemu-devel] " Liu, Yi L
2019-07-05 11:01 ` [RFC v1 09/18] intel_iommu: process pasid cache invalidation Liu Yi L
2019-07-05 11:01   ` [Qemu-devel] " Liu Yi L
2019-07-09  4:47   ` Peter Xu
2019-07-09  4:47     ` [Qemu-devel] " Peter Xu
2019-07-11  6:22     ` Liu, Yi L
2019-07-11  6:22       ` [Qemu-devel] " Liu, Yi L
2019-07-05 11:01 ` [RFC v1 10/18] intel_iommu: tag VTDAddressSpace instance with PASID Liu Yi L
2019-07-05 11:01   ` [Qemu-devel] " Liu Yi L
2019-07-09  6:12   ` Peter Xu
2019-07-09  6:12     ` [Qemu-devel] " Peter Xu
2019-07-11  7:24     ` Liu, Yi L
2019-07-11  7:24       ` [Qemu-devel] " Liu, Yi L
2019-07-05 11:01 ` [RFC v1 11/18] intel_iommu: create VTDAddressSpace per BDF+PASID Liu Yi L
2019-07-05 11:01   ` [Qemu-devel] " Liu Yi L
2019-07-09  6:39   ` Peter Xu
2019-07-09  6:39     ` [Qemu-devel] " Peter Xu
2019-07-11  8:13     ` Liu, Yi L
2019-07-11  8:13       ` [Qemu-devel] " Liu, Yi L
2019-07-05 11:01 ` [RFC v1 12/18] intel_iommu: bind/unbind guest page table to host Liu Yi L
2019-07-05 11:01   ` [Qemu-devel] " Liu Yi L
2019-07-05 11:01 ` [RFC v1 13/18] intel_iommu: flush pasid cache after a DSI context cache flush Liu Yi L
2019-07-05 11:01   ` [Qemu-devel] " Liu Yi L
2019-07-05 11:01 ` [RFC v1 14/18] hw/pci: add flush_pasid_iotlb() in PCIPASIDOps Liu Yi L
2019-07-05 11:01   ` [Qemu-devel] " Liu Yi L
2019-07-05 11:01 ` [RFC v1 15/18] vfio/pci: adds support for PASID-based iotlb flush Liu Yi L
2019-07-05 11:01   ` [Qemu-devel] " Liu Yi L
2019-07-05 11:01 ` [RFC v1 16/18] intel_iommu: add PASID-based iotlb invalidation support Liu Yi L
2019-07-05 11:01   ` [Qemu-devel] " Liu Yi L
2019-07-05 11:01 ` [RFC v1 17/18] intel_iommu: propagate PASID-based iotlb flush to host Liu Yi L
2019-07-05 11:01   ` [Qemu-devel] " Liu Yi L
2019-07-05 11:01 ` Liu Yi L [this message]
2019-07-05 11:01   ` [Qemu-devel] [RFC v1 18/18] intel_iommu: do not passdown pasid bind for PASID #0 Liu Yi L

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