* [cip-dev] [PATCH 4.19.y-cip 0/6] Add LED/WDT support
@ 2019-07-15 14:28 Biju Das
2019-07-15 14:28 ` [cip-dev] [PATCH 4.19.y-cip 1/6] arm64: dts: renesas: r8a774c0-cat874: Add LEDs support Biju Das
` (6 more replies)
0 siblings, 7 replies; 14+ messages in thread
From: Biju Das @ 2019-07-15 14:28 UTC (permalink / raw)
To: cip-dev
This patch series add LED/Watchdog support for EK874 platform.
It also enabled DMA for SCIF2 and fixes SCIF5 DMA channels.
This patch series is based on linux-4.19.y-cip and all the patches
in this series are cherry-picked from linux rc tree.
This patch series is depend on the below patch series
https://patchwork.kernel.org/project/cip-dev/list/?series=145943
Biju Das (1):
arm64: dts: renesas: r8a774c0: sort subnodes of the soc node
Fabrizio Castro (2):
arm64: dts: renesas: r8a774c0-cat874: Add LEDs support
arm64: dts: renesas: r8a774c0-cat874: Add RWDT support
Geert Uytterhoeven (2):
arm64: dts: renesas: r8a774c0: Enable DMA for SCIF2
arm64: dts: renesas: r8a774c0: Fix SCIF5 DMA channels
Niklas S?derlund (1):
arm64: dts: renesas: r8a774c0: Remove invalid compatible value for
CSI40
arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts | 29 +++
arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 261 ++++++++++++------------
2 files changed, 160 insertions(+), 130 deletions(-)
--
2.7.4
^ permalink raw reply [flat|nested] 14+ messages in thread* [cip-dev] [PATCH 4.19.y-cip 1/6] arm64: dts: renesas: r8a774c0-cat874: Add LEDs support 2019-07-15 14:28 [cip-dev] [PATCH 4.19.y-cip 0/6] Add LED/WDT support Biju Das @ 2019-07-15 14:28 ` Biju Das 2019-07-16 20:26 ` Pavel Machek 2019-07-15 14:28 ` [cip-dev] [PATCH 4.19.y-cip 2/6] arm64: dts: renesas: r8a774c0-cat874: Add RWDT support Biju Das ` (5 subsequent siblings) 6 siblings, 1 reply; 14+ messages in thread From: Biju Das @ 2019-07-15 14:28 UTC (permalink / raw) To: cip-dev From: Fabrizio Castro <fabrizio.castro@bp.renesas.com> commit dc0b439471323521a20314934080f51e8589fd19 upstream. This patch adds LEDs support to the CAT874 board specific device tree. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Biju Das <biju.das@bp.renesas.com> --- arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts b/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts index f08778e..af396bb 100644 --- a/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts +++ b/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts @@ -22,6 +22,30 @@ stdout-path = "serial0:115200n8"; }; + leds { + compatible = "gpio-leds"; + + led0 { + gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>; + label = "LED0"; + }; + + led1 { + gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; + label = "LED1"; + }; + + led2 { + gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; + label = "LED2"; + }; + + led3 { + gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>; + label = "LED3"; + }; + }; + memory at 48000000 { device_type = "memory"; /* first 128MB is reserved for secure area. */ -- 2.7.4 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [cip-dev] [PATCH 4.19.y-cip 1/6] arm64: dts: renesas: r8a774c0-cat874: Add LEDs support 2019-07-15 14:28 ` [cip-dev] [PATCH 4.19.y-cip 1/6] arm64: dts: renesas: r8a774c0-cat874: Add LEDs support Biju Das @ 2019-07-16 20:26 ` Pavel Machek 2019-07-17 6:59 ` Biju Das 0 siblings, 1 reply; 14+ messages in thread From: Pavel Machek @ 2019-07-16 20:26 UTC (permalink / raw) To: cip-dev Hi! > index f08778e..af396bb 100644 > --- a/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts > +++ b/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts > @@ -22,6 +22,30 @@ > stdout-path = "serial0:115200n8"; > }; > > + leds { > + compatible = "gpio-leds"; > + > + led0 { > + gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>; > + label = "LED0"; > + }; > + > + led1 { > + gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; > + label = "LED1"; > + }; > + > + led2 { > + gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; > + label = "LED2"; > + }; > + > + led3 { > + gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>; > + label = "LED3"; > + }; > + }; With my LED maintainer hat on... these are not exactly useful LED names. Do they have any fixed meaning? Are they labeled on the board? What color are they? Best regards, Pavel -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 181 bytes Desc: Digital signature URL: <http://lists.cip-project.org/pipermail/cip-dev/attachments/20190716/6f76ff3f/attachment.sig> ^ permalink raw reply [flat|nested] 14+ messages in thread
* [cip-dev] [PATCH 4.19.y-cip 1/6] arm64: dts: renesas: r8a774c0-cat874: Add LEDs support 2019-07-16 20:26 ` Pavel Machek @ 2019-07-17 6:59 ` Biju Das 2019-07-17 9:39 ` Pavel Machek 0 siblings, 1 reply; 14+ messages in thread From: Biju Das @ 2019-07-17 6:59 UTC (permalink / raw) To: cip-dev Hi Pavel, Thanks for the feedback. > Subject: Re: [cip-dev] [PATCH 4.19.y-cip 1/6] arm64: dts: renesas: r8a774c0- > cat874: Add LEDs support > > Hi! > > > index f08778e..af396bb 100644 > > --- a/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts > > +++ b/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts > > @@ -22,6 +22,30 @@ > > stdout-path = "serial0:115200n8"; > > }; > > > > + leds { > > + compatible = "gpio-leds"; > > + > > + led0 { > > + gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>; > > + label = "LED0"; > > + }; > > + > > + led1 { > > + gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; > > + label = "LED1"; > > + }; > > + > > + led2 { > > + gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; > > + label = "LED2"; > > + }; > > + > > + led3 { > > + gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>; > > + label = "LED3"; > > + }; > > + }; > > With my LED maintainer hat on... these are not exactly useful LED names. Do > they have any fixed meaning? Are they labeled on the board? > What color are they? It is labelled as LED0 label on the board and green colour. Basically this board is as per 96boards CE specification System and User LEDs The following LEDs shall be present on the board. The LEDs shall be of the specified size, color and location. The User LEDs shall be directly programmable from the SoC. 1. WiFi activity LED Yellow Type: 0603 SMD 2. Bluetooth activity LED Blue Type: 0603 SMD 3. User LEDs x4 Green Type: 0603 SMD Other LEDs and UI interfaces are optional. As a LED maintainer, What is your recommendation for mainline? 1) label = "LED0"; --> based on the label on the board 2) label = " gren:LED0 "; --> based on the colour and label on the board. 3) label = " green:user1";--> based on the colour and label as per 96 boards CE specification. Regards, Biju ^ permalink raw reply [flat|nested] 14+ messages in thread
* [cip-dev] [PATCH 4.19.y-cip 1/6] arm64: dts: renesas: r8a774c0-cat874: Add LEDs support 2019-07-17 6:59 ` Biju Das @ 2019-07-17 9:39 ` Pavel Machek 0 siblings, 0 replies; 14+ messages in thread From: Pavel Machek @ 2019-07-17 9:39 UTC (permalink / raw) To: cip-dev Hi! > > > + led3 { > > > + gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>; > > > + label = "LED3"; > > > + }; > > > + }; > > > > With my LED maintainer hat on... these are not exactly useful LED names. Do > > they have any fixed meaning? Are they labeled on the board? > > What color are they? > > It is labelled as LED0 label on the board and green colour. > > Basically this board is as per 96boards CE specification > System and User LEDs > The following LEDs shall be present on the board. > The LEDs shall be of the specified size, color and location. > The User LEDs shall be directly programmable from the SoC. > 1. WiFi activity LED Yellow Type: 0603 SMD > 2. Bluetooth activity LED Blue Type: 0603 SMD > 3. User LEDs x4 Green Type: 0603 SMD > Other LEDs and UI interfaces are optional. > > As a LED maintainer, What is your recommendation for mainline? > > 1) label = "LED0"; --> based on the label on the board > > 2) label = " gren:LED0 "; --> based on the colour and label on the board. > > 3) label = " green:user1";--> based on the colour and label as per 96 boards CE specification. Lets make it "green:user1". Thank you, Pavel -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 181 bytes Desc: Digital signature URL: <http://lists.cip-project.org/pipermail/cip-dev/attachments/20190717/cdaad348/attachment-0001.sig> ^ permalink raw reply [flat|nested] 14+ messages in thread
* [cip-dev] [PATCH 4.19.y-cip 2/6] arm64: dts: renesas: r8a774c0-cat874: Add RWDT support 2019-07-15 14:28 [cip-dev] [PATCH 4.19.y-cip 0/6] Add LED/WDT support Biju Das 2019-07-15 14:28 ` [cip-dev] [PATCH 4.19.y-cip 1/6] arm64: dts: renesas: r8a774c0-cat874: Add LEDs support Biju Das @ 2019-07-15 14:28 ` Biju Das 2019-07-16 20:27 ` Pavel Machek 2019-07-15 14:28 ` [cip-dev] [PATCH 4.19.y-cip 3/6] arm64: dts: renesas: r8a774c0: Enable DMA for SCIF2 Biju Das ` (4 subsequent siblings) 6 siblings, 1 reply; 14+ messages in thread From: Biju Das @ 2019-07-15 14:28 UTC (permalink / raw) To: cip-dev From: Fabrizio Castro <fabrizio.castro@bp.renesas.com> commit 79223ca1f57776d2770da9561c26cc2f2dd42205 upstream. Enable RWDT and use 60 seconds as default timeout. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Biju Das <biju.das@bp.renesas.com> --- arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts b/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts index af396bb..9241407 100644 --- a/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts +++ b/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts @@ -137,6 +137,11 @@ }; }; +&rwdt { + timeout-sec = <60>; + status = "okay"; +}; + &scif2 { pinctrl-0 = <&scif2_pins>; pinctrl-names = "default"; -- 2.7.4 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [cip-dev] [PATCH 4.19.y-cip 2/6] arm64: dts: renesas: r8a774c0-cat874: Add RWDT support 2019-07-15 14:28 ` [cip-dev] [PATCH 4.19.y-cip 2/6] arm64: dts: renesas: r8a774c0-cat874: Add RWDT support Biju Das @ 2019-07-16 20:27 ` Pavel Machek 2019-07-17 7:40 ` Biju Das 0 siblings, 1 reply; 14+ messages in thread From: Pavel Machek @ 2019-07-16 20:27 UTC (permalink / raw) To: cip-dev On Mon 2019-07-15 15:28:46, Biju Das wrote: > From: Fabrizio Castro <fabrizio.castro@bp.renesas.com> > > commit 79223ca1f57776d2770da9561c26cc2f2dd42205 upstream. > > Enable RWDT and use 60 seconds as default timeout. So this will reboot machine if userspace does not ping it within 60 seconds by default? Will that break user configurations that worked up till now, but do not contain watchdog support? Do we care? Thanks, Pavel > @@ -137,6 +137,11 @@ > }; > }; > > +&rwdt { > + timeout-sec = <60>; > + status = "okay"; > +}; > + > &scif2 { > pinctrl-0 = <&scif2_pins>; > pinctrl-names = "default"; -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 181 bytes Desc: Digital signature URL: <http://lists.cip-project.org/pipermail/cip-dev/attachments/20190716/ee60b189/attachment-0001.sig> ^ permalink raw reply [flat|nested] 14+ messages in thread
* [cip-dev] [PATCH 4.19.y-cip 2/6] arm64: dts: renesas: r8a774c0-cat874: Add RWDT support 2019-07-16 20:27 ` Pavel Machek @ 2019-07-17 7:40 ` Biju Das 2019-07-17 9:41 ` Pavel Machek 0 siblings, 1 reply; 14+ messages in thread From: Biju Das @ 2019-07-17 7:40 UTC (permalink / raw) To: cip-dev Hi Pavel, Thanks for the feedback. > Subject: Re: [cip-dev] [PATCH 4.19.y-cip 2/6] arm64: dts: renesas: r8a774c0- > cat874: Add RWDT support > > On Mon 2019-07-15 15:28:46, Biju Das wrote: > > From: Fabrizio Castro <fabrizio.castro@bp.renesas.com> > > > > commit 79223ca1f57776d2770da9561c26cc2f2dd42205 upstream. > > > > Enable RWDT and use 60 seconds as default timeout. > > So this will reboot machine if userspace does not ping it within 60 seconds by > default? Yes, if you enable watchdog in user space and there is no ping activity for 60 sec. We can verify this by using the below command cat > /dev/watchdog0 & for i in $(seq 100); do echo $i; sleep 1; done > Will that break user configurations that worked up till now, but do not > contain watchdog support? > > Do we care? > As per [1] - timeout-sec : Contains the watchdog timeout in seconds [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/watchdog/renesas-wdt.txt?h=v5.2 If time-out is not specified, then it uses the default timeout mentioned by the driver. Regards, Biju > > > @@ -137,6 +137,11 @@ > > }; > > }; > > > > +&rwdt { > > + timeout-sec = <60>; > > + status = "okay"; > > +}; > > + > > &scif2 { > > pinctrl-0 = <&scif2_pins>; > > pinctrl-names = "default"; > > -- > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ^ permalink raw reply [flat|nested] 14+ messages in thread
* [cip-dev] [PATCH 4.19.y-cip 2/6] arm64: dts: renesas: r8a774c0-cat874: Add RWDT support 2019-07-17 7:40 ` Biju Das @ 2019-07-17 9:41 ` Pavel Machek 0 siblings, 0 replies; 14+ messages in thread From: Pavel Machek @ 2019-07-17 9:41 UTC (permalink / raw) To: cip-dev Hi! > > cat874: Add RWDT support > > > > On Mon 2019-07-15 15:28:46, Biju Das wrote: > > > From: Fabrizio Castro <fabrizio.castro@bp.renesas.com> > > > > > > commit 79223ca1f57776d2770da9561c26cc2f2dd42205 upstream. > > > > > > Enable RWDT and use 60 seconds as default timeout. > > > > So this will reboot machine if userspace does not ping it within 60 seconds by > > default? > > Yes, if you enable watchdog in user space and there is no ping activity for 60 sec. > We can verify this by using the below command Aha. But if userspace does nothing, no reboot happens. Good. Best regards, Pavel -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 181 bytes Desc: Digital signature URL: <http://lists.cip-project.org/pipermail/cip-dev/attachments/20190717/54762e4a/attachment.sig> ^ permalink raw reply [flat|nested] 14+ messages in thread
* [cip-dev] [PATCH 4.19.y-cip 3/6] arm64: dts: renesas: r8a774c0: Enable DMA for SCIF2 2019-07-15 14:28 [cip-dev] [PATCH 4.19.y-cip 0/6] Add LED/WDT support Biju Das 2019-07-15 14:28 ` [cip-dev] [PATCH 4.19.y-cip 1/6] arm64: dts: renesas: r8a774c0-cat874: Add LEDs support Biju Das 2019-07-15 14:28 ` [cip-dev] [PATCH 4.19.y-cip 2/6] arm64: dts: renesas: r8a774c0-cat874: Add RWDT support Biju Das @ 2019-07-15 14:28 ` Biju Das 2019-07-15 14:28 ` [cip-dev] [PATCH 4.19.y-cip 4/6] arm64: dts: renesas: r8a774c0: Fix SCIF5 DMA channels Biju Das ` (3 subsequent siblings) 6 siblings, 0 replies; 14+ messages in thread From: Biju Das @ 2019-07-15 14:28 UTC (permalink / raw) To: cip-dev From: Geert Uytterhoeven <geert+renesas@glider.be> commit d9fd4e5814079ba4a2111d7d792a24bf8f747500 upstream. SCIF2 on RZ/G2E can be used with both DMAC1 and DMAC2. Fixes: 1b24f9e8ea3ff95f ("arm64: dts: renesas: r8a774c0: Add SCIF and HSCIF nodes") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Biju Das <biju.das@bp.renesas.com> --- arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi index b6f6929..aecaa9b 100644 --- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi @@ -1105,6 +1105,9 @@ <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac1 0x13>, <&dmac1 0x12>, + <&dmac2 0x13>, <&dmac2 0x12>; + dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; resets = <&cpg 310>; status = "disabled"; -- 2.7.4 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [cip-dev] [PATCH 4.19.y-cip 4/6] arm64: dts: renesas: r8a774c0: Fix SCIF5 DMA channels 2019-07-15 14:28 [cip-dev] [PATCH 4.19.y-cip 0/6] Add LED/WDT support Biju Das ` (2 preceding siblings ...) 2019-07-15 14:28 ` [cip-dev] [PATCH 4.19.y-cip 3/6] arm64: dts: renesas: r8a774c0: Enable DMA for SCIF2 Biju Das @ 2019-07-15 14:28 ` Biju Das 2019-07-15 14:28 ` [cip-dev] [PATCH 4.19.y-cip 5/6] arm64: dts: renesas: r8a774c0: Remove invalid compatible value for CSI40 Biju Das ` (2 subsequent siblings) 6 siblings, 0 replies; 14+ messages in thread From: Biju Das @ 2019-07-15 14:28 UTC (permalink / raw) To: cip-dev From: Geert Uytterhoeven <geert+renesas@glider.be> commit c21cd4ae82e169b394139243684aaacf31bfcdf8 upstream. Correct the DMA channels for SCIF5 from 16..47 to 0..15, as was done for R-Car E3. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Fixes: 2660a6af690ebbb4 ("arm64: dts: renesas: r8a774c0: Add SCIF and HSCIF nodes") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Biju Das <biju.das@bp.renesas.com> --- arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi index aecaa9b..169f18e 100644 --- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi @@ -2,7 +2,7 @@ /* * Device Tree Source for the RZ/G2E (R8A774C0) SoC * - * Copyright (C) 2018 Renesas Electronics Corp. + * Copyright (C) 2018-2019 Renesas Electronics Corp. */ #include <dt-bindings/clock/r8a774c0-cpg-mssr.h> @@ -1154,9 +1154,8 @@ <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, - <&dmac2 0x5b>, <&dmac2 0x5a>; - dma-names = "tx", "rx", "tx", "rx"; + dmas = <&dmac0 0x5b>, <&dmac0 0x5a>; + dma-names = "tx", "rx"; power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; resets = <&cpg 202>; status = "disabled"; -- 2.7.4 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [cip-dev] [PATCH 4.19.y-cip 5/6] arm64: dts: renesas: r8a774c0: Remove invalid compatible value for CSI40 2019-07-15 14:28 [cip-dev] [PATCH 4.19.y-cip 0/6] Add LED/WDT support Biju Das ` (3 preceding siblings ...) 2019-07-15 14:28 ` [cip-dev] [PATCH 4.19.y-cip 4/6] arm64: dts: renesas: r8a774c0: Fix SCIF5 DMA channels Biju Das @ 2019-07-15 14:28 ` Biju Das 2019-07-15 14:28 ` [cip-dev] [PATCH 4.19.y-cip 6/6] arm64: dts: renesas: r8a774c0: sort subnodes of the soc node Biju Das 2019-07-17 9:47 ` [cip-dev] [PATCH 4.19.y-cip 0/6] Add LED/WDT support Pavel Machek 6 siblings, 0 replies; 14+ messages in thread From: Biju Das @ 2019-07-15 14:28 UTC (permalink / raw) To: cip-dev From: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se> commit 82ec009297bc573e6aace629181d13ed6ce3772f upstream. The compatible value renesas,rcar-gen3-csi2 was used while prototyping the R-Car CSI-2 driver but was removed before the driver was merged. Fixes: e961ab42e034d469 ("arm64: dts: renesas: r8a774c0: Add VIN and CSI-2 device nodes") Signed-off-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Biju Das <biju.das@bp.renesas.com> --- arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi index 169f18e..805042d 100644 --- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi @@ -1668,8 +1668,7 @@ }; csi40: csi2 at feaa0000 { - compatible = "renesas,r8a774c0-csi2", - "renesas,rcar-gen3-csi2"; + compatible = "renesas,r8a774c0-csi2"; reg = <0 0xfeaa0000 0 0x10000>; interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 716>; -- 2.7.4 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [cip-dev] [PATCH 4.19.y-cip 6/6] arm64: dts: renesas: r8a774c0: sort subnodes of the soc node 2019-07-15 14:28 [cip-dev] [PATCH 4.19.y-cip 0/6] Add LED/WDT support Biju Das ` (4 preceding siblings ...) 2019-07-15 14:28 ` [cip-dev] [PATCH 4.19.y-cip 5/6] arm64: dts: renesas: r8a774c0: Remove invalid compatible value for CSI40 Biju Das @ 2019-07-15 14:28 ` Biju Das 2019-07-17 9:47 ` [cip-dev] [PATCH 4.19.y-cip 0/6] Add LED/WDT support Pavel Machek 6 siblings, 0 replies; 14+ messages in thread From: Biju Das @ 2019-07-15 14:28 UTC (permalink / raw) To: cip-dev Sort subnodes of the soc node. - The primary key is the bus address. - The secondary key is the IP block. - The tertiary key is the node name. This is part of an ongoing effort to provide consistent node order in the DT of Renesas SoCs to improve maintainability. This should not have any run-time effect. Signed-off-by: Biju Das <biju.das@bp.renesas.com> --- arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 248 +++++++++++++++--------------- 1 file changed, 124 insertions(+), 124 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi index 805042d..b92c60c 100644 --- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi @@ -378,6 +378,71 @@ resets = <&cpg 407>; }; + tmu0: timer at e61e0000 { + compatible = "renesas,tmu-r8a774c0", "renesas,tmu"; + reg = <0 0xe61e0000 0 0x30>; + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 125>; + clock-names = "fck"; + power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; + resets = <&cpg 125>; + status = "disabled"; + }; + + tmu1: timer at e6fc0000 { + compatible = "renesas,tmu-r8a774c0", "renesas,tmu"; + reg = <0 0xe6fc0000 0 0x30>; + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 124>; + clock-names = "fck"; + power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; + resets = <&cpg 124>; + status = "disabled"; + }; + + tmu2: timer at e6fd0000 { + compatible = "renesas,tmu-r8a774c0", "renesas,tmu"; + reg = <0 0xe6fd0000 0 0x30>; + interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 123>; + clock-names = "fck"; + power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; + resets = <&cpg 123>; + status = "disabled"; + }; + + tmu3: timer at e6fe0000 { + compatible = "renesas,tmu-r8a774c0", "renesas,tmu"; + reg = <0 0xe6fe0000 0 0x30>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 122>; + clock-names = "fck"; + power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; + resets = <&cpg 122>; + status = "disabled"; + }; + + tmu4: timer at ffc00000 { + compatible = "renesas,tmu-r8a774c0", "renesas,tmu"; + reg = <0 0xffc00000 0 0x30>; + interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 121>; + clock-names = "fck"; + power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; + resets = <&cpg 121>; + status = "disabled"; + }; + i2c0: i2c at e6500000 { #address-cells = <1>; #size-cells = <0>; @@ -521,71 +586,6 @@ status = "disabled"; }; - tmu0: timer at e61e0000 { - compatible = "renesas,tmu-r8a774c0", "renesas,tmu"; - reg = <0 0xe61e0000 0 0x30>; - interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 125>; - clock-names = "fck"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 125>; - status = "disabled"; - }; - - tmu1: timer at e6fc0000 { - compatible = "renesas,tmu-r8a774c0", "renesas,tmu"; - reg = <0 0xe6fc0000 0 0x30>; - interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 124>; - clock-names = "fck"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 124>; - status = "disabled"; - }; - - tmu2: timer at e6fd0000 { - compatible = "renesas,tmu-r8a774c0", "renesas,tmu"; - reg = <0 0xe6fd0000 0 0x30>; - interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 123>; - clock-names = "fck"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 123>; - status = "disabled"; - }; - - tmu3: timer at e6fe0000 { - compatible = "renesas,tmu-r8a774c0", "renesas,tmu"; - reg = <0 0xe6fe0000 0 0x30>; - interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 122>; - clock-names = "fck"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 122>; - status = "disabled"; - }; - - tmu4: timer at ffc00000 { - compatible = "renesas,tmu-r8a774c0", "renesas,tmu"; - reg = <0 0xffc00000 0 0x30>; - interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 121>; - clock-names = "fck"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 121>; - status = "disabled"; - }; - hscif0: serial at e6540000 { compatible = "renesas,hscif-r8a774c0", "renesas,rcar-gen3-hscif", @@ -1279,65 +1279,6 @@ }; }; - xhci0: usb at ee000000 { - compatible = "renesas,xhci-r8a774c0", - "renesas,rcar-gen3-xhci"; - reg = <0 0xee000000 0 0xc00>; - interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 328>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 328>; - status = "disabled"; - }; - - usb3_peri0: usb at ee020000 { - compatible = "renesas,r8a774c0-usb3-peri", - "renesas,rcar-gen3-usb3-peri"; - reg = <0 0xee020000 0 0x400>; - interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 328>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 328>; - status = "disabled"; - }; - - ohci0: usb at ee080000 { - compatible = "generic-ohci"; - reg = <0 0xee080000 0 0x100>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0>; - phy-names = "usb"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - status = "disabled"; - }; - - ehci0: usb at ee080100 { - compatible = "generic-ehci"; - reg = <0 0xee080100 0 0x100>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0>; - phy-names = "usb"; - companion = <&ohci0>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - status = "disabled"; - }; - - usb2_phy0: usb-phy at ee080200 { - compatible = "renesas,usb2-phy-r8a774c0", - "renesas,rcar-gen3-usb2-phy"; - reg = <0 0xee080200 0 0x700>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - #phy-cells = <0>; - status = "disabled"; - }; - rcar_sound: sound at ec500000 { /* * #sound-dai-cells is required @@ -1587,6 +1528,65 @@ <&ipmmu_mp 14>, <&ipmmu_mp 15>; }; + xhci0: usb at ee000000 { + compatible = "renesas,xhci-r8a774c0", + "renesas,rcar-gen3-xhci"; + reg = <0 0xee000000 0 0xc00>; + interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 328>; + power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; + resets = <&cpg 328>; + status = "disabled"; + }; + + usb3_peri0: usb at ee020000 { + compatible = "renesas,r8a774c0-usb3-peri", + "renesas,rcar-gen3-usb3-peri"; + reg = <0 0xee020000 0 0x400>; + interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 328>; + power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; + resets = <&cpg 328>; + status = "disabled"; + }; + + ohci0: usb at ee080000 { + compatible = "generic-ohci"; + reg = <0 0xee080000 0 0x100>; + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; + phys = <&usb2_phy0>; + phy-names = "usb"; + power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; + resets = <&cpg 703>, <&cpg 704>; + status = "disabled"; + }; + + ehci0: usb at ee080100 { + compatible = "generic-ehci"; + reg = <0 0xee080100 0 0x100>; + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; + phys = <&usb2_phy0>; + phy-names = "usb"; + companion = <&ohci0>; + power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; + resets = <&cpg 703>, <&cpg 704>; + status = "disabled"; + }; + + usb2_phy0: usb-phy at ee080200 { + compatible = "renesas,usb2-phy-r8a774c0", + "renesas,rcar-gen3-usb2-phy"; + reg = <0 0xee080200 0 0x700>; + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; + power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; + resets = <&cpg 703>, <&cpg 704>; + #phy-cells = <0>; + status = "disabled"; + }; + sdhi0: sd at ee100000 { compatible = "renesas,sdhi-r8a774c0", "renesas,rcar-gen3-sdhi"; -- 2.7.4 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [cip-dev] [PATCH 4.19.y-cip 0/6] Add LED/WDT support 2019-07-15 14:28 [cip-dev] [PATCH 4.19.y-cip 0/6] Add LED/WDT support Biju Das ` (5 preceding siblings ...) 2019-07-15 14:28 ` [cip-dev] [PATCH 4.19.y-cip 6/6] arm64: dts: renesas: r8a774c0: sort subnodes of the soc node Biju Das @ 2019-07-17 9:47 ` Pavel Machek 6 siblings, 0 replies; 14+ messages in thread From: Pavel Machek @ 2019-07-17 9:47 UTC (permalink / raw) To: cip-dev Hi! > This patch series add LED/Watchdog support for EK874 platform. > It also enabled DMA for SCIF2 and fixes SCIF5 DMA channels. > > This patch series is based on linux-4.19.y-cip and all the patches > in this series are cherry-picked from linux rc tree. Thanks, applied and pushed out. Pavel -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 181 bytes Desc: Digital signature URL: <http://lists.cip-project.org/pipermail/cip-dev/attachments/20190717/771f356e/attachment.sig> ^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2019-07-17 9:47 UTC | newest] Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-07-15 14:28 [cip-dev] [PATCH 4.19.y-cip 0/6] Add LED/WDT support Biju Das 2019-07-15 14:28 ` [cip-dev] [PATCH 4.19.y-cip 1/6] arm64: dts: renesas: r8a774c0-cat874: Add LEDs support Biju Das 2019-07-16 20:26 ` Pavel Machek 2019-07-17 6:59 ` Biju Das 2019-07-17 9:39 ` Pavel Machek 2019-07-15 14:28 ` [cip-dev] [PATCH 4.19.y-cip 2/6] arm64: dts: renesas: r8a774c0-cat874: Add RWDT support Biju Das 2019-07-16 20:27 ` Pavel Machek 2019-07-17 7:40 ` Biju Das 2019-07-17 9:41 ` Pavel Machek 2019-07-15 14:28 ` [cip-dev] [PATCH 4.19.y-cip 3/6] arm64: dts: renesas: r8a774c0: Enable DMA for SCIF2 Biju Das 2019-07-15 14:28 ` [cip-dev] [PATCH 4.19.y-cip 4/6] arm64: dts: renesas: r8a774c0: Fix SCIF5 DMA channels Biju Das 2019-07-15 14:28 ` [cip-dev] [PATCH 4.19.y-cip 5/6] arm64: dts: renesas: r8a774c0: Remove invalid compatible value for CSI40 Biju Das 2019-07-15 14:28 ` [cip-dev] [PATCH 4.19.y-cip 6/6] arm64: dts: renesas: r8a774c0: sort subnodes of the soc node Biju Das 2019-07-17 9:47 ` [cip-dev] [PATCH 4.19.y-cip 0/6] Add LED/WDT support Pavel Machek
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