From: Chris Wilson <chris@chris-wilson.co.uk>
To: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 3/4] drm/i915/tgl: Gen12 csb support
Date: Wed, 31 Jul 2019 08:33:21 +0100 [thread overview]
Message-ID: <156455840104.6373.9020252063128594894@skylake-alporthouse-com> (raw)
In-Reply-To: <20190731004902.34672-4-daniele.ceraolospurio@intel.com>
Quoting Daniele Ceraolo Spurio (2019-07-31 01:49:01)
> @@ -1401,7 +1453,7 @@ static void process_csb(struct intel_engine_cs *engine)
> engine->name, head,
> buf[2 * head + 0], buf[2 * head + 1]);
>
> - switch (csb_parse(execlists, buf + 2 * head)) {
> + switch (execlists->csb_parse(execlists, buf + 2 * head)) {
So I worry about the cost of a retpoline here (tucked away inside an
irqs-off loop), and whether a local func avoids the retpoline or if we
just have to use an if-ladder.
-Chris
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next prev parent reply other threads:[~2019-07-31 7:33 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-31 0:48 [PATCH 0/4] Initial TGL submission changes Daniele Ceraolo Spurio
2019-07-31 0:48 ` [PATCH 1/4] drm/i915/tgl: add Gen12 default indirect ctx offset Daniele Ceraolo Spurio
2019-07-31 0:49 ` [PATCH 2/4] drm/i915/tgl: add GEN12_MAX_CONTEXT_HW_ID Daniele Ceraolo Spurio
2019-07-31 0:49 ` [PATCH 3/4] drm/i915/tgl: Gen12 csb support Daniele Ceraolo Spurio
2019-07-31 6:29 ` Tvrtko Ursulin
2019-07-31 17:33 ` Daniele Ceraolo Spurio
2019-07-31 7:33 ` Chris Wilson [this message]
2019-07-31 20:18 ` Daniele Ceraolo Spurio
2019-07-31 0:49 ` [PATCH 4/4] drm/i915/tgl: Report valid VDBoxes with SFC capability Daniele Ceraolo Spurio
2019-07-31 5:59 ` Tvrtko Ursulin
2019-07-31 17:09 ` Daniele Ceraolo Spurio
2019-07-31 1:10 ` ✗ Fi.CI.CHECKPATCH: warning for Initial TGL submission changes Patchwork
2019-07-31 1:39 ` ✓ Fi.CI.BAT: success " Patchwork
2019-08-01 15:15 ` ✓ Fi.CI.IGT: " Patchwork
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