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From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Subject: [PATCH 2/4] drm/i915/tgl: add GEN12_MAX_CONTEXT_HW_ID
Date: Tue, 30 Jul 2019 17:49:00 -0700	[thread overview]
Message-ID: <20190731004902.34672-3-daniele.ceraolospurio@intel.com> (raw)
In-Reply-To: <20190731004902.34672-1-daniele.ceraolospurio@intel.com>

Like Gen11, Gen12 has 11 available bits for the ctx id field. However,
the last value (0x7FF) is reserved to indicate engine idle, so we
need to reduce the maximum number of contexts by 1 compared to Gen11.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c | 4 +++-
 drivers/gpu/drm/i915/i915_drv.h             | 2 ++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index b28c7ca681a8..67d76ef6a7ae 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -172,7 +172,9 @@ static inline int new_hw_id(struct drm_i915_private *i915, gfp_t gfp)
 
 	lockdep_assert_held(&i915->contexts.mutex);
 
-	if (INTEL_GEN(i915) >= 11)
+	if (INTEL_GEN(i915) >= 12)
+		max = GEN12_MAX_CONTEXT_HW_ID;
+	else if (INTEL_GEN(i915) >= 11)
 		max = GEN11_MAX_CONTEXT_HW_ID;
 	else if (USES_GUC_SUBMISSION(i915))
 		/*
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3eeb21ff04c2..20161f4ebd19 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1580,6 +1580,8 @@ struct drm_i915_private {
 #define MAX_CONTEXT_HW_ID (1<<21) /* exclusive */
 #define MAX_GUC_CONTEXT_HW_ID (1 << 20) /* exclusive */
 #define GEN11_MAX_CONTEXT_HW_ID (1<<11) /* exclusive */
+/* in Gen12 ID 0x7FF is reserved to indicate idle */
+#define GEN12_MAX_CONTEXT_HW_ID	(GEN11_MAX_CONTEXT_HW_ID - 1)
 		struct list_head hw_id_list;
 	} contexts;
 
-- 
2.22.0

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  parent reply	other threads:[~2019-07-31  0:49 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-31  0:48 [PATCH 0/4] Initial TGL submission changes Daniele Ceraolo Spurio
2019-07-31  0:48 ` [PATCH 1/4] drm/i915/tgl: add Gen12 default indirect ctx offset Daniele Ceraolo Spurio
2019-07-31  0:49 ` Daniele Ceraolo Spurio [this message]
2019-07-31  0:49 ` [PATCH 3/4] drm/i915/tgl: Gen12 csb support Daniele Ceraolo Spurio
2019-07-31  6:29   ` Tvrtko Ursulin
2019-07-31 17:33     ` Daniele Ceraolo Spurio
2019-07-31  7:33   ` Chris Wilson
2019-07-31 20:18     ` Daniele Ceraolo Spurio
2019-07-31  0:49 ` [PATCH 4/4] drm/i915/tgl: Report valid VDBoxes with SFC capability Daniele Ceraolo Spurio
2019-07-31  5:59   ` Tvrtko Ursulin
2019-07-31 17:09     ` Daniele Ceraolo Spurio
2019-07-31  1:10 ` ✗ Fi.CI.CHECKPATCH: warning for Initial TGL submission changes Patchwork
2019-07-31  1:39 ` ✓ Fi.CI.BAT: success " Patchwork
2019-08-01 15:15 ` ✓ Fi.CI.IGT: " Patchwork

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