* [Qemu-devel] [Bug 1838475] [NEW] qemu-system-arm exits when cortex-m4 floating point used and irq occurs
@ 2019-07-30 21:32 KD
2019-07-31 9:20 ` [Qemu-devel] [Bug 1838475] " Alex Bennée
` (4 more replies)
0 siblings, 5 replies; 6+ messages in thread
From: KD @ 2019-07-30 21:32 UTC (permalink / raw)
To: qemu-devel
Public bug reported:
qemu-system-arm exits with
"...Secure UsageFault with CFSR.NOCP because NSACR.CP10 prevents stacking FP regs
...taking pending nonsecure exception 3
Taking exception 7 [Breakpoint]
qemu: fatal: Lockup: can't escalate 3 to HardFault (current priority -1)"
when emulating Cortex-m4, executing at least 1 floating point
instruction, and then an irq (e.g. sys tick) occurring.
CPACR.CP10 and CPACR.CP11 are set to 0x3 respectively prior to executing
the fp instructions.
NOTE: NSACR does not appear to be a cortex m4 register.
Attached is a simplified elf to repro the issue.
The qemu command line is: "qemu-system-arm --gdb tcp::1234 -cpu
cortex-m4 -machine lm3s6965evb -nographic -semihosting-config
enable=on,target=native -kernel QemuExitWhenUsingFPAndIRQOccurs.elf -d
int"
** Affects: qemu
Importance: Undecided
Status: New
** Attachment added: "QemuExitWhenUsingFPAndIRQOccurs.elf"
https://bugs.launchpad.net/bugs/1838475/+attachment/5280090/+files/QemuExitWhenUsingFPAndIRQOccurs.elf
--
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https://bugs.launchpad.net/bugs/1838475
Title:
qemu-system-arm exits when cortex-m4 floating point used and irq
occurs
Status in QEMU:
New
Bug description:
qemu-system-arm exits with
"...Secure UsageFault with CFSR.NOCP because NSACR.CP10 prevents stacking FP regs
...taking pending nonsecure exception 3
Taking exception 7 [Breakpoint]
qemu: fatal: Lockup: can't escalate 3 to HardFault (current priority -1)"
when emulating Cortex-m4, executing at least 1 floating point
instruction, and then an irq (e.g. sys tick) occurring.
CPACR.CP10 and CPACR.CP11 are set to 0x3 respectively prior to
executing the fp instructions.
NOTE: NSACR does not appear to be a cortex m4 register.
Attached is a simplified elf to repro the issue.
The qemu command line is: "qemu-system-arm --gdb tcp::1234 -cpu
cortex-m4 -machine lm3s6965evb -nographic -semihosting-config
enable=on,target=native -kernel QemuExitWhenUsingFPAndIRQOccurs.elf -d
int"
To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1838475/+subscriptions
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Qemu-devel] [Bug 1838475] Re: qemu-system-arm exits when cortex-m4 floating point used and irq occurs
2019-07-30 21:32 [Qemu-devel] [Bug 1838475] [NEW] qemu-system-arm exits when cortex-m4 floating point used and irq occurs KD
@ 2019-07-31 9:20 ` Alex Bennée
2019-08-01 11:00 ` Peter Maydell
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Alex Bennée @ 2019-07-31 9:20 UTC (permalink / raw)
To: qemu-devel
** Tags added: arm mprofile tcg
** Tags added: testcase
--
You received this bug notification because you are a member of qemu-
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https://bugs.launchpad.net/bugs/1838475
Title:
qemu-system-arm exits when cortex-m4 floating point used and irq
occurs
Status in QEMU:
New
Bug description:
qemu-system-arm exits with
"...Secure UsageFault with CFSR.NOCP because NSACR.CP10 prevents stacking FP regs
...taking pending nonsecure exception 3
Taking exception 7 [Breakpoint]
qemu: fatal: Lockup: can't escalate 3 to HardFault (current priority -1)"
when emulating Cortex-m4, executing at least 1 floating point
instruction, and then an irq (e.g. sys tick) occurring.
CPACR.CP10 and CPACR.CP11 are set to 0x3 respectively prior to
executing the fp instructions.
NOTE: NSACR does not appear to be a cortex m4 register.
Attached is a simplified elf to repro the issue.
The qemu command line is: "qemu-system-arm --gdb tcp::1234 -cpu
cortex-m4 -machine lm3s6965evb -nographic -semihosting-config
enable=on,target=native -kernel QemuExitWhenUsingFPAndIRQOccurs.elf -d
int"
To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1838475/+subscriptions
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Qemu-devel] [Bug 1838475] Re: qemu-system-arm exits when cortex-m4 floating point used and irq occurs
2019-07-30 21:32 [Qemu-devel] [Bug 1838475] [NEW] qemu-system-arm exits when cortex-m4 floating point used and irq occurs KD
2019-07-31 9:20 ` [Qemu-devel] [Bug 1838475] " Alex Bennée
@ 2019-08-01 11:00 ` Peter Maydell
2019-08-01 16:43 ` KD
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Peter Maydell @ 2019-08-01 11:00 UTC (permalink / raw)
To: qemu-devel
I think this patch should fix this bug:
https://patchew.org/QEMU/20190801105742.20036-1-peter.maydell@linaro.org/
** Changed in: qemu
Status: New => In Progress
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1838475
Title:
qemu-system-arm exits when cortex-m4 floating point used and irq
occurs
Status in QEMU:
In Progress
Bug description:
qemu-system-arm exits with
"...Secure UsageFault with CFSR.NOCP because NSACR.CP10 prevents stacking FP regs
...taking pending nonsecure exception 3
Taking exception 7 [Breakpoint]
qemu: fatal: Lockup: can't escalate 3 to HardFault (current priority -1)"
when emulating Cortex-m4, executing at least 1 floating point
instruction, and then an irq (e.g. sys tick) occurring.
CPACR.CP10 and CPACR.CP11 are set to 0x3 respectively prior to
executing the fp instructions.
NOTE: NSACR does not appear to be a cortex m4 register.
Attached is a simplified elf to repro the issue.
The qemu command line is: "qemu-system-arm --gdb tcp::1234 -cpu
cortex-m4 -machine lm3s6965evb -nographic -semihosting-config
enable=on,target=native -kernel QemuExitWhenUsingFPAndIRQOccurs.elf -d
int"
To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1838475/+subscriptions
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Qemu-devel] [Bug 1838475] Re: qemu-system-arm exits when cortex-m4 floating point used and irq occurs
2019-07-30 21:32 [Qemu-devel] [Bug 1838475] [NEW] qemu-system-arm exits when cortex-m4 floating point used and irq occurs KD
2019-07-31 9:20 ` [Qemu-devel] [Bug 1838475] " Alex Bennée
2019-08-01 11:00 ` Peter Maydell
@ 2019-08-01 16:43 ` KD
2019-08-02 16:38 ` Peter Maydell
2019-08-16 4:50 ` Thomas Huth
4 siblings, 0 replies; 6+ messages in thread
From: KD @ 2019-08-01 16:43 UTC (permalink / raw)
To: qemu-devel
I confirm that this fixes the issue above.
Thank you for your help! It is much appreciated.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1838475
Title:
qemu-system-arm exits when cortex-m4 floating point used and irq
occurs
Status in QEMU:
In Progress
Bug description:
qemu-system-arm exits with
"...Secure UsageFault with CFSR.NOCP because NSACR.CP10 prevents stacking FP regs
...taking pending nonsecure exception 3
Taking exception 7 [Breakpoint]
qemu: fatal: Lockup: can't escalate 3 to HardFault (current priority -1)"
when emulating Cortex-m4, executing at least 1 floating point
instruction, and then an irq (e.g. sys tick) occurring.
CPACR.CP10 and CPACR.CP11 are set to 0x3 respectively prior to
executing the fp instructions.
NOTE: NSACR does not appear to be a cortex m4 register.
Attached is a simplified elf to repro the issue.
The qemu command line is: "qemu-system-arm --gdb tcp::1234 -cpu
cortex-m4 -machine lm3s6965evb -nographic -semihosting-config
enable=on,target=native -kernel QemuExitWhenUsingFPAndIRQOccurs.elf -d
int"
To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1838475/+subscriptions
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Qemu-devel] [Bug 1838475] Re: qemu-system-arm exits when cortex-m4 floating point used and irq occurs
2019-07-30 21:32 [Qemu-devel] [Bug 1838475] [NEW] qemu-system-arm exits when cortex-m4 floating point used and irq occurs KD
` (2 preceding siblings ...)
2019-08-01 16:43 ` KD
@ 2019-08-02 16:38 ` Peter Maydell
2019-08-16 4:50 ` Thomas Huth
4 siblings, 0 replies; 6+ messages in thread
From: Peter Maydell @ 2019-08-02 16:38 UTC (permalink / raw)
To: qemu-devel
Now fixed in git master; will be in the imminent 4.1 release.
** Changed in: qemu
Status: In Progress => Fix Committed
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1838475
Title:
qemu-system-arm exits when cortex-m4 floating point used and irq
occurs
Status in QEMU:
Fix Committed
Bug description:
qemu-system-arm exits with
"...Secure UsageFault with CFSR.NOCP because NSACR.CP10 prevents stacking FP regs
...taking pending nonsecure exception 3
Taking exception 7 [Breakpoint]
qemu: fatal: Lockup: can't escalate 3 to HardFault (current priority -1)"
when emulating Cortex-m4, executing at least 1 floating point
instruction, and then an irq (e.g. sys tick) occurring.
CPACR.CP10 and CPACR.CP11 are set to 0x3 respectively prior to
executing the fp instructions.
NOTE: NSACR does not appear to be a cortex m4 register.
Attached is a simplified elf to repro the issue.
The qemu command line is: "qemu-system-arm --gdb tcp::1234 -cpu
cortex-m4 -machine lm3s6965evb -nographic -semihosting-config
enable=on,target=native -kernel QemuExitWhenUsingFPAndIRQOccurs.elf -d
int"
To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1838475/+subscriptions
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Qemu-devel] [Bug 1838475] Re: qemu-system-arm exits when cortex-m4 floating point used and irq occurs
2019-07-30 21:32 [Qemu-devel] [Bug 1838475] [NEW] qemu-system-arm exits when cortex-m4 floating point used and irq occurs KD
` (3 preceding siblings ...)
2019-08-02 16:38 ` Peter Maydell
@ 2019-08-16 4:50 ` Thomas Huth
4 siblings, 0 replies; 6+ messages in thread
From: Thomas Huth @ 2019-08-16 4:50 UTC (permalink / raw)
To: qemu-devel
https://git.qemu.org/?p=qemu.git;a=commitdiff;h=02ac2f7f613b47f6a5b3
** Changed in: qemu
Status: Fix Committed => Fix Released
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1838475
Title:
qemu-system-arm exits when cortex-m4 floating point used and irq
occurs
Status in QEMU:
Fix Released
Bug description:
qemu-system-arm exits with
"...Secure UsageFault with CFSR.NOCP because NSACR.CP10 prevents stacking FP regs
...taking pending nonsecure exception 3
Taking exception 7 [Breakpoint]
qemu: fatal: Lockup: can't escalate 3 to HardFault (current priority -1)"
when emulating Cortex-m4, executing at least 1 floating point
instruction, and then an irq (e.g. sys tick) occurring.
CPACR.CP10 and CPACR.CP11 are set to 0x3 respectively prior to
executing the fp instructions.
NOTE: NSACR does not appear to be a cortex m4 register.
Attached is a simplified elf to repro the issue.
The qemu command line is: "qemu-system-arm --gdb tcp::1234 -cpu
cortex-m4 -machine lm3s6965evb -nographic -semihosting-config
enable=on,target=native -kernel QemuExitWhenUsingFPAndIRQOccurs.elf -d
int"
To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1838475/+subscriptions
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2019-08-16 4:57 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-07-30 21:32 [Qemu-devel] [Bug 1838475] [NEW] qemu-system-arm exits when cortex-m4 floating point used and irq occurs KD
2019-07-31 9:20 ` [Qemu-devel] [Bug 1838475] " Alex Bennée
2019-08-01 11:00 ` Peter Maydell
2019-08-01 16:43 ` KD
2019-08-02 16:38 ` Peter Maydell
2019-08-16 4:50 ` Thomas Huth
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