From: Valdis.Kletnieks@vt.edu
To: Gabriel FERNANDEZ <gabriel.fernandez@st.com>
Cc: Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>,
Srinivas Kandagatla <srinivas.kandagatla@gmail.com>,
Maxime Coquelin <maxime.coquelin@st.com>,
Patrice Chotard <patrice.chotard@st.com>,
Russell King <linux@arm.linux.org.uk>,
Kishon Vijay Abraham I <kishon@ti.com>,
Grant Likely <grant.likely@linaro.org>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, kernel@stlinux.com,
Lee Jones <lee.jones@linaro.org>,
Gabriel Fernandez <gabriel.fernandez@linaro.org>,
Harsh Gupta <harsh.gupta@st.com>
Subject: Re: [PATCH v3 6/8] phy: miphy28lp: Add SSC support for PCIE
Date: Mon, 29 Sep 2014 15:19:28 -0400 [thread overview]
Message-ID: <15685.1412018368@turing-police.cc.vt.edu> (raw)
In-Reply-To: Your message of "Fri, 26 Sep 2014 10:54:15 +0200." <1411721657-9924-7-git-send-email-gabriel.fernandez@linaro.org>
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On Fri, 26 Sep 2014 10:54:15 +0200, Gabriel FERNANDEZ said:
> SSC is the technique of modulating the operating frequency of a signal
> slightly to spread its radiated emissions over a range of frequencies.
> This reduction in the maximum emission for a given frequency helps meet
> radiated emission requirements.
> These settings are applicable for PCIE with Internal clock.
> + writeb_relaxed(0x69, miphy_phy->base + MIPHY_PLL_SBR_3);
> + writeb_relaxed(0x21, miphy_phy->base + MIPHY_PLL_SBR_4);
> + writeb_relaxed(0x3c, miphy_phy->base + MIPHY_PLL_SBR_2);
> + writeb_relaxed(0x21, miphy_phy->base + MIPHY_PLL_SBR_4);
> + writeb_relaxed(0x00, miphy_phy->base + MIPHY_PLL_SBR_1);
> + writeb_relaxed(0x02, miphy_phy->base + MIPHY_PLL_SBR_1);
> + writeb_relaxed(0x00, miphy_phy->base + MIPHY_PLL_SBR_1);
I'd feel a lot better about all these magic numbers (and the triple write
to SBR_1) if the Changelog or something referenced where they came from....
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WARNING: multiple messages have this Message-ID (diff)
From: Valdis.Kletnieks-PjAqaU27lzQ@public.gmane.org
To: Gabriel FERNANDEZ <gabriel.fernandez-qxv4g6HH51o@public.gmane.org>
Cc: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Ian Campbell
<ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>,
Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
Srinivas Kandagatla
<srinivas.kandagatla-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Maxime Coquelin <maxime.coquelin-qxv4g6HH51o@public.gmane.org>,
Patrice Chotard <patrice.chotard-qxv4g6HH51o@public.gmane.org>,
Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>,
Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org>,
Grant Likely
<grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
kernel-F5mvAk5X5gdBDgjK7y7TUQ@public.gmane.org,
Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Gabriel Fernandez
<gabriel.fernandez-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Harsh Gupta <harsh.gupta-qxv4g6HH51o@public.gmane.org>
Subject: Re: [PATCH v3 6/8] phy: miphy28lp: Add SSC support for PCIE
Date: Mon, 29 Sep 2014 15:19:28 -0400 [thread overview]
Message-ID: <15685.1412018368@turing-police.cc.vt.edu> (raw)
In-Reply-To: Your message of "Fri, 26 Sep 2014 10:54:15 +0200." <1411721657-9924-7-git-send-email-gabriel.fernandez-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
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On Fri, 26 Sep 2014 10:54:15 +0200, Gabriel FERNANDEZ said:
> SSC is the technique of modulating the operating frequency of a signal
> slightly to spread its radiated emissions over a range of frequencies.
> This reduction in the maximum emission for a given frequency helps meet
> radiated emission requirements.
> These settings are applicable for PCIE with Internal clock.
> + writeb_relaxed(0x69, miphy_phy->base + MIPHY_PLL_SBR_3);
> + writeb_relaxed(0x21, miphy_phy->base + MIPHY_PLL_SBR_4);
> + writeb_relaxed(0x3c, miphy_phy->base + MIPHY_PLL_SBR_2);
> + writeb_relaxed(0x21, miphy_phy->base + MIPHY_PLL_SBR_4);
> + writeb_relaxed(0x00, miphy_phy->base + MIPHY_PLL_SBR_1);
> + writeb_relaxed(0x02, miphy_phy->base + MIPHY_PLL_SBR_1);
> + writeb_relaxed(0x00, miphy_phy->base + MIPHY_PLL_SBR_1);
I'd feel a lot better about all these magic numbers (and the triple write
to SBR_1) if the Changelog or something referenced where they came from....
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WARNING: multiple messages have this Message-ID (diff)
From: Valdis.Kletnieks@vt.edu (Valdis.Kletnieks at vt.edu)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 6/8] phy: miphy28lp: Add SSC support for PCIE
Date: Mon, 29 Sep 2014 15:19:28 -0400 [thread overview]
Message-ID: <15685.1412018368@turing-police.cc.vt.edu> (raw)
In-Reply-To: Your message of "Fri, 26 Sep 2014 10:54:15 +0200." <1411721657-9924-7-git-send-email-gabriel.fernandez@linaro.org>
On Fri, 26 Sep 2014 10:54:15 +0200, Gabriel FERNANDEZ said:
> SSC is the technique of modulating the operating frequency of a signal
> slightly to spread its radiated emissions over a range of frequencies.
> This reduction in the maximum emission for a given frequency helps meet
> radiated emission requirements.
> These settings are applicable for PCIE with Internal clock.
> + writeb_relaxed(0x69, miphy_phy->base + MIPHY_PLL_SBR_3);
> + writeb_relaxed(0x21, miphy_phy->base + MIPHY_PLL_SBR_4);
> + writeb_relaxed(0x3c, miphy_phy->base + MIPHY_PLL_SBR_2);
> + writeb_relaxed(0x21, miphy_phy->base + MIPHY_PLL_SBR_4);
> + writeb_relaxed(0x00, miphy_phy->base + MIPHY_PLL_SBR_1);
> + writeb_relaxed(0x02, miphy_phy->base + MIPHY_PLL_SBR_1);
> + writeb_relaxed(0x00, miphy_phy->base + MIPHY_PLL_SBR_1);
I'd feel a lot better about all these magic numbers (and the triple write
to SBR_1) if the Changelog or something referenced where they came from....
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next prev parent reply other threads:[~2014-09-29 19:22 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-26 8:54 [PATCH v3 0/8] phy: miphy28lp: Introduce support for MiPHY28lp Gabriel FERNANDEZ
2014-09-26 8:54 ` Gabriel FERNANDEZ
2014-09-26 8:54 ` Gabriel FERNANDEZ
2014-09-26 8:54 ` [PATCH v3 1/8] phy: miphy28lp: Add Device Tree bindings for the MiPHY28lp Gabriel FERNANDEZ
2014-09-26 8:54 ` Gabriel FERNANDEZ
2014-09-26 8:54 ` Gabriel FERNANDEZ
2014-09-26 8:54 ` [PATCH v3 2/8] phy: miphy28lp: Add MiPHY28lp header file for DT x Driver defines Gabriel FERNANDEZ
2014-09-26 8:54 ` Gabriel FERNANDEZ
2014-09-26 8:54 ` Gabriel FERNANDEZ
2014-10-21 10:38 ` Kishon Vijay Abraham I
2014-10-21 10:38 ` Kishon Vijay Abraham I
2014-10-21 10:38 ` Kishon Vijay Abraham I
2014-10-21 15:49 ` Gabriel Fernandez
2014-10-21 15:49 ` Gabriel Fernandez
2014-10-21 15:49 ` Gabriel Fernandez
2014-10-22 5:20 ` Kishon Vijay Abraham I
2014-10-22 5:20 ` Kishon Vijay Abraham I
2014-10-22 5:20 ` Kishon Vijay Abraham I
2014-09-26 8:54 ` [PATCH v3 3/8] phy: miphy28lp: Provide support for the MiPHY28lp Generic PHY Gabriel FERNANDEZ
2014-09-26 8:54 ` Gabriel FERNANDEZ
2014-09-26 8:54 ` [PATCH v3 4/8] ARM: DT: STi: STiH407: Add DT node for MiPHY28lp Gabriel FERNANDEZ
2014-09-26 8:54 ` Gabriel FERNANDEZ
2014-09-26 8:54 ` Gabriel FERNANDEZ
2014-09-26 8:54 ` [PATCH v3 5/8] phy: miphy28lp: Add SSC support for SATA Gabriel FERNANDEZ
2014-09-26 8:54 ` Gabriel FERNANDEZ
2014-09-26 8:54 ` [PATCH v3 6/8] phy: miphy28lp: Add SSC support for PCIE Gabriel FERNANDEZ
2014-09-26 8:54 ` Gabriel FERNANDEZ
2014-09-29 19:19 ` Valdis.Kletnieks [this message]
2014-09-29 19:19 ` Valdis.Kletnieks at vt.edu
2014-09-29 19:19 ` Valdis.Kletnieks-PjAqaU27lzQ
2014-10-13 8:16 ` Gabriel Fernandez
2014-10-13 8:16 ` Gabriel Fernandez
2014-10-13 8:16 ` Gabriel Fernandez
2014-10-13 16:12 ` Valdis.Kletnieks
2014-10-13 16:12 ` Valdis.Kletnieks at vt.edu
2014-10-13 16:12 ` Valdis.Kletnieks
2014-10-21 11:49 ` Kishon Vijay Abraham I
2014-10-21 11:49 ` Kishon Vijay Abraham I
2014-10-21 11:49 ` Kishon Vijay Abraham I
2014-10-21 15:51 ` Gabriel Fernandez
2014-10-21 15:51 ` Gabriel Fernandez
2014-10-21 15:51 ` Gabriel Fernandez
2014-09-26 8:54 ` [PATCH v3 7/8] phy: miphy28lp: Tune tx impedance across Soc cuts Gabriel FERNANDEZ
2014-09-26 8:54 ` Gabriel FERNANDEZ
2014-09-26 8:54 ` Gabriel FERNANDEZ
2014-09-26 8:54 ` [PATCH v3 8/8] ARM: multi_v7_defconfig: Enable MiPHY28lp - ST's Generic (SATA, PCIe & USB3) PHY Gabriel FERNANDEZ
2014-09-26 8:54 ` Gabriel FERNANDEZ
2014-09-26 8:54 ` Gabriel FERNANDEZ
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