[U-Boot] [PATCH 0/8] Enablement of PCIe controller for LX2-Rev2

[U-Boot] [PATCH 0/8] Enablement of PCIe controller for LX2-Rev2

[Wasim Khan]

LX2-Rev1 has MV PCIe controller which use pcie_layerscape_gen4 driver.
LX2-Rev2 and other layerscape devices has SNP PCIe controller which use
pcie_layerscape driver. 

This patch set enables support for LX2-Rev2 and use pcie_layerscape or 
pcie_layerscape_gen4 driver based on SoC variant and SoC Version.

Wasim Khan (8):
  driver/pci : enable pcie layerscape code for pcie gen4 code
  pci: layerscape: Add stream_id_cur field to ls_pcie structure
  pci: layerscape: Update API names for layerscape fixup
  pci: layerscape: Update API names for layerscape gen4 fixup
  armv8: lx2160a: Add FSL_PEX_STREAM_ID_END for LX2160A
  pci: layerscape: Common device tree fixup for NXP SoCs
  pci: layerscape: Move streamId allocation to common device tree fixup
  pci: layerscape: device tree fixup based on SoC and Version

 .../asm/arch-fsl-layerscape/stream_id_lsch3.h      |   8 +-
 drivers/pci/Makefile                               |   5 +-
 drivers/pci/pcie_layerscape.c                      |   3 +-
 drivers/pci/pcie_layerscape.h                      |   3 +-
 drivers/pci/pcie_layerscape_fixup.c                |  44 ++++----
 drivers/pci/pcie_layerscape_fixup_common.c         | 120 +++++++++++++++++++++
 drivers/pci/pcie_layerscape_fixup_common.h         |  23 ++++
 drivers/pci/pcie_layerscape_gen4_fixup.c           |  43 ++++----
 8 files changed, 191 insertions(+), 58 deletions(-)
 create mode 100644 drivers/pci/pcie_layerscape_fixup_common.c
 create mode 100644 drivers/pci/pcie_layerscape_fixup_common.h

-- 
2.7.4

[U-Boot] [PATCH 1/8] driver/pci : enable pcie layerscape code for pcie gen4 code

[Wasim Khan]

lx2 rev2 has SNP controller. Enable pcie_layerscape code
for CONFIG_PCIE_LAYERSCAPE_GEN4. Based on SoC and revision
pcie controller probe will be invoked.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
---
 drivers/pci/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index b1d3dc8..d6a9b8c 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -35,7 +35,7 @@ obj-$(CONFIG_PCIE_FSL) += pcie_fsl.o pcie_fsl_fixup.o
 obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape.o
 obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape_fixup.o
 obj-$(CONFIG_PCIE_LAYERSCAPE_GEN4) += pcie_layerscape_gen4.o \
-				pcie_layerscape_gen4_fixup.o
+				pcie_layerscape_gen4_fixup.o pcie_layerscape.o
 obj-$(CONFIG_PCI_XILINX) += pcie_xilinx.o
 obj-$(CONFIG_PCIE_INTEL_FPGA) += pcie_intel_fpga.o
 obj-$(CONFIG_PCI_KEYSTONE) += pcie_dw_ti.o
-- 
2.7.4

[U-Boot] [PATCH 2/8] pci: layerscape: Add stream_id_cur field to ls_pcie structure

[Wasim Khan]

Add stream_id_cur field to ls_pcie structure and initialize
it with 0 for all pcie controllers. This field will be used
for streamId calculation.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
---
 drivers/pci/pcie_layerscape.c | 3 ++-
 drivers/pci/pcie_layerscape.h | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c
index db1375a..02f3825 100644
--- a/drivers/pci/pcie_layerscape.c
+++ b/drivers/pci/pcie_layerscape.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright 2017 NXP
+ * Copyright 2017, 2019 NXP
  * Copyright 2014-2015 Freescale Semiconductor, Inc.
  * Layerscape PCIe driver
  */
@@ -339,6 +339,7 @@ static void ls_pcie_setup_ctrl(struct ls_pcie *pcie)
 	dbi_writel(pcie, 0, PCIE_DBI_RO_WR_EN);
 
 	ls_pcie_disable_bars(pcie);
+	pcie->stream_id_cur = 0;
 }
 
 static void ls_pcie_ep_setup_atu(struct ls_pcie *pcie)
diff --git a/drivers/pci/pcie_layerscape.h b/drivers/pci/pcie_layerscape.h
index ddfbba6..60efe89 100644
--- a/drivers/pci/pcie_layerscape.h
+++ b/drivers/pci/pcie_layerscape.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2017 NXP
+ * Copyright 2017, 2019 NXP
  * Copyright 2014-2015 Freescale Semiconductor, Inc.
  * Layerscape PCIe driver
  */
@@ -144,6 +144,7 @@ struct ls_pcie {
 	bool big_endian;
 	bool enabled;
 	int next_lut_index;
+	int stream_id_cur;
 	int mode;
 };
 
-- 
2.7.4

[U-Boot] [PATCH 3/8] pci: layerscape: Update API names for layerscape fixup

[Wasim Khan]

Update API names for layerscape fixup.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
---
 drivers/pci/pcie_layerscape_fixup.c | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c
index 089e031..e0dcd97 100644
--- a/drivers/pci/pcie_layerscape_fixup.c
+++ b/drivers/pci/pcie_layerscape_fixup.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright 2017 NXP
+ * Copyright 2017, 2019 NXP
  * Copyright 2014-2015 Freescale Semiconductor, Inc.
  * Layerscape PCIe driver
  */
@@ -69,8 +69,8 @@ static void ls_pcie_lut_set_mapping(struct ls_pcie *pcie, int index, u32 devid,
  *      msi-map = <[devid] [phandle-to-msi-ctrl] [stream-id] [count]
  *                 [devid] [phandle-to-msi-ctrl] [stream-id] [count]>;
  */
-static void fdt_pcie_set_msi_map_entry(void *blob, struct ls_pcie *pcie,
-				       u32 devid, u32 streamid)
+static void fdt_pcie_set_msi_map_entry_ls(void *blob, struct ls_pcie *pcie,
+					  u32 devid, u32 streamid)
 {
 	u32 *prop;
 	u32 phandle;
@@ -122,8 +122,8 @@ static void fdt_pcie_set_msi_map_entry(void *blob, struct ls_pcie *pcie,
  *      iommu-map = <[devid] [phandle-to-iommu-ctrl] [stream-id] [count]
  *                 [devid] [phandle-to-iommu-ctrl] [stream-id] [count]>;
  */
-static void fdt_pcie_set_iommu_map_entry(void *blob, struct ls_pcie *pcie,
-				       u32 devid, u32 streamid)
+static void fdt_pcie_set_iommu_map_entry_ls(void *blob, struct ls_pcie *pcie,
+					    u32 devid, u32 streamid)
 {
 	u32 *prop;
 	u32 iommu_map[4];
@@ -175,7 +175,7 @@ static void fdt_pcie_set_iommu_map_entry(void *blob, struct ls_pcie *pcie,
 	}
 }
 
-static void fdt_fixup_pcie(void *blob)
+static void fdt_fixup_pcie_ls(void *blob)
 {
 	struct udevice *dev, *bus;
 	struct ls_pcie *pcie;
@@ -209,11 +209,11 @@ static void fdt_fixup_pcie(void *blob)
 		ls_pcie_lut_set_mapping(pcie, index, bdf >> 8,
 					streamid);
 		/* update msi-map in device tree */
-		fdt_pcie_set_msi_map_entry(blob, pcie, bdf >> 8,
-					   streamid);
+		fdt_pcie_set_msi_map_entry_ls(blob, pcie, bdf >> 8,
+					      streamid);
 		/* update iommu-map in device tree */
-		fdt_pcie_set_iommu_map_entry(blob, pcie, bdf >> 8,
-					     streamid);
+		fdt_pcie_set_iommu_map_entry_ls(blob, pcie, bdf >> 8,
+						streamid);
 	}
 }
 #endif
@@ -279,7 +279,7 @@ void ft_pci_setup(void *blob, bd_t *bd)
 		ft_pcie_ls_setup(blob, pcie);
 
 #if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2)
-	fdt_fixup_pcie(blob);
+	fdt_fixup_pcie_ls(blob);
 #endif
 }
 
-- 
2.7.4

[U-Boot] [PATCH 4/8] pci: layerscape: Update API names for layerscape gen4 fixup

[Wasim Khan]

Update API names for layerscape gen4 fixup.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
---
 drivers/pci/pcie_layerscape_gen4_fixup.c | 20 ++++++++++++--------
 1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/drivers/pci/pcie_layerscape_gen4_fixup.c b/drivers/pci/pcie_layerscape_gen4_fixup.c
index 1c9e575..fe478db 100644
--- a/drivers/pci/pcie_layerscape_gen4_fixup.c
+++ b/drivers/pci/pcie_layerscape_gen4_fixup.c
@@ -64,8 +64,9 @@ static void ls_pcie_g4_lut_set_mapping(struct ls_pcie_g4 *pcie, int index,
  *      msi-map = <[devid] [phandle-to-msi-ctrl] [stream-id] [count]
  *                 [devid] [phandle-to-msi-ctrl] [stream-id] [count]>;
  */
-static void fdt_pcie_set_msi_map_entry(void *blob, struct ls_pcie_g4 *pcie,
-				       u32 devid, u32 streamid)
+static void fdt_pcie_set_msi_map_entry_ls_gen4(void *blob,
+					       struct ls_pcie_g4 *pcie,
+					       u32 devid, u32 streamid)
 {
 	u32 *prop;
 	u32 phandle;
@@ -106,8 +107,9 @@ static void fdt_pcie_set_msi_map_entry(void *blob, struct ls_pcie_g4 *pcie,
  *      iommu-map = <[devid] [phandle-to-iommu-ctrl] [stream-id] [count]
  *                 [devid] [phandle-to-iommu-ctrl] [stream-id] [count]>;
  */
-static void fdt_pcie_set_iommu_map_entry(void *blob, struct ls_pcie_g4 *pcie,
-					 u32 devid, u32 streamid)
+static void fdt_pcie_set_iommu_map_entry_ls_gen4(void *blob,
+						 struct ls_pcie_g4 *pcie,
+						 u32 devid, u32 streamid)
 {
 	u32 *prop;
 	u32 iommu_map[4];
@@ -145,7 +147,7 @@ static void fdt_pcie_set_iommu_map_entry(void *blob, struct ls_pcie_g4 *pcie,
 		fdt_appendprop(blob, nodeoff, "iommu-map", iommu_map, 16);
 }
 
-static void fdt_fixup_pcie(void *blob)
+static void fdt_fixup_pcie_ls_gen4(void *blob)
 {
 	struct udevice *dev, *bus;
 	struct ls_pcie_g4 *pcie;
@@ -176,9 +178,11 @@ static void fdt_fixup_pcie(void *blob)
 		/* map PCI b.d.f to streamID in LUT */
 		ls_pcie_g4_lut_set_mapping(pcie, index, bdf >> 8, streamid);
 		/* update msi-map in device tree */
-		fdt_pcie_set_msi_map_entry(blob, pcie, bdf >> 8, streamid);
+		fdt_pcie_set_msi_map_entry_ls_gen4(blob, pcie, bdf >> 8,
+						   streamid);
 		/* update iommu-map in device tree */
-		fdt_pcie_set_iommu_map_entry(blob, pcie, bdf >> 8, streamid);
+		fdt_pcie_set_iommu_map_entry_ls_gen4(blob, pcie, bdf >> 8,
+						     streamid);
 	}
 }
 #endif
@@ -238,7 +242,7 @@ void ft_pci_setup(void *blob, bd_t *bd)
 		ft_pcie_layerscape_gen4_setup(blob, pcie);
 
 #if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2)
-	fdt_fixup_pcie(blob);
+	fdt_fixup_pcie_ls_gen4(blob);
 #endif
 }
 
-- 
2.7.4

[U-Boot] [PATCH 5/8] armv8: lx2160a: Add FSL_PEX_STREAM_ID_END for LX2160A

[Wasim Khan]

Add FSL_PEX_STREAM_ID_END and remove FSL_PEX_STREAM_ID_NUM
for lx2160a.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
---
 arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h
index 93bdcc4..e518fa2 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2015-2018 NXP
+ * Copyright 2015-2019 NXP
  * Copyright 2014 Freescale Semiconductor, Inc.
  *
  */
@@ -83,14 +83,12 @@
 /* PCI - programmed in PEXn_LUT */
 #define FSL_PEX_STREAM_ID_START		7
 
-#ifdef CONFIG_ARCH_LX2160A
-#define FSL_PEX_STREAM_ID_NUM		(0x100)
-#endif
-
 #if defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1028A)
 #define FSL_PEX_STREAM_ID_END		22
 #elif defined(CONFIG_ARCH_LS1088A)
 #define FSL_PEX_STREAM_ID_END		18
+#elif defined(CONFIG_ARCH_LX2160A)
+#define FSL_PEX_STREAM_ID_END          (0x100)
 #endif
 
 
-- 
2.7.4

[U-Boot] [PATCH 6/8] pci: layerscape: Common device tree fixup for NXP SoCs

[Wasim Khan]

Add Common device tree fixup for NXP SoCs. Based on
SoC and revision call pcie_layerscape or pcie_layerscape_gen4
fixup.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
---
 drivers/pci/Makefile                       |  5 +++--
 drivers/pci/pcie_layerscape_fixup.c        |  5 +++--
 drivers/pci/pcie_layerscape_fixup_common.c | 22 ++++++++++++++++++++++
 drivers/pci/pcie_layerscape_fixup_common.h | 21 +++++++++++++++++++++
 drivers/pci/pcie_layerscape_gen4_fixup.c   |  7 ++++---
 5 files changed, 53 insertions(+), 7 deletions(-)
 create mode 100644 drivers/pci/pcie_layerscape_fixup_common.c
 create mode 100644 drivers/pci/pcie_layerscape_fixup_common.h

diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index d6a9b8c..78820b6 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -33,9 +33,10 @@ obj-$(CONFIG_PCI_AARDVARK) += pci-aardvark.o
 obj-$(CONFIG_PCIE_DW_MVEBU) += pcie_dw_mvebu.o
 obj-$(CONFIG_PCIE_FSL) += pcie_fsl.o pcie_fsl_fixup.o
 obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape.o
-obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape_fixup.o
+obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape_fixup.o pcie_layerscape_fixup_common.o
 obj-$(CONFIG_PCIE_LAYERSCAPE_GEN4) += pcie_layerscape_gen4.o \
-				pcie_layerscape_gen4_fixup.o pcie_layerscape.o
+				pcie_layerscape_gen4_fixup.o pcie_layerscape.o \
+				pcie_layerscape_fixup_common.o pcie_layerscape_fixup.o
 obj-$(CONFIG_PCI_XILINX) += pcie_xilinx.o
 obj-$(CONFIG_PCIE_INTEL_FPGA) += pcie_intel_fpga.o
 obj-$(CONFIG_PCI_KEYSTONE) += pcie_dw_ti.o
diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c
index e0dcd97..3d563d5 100644
--- a/drivers/pci/pcie_layerscape_fixup.c
+++ b/drivers/pci/pcie_layerscape_fixup.c
@@ -17,6 +17,7 @@
 #include <asm/arch/clock.h>
 #endif
 #include "pcie_layerscape.h"
+#include "pcie_layerscape_fixup_common.h"
 
 #if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2)
 /*
@@ -271,7 +272,7 @@ static void ft_pcie_ls_setup(void *blob, struct ls_pcie *pcie)
 }
 
 /* Fixup Kernel DT for PCIe */
-void ft_pci_setup(void *blob, bd_t *bd)
+void ft_pci_setup_ls(void *blob, bd_t *bd)
 {
 	struct ls_pcie *pcie;
 
@@ -284,7 +285,7 @@ void ft_pci_setup(void *blob, bd_t *bd)
 }
 
 #else /* !CONFIG_OF_BOARD_SETUP */
-void ft_pci_setup(void *blob, bd_t *bd)
+void ft_pci_setup_ls(void *blob, bd_t *bd)
 {
 }
 #endif
diff --git a/drivers/pci/pcie_layerscape_fixup_common.c b/drivers/pci/pcie_layerscape_fixup_common.c
new file mode 100644
index 0000000..6f46363
--- /dev/null
+++ b/drivers/pci/pcie_layerscape_fixup_common.c
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 NXP
+ *
+ */
+
+#include <common.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/soc.h>
+#include "pcie_layerscape_fixup_common.h"
+
+void ft_pci_setup(void *blob, bd_t *bd)
+{
+	uint svr;
+
+	svr = SVR_SOC_VER(get_svr());
+
+	if (svr == SVR_LX2160A && IS_SVR_REV(get_svr(), 1, 0))
+		ft_pci_setup_ls_gen4(blob, bd);
+	else
+		ft_pci_setup_ls(blob, bd);
+}
diff --git a/drivers/pci/pcie_layerscape_fixup_common.h b/drivers/pci/pcie_layerscape_fixup_common.h
new file mode 100644
index 0000000..b24893e
--- /dev/null
+++ b/drivers/pci/pcie_layerscape_fixup_common.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2019 NXP
+ *
+ * Layerscape PCIe driver
+ */
+#ifndef _PCIE_LAYERSCAPE_FIXUP_COMMON_H_
+#define _PCIE_LAYERSCAPE_FIXUP_COMMON_H_
+
+#include <common.h>
+
+void ft_pci_setup_ls(void *blob, bd_t *bd);
+#ifdef CONFIG_PCIE_LAYERSCAPE_GEN4
+void ft_pci_setup_ls_gen4(void *blob, bd_t *bd);
+#else
+static void ft_pci_setup_ls_gen4(void *blob, bd_t *bd)
+{
+}
+#endif
+
+#endif //_PCIE_LAYERSCAPE_FIXUP_COMMON_H_
diff --git a/drivers/pci/pcie_layerscape_gen4_fixup.c b/drivers/pci/pcie_layerscape_gen4_fixup.c
index fe478db..480d242 100644
--- a/drivers/pci/pcie_layerscape_gen4_fixup.c
+++ b/drivers/pci/pcie_layerscape_gen4_fixup.c
@@ -19,6 +19,7 @@
 #include <asm/arch/clock.h>
 #endif
 #include "pcie_layerscape_gen4.h"
+#include "pcie_layerscape_fixup_common.h"
 
 #if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2)
 /*
@@ -37,7 +38,7 @@ static int ls_pcie_g4_next_streamid(struct ls_pcie_g4 *pcie)
 {
 	int stream_id = pcie->stream_id_cur;
 
-	if (stream_id > FSL_PEX_STREAM_ID_NUM)
+	if (stream_id > FSL_PEX_STREAM_ID_END)
 		return -EINVAL;
 
 	pcie->stream_id_cur++;
@@ -234,7 +235,7 @@ static void ft_pcie_layerscape_gen4_setup(void *blob, struct ls_pcie_g4 *pcie)
 }
 
 /* Fixup Kernel DT for PCIe */
-void ft_pci_setup(void *blob, bd_t *bd)
+void ft_pci_setup_ls_gen4(void *blob, bd_t *bd)
 {
 	struct ls_pcie_g4 *pcie;
 
@@ -247,7 +248,7 @@ void ft_pci_setup(void *blob, bd_t *bd)
 }
 
 #else /* !CONFIG_OF_BOARD_SETUP */
-void ft_pci_setup(void *blob, bd_t *bd)
+void ft_pci_setup_ls_gen4(void *blob, bd_t *bd)
 {
 }
 #endif
-- 
2.7.4

[U-Boot] [PATCH 7/8] pci: layerscape: Move streamId allocation to common device tree fixup

[Wasim Khan]

Move streamId allocation to layerscape common device tree fixup.
Calculate streamId based on SoC variant.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
---
 drivers/pci/pcie_layerscape_fixup.c        | 16 ++++------------
 drivers/pci/pcie_layerscape_fixup_common.c | 22 ++++++++++++++++++++++
 drivers/pci/pcie_layerscape_fixup_common.h |  1 +
 drivers/pci/pcie_layerscape_gen4_fixup.c   | 18 ++++--------------
 4 files changed, 31 insertions(+), 26 deletions(-)

diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c
index 3d563d5..ae4594e 100644
--- a/drivers/pci/pcie_layerscape_fixup.c
+++ b/drivers/pci/pcie_layerscape_fixup.c
@@ -31,17 +31,6 @@ static int ls_pcie_next_lut_index(struct ls_pcie *pcie)
 		return -ENOSPC;  /* LUT is full */
 }
 
-/* returns the next available streamid for pcie, -errno if failed */
-static int ls_pcie_next_streamid(void)
-{
-	static int next_stream_id = FSL_PEX_STREAM_ID_START;
-
-	if (next_stream_id > FSL_PEX_STREAM_ID_END)
-		return -EINVAL;
-
-	return next_stream_id++;
-}
-
 static void lut_writel(struct ls_pcie *pcie, unsigned int value,
 		       unsigned int offset)
 {
@@ -192,10 +181,13 @@ static void fdt_fixup_pcie_ls(void *blob)
 			bus = bus->parent;
 		pcie = dev_get_priv(bus);
 
-		streamid = ls_pcie_next_streamid();
+		streamid = pcie_next_streamid(pcie->stream_id_cur, pcie->idx);
+
 		if (streamid < 0) {
 			debug("ERROR: no stream ids free\n");
 			continue;
+		} else {
+			pcie->stream_id_cur++;
 		}
 
 		index = ls_pcie_next_lut_index(pcie);
diff --git a/drivers/pci/pcie_layerscape_fixup_common.c b/drivers/pci/pcie_layerscape_fixup_common.c
index 6f46363..e5c63a7 100644
--- a/drivers/pci/pcie_layerscape_fixup_common.c
+++ b/drivers/pci/pcie_layerscape_fixup_common.c
@@ -20,3 +20,25 @@ void ft_pci_setup(void *blob, bd_t *bd)
 	else
 		ft_pci_setup_ls(blob, bd);
 }
+
+#ifdef CONFIG_ARCH_LX2160A
+/* returns the next available streamid for pcie, -errno if failed */
+int pcie_next_streamid(int currentid, int idx)
+{
+	if (currentid > FSL_PEX_STREAM_ID_END)
+		return -EINVAL;
+
+	return currentid | ((idx + 1) << 11);
+}
+#else
+/* returns the next available streamid for pcie, -errno if failed */
+int pcie_next_streamid(int currentid, int idx)
+{
+	static int next_stream_id = FSL_PEX_STREAM_ID_START;
+
+	if (next_stream_id > FSL_PEX_STREAM_ID_END)
+		return -EINVAL;
+
+	return next_stream_id++;
+}
+#endif
diff --git a/drivers/pci/pcie_layerscape_fixup_common.h b/drivers/pci/pcie_layerscape_fixup_common.h
index b24893e..0ab02b6 100644
--- a/drivers/pci/pcie_layerscape_fixup_common.h
+++ b/drivers/pci/pcie_layerscape_fixup_common.h
@@ -17,5 +17,6 @@ static void ft_pci_setup_ls_gen4(void *blob, bd_t *bd)
 {
 }
 #endif
+int pcie_next_streamid(int currentid, int id);
 
 #endif //_PCIE_LAYERSCAPE_FIXUP_COMMON_H_
diff --git a/drivers/pci/pcie_layerscape_gen4_fixup.c b/drivers/pci/pcie_layerscape_gen4_fixup.c
index 480d242..28cfc9a 100644
--- a/drivers/pci/pcie_layerscape_gen4_fixup.c
+++ b/drivers/pci/pcie_layerscape_gen4_fixup.c
@@ -33,19 +33,6 @@ static int ls_pcie_g4_next_lut_index(struct ls_pcie_g4 *pcie)
 	return -ENOSPC;  /* LUT is full */
 }
 
-/* returns the next available streamid for pcie, -errno if failed */
-static int ls_pcie_g4_next_streamid(struct ls_pcie_g4 *pcie)
-{
-	int stream_id = pcie->stream_id_cur;
-
-	if (stream_id > FSL_PEX_STREAM_ID_END)
-		return -EINVAL;
-
-	pcie->stream_id_cur++;
-
-	return stream_id | ((pcie->idx + 1) << 11);
-}
-
 /*
  * Program a single LUT entry
  */
@@ -162,10 +149,13 @@ static void fdt_fixup_pcie_ls_gen4(void *blob)
 			bus = bus->parent;
 		pcie = dev_get_priv(bus);
 
-		streamid = ls_pcie_g4_next_streamid(pcie);
+		streamid = pcie_next_streamid(pcie->stream_id_cur, pcie->idx);
+
 		if (streamid < 0) {
 			debug("ERROR: no stream ids free\n");
 			continue;
+		} else {
+			pcie->stream_id_cur++;
 		}
 
 		index = ls_pcie_g4_next_lut_index(pcie);
-- 
2.7.4

[U-Boot] [PATCH 8/8] pci: layerscape: device tree fixup based on SoC and Version

[Wasim Khan]

lx2 rev2 requires device tree fixup as it has SNP pcie controller.
Add device tree fixup for lx2 rev2 based on SoC and Version.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
---
 drivers/pci/pcie_layerscape_fixup.c        |  1 +
 drivers/pci/pcie_layerscape_fixup_common.c | 76 ++++++++++++++++++++++++++++++
 drivers/pci/pcie_layerscape_fixup_common.h |  1 +
 3 files changed, 78 insertions(+)

diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c
index ae4594e..fb3c5bf 100644
--- a/drivers/pci/pcie_layerscape_fixup.c
+++ b/drivers/pci/pcie_layerscape_fixup.c
@@ -208,6 +208,7 @@ static void fdt_fixup_pcie_ls(void *blob)
 		fdt_pcie_set_iommu_map_entry_ls(blob, pcie, bdf >> 8,
 						streamid);
 	}
+	pcie_board_fix_fdt(blob);
 }
 #endif
 
diff --git a/drivers/pci/pcie_layerscape_fixup_common.c b/drivers/pci/pcie_layerscape_fixup_common.c
index e5c63a7..f42faa2 100644
--- a/drivers/pci/pcie_layerscape_fixup_common.c
+++ b/drivers/pci/pcie_layerscape_fixup_common.c
@@ -21,6 +21,82 @@ void ft_pci_setup(void *blob, bd_t *bd)
 		ft_pci_setup_ls(blob, bd);
 }
 
+int lx2_board_fix_fdt(void *fdt)
+{
+	char *reg_name, *old_str, *new_str;
+	const char *reg_names;
+	int names_len, old_str_len, new_str_len, remaining_str_len;
+	struct str_map {
+		char *old_str;
+		char *new_str;
+	} reg_names_map[] = {
+		{ "csr_axi_slave", "regs" },
+		{ "config_axi_slave", "config" }
+	};
+	int off = -1, i;
+	u32 val;
+
+	off = fdt_node_offset_by_compatible(fdt, -1, "fsl,lx2160a-pcie");
+	while (off != -FDT_ERR_NOTFOUND) {
+		fdt_setprop(fdt, off, "compatible", "fsl,ls2088a-pcie",
+			    strlen("fsl,ls2088a-pcie") + 1);
+
+		reg_names = fdt_getprop(fdt, off, "reg-names", &names_len);
+		if (!reg_names)
+			continue;
+		reg_name = (char *)reg_names;
+		remaining_str_len = names_len - (reg_name - reg_names);
+		i = 0;
+		while ((i < ARRAY_SIZE(reg_names_map)) && remaining_str_len) {
+			old_str = reg_names_map[i].old_str;
+			new_str = reg_names_map[i].new_str;
+			old_str_len = strlen(old_str);
+			new_str_len = strlen(new_str);
+			if (memcmp(reg_name, old_str, old_str_len) == 0) {
+				/* first only leave required bytes for new_str
+				 * and copy rest of the string after it
+				 */
+				memcpy(reg_name + new_str_len,
+				       reg_name + old_str_len,
+				       remaining_str_len - old_str_len);
+
+				/* Now copy new_str */
+				memcpy(reg_name, new_str, new_str_len);
+				names_len -= old_str_len;
+				names_len += new_str_len;
+				i++;
+			}
+
+			reg_name = memchr(reg_name, '\0', remaining_str_len);
+			if (!reg_name)
+				break;
+			reg_name += 1;
+
+			remaining_str_len = names_len - (reg_name - reg_names);
+		}
+		fdt_setprop(fdt, off, "reg-names", reg_names, names_len);
+		fdt_delprop(fdt, off, "apio-wins");
+		fdt_delprop(fdt, off, "ppio-wins");
+		val = cpu_to_fdt32(0x4);
+		fdt_setprop(fdt, off, "num-lanes", &val, sizeof(val));
+		off = fdt_node_offset_by_compatible(fdt, off,
+						    "fsl,lx2160a-pcie");
+	}
+	return 0;
+}
+
+int pcie_board_fix_fdt(void *fdt)
+{
+	uint svr;
+
+	svr = SVR_SOC_VER(get_svr());
+
+	if (svr == SVR_LX2160A && IS_SVR_REV(get_svr(), 2, 0))
+		return lx2_board_fix_fdt(fdt);
+
+	return 0;
+}
+
 #ifdef CONFIG_ARCH_LX2160A
 /* returns the next available streamid for pcie, -errno if failed */
 int pcie_next_streamid(int currentid, int idx)
diff --git a/drivers/pci/pcie_layerscape_fixup_common.h b/drivers/pci/pcie_layerscape_fixup_common.h
index 0ab02b6..ef0f0a7 100644
--- a/drivers/pci/pcie_layerscape_fixup_common.h
+++ b/drivers/pci/pcie_layerscape_fixup_common.h
@@ -18,5 +18,6 @@ static void ft_pci_setup_ls_gen4(void *blob, bd_t *bd)
 }
 #endif
 int pcie_next_streamid(int currentid, int id);
+int pcie_board_fix_fdt(void *fdt);
 
 #endif //_PCIE_LAYERSCAPE_FIXUP_COMMON_H_
-- 
2.7.4

[U-Boot] [PATCH 1/8] driver/pci : enable pcie layerscape code for pcie gen4 code

[Priyanka Jain]

>-----Original Message-----
>From: Wasim Khan
>Sent: Friday, October 18, 2019 7:38 PM
>To: Priyanka Jain <priyanka.jain@nxp.com>
>Cc: u-boot at lists.denx.de; Wasim Khan <wasim.khan@nxp.com>
>Subject: [PATCH 1/8] driver/pci : enable pcie layerscape code for pcie gen4 code
>
>lx2 rev2 has SNP controller. Enable pcie_layerscape code for
>CONFIG_PCIE_LAYERSCAPE_GEN4. Based on SoC and revision pcie controller
>probe will be invoked.
>
>Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
>---
> drivers/pci/Makefile | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile index b1d3dc8..d6a9b8c
>100644
>--- a/drivers/pci/Makefile
>+++ b/drivers/pci/Makefile
>@@ -35,7 +35,7 @@ obj-$(CONFIG_PCIE_FSL) += pcie_fsl.o pcie_fsl_fixup.o
> obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape.o
> obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape_fixup.o
> obj-$(CONFIG_PCIE_LAYERSCAPE_GEN4) += pcie_layerscape_gen4.o \
>-				pcie_layerscape_gen4_fixup.o
>+				pcie_layerscape_gen4_fixup.o
>pcie_layerscape.o
Please check that there is no device which has both CONFIG_PCIE_LAYERSCAPE_GEN4 and CONFIG_PCIE_LAYERSCAPE defined.
Can we think of better config name/re-organization considering all devices.

--priyankajain
> obj-$(CONFIG_PCI_XILINX) += pcie_xilinx.o
> obj-$(CONFIG_PCIE_INTEL_FPGA) += pcie_intel_fpga.o
> obj-$(CONFIG_PCI_KEYSTONE) += pcie_dw_ti.o
>--
>2.7.4

[U-Boot] [PATCH 2/8] pci: layerscape: Add stream_id_cur field to ls_pcie structure

[Priyanka Jain]

>-----Original Message-----
>From: Wasim Khan
>Sent: Friday, October 18, 2019 7:38 PM
>To: Priyanka Jain <priyanka.jain@nxp.com>
>Cc: u-boot at lists.denx.de; Wasim Khan <wasim.khan@nxp.com>
>Subject: [PATCH 2/8] pci: layerscape: Add stream_id_cur field to ls_pcie
>structure
>
>Add stream_id_cur field to ls_pcie structure and initialize it with 0 for all pcie
>controllers. This field will be used for streamId calculation.
>
>Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
>---
> drivers/pci/pcie_layerscape.c | 3 ++-
> drivers/pci/pcie_layerscape.h | 3 ++-
> 2 files changed, 4 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c index
>db1375a..02f3825 100644
>--- a/drivers/pci/pcie_layerscape.c
>+++ b/drivers/pci/pcie_layerscape.c
>@@ -1,6 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0+
> /*
>- * Copyright 2017 NXP
>+ * Copyright 2017, 2019 NXP
Better : 2017-2019
>  * Copyright 2014-2015 Freescale Semiconductor, Inc.
>  * Layerscape PCIe driver
>  */
>@@ -339,6 +339,7 @@ static void ls_pcie_setup_ctrl(struct ls_pcie *pcie)
> 	dbi_writel(pcie, 0, PCIE_DBI_RO_WR_EN);
>
> 	ls_pcie_disable_bars(pcie);
>+	pcie->stream_id_cur = 0;
> }
>
> static void ls_pcie_ep_setup_atu(struct ls_pcie *pcie) diff --git
>a/drivers/pci/pcie_layerscape.h b/drivers/pci/pcie_layerscape.h index
>ddfbba6..60efe89 100644
>--- a/drivers/pci/pcie_layerscape.h
>+++ b/drivers/pci/pcie_layerscape.h
>@@ -1,6 +1,6 @@
> /* SPDX-License-Identifier: GPL-2.0+ */
> /*
>- * Copyright 2017 NXP
>+ * Copyright 2017, 2019 NXP
Same as above
>  * Copyright 2014-2015 Freescale Semiconductor, Inc.
>  * Layerscape PCIe driver
>  */
>@@ -144,6 +144,7 @@ struct ls_pcie {
> 	bool big_endian;
> 	bool enabled;
> 	int next_lut_index;
>+	int stream_id_cur;
> 	int mode;
> };
>
>--
>2.7.4
--priyankajain 

 

[U-Boot] [PATCH 3/8] pci: layerscape: Update API names for layerscape fixup

[Priyanka Jain]

>-----Original Message-----
>From: Wasim Khan
>Sent: Friday, October 18, 2019 7:38 PM
>To: Priyanka Jain <priyanka.jain@nxp.com>
>Cc: u-boot at lists.denx.de; Wasim Khan <wasim.khan@nxp.com>
>Subject: [PATCH 3/8] pci: layerscape: Update API names for layerscape fixup
>
>Update API names for layerscape fixup.
Better description woul be suffixing API name with _ls
Why you need this change?
>
>Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
>---
> drivers/pci/pcie_layerscape_fixup.c | 22 +++++++++++-----------
> 1 file changed, 11 insertions(+), 11 deletions(-)
>
>diff --git a/drivers/pci/pcie_layerscape_fixup.c
>b/drivers/pci/pcie_layerscape_fixup.c
>index 089e031..e0dcd97 100644
>--- a/drivers/pci/pcie_layerscape_fixup.c
>+++ b/drivers/pci/pcie_layerscape_fixup.c
>@@ -1,6 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0+
> /*
>- * Copyright 2017 NXP
>+ * Copyright 2017, 2019 NXP
2017-2019
>  * Copyright 2014-2015 Freescale Semiconductor, Inc.
>  * Layerscape PCIe driver
>  */
>@@ -69,8 +69,8 @@ static void ls_pcie_lut_set_mapping(struct ls_pcie *pcie,
>int index, u32 devid,
>  *      msi-map = <[devid] [phandle-to-msi-ctrl] [stream-id] [count]
>  *                 [devid] [phandle-to-msi-ctrl] [stream-id] [count]>;
>  */
>-static void fdt_pcie_set_msi_map_entry(void *blob, struct ls_pcie *pcie,
>-				       u32 devid, u32 streamid)
>+static void fdt_pcie_set_msi_map_entry_ls(void *blob, struct ls_pcie *pcie,
>+					  u32 devid, u32 streamid)
> {
> 	u32 *prop;
> 	u32 phandle;
>@@ -122,8 +122,8 @@ static void fdt_pcie_set_msi_map_entry(void *blob,
>struct ls_pcie *pcie,
>  *      iommu-map = <[devid] [phandle-to-iommu-ctrl] [stream-id] [count]
>  *                 [devid] [phandle-to-iommu-ctrl] [stream-id] [count]>;
>  */
>-static void fdt_pcie_set_iommu_map_entry(void *blob, struct ls_pcie *pcie,
>-				       u32 devid, u32 streamid)
>+static void fdt_pcie_set_iommu_map_entry_ls(void *blob, struct ls_pcie *pcie,
>+					    u32 devid, u32 streamid)
> {
> 	u32 *prop;
> 	u32 iommu_map[4];
>@@ -175,7 +175,7 @@ static void fdt_pcie_set_iommu_map_entry(void *blob,
>struct ls_pcie *pcie,
> 	}
> }
>
>-static void fdt_fixup_pcie(void *blob)
>+static void fdt_fixup_pcie_ls(void *blob)
> {
> 	struct udevice *dev, *bus;
> 	struct ls_pcie *pcie;
>@@ -209,11 +209,11 @@ static void fdt_fixup_pcie(void *blob)
> 		ls_pcie_lut_set_mapping(pcie, index, bdf >> 8,
> 					streamid);
> 		/* update msi-map in device tree */
>-		fdt_pcie_set_msi_map_entry(blob, pcie, bdf >> 8,
>-					   streamid);
>+		fdt_pcie_set_msi_map_entry_ls(blob, pcie, bdf >> 8,
>+					      streamid);
> 		/* update iommu-map in device tree */
>-		fdt_pcie_set_iommu_map_entry(blob, pcie, bdf >> 8,
>-					     streamid);
>+		fdt_pcie_set_iommu_map_entry_ls(blob, pcie, bdf >> 8,
>+						streamid);
> 	}
> }
> #endif
>@@ -279,7 +279,7 @@ void ft_pci_setup(void *blob, bd_t *bd)
> 		ft_pcie_ls_setup(blob, pcie);
>
> #if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2)
>-	fdt_fixup_pcie(blob);
>+	fdt_fixup_pcie_ls(blob);
> #endif
> }
>
>--
>2.7.4

--priyankajain

[U-Boot] [PATCH 3/8] pci: layerscape: Update API names for layerscape fixup

[Wasim Khan]

Hi Priyanka,

> -----Original Message-----
> From: Priyanka Jain
> Sent: Monday, October 21, 2019 11:13 AM
> To: Wasim Khan <wasim.khan@nxp.com>; Z.q. Hou <zhiqiang.hou@nxp.com>
> Cc: u-boot at lists.denx.de
> Subject: RE: [PATCH 3/8] pci: layerscape: Update API names for layerscape fixup 
> 
> 
> >-----Original Message-----
> >From: Wasim Khan
> >Sent: Friday, October 18, 2019 7:38 PM
> >To: Priyanka Jain <priyanka.jain@nxp.com>
> >Cc: u-boot at lists.denx.de; Wasim Khan <wasim.khan@nxp.com>
> >Subject: [PATCH 3/8] pci: layerscape: Update API names for layerscape
> >fixup
> >
> >Update API names for layerscape fixup.
> Better description woul be suffixing API name with _ls Why you need this
> change?

OK. Will update the description.
We have organized the code into common DT fixup and layerscape/layerscape_gen4 specific fixup.

> >
> >Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
> >---
> > drivers/pci/pcie_layerscape_fixup.c | 22 +++++++++++-----------
> > 1 file changed, 11 insertions(+), 11 deletions(-)
> >
> >diff --git a/drivers/pci/pcie_layerscape_fixup.c
> >b/drivers/pci/pcie_layerscape_fixup.c
> >index 089e031..e0dcd97 100644
> >--- a/drivers/pci/pcie_layerscape_fixup.c
> >+++ b/drivers/pci/pcie_layerscape_fixup.c
> >@@ -1,6 +1,6 @@
> > // SPDX-License-Identifier: GPL-2.0+
> > /*
> >- * Copyright 2017 NXP
> >+ * Copyright 2017, 2019 NXP
> 2017-2019
> >  * Copyright 2014-2015 Freescale Semiconductor, Inc.
> >  * Layerscape PCIe driver
> >  */
> >@@ -69,8 +69,8 @@ static void ls_pcie_lut_set_mapping(struct ls_pcie
> >*pcie, int index, u32 devid,
> >  *      msi-map = <[devid] [phandle-to-msi-ctrl] [stream-id] [count]
> >  *                 [devid] [phandle-to-msi-ctrl] [stream-id] [count]>;
> >  */
> >-static void fdt_pcie_set_msi_map_entry(void *blob, struct ls_pcie *pcie,
> >-				       u32 devid, u32 streamid)
> >+static void fdt_pcie_set_msi_map_entry_ls(void *blob, struct ls_pcie *pcie,
> >+					  u32 devid, u32 streamid)
> > {
> > 	u32 *prop;
> > 	u32 phandle;
> >@@ -122,8 +122,8 @@ static void fdt_pcie_set_msi_map_entry(void *blob,
> >struct ls_pcie *pcie,
> >  *      iommu-map = <[devid] [phandle-to-iommu-ctrl] [stream-id] [count]
> >  *                 [devid] [phandle-to-iommu-ctrl] [stream-id] [count]>;
> >  */
> >-static void fdt_pcie_set_iommu_map_entry(void *blob, struct ls_pcie *pcie,
> >-				       u32 devid, u32 streamid)
> >+static void fdt_pcie_set_iommu_map_entry_ls(void *blob, struct ls_pcie
> *pcie,
> >+					    u32 devid, u32 streamid)
> > {
> > 	u32 *prop;
> > 	u32 iommu_map[4];
> >@@ -175,7 +175,7 @@ static void fdt_pcie_set_iommu_map_entry(void
> >*blob, struct ls_pcie *pcie,
> > 	}
> > }
> >
> >-static void fdt_fixup_pcie(void *blob)
> >+static void fdt_fixup_pcie_ls(void *blob)
> > {
> > 	struct udevice *dev, *bus;
> > 	struct ls_pcie *pcie;
> >@@ -209,11 +209,11 @@ static void fdt_fixup_pcie(void *blob)
> > 		ls_pcie_lut_set_mapping(pcie, index, bdf >> 8,
> > 					streamid);
> > 		/* update msi-map in device tree */
> >-		fdt_pcie_set_msi_map_entry(blob, pcie, bdf >> 8,
> >-					   streamid);
> >+		fdt_pcie_set_msi_map_entry_ls(blob, pcie, bdf >> 8,
> >+					      streamid);
> > 		/* update iommu-map in device tree */
> >-		fdt_pcie_set_iommu_map_entry(blob, pcie, bdf >> 8,
> >-					     streamid);
> >+		fdt_pcie_set_iommu_map_entry_ls(blob, pcie, bdf >> 8,
> >+						streamid);
> > 	}
> > }
> > #endif
> >@@ -279,7 +279,7 @@ void ft_pci_setup(void *blob, bd_t *bd)
> > 		ft_pcie_ls_setup(blob, pcie);
> >
> > #if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2)
> >-	fdt_fixup_pcie(blob);
> >+	fdt_fixup_pcie_ls(blob);
> > #endif
> > }
> >
> >--
> >2.7.4
> 
> --priyankajain