* [PATCH] drm/i915/blt: fixup block_size rounding
@ 2019-10-28 16:39 ` Matthew Auld
0 siblings, 0 replies; 9+ messages in thread
From: Matthew Auld @ 2019-10-28 16:39 UTC (permalink / raw)
To: intel-gfx
There is nothing to say that the obj->base.size is actually a multiple
of the block_size.
Reported-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/gem/i915_gem_object_blt.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
index 516e61e99212..5597f1345a63 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
@@ -30,7 +30,7 @@ struct i915_vma *intel_emit_vma_fill_blt(struct intel_context *ce,
GEM_BUG_ON(intel_engine_is_virtual(ce->engine));
intel_engine_pm_get(ce->engine);
- count = div_u64(vma->size, block_size);
+ count = DIV64_U64_ROUND_UP(vma->size, block_size);
size = (1 + 8 * count) * sizeof(u32);
size = round_up(size, PAGE_SIZE);
pool = intel_engine_get_pool(ce->engine, size);
@@ -214,7 +214,7 @@ struct i915_vma *intel_emit_vma_copy_blt(struct intel_context *ce,
GEM_BUG_ON(intel_engine_is_virtual(ce->engine));
intel_engine_pm_get(ce->engine);
- count = div_u64(dst->size, block_size);
+ count = DIV64_U64_ROUND_UP(dst->size, block_size);
size = (1 + 11 * count) * sizeof(u32);
size = round_up(size, PAGE_SIZE);
pool = intel_engine_get_pool(ce->engine, size);
--
2.20.1
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [Intel-gfx] [PATCH] drm/i915/blt: fixup block_size rounding
@ 2019-10-28 16:39 ` Matthew Auld
0 siblings, 0 replies; 9+ messages in thread
From: Matthew Auld @ 2019-10-28 16:39 UTC (permalink / raw)
To: intel-gfx
There is nothing to say that the obj->base.size is actually a multiple
of the block_size.
Reported-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/gem/i915_gem_object_blt.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
index 516e61e99212..5597f1345a63 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
@@ -30,7 +30,7 @@ struct i915_vma *intel_emit_vma_fill_blt(struct intel_context *ce,
GEM_BUG_ON(intel_engine_is_virtual(ce->engine));
intel_engine_pm_get(ce->engine);
- count = div_u64(vma->size, block_size);
+ count = DIV64_U64_ROUND_UP(vma->size, block_size);
size = (1 + 8 * count) * sizeof(u32);
size = round_up(size, PAGE_SIZE);
pool = intel_engine_get_pool(ce->engine, size);
@@ -214,7 +214,7 @@ struct i915_vma *intel_emit_vma_copy_blt(struct intel_context *ce,
GEM_BUG_ON(intel_engine_is_virtual(ce->engine));
intel_engine_pm_get(ce->engine);
- count = div_u64(dst->size, block_size);
+ count = DIV64_U64_ROUND_UP(dst->size, block_size);
size = (1 + 11 * count) * sizeof(u32);
size = round_up(size, PAGE_SIZE);
pool = intel_engine_get_pool(ce->engine, size);
--
2.20.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/i915/blt: fixup block_size rounding
@ 2019-10-28 16:46 ` Ville Syrjälä
0 siblings, 0 replies; 9+ messages in thread
From: Ville Syrjälä @ 2019-10-28 16:46 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-gfx
On Mon, Oct 28, 2019 at 04:39:50PM +0000, Matthew Auld wrote:
> There is nothing to say that the obj->base.size is actually a multiple
> of the block_size.
>
> Reported-by: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/gem/i915_gem_object_blt.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
> index 516e61e99212..5597f1345a63 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
> @@ -30,7 +30,7 @@ struct i915_vma *intel_emit_vma_fill_blt(struct intel_context *ce,
> GEM_BUG_ON(intel_engine_is_virtual(ce->engine));
> intel_engine_pm_get(ce->engine);
>
> - count = div_u64(vma->size, block_size);
> + count = DIV64_U64_ROUND_UP(vma->size, block_size);
block_size size look to be u32?
> size = (1 + 8 * count) * sizeof(u32);
> size = round_up(size, PAGE_SIZE);
> pool = intel_engine_get_pool(ce->engine, size);
> @@ -214,7 +214,7 @@ struct i915_vma *intel_emit_vma_copy_blt(struct intel_context *ce,
> GEM_BUG_ON(intel_engine_is_virtual(ce->engine));
> intel_engine_pm_get(ce->engine);
>
> - count = div_u64(dst->size, block_size);
> + count = DIV64_U64_ROUND_UP(dst->size, block_size);
> size = (1 + 11 * count) * sizeof(u32);
> size = round_up(size, PAGE_SIZE);
> pool = intel_engine_get_pool(ce->engine, size);
> --
> 2.20.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/blt: fixup block_size rounding
@ 2019-10-28 16:46 ` Ville Syrjälä
0 siblings, 0 replies; 9+ messages in thread
From: Ville Syrjälä @ 2019-10-28 16:46 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-gfx
On Mon, Oct 28, 2019 at 04:39:50PM +0000, Matthew Auld wrote:
> There is nothing to say that the obj->base.size is actually a multiple
> of the block_size.
>
> Reported-by: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/gem/i915_gem_object_blt.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
> index 516e61e99212..5597f1345a63 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
> @@ -30,7 +30,7 @@ struct i915_vma *intel_emit_vma_fill_blt(struct intel_context *ce,
> GEM_BUG_ON(intel_engine_is_virtual(ce->engine));
> intel_engine_pm_get(ce->engine);
>
> - count = div_u64(vma->size, block_size);
> + count = DIV64_U64_ROUND_UP(vma->size, block_size);
block_size size look to be u32?
> size = (1 + 8 * count) * sizeof(u32);
> size = round_up(size, PAGE_SIZE);
> pool = intel_engine_get_pool(ce->engine, size);
> @@ -214,7 +214,7 @@ struct i915_vma *intel_emit_vma_copy_blt(struct intel_context *ce,
> GEM_BUG_ON(intel_engine_is_virtual(ce->engine));
> intel_engine_pm_get(ce->engine);
>
> - count = div_u64(dst->size, block_size);
> + count = DIV64_U64_ROUND_UP(dst->size, block_size);
> size = (1 + 11 * count) * sizeof(u32);
> size = round_up(size, PAGE_SIZE);
> pool = intel_engine_get_pool(ce->engine, size);
> --
> 2.20.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/i915/blt: fixup block_size rounding
@ 2019-10-28 17:33 ` Chris Wilson
0 siblings, 0 replies; 9+ messages in thread
From: Chris Wilson @ 2019-10-28 17:33 UTC (permalink / raw)
To: Matthew Auld, Ville Syrjälä; +Cc: intel-gfx
Quoting Ville Syrjälä (2019-10-28 16:46:46)
> On Mon, Oct 28, 2019 at 04:39:50PM +0000, Matthew Auld wrote:
> > There is nothing to say that the obj->base.size is actually a multiple
> > of the block_size.
> >
> > Reported-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > ---
> > drivers/gpu/drm/i915/gem/i915_gem_object_blt.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
> > index 516e61e99212..5597f1345a63 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
> > @@ -30,7 +30,7 @@ struct i915_vma *intel_emit_vma_fill_blt(struct intel_context *ce,
> > GEM_BUG_ON(intel_engine_is_virtual(ce->engine));
> > intel_engine_pm_get(ce->engine);
> >
> > - count = div_u64(vma->size, block_size);
> > + count = DIV64_U64_ROUND_UP(vma->size, block_size);
>
> block_size size look to be u32?
And we can control it to be a pot.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/blt: fixup block_size rounding
@ 2019-10-28 17:33 ` Chris Wilson
0 siblings, 0 replies; 9+ messages in thread
From: Chris Wilson @ 2019-10-28 17:33 UTC (permalink / raw)
To: Matthew Auld, Ville Syrjälä; +Cc: intel-gfx
Quoting Ville Syrjälä (2019-10-28 16:46:46)
> On Mon, Oct 28, 2019 at 04:39:50PM +0000, Matthew Auld wrote:
> > There is nothing to say that the obj->base.size is actually a multiple
> > of the block_size.
> >
> > Reported-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > ---
> > drivers/gpu/drm/i915/gem/i915_gem_object_blt.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
> > index 516e61e99212..5597f1345a63 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
> > @@ -30,7 +30,7 @@ struct i915_vma *intel_emit_vma_fill_blt(struct intel_context *ce,
> > GEM_BUG_ON(intel_engine_is_virtual(ce->engine));
> > intel_engine_pm_get(ce->engine);
> >
> > - count = div_u64(vma->size, block_size);
> > + count = DIV64_U64_ROUND_UP(vma->size, block_size);
>
> block_size size look to be u32?
And we can control it to be a pot.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/blt: fixup block_size rounding
@ 2019-10-28 20:10 ` Patchwork
0 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2019-10-28 20:10 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/blt: fixup block_size rounding
URL : https://patchwork.freedesktop.org/series/68670/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7204 -> Patchwork_15028
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15028/index.html
Known issues
------------
Here are the changes found in Patchwork_15028 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_create@basic-files:
- fi-apl-guc: [PASS][1] -> [INCOMPLETE][2] ([fdo#103927])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7204/fi-apl-guc/igt@gem_ctx_create@basic-files.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15028/fi-apl-guc/igt@gem_ctx_create@basic-files.html
* igt@gem_mmap@basic-small-bo:
- fi-icl-u3: [PASS][3] -> [DMESG-WARN][4] ([fdo#107724])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7204/fi-icl-u3/igt@gem_mmap@basic-small-bo.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15028/fi-icl-u3/igt@gem_mmap@basic-small-bo.html
#### Possible fixes ####
* igt@gem_mmap_gtt@basic:
- fi-icl-u3: [DMESG-WARN][5] ([fdo#107724]) -> [PASS][6] +1 similar issue
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7204/fi-icl-u3/igt@gem_mmap_gtt@basic.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15028/fi-icl-u3/igt@gem_mmap_gtt@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
Participating hosts (50 -> 42)
------------------------------
Additional (1): fi-kbl-soraka
Missing (9): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-icl-u2 fi-bsw-cyan fi-icl-y fi-tgl-y fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7204 -> Patchwork_15028
CI-20190529: 20190529
CI_DRM_7204: 2ec2c26b76ebf320dfecf692a928ed85797dc6b9 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5248: 81e55f1f97d73e48f00caa7e4fb98295023c5afa @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_15028: e8c18c56739789adcdb63d279683f7b49c9563b3 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
e8c18c567397 drm/i915/blt: fixup block_size rounding
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15028/index.html
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH] drm/i915/blt: fixup block_size rounding
@ 2019-10-28 21:55 Chris Wilson
0 siblings, 0 replies; 9+ messages in thread
From: Chris Wilson @ 2019-10-28 21:55 UTC (permalink / raw)
To: intel-gfx; +Cc: Matthew Auld
From: Matthew Auld <matthew.auld@intel.com>
There is nothing to say that the obj->base.size is actually a multiple
of the block_size.
v2: Use round_up() as block_size is a power-of-two
Reported-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/gem/i915_gem_object_blt.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
index 51acffd31575..07341cea46fd 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
@@ -30,7 +30,7 @@ struct i915_vma *intel_emit_vma_fill_blt(struct intel_context *ce,
GEM_BUG_ON(intel_engine_is_virtual(ce->engine));
intel_engine_pm_get(ce->engine);
- count = div_u64(vma->size, block_size);
+ count = round_up(vma->size, block_size) / block_size;
size = (1 + 8 * count) * sizeof(u32);
size = round_up(size, PAGE_SIZE);
pool = intel_engine_get_pool(ce->engine, size);
@@ -214,7 +214,7 @@ struct i915_vma *intel_emit_vma_copy_blt(struct intel_context *ce,
GEM_BUG_ON(intel_engine_is_virtual(ce->engine));
intel_engine_pm_get(ce->engine);
- count = div_u64(dst->size, block_size);
+ count = round_up(vma->size, block_size) / block_size;
size = (1 + 11 * count) * sizeof(u32);
size = round_up(size, PAGE_SIZE);
pool = intel_engine_get_pool(ce->engine, size);
--
2.24.0.rc1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
end of thread, other threads:[~2019-10-28 21:55 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-10-28 16:39 [PATCH] drm/i915/blt: fixup block_size rounding Matthew Auld
2019-10-28 16:39 ` [Intel-gfx] " Matthew Auld
2019-10-28 16:46 ` Ville Syrjälä
2019-10-28 16:46 ` [Intel-gfx] " Ville Syrjälä
2019-10-28 17:33 ` Chris Wilson
2019-10-28 17:33 ` [Intel-gfx] " Chris Wilson
2019-10-28 20:10 ` ✓ Fi.CI.BAT: success for " Patchwork
2019-10-28 20:10 ` [Intel-gfx] " Patchwork
2019-10-28 21:55 [PATCH] " Chris Wilson
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