[PATCH 0/4] Start removing legacy guc code

[PATCH 0/4] Start removing legacy guc code

[Daniele Ceraolo Spurio]

Now that we have a clearer picture of what the new GuC submission flow
is going to look like, we can start removing the code that we know we
won't use in the future. As a starter, we can get rid of the doorbells
and the GuC client code, because the former will be replaced by an H2G
notification to GuC while the latter won't make sense in the new flow as
the proxy submission mechanism is gone.

Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>

Daniele Ceraolo Spurio (4):
  drm/i915/guc: Drop leftover preemption code
  drm/i915/guc: add a helper to allocate and map guc vma
  drm/i915/guc: kill doorbell code and selftests
  drm/i915/guc: kill the GuC client

 drivers/gpu/drm/i915/gt/intel_reset.c         |   6 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc.c        |  34 +
 drivers/gpu/drm/i915/gt/uc/intel_guc.h        |  16 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c    |  21 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |   1 -
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 627 +++---------------
 .../gpu/drm/i915/gt/uc/intel_guc_submission.h |  54 +-
 drivers/gpu/drm/i915/gt/uc/intel_uc.c         |   7 +-
 drivers/gpu/drm/i915/gt/uc/selftest_guc.c     | 299 ---------
 drivers/gpu/drm/i915/i915_debugfs.c           |  18 -
 .../drm/i915/selftests/i915_live_selftests.h  |   1 -
 11 files changed, 141 insertions(+), 943 deletions(-)
 delete mode 100644 drivers/gpu/drm/i915/gt/uc/selftest_guc.c

-- 
2.23.0

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[Intel-gfx] [PATCH 0/4] Start removing legacy guc code

[Daniele Ceraolo Spurio]

Now that we have a clearer picture of what the new GuC submission flow
is going to look like, we can start removing the code that we know we
won't use in the future. As a starter, we can get rid of the doorbells
and the GuC client code, because the former will be replaced by an H2G
notification to GuC while the latter won't make sense in the new flow as
the proxy submission mechanism is gone.

Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>

Daniele Ceraolo Spurio (4):
  drm/i915/guc: Drop leftover preemption code
  drm/i915/guc: add a helper to allocate and map guc vma
  drm/i915/guc: kill doorbell code and selftests
  drm/i915/guc: kill the GuC client

 drivers/gpu/drm/i915/gt/intel_reset.c         |   6 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc.c        |  34 +
 drivers/gpu/drm/i915/gt/uc/intel_guc.h        |  16 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c    |  21 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |   1 -
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 627 +++---------------
 .../gpu/drm/i915/gt/uc/intel_guc_submission.h |  54 +-
 drivers/gpu/drm/i915/gt/uc/intel_uc.c         |   7 +-
 drivers/gpu/drm/i915/gt/uc/selftest_guc.c     | 299 ---------
 drivers/gpu/drm/i915/i915_debugfs.c           |  18 -
 .../drm/i915/selftests/i915_live_selftests.h  |   1 -
 11 files changed, 141 insertions(+), 943 deletions(-)
 delete mode 100644 drivers/gpu/drm/i915/gt/uc/selftest_guc.c

-- 
2.23.0

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[PATCH 1/4] drm/i915/guc: Drop leftover preemption code

[Daniele Ceraolo Spurio]

Remove unused enums and ctx_save_restore_disabled() function, leftover
from the legacy preemption removal.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
---
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 22 -------------------
 1 file changed, 22 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 2498c55e0ea5..2b0de6a2a02e 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -18,15 +18,6 @@
 #include "i915_drv.h"
 #include "i915_trace.h"
 
-enum {
-	GUC_PREEMPT_NONE = 0,
-	GUC_PREEMPT_INPROGRESS,
-	GUC_PREEMPT_FINISHED,
-};
-#define GUC_PREEMPT_BREADCRUMB_DWORDS	0x8
-#define GUC_PREEMPT_BREADCRUMB_BYTES	\
-	(sizeof(u32) * GUC_PREEMPT_BREADCRUMB_DWORDS)
-
 /**
  * DOC: GuC-based command submission
  *
@@ -884,19 +875,6 @@ static void guc_client_free(struct intel_guc_client *client)
 	kfree(client);
 }
 
-static inline bool ctx_save_restore_disabled(struct intel_context *ce)
-{
-	u32 sr = ce->lrc_reg_state[CTX_CONTEXT_CONTROL + 1];
-
-#define SR_DISABLED \
-	_MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT | \
-			   CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT)
-
-	return (sr & SR_DISABLED) == SR_DISABLED;
-
-#undef SR_DISABLED
-}
-
 static int guc_clients_create(struct intel_guc *guc)
 {
 	struct intel_guc_client *client;
-- 
2.23.0

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[Intel-gfx] [PATCH 1/4] drm/i915/guc: Drop leftover preemption code

[Daniele Ceraolo Spurio]

Remove unused enums and ctx_save_restore_disabled() function, leftover
from the legacy preemption removal.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
---
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 22 -------------------
 1 file changed, 22 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 2498c55e0ea5..2b0de6a2a02e 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -18,15 +18,6 @@
 #include "i915_drv.h"
 #include "i915_trace.h"
 
-enum {
-	GUC_PREEMPT_NONE = 0,
-	GUC_PREEMPT_INPROGRESS,
-	GUC_PREEMPT_FINISHED,
-};
-#define GUC_PREEMPT_BREADCRUMB_DWORDS	0x8
-#define GUC_PREEMPT_BREADCRUMB_BYTES	\
-	(sizeof(u32) * GUC_PREEMPT_BREADCRUMB_DWORDS)
-
 /**
  * DOC: GuC-based command submission
  *
@@ -884,19 +875,6 @@ static void guc_client_free(struct intel_guc_client *client)
 	kfree(client);
 }
 
-static inline bool ctx_save_restore_disabled(struct intel_context *ce)
-{
-	u32 sr = ce->lrc_reg_state[CTX_CONTEXT_CONTROL + 1];
-
-#define SR_DISABLED \
-	_MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT | \
-			   CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT)
-
-	return (sr & SR_DISABLED) == SR_DISABLED;
-
-#undef SR_DISABLED
-}
-
 static int guc_clients_create(struct intel_guc *guc)
 {
 	struct intel_guc_client *client;
-- 
2.23.0

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Re: [PATCH 1/4] drm/i915/guc: Drop leftover preemption code

[Chris Wilson]

Quoting Daniele Ceraolo Spurio (2019-11-06 22:25:47)
> Remove unused enums and ctx_save_restore_disabled() function, leftover
> from the legacy preemption removal.
> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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Re: [Intel-gfx] [PATCH 1/4] drm/i915/guc: Drop leftover preemption code

[Chris Wilson]

Quoting Daniele Ceraolo Spurio (2019-11-06 22:25:47)
> Remove unused enums and ctx_save_restore_disabled() function, leftover
> from the legacy preemption removal.
> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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[PATCH 2/4] drm/i915/guc: add a helper to allocate and map guc vma

[Daniele Ceraolo Spurio]

We already have a couple of use-cases in the code and another one will
come in one of the later patches in the series.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc.c        | 34 +++++++++++++++++++
 drivers/gpu/drm/i915/gt/uc/intel_guc.h        |  2 ++
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c    | 21 +++---------
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 22 ++++--------
 4 files changed, 47 insertions(+), 32 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 019ae6486e8d..12e0569372d0 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -689,3 +689,37 @@ struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size)
 	i915_gem_object_put(obj);
 	return vma;
 }
+
+/**
+ * intel_guc_allocate_and_map_vma() - Allocate and map VMA for GuC usage
+ * @guc:	the guc
+ * @size:	size of area to allocate (both virtual space and memory)
+ * @out_vma:	return variable for the allocated vma pointer
+ * @out_vaddr:	return variable for the obj mapping
+ *
+ * This wrapper calls intel_guc_allocate_vma() and then maps the allocated
+ * object with I915_MAP_WB.
+ *
+ * Return:	0 if successful, a negative errno code otherwise.
+ */
+int intel_guc_allocate_and_map_vma(struct intel_guc *guc, u32 size,
+				   struct i915_vma **out_vma, void **out_vaddr)
+{
+	struct i915_vma *vma;
+	void *vaddr;
+
+	vma = intel_guc_allocate_vma(guc, size);
+	if (IS_ERR(vma))
+		return PTR_ERR(vma);
+
+	vaddr = i915_gem_object_pin_map(vma->obj, I915_MAP_WB);
+	if (IS_ERR(vaddr)) {
+		i915_vma_unpin_and_release(&vma, 0);
+		return PTR_ERR(vaddr);
+	}
+
+	*out_vma = vma;
+	*out_vaddr = vaddr;
+
+	return 0;
+}
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index e6400204a2bd..bf438f820c35 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -149,6 +149,8 @@ int intel_guc_auth_huc(struct intel_guc *guc, u32 rsa_offset);
 int intel_guc_suspend(struct intel_guc *guc);
 int intel_guc_resume(struct intel_guc *guc);
 struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size);
+int intel_guc_allocate_and_map_vma(struct intel_guc *guc, u32 size,
+				   struct i915_vma **out_vma, void **out_vaddr);
 
 static inline bool intel_guc_is_supported(struct intel_guc *guc)
 {
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index ca6674b8e00c..6334d773c3e1 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -135,32 +135,19 @@ static void __guc_ads_init(struct intel_guc *guc)
 int intel_guc_ads_create(struct intel_guc *guc)
 {
 	const u32 size = PAGE_ALIGN(sizeof(struct __guc_ads_blob));
-	struct i915_vma *vma;
-	void *blob;
 	int ret;
 
 	GEM_BUG_ON(guc->ads_vma);
 
-	vma = intel_guc_allocate_vma(guc, size);
-	if (IS_ERR(vma))
-		return PTR_ERR(vma);
+	ret = intel_guc_allocate_and_map_vma(guc, size, &guc->ads_vma,
+					     (void **)&guc->ads_blob);
 
-	blob = i915_gem_object_pin_map(vma->obj, I915_MAP_WB);
-	if (IS_ERR(blob)) {
-		ret = PTR_ERR(blob);
-		goto err_vma;
-	}
-
-	guc->ads_vma = vma;
-	guc->ads_blob = blob;
+	if (ret)
+		return ret;
 
 	__guc_ads_init(guc);
 
 	return 0;
-
-err_vma:
-	i915_vma_unpin_and_release(&guc->ads_vma, 0);
-	return ret;
 }
 
 void intel_guc_ads_destroy(struct intel_guc *guc)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 2b0de6a2a02e..6ac213ddbfa3 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -308,23 +308,15 @@ static void guc_proc_desc_fini(struct intel_guc_client *client)
 
 static int guc_stage_desc_pool_create(struct intel_guc *guc)
 {
-	struct i915_vma *vma;
-	void *vaddr;
-
-	vma = intel_guc_allocate_vma(guc,
-				     PAGE_ALIGN(sizeof(struct guc_stage_desc) *
-				     GUC_MAX_STAGE_DESCRIPTORS));
-	if (IS_ERR(vma))
-		return PTR_ERR(vma);
+	u32 size = PAGE_ALIGN(sizeof(struct guc_stage_desc) *
+			      GUC_MAX_STAGE_DESCRIPTORS);
+	int ret;
 
-	vaddr = i915_gem_object_pin_map(vma->obj, I915_MAP_WB);
-	if (IS_ERR(vaddr)) {
-		i915_vma_unpin_and_release(&vma, 0);
-		return PTR_ERR(vaddr);
-	}
+	ret = intel_guc_allocate_and_map_vma(guc, size, &guc->stage_desc_pool,
+					     &guc->stage_desc_pool_vaddr);
+	if (ret)
+		return ret;
 
-	guc->stage_desc_pool = vma;
-	guc->stage_desc_pool_vaddr = vaddr;
 	ida_init(&guc->stage_ids);
 
 	return 0;
-- 
2.23.0

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[Intel-gfx] [PATCH 2/4] drm/i915/guc: add a helper to allocate and map guc vma

[Daniele Ceraolo Spurio]

We already have a couple of use-cases in the code and another one will
come in one of the later patches in the series.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc.c        | 34 +++++++++++++++++++
 drivers/gpu/drm/i915/gt/uc/intel_guc.h        |  2 ++
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c    | 21 +++---------
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 22 ++++--------
 4 files changed, 47 insertions(+), 32 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 019ae6486e8d..12e0569372d0 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -689,3 +689,37 @@ struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size)
 	i915_gem_object_put(obj);
 	return vma;
 }
+
+/**
+ * intel_guc_allocate_and_map_vma() - Allocate and map VMA for GuC usage
+ * @guc:	the guc
+ * @size:	size of area to allocate (both virtual space and memory)
+ * @out_vma:	return variable for the allocated vma pointer
+ * @out_vaddr:	return variable for the obj mapping
+ *
+ * This wrapper calls intel_guc_allocate_vma() and then maps the allocated
+ * object with I915_MAP_WB.
+ *
+ * Return:	0 if successful, a negative errno code otherwise.
+ */
+int intel_guc_allocate_and_map_vma(struct intel_guc *guc, u32 size,
+				   struct i915_vma **out_vma, void **out_vaddr)
+{
+	struct i915_vma *vma;
+	void *vaddr;
+
+	vma = intel_guc_allocate_vma(guc, size);
+	if (IS_ERR(vma))
+		return PTR_ERR(vma);
+
+	vaddr = i915_gem_object_pin_map(vma->obj, I915_MAP_WB);
+	if (IS_ERR(vaddr)) {
+		i915_vma_unpin_and_release(&vma, 0);
+		return PTR_ERR(vaddr);
+	}
+
+	*out_vma = vma;
+	*out_vaddr = vaddr;
+
+	return 0;
+}
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index e6400204a2bd..bf438f820c35 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -149,6 +149,8 @@ int intel_guc_auth_huc(struct intel_guc *guc, u32 rsa_offset);
 int intel_guc_suspend(struct intel_guc *guc);
 int intel_guc_resume(struct intel_guc *guc);
 struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size);
+int intel_guc_allocate_and_map_vma(struct intel_guc *guc, u32 size,
+				   struct i915_vma **out_vma, void **out_vaddr);
 
 static inline bool intel_guc_is_supported(struct intel_guc *guc)
 {
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index ca6674b8e00c..6334d773c3e1 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -135,32 +135,19 @@ static void __guc_ads_init(struct intel_guc *guc)
 int intel_guc_ads_create(struct intel_guc *guc)
 {
 	const u32 size = PAGE_ALIGN(sizeof(struct __guc_ads_blob));
-	struct i915_vma *vma;
-	void *blob;
 	int ret;
 
 	GEM_BUG_ON(guc->ads_vma);
 
-	vma = intel_guc_allocate_vma(guc, size);
-	if (IS_ERR(vma))
-		return PTR_ERR(vma);
+	ret = intel_guc_allocate_and_map_vma(guc, size, &guc->ads_vma,
+					     (void **)&guc->ads_blob);
 
-	blob = i915_gem_object_pin_map(vma->obj, I915_MAP_WB);
-	if (IS_ERR(blob)) {
-		ret = PTR_ERR(blob);
-		goto err_vma;
-	}
-
-	guc->ads_vma = vma;
-	guc->ads_blob = blob;
+	if (ret)
+		return ret;
 
 	__guc_ads_init(guc);
 
 	return 0;
-
-err_vma:
-	i915_vma_unpin_and_release(&guc->ads_vma, 0);
-	return ret;
 }
 
 void intel_guc_ads_destroy(struct intel_guc *guc)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 2b0de6a2a02e..6ac213ddbfa3 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -308,23 +308,15 @@ static void guc_proc_desc_fini(struct intel_guc_client *client)
 
 static int guc_stage_desc_pool_create(struct intel_guc *guc)
 {
-	struct i915_vma *vma;
-	void *vaddr;
-
-	vma = intel_guc_allocate_vma(guc,
-				     PAGE_ALIGN(sizeof(struct guc_stage_desc) *
-				     GUC_MAX_STAGE_DESCRIPTORS));
-	if (IS_ERR(vma))
-		return PTR_ERR(vma);
+	u32 size = PAGE_ALIGN(sizeof(struct guc_stage_desc) *
+			      GUC_MAX_STAGE_DESCRIPTORS);
+	int ret;
 
-	vaddr = i915_gem_object_pin_map(vma->obj, I915_MAP_WB);
-	if (IS_ERR(vaddr)) {
-		i915_vma_unpin_and_release(&vma, 0);
-		return PTR_ERR(vaddr);
-	}
+	ret = intel_guc_allocate_and_map_vma(guc, size, &guc->stage_desc_pool,
+					     &guc->stage_desc_pool_vaddr);
+	if (ret)
+		return ret;
 
-	guc->stage_desc_pool = vma;
-	guc->stage_desc_pool_vaddr = vaddr;
 	ida_init(&guc->stage_ids);
 
 	return 0;
-- 
2.23.0

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Re: [PATCH 2/4] drm/i915/guc: add a helper to allocate and map guc vma

[Chris Wilson]

Quoting Daniele Ceraolo Spurio (2019-11-06 22:25:48)
> We already have a couple of use-cases in the code and another one will
> come in one of the later patches in the series.
> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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Re: [Intel-gfx] [PATCH 2/4] drm/i915/guc: add a helper to allocate and map guc vma

[Chris Wilson]

Quoting Daniele Ceraolo Spurio (2019-11-06 22:25:48)
> We already have a couple of use-cases in the code and another one will
> come in one of the later patches in the series.
> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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[PATCH 3/4] drm/i915/guc: kill doorbell code and selftests

[Daniele Ceraolo Spurio]

Instead of relying on the workqueue, the upcoming reworked GuC
submission flow will offer the host driver indipendent control over
the execution status of each context submitted to GuC. As part of this,
the doorbell usage model has been reworked, with each doorbell being
paired to a single lrc and a doorbell ring representing new work
available for that specific context. This mechanism, however, limits
the number of contexts that can be registered with GuC to the number of
doorbells, which is an undesired limitation. Luckily, GuC will also
provide a H2G that will allow the host to notify the GuC of work
available for a specified lrc, so we can use that mechanism instead of
relying on the doorbells. We can therefore drop the doorbell code we
currently have, also given the fact that in the unlikely case we'd want
to switch back to using doorbells we'd have to heavily rework it.
The workqueue will still have a use in the new interface to pass special
commands, so that code has been retained for now.

With the doorbells gone and the GuC client becoming even simpler, the
existing GuC selftests don't give us any meaningful coverage so we can
remove them as well. Some selftests might come with the new code, but
they will look different from what we have now so if doesn't seem worth
it to keep the file around in the meantime.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc.h        |   8 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |   2 +-
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 373 ++----------------
 .../gpu/drm/i915/gt/uc/intel_guc_submission.h |   9 +-
 drivers/gpu/drm/i915/gt/uc/intel_uc.c         |   7 +-
 drivers/gpu/drm/i915/gt/uc/selftest_guc.c     | 299 --------------
 drivers/gpu/drm/i915/i915_debugfs.c           |  11 +-
 .../drm/i915/selftests/i915_live_selftests.h  |   1 -
 8 files changed, 42 insertions(+), 668 deletions(-)
 delete mode 100644 drivers/gpu/drm/i915/gt/uc/selftest_guc.c

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index bf438f820c35..b2d1766e689a 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -20,8 +20,8 @@ struct __guc_ads_blob;
 
 /*
  * Top level structure of GuC. It handles firmware loading and manages client
- * pool and doorbells. intel_guc owns a intel_guc_client to replace the legacy
- * ExecList submission.
+ * pool. intel_guc owns a intel_guc_client to replace the legacy ExecList
+ * submission.
  */
 struct intel_guc {
 	struct intel_uc_fw fw;
@@ -50,10 +50,6 @@ struct intel_guc {
 
 	struct intel_guc_client *execbuf_client;
 
-	DECLARE_BITMAP(doorbell_bitmap, GUC_NUM_DOORBELLS);
-	/* Cyclic counter mod pagesize	*/
-	u32 db_cacheline;
-
 	/* Control params for fw initialization */
 	u32 params[GUC_CTL_MAX_DWORDS];
 
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index a26a85d50209..1e8e4af7d9ca 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -31,7 +31,7 @@
 
 #define GUC_DOORBELL_INVALID		256
 
-#define GUC_DB_SIZE			(PAGE_SIZE)
+#define GUC_PD_SIZE			(PAGE_SIZE)
 #define GUC_WQ_SIZE			(PAGE_SIZE * 2)
 
 /* Work queue item header definitions */
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 6ac213ddbfa3..0088c3417641 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -30,8 +30,8 @@
  * GuC client:
  * A intel_guc_client refers to a submission path through GuC. Currently, there
  * is only one client, which is charged with all submissions to the GuC. This
- * struct is the owner of a doorbell, a process descriptor and a workqueue (all
- * of them inside a single gem object that contains all required pages for these
+ * struct is the owner of a process descriptor and a workqueue (both of them
+ * inside a single gem object that contains all required pages for these
  * elements).
  *
  * GuC stage descriptor:
@@ -39,13 +39,13 @@
  * descriptors, and shares them with the GuC.
  * Currently, there exists a 1:1 mapping between a intel_guc_client and a
  * guc_stage_desc (via the client's stage_id), so effectively only one
- * gets used. This stage descriptor lets the GuC know about the doorbell,
- * workqueue and process descriptor. Theoretically, it also lets the GuC
- * know about our HW contexts (context ID, etc...), but we actually
- * employ a kind of submission where the GuC uses the LRCA sent via the work
- * item instead (the single guc_stage_desc associated to execbuf client
- * contains information about the default kernel context only, but this is
- * essentially unused). This is called a "proxy" submission.
+ * gets used. This stage descriptor lets the GuC know about the workqueue and
+ * process descriptor. Theoretically, it also lets the GuC know about our HW
+ * contexts (context ID, etc...), but we actually employ a kind of submission
+ * where the GuC uses the LRCA sent via the work item instead (the single
+ * guc_stage_desc associated to execbuf client contains information about the
+ * default kernel context only, but this is essentially unused). This is called
+ * a "proxy" submission.
  *
  * The Scratch registers:
  * There are 16 MMIO-based registers start from 0xC180. The kernel driver writes
@@ -56,10 +56,6 @@
  * then proceeds.
  * See intel_guc_send()
  *
- * Doorbells:
- * Doorbells are interrupts to uKernel. A doorbell is a single cache line (QW)
- * mapped into process space.
- *
  * Work Items:
  * There are several types of work items that the host may place into a
  * workqueue, each with its own requirements and limitations. Currently only
@@ -81,78 +77,6 @@ static inline bool is_high_priority(struct intel_guc_client *client)
 		client->priority == GUC_CLIENT_PRIORITY_HIGH);
 }
 
-static int reserve_doorbell(struct intel_guc_client *client)
-{
-	unsigned long offset;
-	unsigned long end;
-	u16 id;
-
-	GEM_BUG_ON(client->doorbell_id != GUC_DOORBELL_INVALID);
-
-	/*
-	 * The bitmap tracks which doorbell registers are currently in use.
-	 * It is split into two halves; the first half is used for normal
-	 * priority contexts, the second half for high-priority ones.
-	 */
-	offset = 0;
-	end = GUC_NUM_DOORBELLS / 2;
-	if (is_high_priority(client)) {
-		offset = end;
-		end += offset;
-	}
-
-	id = find_next_zero_bit(client->guc->doorbell_bitmap, end, offset);
-	if (id == end)
-		return -ENOSPC;
-
-	__set_bit(id, client->guc->doorbell_bitmap);
-	client->doorbell_id = id;
-	DRM_DEBUG_DRIVER("client %u (high prio=%s) reserved doorbell: %d\n",
-			 client->stage_id, yesno(is_high_priority(client)),
-			 id);
-	return 0;
-}
-
-static bool has_doorbell(struct intel_guc_client *client)
-{
-	if (client->doorbell_id == GUC_DOORBELL_INVALID)
-		return false;
-
-	return test_bit(client->doorbell_id, client->guc->doorbell_bitmap);
-}
-
-static void unreserve_doorbell(struct intel_guc_client *client)
-{
-	GEM_BUG_ON(!has_doorbell(client));
-
-	__clear_bit(client->doorbell_id, client->guc->doorbell_bitmap);
-	client->doorbell_id = GUC_DOORBELL_INVALID;
-}
-
-/*
- * Tell the GuC to allocate or deallocate a specific doorbell
- */
-
-static int __guc_allocate_doorbell(struct intel_guc *guc, u32 stage_id)
-{
-	u32 action[] = {
-		INTEL_GUC_ACTION_ALLOCATE_DOORBELL,
-		stage_id
-	};
-
-	return intel_guc_send(guc, action, ARRAY_SIZE(action));
-}
-
-static int __guc_deallocate_doorbell(struct intel_guc *guc, u32 stage_id)
-{
-	u32 action[] = {
-		INTEL_GUC_ACTION_DEALLOCATE_DOORBELL,
-		stage_id
-	};
-
-	return intel_guc_send(guc, action, ARRAY_SIZE(action));
-}
-
 static struct guc_stage_desc *__get_stage_desc(struct intel_guc_client *client)
 {
 	struct guc_stage_desc *base = client->guc->stage_desc_pool_vaddr;
@@ -160,118 +84,10 @@ static struct guc_stage_desc *__get_stage_desc(struct intel_guc_client *client)
 	return &base[client->stage_id];
 }
 
-/*
- * Initialise, update, or clear doorbell data shared with the GuC
- *
- * These functions modify shared data and so need access to the mapped
- * client object which contains the page being used for the doorbell
- */
-
-static void __update_doorbell_desc(struct intel_guc_client *client, u16 new_id)
-{
-	struct guc_stage_desc *desc;
-
-	/* Update the GuC's idea of the doorbell ID */
-	desc = __get_stage_desc(client);
-	desc->db_id = new_id;
-}
-
-static struct guc_doorbell_info *__get_doorbell(struct intel_guc_client *client)
-{
-	return client->vaddr + client->doorbell_offset;
-}
-
-static bool __doorbell_valid(struct intel_guc *guc, u16 db_id)
-{
-	struct intel_uncore *uncore = guc_to_gt(guc)->uncore;
-
-	GEM_BUG_ON(db_id >= GUC_NUM_DOORBELLS);
-	return intel_uncore_read(uncore, GEN8_DRBREGL(db_id)) & GEN8_DRB_VALID;
-}
-
-static void __init_doorbell(struct intel_guc_client *client)
-{
-	struct guc_doorbell_info *doorbell;
-
-	doorbell = __get_doorbell(client);
-	doorbell->db_status = GUC_DOORBELL_ENABLED;
-	doorbell->cookie = 0;
-}
-
-static void __fini_doorbell(struct intel_guc_client *client)
-{
-	struct guc_doorbell_info *doorbell;
-	u16 db_id = client->doorbell_id;
-
-	doorbell = __get_doorbell(client);
-	doorbell->db_status = GUC_DOORBELL_DISABLED;
-
-	/* Doorbell release flow requires that we wait for GEN8_DRB_VALID bit
-	 * to go to zero after updating db_status before we call the GuC to
-	 * release the doorbell
-	 */
-	if (wait_for_us(!__doorbell_valid(client->guc, db_id), 10))
-		WARN_ONCE(true, "Doorbell never became invalid after disable\n");
-}
-
-static int create_doorbell(struct intel_guc_client *client)
-{
-	int ret;
-
-	if (WARN_ON(!has_doorbell(client)))
-		return -ENODEV; /* internal setup error, should never happen */
-
-	__update_doorbell_desc(client, client->doorbell_id);
-	__init_doorbell(client);
-
-	ret = __guc_allocate_doorbell(client->guc, client->stage_id);
-	if (ret) {
-		__fini_doorbell(client);
-		__update_doorbell_desc(client, GUC_DOORBELL_INVALID);
-		DRM_DEBUG_DRIVER("Couldn't create client %u doorbell: %d\n",
-				 client->stage_id, ret);
-		return ret;
-	}
-
-	return 0;
-}
-
-static int destroy_doorbell(struct intel_guc_client *client)
-{
-	int ret;
-
-	GEM_BUG_ON(!has_doorbell(client));
-
-	__fini_doorbell(client);
-	ret = __guc_deallocate_doorbell(client->guc, client->stage_id);
-	if (ret)
-		DRM_ERROR("Couldn't destroy client %u doorbell: %d\n",
-			  client->stage_id, ret);
-
-	__update_doorbell_desc(client, GUC_DOORBELL_INVALID);
-
-	return ret;
-}
-
-static unsigned long __select_cacheline(struct intel_guc *guc)
-{
-	unsigned long offset;
-
-	/* Doorbell uses a single cache line within a page */
-	offset = offset_in_page(guc->db_cacheline);
-
-	/* Moving to next cache line to reduce contention */
-	guc->db_cacheline += cache_line_size();
-
-	DRM_DEBUG_DRIVER("reserved cacheline 0x%lx, next 0x%x, linesize %u\n",
-			 offset, guc->db_cacheline, cache_line_size());
-	return offset;
-}
-
 static inline struct guc_process_desc *
 __get_process_desc(struct intel_guc_client *client)
 {
-	return client->vaddr + client->proc_desc_offset;
+	return client->vaddr;
 }
 
 /*
@@ -332,8 +148,8 @@ static void guc_stage_desc_pool_destroy(struct intel_guc *guc)
  * Initialise/clear the stage descriptor shared with the GuC firmware.
  *
  * This descriptor tells the GuC where (in GGTT space) to find the important
- * data structures relating to this client (doorbell, process descriptor,
- * write queue, etc).
+ * data structures relating to this client (process descriptor, write queue,
+ * etc).
  */
 static void guc_stage_desc_init(struct intel_guc_client *client)
 {
@@ -350,19 +166,14 @@ static void guc_stage_desc_init(struct intel_guc_client *client)
 		desc->attribute |= GUC_STAGE_DESC_ATTR_PREEMPT;
 	desc->stage_id = client->stage_id;
 	desc->priority = client->priority;
-	desc->db_id = client->doorbell_id;
 
 	/*
-	 * The doorbell, process descriptor, and workqueue are all parts
-	 * of the client object, which the GuC will reference via the GGTT
+	 * The process descriptor and workqueue are all parts of the client
+	 * object, which the GuC will reference via the GGTT
 	 */
 	gfx_addr = intel_guc_ggtt_offset(guc, client->vma);
-	desc->db_trigger_phy = sg_dma_address(client->vma->pages->sgl) +
-				client->doorbell_offset;
-	desc->db_trigger_cpu = ptr_to_u64(__get_doorbell(client));
-	desc->db_trigger_uk = gfx_addr + client->doorbell_offset;
-	desc->process_desc = gfx_addr + client->proc_desc_offset;
-	desc->wq_addr = gfx_addr + GUC_DB_SIZE;
+	desc->process_desc = gfx_addr;
+	desc->wq_addr = gfx_addr + GUC_PD_SIZE;
 	desc->wq_size = GUC_WQ_SIZE;
 
 	desc->desc_private = ptr_to_u64(client);
@@ -408,48 +219,23 @@ static void guc_wq_item_append(struct intel_guc_client *client,
 			      GUC_WQ_SIZE) < wqi_size);
 	GEM_BUG_ON(wq_off & (wqi_size - 1));
 
-	/* WQ starts from the page after doorbell / process_desc */
-	wqi = client->vaddr + wq_off + GUC_DB_SIZE;
-
-	if (I915_SELFTEST_ONLY(client->use_nop_wqi)) {
-		wqi->header = WQ_TYPE_NOOP | (wqi_len << WQ_LEN_SHIFT);
-	} else {
-		/* Now fill in the 4-word work queue item */
-		wqi->header = WQ_TYPE_INORDER |
-			      (wqi_len << WQ_LEN_SHIFT) |
-			      (target_engine << WQ_TARGET_SHIFT) |
-			      WQ_NO_WCFLUSH_WAIT;
-		wqi->context_desc = context_desc;
-		wqi->submit_element_info = ring_tail << WQ_RING_TAIL_SHIFT;
-		GEM_BUG_ON(ring_tail > WQ_RING_TAIL_MAX);
-		wqi->fence_id = fence_id;
-	}
+	/* WQ starts from the page after process_desc */
+	wqi = client->vaddr + wq_off + GUC_PD_SIZE;
+
+	/* Now fill in the 4-word work queue item */
+	wqi->header = WQ_TYPE_INORDER |
+		      (wqi_len << WQ_LEN_SHIFT) |
+		      (target_engine << WQ_TARGET_SHIFT) |
+		      WQ_NO_WCFLUSH_WAIT;
+	wqi->context_desc = context_desc;
+	wqi->submit_element_info = ring_tail << WQ_RING_TAIL_SHIFT;
+	GEM_BUG_ON(ring_tail > WQ_RING_TAIL_MAX);
+	wqi->fence_id = fence_id;
 
 	/* Make the update visible to GuC */
 	WRITE_ONCE(desc->tail, (wq_off + wqi_size) & (GUC_WQ_SIZE - 1));
 }
 
-static void guc_ring_doorbell(struct intel_guc_client *client)
-{
-	struct guc_doorbell_info *db;
-	u32 cookie;
-
-	lockdep_assert_held(&client->wq_lock);
-
-	/* pointer of current doorbell cacheline */
-	db = __get_doorbell(client);
-
-	/*
-	 * We're not expecting the doorbell cookie to change behind our back,
-	 * we also need to treat 0 as a reserved value.
-	 */
-	cookie = READ_ONCE(db->cookie);
-	WARN_ON_ONCE(xchg(&db->cookie, cookie + 1 ?: cookie + 2) != cookie);
-
-	/* XXX: doorbell was lost and need to acquire it again */
-	GEM_BUG_ON(db->db_status != GUC_DOORBELL_ENABLED);
-}
-
 static void guc_add_request(struct intel_guc *guc, struct i915_request *rq)
 {
 	struct intel_guc_client *client = guc->execbuf_client;
@@ -459,7 +245,6 @@ static void guc_add_request(struct intel_guc *guc, struct i915_request *rq)
 
 	guc_wq_item_append(client, engine->guc_id, ctx_desc,
 			   ring_tail, rq->fence.seqno);
-	guc_ring_doorbell(client);
 }
 
 /*
@@ -744,36 +529,6 @@ static void guc_reset_finish(struct intel_engine_cs *engine)
  * path of guc_submit() above.
  */
 
-/* Check that a doorbell register is in the expected state */
-static bool doorbell_ok(struct intel_guc *guc, u16 db_id)
-{
-	bool valid;
-
-	GEM_BUG_ON(db_id >= GUC_NUM_DOORBELLS);
-
-	valid = __doorbell_valid(guc, db_id);
-
-	if (test_bit(db_id, guc->doorbell_bitmap) == valid)
-		return true;
-
-	DRM_DEBUG_DRIVER("Doorbell %u has unexpected state: valid=%s\n",
-			 db_id, yesno(valid));
-
-	return false;
-}
-
-static bool guc_verify_doorbells(struct intel_guc *guc)
-{
-	bool doorbells_ok = true;
-	u16 db_id;
-
-	for (db_id = 0; db_id < GUC_NUM_DOORBELLS; ++db_id)
-		if (!doorbell_ok(guc, db_id))
-			doorbells_ok = false;
-
-	return doorbells_ok;
-}
-
 /**
  * guc_client_alloc() - Allocate an intel_guc_client
  * @guc:	the intel_guc structure
@@ -798,7 +553,6 @@ guc_client_alloc(struct intel_guc *guc, u32 priority)
 
 	client->guc = guc;
 	client->priority = priority;
-	client->doorbell_id = GUC_DOORBELL_INVALID;
 	spin_lock_init(&client->wq_lock);
 
 	ret = ida_simple_get(&guc->stage_ids, 0, GUC_MAX_STAGE_DESCRIPTORS,
@@ -809,7 +563,7 @@ guc_client_alloc(struct intel_guc *guc, u32 priority)
 	client->stage_id = ret;
 
 	/* The first page is doorbell/proc_desc. Two followed pages are wq. */
-	vma = intel_guc_allocate_vma(guc, GUC_DB_SIZE + GUC_WQ_SIZE);
+	vma = intel_guc_allocate_vma(guc, GUC_PD_SIZE + GUC_WQ_SIZE);
 	if (IS_ERR(vma)) {
 		ret = PTR_ERR(vma);
 		goto err_id;
@@ -825,31 +579,11 @@ guc_client_alloc(struct intel_guc *guc, u32 priority)
 	}
 	client->vaddr = vaddr;
 
-	ret = reserve_doorbell(client);
-	if (ret)
-		goto err_vaddr;
-
-	client->doorbell_offset = __select_cacheline(guc);
-
-	/*
-	 * Since the doorbell only requires a single cacheline, we can save
-	 * space by putting the application process descriptor in the same
-	 * page. Use the half of the page that doesn't include the doorbell.
-	 */
-	if (client->doorbell_offset >= (GUC_DB_SIZE / 2))
-		client->proc_desc_offset = 0;
-	else
-		client->proc_desc_offset = (GUC_DB_SIZE / 2);
-
 	DRM_DEBUG_DRIVER("new priority %u client %p: stage_id %u\n",
 			 priority, client, client->stage_id);
-	DRM_DEBUG_DRIVER("doorbell id %u, cacheline offset 0x%lx\n",
-			 client->doorbell_id, client->doorbell_offset);
 
 	return client;
 
-err_vaddr:
-	i915_gem_object_unpin_map(client->vma->obj);
 err_vma:
 	i915_vma_unpin_and_release(&client->vma, 0);
 err_id:
@@ -861,7 +595,6 @@ guc_client_alloc(struct intel_guc *guc, u32 priority)
 
 static void guc_client_free(struct intel_guc_client *client)
 {
-	unreserve_doorbell(client);
 	i915_vma_unpin_and_release(&client->vma, I915_VMA_RELEASE_MAP);
 	ida_simple_remove(&client->guc->stage_ids, client->stage_id);
 	kfree(client);
@@ -892,44 +625,21 @@ static void guc_clients_destroy(struct intel_guc *guc)
 		guc_client_free(client);
 }
 
-static int __guc_client_enable(struct intel_guc_client *client)
+static void __guc_client_enable(struct intel_guc_client *client)
 {
-	int ret;
-
 	guc_proc_desc_init(client);
 	guc_stage_desc_init(client);
-
-	ret = create_doorbell(client);
-	if (ret)
-		goto fail;
-
-	return 0;
-
-fail:
-	guc_stage_desc_fini(client);
-	guc_proc_desc_fini(client);
-	return ret;
 }
 
 static void __guc_client_disable(struct intel_guc_client *client)
 {
-	/*
-	 * By the time we're here, GuC may have already been reset. if that is
-	 * the case, instead of trying (in vain) to communicate with it, let's
-	 * just cleanup the doorbell HW and our internal state.
-	 */
-	if (intel_guc_is_running(client->guc))
-		destroy_doorbell(client);
-	else
-		__fini_doorbell(client);
-
 	guc_stage_desc_fini(client);
 	guc_proc_desc_fini(client);
 }
 
-static int guc_clients_enable(struct intel_guc *guc)
+static void guc_clients_enable(struct intel_guc *guc)
 {
-	return __guc_client_enable(guc->execbuf_client);
+	__guc_client_enable(guc->execbuf_client);
 }
 
 static void guc_clients_disable(struct intel_guc *guc)
@@ -958,7 +668,6 @@ int intel_guc_submission_init(struct intel_guc *guc)
 	 */
 	GEM_BUG_ON(!guc->stage_desc_pool);
 
-	WARN_ON(!guc_verify_doorbells(guc));
 	ret = guc_clients_create(guc);
 	if (ret)
 		goto err_pool;
@@ -973,7 +682,6 @@ int intel_guc_submission_init(struct intel_guc *guc)
 void intel_guc_submission_fini(struct intel_guc *guc)
 {
 	guc_clients_destroy(guc);
-	WARN_ON(!guc_verify_doorbells(guc));
 
 	if (guc->stage_desc_pool)
 		guc_stage_desc_pool_destroy(guc);
@@ -1089,16 +797,11 @@ static void guc_set_default_submission(struct intel_engine_cs *engine)
 	GEM_BUG_ON(engine->irq_enable || engine->irq_disable);
 }
 
-int intel_guc_submission_enable(struct intel_guc *guc)
+void intel_guc_submission_enable(struct intel_guc *guc)
 {
 	struct intel_gt *gt = guc_to_gt(guc);
 	struct intel_engine_cs *engine;
 	enum intel_engine_id id;
-	int err;
-
-	err = i915_inject_probe_error(gt->i915, -ENXIO);
-	if (err)
-		return err;
 
 	/*
 	 * We're using GuC work items for submitting work through GuC. Since
@@ -1115,9 +818,7 @@ int intel_guc_submission_enable(struct intel_guc *guc)
 
 	GEM_BUG_ON(!guc->execbuf_client);
 
-	err = guc_clients_enable(guc);
-	if (err)
-		return err;
+	guc_clients_enable(guc);
 
 	/* Take over from manual control of ELSP (execlists) */
 	guc_interrupts_capture(gt);
@@ -1126,8 +827,6 @@ int intel_guc_submission_enable(struct intel_guc *guc)
 		engine->set_default_submission = guc_set_default_submission;
 		engine->set_default_submission(engine);
 	}
-
-	return 0;
 }
 
 void intel_guc_submission_disable(struct intel_guc *guc)
@@ -1155,7 +854,3 @@ void intel_guc_submission_init_early(struct intel_guc *guc)
 {
 	guc->submission_supported = __guc_submission_support(guc);
 }
-
-#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
-#include "selftest_guc.c"
-#endif
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
index 54d716828352..e2deb4e6f42a 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
@@ -44,21 +44,14 @@ struct intel_guc_client {
 	/* bitmap of (host) engine ids */
 	u32 priority;
 	u32 stage_id;
-	u32 proc_desc_offset;
-
-	u16 doorbell_id;
-	unsigned long doorbell_offset;
 
 	/* Protects GuC client's WQ access */
 	spinlock_t wq_lock;
-
-	/* For testing purposes, use nop WQ items instead of real ones */
-	I915_SELFTEST_DECLARE(bool use_nop_wqi);
 };
 
 void intel_guc_submission_init_early(struct intel_guc *guc);
 int intel_guc_submission_init(struct intel_guc *guc);
-int intel_guc_submission_enable(struct intel_guc *guc);
+void intel_guc_submission_enable(struct intel_guc *guc);
 void intel_guc_submission_disable(struct intel_guc *guc);
 void intel_guc_submission_fini(struct intel_guc *guc);
 int intel_guc_preempt_work_create(struct intel_guc *guc);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
index 629b19377a29..c6519066a0f6 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
@@ -486,11 +486,8 @@ int intel_uc_init_hw(struct intel_uc *uc)
 	if (ret)
 		goto err_communication;
 
-	if (intel_uc_supports_guc_submission(uc)) {
-		ret = intel_guc_submission_enable(guc);
-		if (ret)
-			goto err_communication;
-	}
+	if (intel_uc_supports_guc_submission(uc))
+		intel_guc_submission_enable(guc);
 
 	dev_info(i915->drm.dev, "%s firmware %s version %u.%u %s:%s\n",
 		 intel_uc_fw_type_repr(INTEL_UC_FW_TYPE_GUC), guc->fw.path,
diff --git a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c b/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
deleted file mode 100644
index d8a80388bd31..000000000000
--- a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
+++ /dev/null
@@ -1,299 +0,0 @@
-// SPDX-License-Identifier: MIT
-/*
- * Copyright © 2017 Intel Corporation
- */
-
-#include "i915_selftest.h"
-#include "gem/i915_gem_pm.h"
-
-/* max doorbell number + negative test for each client type */
-#define ATTEMPTS (GUC_NUM_DOORBELLS + GUC_CLIENT_PRIORITY_NUM)
-
-static struct intel_guc_client *clients[ATTEMPTS];
-
-static bool available_dbs(struct intel_guc *guc, u32 priority)
-{
-	unsigned long offset;
-	unsigned long end;
-	u16 id;
-
-	/* first half is used for normal priority, second half for high */
-	offset = 0;
-	end = GUC_NUM_DOORBELLS / 2;
-	if (priority <= GUC_CLIENT_PRIORITY_HIGH) {
-		offset = end;
-		end += offset;
-	}
-
-	id = find_next_zero_bit(guc->doorbell_bitmap, end, offset);
-	if (id < end)
-		return true;
-
-	return false;
-}
-
-static int check_all_doorbells(struct intel_guc *guc)
-{
-	u16 db_id;
-
-	pr_info_once("Max number of doorbells: %d", GUC_NUM_DOORBELLS);
-	for (db_id = 0; db_id < GUC_NUM_DOORBELLS; ++db_id) {
-		if (!doorbell_ok(guc, db_id)) {
-			pr_err("doorbell %d, not ok\n", db_id);
-			return -EIO;
-		}
-	}
-
-	return 0;
-}
-
-static int ring_doorbell_nop(struct intel_guc_client *client)
-{
-	struct guc_process_desc *desc = __get_process_desc(client);
-	int err;
-
-	client->use_nop_wqi = true;
-
-	spin_lock_irq(&client->wq_lock);
-
-	guc_wq_item_append(client, 0, 0, 0, 0);
-	guc_ring_doorbell(client);
-
-	spin_unlock_irq(&client->wq_lock);
-
-	client->use_nop_wqi = false;
-
-	/* if there are no issues GuC will update the WQ head and keep the
-	 * WQ in active status
-	 */
-	err = wait_for(READ_ONCE(desc->head) == READ_ONCE(desc->tail), 10);
-	if (err) {
-		pr_err("doorbell %u ring failed!\n", client->doorbell_id);
-		return -EIO;
-	}
-
-	if (desc->wq_status != WQ_STATUS_ACTIVE) {
-		pr_err("doorbell %u ring put WQ in bad state (%u)!\n",
-		       client->doorbell_id, desc->wq_status);
-		return -EIO;
-	}
-
-	return 0;
-}
-
-/*
- * Basic client sanity check, handy to validate create_clients.
- */
-static int validate_client(struct intel_guc_client *client, int client_priority)
-{
-	if (client->priority != client_priority ||
-	    client->doorbell_id == GUC_DOORBELL_INVALID)
-		return -EINVAL;
-	else
-		return 0;
-}
-
-static bool client_doorbell_in_sync(struct intel_guc_client *client)
-{
-	return !client || doorbell_ok(client->guc, client->doorbell_id);
-}
-
-/*
- * Check that we're able to synchronize guc_clients with their doorbells
- *
- * We're creating clients and reserving doorbells once, at module load. During
- * module lifetime, GuC, doorbell HW, and i915 state may go out of sync due to
- * GuC being reset. In other words - GuC clients are still around, but the
- * status of their doorbells may be incorrect. This is the reason behind
- * validating that the doorbells status expected by the driver matches what the
- * GuC/HW have.
- */
-static int igt_guc_clients(void *arg)
-{
-	struct intel_gt *gt = arg;
-	struct intel_guc *guc = &gt->uc.guc;
-	intel_wakeref_t wakeref;
-	int err = 0;
-
-	GEM_BUG_ON(!HAS_GT_UC(gt->i915));
-	wakeref = intel_runtime_pm_get(gt->uncore->rpm);
-
-	err = check_all_doorbells(guc);
-	if (err)
-		goto unlock;
-
-	/*
-	 * Get rid of clients created during driver load because the test will
-	 * recreate them.
-	 */
-	guc_clients_disable(guc);
-	guc_clients_destroy(guc);
-	if (guc->execbuf_client) {
-		pr_err("guc_clients_destroy lied!\n");
-		err = -EINVAL;
-		goto unlock;
-	}
-
-	err = guc_clients_create(guc);
-	if (err) {
-		pr_err("Failed to create clients\n");
-		goto unlock;
-	}
-	GEM_BUG_ON(!guc->execbuf_client);
-
-	err = validate_client(guc->execbuf_client,
-			      GUC_CLIENT_PRIORITY_KMD_NORMAL);
-	if (err) {
-		pr_err("execbug client validation failed\n");
-		goto out;
-	}
-
-	/* the client should now have reserved a doorbell */
-	if (!has_doorbell(guc->execbuf_client)) {
-		pr_err("guc_clients_create didn't reserve doorbells\n");
-		err = -EINVAL;
-		goto out;
-	}
-
-	/* Now enable the clients */
-	guc_clients_enable(guc);
-
-	/* each client should now have received a doorbell */
-	if (!client_doorbell_in_sync(guc->execbuf_client)) {
-		pr_err("failed to initialize the doorbells\n");
-		err = -EINVAL;
-		goto out;
-	}
-
-	/*
-	 * Basic test - an attempt to reallocate a valid doorbell to the
-	 * client it is currently assigned should not cause a failure.
-	 */
-	err = create_doorbell(guc->execbuf_client);
-
-out:
-	/*
-	 * Leave clean state for other test, plus the driver always destroy the
-	 * clients during unload.
-	 */
-	guc_clients_disable(guc);
-	guc_clients_destroy(guc);
-	guc_clients_create(guc);
-	guc_clients_enable(guc);
-unlock:
-	intel_runtime_pm_put(gt->uncore->rpm, wakeref);
-	return err;
-}
-
-/*
- * Create as many clients as number of doorbells. Note that there's already
- * client(s)/doorbell(s) created during driver load, but this test creates
- * its own and do not interact with the existing ones.
- */
-static int igt_guc_doorbells(void *arg)
-{
-	struct intel_gt *gt = arg;
-	struct intel_guc *guc = &gt->uc.guc;
-	intel_wakeref_t wakeref;
-	int i, err = 0;
-	u16 db_id;
-
-	GEM_BUG_ON(!HAS_GT_UC(gt->i915));
-	wakeref = intel_runtime_pm_get(gt->uncore->rpm);
-
-	err = check_all_doorbells(guc);
-	if (err)
-		goto unlock;
-
-	for (i = 0; i < ATTEMPTS; i++) {
-		clients[i] = guc_client_alloc(guc, i % GUC_CLIENT_PRIORITY_NUM);
-
-		if (!clients[i]) {
-			pr_err("[%d] No guc client\n", i);
-			err = -EINVAL;
-			goto out;
-		}
-
-		if (IS_ERR(clients[i])) {
-			if (PTR_ERR(clients[i]) != -ENOSPC) {
-				pr_err("[%d] unexpected error\n", i);
-				err = PTR_ERR(clients[i]);
-				goto out;
-			}
-
-			if (available_dbs(guc, i % GUC_CLIENT_PRIORITY_NUM)) {
-				pr_err("[%d] non-db related alloc fail\n", i);
-				err = -EINVAL;
-				goto out;
-			}
-
-			/* expected, ran out of dbs for this client type */
-			continue;
-		}
-
-		/*
-		 * The check below is only valid because we keep a doorbell
-		 * assigned during the whole life of the client.
-		 */
-		if (clients[i]->stage_id >= GUC_NUM_DOORBELLS) {
-			pr_err("[%d] more clients than doorbells (%d >= %d)\n",
-			       i, clients[i]->stage_id, GUC_NUM_DOORBELLS);
-			err = -EINVAL;
-			goto out;
-		}
-
-		err = validate_client(clients[i], i % GUC_CLIENT_PRIORITY_NUM);
-		if (err) {
-			pr_err("[%d] client_alloc sanity check failed!\n", i);
-			err = -EINVAL;
-			goto out;
-		}
-
-		db_id = clients[i]->doorbell_id;
-
-		err = __guc_client_enable(clients[i]);
-		if (err) {
-			pr_err("[%d] Failed to create a doorbell\n", i);
-			goto out;
-		}
-
-		/* doorbell id shouldn't change, we are holding the mutex */
-		if (db_id != clients[i]->doorbell_id) {
-			pr_err("[%d] doorbell id changed (%d != %d)\n",
-			       i, db_id, clients[i]->doorbell_id);
-			err = -EINVAL;
-			goto out;
-		}
-
-		err = check_all_doorbells(guc);
-		if (err)
-			goto out;
-
-		err = ring_doorbell_nop(clients[i]);
-		if (err)
-			goto out;
-	}
-
-out:
-	for (i = 0; i < ATTEMPTS; i++)
-		if (!IS_ERR_OR_NULL(clients[i])) {
-			__guc_client_disable(clients[i]);
-			guc_client_free(clients[i]);
-		}
-unlock:
-	intel_runtime_pm_put(gt->uncore->rpm, wakeref);
-	return err;
-}
-
-int intel_guc_live_selftest(struct drm_i915_private *i915)
-{
-	static const struct i915_subtest tests[] = {
-		SUBTEST(igt_guc_clients),
-		SUBTEST(igt_guc_doorbells),
-	};
-
-	if (!USES_GUC_SUBMISSION(i915))
-		return 0;
-
-	return intel_gt_live_subtests(tests, &i915->gt);
-}
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index cab632791f73..5d5974e7f3ed 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1815,17 +1815,10 @@ static int i915_guc_info(struct seq_file *m, void *data)
 
 	GEM_BUG_ON(!guc->execbuf_client);
 
-	seq_printf(m, "\nDoorbell map:\n");
-	seq_printf(m, "\t%*pb\n", GUC_NUM_DOORBELLS, guc->doorbell_bitmap);
-	seq_printf(m, "Doorbell next cacheline: 0x%x\n", guc->db_cacheline);
-
 	seq_printf(m, "\nGuC execbuf client @ %p:\n", client);
-	seq_printf(m, "\tPriority %d, GuC stage index: %u, PD offset 0x%x\n",
+	seq_printf(m, "\tPriority %d, GuC stage index: %u\n",
 		   client->priority,
-		   client->stage_id,
-		   client->proc_desc_offset);
-	seq_printf(m, "\tDoorbell id %d, offset: 0x%lx\n",
-		   client->doorbell_id, client->doorbell_offset);
+		   client->stage_id);
 	/* Add more as required ... */
 
 	return 0;
diff --git a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
index 4b3cac73e291..fb03f8a90cac 100644
--- a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
+++ b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
@@ -36,5 +36,4 @@ selftest(reset, intel_reset_live_selftests)
 selftest(memory_region, intel_memory_region_live_selftests)
 selftest(hangcheck, intel_hangcheck_live_selftests)
 selftest(execlists, intel_execlists_live_selftests)
-selftest(guc, intel_guc_live_selftest)
 selftest(perf, i915_perf_live_selftests)
-- 
2.23.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH 3/4] drm/i915/guc: kill doorbell code and selftests

[Daniele Ceraolo Spurio]

Instead of relying on the workqueue, the upcoming reworked GuC
submission flow will offer the host driver indipendent control over
the execution status of each context submitted to GuC. As part of this,
the doorbell usage model has been reworked, with each doorbell being
paired to a single lrc and a doorbell ring representing new work
available for that specific context. This mechanism, however, limits
the number of contexts that can be registered with GuC to the number of
doorbells, which is an undesired limitation. Luckily, GuC will also
provide a H2G that will allow the host to notify the GuC of work
available for a specified lrc, so we can use that mechanism instead of
relying on the doorbells. We can therefore drop the doorbell code we
currently have, also given the fact that in the unlikely case we'd want
to switch back to using doorbells we'd have to heavily rework it.
The workqueue will still have a use in the new interface to pass special
commands, so that code has been retained for now.

With the doorbells gone and the GuC client becoming even simpler, the
existing GuC selftests don't give us any meaningful coverage so we can
remove them as well. Some selftests might come with the new code, but
they will look different from what we have now so if doesn't seem worth
it to keep the file around in the meantime.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc.h        |   8 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |   2 +-
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 373 ++----------------
 .../gpu/drm/i915/gt/uc/intel_guc_submission.h |   9 +-
 drivers/gpu/drm/i915/gt/uc/intel_uc.c         |   7 +-
 drivers/gpu/drm/i915/gt/uc/selftest_guc.c     | 299 --------------
 drivers/gpu/drm/i915/i915_debugfs.c           |  11 +-
 .../drm/i915/selftests/i915_live_selftests.h  |   1 -
 8 files changed, 42 insertions(+), 668 deletions(-)
 delete mode 100644 drivers/gpu/drm/i915/gt/uc/selftest_guc.c

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index bf438f820c35..b2d1766e689a 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -20,8 +20,8 @@ struct __guc_ads_blob;
 
 /*
  * Top level structure of GuC. It handles firmware loading and manages client
- * pool and doorbells. intel_guc owns a intel_guc_client to replace the legacy
- * ExecList submission.
+ * pool. intel_guc owns a intel_guc_client to replace the legacy ExecList
+ * submission.
  */
 struct intel_guc {
 	struct intel_uc_fw fw;
@@ -50,10 +50,6 @@ struct intel_guc {
 
 	struct intel_guc_client *execbuf_client;
 
-	DECLARE_BITMAP(doorbell_bitmap, GUC_NUM_DOORBELLS);
-	/* Cyclic counter mod pagesize	*/
-	u32 db_cacheline;
-
 	/* Control params for fw initialization */
 	u32 params[GUC_CTL_MAX_DWORDS];
 
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index a26a85d50209..1e8e4af7d9ca 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -31,7 +31,7 @@
 
 #define GUC_DOORBELL_INVALID		256
 
-#define GUC_DB_SIZE			(PAGE_SIZE)
+#define GUC_PD_SIZE			(PAGE_SIZE)
 #define GUC_WQ_SIZE			(PAGE_SIZE * 2)
 
 /* Work queue item header definitions */
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 6ac213ddbfa3..0088c3417641 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -30,8 +30,8 @@
  * GuC client:
  * A intel_guc_client refers to a submission path through GuC. Currently, there
  * is only one client, which is charged with all submissions to the GuC. This
- * struct is the owner of a doorbell, a process descriptor and a workqueue (all
- * of them inside a single gem object that contains all required pages for these
+ * struct is the owner of a process descriptor and a workqueue (both of them
+ * inside a single gem object that contains all required pages for these
  * elements).
  *
  * GuC stage descriptor:
@@ -39,13 +39,13 @@
  * descriptors, and shares them with the GuC.
  * Currently, there exists a 1:1 mapping between a intel_guc_client and a
  * guc_stage_desc (via the client's stage_id), so effectively only one
- * gets used. This stage descriptor lets the GuC know about the doorbell,
- * workqueue and process descriptor. Theoretically, it also lets the GuC
- * know about our HW contexts (context ID, etc...), but we actually
- * employ a kind of submission where the GuC uses the LRCA sent via the work
- * item instead (the single guc_stage_desc associated to execbuf client
- * contains information about the default kernel context only, but this is
- * essentially unused). This is called a "proxy" submission.
+ * gets used. This stage descriptor lets the GuC know about the workqueue and
+ * process descriptor. Theoretically, it also lets the GuC know about our HW
+ * contexts (context ID, etc...), but we actually employ a kind of submission
+ * where the GuC uses the LRCA sent via the work item instead (the single
+ * guc_stage_desc associated to execbuf client contains information about the
+ * default kernel context only, but this is essentially unused). This is called
+ * a "proxy" submission.
  *
  * The Scratch registers:
  * There are 16 MMIO-based registers start from 0xC180. The kernel driver writes
@@ -56,10 +56,6 @@
  * then proceeds.
  * See intel_guc_send()
  *
- * Doorbells:
- * Doorbells are interrupts to uKernel. A doorbell is a single cache line (QW)
- * mapped into process space.
- *
  * Work Items:
  * There are several types of work items that the host may place into a
  * workqueue, each with its own requirements and limitations. Currently only
@@ -81,78 +77,6 @@ static inline bool is_high_priority(struct intel_guc_client *client)
 		client->priority == GUC_CLIENT_PRIORITY_HIGH);
 }
 
-static int reserve_doorbell(struct intel_guc_client *client)
-{
-	unsigned long offset;
-	unsigned long end;
-	u16 id;
-
-	GEM_BUG_ON(client->doorbell_id != GUC_DOORBELL_INVALID);
-
-	/*
-	 * The bitmap tracks which doorbell registers are currently in use.
-	 * It is split into two halves; the first half is used for normal
-	 * priority contexts, the second half for high-priority ones.
-	 */
-	offset = 0;
-	end = GUC_NUM_DOORBELLS / 2;
-	if (is_high_priority(client)) {
-		offset = end;
-		end += offset;
-	}
-
-	id = find_next_zero_bit(client->guc->doorbell_bitmap, end, offset);
-	if (id == end)
-		return -ENOSPC;
-
-	__set_bit(id, client->guc->doorbell_bitmap);
-	client->doorbell_id = id;
-	DRM_DEBUG_DRIVER("client %u (high prio=%s) reserved doorbell: %d\n",
-			 client->stage_id, yesno(is_high_priority(client)),
-			 id);
-	return 0;
-}
-
-static bool has_doorbell(struct intel_guc_client *client)
-{
-	if (client->doorbell_id == GUC_DOORBELL_INVALID)
-		return false;
-
-	return test_bit(client->doorbell_id, client->guc->doorbell_bitmap);
-}
-
-static void unreserve_doorbell(struct intel_guc_client *client)
-{
-	GEM_BUG_ON(!has_doorbell(client));
-
-	__clear_bit(client->doorbell_id, client->guc->doorbell_bitmap);
-	client->doorbell_id = GUC_DOORBELL_INVALID;
-}
-
-/*
- * Tell the GuC to allocate or deallocate a specific doorbell
- */
-
-static int __guc_allocate_doorbell(struct intel_guc *guc, u32 stage_id)
-{
-	u32 action[] = {
-		INTEL_GUC_ACTION_ALLOCATE_DOORBELL,
-		stage_id
-	};
-
-	return intel_guc_send(guc, action, ARRAY_SIZE(action));
-}
-
-static int __guc_deallocate_doorbell(struct intel_guc *guc, u32 stage_id)
-{
-	u32 action[] = {
-		INTEL_GUC_ACTION_DEALLOCATE_DOORBELL,
-		stage_id
-	};
-
-	return intel_guc_send(guc, action, ARRAY_SIZE(action));
-}
-
 static struct guc_stage_desc *__get_stage_desc(struct intel_guc_client *client)
 {
 	struct guc_stage_desc *base = client->guc->stage_desc_pool_vaddr;
@@ -160,118 +84,10 @@ static struct guc_stage_desc *__get_stage_desc(struct intel_guc_client *client)
 	return &base[client->stage_id];
 }
 
-/*
- * Initialise, update, or clear doorbell data shared with the GuC
- *
- * These functions modify shared data and so need access to the mapped
- * client object which contains the page being used for the doorbell
- */
-
-static void __update_doorbell_desc(struct intel_guc_client *client, u16 new_id)
-{
-	struct guc_stage_desc *desc;
-
-	/* Update the GuC's idea of the doorbell ID */
-	desc = __get_stage_desc(client);
-	desc->db_id = new_id;
-}
-
-static struct guc_doorbell_info *__get_doorbell(struct intel_guc_client *client)
-{
-	return client->vaddr + client->doorbell_offset;
-}
-
-static bool __doorbell_valid(struct intel_guc *guc, u16 db_id)
-{
-	struct intel_uncore *uncore = guc_to_gt(guc)->uncore;
-
-	GEM_BUG_ON(db_id >= GUC_NUM_DOORBELLS);
-	return intel_uncore_read(uncore, GEN8_DRBREGL(db_id)) & GEN8_DRB_VALID;
-}
-
-static void __init_doorbell(struct intel_guc_client *client)
-{
-	struct guc_doorbell_info *doorbell;
-
-	doorbell = __get_doorbell(client);
-	doorbell->db_status = GUC_DOORBELL_ENABLED;
-	doorbell->cookie = 0;
-}
-
-static void __fini_doorbell(struct intel_guc_client *client)
-{
-	struct guc_doorbell_info *doorbell;
-	u16 db_id = client->doorbell_id;
-
-	doorbell = __get_doorbell(client);
-	doorbell->db_status = GUC_DOORBELL_DISABLED;
-
-	/* Doorbell release flow requires that we wait for GEN8_DRB_VALID bit
-	 * to go to zero after updating db_status before we call the GuC to
-	 * release the doorbell
-	 */
-	if (wait_for_us(!__doorbell_valid(client->guc, db_id), 10))
-		WARN_ONCE(true, "Doorbell never became invalid after disable\n");
-}
-
-static int create_doorbell(struct intel_guc_client *client)
-{
-	int ret;
-
-	if (WARN_ON(!has_doorbell(client)))
-		return -ENODEV; /* internal setup error, should never happen */
-
-	__update_doorbell_desc(client, client->doorbell_id);
-	__init_doorbell(client);
-
-	ret = __guc_allocate_doorbell(client->guc, client->stage_id);
-	if (ret) {
-		__fini_doorbell(client);
-		__update_doorbell_desc(client, GUC_DOORBELL_INVALID);
-		DRM_DEBUG_DRIVER("Couldn't create client %u doorbell: %d\n",
-				 client->stage_id, ret);
-		return ret;
-	}
-
-	return 0;
-}
-
-static int destroy_doorbell(struct intel_guc_client *client)
-{
-	int ret;
-
-	GEM_BUG_ON(!has_doorbell(client));
-
-	__fini_doorbell(client);
-	ret = __guc_deallocate_doorbell(client->guc, client->stage_id);
-	if (ret)
-		DRM_ERROR("Couldn't destroy client %u doorbell: %d\n",
-			  client->stage_id, ret);
-
-	__update_doorbell_desc(client, GUC_DOORBELL_INVALID);
-
-	return ret;
-}
-
-static unsigned long __select_cacheline(struct intel_guc *guc)
-{
-	unsigned long offset;
-
-	/* Doorbell uses a single cache line within a page */
-	offset = offset_in_page(guc->db_cacheline);
-
-	/* Moving to next cache line to reduce contention */
-	guc->db_cacheline += cache_line_size();
-
-	DRM_DEBUG_DRIVER("reserved cacheline 0x%lx, next 0x%x, linesize %u\n",
-			 offset, guc->db_cacheline, cache_line_size());
-	return offset;
-}
-
 static inline struct guc_process_desc *
 __get_process_desc(struct intel_guc_client *client)
 {
-	return client->vaddr + client->proc_desc_offset;
+	return client->vaddr;
 }
 
 /*
@@ -332,8 +148,8 @@ static void guc_stage_desc_pool_destroy(struct intel_guc *guc)
  * Initialise/clear the stage descriptor shared with the GuC firmware.
  *
  * This descriptor tells the GuC where (in GGTT space) to find the important
- * data structures relating to this client (doorbell, process descriptor,
- * write queue, etc).
+ * data structures relating to this client (process descriptor, write queue,
+ * etc).
  */
 static void guc_stage_desc_init(struct intel_guc_client *client)
 {
@@ -350,19 +166,14 @@ static void guc_stage_desc_init(struct intel_guc_client *client)
 		desc->attribute |= GUC_STAGE_DESC_ATTR_PREEMPT;
 	desc->stage_id = client->stage_id;
 	desc->priority = client->priority;
-	desc->db_id = client->doorbell_id;
 
 	/*
-	 * The doorbell, process descriptor, and workqueue are all parts
-	 * of the client object, which the GuC will reference via the GGTT
+	 * The process descriptor and workqueue are all parts of the client
+	 * object, which the GuC will reference via the GGTT
 	 */
 	gfx_addr = intel_guc_ggtt_offset(guc, client->vma);
-	desc->db_trigger_phy = sg_dma_address(client->vma->pages->sgl) +
-				client->doorbell_offset;
-	desc->db_trigger_cpu = ptr_to_u64(__get_doorbell(client));
-	desc->db_trigger_uk = gfx_addr + client->doorbell_offset;
-	desc->process_desc = gfx_addr + client->proc_desc_offset;
-	desc->wq_addr = gfx_addr + GUC_DB_SIZE;
+	desc->process_desc = gfx_addr;
+	desc->wq_addr = gfx_addr + GUC_PD_SIZE;
 	desc->wq_size = GUC_WQ_SIZE;
 
 	desc->desc_private = ptr_to_u64(client);
@@ -408,48 +219,23 @@ static void guc_wq_item_append(struct intel_guc_client *client,
 			      GUC_WQ_SIZE) < wqi_size);
 	GEM_BUG_ON(wq_off & (wqi_size - 1));
 
-	/* WQ starts from the page after doorbell / process_desc */
-	wqi = client->vaddr + wq_off + GUC_DB_SIZE;
-
-	if (I915_SELFTEST_ONLY(client->use_nop_wqi)) {
-		wqi->header = WQ_TYPE_NOOP | (wqi_len << WQ_LEN_SHIFT);
-	} else {
-		/* Now fill in the 4-word work queue item */
-		wqi->header = WQ_TYPE_INORDER |
-			      (wqi_len << WQ_LEN_SHIFT) |
-			      (target_engine << WQ_TARGET_SHIFT) |
-			      WQ_NO_WCFLUSH_WAIT;
-		wqi->context_desc = context_desc;
-		wqi->submit_element_info = ring_tail << WQ_RING_TAIL_SHIFT;
-		GEM_BUG_ON(ring_tail > WQ_RING_TAIL_MAX);
-		wqi->fence_id = fence_id;
-	}
+	/* WQ starts from the page after process_desc */
+	wqi = client->vaddr + wq_off + GUC_PD_SIZE;
+
+	/* Now fill in the 4-word work queue item */
+	wqi->header = WQ_TYPE_INORDER |
+		      (wqi_len << WQ_LEN_SHIFT) |
+		      (target_engine << WQ_TARGET_SHIFT) |
+		      WQ_NO_WCFLUSH_WAIT;
+	wqi->context_desc = context_desc;
+	wqi->submit_element_info = ring_tail << WQ_RING_TAIL_SHIFT;
+	GEM_BUG_ON(ring_tail > WQ_RING_TAIL_MAX);
+	wqi->fence_id = fence_id;
 
 	/* Make the update visible to GuC */
 	WRITE_ONCE(desc->tail, (wq_off + wqi_size) & (GUC_WQ_SIZE - 1));
 }
 
-static void guc_ring_doorbell(struct intel_guc_client *client)
-{
-	struct guc_doorbell_info *db;
-	u32 cookie;
-
-	lockdep_assert_held(&client->wq_lock);
-
-	/* pointer of current doorbell cacheline */
-	db = __get_doorbell(client);
-
-	/*
-	 * We're not expecting the doorbell cookie to change behind our back,
-	 * we also need to treat 0 as a reserved value.
-	 */
-	cookie = READ_ONCE(db->cookie);
-	WARN_ON_ONCE(xchg(&db->cookie, cookie + 1 ?: cookie + 2) != cookie);
-
-	/* XXX: doorbell was lost and need to acquire it again */
-	GEM_BUG_ON(db->db_status != GUC_DOORBELL_ENABLED);
-}
-
 static void guc_add_request(struct intel_guc *guc, struct i915_request *rq)
 {
 	struct intel_guc_client *client = guc->execbuf_client;
@@ -459,7 +245,6 @@ static void guc_add_request(struct intel_guc *guc, struct i915_request *rq)
 
 	guc_wq_item_append(client, engine->guc_id, ctx_desc,
 			   ring_tail, rq->fence.seqno);
-	guc_ring_doorbell(client);
 }
 
 /*
@@ -744,36 +529,6 @@ static void guc_reset_finish(struct intel_engine_cs *engine)
  * path of guc_submit() above.
  */
 
-/* Check that a doorbell register is in the expected state */
-static bool doorbell_ok(struct intel_guc *guc, u16 db_id)
-{
-	bool valid;
-
-	GEM_BUG_ON(db_id >= GUC_NUM_DOORBELLS);
-
-	valid = __doorbell_valid(guc, db_id);
-
-	if (test_bit(db_id, guc->doorbell_bitmap) == valid)
-		return true;
-
-	DRM_DEBUG_DRIVER("Doorbell %u has unexpected state: valid=%s\n",
-			 db_id, yesno(valid));
-
-	return false;
-}
-
-static bool guc_verify_doorbells(struct intel_guc *guc)
-{
-	bool doorbells_ok = true;
-	u16 db_id;
-
-	for (db_id = 0; db_id < GUC_NUM_DOORBELLS; ++db_id)
-		if (!doorbell_ok(guc, db_id))
-			doorbells_ok = false;
-
-	return doorbells_ok;
-}
-
 /**
  * guc_client_alloc() - Allocate an intel_guc_client
  * @guc:	the intel_guc structure
@@ -798,7 +553,6 @@ guc_client_alloc(struct intel_guc *guc, u32 priority)
 
 	client->guc = guc;
 	client->priority = priority;
-	client->doorbell_id = GUC_DOORBELL_INVALID;
 	spin_lock_init(&client->wq_lock);
 
 	ret = ida_simple_get(&guc->stage_ids, 0, GUC_MAX_STAGE_DESCRIPTORS,
@@ -809,7 +563,7 @@ guc_client_alloc(struct intel_guc *guc, u32 priority)
 	client->stage_id = ret;
 
 	/* The first page is doorbell/proc_desc. Two followed pages are wq. */
-	vma = intel_guc_allocate_vma(guc, GUC_DB_SIZE + GUC_WQ_SIZE);
+	vma = intel_guc_allocate_vma(guc, GUC_PD_SIZE + GUC_WQ_SIZE);
 	if (IS_ERR(vma)) {
 		ret = PTR_ERR(vma);
 		goto err_id;
@@ -825,31 +579,11 @@ guc_client_alloc(struct intel_guc *guc, u32 priority)
 	}
 	client->vaddr = vaddr;
 
-	ret = reserve_doorbell(client);
-	if (ret)
-		goto err_vaddr;
-
-	client->doorbell_offset = __select_cacheline(guc);
-
-	/*
-	 * Since the doorbell only requires a single cacheline, we can save
-	 * space by putting the application process descriptor in the same
-	 * page. Use the half of the page that doesn't include the doorbell.
-	 */
-	if (client->doorbell_offset >= (GUC_DB_SIZE / 2))
-		client->proc_desc_offset = 0;
-	else
-		client->proc_desc_offset = (GUC_DB_SIZE / 2);
-
 	DRM_DEBUG_DRIVER("new priority %u client %p: stage_id %u\n",
 			 priority, client, client->stage_id);
-	DRM_DEBUG_DRIVER("doorbell id %u, cacheline offset 0x%lx\n",
-			 client->doorbell_id, client->doorbell_offset);
 
 	return client;
 
-err_vaddr:
-	i915_gem_object_unpin_map(client->vma->obj);
 err_vma:
 	i915_vma_unpin_and_release(&client->vma, 0);
 err_id:
@@ -861,7 +595,6 @@ guc_client_alloc(struct intel_guc *guc, u32 priority)
 
 static void guc_client_free(struct intel_guc_client *client)
 {
-	unreserve_doorbell(client);
 	i915_vma_unpin_and_release(&client->vma, I915_VMA_RELEASE_MAP);
 	ida_simple_remove(&client->guc->stage_ids, client->stage_id);
 	kfree(client);
@@ -892,44 +625,21 @@ static void guc_clients_destroy(struct intel_guc *guc)
 		guc_client_free(client);
 }
 
-static int __guc_client_enable(struct intel_guc_client *client)
+static void __guc_client_enable(struct intel_guc_client *client)
 {
-	int ret;
-
 	guc_proc_desc_init(client);
 	guc_stage_desc_init(client);
-
-	ret = create_doorbell(client);
-	if (ret)
-		goto fail;
-
-	return 0;
-
-fail:
-	guc_stage_desc_fini(client);
-	guc_proc_desc_fini(client);
-	return ret;
 }
 
 static void __guc_client_disable(struct intel_guc_client *client)
 {
-	/*
-	 * By the time we're here, GuC may have already been reset. if that is
-	 * the case, instead of trying (in vain) to communicate with it, let's
-	 * just cleanup the doorbell HW and our internal state.
-	 */
-	if (intel_guc_is_running(client->guc))
-		destroy_doorbell(client);
-	else
-		__fini_doorbell(client);
-
 	guc_stage_desc_fini(client);
 	guc_proc_desc_fini(client);
 }
 
-static int guc_clients_enable(struct intel_guc *guc)
+static void guc_clients_enable(struct intel_guc *guc)
 {
-	return __guc_client_enable(guc->execbuf_client);
+	__guc_client_enable(guc->execbuf_client);
 }
 
 static void guc_clients_disable(struct intel_guc *guc)
@@ -958,7 +668,6 @@ int intel_guc_submission_init(struct intel_guc *guc)
 	 */
 	GEM_BUG_ON(!guc->stage_desc_pool);
 
-	WARN_ON(!guc_verify_doorbells(guc));
 	ret = guc_clients_create(guc);
 	if (ret)
 		goto err_pool;
@@ -973,7 +682,6 @@ int intel_guc_submission_init(struct intel_guc *guc)
 void intel_guc_submission_fini(struct intel_guc *guc)
 {
 	guc_clients_destroy(guc);
-	WARN_ON(!guc_verify_doorbells(guc));
 
 	if (guc->stage_desc_pool)
 		guc_stage_desc_pool_destroy(guc);
@@ -1089,16 +797,11 @@ static void guc_set_default_submission(struct intel_engine_cs *engine)
 	GEM_BUG_ON(engine->irq_enable || engine->irq_disable);
 }
 
-int intel_guc_submission_enable(struct intel_guc *guc)
+void intel_guc_submission_enable(struct intel_guc *guc)
 {
 	struct intel_gt *gt = guc_to_gt(guc);
 	struct intel_engine_cs *engine;
 	enum intel_engine_id id;
-	int err;
-
-	err = i915_inject_probe_error(gt->i915, -ENXIO);
-	if (err)
-		return err;
 
 	/*
 	 * We're using GuC work items for submitting work through GuC. Since
@@ -1115,9 +818,7 @@ int intel_guc_submission_enable(struct intel_guc *guc)
 
 	GEM_BUG_ON(!guc->execbuf_client);
 
-	err = guc_clients_enable(guc);
-	if (err)
-		return err;
+	guc_clients_enable(guc);
 
 	/* Take over from manual control of ELSP (execlists) */
 	guc_interrupts_capture(gt);
@@ -1126,8 +827,6 @@ int intel_guc_submission_enable(struct intel_guc *guc)
 		engine->set_default_submission = guc_set_default_submission;
 		engine->set_default_submission(engine);
 	}
-
-	return 0;
 }
 
 void intel_guc_submission_disable(struct intel_guc *guc)
@@ -1155,7 +854,3 @@ void intel_guc_submission_init_early(struct intel_guc *guc)
 {
 	guc->submission_supported = __guc_submission_support(guc);
 }
-
-#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
-#include "selftest_guc.c"
-#endif
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
index 54d716828352..e2deb4e6f42a 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
@@ -44,21 +44,14 @@ struct intel_guc_client {
 	/* bitmap of (host) engine ids */
 	u32 priority;
 	u32 stage_id;
-	u32 proc_desc_offset;
-
-	u16 doorbell_id;
-	unsigned long doorbell_offset;
 
 	/* Protects GuC client's WQ access */
 	spinlock_t wq_lock;
-
-	/* For testing purposes, use nop WQ items instead of real ones */
-	I915_SELFTEST_DECLARE(bool use_nop_wqi);
 };
 
 void intel_guc_submission_init_early(struct intel_guc *guc);
 int intel_guc_submission_init(struct intel_guc *guc);
-int intel_guc_submission_enable(struct intel_guc *guc);
+void intel_guc_submission_enable(struct intel_guc *guc);
 void intel_guc_submission_disable(struct intel_guc *guc);
 void intel_guc_submission_fini(struct intel_guc *guc);
 int intel_guc_preempt_work_create(struct intel_guc *guc);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
index 629b19377a29..c6519066a0f6 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
@@ -486,11 +486,8 @@ int intel_uc_init_hw(struct intel_uc *uc)
 	if (ret)
 		goto err_communication;
 
-	if (intel_uc_supports_guc_submission(uc)) {
-		ret = intel_guc_submission_enable(guc);
-		if (ret)
-			goto err_communication;
-	}
+	if (intel_uc_supports_guc_submission(uc))
+		intel_guc_submission_enable(guc);
 
 	dev_info(i915->drm.dev, "%s firmware %s version %u.%u %s:%s\n",
 		 intel_uc_fw_type_repr(INTEL_UC_FW_TYPE_GUC), guc->fw.path,
diff --git a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c b/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
deleted file mode 100644
index d8a80388bd31..000000000000
--- a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
+++ /dev/null
@@ -1,299 +0,0 @@
-// SPDX-License-Identifier: MIT
-/*
- * Copyright © 2017 Intel Corporation
- */
-
-#include "i915_selftest.h"
-#include "gem/i915_gem_pm.h"
-
-/* max doorbell number + negative test for each client type */
-#define ATTEMPTS (GUC_NUM_DOORBELLS + GUC_CLIENT_PRIORITY_NUM)
-
-static struct intel_guc_client *clients[ATTEMPTS];
-
-static bool available_dbs(struct intel_guc *guc, u32 priority)
-{
-	unsigned long offset;
-	unsigned long end;
-	u16 id;
-
-	/* first half is used for normal priority, second half for high */
-	offset = 0;
-	end = GUC_NUM_DOORBELLS / 2;
-	if (priority <= GUC_CLIENT_PRIORITY_HIGH) {
-		offset = end;
-		end += offset;
-	}
-
-	id = find_next_zero_bit(guc->doorbell_bitmap, end, offset);
-	if (id < end)
-		return true;
-
-	return false;
-}
-
-static int check_all_doorbells(struct intel_guc *guc)
-{
-	u16 db_id;
-
-	pr_info_once("Max number of doorbells: %d", GUC_NUM_DOORBELLS);
-	for (db_id = 0; db_id < GUC_NUM_DOORBELLS; ++db_id) {
-		if (!doorbell_ok(guc, db_id)) {
-			pr_err("doorbell %d, not ok\n", db_id);
-			return -EIO;
-		}
-	}
-
-	return 0;
-}
-
-static int ring_doorbell_nop(struct intel_guc_client *client)
-{
-	struct guc_process_desc *desc = __get_process_desc(client);
-	int err;
-
-	client->use_nop_wqi = true;
-
-	spin_lock_irq(&client->wq_lock);
-
-	guc_wq_item_append(client, 0, 0, 0, 0);
-	guc_ring_doorbell(client);
-
-	spin_unlock_irq(&client->wq_lock);
-
-	client->use_nop_wqi = false;
-
-	/* if there are no issues GuC will update the WQ head and keep the
-	 * WQ in active status
-	 */
-	err = wait_for(READ_ONCE(desc->head) == READ_ONCE(desc->tail), 10);
-	if (err) {
-		pr_err("doorbell %u ring failed!\n", client->doorbell_id);
-		return -EIO;
-	}
-
-	if (desc->wq_status != WQ_STATUS_ACTIVE) {
-		pr_err("doorbell %u ring put WQ in bad state (%u)!\n",
-		       client->doorbell_id, desc->wq_status);
-		return -EIO;
-	}
-
-	return 0;
-}
-
-/*
- * Basic client sanity check, handy to validate create_clients.
- */
-static int validate_client(struct intel_guc_client *client, int client_priority)
-{
-	if (client->priority != client_priority ||
-	    client->doorbell_id == GUC_DOORBELL_INVALID)
-		return -EINVAL;
-	else
-		return 0;
-}
-
-static bool client_doorbell_in_sync(struct intel_guc_client *client)
-{
-	return !client || doorbell_ok(client->guc, client->doorbell_id);
-}
-
-/*
- * Check that we're able to synchronize guc_clients with their doorbells
- *
- * We're creating clients and reserving doorbells once, at module load. During
- * module lifetime, GuC, doorbell HW, and i915 state may go out of sync due to
- * GuC being reset. In other words - GuC clients are still around, but the
- * status of their doorbells may be incorrect. This is the reason behind
- * validating that the doorbells status expected by the driver matches what the
- * GuC/HW have.
- */
-static int igt_guc_clients(void *arg)
-{
-	struct intel_gt *gt = arg;
-	struct intel_guc *guc = &gt->uc.guc;
-	intel_wakeref_t wakeref;
-	int err = 0;
-
-	GEM_BUG_ON(!HAS_GT_UC(gt->i915));
-	wakeref = intel_runtime_pm_get(gt->uncore->rpm);
-
-	err = check_all_doorbells(guc);
-	if (err)
-		goto unlock;
-
-	/*
-	 * Get rid of clients created during driver load because the test will
-	 * recreate them.
-	 */
-	guc_clients_disable(guc);
-	guc_clients_destroy(guc);
-	if (guc->execbuf_client) {
-		pr_err("guc_clients_destroy lied!\n");
-		err = -EINVAL;
-		goto unlock;
-	}
-
-	err = guc_clients_create(guc);
-	if (err) {
-		pr_err("Failed to create clients\n");
-		goto unlock;
-	}
-	GEM_BUG_ON(!guc->execbuf_client);
-
-	err = validate_client(guc->execbuf_client,
-			      GUC_CLIENT_PRIORITY_KMD_NORMAL);
-	if (err) {
-		pr_err("execbug client validation failed\n");
-		goto out;
-	}
-
-	/* the client should now have reserved a doorbell */
-	if (!has_doorbell(guc->execbuf_client)) {
-		pr_err("guc_clients_create didn't reserve doorbells\n");
-		err = -EINVAL;
-		goto out;
-	}
-
-	/* Now enable the clients */
-	guc_clients_enable(guc);
-
-	/* each client should now have received a doorbell */
-	if (!client_doorbell_in_sync(guc->execbuf_client)) {
-		pr_err("failed to initialize the doorbells\n");
-		err = -EINVAL;
-		goto out;
-	}
-
-	/*
-	 * Basic test - an attempt to reallocate a valid doorbell to the
-	 * client it is currently assigned should not cause a failure.
-	 */
-	err = create_doorbell(guc->execbuf_client);
-
-out:
-	/*
-	 * Leave clean state for other test, plus the driver always destroy the
-	 * clients during unload.
-	 */
-	guc_clients_disable(guc);
-	guc_clients_destroy(guc);
-	guc_clients_create(guc);
-	guc_clients_enable(guc);
-unlock:
-	intel_runtime_pm_put(gt->uncore->rpm, wakeref);
-	return err;
-}
-
-/*
- * Create as many clients as number of doorbells. Note that there's already
- * client(s)/doorbell(s) created during driver load, but this test creates
- * its own and do not interact with the existing ones.
- */
-static int igt_guc_doorbells(void *arg)
-{
-	struct intel_gt *gt = arg;
-	struct intel_guc *guc = &gt->uc.guc;
-	intel_wakeref_t wakeref;
-	int i, err = 0;
-	u16 db_id;
-
-	GEM_BUG_ON(!HAS_GT_UC(gt->i915));
-	wakeref = intel_runtime_pm_get(gt->uncore->rpm);
-
-	err = check_all_doorbells(guc);
-	if (err)
-		goto unlock;
-
-	for (i = 0; i < ATTEMPTS; i++) {
-		clients[i] = guc_client_alloc(guc, i % GUC_CLIENT_PRIORITY_NUM);
-
-		if (!clients[i]) {
-			pr_err("[%d] No guc client\n", i);
-			err = -EINVAL;
-			goto out;
-		}
-
-		if (IS_ERR(clients[i])) {
-			if (PTR_ERR(clients[i]) != -ENOSPC) {
-				pr_err("[%d] unexpected error\n", i);
-				err = PTR_ERR(clients[i]);
-				goto out;
-			}
-
-			if (available_dbs(guc, i % GUC_CLIENT_PRIORITY_NUM)) {
-				pr_err("[%d] non-db related alloc fail\n", i);
-				err = -EINVAL;
-				goto out;
-			}
-
-			/* expected, ran out of dbs for this client type */
-			continue;
-		}
-
-		/*
-		 * The check below is only valid because we keep a doorbell
-		 * assigned during the whole life of the client.
-		 */
-		if (clients[i]->stage_id >= GUC_NUM_DOORBELLS) {
-			pr_err("[%d] more clients than doorbells (%d >= %d)\n",
-			       i, clients[i]->stage_id, GUC_NUM_DOORBELLS);
-			err = -EINVAL;
-			goto out;
-		}
-
-		err = validate_client(clients[i], i % GUC_CLIENT_PRIORITY_NUM);
-		if (err) {
-			pr_err("[%d] client_alloc sanity check failed!\n", i);
-			err = -EINVAL;
-			goto out;
-		}
-
-		db_id = clients[i]->doorbell_id;
-
-		err = __guc_client_enable(clients[i]);
-		if (err) {
-			pr_err("[%d] Failed to create a doorbell\n", i);
-			goto out;
-		}
-
-		/* doorbell id shouldn't change, we are holding the mutex */
-		if (db_id != clients[i]->doorbell_id) {
-			pr_err("[%d] doorbell id changed (%d != %d)\n",
-			       i, db_id, clients[i]->doorbell_id);
-			err = -EINVAL;
-			goto out;
-		}
-
-		err = check_all_doorbells(guc);
-		if (err)
-			goto out;
-
-		err = ring_doorbell_nop(clients[i]);
-		if (err)
-			goto out;
-	}
-
-out:
-	for (i = 0; i < ATTEMPTS; i++)
-		if (!IS_ERR_OR_NULL(clients[i])) {
-			__guc_client_disable(clients[i]);
-			guc_client_free(clients[i]);
-		}
-unlock:
-	intel_runtime_pm_put(gt->uncore->rpm, wakeref);
-	return err;
-}
-
-int intel_guc_live_selftest(struct drm_i915_private *i915)
-{
-	static const struct i915_subtest tests[] = {
-		SUBTEST(igt_guc_clients),
-		SUBTEST(igt_guc_doorbells),
-	};
-
-	if (!USES_GUC_SUBMISSION(i915))
-		return 0;
-
-	return intel_gt_live_subtests(tests, &i915->gt);
-}
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index cab632791f73..5d5974e7f3ed 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1815,17 +1815,10 @@ static int i915_guc_info(struct seq_file *m, void *data)
 
 	GEM_BUG_ON(!guc->execbuf_client);
 
-	seq_printf(m, "\nDoorbell map:\n");
-	seq_printf(m, "\t%*pb\n", GUC_NUM_DOORBELLS, guc->doorbell_bitmap);
-	seq_printf(m, "Doorbell next cacheline: 0x%x\n", guc->db_cacheline);
-
 	seq_printf(m, "\nGuC execbuf client @ %p:\n", client);
-	seq_printf(m, "\tPriority %d, GuC stage index: %u, PD offset 0x%x\n",
+	seq_printf(m, "\tPriority %d, GuC stage index: %u\n",
 		   client->priority,
-		   client->stage_id,
-		   client->proc_desc_offset);
-	seq_printf(m, "\tDoorbell id %d, offset: 0x%lx\n",
-		   client->doorbell_id, client->doorbell_offset);
+		   client->stage_id);
 	/* Add more as required ... */
 
 	return 0;
diff --git a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
index 4b3cac73e291..fb03f8a90cac 100644
--- a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
+++ b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
@@ -36,5 +36,4 @@ selftest(reset, intel_reset_live_selftests)
 selftest(memory_region, intel_memory_region_live_selftests)
 selftest(hangcheck, intel_hangcheck_live_selftests)
 selftest(execlists, intel_execlists_live_selftests)
-selftest(guc, intel_guc_live_selftest)
 selftest(perf, i915_perf_live_selftests)
-- 
2.23.0

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Re: [PATCH 3/4] drm/i915/guc: kill doorbell code and selftests

[John Harrison]

On 11/6/2019 14:25, Daniele Ceraolo Spurio wrote:
> Instead of relying on the workqueue, the upcoming reworked GuC
> submission flow will offer the host driver indipendent control over
independent

> the execution status of each context submitted to GuC. As part of this,
> the doorbell usage model has been reworked, with each doorbell being
> paired to a single lrc and a doorbell ring representing new work
> available for that specific context. This mechanism, however, limits
> the number of contexts that can be registered with GuC to the number of
> doorbells, which is an undesired limitation. Luckily, GuC will also
Not exactly 'luckily'. More a case of, we said the doorbells won't work 
for linux so can we have a H2G instead and they listened.

> provide a H2G that will allow the host to notify the GuC of work
> available for a specified lrc, so we can use that mechanism instead of
> relying on the doorbells. We can therefore drop the doorbell code we
> currently have, also given the fact that in the unlikely case we'd want
> to switch back to using doorbells we'd have to heavily rework it.
> The workqueue will still have a use in the new interface to pass special
> commands, so that code has been retained for now.
>
> With the doorbells gone and the GuC client becoming even simpler, the
> existing GuC selftests don't give us any meaningful coverage so we can
> remove them as well. Some selftests might come with the new code, but
> they will look different from what we have now so if doesn't seem worth
> it to keep the file around in the meantime.
>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> ---
>   drivers/gpu/drm/i915/gt/uc/intel_guc.h        |   8 +-
>   drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |   2 +-
>   .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 373 ++----------------
>   .../gpu/drm/i915/gt/uc/intel_guc_submission.h |   9 +-
>   drivers/gpu/drm/i915/gt/uc/intel_uc.c         |   7 +-
>   drivers/gpu/drm/i915/gt/uc/selftest_guc.c     | 299 --------------
>   drivers/gpu/drm/i915/i915_debugfs.c           |  11 +-
>   .../drm/i915/selftests/i915_live_selftests.h  |   1 -
>   8 files changed, 42 insertions(+), 668 deletions(-)
>   delete mode 100644 drivers/gpu/drm/i915/gt/uc/selftest_guc.c
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> index bf438f820c35..b2d1766e689a 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> @@ -20,8 +20,8 @@ struct __guc_ads_blob;
>   
>   /*
>    * Top level structure of GuC. It handles firmware loading and manages client
> - * pool and doorbells. intel_guc owns a intel_guc_client to replace the legacy
> - * ExecList submission.
> + * pool. intel_guc owns a intel_guc_client to replace the legacy ExecList
> + * submission.
>    */
>   struct intel_guc {
>   	struct intel_uc_fw fw;
> @@ -50,10 +50,6 @@ struct intel_guc {
>   
>   	struct intel_guc_client *execbuf_client;
>   
> -	DECLARE_BITMAP(doorbell_bitmap, GUC_NUM_DOORBELLS);
> -	/* Cyclic counter mod pagesize	*/
> -	u32 db_cacheline;
> -
>   	/* Control params for fw initialization */
>   	u32 params[GUC_CTL_MAX_DWORDS];
>   
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> index a26a85d50209..1e8e4af7d9ca 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> @@ -31,7 +31,7 @@
>   
>   #define GUC_DOORBELL_INVALID		256
>   
> -#define GUC_DB_SIZE			(PAGE_SIZE)
> +#define GUC_PD_SIZE			(PAGE_SIZE)
>   #define GUC_WQ_SIZE			(PAGE_SIZE * 2)
>   
>   /* Work queue item header definitions */
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> index 6ac213ddbfa3..0088c3417641 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> @@ -30,8 +30,8 @@
>    * GuC client:
>    * A intel_guc_client refers to a submission path through GuC. Currently, there
>    * is only one client, which is charged with all submissions to the GuC. This
> - * struct is the owner of a doorbell, a process descriptor and a workqueue (all
> - * of them inside a single gem object that contains all required pages for these
> + * struct is the owner of a process descriptor and a workqueue (both of them
> + * inside a single gem object that contains all required pages for these
>    * elements).
>    *
>    * GuC stage descriptor:
> @@ -39,13 +39,13 @@
>    * descriptors, and shares them with the GuC.
>    * Currently, there exists a 1:1 mapping between a intel_guc_client and a
>    * guc_stage_desc (via the client's stage_id), so effectively only one
> - * gets used. This stage descriptor lets the GuC know about the doorbell,
> - * workqueue and process descriptor. Theoretically, it also lets the GuC
> - * know about our HW contexts (context ID, etc...), but we actually
> - * employ a kind of submission where the GuC uses the LRCA sent via the work
> - * item instead (the single guc_stage_desc associated to execbuf client
> - * contains information about the default kernel context only, but this is
> - * essentially unused). This is called a "proxy" submission.
> + * gets used. This stage descriptor lets the GuC know about the workqueue and
> + * process descriptor. Theoretically, it also lets the GuC know about our HW
> + * contexts (context ID, etc...), but we actually employ a kind of submission
> + * where the GuC uses the LRCA sent via the work item instead (the single
> + * guc_stage_desc associated to execbuf client contains information about the
> + * default kernel context only, but this is essentially unused). This is called
> + * a "proxy" submission.
>    *
>    * The Scratch registers:
>    * There are 16 MMIO-based registers start from 0xC180. The kernel driver writes
> @@ -56,10 +56,6 @@
>    * then proceeds.
>    * See intel_guc_send()
>    *
> - * Doorbells:
> - * Doorbells are interrupts to uKernel. A doorbell is a single cache line (QW)
> - * mapped into process space.
> - *
>    * Work Items:
>    * There are several types of work items that the host may place into a
>    * workqueue, each with its own requirements and limitations. Currently only
> @@ -81,78 +77,6 @@ static inline bool is_high_priority(struct intel_guc_client *client)
>   		client->priority == GUC_CLIENT_PRIORITY_HIGH);
>   }
>   
> -static int reserve_doorbell(struct intel_guc_client *client)
> -{
> -	unsigned long offset;
> -	unsigned long end;
> -	u16 id;
> -
> -	GEM_BUG_ON(client->doorbell_id != GUC_DOORBELL_INVALID);
> -
> -	/*
> -	 * The bitmap tracks which doorbell registers are currently in use.
> -	 * It is split into two halves; the first half is used for normal
> -	 * priority contexts, the second half for high-priority ones.
> -	 */
> -	offset = 0;
> -	end = GUC_NUM_DOORBELLS / 2;
> -	if (is_high_priority(client)) {
> -		offset = end;
> -		end += offset;
> -	}
> -
> -	id = find_next_zero_bit(client->guc->doorbell_bitmap, end, offset);
> -	if (id == end)
> -		return -ENOSPC;
> -
> -	__set_bit(id, client->guc->doorbell_bitmap);
> -	client->doorbell_id = id;
> -	DRM_DEBUG_DRIVER("client %u (high prio=%s) reserved doorbell: %d\n",
> -			 client->stage_id, yesno(is_high_priority(client)),
> -			 id);
> -	return 0;
> -}
> -
> -static bool has_doorbell(struct intel_guc_client *client)
> -{
> -	if (client->doorbell_id == GUC_DOORBELL_INVALID)
> -		return false;
> -
> -	return test_bit(client->doorbell_id, client->guc->doorbell_bitmap);
> -}
> -
> -static void unreserve_doorbell(struct intel_guc_client *client)
> -{
> -	GEM_BUG_ON(!has_doorbell(client));
> -
> -	__clear_bit(client->doorbell_id, client->guc->doorbell_bitmap);
> -	client->doorbell_id = GUC_DOORBELL_INVALID;
> -}
> -
> -/*
> - * Tell the GuC to allocate or deallocate a specific doorbell
> - */
> -
> -static int __guc_allocate_doorbell(struct intel_guc *guc, u32 stage_id)
> -{
> -	u32 action[] = {
> -		INTEL_GUC_ACTION_ALLOCATE_DOORBELL,
> -		stage_id
> -	};
> -
> -	return intel_guc_send(guc, action, ARRAY_SIZE(action));
> -}
> -
> -static int __guc_deallocate_doorbell(struct intel_guc *guc, u32 stage_id)
> -{
> -	u32 action[] = {
> -		INTEL_GUC_ACTION_DEALLOCATE_DOORBELL,
> -		stage_id
> -	};
> -
> -	return intel_guc_send(guc, action, ARRAY_SIZE(action));
> -}
> -
>   static struct guc_stage_desc *__get_stage_desc(struct intel_guc_client *client)
>   {
>   	struct guc_stage_desc *base = client->guc->stage_desc_pool_vaddr;
> @@ -160,118 +84,10 @@ static struct guc_stage_desc *__get_stage_desc(struct intel_guc_client *client)
>   	return &base[client->stage_id];
>   }
>   
> -/*
> - * Initialise, update, or clear doorbell data shared with the GuC
> - *
> - * These functions modify shared data and so need access to the mapped
> - * client object which contains the page being used for the doorbell
> - */
> -
> -static void __update_doorbell_desc(struct intel_guc_client *client, u16 new_id)
> -{
> -	struct guc_stage_desc *desc;
> -
> -	/* Update the GuC's idea of the doorbell ID */
> -	desc = __get_stage_desc(client);
> -	desc->db_id = new_id;
> -}
> -
> -static struct guc_doorbell_info *__get_doorbell(struct intel_guc_client *client)
> -{
> -	return client->vaddr + client->doorbell_offset;
> -}
> -
> -static bool __doorbell_valid(struct intel_guc *guc, u16 db_id)
> -{
> -	struct intel_uncore *uncore = guc_to_gt(guc)->uncore;
> -
> -	GEM_BUG_ON(db_id >= GUC_NUM_DOORBELLS);
> -	return intel_uncore_read(uncore, GEN8_DRBREGL(db_id)) & GEN8_DRB_VALID;
> -}
> -
> -static void __init_doorbell(struct intel_guc_client *client)
> -{
> -	struct guc_doorbell_info *doorbell;
> -
> -	doorbell = __get_doorbell(client);
> -	doorbell->db_status = GUC_DOORBELL_ENABLED;
> -	doorbell->cookie = 0;
> -}
> -
> -static void __fini_doorbell(struct intel_guc_client *client)
> -{
> -	struct guc_doorbell_info *doorbell;
> -	u16 db_id = client->doorbell_id;
> -
> -	doorbell = __get_doorbell(client);
> -	doorbell->db_status = GUC_DOORBELL_DISABLED;
> -
> -	/* Doorbell release flow requires that we wait for GEN8_DRB_VALID bit
> -	 * to go to zero after updating db_status before we call the GuC to
> -	 * release the doorbell
> -	 */
> -	if (wait_for_us(!__doorbell_valid(client->guc, db_id), 10))
> -		WARN_ONCE(true, "Doorbell never became invalid after disable\n");
> -}
> -
> -static int create_doorbell(struct intel_guc_client *client)
> -{
> -	int ret;
> -
> -	if (WARN_ON(!has_doorbell(client)))
> -		return -ENODEV; /* internal setup error, should never happen */
> -
> -	__update_doorbell_desc(client, client->doorbell_id);
> -	__init_doorbell(client);
> -
> -	ret = __guc_allocate_doorbell(client->guc, client->stage_id);
> -	if (ret) {
> -		__fini_doorbell(client);
> -		__update_doorbell_desc(client, GUC_DOORBELL_INVALID);
> -		DRM_DEBUG_DRIVER("Couldn't create client %u doorbell: %d\n",
> -				 client->stage_id, ret);
> -		return ret;
> -	}
> -
> -	return 0;
> -}
> -
> -static int destroy_doorbell(struct intel_guc_client *client)
> -{
> -	int ret;
> -
> -	GEM_BUG_ON(!has_doorbell(client));
> -
> -	__fini_doorbell(client);
> -	ret = __guc_deallocate_doorbell(client->guc, client->stage_id);
> -	if (ret)
> -		DRM_ERROR("Couldn't destroy client %u doorbell: %d\n",
> -			  client->stage_id, ret);
> -
> -	__update_doorbell_desc(client, GUC_DOORBELL_INVALID);
> -
> -	return ret;
> -}
> -
> -static unsigned long __select_cacheline(struct intel_guc *guc)
> -{
> -	unsigned long offset;
> -
> -	/* Doorbell uses a single cache line within a page */
> -	offset = offset_in_page(guc->db_cacheline);
> -
> -	/* Moving to next cache line to reduce contention */
> -	guc->db_cacheline += cache_line_size();
> -
> -	DRM_DEBUG_DRIVER("reserved cacheline 0x%lx, next 0x%x, linesize %u\n",
> -			 offset, guc->db_cacheline, cache_line_size());
> -	return offset;
> -}
> -
>   static inline struct guc_process_desc *
>   __get_process_desc(struct intel_guc_client *client)
>   {
> -	return client->vaddr + client->proc_desc_offset;
> +	return client->vaddr;
>   }
>   
>   /*
> @@ -332,8 +148,8 @@ static void guc_stage_desc_pool_destroy(struct intel_guc *guc)
>    * Initialise/clear the stage descriptor shared with the GuC firmware.
>    *
>    * This descriptor tells the GuC where (in GGTT space) to find the important
> - * data structures relating to this client (doorbell, process descriptor,
> - * write queue, etc).
> + * data structures relating to this client (process descriptor, write queue,
> + * etc).
>    */
>   static void guc_stage_desc_init(struct intel_guc_client *client)
>   {
> @@ -350,19 +166,14 @@ static void guc_stage_desc_init(struct intel_guc_client *client)
>   		desc->attribute |= GUC_STAGE_DESC_ATTR_PREEMPT;
>   	desc->stage_id = client->stage_id;
>   	desc->priority = client->priority;
> -	desc->db_id = client->doorbell_id;
>   
>   	/*
> -	 * The doorbell, process descriptor, and workqueue are all parts
> -	 * of the client object, which the GuC will reference via the GGTT
> +	 * The process descriptor and workqueue are all parts of the client
> +	 * object, which the GuC will reference via the GGTT
>   	 */
>   	gfx_addr = intel_guc_ggtt_offset(guc, client->vma);
> -	desc->db_trigger_phy = sg_dma_address(client->vma->pages->sgl) +
> -				client->doorbell_offset;
> -	desc->db_trigger_cpu = ptr_to_u64(__get_doorbell(client));
> -	desc->db_trigger_uk = gfx_addr + client->doorbell_offset;
> -	desc->process_desc = gfx_addr + client->proc_desc_offset;
> -	desc->wq_addr = gfx_addr + GUC_DB_SIZE;
> +	desc->process_desc = gfx_addr;
> +	desc->wq_addr = gfx_addr + GUC_PD_SIZE;
>   	desc->wq_size = GUC_WQ_SIZE;
>   
>   	desc->desc_private = ptr_to_u64(client);
> @@ -408,48 +219,23 @@ static void guc_wq_item_append(struct intel_guc_client *client,
>   			      GUC_WQ_SIZE) < wqi_size);
>   	GEM_BUG_ON(wq_off & (wqi_size - 1));
>   
> -	/* WQ starts from the page after doorbell / process_desc */
> -	wqi = client->vaddr + wq_off + GUC_DB_SIZE;
> -
> -	if (I915_SELFTEST_ONLY(client->use_nop_wqi)) {
> -		wqi->header = WQ_TYPE_NOOP | (wqi_len << WQ_LEN_SHIFT);
> -	} else {
> -		/* Now fill in the 4-word work queue item */
> -		wqi->header = WQ_TYPE_INORDER |
> -			      (wqi_len << WQ_LEN_SHIFT) |
> -			      (target_engine << WQ_TARGET_SHIFT) |
> -			      WQ_NO_WCFLUSH_WAIT;
> -		wqi->context_desc = context_desc;
> -		wqi->submit_element_info = ring_tail << WQ_RING_TAIL_SHIFT;
> -		GEM_BUG_ON(ring_tail > WQ_RING_TAIL_MAX);
> -		wqi->fence_id = fence_id;
> -	}
> +	/* WQ starts from the page after process_desc */
> +	wqi = client->vaddr + wq_off + GUC_PD_SIZE;
> +
> +	/* Now fill in the 4-word work queue item */
> +	wqi->header = WQ_TYPE_INORDER |
> +		      (wqi_len << WQ_LEN_SHIFT) |
> +		      (target_engine << WQ_TARGET_SHIFT) |
> +		      WQ_NO_WCFLUSH_WAIT;
> +	wqi->context_desc = context_desc;
> +	wqi->submit_element_info = ring_tail << WQ_RING_TAIL_SHIFT;
> +	GEM_BUG_ON(ring_tail > WQ_RING_TAIL_MAX);
> +	wqi->fence_id = fence_id;
>   
>   	/* Make the update visible to GuC */
>   	WRITE_ONCE(desc->tail, (wq_off + wqi_size) & (GUC_WQ_SIZE - 1));
>   }
>   
> -static void guc_ring_doorbell(struct intel_guc_client *client)
> -{
> -	struct guc_doorbell_info *db;
> -	u32 cookie;
> -
> -	lockdep_assert_held(&client->wq_lock);
> -
> -	/* pointer of current doorbell cacheline */
> -	db = __get_doorbell(client);
> -
> -	/*
> -	 * We're not expecting the doorbell cookie to change behind our back,
> -	 * we also need to treat 0 as a reserved value.
> -	 */
> -	cookie = READ_ONCE(db->cookie);
> -	WARN_ON_ONCE(xchg(&db->cookie, cookie + 1 ?: cookie + 2) != cookie);
> -
> -	/* XXX: doorbell was lost and need to acquire it again */
> -	GEM_BUG_ON(db->db_status != GUC_DOORBELL_ENABLED);
> -}
> -
>   static void guc_add_request(struct intel_guc *guc, struct i915_request *rq)
>   {
>   	struct intel_guc_client *client = guc->execbuf_client;
> @@ -459,7 +245,6 @@ static void guc_add_request(struct intel_guc *guc, struct i915_request *rq)
>   
>   	guc_wq_item_append(client, engine->guc_id, ctx_desc,
>   			   ring_tail, rq->fence.seqno);
> -	guc_ring_doorbell(client);
>   }
>   
>   /*
> @@ -744,36 +529,6 @@ static void guc_reset_finish(struct intel_engine_cs *engine)
>    * path of guc_submit() above.
>    */
>   
> -/* Check that a doorbell register is in the expected state */
> -static bool doorbell_ok(struct intel_guc *guc, u16 db_id)
> -{
> -	bool valid;
> -
> -	GEM_BUG_ON(db_id >= GUC_NUM_DOORBELLS);
> -
> -	valid = __doorbell_valid(guc, db_id);
> -
> -	if (test_bit(db_id, guc->doorbell_bitmap) == valid)
> -		return true;
> -
> -	DRM_DEBUG_DRIVER("Doorbell %u has unexpected state: valid=%s\n",
> -			 db_id, yesno(valid));
> -
> -	return false;
> -}
> -
> -static bool guc_verify_doorbells(struct intel_guc *guc)
> -{
> -	bool doorbells_ok = true;
> -	u16 db_id;
> -
> -	for (db_id = 0; db_id < GUC_NUM_DOORBELLS; ++db_id)
> -		if (!doorbell_ok(guc, db_id))
> -			doorbells_ok = false;
> -
> -	return doorbells_ok;
> -}
> -
>   /**
>    * guc_client_alloc() - Allocate an intel_guc_client
>    * @guc:	the intel_guc structure
> @@ -798,7 +553,6 @@ guc_client_alloc(struct intel_guc *guc, u32 priority)
>   
>   	client->guc = guc;
>   	client->priority = priority;
> -	client->doorbell_id = GUC_DOORBELL_INVALID;
>   	spin_lock_init(&client->wq_lock);
>   
>   	ret = ida_simple_get(&guc->stage_ids, 0, GUC_MAX_STAGE_DESCRIPTORS,
> @@ -809,7 +563,7 @@ guc_client_alloc(struct intel_guc *guc, u32 priority)
>   	client->stage_id = ret;
>   
>   	/* The first page is doorbell/proc_desc. Two followed pages are wq. */
Need to update this comment as well.

> -	vma = intel_guc_allocate_vma(guc, GUC_DB_SIZE + GUC_WQ_SIZE);
> +	vma = intel_guc_allocate_vma(guc, GUC_PD_SIZE + GUC_WQ_SIZE);
>   	if (IS_ERR(vma)) {
>   		ret = PTR_ERR(vma);
>   		goto err_id;
> @@ -825,31 +579,11 @@ guc_client_alloc(struct intel_guc *guc, u32 priority)
>   	}
>   	client->vaddr = vaddr;
>   
> -	ret = reserve_doorbell(client);
> -	if (ret)
> -		goto err_vaddr;
> -
> -	client->doorbell_offset = __select_cacheline(guc);
> -
> -	/*
> -	 * Since the doorbell only requires a single cacheline, we can save
> -	 * space by putting the application process descriptor in the same
> -	 * page. Use the half of the page that doesn't include the doorbell.
> -	 */
> -	if (client->doorbell_offset >= (GUC_DB_SIZE / 2))
> -		client->proc_desc_offset = 0;
> -	else
> -		client->proc_desc_offset = (GUC_DB_SIZE / 2);
> -
>   	DRM_DEBUG_DRIVER("new priority %u client %p: stage_id %u\n",
>   			 priority, client, client->stage_id);
> -	DRM_DEBUG_DRIVER("doorbell id %u, cacheline offset 0x%lx\n",
> -			 client->doorbell_id, client->doorbell_offset);
>   
>   	return client;
>   
> -err_vaddr:
> -	i915_gem_object_unpin_map(client->vma->obj);
>   err_vma:
>   	i915_vma_unpin_and_release(&client->vma, 0);
>   err_id:
> @@ -861,7 +595,6 @@ guc_client_alloc(struct intel_guc *guc, u32 priority)
>   
>   static void guc_client_free(struct intel_guc_client *client)
>   {
> -	unreserve_doorbell(client);
>   	i915_vma_unpin_and_release(&client->vma, I915_VMA_RELEASE_MAP);
>   	ida_simple_remove(&client->guc->stage_ids, client->stage_id);
>   	kfree(client);
> @@ -892,44 +625,21 @@ static void guc_clients_destroy(struct intel_guc *guc)
>   		guc_client_free(client);
>   }
>   
> -static int __guc_client_enable(struct intel_guc_client *client)
> +static void __guc_client_enable(struct intel_guc_client *client)
>   {
> -	int ret;
> -
>   	guc_proc_desc_init(client);
>   	guc_stage_desc_init(client);
> -
> -	ret = create_doorbell(client);
> -	if (ret)
> -		goto fail;
> -
> -	return 0;
> -
> -fail:
> -	guc_stage_desc_fini(client);
> -	guc_proc_desc_fini(client);
> -	return ret;
>   }
>   
>   static void __guc_client_disable(struct intel_guc_client *client)
>   {
> -	/*
> -	 * By the time we're here, GuC may have already been reset. if that is
> -	 * the case, instead of trying (in vain) to communicate with it, let's
> -	 * just cleanup the doorbell HW and our internal state.
> -	 */
This comment should be kept, only dropping the 'doorell HW and' phrase?

> -	if (intel_guc_is_running(client->guc))
> -		destroy_doorbell(client);
> -	else
> -		__fini_doorbell(client);
> -
>   	guc_stage_desc_fini(client);
>   	guc_proc_desc_fini(client);
>   }
>   
> -static int guc_clients_enable(struct intel_guc *guc)
> +static void guc_clients_enable(struct intel_guc *guc)
>   {
> -	return __guc_client_enable(guc->execbuf_client);
> +	__guc_client_enable(guc->execbuf_client);
>   }
>   
This seems like a pretty pointless wrapper. I'm guessing there was a 
mutex lock or something in here originally? Maybe time to drop the '__' 
version and just move the actual work into this function?

Otherwise, looks good to me. So with some corrected comments:
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>

>   static void guc_clients_disable(struct intel_guc *guc)
> @@ -958,7 +668,6 @@ int intel_guc_submission_init(struct intel_guc *guc)
>   	 */
>   	GEM_BUG_ON(!guc->stage_desc_pool);
>   
> -	WARN_ON(!guc_verify_doorbells(guc));
>   	ret = guc_clients_create(guc);
>   	if (ret)
>   		goto err_pool;
> @@ -973,7 +682,6 @@ int intel_guc_submission_init(struct intel_guc *guc)
>   void intel_guc_submission_fini(struct intel_guc *guc)
>   {
>   	guc_clients_destroy(guc);
> -	WARN_ON(!guc_verify_doorbells(guc));
>   
>   	if (guc->stage_desc_pool)
>   		guc_stage_desc_pool_destroy(guc);
> @@ -1089,16 +797,11 @@ static void guc_set_default_submission(struct intel_engine_cs *engine)
>   	GEM_BUG_ON(engine->irq_enable || engine->irq_disable);
>   }
>   
> -int intel_guc_submission_enable(struct intel_guc *guc)
> +void intel_guc_submission_enable(struct intel_guc *guc)
>   {
>   	struct intel_gt *gt = guc_to_gt(guc);
>   	struct intel_engine_cs *engine;
>   	enum intel_engine_id id;
> -	int err;
> -
> -	err = i915_inject_probe_error(gt->i915, -ENXIO);
> -	if (err)
> -		return err;
>   
>   	/*
>   	 * We're using GuC work items for submitting work through GuC. Since
> @@ -1115,9 +818,7 @@ int intel_guc_submission_enable(struct intel_guc *guc)
>   
>   	GEM_BUG_ON(!guc->execbuf_client);
>   
> -	err = guc_clients_enable(guc);
> -	if (err)
> -		return err;
> +	guc_clients_enable(guc);
>   
>   	/* Take over from manual control of ELSP (execlists) */
>   	guc_interrupts_capture(gt);
> @@ -1126,8 +827,6 @@ int intel_guc_submission_enable(struct intel_guc *guc)
>   		engine->set_default_submission = guc_set_default_submission;
>   		engine->set_default_submission(engine);
>   	}
> -
> -	return 0;
>   }
>   
>   void intel_guc_submission_disable(struct intel_guc *guc)
> @@ -1155,7 +854,3 @@ void intel_guc_submission_init_early(struct intel_guc *guc)
>   {
>   	guc->submission_supported = __guc_submission_support(guc);
>   }
> -
> -#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
> -#include "selftest_guc.c"
> -#endif
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> index 54d716828352..e2deb4e6f42a 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> @@ -44,21 +44,14 @@ struct intel_guc_client {
>   	/* bitmap of (host) engine ids */
>   	u32 priority;
>   	u32 stage_id;
> -	u32 proc_desc_offset;
> -
> -	u16 doorbell_id;
> -	unsigned long doorbell_offset;
>   
>   	/* Protects GuC client's WQ access */
>   	spinlock_t wq_lock;
> -
> -	/* For testing purposes, use nop WQ items instead of real ones */
> -	I915_SELFTEST_DECLARE(bool use_nop_wqi);
>   };
>   
>   void intel_guc_submission_init_early(struct intel_guc *guc);
>   int intel_guc_submission_init(struct intel_guc *guc);
> -int intel_guc_submission_enable(struct intel_guc *guc);
> +void intel_guc_submission_enable(struct intel_guc *guc);
>   void intel_guc_submission_disable(struct intel_guc *guc);
>   void intel_guc_submission_fini(struct intel_guc *guc);
>   int intel_guc_preempt_work_create(struct intel_guc *guc);
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> index 629b19377a29..c6519066a0f6 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> @@ -486,11 +486,8 @@ int intel_uc_init_hw(struct intel_uc *uc)
>   	if (ret)
>   		goto err_communication;
>   
> -	if (intel_uc_supports_guc_submission(uc)) {
> -		ret = intel_guc_submission_enable(guc);
> -		if (ret)
> -			goto err_communication;
> -	}
> +	if (intel_uc_supports_guc_submission(uc))
> +		intel_guc_submission_enable(guc);
>   
>   	dev_info(i915->drm.dev, "%s firmware %s version %u.%u %s:%s\n",
>   		 intel_uc_fw_type_repr(INTEL_UC_FW_TYPE_GUC), guc->fw.path,
> diff --git a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c b/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
> deleted file mode 100644
> index d8a80388bd31..000000000000
> --- a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
> +++ /dev/null
> @@ -1,299 +0,0 @@
> -// SPDX-License-Identifier: MIT
> -/*
> - * Copyright © 2017 Intel Corporation
> - */
> -
> -#include "i915_selftest.h"
> -#include "gem/i915_gem_pm.h"
> -
> -/* max doorbell number + negative test for each client type */
> -#define ATTEMPTS (GUC_NUM_DOORBELLS + GUC_CLIENT_PRIORITY_NUM)
> -
> -static struct intel_guc_client *clients[ATTEMPTS];
> -
> -static bool available_dbs(struct intel_guc *guc, u32 priority)
> -{
> -	unsigned long offset;
> -	unsigned long end;
> -	u16 id;
> -
> -	/* first half is used for normal priority, second half for high */
> -	offset = 0;
> -	end = GUC_NUM_DOORBELLS / 2;
> -	if (priority <= GUC_CLIENT_PRIORITY_HIGH) {
> -		offset = end;
> -		end += offset;
> -	}
> -
> -	id = find_next_zero_bit(guc->doorbell_bitmap, end, offset);
> -	if (id < end)
> -		return true;
> -
> -	return false;
> -}
> -
> -static int check_all_doorbells(struct intel_guc *guc)
> -{
> -	u16 db_id;
> -
> -	pr_info_once("Max number of doorbells: %d", GUC_NUM_DOORBELLS);
> -	for (db_id = 0; db_id < GUC_NUM_DOORBELLS; ++db_id) {
> -		if (!doorbell_ok(guc, db_id)) {
> -			pr_err("doorbell %d, not ok\n", db_id);
> -			return -EIO;
> -		}
> -	}
> -
> -	return 0;
> -}
> -
> -static int ring_doorbell_nop(struct intel_guc_client *client)
> -{
> -	struct guc_process_desc *desc = __get_process_desc(client);
> -	int err;
> -
> -	client->use_nop_wqi = true;
> -
> -	spin_lock_irq(&client->wq_lock);
> -
> -	guc_wq_item_append(client, 0, 0, 0, 0);
> -	guc_ring_doorbell(client);
> -
> -	spin_unlock_irq(&client->wq_lock);
> -
> -	client->use_nop_wqi = false;
> -
> -	/* if there are no issues GuC will update the WQ head and keep the
> -	 * WQ in active status
> -	 */
> -	err = wait_for(READ_ONCE(desc->head) == READ_ONCE(desc->tail), 10);
> -	if (err) {
> -		pr_err("doorbell %u ring failed!\n", client->doorbell_id);
> -		return -EIO;
> -	}
> -
> -	if (desc->wq_status != WQ_STATUS_ACTIVE) {
> -		pr_err("doorbell %u ring put WQ in bad state (%u)!\n",
> -		       client->doorbell_id, desc->wq_status);
> -		return -EIO;
> -	}
> -
> -	return 0;
> -}
> -
> -/*
> - * Basic client sanity check, handy to validate create_clients.
> - */
> -static int validate_client(struct intel_guc_client *client, int client_priority)
> -{
> -	if (client->priority != client_priority ||
> -	    client->doorbell_id == GUC_DOORBELL_INVALID)
> -		return -EINVAL;
> -	else
> -		return 0;
> -}
> -
> -static bool client_doorbell_in_sync(struct intel_guc_client *client)
> -{
> -	return !client || doorbell_ok(client->guc, client->doorbell_id);
> -}
> -
> -/*
> - * Check that we're able to synchronize guc_clients with their doorbells
> - *
> - * We're creating clients and reserving doorbells once, at module load. During
> - * module lifetime, GuC, doorbell HW, and i915 state may go out of sync due to
> - * GuC being reset. In other words - GuC clients are still around, but the
> - * status of their doorbells may be incorrect. This is the reason behind
> - * validating that the doorbells status expected by the driver matches what the
> - * GuC/HW have.
> - */
> -static int igt_guc_clients(void *arg)
> -{
> -	struct intel_gt *gt = arg;
> -	struct intel_guc *guc = &gt->uc.guc;
> -	intel_wakeref_t wakeref;
> -	int err = 0;
> -
> -	GEM_BUG_ON(!HAS_GT_UC(gt->i915));
> -	wakeref = intel_runtime_pm_get(gt->uncore->rpm);
> -
> -	err = check_all_doorbells(guc);
> -	if (err)
> -		goto unlock;
> -
> -	/*
> -	 * Get rid of clients created during driver load because the test will
> -	 * recreate them.
> -	 */
> -	guc_clients_disable(guc);
> -	guc_clients_destroy(guc);
> -	if (guc->execbuf_client) {
> -		pr_err("guc_clients_destroy lied!\n");
> -		err = -EINVAL;
> -		goto unlock;
> -	}
> -
> -	err = guc_clients_create(guc);
> -	if (err) {
> -		pr_err("Failed to create clients\n");
> -		goto unlock;
> -	}
> -	GEM_BUG_ON(!guc->execbuf_client);
> -
> -	err = validate_client(guc->execbuf_client,
> -			      GUC_CLIENT_PRIORITY_KMD_NORMAL);
> -	if (err) {
> -		pr_err("execbug client validation failed\n");
> -		goto out;
> -	}
> -
> -	/* the client should now have reserved a doorbell */
> -	if (!has_doorbell(guc->execbuf_client)) {
> -		pr_err("guc_clients_create didn't reserve doorbells\n");
> -		err = -EINVAL;
> -		goto out;
> -	}
> -
> -	/* Now enable the clients */
> -	guc_clients_enable(guc);
> -
> -	/* each client should now have received a doorbell */
> -	if (!client_doorbell_in_sync(guc->execbuf_client)) {
> -		pr_err("failed to initialize the doorbells\n");
> -		err = -EINVAL;
> -		goto out;
> -	}
> -
> -	/*
> -	 * Basic test - an attempt to reallocate a valid doorbell to the
> -	 * client it is currently assigned should not cause a failure.
> -	 */
> -	err = create_doorbell(guc->execbuf_client);
> -
> -out:
> -	/*
> -	 * Leave clean state for other test, plus the driver always destroy the
> -	 * clients during unload.
> -	 */
> -	guc_clients_disable(guc);
> -	guc_clients_destroy(guc);
> -	guc_clients_create(guc);
> -	guc_clients_enable(guc);
> -unlock:
> -	intel_runtime_pm_put(gt->uncore->rpm, wakeref);
> -	return err;
> -}
> -
> -/*
> - * Create as many clients as number of doorbells. Note that there's already
> - * client(s)/doorbell(s) created during driver load, but this test creates
> - * its own and do not interact with the existing ones.
> - */
> -static int igt_guc_doorbells(void *arg)
> -{
> -	struct intel_gt *gt = arg;
> -	struct intel_guc *guc = &gt->uc.guc;
> -	intel_wakeref_t wakeref;
> -	int i, err = 0;
> -	u16 db_id;
> -
> -	GEM_BUG_ON(!HAS_GT_UC(gt->i915));
> -	wakeref = intel_runtime_pm_get(gt->uncore->rpm);
> -
> -	err = check_all_doorbells(guc);
> -	if (err)
> -		goto unlock;
> -
> -	for (i = 0; i < ATTEMPTS; i++) {
> -		clients[i] = guc_client_alloc(guc, i % GUC_CLIENT_PRIORITY_NUM);
> -
> -		if (!clients[i]) {
> -			pr_err("[%d] No guc client\n", i);
> -			err = -EINVAL;
> -			goto out;
> -		}
> -
> -		if (IS_ERR(clients[i])) {
> -			if (PTR_ERR(clients[i]) != -ENOSPC) {
> -				pr_err("[%d] unexpected error\n", i);
> -				err = PTR_ERR(clients[i]);
> -				goto out;
> -			}
> -
> -			if (available_dbs(guc, i % GUC_CLIENT_PRIORITY_NUM)) {
> -				pr_err("[%d] non-db related alloc fail\n", i);
> -				err = -EINVAL;
> -				goto out;
> -			}
> -
> -			/* expected, ran out of dbs for this client type */
> -			continue;
> -		}
> -
> -		/*
> -		 * The check below is only valid because we keep a doorbell
> -		 * assigned during the whole life of the client.
> -		 */
> -		if (clients[i]->stage_id >= GUC_NUM_DOORBELLS) {
> -			pr_err("[%d] more clients than doorbells (%d >= %d)\n",
> -			       i, clients[i]->stage_id, GUC_NUM_DOORBELLS);
> -			err = -EINVAL;
> -			goto out;
> -		}
> -
> -		err = validate_client(clients[i], i % GUC_CLIENT_PRIORITY_NUM);
> -		if (err) {
> -			pr_err("[%d] client_alloc sanity check failed!\n", i);
> -			err = -EINVAL;
> -			goto out;
> -		}
> -
> -		db_id = clients[i]->doorbell_id;
> -
> -		err = __guc_client_enable(clients[i]);
> -		if (err) {
> -			pr_err("[%d] Failed to create a doorbell\n", i);
> -			goto out;
> -		}
> -
> -		/* doorbell id shouldn't change, we are holding the mutex */
> -		if (db_id != clients[i]->doorbell_id) {
> -			pr_err("[%d] doorbell id changed (%d != %d)\n",
> -			       i, db_id, clients[i]->doorbell_id);
> -			err = -EINVAL;
> -			goto out;
> -		}
> -
> -		err = check_all_doorbells(guc);
> -		if (err)
> -			goto out;
> -
> -		err = ring_doorbell_nop(clients[i]);
> -		if (err)
> -			goto out;
> -	}
> -
> -out:
> -	for (i = 0; i < ATTEMPTS; i++)
> -		if (!IS_ERR_OR_NULL(clients[i])) {
> -			__guc_client_disable(clients[i]);
> -			guc_client_free(clients[i]);
> -		}
> -unlock:
> -	intel_runtime_pm_put(gt->uncore->rpm, wakeref);
> -	return err;
> -}
> -
> -int intel_guc_live_selftest(struct drm_i915_private *i915)
> -{
> -	static const struct i915_subtest tests[] = {
> -		SUBTEST(igt_guc_clients),
> -		SUBTEST(igt_guc_doorbells),
> -	};
> -
> -	if (!USES_GUC_SUBMISSION(i915))
> -		return 0;
> -
> -	return intel_gt_live_subtests(tests, &i915->gt);
> -}
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index cab632791f73..5d5974e7f3ed 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1815,17 +1815,10 @@ static int i915_guc_info(struct seq_file *m, void *data)
>   
>   	GEM_BUG_ON(!guc->execbuf_client);
>   
> -	seq_printf(m, "\nDoorbell map:\n");
> -	seq_printf(m, "\t%*pb\n", GUC_NUM_DOORBELLS, guc->doorbell_bitmap);
> -	seq_printf(m, "Doorbell next cacheline: 0x%x\n", guc->db_cacheline);
> -
>   	seq_printf(m, "\nGuC execbuf client @ %p:\n", client);
> -	seq_printf(m, "\tPriority %d, GuC stage index: %u, PD offset 0x%x\n",
> +	seq_printf(m, "\tPriority %d, GuC stage index: %u\n",
>   		   client->priority,
> -		   client->stage_id,
> -		   client->proc_desc_offset);
> -	seq_printf(m, "\tDoorbell id %d, offset: 0x%lx\n",
> -		   client->doorbell_id, client->doorbell_offset);
> +		   client->stage_id);
>   	/* Add more as required ... */
>   
>   	return 0;
> diff --git a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
> index 4b3cac73e291..fb03f8a90cac 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
> +++ b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
> @@ -36,5 +36,4 @@ selftest(reset, intel_reset_live_selftests)
>   selftest(memory_region, intel_memory_region_live_selftests)
>   selftest(hangcheck, intel_hangcheck_live_selftests)
>   selftest(execlists, intel_execlists_live_selftests)
> -selftest(guc, intel_guc_live_selftest)
>   selftest(perf, i915_perf_live_selftests)

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Re: [Intel-gfx] [PATCH 3/4] drm/i915/guc: kill doorbell code and selftests

[John Harrison]

On 11/6/2019 14:25, Daniele Ceraolo Spurio wrote:
> Instead of relying on the workqueue, the upcoming reworked GuC
> submission flow will offer the host driver indipendent control over
independent

> the execution status of each context submitted to GuC. As part of this,
> the doorbell usage model has been reworked, with each doorbell being
> paired to a single lrc and a doorbell ring representing new work
> available for that specific context. This mechanism, however, limits
> the number of contexts that can be registered with GuC to the number of
> doorbells, which is an undesired limitation. Luckily, GuC will also
Not exactly 'luckily'. More a case of, we said the doorbells won't work 
for linux so can we have a H2G instead and they listened.

> provide a H2G that will allow the host to notify the GuC of work
> available for a specified lrc, so we can use that mechanism instead of
> relying on the doorbells. We can therefore drop the doorbell code we
> currently have, also given the fact that in the unlikely case we'd want
> to switch back to using doorbells we'd have to heavily rework it.
> The workqueue will still have a use in the new interface to pass special
> commands, so that code has been retained for now.
>
> With the doorbells gone and the GuC client becoming even simpler, the
> existing GuC selftests don't give us any meaningful coverage so we can
> remove them as well. Some selftests might come with the new code, but
> they will look different from what we have now so if doesn't seem worth
> it to keep the file around in the meantime.
>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> ---
>   drivers/gpu/drm/i915/gt/uc/intel_guc.h        |   8 +-
>   drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |   2 +-
>   .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 373 ++----------------
>   .../gpu/drm/i915/gt/uc/intel_guc_submission.h |   9 +-
>   drivers/gpu/drm/i915/gt/uc/intel_uc.c         |   7 +-
>   drivers/gpu/drm/i915/gt/uc/selftest_guc.c     | 299 --------------
>   drivers/gpu/drm/i915/i915_debugfs.c           |  11 +-
>   .../drm/i915/selftests/i915_live_selftests.h  |   1 -
>   8 files changed, 42 insertions(+), 668 deletions(-)
>   delete mode 100644 drivers/gpu/drm/i915/gt/uc/selftest_guc.c
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> index bf438f820c35..b2d1766e689a 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> @@ -20,8 +20,8 @@ struct __guc_ads_blob;
>   
>   /*
>    * Top level structure of GuC. It handles firmware loading and manages client
> - * pool and doorbells. intel_guc owns a intel_guc_client to replace the legacy
> - * ExecList submission.
> + * pool. intel_guc owns a intel_guc_client to replace the legacy ExecList
> + * submission.
>    */
>   struct intel_guc {
>   	struct intel_uc_fw fw;
> @@ -50,10 +50,6 @@ struct intel_guc {
>   
>   	struct intel_guc_client *execbuf_client;
>   
> -	DECLARE_BITMAP(doorbell_bitmap, GUC_NUM_DOORBELLS);
> -	/* Cyclic counter mod pagesize	*/
> -	u32 db_cacheline;
> -
>   	/* Control params for fw initialization */
>   	u32 params[GUC_CTL_MAX_DWORDS];
>   
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> index a26a85d50209..1e8e4af7d9ca 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> @@ -31,7 +31,7 @@
>   
>   #define GUC_DOORBELL_INVALID		256
>   
> -#define GUC_DB_SIZE			(PAGE_SIZE)
> +#define GUC_PD_SIZE			(PAGE_SIZE)
>   #define GUC_WQ_SIZE			(PAGE_SIZE * 2)
>   
>   /* Work queue item header definitions */
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> index 6ac213ddbfa3..0088c3417641 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> @@ -30,8 +30,8 @@
>    * GuC client:
>    * A intel_guc_client refers to a submission path through GuC. Currently, there
>    * is only one client, which is charged with all submissions to the GuC. This
> - * struct is the owner of a doorbell, a process descriptor and a workqueue (all
> - * of them inside a single gem object that contains all required pages for these
> + * struct is the owner of a process descriptor and a workqueue (both of them
> + * inside a single gem object that contains all required pages for these
>    * elements).
>    *
>    * GuC stage descriptor:
> @@ -39,13 +39,13 @@
>    * descriptors, and shares them with the GuC.
>    * Currently, there exists a 1:1 mapping between a intel_guc_client and a
>    * guc_stage_desc (via the client's stage_id), so effectively only one
> - * gets used. This stage descriptor lets the GuC know about the doorbell,
> - * workqueue and process descriptor. Theoretically, it also lets the GuC
> - * know about our HW contexts (context ID, etc...), but we actually
> - * employ a kind of submission where the GuC uses the LRCA sent via the work
> - * item instead (the single guc_stage_desc associated to execbuf client
> - * contains information about the default kernel context only, but this is
> - * essentially unused). This is called a "proxy" submission.
> + * gets used. This stage descriptor lets the GuC know about the workqueue and
> + * process descriptor. Theoretically, it also lets the GuC know about our HW
> + * contexts (context ID, etc...), but we actually employ a kind of submission
> + * where the GuC uses the LRCA sent via the work item instead (the single
> + * guc_stage_desc associated to execbuf client contains information about the
> + * default kernel context only, but this is essentially unused). This is called
> + * a "proxy" submission.
>    *
>    * The Scratch registers:
>    * There are 16 MMIO-based registers start from 0xC180. The kernel driver writes
> @@ -56,10 +56,6 @@
>    * then proceeds.
>    * See intel_guc_send()
>    *
> - * Doorbells:
> - * Doorbells are interrupts to uKernel. A doorbell is a single cache line (QW)
> - * mapped into process space.
> - *
>    * Work Items:
>    * There are several types of work items that the host may place into a
>    * workqueue, each with its own requirements and limitations. Currently only
> @@ -81,78 +77,6 @@ static inline bool is_high_priority(struct intel_guc_client *client)
>   		client->priority == GUC_CLIENT_PRIORITY_HIGH);
>   }
>   
> -static int reserve_doorbell(struct intel_guc_client *client)
> -{
> -	unsigned long offset;
> -	unsigned long end;
> -	u16 id;
> -
> -	GEM_BUG_ON(client->doorbell_id != GUC_DOORBELL_INVALID);
> -
> -	/*
> -	 * The bitmap tracks which doorbell registers are currently in use.
> -	 * It is split into two halves; the first half is used for normal
> -	 * priority contexts, the second half for high-priority ones.
> -	 */
> -	offset = 0;
> -	end = GUC_NUM_DOORBELLS / 2;
> -	if (is_high_priority(client)) {
> -		offset = end;
> -		end += offset;
> -	}
> -
> -	id = find_next_zero_bit(client->guc->doorbell_bitmap, end, offset);
> -	if (id == end)
> -		return -ENOSPC;
> -
> -	__set_bit(id, client->guc->doorbell_bitmap);
> -	client->doorbell_id = id;
> -	DRM_DEBUG_DRIVER("client %u (high prio=%s) reserved doorbell: %d\n",
> -			 client->stage_id, yesno(is_high_priority(client)),
> -			 id);
> -	return 0;
> -}
> -
> -static bool has_doorbell(struct intel_guc_client *client)
> -{
> -	if (client->doorbell_id == GUC_DOORBELL_INVALID)
> -		return false;
> -
> -	return test_bit(client->doorbell_id, client->guc->doorbell_bitmap);
> -}
> -
> -static void unreserve_doorbell(struct intel_guc_client *client)
> -{
> -	GEM_BUG_ON(!has_doorbell(client));
> -
> -	__clear_bit(client->doorbell_id, client->guc->doorbell_bitmap);
> -	client->doorbell_id = GUC_DOORBELL_INVALID;
> -}
> -
> -/*
> - * Tell the GuC to allocate or deallocate a specific doorbell
> - */
> -
> -static int __guc_allocate_doorbell(struct intel_guc *guc, u32 stage_id)
> -{
> -	u32 action[] = {
> -		INTEL_GUC_ACTION_ALLOCATE_DOORBELL,
> -		stage_id
> -	};
> -
> -	return intel_guc_send(guc, action, ARRAY_SIZE(action));
> -}
> -
> -static int __guc_deallocate_doorbell(struct intel_guc *guc, u32 stage_id)
> -{
> -	u32 action[] = {
> -		INTEL_GUC_ACTION_DEALLOCATE_DOORBELL,
> -		stage_id
> -	};
> -
> -	return intel_guc_send(guc, action, ARRAY_SIZE(action));
> -}
> -
>   static struct guc_stage_desc *__get_stage_desc(struct intel_guc_client *client)
>   {
>   	struct guc_stage_desc *base = client->guc->stage_desc_pool_vaddr;
> @@ -160,118 +84,10 @@ static struct guc_stage_desc *__get_stage_desc(struct intel_guc_client *client)
>   	return &base[client->stage_id];
>   }
>   
> -/*
> - * Initialise, update, or clear doorbell data shared with the GuC
> - *
> - * These functions modify shared data and so need access to the mapped
> - * client object which contains the page being used for the doorbell
> - */
> -
> -static void __update_doorbell_desc(struct intel_guc_client *client, u16 new_id)
> -{
> -	struct guc_stage_desc *desc;
> -
> -	/* Update the GuC's idea of the doorbell ID */
> -	desc = __get_stage_desc(client);
> -	desc->db_id = new_id;
> -}
> -
> -static struct guc_doorbell_info *__get_doorbell(struct intel_guc_client *client)
> -{
> -	return client->vaddr + client->doorbell_offset;
> -}
> -
> -static bool __doorbell_valid(struct intel_guc *guc, u16 db_id)
> -{
> -	struct intel_uncore *uncore = guc_to_gt(guc)->uncore;
> -
> -	GEM_BUG_ON(db_id >= GUC_NUM_DOORBELLS);
> -	return intel_uncore_read(uncore, GEN8_DRBREGL(db_id)) & GEN8_DRB_VALID;
> -}
> -
> -static void __init_doorbell(struct intel_guc_client *client)
> -{
> -	struct guc_doorbell_info *doorbell;
> -
> -	doorbell = __get_doorbell(client);
> -	doorbell->db_status = GUC_DOORBELL_ENABLED;
> -	doorbell->cookie = 0;
> -}
> -
> -static void __fini_doorbell(struct intel_guc_client *client)
> -{
> -	struct guc_doorbell_info *doorbell;
> -	u16 db_id = client->doorbell_id;
> -
> -	doorbell = __get_doorbell(client);
> -	doorbell->db_status = GUC_DOORBELL_DISABLED;
> -
> -	/* Doorbell release flow requires that we wait for GEN8_DRB_VALID bit
> -	 * to go to zero after updating db_status before we call the GuC to
> -	 * release the doorbell
> -	 */
> -	if (wait_for_us(!__doorbell_valid(client->guc, db_id), 10))
> -		WARN_ONCE(true, "Doorbell never became invalid after disable\n");
> -}
> -
> -static int create_doorbell(struct intel_guc_client *client)
> -{
> -	int ret;
> -
> -	if (WARN_ON(!has_doorbell(client)))
> -		return -ENODEV; /* internal setup error, should never happen */
> -
> -	__update_doorbell_desc(client, client->doorbell_id);
> -	__init_doorbell(client);
> -
> -	ret = __guc_allocate_doorbell(client->guc, client->stage_id);
> -	if (ret) {
> -		__fini_doorbell(client);
> -		__update_doorbell_desc(client, GUC_DOORBELL_INVALID);
> -		DRM_DEBUG_DRIVER("Couldn't create client %u doorbell: %d\n",
> -				 client->stage_id, ret);
> -		return ret;
> -	}
> -
> -	return 0;
> -}
> -
> -static int destroy_doorbell(struct intel_guc_client *client)
> -{
> -	int ret;
> -
> -	GEM_BUG_ON(!has_doorbell(client));
> -
> -	__fini_doorbell(client);
> -	ret = __guc_deallocate_doorbell(client->guc, client->stage_id);
> -	if (ret)
> -		DRM_ERROR("Couldn't destroy client %u doorbell: %d\n",
> -			  client->stage_id, ret);
> -
> -	__update_doorbell_desc(client, GUC_DOORBELL_INVALID);
> -
> -	return ret;
> -}
> -
> -static unsigned long __select_cacheline(struct intel_guc *guc)
> -{
> -	unsigned long offset;
> -
> -	/* Doorbell uses a single cache line within a page */
> -	offset = offset_in_page(guc->db_cacheline);
> -
> -	/* Moving to next cache line to reduce contention */
> -	guc->db_cacheline += cache_line_size();
> -
> -	DRM_DEBUG_DRIVER("reserved cacheline 0x%lx, next 0x%x, linesize %u\n",
> -			 offset, guc->db_cacheline, cache_line_size());
> -	return offset;
> -}
> -
>   static inline struct guc_process_desc *
>   __get_process_desc(struct intel_guc_client *client)
>   {
> -	return client->vaddr + client->proc_desc_offset;
> +	return client->vaddr;
>   }
>   
>   /*
> @@ -332,8 +148,8 @@ static void guc_stage_desc_pool_destroy(struct intel_guc *guc)
>    * Initialise/clear the stage descriptor shared with the GuC firmware.
>    *
>    * This descriptor tells the GuC where (in GGTT space) to find the important
> - * data structures relating to this client (doorbell, process descriptor,
> - * write queue, etc).
> + * data structures relating to this client (process descriptor, write queue,
> + * etc).
>    */
>   static void guc_stage_desc_init(struct intel_guc_client *client)
>   {
> @@ -350,19 +166,14 @@ static void guc_stage_desc_init(struct intel_guc_client *client)
>   		desc->attribute |= GUC_STAGE_DESC_ATTR_PREEMPT;
>   	desc->stage_id = client->stage_id;
>   	desc->priority = client->priority;
> -	desc->db_id = client->doorbell_id;
>   
>   	/*
> -	 * The doorbell, process descriptor, and workqueue are all parts
> -	 * of the client object, which the GuC will reference via the GGTT
> +	 * The process descriptor and workqueue are all parts of the client
> +	 * object, which the GuC will reference via the GGTT
>   	 */
>   	gfx_addr = intel_guc_ggtt_offset(guc, client->vma);
> -	desc->db_trigger_phy = sg_dma_address(client->vma->pages->sgl) +
> -				client->doorbell_offset;
> -	desc->db_trigger_cpu = ptr_to_u64(__get_doorbell(client));
> -	desc->db_trigger_uk = gfx_addr + client->doorbell_offset;
> -	desc->process_desc = gfx_addr + client->proc_desc_offset;
> -	desc->wq_addr = gfx_addr + GUC_DB_SIZE;
> +	desc->process_desc = gfx_addr;
> +	desc->wq_addr = gfx_addr + GUC_PD_SIZE;
>   	desc->wq_size = GUC_WQ_SIZE;
>   
>   	desc->desc_private = ptr_to_u64(client);
> @@ -408,48 +219,23 @@ static void guc_wq_item_append(struct intel_guc_client *client,
>   			      GUC_WQ_SIZE) < wqi_size);
>   	GEM_BUG_ON(wq_off & (wqi_size - 1));
>   
> -	/* WQ starts from the page after doorbell / process_desc */
> -	wqi = client->vaddr + wq_off + GUC_DB_SIZE;
> -
> -	if (I915_SELFTEST_ONLY(client->use_nop_wqi)) {
> -		wqi->header = WQ_TYPE_NOOP | (wqi_len << WQ_LEN_SHIFT);
> -	} else {
> -		/* Now fill in the 4-word work queue item */
> -		wqi->header = WQ_TYPE_INORDER |
> -			      (wqi_len << WQ_LEN_SHIFT) |
> -			      (target_engine << WQ_TARGET_SHIFT) |
> -			      WQ_NO_WCFLUSH_WAIT;
> -		wqi->context_desc = context_desc;
> -		wqi->submit_element_info = ring_tail << WQ_RING_TAIL_SHIFT;
> -		GEM_BUG_ON(ring_tail > WQ_RING_TAIL_MAX);
> -		wqi->fence_id = fence_id;
> -	}
> +	/* WQ starts from the page after process_desc */
> +	wqi = client->vaddr + wq_off + GUC_PD_SIZE;
> +
> +	/* Now fill in the 4-word work queue item */
> +	wqi->header = WQ_TYPE_INORDER |
> +		      (wqi_len << WQ_LEN_SHIFT) |
> +		      (target_engine << WQ_TARGET_SHIFT) |
> +		      WQ_NO_WCFLUSH_WAIT;
> +	wqi->context_desc = context_desc;
> +	wqi->submit_element_info = ring_tail << WQ_RING_TAIL_SHIFT;
> +	GEM_BUG_ON(ring_tail > WQ_RING_TAIL_MAX);
> +	wqi->fence_id = fence_id;
>   
>   	/* Make the update visible to GuC */
>   	WRITE_ONCE(desc->tail, (wq_off + wqi_size) & (GUC_WQ_SIZE - 1));
>   }
>   
> -static void guc_ring_doorbell(struct intel_guc_client *client)
> -{
> -	struct guc_doorbell_info *db;
> -	u32 cookie;
> -
> -	lockdep_assert_held(&client->wq_lock);
> -
> -	/* pointer of current doorbell cacheline */
> -	db = __get_doorbell(client);
> -
> -	/*
> -	 * We're not expecting the doorbell cookie to change behind our back,
> -	 * we also need to treat 0 as a reserved value.
> -	 */
> -	cookie = READ_ONCE(db->cookie);
> -	WARN_ON_ONCE(xchg(&db->cookie, cookie + 1 ?: cookie + 2) != cookie);
> -
> -	/* XXX: doorbell was lost and need to acquire it again */
> -	GEM_BUG_ON(db->db_status != GUC_DOORBELL_ENABLED);
> -}
> -
>   static void guc_add_request(struct intel_guc *guc, struct i915_request *rq)
>   {
>   	struct intel_guc_client *client = guc->execbuf_client;
> @@ -459,7 +245,6 @@ static void guc_add_request(struct intel_guc *guc, struct i915_request *rq)
>   
>   	guc_wq_item_append(client, engine->guc_id, ctx_desc,
>   			   ring_tail, rq->fence.seqno);
> -	guc_ring_doorbell(client);
>   }
>   
>   /*
> @@ -744,36 +529,6 @@ static void guc_reset_finish(struct intel_engine_cs *engine)
>    * path of guc_submit() above.
>    */
>   
> -/* Check that a doorbell register is in the expected state */
> -static bool doorbell_ok(struct intel_guc *guc, u16 db_id)
> -{
> -	bool valid;
> -
> -	GEM_BUG_ON(db_id >= GUC_NUM_DOORBELLS);
> -
> -	valid = __doorbell_valid(guc, db_id);
> -
> -	if (test_bit(db_id, guc->doorbell_bitmap) == valid)
> -		return true;
> -
> -	DRM_DEBUG_DRIVER("Doorbell %u has unexpected state: valid=%s\n",
> -			 db_id, yesno(valid));
> -
> -	return false;
> -}
> -
> -static bool guc_verify_doorbells(struct intel_guc *guc)
> -{
> -	bool doorbells_ok = true;
> -	u16 db_id;
> -
> -	for (db_id = 0; db_id < GUC_NUM_DOORBELLS; ++db_id)
> -		if (!doorbell_ok(guc, db_id))
> -			doorbells_ok = false;
> -
> -	return doorbells_ok;
> -}
> -
>   /**
>    * guc_client_alloc() - Allocate an intel_guc_client
>    * @guc:	the intel_guc structure
> @@ -798,7 +553,6 @@ guc_client_alloc(struct intel_guc *guc, u32 priority)
>   
>   	client->guc = guc;
>   	client->priority = priority;
> -	client->doorbell_id = GUC_DOORBELL_INVALID;
>   	spin_lock_init(&client->wq_lock);
>   
>   	ret = ida_simple_get(&guc->stage_ids, 0, GUC_MAX_STAGE_DESCRIPTORS,
> @@ -809,7 +563,7 @@ guc_client_alloc(struct intel_guc *guc, u32 priority)
>   	client->stage_id = ret;
>   
>   	/* The first page is doorbell/proc_desc. Two followed pages are wq. */
Need to update this comment as well.

> -	vma = intel_guc_allocate_vma(guc, GUC_DB_SIZE + GUC_WQ_SIZE);
> +	vma = intel_guc_allocate_vma(guc, GUC_PD_SIZE + GUC_WQ_SIZE);
>   	if (IS_ERR(vma)) {
>   		ret = PTR_ERR(vma);
>   		goto err_id;
> @@ -825,31 +579,11 @@ guc_client_alloc(struct intel_guc *guc, u32 priority)
>   	}
>   	client->vaddr = vaddr;
>   
> -	ret = reserve_doorbell(client);
> -	if (ret)
> -		goto err_vaddr;
> -
> -	client->doorbell_offset = __select_cacheline(guc);
> -
> -	/*
> -	 * Since the doorbell only requires a single cacheline, we can save
> -	 * space by putting the application process descriptor in the same
> -	 * page. Use the half of the page that doesn't include the doorbell.
> -	 */
> -	if (client->doorbell_offset >= (GUC_DB_SIZE / 2))
> -		client->proc_desc_offset = 0;
> -	else
> -		client->proc_desc_offset = (GUC_DB_SIZE / 2);
> -
>   	DRM_DEBUG_DRIVER("new priority %u client %p: stage_id %u\n",
>   			 priority, client, client->stage_id);
> -	DRM_DEBUG_DRIVER("doorbell id %u, cacheline offset 0x%lx\n",
> -			 client->doorbell_id, client->doorbell_offset);
>   
>   	return client;
>   
> -err_vaddr:
> -	i915_gem_object_unpin_map(client->vma->obj);
>   err_vma:
>   	i915_vma_unpin_and_release(&client->vma, 0);
>   err_id:
> @@ -861,7 +595,6 @@ guc_client_alloc(struct intel_guc *guc, u32 priority)
>   
>   static void guc_client_free(struct intel_guc_client *client)
>   {
> -	unreserve_doorbell(client);
>   	i915_vma_unpin_and_release(&client->vma, I915_VMA_RELEASE_MAP);
>   	ida_simple_remove(&client->guc->stage_ids, client->stage_id);
>   	kfree(client);
> @@ -892,44 +625,21 @@ static void guc_clients_destroy(struct intel_guc *guc)
>   		guc_client_free(client);
>   }
>   
> -static int __guc_client_enable(struct intel_guc_client *client)
> +static void __guc_client_enable(struct intel_guc_client *client)
>   {
> -	int ret;
> -
>   	guc_proc_desc_init(client);
>   	guc_stage_desc_init(client);
> -
> -	ret = create_doorbell(client);
> -	if (ret)
> -		goto fail;
> -
> -	return 0;
> -
> -fail:
> -	guc_stage_desc_fini(client);
> -	guc_proc_desc_fini(client);
> -	return ret;
>   }
>   
>   static void __guc_client_disable(struct intel_guc_client *client)
>   {
> -	/*
> -	 * By the time we're here, GuC may have already been reset. if that is
> -	 * the case, instead of trying (in vain) to communicate with it, let's
> -	 * just cleanup the doorbell HW and our internal state.
> -	 */
This comment should be kept, only dropping the 'doorell HW and' phrase?

> -	if (intel_guc_is_running(client->guc))
> -		destroy_doorbell(client);
> -	else
> -		__fini_doorbell(client);
> -
>   	guc_stage_desc_fini(client);
>   	guc_proc_desc_fini(client);
>   }
>   
> -static int guc_clients_enable(struct intel_guc *guc)
> +static void guc_clients_enable(struct intel_guc *guc)
>   {
> -	return __guc_client_enable(guc->execbuf_client);
> +	__guc_client_enable(guc->execbuf_client);
>   }
>   
This seems like a pretty pointless wrapper. I'm guessing there was a 
mutex lock or something in here originally? Maybe time to drop the '__' 
version and just move the actual work into this function?

Otherwise, looks good to me. So with some corrected comments:
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>

>   static void guc_clients_disable(struct intel_guc *guc)
> @@ -958,7 +668,6 @@ int intel_guc_submission_init(struct intel_guc *guc)
>   	 */
>   	GEM_BUG_ON(!guc->stage_desc_pool);
>   
> -	WARN_ON(!guc_verify_doorbells(guc));
>   	ret = guc_clients_create(guc);
>   	if (ret)
>   		goto err_pool;
> @@ -973,7 +682,6 @@ int intel_guc_submission_init(struct intel_guc *guc)
>   void intel_guc_submission_fini(struct intel_guc *guc)
>   {
>   	guc_clients_destroy(guc);
> -	WARN_ON(!guc_verify_doorbells(guc));
>   
>   	if (guc->stage_desc_pool)
>   		guc_stage_desc_pool_destroy(guc);
> @@ -1089,16 +797,11 @@ static void guc_set_default_submission(struct intel_engine_cs *engine)
>   	GEM_BUG_ON(engine->irq_enable || engine->irq_disable);
>   }
>   
> -int intel_guc_submission_enable(struct intel_guc *guc)
> +void intel_guc_submission_enable(struct intel_guc *guc)
>   {
>   	struct intel_gt *gt = guc_to_gt(guc);
>   	struct intel_engine_cs *engine;
>   	enum intel_engine_id id;
> -	int err;
> -
> -	err = i915_inject_probe_error(gt->i915, -ENXIO);
> -	if (err)
> -		return err;
>   
>   	/*
>   	 * We're using GuC work items for submitting work through GuC. Since
> @@ -1115,9 +818,7 @@ int intel_guc_submission_enable(struct intel_guc *guc)
>   
>   	GEM_BUG_ON(!guc->execbuf_client);
>   
> -	err = guc_clients_enable(guc);
> -	if (err)
> -		return err;
> +	guc_clients_enable(guc);
>   
>   	/* Take over from manual control of ELSP (execlists) */
>   	guc_interrupts_capture(gt);
> @@ -1126,8 +827,6 @@ int intel_guc_submission_enable(struct intel_guc *guc)
>   		engine->set_default_submission = guc_set_default_submission;
>   		engine->set_default_submission(engine);
>   	}
> -
> -	return 0;
>   }
>   
>   void intel_guc_submission_disable(struct intel_guc *guc)
> @@ -1155,7 +854,3 @@ void intel_guc_submission_init_early(struct intel_guc *guc)
>   {
>   	guc->submission_supported = __guc_submission_support(guc);
>   }
> -
> -#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
> -#include "selftest_guc.c"
> -#endif
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> index 54d716828352..e2deb4e6f42a 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> @@ -44,21 +44,14 @@ struct intel_guc_client {
>   	/* bitmap of (host) engine ids */
>   	u32 priority;
>   	u32 stage_id;
> -	u32 proc_desc_offset;
> -
> -	u16 doorbell_id;
> -	unsigned long doorbell_offset;
>   
>   	/* Protects GuC client's WQ access */
>   	spinlock_t wq_lock;
> -
> -	/* For testing purposes, use nop WQ items instead of real ones */
> -	I915_SELFTEST_DECLARE(bool use_nop_wqi);
>   };
>   
>   void intel_guc_submission_init_early(struct intel_guc *guc);
>   int intel_guc_submission_init(struct intel_guc *guc);
> -int intel_guc_submission_enable(struct intel_guc *guc);
> +void intel_guc_submission_enable(struct intel_guc *guc);
>   void intel_guc_submission_disable(struct intel_guc *guc);
>   void intel_guc_submission_fini(struct intel_guc *guc);
>   int intel_guc_preempt_work_create(struct intel_guc *guc);
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> index 629b19377a29..c6519066a0f6 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> @@ -486,11 +486,8 @@ int intel_uc_init_hw(struct intel_uc *uc)
>   	if (ret)
>   		goto err_communication;
>   
> -	if (intel_uc_supports_guc_submission(uc)) {
> -		ret = intel_guc_submission_enable(guc);
> -		if (ret)
> -			goto err_communication;
> -	}
> +	if (intel_uc_supports_guc_submission(uc))
> +		intel_guc_submission_enable(guc);
>   
>   	dev_info(i915->drm.dev, "%s firmware %s version %u.%u %s:%s\n",
>   		 intel_uc_fw_type_repr(INTEL_UC_FW_TYPE_GUC), guc->fw.path,
> diff --git a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c b/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
> deleted file mode 100644
> index d8a80388bd31..000000000000
> --- a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
> +++ /dev/null
> @@ -1,299 +0,0 @@
> -// SPDX-License-Identifier: MIT
> -/*
> - * Copyright © 2017 Intel Corporation
> - */
> -
> -#include "i915_selftest.h"
> -#include "gem/i915_gem_pm.h"
> -
> -/* max doorbell number + negative test for each client type */
> -#define ATTEMPTS (GUC_NUM_DOORBELLS + GUC_CLIENT_PRIORITY_NUM)
> -
> -static struct intel_guc_client *clients[ATTEMPTS];
> -
> -static bool available_dbs(struct intel_guc *guc, u32 priority)
> -{
> -	unsigned long offset;
> -	unsigned long end;
> -	u16 id;
> -
> -	/* first half is used for normal priority, second half for high */
> -	offset = 0;
> -	end = GUC_NUM_DOORBELLS / 2;
> -	if (priority <= GUC_CLIENT_PRIORITY_HIGH) {
> -		offset = end;
> -		end += offset;
> -	}
> -
> -	id = find_next_zero_bit(guc->doorbell_bitmap, end, offset);
> -	if (id < end)
> -		return true;
> -
> -	return false;
> -}
> -
> -static int check_all_doorbells(struct intel_guc *guc)
> -{
> -	u16 db_id;
> -
> -	pr_info_once("Max number of doorbells: %d", GUC_NUM_DOORBELLS);
> -	for (db_id = 0; db_id < GUC_NUM_DOORBELLS; ++db_id) {
> -		if (!doorbell_ok(guc, db_id)) {
> -			pr_err("doorbell %d, not ok\n", db_id);
> -			return -EIO;
> -		}
> -	}
> -
> -	return 0;
> -}
> -
> -static int ring_doorbell_nop(struct intel_guc_client *client)
> -{
> -	struct guc_process_desc *desc = __get_process_desc(client);
> -	int err;
> -
> -	client->use_nop_wqi = true;
> -
> -	spin_lock_irq(&client->wq_lock);
> -
> -	guc_wq_item_append(client, 0, 0, 0, 0);
> -	guc_ring_doorbell(client);
> -
> -	spin_unlock_irq(&client->wq_lock);
> -
> -	client->use_nop_wqi = false;
> -
> -	/* if there are no issues GuC will update the WQ head and keep the
> -	 * WQ in active status
> -	 */
> -	err = wait_for(READ_ONCE(desc->head) == READ_ONCE(desc->tail), 10);
> -	if (err) {
> -		pr_err("doorbell %u ring failed!\n", client->doorbell_id);
> -		return -EIO;
> -	}
> -
> -	if (desc->wq_status != WQ_STATUS_ACTIVE) {
> -		pr_err("doorbell %u ring put WQ in bad state (%u)!\n",
> -		       client->doorbell_id, desc->wq_status);
> -		return -EIO;
> -	}
> -
> -	return 0;
> -}
> -
> -/*
> - * Basic client sanity check, handy to validate create_clients.
> - */
> -static int validate_client(struct intel_guc_client *client, int client_priority)
> -{
> -	if (client->priority != client_priority ||
> -	    client->doorbell_id == GUC_DOORBELL_INVALID)
> -		return -EINVAL;
> -	else
> -		return 0;
> -}
> -
> -static bool client_doorbell_in_sync(struct intel_guc_client *client)
> -{
> -	return !client || doorbell_ok(client->guc, client->doorbell_id);
> -}
> -
> -/*
> - * Check that we're able to synchronize guc_clients with their doorbells
> - *
> - * We're creating clients and reserving doorbells once, at module load. During
> - * module lifetime, GuC, doorbell HW, and i915 state may go out of sync due to
> - * GuC being reset. In other words - GuC clients are still around, but the
> - * status of their doorbells may be incorrect. This is the reason behind
> - * validating that the doorbells status expected by the driver matches what the
> - * GuC/HW have.
> - */
> -static int igt_guc_clients(void *arg)
> -{
> -	struct intel_gt *gt = arg;
> -	struct intel_guc *guc = &gt->uc.guc;
> -	intel_wakeref_t wakeref;
> -	int err = 0;
> -
> -	GEM_BUG_ON(!HAS_GT_UC(gt->i915));
> -	wakeref = intel_runtime_pm_get(gt->uncore->rpm);
> -
> -	err = check_all_doorbells(guc);
> -	if (err)
> -		goto unlock;
> -
> -	/*
> -	 * Get rid of clients created during driver load because the test will
> -	 * recreate them.
> -	 */
> -	guc_clients_disable(guc);
> -	guc_clients_destroy(guc);
> -	if (guc->execbuf_client) {
> -		pr_err("guc_clients_destroy lied!\n");
> -		err = -EINVAL;
> -		goto unlock;
> -	}
> -
> -	err = guc_clients_create(guc);
> -	if (err) {
> -		pr_err("Failed to create clients\n");
> -		goto unlock;
> -	}
> -	GEM_BUG_ON(!guc->execbuf_client);
> -
> -	err = validate_client(guc->execbuf_client,
> -			      GUC_CLIENT_PRIORITY_KMD_NORMAL);
> -	if (err) {
> -		pr_err("execbug client validation failed\n");
> -		goto out;
> -	}
> -
> -	/* the client should now have reserved a doorbell */
> -	if (!has_doorbell(guc->execbuf_client)) {
> -		pr_err("guc_clients_create didn't reserve doorbells\n");
> -		err = -EINVAL;
> -		goto out;
> -	}
> -
> -	/* Now enable the clients */
> -	guc_clients_enable(guc);
> -
> -	/* each client should now have received a doorbell */
> -	if (!client_doorbell_in_sync(guc->execbuf_client)) {
> -		pr_err("failed to initialize the doorbells\n");
> -		err = -EINVAL;
> -		goto out;
> -	}
> -
> -	/*
> -	 * Basic test - an attempt to reallocate a valid doorbell to the
> -	 * client it is currently assigned should not cause a failure.
> -	 */
> -	err = create_doorbell(guc->execbuf_client);
> -
> -out:
> -	/*
> -	 * Leave clean state for other test, plus the driver always destroy the
> -	 * clients during unload.
> -	 */
> -	guc_clients_disable(guc);
> -	guc_clients_destroy(guc);
> -	guc_clients_create(guc);
> -	guc_clients_enable(guc);
> -unlock:
> -	intel_runtime_pm_put(gt->uncore->rpm, wakeref);
> -	return err;
> -}
> -
> -/*
> - * Create as many clients as number of doorbells. Note that there's already
> - * client(s)/doorbell(s) created during driver load, but this test creates
> - * its own and do not interact with the existing ones.
> - */
> -static int igt_guc_doorbells(void *arg)
> -{
> -	struct intel_gt *gt = arg;
> -	struct intel_guc *guc = &gt->uc.guc;
> -	intel_wakeref_t wakeref;
> -	int i, err = 0;
> -	u16 db_id;
> -
> -	GEM_BUG_ON(!HAS_GT_UC(gt->i915));
> -	wakeref = intel_runtime_pm_get(gt->uncore->rpm);
> -
> -	err = check_all_doorbells(guc);
> -	if (err)
> -		goto unlock;
> -
> -	for (i = 0; i < ATTEMPTS; i++) {
> -		clients[i] = guc_client_alloc(guc, i % GUC_CLIENT_PRIORITY_NUM);
> -
> -		if (!clients[i]) {
> -			pr_err("[%d] No guc client\n", i);
> -			err = -EINVAL;
> -			goto out;
> -		}
> -
> -		if (IS_ERR(clients[i])) {
> -			if (PTR_ERR(clients[i]) != -ENOSPC) {
> -				pr_err("[%d] unexpected error\n", i);
> -				err = PTR_ERR(clients[i]);
> -				goto out;
> -			}
> -
> -			if (available_dbs(guc, i % GUC_CLIENT_PRIORITY_NUM)) {
> -				pr_err("[%d] non-db related alloc fail\n", i);
> -				err = -EINVAL;
> -				goto out;
> -			}
> -
> -			/* expected, ran out of dbs for this client type */
> -			continue;
> -		}
> -
> -		/*
> -		 * The check below is only valid because we keep a doorbell
> -		 * assigned during the whole life of the client.
> -		 */
> -		if (clients[i]->stage_id >= GUC_NUM_DOORBELLS) {
> -			pr_err("[%d] more clients than doorbells (%d >= %d)\n",
> -			       i, clients[i]->stage_id, GUC_NUM_DOORBELLS);
> -			err = -EINVAL;
> -			goto out;
> -		}
> -
> -		err = validate_client(clients[i], i % GUC_CLIENT_PRIORITY_NUM);
> -		if (err) {
> -			pr_err("[%d] client_alloc sanity check failed!\n", i);
> -			err = -EINVAL;
> -			goto out;
> -		}
> -
> -		db_id = clients[i]->doorbell_id;
> -
> -		err = __guc_client_enable(clients[i]);
> -		if (err) {
> -			pr_err("[%d] Failed to create a doorbell\n", i);
> -			goto out;
> -		}
> -
> -		/* doorbell id shouldn't change, we are holding the mutex */
> -		if (db_id != clients[i]->doorbell_id) {
> -			pr_err("[%d] doorbell id changed (%d != %d)\n",
> -			       i, db_id, clients[i]->doorbell_id);
> -			err = -EINVAL;
> -			goto out;
> -		}
> -
> -		err = check_all_doorbells(guc);
> -		if (err)
> -			goto out;
> -
> -		err = ring_doorbell_nop(clients[i]);
> -		if (err)
> -			goto out;
> -	}
> -
> -out:
> -	for (i = 0; i < ATTEMPTS; i++)
> -		if (!IS_ERR_OR_NULL(clients[i])) {
> -			__guc_client_disable(clients[i]);
> -			guc_client_free(clients[i]);
> -		}
> -unlock:
> -	intel_runtime_pm_put(gt->uncore->rpm, wakeref);
> -	return err;
> -}
> -
> -int intel_guc_live_selftest(struct drm_i915_private *i915)
> -{
> -	static const struct i915_subtest tests[] = {
> -		SUBTEST(igt_guc_clients),
> -		SUBTEST(igt_guc_doorbells),
> -	};
> -
> -	if (!USES_GUC_SUBMISSION(i915))
> -		return 0;
> -
> -	return intel_gt_live_subtests(tests, &i915->gt);
> -}
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index cab632791f73..5d5974e7f3ed 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1815,17 +1815,10 @@ static int i915_guc_info(struct seq_file *m, void *data)
>   
>   	GEM_BUG_ON(!guc->execbuf_client);
>   
> -	seq_printf(m, "\nDoorbell map:\n");
> -	seq_printf(m, "\t%*pb\n", GUC_NUM_DOORBELLS, guc->doorbell_bitmap);
> -	seq_printf(m, "Doorbell next cacheline: 0x%x\n", guc->db_cacheline);
> -
>   	seq_printf(m, "\nGuC execbuf client @ %p:\n", client);
> -	seq_printf(m, "\tPriority %d, GuC stage index: %u, PD offset 0x%x\n",
> +	seq_printf(m, "\tPriority %d, GuC stage index: %u\n",
>   		   client->priority,
> -		   client->stage_id,
> -		   client->proc_desc_offset);
> -	seq_printf(m, "\tDoorbell id %d, offset: 0x%lx\n",
> -		   client->doorbell_id, client->doorbell_offset);
> +		   client->stage_id);
>   	/* Add more as required ... */
>   
>   	return 0;
> diff --git a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
> index 4b3cac73e291..fb03f8a90cac 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
> +++ b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
> @@ -36,5 +36,4 @@ selftest(reset, intel_reset_live_selftests)
>   selftest(memory_region, intel_memory_region_live_selftests)
>   selftest(hangcheck, intel_hangcheck_live_selftests)
>   selftest(execlists, intel_execlists_live_selftests)
> -selftest(guc, intel_guc_live_selftest)
>   selftest(perf, i915_perf_live_selftests)

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Re: [PATCH 3/4] drm/i915/guc: kill doorbell code and selftests

[Daniele Ceraolo Spurio]

On 11/14/19 3:56 PM, John Harrison wrote:
> On 11/6/2019 14:25, Daniele Ceraolo Spurio wrote:
>> Instead of relying on the workqueue, the upcoming reworked GuC
>> submission flow will offer the host driver indipendent control over
> independent
> 
>> the execution status of each context submitted to GuC. As part of this,
>> the doorbell usage model has been reworked, with each doorbell being
>> paired to a single lrc and a doorbell ring representing new work
>> available for that specific context. This mechanism, however, limits
>> the number of contexts that can be registered with GuC to the number of
>> doorbells, which is an undesired limitation. Luckily, GuC will also
> Not exactly 'luckily'. More a case of, we said the doorbells won't work 
> for linux so can we have a H2G instead and they listened.
> 

fixed

>> provide a H2G that will allow the host to notify the GuC of work
>> available for a specified lrc, so we can use that mechanism instead of
>> relying on the doorbells. We can therefore drop the doorbell code we
>> currently have, also given the fact that in the unlikely case we'd want
>> to switch back to using doorbells we'd have to heavily rework it.
>> The workqueue will still have a use in the new interface to pass special
>> commands, so that code has been retained for now.
>>
>> With the doorbells gone and the GuC client becoming even simpler, the
>> existing GuC selftests don't give us any meaningful coverage so we can
>> remove them as well. Some selftests might come with the new code, but
>> they will look different from what we have now so if doesn't seem worth
>> it to keep the file around in the meantime.
>>
>> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Cc: John Harrison <John.C.Harrison@Intel.com>
>> Cc: Matthew Brost <matthew.brost@intel.com>
>> ---
>>   drivers/gpu/drm/i915/gt/uc/intel_guc.h        |   8 +-
>>   drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |   2 +-
>>   .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 373 ++----------------
>>   .../gpu/drm/i915/gt/uc/intel_guc_submission.h |   9 +-
>>   drivers/gpu/drm/i915/gt/uc/intel_uc.c         |   7 +-
>>   drivers/gpu/drm/i915/gt/uc/selftest_guc.c     | 299 --------------
>>   drivers/gpu/drm/i915/i915_debugfs.c           |  11 +-
>>   .../drm/i915/selftests/i915_live_selftests.h  |   1 -
>>   8 files changed, 42 insertions(+), 668 deletions(-)
>>   delete mode 100644 drivers/gpu/drm/i915/gt/uc/selftest_guc.c
>>
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h 
>> b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
>> index bf438f820c35..b2d1766e689a 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
>> @@ -20,8 +20,8 @@ struct __guc_ads_blob;
>>   /*
>>    * Top level structure of GuC. It handles firmware loading and 
>> manages client
>> - * pool and doorbells. intel_guc owns a intel_guc_client to replace 
>> the legacy
>> - * ExecList submission.
>> + * pool. intel_guc owns a intel_guc_client to replace the legacy 
>> ExecList
>> + * submission.
>>    */
>>   struct intel_guc {
>>       struct intel_uc_fw fw;
>> @@ -50,10 +50,6 @@ struct intel_guc {
>>       struct intel_guc_client *execbuf_client;
>> -    DECLARE_BITMAP(doorbell_bitmap, GUC_NUM_DOORBELLS);
>> -    /* Cyclic counter mod pagesize    */
>> -    u32 db_cacheline;
>> -
>>       /* Control params for fw initialization */
>>       u32 params[GUC_CTL_MAX_DWORDS];
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h 
>> b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
>> index a26a85d50209..1e8e4af7d9ca 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
>> @@ -31,7 +31,7 @@
>>   #define GUC_DOORBELL_INVALID        256
>> -#define GUC_DB_SIZE            (PAGE_SIZE)
>> +#define GUC_PD_SIZE            (PAGE_SIZE)
>>   #define GUC_WQ_SIZE            (PAGE_SIZE * 2)
>>   /* Work queue item header definitions */
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 
>> b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
>> index 6ac213ddbfa3..0088c3417641 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
>> @@ -30,8 +30,8 @@
>>    * GuC client:
>>    * A intel_guc_client refers to a submission path through GuC. 
>> Currently, there
>>    * is only one client, which is charged with all submissions to the 
>> GuC. This
>> - * struct is the owner of a doorbell, a process descriptor and a 
>> workqueue (all
>> - * of them inside a single gem object that contains all required 
>> pages for these
>> + * struct is the owner of a process descriptor and a workqueue (both 
>> of them
>> + * inside a single gem object that contains all required pages for these
>>    * elements).
>>    *
>>    * GuC stage descriptor:
>> @@ -39,13 +39,13 @@
>>    * descriptors, and shares them with the GuC.
>>    * Currently, there exists a 1:1 mapping between a intel_guc_client 
>> and a
>>    * guc_stage_desc (via the client's stage_id), so effectively only one
>> - * gets used. This stage descriptor lets the GuC know about the 
>> doorbell,
>> - * workqueue and process descriptor. Theoretically, it also lets the GuC
>> - * know about our HW contexts (context ID, etc...), but we actually
>> - * employ a kind of submission where the GuC uses the LRCA sent via 
>> the work
>> - * item instead (the single guc_stage_desc associated to execbuf client
>> - * contains information about the default kernel context only, but 
>> this is
>> - * essentially unused). This is called a "proxy" submission.
>> + * gets used. This stage descriptor lets the GuC know about the 
>> workqueue and
>> + * process descriptor. Theoretically, it also lets the GuC know about 
>> our HW
>> + * contexts (context ID, etc...), but we actually employ a kind of 
>> submission
>> + * where the GuC uses the LRCA sent via the work item instead (the 
>> single
>> + * guc_stage_desc associated to execbuf client contains information 
>> about the
>> + * default kernel context only, but this is essentially unused). This 
>> is called
>> + * a "proxy" submission.
>>    *
>>    * The Scratch registers:
>>    * There are 16 MMIO-based registers start from 0xC180. The kernel 
>> driver writes
>> @@ -56,10 +56,6 @@
>>    * then proceeds.
>>    * See intel_guc_send()
>>    *
>> - * Doorbells:
>> - * Doorbells are interrupts to uKernel. A doorbell is a single cache 
>> line (QW)
>> - * mapped into process space.
>> - *
>>    * Work Items:
>>    * There are several types of work items that the host may place into a
>>    * workqueue, each with its own requirements and limitations. 
>> Currently only
>> @@ -81,78 +77,6 @@ static inline bool is_high_priority(struct 
>> intel_guc_client *client)
>>           client->priority == GUC_CLIENT_PRIORITY_HIGH);
>>   }
>> -static int reserve_doorbell(struct intel_guc_client *client)
>> -{
>> -    unsigned long offset;
>> -    unsigned long end;
>> -    u16 id;
>> -
>> -    GEM_BUG_ON(client->doorbell_id != GUC_DOORBELL_INVALID);
>> -
>> -    /*
>> -     * The bitmap tracks which doorbell registers are currently in use.
>> -     * It is split into two halves; the first half is used for normal
>> -     * priority contexts, the second half for high-priority ones.
>> -     */
>> -    offset = 0;
>> -    end = GUC_NUM_DOORBELLS / 2;
>> -    if (is_high_priority(client)) {
>> -        offset = end;
>> -        end += offset;
>> -    }
>> -
>> -    id = find_next_zero_bit(client->guc->doorbell_bitmap, end, offset);
>> -    if (id == end)
>> -        return -ENOSPC;
>> -
>> -    __set_bit(id, client->guc->doorbell_bitmap);
>> -    client->doorbell_id = id;
>> -    DRM_DEBUG_DRIVER("client %u (high prio=%s) reserved doorbell: %d\n",
>> -             client->stage_id, yesno(is_high_priority(client)),
>> -             id);
>> -    return 0;
>> -}
>> -
>> -static bool has_doorbell(struct intel_guc_client *client)
>> -{
>> -    if (client->doorbell_id == GUC_DOORBELL_INVALID)
>> -        return false;
>> -
>> -    return test_bit(client->doorbell_id, client->guc->doorbell_bitmap);
>> -}
>> -
>> -static void unreserve_doorbell(struct intel_guc_client *client)
>> -{
>> -    GEM_BUG_ON(!has_doorbell(client));
>> -
>> -    __clear_bit(client->doorbell_id, client->guc->doorbell_bitmap);
>> -    client->doorbell_id = GUC_DOORBELL_INVALID;
>> -}
>> -
>> -/*
>> - * Tell the GuC to allocate or deallocate a specific doorbell
>> - */
>> -
>> -static int __guc_allocate_doorbell(struct intel_guc *guc, u32 stage_id)
>> -{
>> -    u32 action[] = {
>> -        INTEL_GUC_ACTION_ALLOCATE_DOORBELL,
>> -        stage_id
>> -    };
>> -
>> -    return intel_guc_send(guc, action, ARRAY_SIZE(action));
>> -}
>> -
>> -static int __guc_deallocate_doorbell(struct intel_guc *guc, u32 
>> stage_id)
>> -{
>> -    u32 action[] = {
>> -        INTEL_GUC_ACTION_DEALLOCATE_DOORBELL,
>> -        stage_id
>> -    };
>> -
>> -    return intel_guc_send(guc, action, ARRAY_SIZE(action));
>> -}
>> -
>>   static struct guc_stage_desc *__get_stage_desc(struct 
>> intel_guc_client *client)
>>   {
>>       struct guc_stage_desc *base = client->guc->stage_desc_pool_vaddr;
>> @@ -160,118 +84,10 @@ static struct guc_stage_desc 
>> *__get_stage_desc(struct intel_guc_client *client)
>>       return &base[client->stage_id];
>>   }
>> -/*
>> - * Initialise, update, or clear doorbell data shared with the GuC
>> - *
>> - * These functions modify shared data and so need access to the mapped
>> - * client object which contains the page being used for the doorbell
>> - */
>> -
>> -static void __update_doorbell_desc(struct intel_guc_client *client, 
>> u16 new_id)
>> -{
>> -    struct guc_stage_desc *desc;
>> -
>> -    /* Update the GuC's idea of the doorbell ID */
>> -    desc = __get_stage_desc(client);
>> -    desc->db_id = new_id;
>> -}
>> -
>> -static struct guc_doorbell_info *__get_doorbell(struct 
>> intel_guc_client *client)
>> -{
>> -    return client->vaddr + client->doorbell_offset;
>> -}
>> -
>> -static bool __doorbell_valid(struct intel_guc *guc, u16 db_id)
>> -{
>> -    struct intel_uncore *uncore = guc_to_gt(guc)->uncore;
>> -
>> -    GEM_BUG_ON(db_id >= GUC_NUM_DOORBELLS);
>> -    return intel_uncore_read(uncore, GEN8_DRBREGL(db_id)) & 
>> GEN8_DRB_VALID;
>> -}
>> -
>> -static void __init_doorbell(struct intel_guc_client *client)
>> -{
>> -    struct guc_doorbell_info *doorbell;
>> -
>> -    doorbell = __get_doorbell(client);
>> -    doorbell->db_status = GUC_DOORBELL_ENABLED;
>> -    doorbell->cookie = 0;
>> -}
>> -
>> -static void __fini_doorbell(struct intel_guc_client *client)
>> -{
>> -    struct guc_doorbell_info *doorbell;
>> -    u16 db_id = client->doorbell_id;
>> -
>> -    doorbell = __get_doorbell(client);
>> -    doorbell->db_status = GUC_DOORBELL_DISABLED;
>> -
>> -    /* Doorbell release flow requires that we wait for GEN8_DRB_VALID 
>> bit
>> -     * to go to zero after updating db_status before we call the GuC to
>> -     * release the doorbell
>> -     */
>> -    if (wait_for_us(!__doorbell_valid(client->guc, db_id), 10))
>> -        WARN_ONCE(true, "Doorbell never became invalid after 
>> disable\n");
>> -}
>> -
>> -static int create_doorbell(struct intel_guc_client *client)
>> -{
>> -    int ret;
>> -
>> -    if (WARN_ON(!has_doorbell(client)))
>> -        return -ENODEV; /* internal setup error, should never happen */
>> -
>> -    __update_doorbell_desc(client, client->doorbell_id);
>> -    __init_doorbell(client);
>> -
>> -    ret = __guc_allocate_doorbell(client->guc, client->stage_id);
>> -    if (ret) {
>> -        __fini_doorbell(client);
>> -        __update_doorbell_desc(client, GUC_DOORBELL_INVALID);
>> -        DRM_DEBUG_DRIVER("Couldn't create client %u doorbell: %d\n",
>> -                 client->stage_id, ret);
>> -        return ret;
>> -    }
>> -
>> -    return 0;
>> -}
>> -
>> -static int destroy_doorbell(struct intel_guc_client *client)
>> -{
>> -    int ret;
>> -
>> -    GEM_BUG_ON(!has_doorbell(client));
>> -
>> -    __fini_doorbell(client);
>> -    ret = __guc_deallocate_doorbell(client->guc, client->stage_id);
>> -    if (ret)
>> -        DRM_ERROR("Couldn't destroy client %u doorbell: %d\n",
>> -              client->stage_id, ret);
>> -
>> -    __update_doorbell_desc(client, GUC_DOORBELL_INVALID);
>> -
>> -    return ret;
>> -}
>> -
>> -static unsigned long __select_cacheline(struct intel_guc *guc)
>> -{
>> -    unsigned long offset;
>> -
>> -    /* Doorbell uses a single cache line within a page */
>> -    offset = offset_in_page(guc->db_cacheline);
>> -
>> -    /* Moving to next cache line to reduce contention */
>> -    guc->db_cacheline += cache_line_size();
>> -
>> -    DRM_DEBUG_DRIVER("reserved cacheline 0x%lx, next 0x%x, linesize 
>> %u\n",
>> -             offset, guc->db_cacheline, cache_line_size());
>> -    return offset;
>> -}
>> -
>>   static inline struct guc_process_desc *
>>   __get_process_desc(struct intel_guc_client *client)
>>   {
>> -    return client->vaddr + client->proc_desc_offset;
>> +    return client->vaddr;
>>   }
>>   /*
>> @@ -332,8 +148,8 @@ static void guc_stage_desc_pool_destroy(struct 
>> intel_guc *guc)
>>    * Initialise/clear the stage descriptor shared with the GuC firmware.
>>    *
>>    * This descriptor tells the GuC where (in GGTT space) to find the 
>> important
>> - * data structures relating to this client (doorbell, process 
>> descriptor,
>> - * write queue, etc).
>> + * data structures relating to this client (process descriptor, write 
>> queue,
>> + * etc).
>>    */
>>   static void guc_stage_desc_init(struct intel_guc_client *client)
>>   {
>> @@ -350,19 +166,14 @@ static void guc_stage_desc_init(struct 
>> intel_guc_client *client)
>>           desc->attribute |= GUC_STAGE_DESC_ATTR_PREEMPT;
>>       desc->stage_id = client->stage_id;
>>       desc->priority = client->priority;
>> -    desc->db_id = client->doorbell_id;
>>       /*
>> -     * The doorbell, process descriptor, and workqueue are all parts
>> -     * of the client object, which the GuC will reference via the GGTT
>> +     * The process descriptor and workqueue are all parts of the client
>> +     * object, which the GuC will reference via the GGTT
>>        */
>>       gfx_addr = intel_guc_ggtt_offset(guc, client->vma);
>> -    desc->db_trigger_phy = sg_dma_address(client->vma->pages->sgl) +
>> -                client->doorbell_offset;
>> -    desc->db_trigger_cpu = ptr_to_u64(__get_doorbell(client));
>> -    desc->db_trigger_uk = gfx_addr + client->doorbell_offset;
>> -    desc->process_desc = gfx_addr + client->proc_desc_offset;
>> -    desc->wq_addr = gfx_addr + GUC_DB_SIZE;
>> +    desc->process_desc = gfx_addr;
>> +    desc->wq_addr = gfx_addr + GUC_PD_SIZE;
>>       desc->wq_size = GUC_WQ_SIZE;
>>       desc->desc_private = ptr_to_u64(client);
>> @@ -408,48 +219,23 @@ static void guc_wq_item_append(struct 
>> intel_guc_client *client,
>>                     GUC_WQ_SIZE) < wqi_size);
>>       GEM_BUG_ON(wq_off & (wqi_size - 1));
>> -    /* WQ starts from the page after doorbell / process_desc */
>> -    wqi = client->vaddr + wq_off + GUC_DB_SIZE;
>> -
>> -    if (I915_SELFTEST_ONLY(client->use_nop_wqi)) {
>> -        wqi->header = WQ_TYPE_NOOP | (wqi_len << WQ_LEN_SHIFT);
>> -    } else {
>> -        /* Now fill in the 4-word work queue item */
>> -        wqi->header = WQ_TYPE_INORDER |
>> -                  (wqi_len << WQ_LEN_SHIFT) |
>> -                  (target_engine << WQ_TARGET_SHIFT) |
>> -                  WQ_NO_WCFLUSH_WAIT;
>> -        wqi->context_desc = context_desc;
>> -        wqi->submit_element_info = ring_tail << WQ_RING_TAIL_SHIFT;
>> -        GEM_BUG_ON(ring_tail > WQ_RING_TAIL_MAX);
>> -        wqi->fence_id = fence_id;
>> -    }
>> +    /* WQ starts from the page after process_desc */
>> +    wqi = client->vaddr + wq_off + GUC_PD_SIZE;
>> +
>> +    /* Now fill in the 4-word work queue item */
>> +    wqi->header = WQ_TYPE_INORDER |
>> +              (wqi_len << WQ_LEN_SHIFT) |
>> +              (target_engine << WQ_TARGET_SHIFT) |
>> +              WQ_NO_WCFLUSH_WAIT;
>> +    wqi->context_desc = context_desc;
>> +    wqi->submit_element_info = ring_tail << WQ_RING_TAIL_SHIFT;
>> +    GEM_BUG_ON(ring_tail > WQ_RING_TAIL_MAX);
>> +    wqi->fence_id = fence_id;
>>       /* Make the update visible to GuC */
>>       WRITE_ONCE(desc->tail, (wq_off + wqi_size) & (GUC_WQ_SIZE - 1));
>>   }
>> -static void guc_ring_doorbell(struct intel_guc_client *client)
>> -{
>> -    struct guc_doorbell_info *db;
>> -    u32 cookie;
>> -
>> -    lockdep_assert_held(&client->wq_lock);
>> -
>> -    /* pointer of current doorbell cacheline */
>> -    db = __get_doorbell(client);
>> -
>> -    /*
>> -     * We're not expecting the doorbell cookie to change behind our 
>> back,
>> -     * we also need to treat 0 as a reserved value.
>> -     */
>> -    cookie = READ_ONCE(db->cookie);
>> -    WARN_ON_ONCE(xchg(&db->cookie, cookie + 1 ?: cookie + 2) != cookie);
>> -
>> -    /* XXX: doorbell was lost and need to acquire it again */
>> -    GEM_BUG_ON(db->db_status != GUC_DOORBELL_ENABLED);
>> -}
>> -
>>   static void guc_add_request(struct intel_guc *guc, struct 
>> i915_request *rq)
>>   {
>>       struct intel_guc_client *client = guc->execbuf_client;
>> @@ -459,7 +245,6 @@ static void guc_add_request(struct intel_guc *guc, 
>> struct i915_request *rq)
>>       guc_wq_item_append(client, engine->guc_id, ctx_desc,
>>                  ring_tail, rq->fence.seqno);
>> -    guc_ring_doorbell(client);
>>   }
>>   /*
>> @@ -744,36 +529,6 @@ static void guc_reset_finish(struct 
>> intel_engine_cs *engine)
>>    * path of guc_submit() above.
>>    */
>> -/* Check that a doorbell register is in the expected state */
>> -static bool doorbell_ok(struct intel_guc *guc, u16 db_id)
>> -{
>> -    bool valid;
>> -
>> -    GEM_BUG_ON(db_id >= GUC_NUM_DOORBELLS);
>> -
>> -    valid = __doorbell_valid(guc, db_id);
>> -
>> -    if (test_bit(db_id, guc->doorbell_bitmap) == valid)
>> -        return true;
>> -
>> -    DRM_DEBUG_DRIVER("Doorbell %u has unexpected state: valid=%s\n",
>> -             db_id, yesno(valid));
>> -
>> -    return false;
>> -}
>> -
>> -static bool guc_verify_doorbells(struct intel_guc *guc)
>> -{
>> -    bool doorbells_ok = true;
>> -    u16 db_id;
>> -
>> -    for (db_id = 0; db_id < GUC_NUM_DOORBELLS; ++db_id)
>> -        if (!doorbell_ok(guc, db_id))
>> -            doorbells_ok = false;
>> -
>> -    return doorbells_ok;
>> -}
>> -
>>   /**
>>    * guc_client_alloc() - Allocate an intel_guc_client
>>    * @guc:    the intel_guc structure
>> @@ -798,7 +553,6 @@ guc_client_alloc(struct intel_guc *guc, u32 priority)
>>       client->guc = guc;
>>       client->priority = priority;
>> -    client->doorbell_id = GUC_DOORBELL_INVALID;
>>       spin_lock_init(&client->wq_lock);
>>       ret = ida_simple_get(&guc->stage_ids, 0, GUC_MAX_STAGE_DESCRIPTORS,
>> @@ -809,7 +563,7 @@ guc_client_alloc(struct intel_guc *guc, u32 priority)
>>       client->stage_id = ret;
>>       /* The first page is doorbell/proc_desc. Two followed pages are 
>> wq. */
> Need to update this comment as well.
> 

ack

>> -    vma = intel_guc_allocate_vma(guc, GUC_DB_SIZE + GUC_WQ_SIZE);
>> +    vma = intel_guc_allocate_vma(guc, GUC_PD_SIZE + GUC_WQ_SIZE);
>>       if (IS_ERR(vma)) {
>>           ret = PTR_ERR(vma);
>>           goto err_id;
>> @@ -825,31 +579,11 @@ guc_client_alloc(struct intel_guc *guc, u32 
>> priority)
>>       }
>>       client->vaddr = vaddr;
>> -    ret = reserve_doorbell(client);
>> -    if (ret)
>> -        goto err_vaddr;
>> -
>> -    client->doorbell_offset = __select_cacheline(guc);
>> -
>> -    /*
>> -     * Since the doorbell only requires a single cacheline, we can save
>> -     * space by putting the application process descriptor in the same
>> -     * page. Use the half of the page that doesn't include the doorbell.
>> -     */
>> -    if (client->doorbell_offset >= (GUC_DB_SIZE / 2))
>> -        client->proc_desc_offset = 0;
>> -    else
>> -        client->proc_desc_offset = (GUC_DB_SIZE / 2);
>> -
>>       DRM_DEBUG_DRIVER("new priority %u client %p: stage_id %u\n",
>>                priority, client, client->stage_id);
>> -    DRM_DEBUG_DRIVER("doorbell id %u, cacheline offset 0x%lx\n",
>> -             client->doorbell_id, client->doorbell_offset);
>>       return client;
>> -err_vaddr:
>> -    i915_gem_object_unpin_map(client->vma->obj);
>>   err_vma:
>>       i915_vma_unpin_and_release(&client->vma, 0);
>>   err_id:
>> @@ -861,7 +595,6 @@ guc_client_alloc(struct intel_guc *guc, u32 priority)
>>   static void guc_client_free(struct intel_guc_client *client)
>>   {
>> -    unreserve_doorbell(client);
>>       i915_vma_unpin_and_release(&client->vma, I915_VMA_RELEASE_MAP);
>>       ida_simple_remove(&client->guc->stage_ids, client->stage_id);
>>       kfree(client);
>> @@ -892,44 +625,21 @@ static void guc_clients_destroy(struct intel_guc 
>> *guc)
>>           guc_client_free(client);
>>   }
>> -static int __guc_client_enable(struct intel_guc_client *client)
>> +static void __guc_client_enable(struct intel_guc_client *client)
>>   {
>> -    int ret;
>> -
>>       guc_proc_desc_init(client);
>>       guc_stage_desc_init(client);
>> -
>> -    ret = create_doorbell(client);
>> -    if (ret)
>> -        goto fail;
>> -
>> -    return 0;
>> -
>> -fail:
>> -    guc_stage_desc_fini(client);
>> -    guc_proc_desc_fini(client);
>> -    return ret;
>>   }
>>   static void __guc_client_disable(struct intel_guc_client *client)
>>   {
>> -    /*
>> -     * By the time we're here, GuC may have already been reset. if 
>> that is
>> -     * the case, instead of trying (in vain) to communicate with it, 
>> let's
>> -     * just cleanup the doorbell HW and our internal state.
>> -     */
> This comment should be kept, only dropping the 'doorell HW and' phrase?
> 

I've updated to leave a note that GuC might've already been reset.

>> -    if (intel_guc_is_running(client->guc))
>> -        destroy_doorbell(client);
>> -    else
>> -        __fini_doorbell(client);
>> -
>>       guc_stage_desc_fini(client);
>>       guc_proc_desc_fini(client);
>>   }
>> -static int guc_clients_enable(struct intel_guc *guc)
>> +static void guc_clients_enable(struct intel_guc *guc)
>>   {
>> -    return __guc_client_enable(guc->execbuf_client);
>> +    __guc_client_enable(guc->execbuf_client);
>>   }
> This seems like a pretty pointless wrapper. I'm guessing there was a 
> mutex lock or something in here originally? Maybe time to drop the '__' 
> version and just move the actual work into this function?
> 

This goes away in the next patch, together with the rest of the client 
stuff.

Daniele

> Otherwise, looks good to me. So with some corrected comments:
> Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
> 
>>   static void guc_clients_disable(struct intel_guc *guc)
>> @@ -958,7 +668,6 @@ int intel_guc_submission_init(struct intel_guc *guc)
>>        */
>>       GEM_BUG_ON(!guc->stage_desc_pool);
>> -    WARN_ON(!guc_verify_doorbells(guc));
>>       ret = guc_clients_create(guc);
>>       if (ret)
>>           goto err_pool;
>> @@ -973,7 +682,6 @@ int intel_guc_submission_init(struct intel_guc *guc)
>>   void intel_guc_submission_fini(struct intel_guc *guc)
>>   {
>>       guc_clients_destroy(guc);
>> -    WARN_ON(!guc_verify_doorbells(guc));
>>       if (guc->stage_desc_pool)
>>           guc_stage_desc_pool_destroy(guc);
>> @@ -1089,16 +797,11 @@ static void guc_set_default_submission(struct 
>> intel_engine_cs *engine)
>>       GEM_BUG_ON(engine->irq_enable || engine->irq_disable);
>>   }
>> -int intel_guc_submission_enable(struct intel_guc *guc)
>> +void intel_guc_submission_enable(struct intel_guc *guc)
>>   {
>>       struct intel_gt *gt = guc_to_gt(guc);
>>       struct intel_engine_cs *engine;
>>       enum intel_engine_id id;
>> -    int err;
>> -
>> -    err = i915_inject_probe_error(gt->i915, -ENXIO);
>> -    if (err)
>> -        return err;
>>       /*
>>        * We're using GuC work items for submitting work through GuC. 
>> Since
>> @@ -1115,9 +818,7 @@ int intel_guc_submission_enable(struct intel_guc 
>> *guc)
>>       GEM_BUG_ON(!guc->execbuf_client);
>> -    err = guc_clients_enable(guc);
>> -    if (err)
>> -        return err;
>> +    guc_clients_enable(guc);
>>       /* Take over from manual control of ELSP (execlists) */
>>       guc_interrupts_capture(gt);
>> @@ -1126,8 +827,6 @@ int intel_guc_submission_enable(struct intel_guc 
>> *guc)
>>           engine->set_default_submission = guc_set_default_submission;
>>           engine->set_default_submission(engine);
>>       }
>> -
>> -    return 0;
>>   }
>>   void intel_guc_submission_disable(struct intel_guc *guc)
>> @@ -1155,7 +854,3 @@ void intel_guc_submission_init_early(struct 
>> intel_guc *guc)
>>   {
>>       guc->submission_supported = __guc_submission_support(guc);
>>   }
>> -
>> -#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
>> -#include "selftest_guc.c"
>> -#endif
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h 
>> b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
>> index 54d716828352..e2deb4e6f42a 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
>> @@ -44,21 +44,14 @@ struct intel_guc_client {
>>       /* bitmap of (host) engine ids */
>>       u32 priority;
>>       u32 stage_id;
>> -    u32 proc_desc_offset;
>> -
>> -    u16 doorbell_id;
>> -    unsigned long doorbell_offset;
>>       /* Protects GuC client's WQ access */
>>       spinlock_t wq_lock;
>> -
>> -    /* For testing purposes, use nop WQ items instead of real ones */
>> -    I915_SELFTEST_DECLARE(bool use_nop_wqi);
>>   };
>>   void intel_guc_submission_init_early(struct intel_guc *guc);
>>   int intel_guc_submission_init(struct intel_guc *guc);
>> -int intel_guc_submission_enable(struct intel_guc *guc);
>> +void intel_guc_submission_enable(struct intel_guc *guc);
>>   void intel_guc_submission_disable(struct intel_guc *guc);
>>   void intel_guc_submission_fini(struct intel_guc *guc);
>>   int intel_guc_preempt_work_create(struct intel_guc *guc);
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c 
>> b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
>> index 629b19377a29..c6519066a0f6 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
>> @@ -486,11 +486,8 @@ int intel_uc_init_hw(struct intel_uc *uc)
>>       if (ret)
>>           goto err_communication;
>> -    if (intel_uc_supports_guc_submission(uc)) {
>> -        ret = intel_guc_submission_enable(guc);
>> -        if (ret)
>> -            goto err_communication;
>> -    }
>> +    if (intel_uc_supports_guc_submission(uc))
>> +        intel_guc_submission_enable(guc);
>>       dev_info(i915->drm.dev, "%s firmware %s version %u.%u %s:%s\n",
>>            intel_uc_fw_type_repr(INTEL_UC_FW_TYPE_GUC), guc->fw.path,
>> diff --git a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c 
>> b/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
>> deleted file mode 100644
>> index d8a80388bd31..000000000000
>> --- a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
>> +++ /dev/null
>> @@ -1,299 +0,0 @@
>> -// SPDX-License-Identifier: MIT
>> -/*
>> - * Copyright © 2017 Intel Corporation
>> - */
>> -
>> -#include "i915_selftest.h"
>> -#include "gem/i915_gem_pm.h"
>> -
>> -/* max doorbell number + negative test for each client type */
>> -#define ATTEMPTS (GUC_NUM_DOORBELLS + GUC_CLIENT_PRIORITY_NUM)
>> -
>> -static struct intel_guc_client *clients[ATTEMPTS];
>> -
>> -static bool available_dbs(struct intel_guc *guc, u32 priority)
>> -{
>> -    unsigned long offset;
>> -    unsigned long end;
>> -    u16 id;
>> -
>> -    /* first half is used for normal priority, second half for high */
>> -    offset = 0;
>> -    end = GUC_NUM_DOORBELLS / 2;
>> -    if (priority <= GUC_CLIENT_PRIORITY_HIGH) {
>> -        offset = end;
>> -        end += offset;
>> -    }
>> -
>> -    id = find_next_zero_bit(guc->doorbell_bitmap, end, offset);
>> -    if (id < end)
>> -        return true;
>> -
>> -    return false;
>> -}
>> -
>> -static int check_all_doorbells(struct intel_guc *guc)
>> -{
>> -    u16 db_id;
>> -
>> -    pr_info_once("Max number of doorbells: %d", GUC_NUM_DOORBELLS);
>> -    for (db_id = 0; db_id < GUC_NUM_DOORBELLS; ++db_id) {
>> -        if (!doorbell_ok(guc, db_id)) {
>> -            pr_err("doorbell %d, not ok\n", db_id);
>> -            return -EIO;
>> -        }
>> -    }
>> -
>> -    return 0;
>> -}
>> -
>> -static int ring_doorbell_nop(struct intel_guc_client *client)
>> -{
>> -    struct guc_process_desc *desc = __get_process_desc(client);
>> -    int err;
>> -
>> -    client->use_nop_wqi = true;
>> -
>> -    spin_lock_irq(&client->wq_lock);
>> -
>> -    guc_wq_item_append(client, 0, 0, 0, 0);
>> -    guc_ring_doorbell(client);
>> -
>> -    spin_unlock_irq(&client->wq_lock);
>> -
>> -    client->use_nop_wqi = false;
>> -
>> -    /* if there are no issues GuC will update the WQ head and keep the
>> -     * WQ in active status
>> -     */
>> -    err = wait_for(READ_ONCE(desc->head) == READ_ONCE(desc->tail), 10);
>> -    if (err) {
>> -        pr_err("doorbell %u ring failed!\n", client->doorbell_id);
>> -        return -EIO;
>> -    }
>> -
>> -    if (desc->wq_status != WQ_STATUS_ACTIVE) {
>> -        pr_err("doorbell %u ring put WQ in bad state (%u)!\n",
>> -               client->doorbell_id, desc->wq_status);
>> -        return -EIO;
>> -    }
>> -
>> -    return 0;
>> -}
>> -
>> -/*
>> - * Basic client sanity check, handy to validate create_clients.
>> - */
>> -static int validate_client(struct intel_guc_client *client, int 
>> client_priority)
>> -{
>> -    if (client->priority != client_priority ||
>> -        client->doorbell_id == GUC_DOORBELL_INVALID)
>> -        return -EINVAL;
>> -    else
>> -        return 0;
>> -}
>> -
>> -static bool client_doorbell_in_sync(struct intel_guc_client *client)
>> -{
>> -    return !client || doorbell_ok(client->guc, client->doorbell_id);
>> -}
>> -
>> -/*
>> - * Check that we're able to synchronize guc_clients with their doorbells
>> - *
>> - * We're creating clients and reserving doorbells once, at module 
>> load. During
>> - * module lifetime, GuC, doorbell HW, and i915 state may go out of 
>> sync due to
>> - * GuC being reset. In other words - GuC clients are still around, 
>> but the
>> - * status of their doorbells may be incorrect. This is the reason behind
>> - * validating that the doorbells status expected by the driver 
>> matches what the
>> - * GuC/HW have.
>> - */
>> -static int igt_guc_clients(void *arg)
>> -{
>> -    struct intel_gt *gt = arg;
>> -    struct intel_guc *guc = &gt->uc.guc;
>> -    intel_wakeref_t wakeref;
>> -    int err = 0;
>> -
>> -    GEM_BUG_ON(!HAS_GT_UC(gt->i915));
>> -    wakeref = intel_runtime_pm_get(gt->uncore->rpm);
>> -
>> -    err = check_all_doorbells(guc);
>> -    if (err)
>> -        goto unlock;
>> -
>> -    /*
>> -     * Get rid of clients created during driver load because the test 
>> will
>> -     * recreate them.
>> -     */
>> -    guc_clients_disable(guc);
>> -    guc_clients_destroy(guc);
>> -    if (guc->execbuf_client) {
>> -        pr_err("guc_clients_destroy lied!\n");
>> -        err = -EINVAL;
>> -        goto unlock;
>> -    }
>> -
>> -    err = guc_clients_create(guc);
>> -    if (err) {
>> -        pr_err("Failed to create clients\n");
>> -        goto unlock;
>> -    }
>> -    GEM_BUG_ON(!guc->execbuf_client);
>> -
>> -    err = validate_client(guc->execbuf_client,
>> -                  GUC_CLIENT_PRIORITY_KMD_NORMAL);
>> -    if (err) {
>> -        pr_err("execbug client validation failed\n");
>> -        goto out;
>> -    }
>> -
>> -    /* the client should now have reserved a doorbell */
>> -    if (!has_doorbell(guc->execbuf_client)) {
>> -        pr_err("guc_clients_create didn't reserve doorbells\n");
>> -        err = -EINVAL;
>> -        goto out;
>> -    }
>> -
>> -    /* Now enable the clients */
>> -    guc_clients_enable(guc);
>> -
>> -    /* each client should now have received a doorbell */
>> -    if (!client_doorbell_in_sync(guc->execbuf_client)) {
>> -        pr_err("failed to initialize the doorbells\n");
>> -        err = -EINVAL;
>> -        goto out;
>> -    }
>> -
>> -    /*
>> -     * Basic test - an attempt to reallocate a valid doorbell to the
>> -     * client it is currently assigned should not cause a failure.
>> -     */
>> -    err = create_doorbell(guc->execbuf_client);
>> -
>> -out:
>> -    /*
>> -     * Leave clean state for other test, plus the driver always 
>> destroy the
>> -     * clients during unload.
>> -     */
>> -    guc_clients_disable(guc);
>> -    guc_clients_destroy(guc);
>> -    guc_clients_create(guc);
>> -    guc_clients_enable(guc);
>> -unlock:
>> -    intel_runtime_pm_put(gt->uncore->rpm, wakeref);
>> -    return err;
>> -}
>> -
>> -/*
>> - * Create as many clients as number of doorbells. Note that there's 
>> already
>> - * client(s)/doorbell(s) created during driver load, but this test 
>> creates
>> - * its own and do not interact with the existing ones.
>> - */
>> -static int igt_guc_doorbells(void *arg)
>> -{
>> -    struct intel_gt *gt = arg;
>> -    struct intel_guc *guc = &gt->uc.guc;
>> -    intel_wakeref_t wakeref;
>> -    int i, err = 0;
>> -    u16 db_id;
>> -
>> -    GEM_BUG_ON(!HAS_GT_UC(gt->i915));
>> -    wakeref = intel_runtime_pm_get(gt->uncore->rpm);
>> -
>> -    err = check_all_doorbells(guc);
>> -    if (err)
>> -        goto unlock;
>> -
>> -    for (i = 0; i < ATTEMPTS; i++) {
>> -        clients[i] = guc_client_alloc(guc, i % GUC_CLIENT_PRIORITY_NUM);
>> -
>> -        if (!clients[i]) {
>> -            pr_err("[%d] No guc client\n", i);
>> -            err = -EINVAL;
>> -            goto out;
>> -        }
>> -
>> -        if (IS_ERR(clients[i])) {
>> -            if (PTR_ERR(clients[i]) != -ENOSPC) {
>> -                pr_err("[%d] unexpected error\n", i);
>> -                err = PTR_ERR(clients[i]);
>> -                goto out;
>> -            }
>> -
>> -            if (available_dbs(guc, i % GUC_CLIENT_PRIORITY_NUM)) {
>> -                pr_err("[%d] non-db related alloc fail\n", i);
>> -                err = -EINVAL;
>> -                goto out;
>> -            }
>> -
>> -            /* expected, ran out of dbs for this client type */
>> -            continue;
>> -        }
>> -
>> -        /*
>> -         * The check below is only valid because we keep a doorbell
>> -         * assigned during the whole life of the client.
>> -         */
>> -        if (clients[i]->stage_id >= GUC_NUM_DOORBELLS) {
>> -            pr_err("[%d] more clients than doorbells (%d >= %d)\n",
>> -                   i, clients[i]->stage_id, GUC_NUM_DOORBELLS);
>> -            err = -EINVAL;
>> -            goto out;
>> -        }
>> -
>> -        err = validate_client(clients[i], i % GUC_CLIENT_PRIORITY_NUM);
>> -        if (err) {
>> -            pr_err("[%d] client_alloc sanity check failed!\n", i);
>> -            err = -EINVAL;
>> -            goto out;
>> -        }
>> -
>> -        db_id = clients[i]->doorbell_id;
>> -
>> -        err = __guc_client_enable(clients[i]);
>> -        if (err) {
>> -            pr_err("[%d] Failed to create a doorbell\n", i);
>> -            goto out;
>> -        }
>> -
>> -        /* doorbell id shouldn't change, we are holding the mutex */
>> -        if (db_id != clients[i]->doorbell_id) {
>> -            pr_err("[%d] doorbell id changed (%d != %d)\n",
>> -                   i, db_id, clients[i]->doorbell_id);
>> -            err = -EINVAL;
>> -            goto out;
>> -        }
>> -
>> -        err = check_all_doorbells(guc);
>> -        if (err)
>> -            goto out;
>> -
>> -        err = ring_doorbell_nop(clients[i]);
>> -        if (err)
>> -            goto out;
>> -    }
>> -
>> -out:
>> -    for (i = 0; i < ATTEMPTS; i++)
>> -        if (!IS_ERR_OR_NULL(clients[i])) {
>> -            __guc_client_disable(clients[i]);
>> -            guc_client_free(clients[i]);
>> -        }
>> -unlock:
>> -    intel_runtime_pm_put(gt->uncore->rpm, wakeref);
>> -    return err;
>> -}
>> -
>> -int intel_guc_live_selftest(struct drm_i915_private *i915)
>> -{
>> -    static const struct i915_subtest tests[] = {
>> -        SUBTEST(igt_guc_clients),
>> -        SUBTEST(igt_guc_doorbells),
>> -    };
>> -
>> -    if (!USES_GUC_SUBMISSION(i915))
>> -        return 0;
>> -
>> -    return intel_gt_live_subtests(tests, &i915->gt);
>> -}
>> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
>> b/drivers/gpu/drm/i915/i915_debugfs.c
>> index cab632791f73..5d5974e7f3ed 100644
>> --- a/drivers/gpu/drm/i915/i915_debugfs.c
>> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
>> @@ -1815,17 +1815,10 @@ static int i915_guc_info(struct seq_file *m, 
>> void *data)
>>       GEM_BUG_ON(!guc->execbuf_client);
>> -    seq_printf(m, "\nDoorbell map:\n");
>> -    seq_printf(m, "\t%*pb\n", GUC_NUM_DOORBELLS, guc->doorbell_bitmap);
>> -    seq_printf(m, "Doorbell next cacheline: 0x%x\n", guc->db_cacheline);
>> -
>>       seq_printf(m, "\nGuC execbuf client @ %p:\n", client);
>> -    seq_printf(m, "\tPriority %d, GuC stage index: %u, PD offset 
>> 0x%x\n",
>> +    seq_printf(m, "\tPriority %d, GuC stage index: %u\n",
>>              client->priority,
>> -           client->stage_id,
>> -           client->proc_desc_offset);
>> -    seq_printf(m, "\tDoorbell id %d, offset: 0x%lx\n",
>> -           client->doorbell_id, client->doorbell_offset);
>> +           client->stage_id);
>>       /* Add more as required ... */
>>       return 0;
>> diff --git a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h 
>> b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
>> index 4b3cac73e291..fb03f8a90cac 100644
>> --- a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
>> +++ b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
>> @@ -36,5 +36,4 @@ selftest(reset, intel_reset_live_selftests)
>>   selftest(memory_region, intel_memory_region_live_selftests)
>>   selftest(hangcheck, intel_hangcheck_live_selftests)
>>   selftest(execlists, intel_execlists_live_selftests)
>> -selftest(guc, intel_guc_live_selftest)
>>   selftest(perf, i915_perf_live_selftests)
> 
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Re: [Intel-gfx] [PATCH 3/4] drm/i915/guc: kill doorbell code and selftests

[Daniele Ceraolo Spurio]

On 11/14/19 3:56 PM, John Harrison wrote:
> On 11/6/2019 14:25, Daniele Ceraolo Spurio wrote:
>> Instead of relying on the workqueue, the upcoming reworked GuC
>> submission flow will offer the host driver indipendent control over
> independent
> 
>> the execution status of each context submitted to GuC. As part of this,
>> the doorbell usage model has been reworked, with each doorbell being
>> paired to a single lrc and a doorbell ring representing new work
>> available for that specific context. This mechanism, however, limits
>> the number of contexts that can be registered with GuC to the number of
>> doorbells, which is an undesired limitation. Luckily, GuC will also
> Not exactly 'luckily'. More a case of, we said the doorbells won't work 
> for linux so can we have a H2G instead and they listened.
> 

fixed

>> provide a H2G that will allow the host to notify the GuC of work
>> available for a specified lrc, so we can use that mechanism instead of
>> relying on the doorbells. We can therefore drop the doorbell code we
>> currently have, also given the fact that in the unlikely case we'd want
>> to switch back to using doorbells we'd have to heavily rework it.
>> The workqueue will still have a use in the new interface to pass special
>> commands, so that code has been retained for now.
>>
>> With the doorbells gone and the GuC client becoming even simpler, the
>> existing GuC selftests don't give us any meaningful coverage so we can
>> remove them as well. Some selftests might come with the new code, but
>> they will look different from what we have now so if doesn't seem worth
>> it to keep the file around in the meantime.
>>
>> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Cc: John Harrison <John.C.Harrison@Intel.com>
>> Cc: Matthew Brost <matthew.brost@intel.com>
>> ---
>>   drivers/gpu/drm/i915/gt/uc/intel_guc.h        |   8 +-
>>   drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |   2 +-
>>   .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 373 ++----------------
>>   .../gpu/drm/i915/gt/uc/intel_guc_submission.h |   9 +-
>>   drivers/gpu/drm/i915/gt/uc/intel_uc.c         |   7 +-
>>   drivers/gpu/drm/i915/gt/uc/selftest_guc.c     | 299 --------------
>>   drivers/gpu/drm/i915/i915_debugfs.c           |  11 +-
>>   .../drm/i915/selftests/i915_live_selftests.h  |   1 -
>>   8 files changed, 42 insertions(+), 668 deletions(-)
>>   delete mode 100644 drivers/gpu/drm/i915/gt/uc/selftest_guc.c
>>
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h 
>> b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
>> index bf438f820c35..b2d1766e689a 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
>> @@ -20,8 +20,8 @@ struct __guc_ads_blob;
>>   /*
>>    * Top level structure of GuC. It handles firmware loading and 
>> manages client
>> - * pool and doorbells. intel_guc owns a intel_guc_client to replace 
>> the legacy
>> - * ExecList submission.
>> + * pool. intel_guc owns a intel_guc_client to replace the legacy 
>> ExecList
>> + * submission.
>>    */
>>   struct intel_guc {
>>       struct intel_uc_fw fw;
>> @@ -50,10 +50,6 @@ struct intel_guc {
>>       struct intel_guc_client *execbuf_client;
>> -    DECLARE_BITMAP(doorbell_bitmap, GUC_NUM_DOORBELLS);
>> -    /* Cyclic counter mod pagesize    */
>> -    u32 db_cacheline;
>> -
>>       /* Control params for fw initialization */
>>       u32 params[GUC_CTL_MAX_DWORDS];
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h 
>> b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
>> index a26a85d50209..1e8e4af7d9ca 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
>> @@ -31,7 +31,7 @@
>>   #define GUC_DOORBELL_INVALID        256
>> -#define GUC_DB_SIZE            (PAGE_SIZE)
>> +#define GUC_PD_SIZE            (PAGE_SIZE)
>>   #define GUC_WQ_SIZE            (PAGE_SIZE * 2)
>>   /* Work queue item header definitions */
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 
>> b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
>> index 6ac213ddbfa3..0088c3417641 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
>> @@ -30,8 +30,8 @@
>>    * GuC client:
>>    * A intel_guc_client refers to a submission path through GuC. 
>> Currently, there
>>    * is only one client, which is charged with all submissions to the 
>> GuC. This
>> - * struct is the owner of a doorbell, a process descriptor and a 
>> workqueue (all
>> - * of them inside a single gem object that contains all required 
>> pages for these
>> + * struct is the owner of a process descriptor and a workqueue (both 
>> of them
>> + * inside a single gem object that contains all required pages for these
>>    * elements).
>>    *
>>    * GuC stage descriptor:
>> @@ -39,13 +39,13 @@
>>    * descriptors, and shares them with the GuC.
>>    * Currently, there exists a 1:1 mapping between a intel_guc_client 
>> and a
>>    * guc_stage_desc (via the client's stage_id), so effectively only one
>> - * gets used. This stage descriptor lets the GuC know about the 
>> doorbell,
>> - * workqueue and process descriptor. Theoretically, it also lets the GuC
>> - * know about our HW contexts (context ID, etc...), but we actually
>> - * employ a kind of submission where the GuC uses the LRCA sent via 
>> the work
>> - * item instead (the single guc_stage_desc associated to execbuf client
>> - * contains information about the default kernel context only, but 
>> this is
>> - * essentially unused). This is called a "proxy" submission.
>> + * gets used. This stage descriptor lets the GuC know about the 
>> workqueue and
>> + * process descriptor. Theoretically, it also lets the GuC know about 
>> our HW
>> + * contexts (context ID, etc...), but we actually employ a kind of 
>> submission
>> + * where the GuC uses the LRCA sent via the work item instead (the 
>> single
>> + * guc_stage_desc associated to execbuf client contains information 
>> about the
>> + * default kernel context only, but this is essentially unused). This 
>> is called
>> + * a "proxy" submission.
>>    *
>>    * The Scratch registers:
>>    * There are 16 MMIO-based registers start from 0xC180. The kernel 
>> driver writes
>> @@ -56,10 +56,6 @@
>>    * then proceeds.
>>    * See intel_guc_send()
>>    *
>> - * Doorbells:
>> - * Doorbells are interrupts to uKernel. A doorbell is a single cache 
>> line (QW)
>> - * mapped into process space.
>> - *
>>    * Work Items:
>>    * There are several types of work items that the host may place into a
>>    * workqueue, each with its own requirements and limitations. 
>> Currently only
>> @@ -81,78 +77,6 @@ static inline bool is_high_priority(struct 
>> intel_guc_client *client)
>>           client->priority == GUC_CLIENT_PRIORITY_HIGH);
>>   }
>> -static int reserve_doorbell(struct intel_guc_client *client)
>> -{
>> -    unsigned long offset;
>> -    unsigned long end;
>> -    u16 id;
>> -
>> -    GEM_BUG_ON(client->doorbell_id != GUC_DOORBELL_INVALID);
>> -
>> -    /*
>> -     * The bitmap tracks which doorbell registers are currently in use.
>> -     * It is split into two halves; the first half is used for normal
>> -     * priority contexts, the second half for high-priority ones.
>> -     */
>> -    offset = 0;
>> -    end = GUC_NUM_DOORBELLS / 2;
>> -    if (is_high_priority(client)) {
>> -        offset = end;
>> -        end += offset;
>> -    }
>> -
>> -    id = find_next_zero_bit(client->guc->doorbell_bitmap, end, offset);
>> -    if (id == end)
>> -        return -ENOSPC;
>> -
>> -    __set_bit(id, client->guc->doorbell_bitmap);
>> -    client->doorbell_id = id;
>> -    DRM_DEBUG_DRIVER("client %u (high prio=%s) reserved doorbell: %d\n",
>> -             client->stage_id, yesno(is_high_priority(client)),
>> -             id);
>> -    return 0;
>> -}
>> -
>> -static bool has_doorbell(struct intel_guc_client *client)
>> -{
>> -    if (client->doorbell_id == GUC_DOORBELL_INVALID)
>> -        return false;
>> -
>> -    return test_bit(client->doorbell_id, client->guc->doorbell_bitmap);
>> -}
>> -
>> -static void unreserve_doorbell(struct intel_guc_client *client)
>> -{
>> -    GEM_BUG_ON(!has_doorbell(client));
>> -
>> -    __clear_bit(client->doorbell_id, client->guc->doorbell_bitmap);
>> -    client->doorbell_id = GUC_DOORBELL_INVALID;
>> -}
>> -
>> -/*
>> - * Tell the GuC to allocate or deallocate a specific doorbell
>> - */
>> -
>> -static int __guc_allocate_doorbell(struct intel_guc *guc, u32 stage_id)
>> -{
>> -    u32 action[] = {
>> -        INTEL_GUC_ACTION_ALLOCATE_DOORBELL,
>> -        stage_id
>> -    };
>> -
>> -    return intel_guc_send(guc, action, ARRAY_SIZE(action));
>> -}
>> -
>> -static int __guc_deallocate_doorbell(struct intel_guc *guc, u32 
>> stage_id)
>> -{
>> -    u32 action[] = {
>> -        INTEL_GUC_ACTION_DEALLOCATE_DOORBELL,
>> -        stage_id
>> -    };
>> -
>> -    return intel_guc_send(guc, action, ARRAY_SIZE(action));
>> -}
>> -
>>   static struct guc_stage_desc *__get_stage_desc(struct 
>> intel_guc_client *client)
>>   {
>>       struct guc_stage_desc *base = client->guc->stage_desc_pool_vaddr;
>> @@ -160,118 +84,10 @@ static struct guc_stage_desc 
>> *__get_stage_desc(struct intel_guc_client *client)
>>       return &base[client->stage_id];
>>   }
>> -/*
>> - * Initialise, update, or clear doorbell data shared with the GuC
>> - *
>> - * These functions modify shared data and so need access to the mapped
>> - * client object which contains the page being used for the doorbell
>> - */
>> -
>> -static void __update_doorbell_desc(struct intel_guc_client *client, 
>> u16 new_id)
>> -{
>> -    struct guc_stage_desc *desc;
>> -
>> -    /* Update the GuC's idea of the doorbell ID */
>> -    desc = __get_stage_desc(client);
>> -    desc->db_id = new_id;
>> -}
>> -
>> -static struct guc_doorbell_info *__get_doorbell(struct 
>> intel_guc_client *client)
>> -{
>> -    return client->vaddr + client->doorbell_offset;
>> -}
>> -
>> -static bool __doorbell_valid(struct intel_guc *guc, u16 db_id)
>> -{
>> -    struct intel_uncore *uncore = guc_to_gt(guc)->uncore;
>> -
>> -    GEM_BUG_ON(db_id >= GUC_NUM_DOORBELLS);
>> -    return intel_uncore_read(uncore, GEN8_DRBREGL(db_id)) & 
>> GEN8_DRB_VALID;
>> -}
>> -
>> -static void __init_doorbell(struct intel_guc_client *client)
>> -{
>> -    struct guc_doorbell_info *doorbell;
>> -
>> -    doorbell = __get_doorbell(client);
>> -    doorbell->db_status = GUC_DOORBELL_ENABLED;
>> -    doorbell->cookie = 0;
>> -}
>> -
>> -static void __fini_doorbell(struct intel_guc_client *client)
>> -{
>> -    struct guc_doorbell_info *doorbell;
>> -    u16 db_id = client->doorbell_id;
>> -
>> -    doorbell = __get_doorbell(client);
>> -    doorbell->db_status = GUC_DOORBELL_DISABLED;
>> -
>> -    /* Doorbell release flow requires that we wait for GEN8_DRB_VALID 
>> bit
>> -     * to go to zero after updating db_status before we call the GuC to
>> -     * release the doorbell
>> -     */
>> -    if (wait_for_us(!__doorbell_valid(client->guc, db_id), 10))
>> -        WARN_ONCE(true, "Doorbell never became invalid after 
>> disable\n");
>> -}
>> -
>> -static int create_doorbell(struct intel_guc_client *client)
>> -{
>> -    int ret;
>> -
>> -    if (WARN_ON(!has_doorbell(client)))
>> -        return -ENODEV; /* internal setup error, should never happen */
>> -
>> -    __update_doorbell_desc(client, client->doorbell_id);
>> -    __init_doorbell(client);
>> -
>> -    ret = __guc_allocate_doorbell(client->guc, client->stage_id);
>> -    if (ret) {
>> -        __fini_doorbell(client);
>> -        __update_doorbell_desc(client, GUC_DOORBELL_INVALID);
>> -        DRM_DEBUG_DRIVER("Couldn't create client %u doorbell: %d\n",
>> -                 client->stage_id, ret);
>> -        return ret;
>> -    }
>> -
>> -    return 0;
>> -}
>> -
>> -static int destroy_doorbell(struct intel_guc_client *client)
>> -{
>> -    int ret;
>> -
>> -    GEM_BUG_ON(!has_doorbell(client));
>> -
>> -    __fini_doorbell(client);
>> -    ret = __guc_deallocate_doorbell(client->guc, client->stage_id);
>> -    if (ret)
>> -        DRM_ERROR("Couldn't destroy client %u doorbell: %d\n",
>> -              client->stage_id, ret);
>> -
>> -    __update_doorbell_desc(client, GUC_DOORBELL_INVALID);
>> -
>> -    return ret;
>> -}
>> -
>> -static unsigned long __select_cacheline(struct intel_guc *guc)
>> -{
>> -    unsigned long offset;
>> -
>> -    /* Doorbell uses a single cache line within a page */
>> -    offset = offset_in_page(guc->db_cacheline);
>> -
>> -    /* Moving to next cache line to reduce contention */
>> -    guc->db_cacheline += cache_line_size();
>> -
>> -    DRM_DEBUG_DRIVER("reserved cacheline 0x%lx, next 0x%x, linesize 
>> %u\n",
>> -             offset, guc->db_cacheline, cache_line_size());
>> -    return offset;
>> -}
>> -
>>   static inline struct guc_process_desc *
>>   __get_process_desc(struct intel_guc_client *client)
>>   {
>> -    return client->vaddr + client->proc_desc_offset;
>> +    return client->vaddr;
>>   }
>>   /*
>> @@ -332,8 +148,8 @@ static void guc_stage_desc_pool_destroy(struct 
>> intel_guc *guc)
>>    * Initialise/clear the stage descriptor shared with the GuC firmware.
>>    *
>>    * This descriptor tells the GuC where (in GGTT space) to find the 
>> important
>> - * data structures relating to this client (doorbell, process 
>> descriptor,
>> - * write queue, etc).
>> + * data structures relating to this client (process descriptor, write 
>> queue,
>> + * etc).
>>    */
>>   static void guc_stage_desc_init(struct intel_guc_client *client)
>>   {
>> @@ -350,19 +166,14 @@ static void guc_stage_desc_init(struct 
>> intel_guc_client *client)
>>           desc->attribute |= GUC_STAGE_DESC_ATTR_PREEMPT;
>>       desc->stage_id = client->stage_id;
>>       desc->priority = client->priority;
>> -    desc->db_id = client->doorbell_id;
>>       /*
>> -     * The doorbell, process descriptor, and workqueue are all parts
>> -     * of the client object, which the GuC will reference via the GGTT
>> +     * The process descriptor and workqueue are all parts of the client
>> +     * object, which the GuC will reference via the GGTT
>>        */
>>       gfx_addr = intel_guc_ggtt_offset(guc, client->vma);
>> -    desc->db_trigger_phy = sg_dma_address(client->vma->pages->sgl) +
>> -                client->doorbell_offset;
>> -    desc->db_trigger_cpu = ptr_to_u64(__get_doorbell(client));
>> -    desc->db_trigger_uk = gfx_addr + client->doorbell_offset;
>> -    desc->process_desc = gfx_addr + client->proc_desc_offset;
>> -    desc->wq_addr = gfx_addr + GUC_DB_SIZE;
>> +    desc->process_desc = gfx_addr;
>> +    desc->wq_addr = gfx_addr + GUC_PD_SIZE;
>>       desc->wq_size = GUC_WQ_SIZE;
>>       desc->desc_private = ptr_to_u64(client);
>> @@ -408,48 +219,23 @@ static void guc_wq_item_append(struct 
>> intel_guc_client *client,
>>                     GUC_WQ_SIZE) < wqi_size);
>>       GEM_BUG_ON(wq_off & (wqi_size - 1));
>> -    /* WQ starts from the page after doorbell / process_desc */
>> -    wqi = client->vaddr + wq_off + GUC_DB_SIZE;
>> -
>> -    if (I915_SELFTEST_ONLY(client->use_nop_wqi)) {
>> -        wqi->header = WQ_TYPE_NOOP | (wqi_len << WQ_LEN_SHIFT);
>> -    } else {
>> -        /* Now fill in the 4-word work queue item */
>> -        wqi->header = WQ_TYPE_INORDER |
>> -                  (wqi_len << WQ_LEN_SHIFT) |
>> -                  (target_engine << WQ_TARGET_SHIFT) |
>> -                  WQ_NO_WCFLUSH_WAIT;
>> -        wqi->context_desc = context_desc;
>> -        wqi->submit_element_info = ring_tail << WQ_RING_TAIL_SHIFT;
>> -        GEM_BUG_ON(ring_tail > WQ_RING_TAIL_MAX);
>> -        wqi->fence_id = fence_id;
>> -    }
>> +    /* WQ starts from the page after process_desc */
>> +    wqi = client->vaddr + wq_off + GUC_PD_SIZE;
>> +
>> +    /* Now fill in the 4-word work queue item */
>> +    wqi->header = WQ_TYPE_INORDER |
>> +              (wqi_len << WQ_LEN_SHIFT) |
>> +              (target_engine << WQ_TARGET_SHIFT) |
>> +              WQ_NO_WCFLUSH_WAIT;
>> +    wqi->context_desc = context_desc;
>> +    wqi->submit_element_info = ring_tail << WQ_RING_TAIL_SHIFT;
>> +    GEM_BUG_ON(ring_tail > WQ_RING_TAIL_MAX);
>> +    wqi->fence_id = fence_id;
>>       /* Make the update visible to GuC */
>>       WRITE_ONCE(desc->tail, (wq_off + wqi_size) & (GUC_WQ_SIZE - 1));
>>   }
>> -static void guc_ring_doorbell(struct intel_guc_client *client)
>> -{
>> -    struct guc_doorbell_info *db;
>> -    u32 cookie;
>> -
>> -    lockdep_assert_held(&client->wq_lock);
>> -
>> -    /* pointer of current doorbell cacheline */
>> -    db = __get_doorbell(client);
>> -
>> -    /*
>> -     * We're not expecting the doorbell cookie to change behind our 
>> back,
>> -     * we also need to treat 0 as a reserved value.
>> -     */
>> -    cookie = READ_ONCE(db->cookie);
>> -    WARN_ON_ONCE(xchg(&db->cookie, cookie + 1 ?: cookie + 2) != cookie);
>> -
>> -    /* XXX: doorbell was lost and need to acquire it again */
>> -    GEM_BUG_ON(db->db_status != GUC_DOORBELL_ENABLED);
>> -}
>> -
>>   static void guc_add_request(struct intel_guc *guc, struct 
>> i915_request *rq)
>>   {
>>       struct intel_guc_client *client = guc->execbuf_client;
>> @@ -459,7 +245,6 @@ static void guc_add_request(struct intel_guc *guc, 
>> struct i915_request *rq)
>>       guc_wq_item_append(client, engine->guc_id, ctx_desc,
>>                  ring_tail, rq->fence.seqno);
>> -    guc_ring_doorbell(client);
>>   }
>>   /*
>> @@ -744,36 +529,6 @@ static void guc_reset_finish(struct 
>> intel_engine_cs *engine)
>>    * path of guc_submit() above.
>>    */
>> -/* Check that a doorbell register is in the expected state */
>> -static bool doorbell_ok(struct intel_guc *guc, u16 db_id)
>> -{
>> -    bool valid;
>> -
>> -    GEM_BUG_ON(db_id >= GUC_NUM_DOORBELLS);
>> -
>> -    valid = __doorbell_valid(guc, db_id);
>> -
>> -    if (test_bit(db_id, guc->doorbell_bitmap) == valid)
>> -        return true;
>> -
>> -    DRM_DEBUG_DRIVER("Doorbell %u has unexpected state: valid=%s\n",
>> -             db_id, yesno(valid));
>> -
>> -    return false;
>> -}
>> -
>> -static bool guc_verify_doorbells(struct intel_guc *guc)
>> -{
>> -    bool doorbells_ok = true;
>> -    u16 db_id;
>> -
>> -    for (db_id = 0; db_id < GUC_NUM_DOORBELLS; ++db_id)
>> -        if (!doorbell_ok(guc, db_id))
>> -            doorbells_ok = false;
>> -
>> -    return doorbells_ok;
>> -}
>> -
>>   /**
>>    * guc_client_alloc() - Allocate an intel_guc_client
>>    * @guc:    the intel_guc structure
>> @@ -798,7 +553,6 @@ guc_client_alloc(struct intel_guc *guc, u32 priority)
>>       client->guc = guc;
>>       client->priority = priority;
>> -    client->doorbell_id = GUC_DOORBELL_INVALID;
>>       spin_lock_init(&client->wq_lock);
>>       ret = ida_simple_get(&guc->stage_ids, 0, GUC_MAX_STAGE_DESCRIPTORS,
>> @@ -809,7 +563,7 @@ guc_client_alloc(struct intel_guc *guc, u32 priority)
>>       client->stage_id = ret;
>>       /* The first page is doorbell/proc_desc. Two followed pages are 
>> wq. */
> Need to update this comment as well.
> 

ack

>> -    vma = intel_guc_allocate_vma(guc, GUC_DB_SIZE + GUC_WQ_SIZE);
>> +    vma = intel_guc_allocate_vma(guc, GUC_PD_SIZE + GUC_WQ_SIZE);
>>       if (IS_ERR(vma)) {
>>           ret = PTR_ERR(vma);
>>           goto err_id;
>> @@ -825,31 +579,11 @@ guc_client_alloc(struct intel_guc *guc, u32 
>> priority)
>>       }
>>       client->vaddr = vaddr;
>> -    ret = reserve_doorbell(client);
>> -    if (ret)
>> -        goto err_vaddr;
>> -
>> -    client->doorbell_offset = __select_cacheline(guc);
>> -
>> -    /*
>> -     * Since the doorbell only requires a single cacheline, we can save
>> -     * space by putting the application process descriptor in the same
>> -     * page. Use the half of the page that doesn't include the doorbell.
>> -     */
>> -    if (client->doorbell_offset >= (GUC_DB_SIZE / 2))
>> -        client->proc_desc_offset = 0;
>> -    else
>> -        client->proc_desc_offset = (GUC_DB_SIZE / 2);
>> -
>>       DRM_DEBUG_DRIVER("new priority %u client %p: stage_id %u\n",
>>                priority, client, client->stage_id);
>> -    DRM_DEBUG_DRIVER("doorbell id %u, cacheline offset 0x%lx\n",
>> -             client->doorbell_id, client->doorbell_offset);
>>       return client;
>> -err_vaddr:
>> -    i915_gem_object_unpin_map(client->vma->obj);
>>   err_vma:
>>       i915_vma_unpin_and_release(&client->vma, 0);
>>   err_id:
>> @@ -861,7 +595,6 @@ guc_client_alloc(struct intel_guc *guc, u32 priority)
>>   static void guc_client_free(struct intel_guc_client *client)
>>   {
>> -    unreserve_doorbell(client);
>>       i915_vma_unpin_and_release(&client->vma, I915_VMA_RELEASE_MAP);
>>       ida_simple_remove(&client->guc->stage_ids, client->stage_id);
>>       kfree(client);
>> @@ -892,44 +625,21 @@ static void guc_clients_destroy(struct intel_guc 
>> *guc)
>>           guc_client_free(client);
>>   }
>> -static int __guc_client_enable(struct intel_guc_client *client)
>> +static void __guc_client_enable(struct intel_guc_client *client)
>>   {
>> -    int ret;
>> -
>>       guc_proc_desc_init(client);
>>       guc_stage_desc_init(client);
>> -
>> -    ret = create_doorbell(client);
>> -    if (ret)
>> -        goto fail;
>> -
>> -    return 0;
>> -
>> -fail:
>> -    guc_stage_desc_fini(client);
>> -    guc_proc_desc_fini(client);
>> -    return ret;
>>   }
>>   static void __guc_client_disable(struct intel_guc_client *client)
>>   {
>> -    /*
>> -     * By the time we're here, GuC may have already been reset. if 
>> that is
>> -     * the case, instead of trying (in vain) to communicate with it, 
>> let's
>> -     * just cleanup the doorbell HW and our internal state.
>> -     */
> This comment should be kept, only dropping the 'doorell HW and' phrase?
> 

I've updated to leave a note that GuC might've already been reset.

>> -    if (intel_guc_is_running(client->guc))
>> -        destroy_doorbell(client);
>> -    else
>> -        __fini_doorbell(client);
>> -
>>       guc_stage_desc_fini(client);
>>       guc_proc_desc_fini(client);
>>   }
>> -static int guc_clients_enable(struct intel_guc *guc)
>> +static void guc_clients_enable(struct intel_guc *guc)
>>   {
>> -    return __guc_client_enable(guc->execbuf_client);
>> +    __guc_client_enable(guc->execbuf_client);
>>   }
> This seems like a pretty pointless wrapper. I'm guessing there was a 
> mutex lock or something in here originally? Maybe time to drop the '__' 
> version and just move the actual work into this function?
> 

This goes away in the next patch, together with the rest of the client 
stuff.

Daniele

> Otherwise, looks good to me. So with some corrected comments:
> Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
> 
>>   static void guc_clients_disable(struct intel_guc *guc)
>> @@ -958,7 +668,6 @@ int intel_guc_submission_init(struct intel_guc *guc)
>>        */
>>       GEM_BUG_ON(!guc->stage_desc_pool);
>> -    WARN_ON(!guc_verify_doorbells(guc));
>>       ret = guc_clients_create(guc);
>>       if (ret)
>>           goto err_pool;
>> @@ -973,7 +682,6 @@ int intel_guc_submission_init(struct intel_guc *guc)
>>   void intel_guc_submission_fini(struct intel_guc *guc)
>>   {
>>       guc_clients_destroy(guc);
>> -    WARN_ON(!guc_verify_doorbells(guc));
>>       if (guc->stage_desc_pool)
>>           guc_stage_desc_pool_destroy(guc);
>> @@ -1089,16 +797,11 @@ static void guc_set_default_submission(struct 
>> intel_engine_cs *engine)
>>       GEM_BUG_ON(engine->irq_enable || engine->irq_disable);
>>   }
>> -int intel_guc_submission_enable(struct intel_guc *guc)
>> +void intel_guc_submission_enable(struct intel_guc *guc)
>>   {
>>       struct intel_gt *gt = guc_to_gt(guc);
>>       struct intel_engine_cs *engine;
>>       enum intel_engine_id id;
>> -    int err;
>> -
>> -    err = i915_inject_probe_error(gt->i915, -ENXIO);
>> -    if (err)
>> -        return err;
>>       /*
>>        * We're using GuC work items for submitting work through GuC. 
>> Since
>> @@ -1115,9 +818,7 @@ int intel_guc_submission_enable(struct intel_guc 
>> *guc)
>>       GEM_BUG_ON(!guc->execbuf_client);
>> -    err = guc_clients_enable(guc);
>> -    if (err)
>> -        return err;
>> +    guc_clients_enable(guc);
>>       /* Take over from manual control of ELSP (execlists) */
>>       guc_interrupts_capture(gt);
>> @@ -1126,8 +827,6 @@ int intel_guc_submission_enable(struct intel_guc 
>> *guc)
>>           engine->set_default_submission = guc_set_default_submission;
>>           engine->set_default_submission(engine);
>>       }
>> -
>> -    return 0;
>>   }
>>   void intel_guc_submission_disable(struct intel_guc *guc)
>> @@ -1155,7 +854,3 @@ void intel_guc_submission_init_early(struct 
>> intel_guc *guc)
>>   {
>>       guc->submission_supported = __guc_submission_support(guc);
>>   }
>> -
>> -#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
>> -#include "selftest_guc.c"
>> -#endif
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h 
>> b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
>> index 54d716828352..e2deb4e6f42a 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
>> @@ -44,21 +44,14 @@ struct intel_guc_client {
>>       /* bitmap of (host) engine ids */
>>       u32 priority;
>>       u32 stage_id;
>> -    u32 proc_desc_offset;
>> -
>> -    u16 doorbell_id;
>> -    unsigned long doorbell_offset;
>>       /* Protects GuC client's WQ access */
>>       spinlock_t wq_lock;
>> -
>> -    /* For testing purposes, use nop WQ items instead of real ones */
>> -    I915_SELFTEST_DECLARE(bool use_nop_wqi);
>>   };
>>   void intel_guc_submission_init_early(struct intel_guc *guc);
>>   int intel_guc_submission_init(struct intel_guc *guc);
>> -int intel_guc_submission_enable(struct intel_guc *guc);
>> +void intel_guc_submission_enable(struct intel_guc *guc);
>>   void intel_guc_submission_disable(struct intel_guc *guc);
>>   void intel_guc_submission_fini(struct intel_guc *guc);
>>   int intel_guc_preempt_work_create(struct intel_guc *guc);
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c 
>> b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
>> index 629b19377a29..c6519066a0f6 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
>> @@ -486,11 +486,8 @@ int intel_uc_init_hw(struct intel_uc *uc)
>>       if (ret)
>>           goto err_communication;
>> -    if (intel_uc_supports_guc_submission(uc)) {
>> -        ret = intel_guc_submission_enable(guc);
>> -        if (ret)
>> -            goto err_communication;
>> -    }
>> +    if (intel_uc_supports_guc_submission(uc))
>> +        intel_guc_submission_enable(guc);
>>       dev_info(i915->drm.dev, "%s firmware %s version %u.%u %s:%s\n",
>>            intel_uc_fw_type_repr(INTEL_UC_FW_TYPE_GUC), guc->fw.path,
>> diff --git a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c 
>> b/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
>> deleted file mode 100644
>> index d8a80388bd31..000000000000
>> --- a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
>> +++ /dev/null
>> @@ -1,299 +0,0 @@
>> -// SPDX-License-Identifier: MIT
>> -/*
>> - * Copyright © 2017 Intel Corporation
>> - */
>> -
>> -#include "i915_selftest.h"
>> -#include "gem/i915_gem_pm.h"
>> -
>> -/* max doorbell number + negative test for each client type */
>> -#define ATTEMPTS (GUC_NUM_DOORBELLS + GUC_CLIENT_PRIORITY_NUM)
>> -
>> -static struct intel_guc_client *clients[ATTEMPTS];
>> -
>> -static bool available_dbs(struct intel_guc *guc, u32 priority)
>> -{
>> -    unsigned long offset;
>> -    unsigned long end;
>> -    u16 id;
>> -
>> -    /* first half is used for normal priority, second half for high */
>> -    offset = 0;
>> -    end = GUC_NUM_DOORBELLS / 2;
>> -    if (priority <= GUC_CLIENT_PRIORITY_HIGH) {
>> -        offset = end;
>> -        end += offset;
>> -    }
>> -
>> -    id = find_next_zero_bit(guc->doorbell_bitmap, end, offset);
>> -    if (id < end)
>> -        return true;
>> -
>> -    return false;
>> -}
>> -
>> -static int check_all_doorbells(struct intel_guc *guc)
>> -{
>> -    u16 db_id;
>> -
>> -    pr_info_once("Max number of doorbells: %d", GUC_NUM_DOORBELLS);
>> -    for (db_id = 0; db_id < GUC_NUM_DOORBELLS; ++db_id) {
>> -        if (!doorbell_ok(guc, db_id)) {
>> -            pr_err("doorbell %d, not ok\n", db_id);
>> -            return -EIO;
>> -        }
>> -    }
>> -
>> -    return 0;
>> -}
>> -
>> -static int ring_doorbell_nop(struct intel_guc_client *client)
>> -{
>> -    struct guc_process_desc *desc = __get_process_desc(client);
>> -    int err;
>> -
>> -    client->use_nop_wqi = true;
>> -
>> -    spin_lock_irq(&client->wq_lock);
>> -
>> -    guc_wq_item_append(client, 0, 0, 0, 0);
>> -    guc_ring_doorbell(client);
>> -
>> -    spin_unlock_irq(&client->wq_lock);
>> -
>> -    client->use_nop_wqi = false;
>> -
>> -    /* if there are no issues GuC will update the WQ head and keep the
>> -     * WQ in active status
>> -     */
>> -    err = wait_for(READ_ONCE(desc->head) == READ_ONCE(desc->tail), 10);
>> -    if (err) {
>> -        pr_err("doorbell %u ring failed!\n", client->doorbell_id);
>> -        return -EIO;
>> -    }
>> -
>> -    if (desc->wq_status != WQ_STATUS_ACTIVE) {
>> -        pr_err("doorbell %u ring put WQ in bad state (%u)!\n",
>> -               client->doorbell_id, desc->wq_status);
>> -        return -EIO;
>> -    }
>> -
>> -    return 0;
>> -}
>> -
>> -/*
>> - * Basic client sanity check, handy to validate create_clients.
>> - */
>> -static int validate_client(struct intel_guc_client *client, int 
>> client_priority)
>> -{
>> -    if (client->priority != client_priority ||
>> -        client->doorbell_id == GUC_DOORBELL_INVALID)
>> -        return -EINVAL;
>> -    else
>> -        return 0;
>> -}
>> -
>> -static bool client_doorbell_in_sync(struct intel_guc_client *client)
>> -{
>> -    return !client || doorbell_ok(client->guc, client->doorbell_id);
>> -}
>> -
>> -/*
>> - * Check that we're able to synchronize guc_clients with their doorbells
>> - *
>> - * We're creating clients and reserving doorbells once, at module 
>> load. During
>> - * module lifetime, GuC, doorbell HW, and i915 state may go out of 
>> sync due to
>> - * GuC being reset. In other words - GuC clients are still around, 
>> but the
>> - * status of their doorbells may be incorrect. This is the reason behind
>> - * validating that the doorbells status expected by the driver 
>> matches what the
>> - * GuC/HW have.
>> - */
>> -static int igt_guc_clients(void *arg)
>> -{
>> -    struct intel_gt *gt = arg;
>> -    struct intel_guc *guc = &gt->uc.guc;
>> -    intel_wakeref_t wakeref;
>> -    int err = 0;
>> -
>> -    GEM_BUG_ON(!HAS_GT_UC(gt->i915));
>> -    wakeref = intel_runtime_pm_get(gt->uncore->rpm);
>> -
>> -    err = check_all_doorbells(guc);
>> -    if (err)
>> -        goto unlock;
>> -
>> -    /*
>> -     * Get rid of clients created during driver load because the test 
>> will
>> -     * recreate them.
>> -     */
>> -    guc_clients_disable(guc);
>> -    guc_clients_destroy(guc);
>> -    if (guc->execbuf_client) {
>> -        pr_err("guc_clients_destroy lied!\n");
>> -        err = -EINVAL;
>> -        goto unlock;
>> -    }
>> -
>> -    err = guc_clients_create(guc);
>> -    if (err) {
>> -        pr_err("Failed to create clients\n");
>> -        goto unlock;
>> -    }
>> -    GEM_BUG_ON(!guc->execbuf_client);
>> -
>> -    err = validate_client(guc->execbuf_client,
>> -                  GUC_CLIENT_PRIORITY_KMD_NORMAL);
>> -    if (err) {
>> -        pr_err("execbug client validation failed\n");
>> -        goto out;
>> -    }
>> -
>> -    /* the client should now have reserved a doorbell */
>> -    if (!has_doorbell(guc->execbuf_client)) {
>> -        pr_err("guc_clients_create didn't reserve doorbells\n");
>> -        err = -EINVAL;
>> -        goto out;
>> -    }
>> -
>> -    /* Now enable the clients */
>> -    guc_clients_enable(guc);
>> -
>> -    /* each client should now have received a doorbell */
>> -    if (!client_doorbell_in_sync(guc->execbuf_client)) {
>> -        pr_err("failed to initialize the doorbells\n");
>> -        err = -EINVAL;
>> -        goto out;
>> -    }
>> -
>> -    /*
>> -     * Basic test - an attempt to reallocate a valid doorbell to the
>> -     * client it is currently assigned should not cause a failure.
>> -     */
>> -    err = create_doorbell(guc->execbuf_client);
>> -
>> -out:
>> -    /*
>> -     * Leave clean state for other test, plus the driver always 
>> destroy the
>> -     * clients during unload.
>> -     */
>> -    guc_clients_disable(guc);
>> -    guc_clients_destroy(guc);
>> -    guc_clients_create(guc);
>> -    guc_clients_enable(guc);
>> -unlock:
>> -    intel_runtime_pm_put(gt->uncore->rpm, wakeref);
>> -    return err;
>> -}
>> -
>> -/*
>> - * Create as many clients as number of doorbells. Note that there's 
>> already
>> - * client(s)/doorbell(s) created during driver load, but this test 
>> creates
>> - * its own and do not interact with the existing ones.
>> - */
>> -static int igt_guc_doorbells(void *arg)
>> -{
>> -    struct intel_gt *gt = arg;
>> -    struct intel_guc *guc = &gt->uc.guc;
>> -    intel_wakeref_t wakeref;
>> -    int i, err = 0;
>> -    u16 db_id;
>> -
>> -    GEM_BUG_ON(!HAS_GT_UC(gt->i915));
>> -    wakeref = intel_runtime_pm_get(gt->uncore->rpm);
>> -
>> -    err = check_all_doorbells(guc);
>> -    if (err)
>> -        goto unlock;
>> -
>> -    for (i = 0; i < ATTEMPTS; i++) {
>> -        clients[i] = guc_client_alloc(guc, i % GUC_CLIENT_PRIORITY_NUM);
>> -
>> -        if (!clients[i]) {
>> -            pr_err("[%d] No guc client\n", i);
>> -            err = -EINVAL;
>> -            goto out;
>> -        }
>> -
>> -        if (IS_ERR(clients[i])) {
>> -            if (PTR_ERR(clients[i]) != -ENOSPC) {
>> -                pr_err("[%d] unexpected error\n", i);
>> -                err = PTR_ERR(clients[i]);
>> -                goto out;
>> -            }
>> -
>> -            if (available_dbs(guc, i % GUC_CLIENT_PRIORITY_NUM)) {
>> -                pr_err("[%d] non-db related alloc fail\n", i);
>> -                err = -EINVAL;
>> -                goto out;
>> -            }
>> -
>> -            /* expected, ran out of dbs for this client type */
>> -            continue;
>> -        }
>> -
>> -        /*
>> -         * The check below is only valid because we keep a doorbell
>> -         * assigned during the whole life of the client.
>> -         */
>> -        if (clients[i]->stage_id >= GUC_NUM_DOORBELLS) {
>> -            pr_err("[%d] more clients than doorbells (%d >= %d)\n",
>> -                   i, clients[i]->stage_id, GUC_NUM_DOORBELLS);
>> -            err = -EINVAL;
>> -            goto out;
>> -        }
>> -
>> -        err = validate_client(clients[i], i % GUC_CLIENT_PRIORITY_NUM);
>> -        if (err) {
>> -            pr_err("[%d] client_alloc sanity check failed!\n", i);
>> -            err = -EINVAL;
>> -            goto out;
>> -        }
>> -
>> -        db_id = clients[i]->doorbell_id;
>> -
>> -        err = __guc_client_enable(clients[i]);
>> -        if (err) {
>> -            pr_err("[%d] Failed to create a doorbell\n", i);
>> -            goto out;
>> -        }
>> -
>> -        /* doorbell id shouldn't change, we are holding the mutex */
>> -        if (db_id != clients[i]->doorbell_id) {
>> -            pr_err("[%d] doorbell id changed (%d != %d)\n",
>> -                   i, db_id, clients[i]->doorbell_id);
>> -            err = -EINVAL;
>> -            goto out;
>> -        }
>> -
>> -        err = check_all_doorbells(guc);
>> -        if (err)
>> -            goto out;
>> -
>> -        err = ring_doorbell_nop(clients[i]);
>> -        if (err)
>> -            goto out;
>> -    }
>> -
>> -out:
>> -    for (i = 0; i < ATTEMPTS; i++)
>> -        if (!IS_ERR_OR_NULL(clients[i])) {
>> -            __guc_client_disable(clients[i]);
>> -            guc_client_free(clients[i]);
>> -        }
>> -unlock:
>> -    intel_runtime_pm_put(gt->uncore->rpm, wakeref);
>> -    return err;
>> -}
>> -
>> -int intel_guc_live_selftest(struct drm_i915_private *i915)
>> -{
>> -    static const struct i915_subtest tests[] = {
>> -        SUBTEST(igt_guc_clients),
>> -        SUBTEST(igt_guc_doorbells),
>> -    };
>> -
>> -    if (!USES_GUC_SUBMISSION(i915))
>> -        return 0;
>> -
>> -    return intel_gt_live_subtests(tests, &i915->gt);
>> -}
>> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
>> b/drivers/gpu/drm/i915/i915_debugfs.c
>> index cab632791f73..5d5974e7f3ed 100644
>> --- a/drivers/gpu/drm/i915/i915_debugfs.c
>> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
>> @@ -1815,17 +1815,10 @@ static int i915_guc_info(struct seq_file *m, 
>> void *data)
>>       GEM_BUG_ON(!guc->execbuf_client);
>> -    seq_printf(m, "\nDoorbell map:\n");
>> -    seq_printf(m, "\t%*pb\n", GUC_NUM_DOORBELLS, guc->doorbell_bitmap);
>> -    seq_printf(m, "Doorbell next cacheline: 0x%x\n", guc->db_cacheline);
>> -
>>       seq_printf(m, "\nGuC execbuf client @ %p:\n", client);
>> -    seq_printf(m, "\tPriority %d, GuC stage index: %u, PD offset 
>> 0x%x\n",
>> +    seq_printf(m, "\tPriority %d, GuC stage index: %u\n",
>>              client->priority,
>> -           client->stage_id,
>> -           client->proc_desc_offset);
>> -    seq_printf(m, "\tDoorbell id %d, offset: 0x%lx\n",
>> -           client->doorbell_id, client->doorbell_offset);
>> +           client->stage_id);
>>       /* Add more as required ... */
>>       return 0;
>> diff --git a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h 
>> b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
>> index 4b3cac73e291..fb03f8a90cac 100644
>> --- a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
>> +++ b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
>> @@ -36,5 +36,4 @@ selftest(reset, intel_reset_live_selftests)
>>   selftest(memory_region, intel_memory_region_live_selftests)
>>   selftest(hangcheck, intel_hangcheck_live_selftests)
>>   selftest(execlists, intel_execlists_live_selftests)
>> -selftest(guc, intel_guc_live_selftest)
>>   selftest(perf, i915_perf_live_selftests)
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH 4/4] drm/i915/guc: kill the GuC client

[Daniele Ceraolo Spurio]

We now only use 1 client without any plan to add more. The client is
also only holding information about the WQ and the process desc, so we
can just move those in the intel_guc structure and always use stage_id
0.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_reset.c         |   6 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc.h        |   8 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |   1 -
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 272 +++++-------------
 .../gpu/drm/i915/gt/uc/intel_guc_submission.h |  45 +--
 drivers/gpu/drm/i915/i915_debugfs.c           |  11 -
 6 files changed, 87 insertions(+), 256 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index f03e000051c1..d2d88d0bc9d7 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -21,6 +21,7 @@
 #include "intel_reset.h"
 
 #include "uc/intel_guc.h"
+#include "uc/intel_guc_submission.h"
 
 #define RESET_MAX_RETRIES 3
 
@@ -1070,6 +1071,7 @@ static inline int intel_gt_reset_engine(struct intel_engine_cs *engine)
 int intel_engine_reset(struct intel_engine_cs *engine, const char *msg)
 {
 	struct intel_gt *gt = engine->gt;
+	bool uses_guc = intel_engine_in_guc_submission_mode(engine);
 	int ret;
 
 	GEM_TRACE("%s flags=%lx\n", engine->name, gt->reset.flags);
@@ -1085,14 +1087,14 @@ int intel_engine_reset(struct intel_engine_cs *engine, const char *msg)
 			   "Resetting %s for %s\n", engine->name, msg);
 	atomic_inc(&engine->i915->gpu_error.reset_engine_count[engine->uabi_class]);
 
-	if (!engine->gt->uc.guc.execbuf_client)
+	if (!uses_guc)
 		ret = intel_gt_reset_engine(engine);
 	else
 		ret = intel_guc_reset_engine(&engine->gt->uc.guc, engine);
 	if (ret) {
 		/* If we fail here, we expect to fallback to a global reset */
 		DRM_DEBUG_DRIVER("%sFailed to reset %s, ret=%d\n",
-				 engine->gt->uc.guc.execbuf_client ? "GuC " : "",
+				 uses_guc ? "GuC " : "",
 				 engine->name, ret);
 		goto out;
 	}
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index b2d1766e689a..cd09c912e361 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -46,9 +46,13 @@ struct intel_guc {
 
 	struct i915_vma *stage_desc_pool;
 	void *stage_desc_pool_vaddr;
-	struct ida stage_ids;
 
-	struct intel_guc_client *execbuf_client;
+	struct i915_vma *workqueue;
+	void *workqueue_vaddr;
+	spinlock_t wq_lock;
+
+	struct i915_vma *proc_desc;
+	void *proc_desc_vaddr;
 
 	/* Control params for fw initialization */
 	u32 params[GUC_CTL_MAX_DWORDS];
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index 1e8e4af7d9ca..a6b733c146c9 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -31,7 +31,6 @@
 
 #define GUC_DOORBELL_INVALID		256
 
-#define GUC_PD_SIZE			(PAGE_SIZE)
 #define GUC_WQ_SIZE			(PAGE_SIZE * 2)
 
 /* Work queue item header definitions */
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 0088c3417641..71788589f9fe 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -27,24 +27,13 @@
  * code) matches the old submission model and will be updated as part of the
  * upgrade to the new flow.
  *
- * GuC client:
- * A intel_guc_client refers to a submission path through GuC. Currently, there
- * is only one client, which is charged with all submissions to the GuC. This
- * struct is the owner of a process descriptor and a workqueue (both of them
- * inside a single gem object that contains all required pages for these
- * elements).
- *
  * GuC stage descriptor:
  * During initialization, the driver allocates a static pool of 1024 such
- * descriptors, and shares them with the GuC.
- * Currently, there exists a 1:1 mapping between a intel_guc_client and a
- * guc_stage_desc (via the client's stage_id), so effectively only one
- * gets used. This stage descriptor lets the GuC know about the workqueue and
+ * descriptors, and shares them with the GuC. Currently, we only use one
+ * descriptor. This stage descriptor lets the GuC know about the workqueue and
  * process descriptor. Theoretically, it also lets the GuC know about our HW
  * contexts (context ID, etc...), but we actually employ a kind of submission
- * where the GuC uses the LRCA sent via the work item instead (the single
- * guc_stage_desc associated to execbuf client contains information about the
- * default kernel context only, but this is essentially unused). This is called
+ * where the GuC uses the LRCA sent via the work item instead. This is called
  * a "proxy" submission.
  *
  * The Scratch registers:
@@ -71,33 +60,45 @@ static inline struct i915_priolist *to_priolist(struct rb_node *rb)
 	return rb_entry(rb, struct i915_priolist, node);
 }
 
-static inline bool is_high_priority(struct intel_guc_client *client)
+static struct guc_stage_desc *__get_stage_desc(struct intel_guc *guc, u32 id)
 {
-	return (client->priority == GUC_CLIENT_PRIORITY_KMD_HIGH ||
-		client->priority == GUC_CLIENT_PRIORITY_HIGH);
+	struct guc_stage_desc *base = guc->stage_desc_pool_vaddr;
+
+	return &base[id];
 }
 
-static struct guc_stage_desc *__get_stage_desc(struct intel_guc_client *client)
+static int guc_workqueue_create(struct intel_guc *guc)
 {
-	struct guc_stage_desc *base = client->guc->stage_desc_pool_vaddr;
-
-	return &base[client->stage_id];
+	return intel_guc_allocate_and_map_vma(guc, GUC_WQ_SIZE, &guc->workqueue,
+					      &guc->workqueue_vaddr);
 }
 
-static inline struct guc_process_desc *
-__get_process_desc(struct intel_guc_client *client)
+static void guc_workqueue_destroy(struct intel_guc *guc)
 {
-	return client->vaddr;
+	i915_vma_unpin_and_release(&guc->workqueue, I915_VMA_RELEASE_MAP);
 }
 
 /*
  * Initialise the process descriptor shared with the GuC firmware.
  */
-static void guc_proc_desc_init(struct intel_guc_client *client)
+static int guc_proc_desc_create(struct intel_guc *guc)
+{
+	const u32 size = PAGE_ALIGN(sizeof(struct guc_process_desc));
+
+	return intel_guc_allocate_and_map_vma(guc, size, &guc->proc_desc,
+					      &guc->proc_desc_vaddr);
+}
+
+static void guc_proc_desc_destroy(struct intel_guc *guc)
+{
+	i915_vma_unpin_and_release(&guc->proc_desc, I915_VMA_RELEASE_MAP);
+}
+
+static void guc_proc_desc_init(struct intel_guc *guc)
 {
 	struct guc_process_desc *desc;
 
-	desc = memset(__get_process_desc(client), 0, sizeof(*desc));
+	desc = memset(guc->proc_desc_vaddr, 0, sizeof(*desc));
 
 	/*
 	 * XXX: pDoorbell and WQVBaseAddress are pointers in process address
@@ -108,39 +109,27 @@ static void guc_proc_desc_init(struct intel_guc_client *client)
 	desc->wq_base_addr = 0;
 	desc->db_base_addr = 0;
 
-	desc->stage_id = client->stage_id;
 	desc->wq_size_bytes = GUC_WQ_SIZE;
 	desc->wq_status = WQ_STATUS_ACTIVE;
-	desc->priority = client->priority;
+	desc->priority = GUC_CLIENT_PRIORITY_KMD_NORMAL;
 }
 
-static void guc_proc_desc_fini(struct intel_guc_client *client)
+static void guc_proc_desc_fini(struct intel_guc *guc)
 {
-	struct guc_process_desc *desc;
-
-	desc = __get_process_desc(client);
-	memset(desc, 0, sizeof(*desc));
+	memset(guc->proc_desc_vaddr, 0, sizeof(struct guc_process_desc));
 }
 
 static int guc_stage_desc_pool_create(struct intel_guc *guc)
 {
 	u32 size = PAGE_ALIGN(sizeof(struct guc_stage_desc) *
 			      GUC_MAX_STAGE_DESCRIPTORS);
-	int ret;
-
-	ret = intel_guc_allocate_and_map_vma(guc, size, &guc->stage_desc_pool,
-					     &guc->stage_desc_pool_vaddr);
-	if (ret)
-		return ret;
-
-	ida_init(&guc->stage_ids);
 
-	return 0;
+	return intel_guc_allocate_and_map_vma(guc, size, &guc->stage_desc_pool,
+					      &guc->stage_desc_pool_vaddr);
 }
 
 static void guc_stage_desc_pool_destroy(struct intel_guc *guc)
 {
-	ida_destroy(&guc->stage_ids);
 	i915_vma_unpin_and_release(&guc->stage_desc_pool, I915_VMA_RELEASE_MAP);
 }
 
@@ -148,58 +137,49 @@ static void guc_stage_desc_pool_destroy(struct intel_guc *guc)
  * Initialise/clear the stage descriptor shared with the GuC firmware.
  *
  * This descriptor tells the GuC where (in GGTT space) to find the important
- * data structures relating to this client (process descriptor, write queue,
+ * data structures related to work submission (process descriptor, write queue,
  * etc).
  */
-static void guc_stage_desc_init(struct intel_guc_client *client)
+static void guc_stage_desc_init(struct intel_guc *guc)
 {
-	struct intel_guc *guc = client->guc;
 	struct guc_stage_desc *desc;
-	u32 gfx_addr;
 
-	desc = __get_stage_desc(client);
+	/* we only use 1 stage desc, so hardcode it to 0 */
+	desc = __get_stage_desc(guc, 0);
 	memset(desc, 0, sizeof(*desc));
 
 	desc->attribute = GUC_STAGE_DESC_ATTR_ACTIVE |
 			  GUC_STAGE_DESC_ATTR_KERNEL;
-	if (is_high_priority(client))
-		desc->attribute |= GUC_STAGE_DESC_ATTR_PREEMPT;
-	desc->stage_id = client->stage_id;
-	desc->priority = client->priority;
 
-	/*
-	 * The process descriptor and workqueue are all parts of the client
-	 * object, which the GuC will reference via the GGTT
-	 */
-	gfx_addr = intel_guc_ggtt_offset(guc, client->vma);
-	desc->process_desc = gfx_addr;
-	desc->wq_addr = gfx_addr + GUC_PD_SIZE;
-	desc->wq_size = GUC_WQ_SIZE;
+	desc->stage_id = 0;
+	desc->priority = GUC_CLIENT_PRIORITY_KMD_NORMAL;
 
-	desc->desc_private = ptr_to_u64(client);
+	desc->process_desc = intel_guc_ggtt_offset(guc, guc->proc_desc);
+	desc->wq_addr = intel_guc_ggtt_offset(guc, guc->workqueue);
+	desc->wq_size = GUC_WQ_SIZE;
 }
 
-static void guc_stage_desc_fini(struct intel_guc_client *client)
+static void guc_stage_desc_fini(struct intel_guc *guc)
 {
 	struct guc_stage_desc *desc;
 
-	desc = __get_stage_desc(client);
+	desc = __get_stage_desc(guc, 0);
 	memset(desc, 0, sizeof(*desc));
 }
 
 /* Construct a Work Item and append it to the GuC's Work Queue */
-static void guc_wq_item_append(struct intel_guc_client *client,
+static void guc_wq_item_append(struct intel_guc *guc,
 			       u32 target_engine, u32 context_desc,
 			       u32 ring_tail, u32 fence_id)
 {
 	/* wqi_len is in DWords, and does not include the one-word header */
 	const size_t wqi_size = sizeof(struct guc_wq_item);
 	const u32 wqi_len = wqi_size / sizeof(u32) - 1;
-	struct guc_process_desc *desc = __get_process_desc(client);
+	struct guc_process_desc *desc = guc->proc_desc_vaddr;
 	struct guc_wq_item *wqi;
 	u32 wq_off;
 
-	lockdep_assert_held(&client->wq_lock);
+	lockdep_assert_held(&guc->wq_lock);
 
 	/* For now workqueue item is 4 DWs; workqueue buffer is 2 pages. So we
 	 * should not have the case where structure wqi is across page, neither
@@ -220,7 +200,7 @@ static void guc_wq_item_append(struct intel_guc_client *client,
 	GEM_BUG_ON(wq_off & (wqi_size - 1));
 
 	/* WQ starts from the page after process_desc */
-	wqi = client->vaddr + wq_off + GUC_PD_SIZE;
+	wqi = guc->workqueue_vaddr + wq_off;
 
 	/* Now fill in the 4-word work queue item */
 	wqi->header = WQ_TYPE_INORDER |
@@ -238,12 +218,11 @@ static void guc_wq_item_append(struct intel_guc_client *client,
 
 static void guc_add_request(struct intel_guc *guc, struct i915_request *rq)
 {
-	struct intel_guc_client *client = guc->execbuf_client;
 	struct intel_engine_cs *engine = rq->engine;
 	u32 ctx_desc = lower_32_bits(rq->hw_context->lrc_desc);
 	u32 ring_tail = intel_ring_set_tail(rq->ring, rq->tail) / sizeof(u64);
 
-	guc_wq_item_append(client, engine->guc_id, ctx_desc,
+	guc_wq_item_append(guc, engine->guc_id, ctx_desc,
 			   ring_tail, rq->fence.seqno);
 }
 
@@ -267,9 +246,8 @@ static void guc_submit(struct intel_engine_cs *engine,
 		       struct i915_request **end)
 {
 	struct intel_guc *guc = &engine->gt->uc.guc;
-	struct intel_guc_client *client = guc->execbuf_client;
 
-	spin_lock(&client->wq_lock);
+	spin_lock(&guc->wq_lock);
 
 	do {
 		struct i915_request *rq = *out++;
@@ -278,7 +256,7 @@ static void guc_submit(struct intel_engine_cs *engine,
 		guc_add_request(guc, rq);
 	} while (out != end);
 
-	spin_unlock(&client->wq_lock);
+	spin_unlock(&guc->wq_lock);
 }
 
 static inline int rq_prio(const struct i915_request *rq)
@@ -529,125 +507,6 @@ static void guc_reset_finish(struct intel_engine_cs *engine)
  * path of guc_submit() above.
  */
 
-/**
- * guc_client_alloc() - Allocate an intel_guc_client
- * @guc:	the intel_guc structure
- * @priority:	four levels priority _CRITICAL, _HIGH, _NORMAL and _LOW
- *		The kernel client to replace ExecList submission is created with
- *		NORMAL priority. Priority of a client for scheduler can be HIGH,
- *		while a preemption context can use CRITICAL.
- *
- * Return:	An intel_guc_client object if success, else NULL.
- */
-static struct intel_guc_client *
-guc_client_alloc(struct intel_guc *guc, u32 priority)
-{
-	struct intel_guc_client *client;
-	struct i915_vma *vma;
-	void *vaddr;
-	int ret;
-
-	client = kzalloc(sizeof(*client), GFP_KERNEL);
-	if (!client)
-		return ERR_PTR(-ENOMEM);
-
-	client->guc = guc;
-	client->priority = priority;
-	spin_lock_init(&client->wq_lock);
-
-	ret = ida_simple_get(&guc->stage_ids, 0, GUC_MAX_STAGE_DESCRIPTORS,
-			     GFP_KERNEL);
-	if (ret < 0)
-		goto err_client;
-
-	client->stage_id = ret;
-
-	/* The first page is doorbell/proc_desc. Two followed pages are wq. */
-	vma = intel_guc_allocate_vma(guc, GUC_PD_SIZE + GUC_WQ_SIZE);
-	if (IS_ERR(vma)) {
-		ret = PTR_ERR(vma);
-		goto err_id;
-	}
-
-	/* We'll keep just the first (doorbell/proc) page permanently kmap'd. */
-	client->vma = vma;
-
-	vaddr = i915_gem_object_pin_map(vma->obj, I915_MAP_WB);
-	if (IS_ERR(vaddr)) {
-		ret = PTR_ERR(vaddr);
-		goto err_vma;
-	}
-	client->vaddr = vaddr;
-
-	DRM_DEBUG_DRIVER("new priority %u client %p: stage_id %u\n",
-			 priority, client, client->stage_id);
-
-	return client;
-
-err_vma:
-	i915_vma_unpin_and_release(&client->vma, 0);
-err_id:
-	ida_simple_remove(&guc->stage_ids, client->stage_id);
-err_client:
-	kfree(client);
-	return ERR_PTR(ret);
-}
-
-static void guc_client_free(struct intel_guc_client *client)
-{
-	i915_vma_unpin_and_release(&client->vma, I915_VMA_RELEASE_MAP);
-	ida_simple_remove(&client->guc->stage_ids, client->stage_id);
-	kfree(client);
-}
-
-static int guc_clients_create(struct intel_guc *guc)
-{
-	struct intel_guc_client *client;
-
-	GEM_BUG_ON(guc->execbuf_client);
-
-	client = guc_client_alloc(guc, GUC_CLIENT_PRIORITY_KMD_NORMAL);
-	if (IS_ERR(client)) {
-		DRM_ERROR("Failed to create GuC client for submission!\n");
-		return PTR_ERR(client);
-	}
-	guc->execbuf_client = client;
-
-	return 0;
-}
-
-static void guc_clients_destroy(struct intel_guc *guc)
-{
-	struct intel_guc_client *client;
-
-	client = fetch_and_zero(&guc->execbuf_client);
-	if (client)
-		guc_client_free(client);
-}
-
-static void __guc_client_enable(struct intel_guc_client *client)
-{
-	guc_proc_desc_init(client);
-	guc_stage_desc_init(client);
-}
-
-static void __guc_client_disable(struct intel_guc_client *client)
-{
-	guc_stage_desc_fini(client);
-	guc_proc_desc_fini(client);
-}
-
-static void guc_clients_enable(struct intel_guc *guc)
-{
-	__guc_client_enable(guc->execbuf_client);
-}
-
-static void guc_clients_disable(struct intel_guc *guc)
-{
-	if (guc->execbuf_client)
-		__guc_client_disable(guc->execbuf_client);
-}
-
 /*
  * Set up the memory resources to be shared with the GuC (via the GGTT)
  * at firmware loading time.
@@ -668,12 +527,20 @@ int intel_guc_submission_init(struct intel_guc *guc)
 	 */
 	GEM_BUG_ON(!guc->stage_desc_pool);
 
-	ret = guc_clients_create(guc);
+	ret = guc_workqueue_create(guc);
 	if (ret)
 		goto err_pool;
 
+	ret = guc_proc_desc_create(guc);
+	if (ret)
+		goto err_workqueue;
+
+	spin_lock_init(&guc->wq_lock);
+
 	return 0;
 
+err_workqueue:
+	guc_workqueue_destroy(guc);
 err_pool:
 	guc_stage_desc_pool_destroy(guc);
 	return ret;
@@ -681,10 +548,11 @@ int intel_guc_submission_init(struct intel_guc *guc)
 
 void intel_guc_submission_fini(struct intel_guc *guc)
 {
-	guc_clients_destroy(guc);
-
-	if (guc->stage_desc_pool)
+	if (guc->stage_desc_pool) {
+		guc_proc_desc_destroy(guc);
+		guc_workqueue_destroy(guc);
 		guc_stage_desc_pool_destroy(guc);
+	}
 }
 
 static void guc_interrupts_capture(struct intel_gt *gt)
@@ -816,9 +684,8 @@ void intel_guc_submission_enable(struct intel_guc *guc)
 		     sizeof(struct guc_wq_item) *
 		     I915_NUM_ENGINES > GUC_WQ_SIZE);
 
-	GEM_BUG_ON(!guc->execbuf_client);
-
-	guc_clients_enable(guc);
+	guc_proc_desc_init(guc);
+	guc_stage_desc_init(guc);
 
 	/* Take over from manual control of ELSP (execlists) */
 	guc_interrupts_capture(gt);
@@ -836,7 +703,9 @@ void intel_guc_submission_disable(struct intel_guc *guc)
 	GEM_BUG_ON(gt->awake); /* GT should be parked first */
 
 	guc_interrupts_release(gt);
-	guc_clients_disable(guc);
+
+	guc_stage_desc_fini(guc);
+	guc_proc_desc_fini(guc);
 }
 
 static bool __guc_submission_support(struct intel_guc *guc)
@@ -854,3 +723,8 @@ void intel_guc_submission_init_early(struct intel_guc *guc)
 {
 	guc->submission_supported = __guc_submission_support(guc);
 }
+
+bool intel_engine_in_guc_submission_mode(const struct intel_engine_cs *engine)
+{
+	return engine->set_default_submission == guc_set_default_submission;
+}
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
index e2deb4e6f42a..e402a2932592 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
@@ -6,48 +6,10 @@
 #ifndef _INTEL_GUC_SUBMISSION_H_
 #define _INTEL_GUC_SUBMISSION_H_
 
-#include <linux/spinlock.h>
+#include <linux/types.h>
 
-#include "gt/intel_engine_types.h"
-
-#include "i915_gem.h"
-#include "i915_selftest.h"
-
-struct drm_i915_private;
-
-/*
- * This structure primarily describes the GEM object shared with the GuC.
- * The specs sometimes refer to this object as a "GuC context", but we use
- * the term "client" to avoid confusion with hardware contexts. This
- * GEM object is held for the entire lifetime of our interaction with
- * the GuC, being allocated before the GuC is loaded with its firmware.
- * Because there's no way to update the address used by the GuC after
- * initialisation, the shared object must stay pinned into the GGTT as
- * long as the GuC is in use. We also keep the first page (only) mapped
- * into kernel address space, as it includes shared data that must be
- * updated on every request submission.
- *
- * The single GEM object described here is actually made up of several
- * separate areas, as far as the GuC is concerned. The first page (kept
- * kmap'd) includes the "process descriptor" which holds sequence data for
- * the doorbell, and one cacheline which actually *is* the doorbell; a
- * write to this will "ring the doorbell" (i.e. send an interrupt to the
- * GuC). The subsequent  pages of the client object constitute the work
- * queue (a circular array of work items), again described in the process
- * descriptor. Work queue pages are mapped momentarily as required.
- */
-struct intel_guc_client {
-	struct i915_vma *vma;
-	void *vaddr;
-	struct intel_guc *guc;
-
-	/* bitmap of (host) engine ids */
-	u32 priority;
-	u32 stage_id;
-
-	/* Protects GuC client's WQ access */
-	spinlock_t wq_lock;
-};
+struct intel_guc;
+struct intel_engine_cs;
 
 void intel_guc_submission_init_early(struct intel_guc *guc);
 int intel_guc_submission_init(struct intel_guc *guc);
@@ -56,5 +18,6 @@ void intel_guc_submission_disable(struct intel_guc *guc);
 void intel_guc_submission_fini(struct intel_guc *guc);
 int intel_guc_preempt_work_create(struct intel_guc *guc);
 void intel_guc_preempt_work_destroy(struct intel_guc *guc);
+bool intel_engine_in_guc_submission_mode(const struct intel_engine_cs *engine);
 
 #endif
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 5d5974e7f3ed..f32e7b016197 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1802,23 +1802,12 @@ static void i915_guc_log_info(struct seq_file *m,
 static int i915_guc_info(struct seq_file *m, void *data)
 {
 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
-	const struct intel_guc *guc = &dev_priv->gt.uc.guc;
-	struct intel_guc_client *client = guc->execbuf_client;
 
 	if (!USES_GUC(dev_priv))
 		return -ENODEV;
 
 	i915_guc_log_info(m, dev_priv);
 
-	if (!USES_GUC_SUBMISSION(dev_priv))
-		return 0;
-
-	GEM_BUG_ON(!guc->execbuf_client);
-
-	seq_printf(m, "\nGuC execbuf client @ %p:\n", client);
-	seq_printf(m, "\tPriority %d, GuC stage index: %u\n",
-		   client->priority,
-		   client->stage_id);
 	/* Add more as required ... */
 
 	return 0;
-- 
2.23.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH 4/4] drm/i915/guc: kill the GuC client

[Daniele Ceraolo Spurio]

We now only use 1 client without any plan to add more. The client is
also only holding information about the WQ and the process desc, so we
can just move those in the intel_guc structure and always use stage_id
0.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_reset.c         |   6 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc.h        |   8 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |   1 -
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 272 +++++-------------
 .../gpu/drm/i915/gt/uc/intel_guc_submission.h |  45 +--
 drivers/gpu/drm/i915/i915_debugfs.c           |  11 -
 6 files changed, 87 insertions(+), 256 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index f03e000051c1..d2d88d0bc9d7 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -21,6 +21,7 @@
 #include "intel_reset.h"
 
 #include "uc/intel_guc.h"
+#include "uc/intel_guc_submission.h"
 
 #define RESET_MAX_RETRIES 3
 
@@ -1070,6 +1071,7 @@ static inline int intel_gt_reset_engine(struct intel_engine_cs *engine)
 int intel_engine_reset(struct intel_engine_cs *engine, const char *msg)
 {
 	struct intel_gt *gt = engine->gt;
+	bool uses_guc = intel_engine_in_guc_submission_mode(engine);
 	int ret;
 
 	GEM_TRACE("%s flags=%lx\n", engine->name, gt->reset.flags);
@@ -1085,14 +1087,14 @@ int intel_engine_reset(struct intel_engine_cs *engine, const char *msg)
 			   "Resetting %s for %s\n", engine->name, msg);
 	atomic_inc(&engine->i915->gpu_error.reset_engine_count[engine->uabi_class]);
 
-	if (!engine->gt->uc.guc.execbuf_client)
+	if (!uses_guc)
 		ret = intel_gt_reset_engine(engine);
 	else
 		ret = intel_guc_reset_engine(&engine->gt->uc.guc, engine);
 	if (ret) {
 		/* If we fail here, we expect to fallback to a global reset */
 		DRM_DEBUG_DRIVER("%sFailed to reset %s, ret=%d\n",
-				 engine->gt->uc.guc.execbuf_client ? "GuC " : "",
+				 uses_guc ? "GuC " : "",
 				 engine->name, ret);
 		goto out;
 	}
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index b2d1766e689a..cd09c912e361 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -46,9 +46,13 @@ struct intel_guc {
 
 	struct i915_vma *stage_desc_pool;
 	void *stage_desc_pool_vaddr;
-	struct ida stage_ids;
 
-	struct intel_guc_client *execbuf_client;
+	struct i915_vma *workqueue;
+	void *workqueue_vaddr;
+	spinlock_t wq_lock;
+
+	struct i915_vma *proc_desc;
+	void *proc_desc_vaddr;
 
 	/* Control params for fw initialization */
 	u32 params[GUC_CTL_MAX_DWORDS];
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index 1e8e4af7d9ca..a6b733c146c9 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -31,7 +31,6 @@
 
 #define GUC_DOORBELL_INVALID		256
 
-#define GUC_PD_SIZE			(PAGE_SIZE)
 #define GUC_WQ_SIZE			(PAGE_SIZE * 2)
 
 /* Work queue item header definitions */
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 0088c3417641..71788589f9fe 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -27,24 +27,13 @@
  * code) matches the old submission model and will be updated as part of the
  * upgrade to the new flow.
  *
- * GuC client:
- * A intel_guc_client refers to a submission path through GuC. Currently, there
- * is only one client, which is charged with all submissions to the GuC. This
- * struct is the owner of a process descriptor and a workqueue (both of them
- * inside a single gem object that contains all required pages for these
- * elements).
- *
  * GuC stage descriptor:
  * During initialization, the driver allocates a static pool of 1024 such
- * descriptors, and shares them with the GuC.
- * Currently, there exists a 1:1 mapping between a intel_guc_client and a
- * guc_stage_desc (via the client's stage_id), so effectively only one
- * gets used. This stage descriptor lets the GuC know about the workqueue and
+ * descriptors, and shares them with the GuC. Currently, we only use one
+ * descriptor. This stage descriptor lets the GuC know about the workqueue and
  * process descriptor. Theoretically, it also lets the GuC know about our HW
  * contexts (context ID, etc...), but we actually employ a kind of submission
- * where the GuC uses the LRCA sent via the work item instead (the single
- * guc_stage_desc associated to execbuf client contains information about the
- * default kernel context only, but this is essentially unused). This is called
+ * where the GuC uses the LRCA sent via the work item instead. This is called
  * a "proxy" submission.
  *
  * The Scratch registers:
@@ -71,33 +60,45 @@ static inline struct i915_priolist *to_priolist(struct rb_node *rb)
 	return rb_entry(rb, struct i915_priolist, node);
 }
 
-static inline bool is_high_priority(struct intel_guc_client *client)
+static struct guc_stage_desc *__get_stage_desc(struct intel_guc *guc, u32 id)
 {
-	return (client->priority == GUC_CLIENT_PRIORITY_KMD_HIGH ||
-		client->priority == GUC_CLIENT_PRIORITY_HIGH);
+	struct guc_stage_desc *base = guc->stage_desc_pool_vaddr;
+
+	return &base[id];
 }
 
-static struct guc_stage_desc *__get_stage_desc(struct intel_guc_client *client)
+static int guc_workqueue_create(struct intel_guc *guc)
 {
-	struct guc_stage_desc *base = client->guc->stage_desc_pool_vaddr;
-
-	return &base[client->stage_id];
+	return intel_guc_allocate_and_map_vma(guc, GUC_WQ_SIZE, &guc->workqueue,
+					      &guc->workqueue_vaddr);
 }
 
-static inline struct guc_process_desc *
-__get_process_desc(struct intel_guc_client *client)
+static void guc_workqueue_destroy(struct intel_guc *guc)
 {
-	return client->vaddr;
+	i915_vma_unpin_and_release(&guc->workqueue, I915_VMA_RELEASE_MAP);
 }
 
 /*
  * Initialise the process descriptor shared with the GuC firmware.
  */
-static void guc_proc_desc_init(struct intel_guc_client *client)
+static int guc_proc_desc_create(struct intel_guc *guc)
+{
+	const u32 size = PAGE_ALIGN(sizeof(struct guc_process_desc));
+
+	return intel_guc_allocate_and_map_vma(guc, size, &guc->proc_desc,
+					      &guc->proc_desc_vaddr);
+}
+
+static void guc_proc_desc_destroy(struct intel_guc *guc)
+{
+	i915_vma_unpin_and_release(&guc->proc_desc, I915_VMA_RELEASE_MAP);
+}
+
+static void guc_proc_desc_init(struct intel_guc *guc)
 {
 	struct guc_process_desc *desc;
 
-	desc = memset(__get_process_desc(client), 0, sizeof(*desc));
+	desc = memset(guc->proc_desc_vaddr, 0, sizeof(*desc));
 
 	/*
 	 * XXX: pDoorbell and WQVBaseAddress are pointers in process address
@@ -108,39 +109,27 @@ static void guc_proc_desc_init(struct intel_guc_client *client)
 	desc->wq_base_addr = 0;
 	desc->db_base_addr = 0;
 
-	desc->stage_id = client->stage_id;
 	desc->wq_size_bytes = GUC_WQ_SIZE;
 	desc->wq_status = WQ_STATUS_ACTIVE;
-	desc->priority = client->priority;
+	desc->priority = GUC_CLIENT_PRIORITY_KMD_NORMAL;
 }
 
-static void guc_proc_desc_fini(struct intel_guc_client *client)
+static void guc_proc_desc_fini(struct intel_guc *guc)
 {
-	struct guc_process_desc *desc;
-
-	desc = __get_process_desc(client);
-	memset(desc, 0, sizeof(*desc));
+	memset(guc->proc_desc_vaddr, 0, sizeof(struct guc_process_desc));
 }
 
 static int guc_stage_desc_pool_create(struct intel_guc *guc)
 {
 	u32 size = PAGE_ALIGN(sizeof(struct guc_stage_desc) *
 			      GUC_MAX_STAGE_DESCRIPTORS);
-	int ret;
-
-	ret = intel_guc_allocate_and_map_vma(guc, size, &guc->stage_desc_pool,
-					     &guc->stage_desc_pool_vaddr);
-	if (ret)
-		return ret;
-
-	ida_init(&guc->stage_ids);
 
-	return 0;
+	return intel_guc_allocate_and_map_vma(guc, size, &guc->stage_desc_pool,
+					      &guc->stage_desc_pool_vaddr);
 }
 
 static void guc_stage_desc_pool_destroy(struct intel_guc *guc)
 {
-	ida_destroy(&guc->stage_ids);
 	i915_vma_unpin_and_release(&guc->stage_desc_pool, I915_VMA_RELEASE_MAP);
 }
 
@@ -148,58 +137,49 @@ static void guc_stage_desc_pool_destroy(struct intel_guc *guc)
  * Initialise/clear the stage descriptor shared with the GuC firmware.
  *
  * This descriptor tells the GuC where (in GGTT space) to find the important
- * data structures relating to this client (process descriptor, write queue,
+ * data structures related to work submission (process descriptor, write queue,
  * etc).
  */
-static void guc_stage_desc_init(struct intel_guc_client *client)
+static void guc_stage_desc_init(struct intel_guc *guc)
 {
-	struct intel_guc *guc = client->guc;
 	struct guc_stage_desc *desc;
-	u32 gfx_addr;
 
-	desc = __get_stage_desc(client);
+	/* we only use 1 stage desc, so hardcode it to 0 */
+	desc = __get_stage_desc(guc, 0);
 	memset(desc, 0, sizeof(*desc));
 
 	desc->attribute = GUC_STAGE_DESC_ATTR_ACTIVE |
 			  GUC_STAGE_DESC_ATTR_KERNEL;
-	if (is_high_priority(client))
-		desc->attribute |= GUC_STAGE_DESC_ATTR_PREEMPT;
-	desc->stage_id = client->stage_id;
-	desc->priority = client->priority;
 
-	/*
-	 * The process descriptor and workqueue are all parts of the client
-	 * object, which the GuC will reference via the GGTT
-	 */
-	gfx_addr = intel_guc_ggtt_offset(guc, client->vma);
-	desc->process_desc = gfx_addr;
-	desc->wq_addr = gfx_addr + GUC_PD_SIZE;
-	desc->wq_size = GUC_WQ_SIZE;
+	desc->stage_id = 0;
+	desc->priority = GUC_CLIENT_PRIORITY_KMD_NORMAL;
 
-	desc->desc_private = ptr_to_u64(client);
+	desc->process_desc = intel_guc_ggtt_offset(guc, guc->proc_desc);
+	desc->wq_addr = intel_guc_ggtt_offset(guc, guc->workqueue);
+	desc->wq_size = GUC_WQ_SIZE;
 }
 
-static void guc_stage_desc_fini(struct intel_guc_client *client)
+static void guc_stage_desc_fini(struct intel_guc *guc)
 {
 	struct guc_stage_desc *desc;
 
-	desc = __get_stage_desc(client);
+	desc = __get_stage_desc(guc, 0);
 	memset(desc, 0, sizeof(*desc));
 }
 
 /* Construct a Work Item and append it to the GuC's Work Queue */
-static void guc_wq_item_append(struct intel_guc_client *client,
+static void guc_wq_item_append(struct intel_guc *guc,
 			       u32 target_engine, u32 context_desc,
 			       u32 ring_tail, u32 fence_id)
 {
 	/* wqi_len is in DWords, and does not include the one-word header */
 	const size_t wqi_size = sizeof(struct guc_wq_item);
 	const u32 wqi_len = wqi_size / sizeof(u32) - 1;
-	struct guc_process_desc *desc = __get_process_desc(client);
+	struct guc_process_desc *desc = guc->proc_desc_vaddr;
 	struct guc_wq_item *wqi;
 	u32 wq_off;
 
-	lockdep_assert_held(&client->wq_lock);
+	lockdep_assert_held(&guc->wq_lock);
 
 	/* For now workqueue item is 4 DWs; workqueue buffer is 2 pages. So we
 	 * should not have the case where structure wqi is across page, neither
@@ -220,7 +200,7 @@ static void guc_wq_item_append(struct intel_guc_client *client,
 	GEM_BUG_ON(wq_off & (wqi_size - 1));
 
 	/* WQ starts from the page after process_desc */
-	wqi = client->vaddr + wq_off + GUC_PD_SIZE;
+	wqi = guc->workqueue_vaddr + wq_off;
 
 	/* Now fill in the 4-word work queue item */
 	wqi->header = WQ_TYPE_INORDER |
@@ -238,12 +218,11 @@ static void guc_wq_item_append(struct intel_guc_client *client,
 
 static void guc_add_request(struct intel_guc *guc, struct i915_request *rq)
 {
-	struct intel_guc_client *client = guc->execbuf_client;
 	struct intel_engine_cs *engine = rq->engine;
 	u32 ctx_desc = lower_32_bits(rq->hw_context->lrc_desc);
 	u32 ring_tail = intel_ring_set_tail(rq->ring, rq->tail) / sizeof(u64);
 
-	guc_wq_item_append(client, engine->guc_id, ctx_desc,
+	guc_wq_item_append(guc, engine->guc_id, ctx_desc,
 			   ring_tail, rq->fence.seqno);
 }
 
@@ -267,9 +246,8 @@ static void guc_submit(struct intel_engine_cs *engine,
 		       struct i915_request **end)
 {
 	struct intel_guc *guc = &engine->gt->uc.guc;
-	struct intel_guc_client *client = guc->execbuf_client;
 
-	spin_lock(&client->wq_lock);
+	spin_lock(&guc->wq_lock);
 
 	do {
 		struct i915_request *rq = *out++;
@@ -278,7 +256,7 @@ static void guc_submit(struct intel_engine_cs *engine,
 		guc_add_request(guc, rq);
 	} while (out != end);
 
-	spin_unlock(&client->wq_lock);
+	spin_unlock(&guc->wq_lock);
 }
 
 static inline int rq_prio(const struct i915_request *rq)
@@ -529,125 +507,6 @@ static void guc_reset_finish(struct intel_engine_cs *engine)
  * path of guc_submit() above.
  */
 
-/**
- * guc_client_alloc() - Allocate an intel_guc_client
- * @guc:	the intel_guc structure
- * @priority:	four levels priority _CRITICAL, _HIGH, _NORMAL and _LOW
- *		The kernel client to replace ExecList submission is created with
- *		NORMAL priority. Priority of a client for scheduler can be HIGH,
- *		while a preemption context can use CRITICAL.
- *
- * Return:	An intel_guc_client object if success, else NULL.
- */
-static struct intel_guc_client *
-guc_client_alloc(struct intel_guc *guc, u32 priority)
-{
-	struct intel_guc_client *client;
-	struct i915_vma *vma;
-	void *vaddr;
-	int ret;
-
-	client = kzalloc(sizeof(*client), GFP_KERNEL);
-	if (!client)
-		return ERR_PTR(-ENOMEM);
-
-	client->guc = guc;
-	client->priority = priority;
-	spin_lock_init(&client->wq_lock);
-
-	ret = ida_simple_get(&guc->stage_ids, 0, GUC_MAX_STAGE_DESCRIPTORS,
-			     GFP_KERNEL);
-	if (ret < 0)
-		goto err_client;
-
-	client->stage_id = ret;
-
-	/* The first page is doorbell/proc_desc. Two followed pages are wq. */
-	vma = intel_guc_allocate_vma(guc, GUC_PD_SIZE + GUC_WQ_SIZE);
-	if (IS_ERR(vma)) {
-		ret = PTR_ERR(vma);
-		goto err_id;
-	}
-
-	/* We'll keep just the first (doorbell/proc) page permanently kmap'd. */
-	client->vma = vma;
-
-	vaddr = i915_gem_object_pin_map(vma->obj, I915_MAP_WB);
-	if (IS_ERR(vaddr)) {
-		ret = PTR_ERR(vaddr);
-		goto err_vma;
-	}
-	client->vaddr = vaddr;
-
-	DRM_DEBUG_DRIVER("new priority %u client %p: stage_id %u\n",
-			 priority, client, client->stage_id);
-
-	return client;
-
-err_vma:
-	i915_vma_unpin_and_release(&client->vma, 0);
-err_id:
-	ida_simple_remove(&guc->stage_ids, client->stage_id);
-err_client:
-	kfree(client);
-	return ERR_PTR(ret);
-}
-
-static void guc_client_free(struct intel_guc_client *client)
-{
-	i915_vma_unpin_and_release(&client->vma, I915_VMA_RELEASE_MAP);
-	ida_simple_remove(&client->guc->stage_ids, client->stage_id);
-	kfree(client);
-}
-
-static int guc_clients_create(struct intel_guc *guc)
-{
-	struct intel_guc_client *client;
-
-	GEM_BUG_ON(guc->execbuf_client);
-
-	client = guc_client_alloc(guc, GUC_CLIENT_PRIORITY_KMD_NORMAL);
-	if (IS_ERR(client)) {
-		DRM_ERROR("Failed to create GuC client for submission!\n");
-		return PTR_ERR(client);
-	}
-	guc->execbuf_client = client;
-
-	return 0;
-}
-
-static void guc_clients_destroy(struct intel_guc *guc)
-{
-	struct intel_guc_client *client;
-
-	client = fetch_and_zero(&guc->execbuf_client);
-	if (client)
-		guc_client_free(client);
-}
-
-static void __guc_client_enable(struct intel_guc_client *client)
-{
-	guc_proc_desc_init(client);
-	guc_stage_desc_init(client);
-}
-
-static void __guc_client_disable(struct intel_guc_client *client)
-{
-	guc_stage_desc_fini(client);
-	guc_proc_desc_fini(client);
-}
-
-static void guc_clients_enable(struct intel_guc *guc)
-{
-	__guc_client_enable(guc->execbuf_client);
-}
-
-static void guc_clients_disable(struct intel_guc *guc)
-{
-	if (guc->execbuf_client)
-		__guc_client_disable(guc->execbuf_client);
-}
-
 /*
  * Set up the memory resources to be shared with the GuC (via the GGTT)
  * at firmware loading time.
@@ -668,12 +527,20 @@ int intel_guc_submission_init(struct intel_guc *guc)
 	 */
 	GEM_BUG_ON(!guc->stage_desc_pool);
 
-	ret = guc_clients_create(guc);
+	ret = guc_workqueue_create(guc);
 	if (ret)
 		goto err_pool;
 
+	ret = guc_proc_desc_create(guc);
+	if (ret)
+		goto err_workqueue;
+
+	spin_lock_init(&guc->wq_lock);
+
 	return 0;
 
+err_workqueue:
+	guc_workqueue_destroy(guc);
 err_pool:
 	guc_stage_desc_pool_destroy(guc);
 	return ret;
@@ -681,10 +548,11 @@ int intel_guc_submission_init(struct intel_guc *guc)
 
 void intel_guc_submission_fini(struct intel_guc *guc)
 {
-	guc_clients_destroy(guc);
-
-	if (guc->stage_desc_pool)
+	if (guc->stage_desc_pool) {
+		guc_proc_desc_destroy(guc);
+		guc_workqueue_destroy(guc);
 		guc_stage_desc_pool_destroy(guc);
+	}
 }
 
 static void guc_interrupts_capture(struct intel_gt *gt)
@@ -816,9 +684,8 @@ void intel_guc_submission_enable(struct intel_guc *guc)
 		     sizeof(struct guc_wq_item) *
 		     I915_NUM_ENGINES > GUC_WQ_SIZE);
 
-	GEM_BUG_ON(!guc->execbuf_client);
-
-	guc_clients_enable(guc);
+	guc_proc_desc_init(guc);
+	guc_stage_desc_init(guc);
 
 	/* Take over from manual control of ELSP (execlists) */
 	guc_interrupts_capture(gt);
@@ -836,7 +703,9 @@ void intel_guc_submission_disable(struct intel_guc *guc)
 	GEM_BUG_ON(gt->awake); /* GT should be parked first */
 
 	guc_interrupts_release(gt);
-	guc_clients_disable(guc);
+
+	guc_stage_desc_fini(guc);
+	guc_proc_desc_fini(guc);
 }
 
 static bool __guc_submission_support(struct intel_guc *guc)
@@ -854,3 +723,8 @@ void intel_guc_submission_init_early(struct intel_guc *guc)
 {
 	guc->submission_supported = __guc_submission_support(guc);
 }
+
+bool intel_engine_in_guc_submission_mode(const struct intel_engine_cs *engine)
+{
+	return engine->set_default_submission == guc_set_default_submission;
+}
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
index e2deb4e6f42a..e402a2932592 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
@@ -6,48 +6,10 @@
 #ifndef _INTEL_GUC_SUBMISSION_H_
 #define _INTEL_GUC_SUBMISSION_H_
 
-#include <linux/spinlock.h>
+#include <linux/types.h>
 
-#include "gt/intel_engine_types.h"
-
-#include "i915_gem.h"
-#include "i915_selftest.h"
-
-struct drm_i915_private;
-
-/*
- * This structure primarily describes the GEM object shared with the GuC.
- * The specs sometimes refer to this object as a "GuC context", but we use
- * the term "client" to avoid confusion with hardware contexts. This
- * GEM object is held for the entire lifetime of our interaction with
- * the GuC, being allocated before the GuC is loaded with its firmware.
- * Because there's no way to update the address used by the GuC after
- * initialisation, the shared object must stay pinned into the GGTT as
- * long as the GuC is in use. We also keep the first page (only) mapped
- * into kernel address space, as it includes shared data that must be
- * updated on every request submission.
- *
- * The single GEM object described here is actually made up of several
- * separate areas, as far as the GuC is concerned. The first page (kept
- * kmap'd) includes the "process descriptor" which holds sequence data for
- * the doorbell, and one cacheline which actually *is* the doorbell; a
- * write to this will "ring the doorbell" (i.e. send an interrupt to the
- * GuC). The subsequent  pages of the client object constitute the work
- * queue (a circular array of work items), again described in the process
- * descriptor. Work queue pages are mapped momentarily as required.
- */
-struct intel_guc_client {
-	struct i915_vma *vma;
-	void *vaddr;
-	struct intel_guc *guc;
-
-	/* bitmap of (host) engine ids */
-	u32 priority;
-	u32 stage_id;
-
-	/* Protects GuC client's WQ access */
-	spinlock_t wq_lock;
-};
+struct intel_guc;
+struct intel_engine_cs;
 
 void intel_guc_submission_init_early(struct intel_guc *guc);
 int intel_guc_submission_init(struct intel_guc *guc);
@@ -56,5 +18,6 @@ void intel_guc_submission_disable(struct intel_guc *guc);
 void intel_guc_submission_fini(struct intel_guc *guc);
 int intel_guc_preempt_work_create(struct intel_guc *guc);
 void intel_guc_preempt_work_destroy(struct intel_guc *guc);
+bool intel_engine_in_guc_submission_mode(const struct intel_engine_cs *engine);
 
 #endif
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 5d5974e7f3ed..f32e7b016197 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1802,23 +1802,12 @@ static void i915_guc_log_info(struct seq_file *m,
 static int i915_guc_info(struct seq_file *m, void *data)
 {
 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
-	const struct intel_guc *guc = &dev_priv->gt.uc.guc;
-	struct intel_guc_client *client = guc->execbuf_client;
 
 	if (!USES_GUC(dev_priv))
 		return -ENODEV;
 
 	i915_guc_log_info(m, dev_priv);
 
-	if (!USES_GUC_SUBMISSION(dev_priv))
-		return 0;
-
-	GEM_BUG_ON(!guc->execbuf_client);
-
-	seq_printf(m, "\nGuC execbuf client @ %p:\n", client);
-	seq_printf(m, "\tPriority %d, GuC stage index: %u\n",
-		   client->priority,
-		   client->stage_id);
 	/* Add more as required ... */
 
 	return 0;
-- 
2.23.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 4/4] drm/i915/guc: kill the GuC client

[John Harrison]

On 11/6/2019 14:25, Daniele Ceraolo Spurio wrote:
> We now only use 1 client without any plan to add more. The client is
> also only holding information about the WQ and the process desc, so we
> can just move those in the intel_guc structure and always use stage_id
> 0.
>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> ---
>   drivers/gpu/drm/i915/gt/intel_reset.c         |   6 +-
>   drivers/gpu/drm/i915/gt/uc/intel_guc.h        |   8 +-
>   drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |   1 -
>   .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 272 +++++-------------
>   .../gpu/drm/i915/gt/uc/intel_guc_submission.h |  45 +--
>   drivers/gpu/drm/i915/i915_debugfs.c           |  11 -
>   6 files changed, 87 insertions(+), 256 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
> index f03e000051c1..d2d88d0bc9d7 100644
> --- a/drivers/gpu/drm/i915/gt/intel_reset.c
> +++ b/drivers/gpu/drm/i915/gt/intel_reset.c
> @@ -21,6 +21,7 @@
>   #include "intel_reset.h"
>   
>   #include "uc/intel_guc.h"
> +#include "uc/intel_guc_submission.h"
>   
>   #define RESET_MAX_RETRIES 3
>   
> @@ -1070,6 +1071,7 @@ static inline int intel_gt_reset_engine(struct intel_engine_cs *engine)
>   int intel_engine_reset(struct intel_engine_cs *engine, const char *msg)
>   {
>   	struct intel_gt *gt = engine->gt;
> +	bool uses_guc = intel_engine_in_guc_submission_mode(engine);
>   	int ret;
>   
>   	GEM_TRACE("%s flags=%lx\n", engine->name, gt->reset.flags);
> @@ -1085,14 +1087,14 @@ int intel_engine_reset(struct intel_engine_cs *engine, const char *msg)
>   			   "Resetting %s for %s\n", engine->name, msg);
>   	atomic_inc(&engine->i915->gpu_error.reset_engine_count[engine->uabi_class]);
>   
> -	if (!engine->gt->uc.guc.execbuf_client)
> +	if (!uses_guc)
>   		ret = intel_gt_reset_engine(engine);
>   	else
>   		ret = intel_guc_reset_engine(&engine->gt->uc.guc, engine);
>   	if (ret) {
>   		/* If we fail here, we expect to fallback to a global reset */
>   		DRM_DEBUG_DRIVER("%sFailed to reset %s, ret=%d\n",
> -				 engine->gt->uc.guc.execbuf_client ? "GuC " : "",
> +				 uses_guc ? "GuC " : "",
>   				 engine->name, ret);
>   		goto out;
>   	}
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> index b2d1766e689a..cd09c912e361 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> @@ -46,9 +46,13 @@ struct intel_guc {
>   
>   	struct i915_vma *stage_desc_pool;
>   	void *stage_desc_pool_vaddr;
> -	struct ida stage_ids;
>   
> -	struct intel_guc_client *execbuf_client;
> +	struct i915_vma *workqueue;
> +	void *workqueue_vaddr;
> +	spinlock_t wq_lock;
> +
> +	struct i915_vma *proc_desc;
> +	void *proc_desc_vaddr;
>   
>   	/* Control params for fw initialization */
>   	u32 params[GUC_CTL_MAX_DWORDS];
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> index 1e8e4af7d9ca..a6b733c146c9 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> @@ -31,7 +31,6 @@
>   
>   #define GUC_DOORBELL_INVALID		256
>   
> -#define GUC_PD_SIZE			(PAGE_SIZE)
>   #define GUC_WQ_SIZE			(PAGE_SIZE * 2)
>   
>   /* Work queue item header definitions */
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> index 0088c3417641..71788589f9fe 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> @@ -27,24 +27,13 @@
>    * code) matches the old submission model and will be updated as part of the
>    * upgrade to the new flow.
>    *
> - * GuC client:
> - * A intel_guc_client refers to a submission path through GuC. Currently, there
> - * is only one client, which is charged with all submissions to the GuC. This
> - * struct is the owner of a process descriptor and a workqueue (both of them
> - * inside a single gem object that contains all required pages for these
> - * elements).
> - *
>    * GuC stage descriptor:
>    * During initialization, the driver allocates a static pool of 1024 such
> - * descriptors, and shares them with the GuC.
> - * Currently, there exists a 1:1 mapping between a intel_guc_client and a
> - * guc_stage_desc (via the client's stage_id), so effectively only one
> - * gets used. This stage descriptor lets the GuC know about the workqueue and
> + * descriptors, and shares them with the GuC. Currently, we only use one
> + * descriptor. This stage descriptor lets the GuC know about the workqueue and
>    * process descriptor. Theoretically, it also lets the GuC know about our HW
>    * contexts (context ID, etc...), but we actually employ a kind of submission
> - * where the GuC uses the LRCA sent via the work item instead (the single
> - * guc_stage_desc associated to execbuf client contains information about the
> - * default kernel context only, but this is essentially unused). This is called
> + * where the GuC uses the LRCA sent via the work item instead. This is called
>    * a "proxy" submission.
>    *
>    * The Scratch registers:
> @@ -71,33 +60,45 @@ static inline struct i915_priolist *to_priolist(struct rb_node *rb)
>   	return rb_entry(rb, struct i915_priolist, node);
>   }
>   
> -static inline bool is_high_priority(struct intel_guc_client *client)
> +static struct guc_stage_desc *__get_stage_desc(struct intel_guc *guc, u32 id)
>   {
> -	return (client->priority == GUC_CLIENT_PRIORITY_KMD_HIGH ||
> -		client->priority == GUC_CLIENT_PRIORITY_HIGH);
> +	struct guc_stage_desc *base = guc->stage_desc_pool_vaddr;
> +
> +	return &base[id];
>   }
>   
> -static struct guc_stage_desc *__get_stage_desc(struct intel_guc_client *client)
> +static int guc_workqueue_create(struct intel_guc *guc)
>   {
> -	struct guc_stage_desc *base = client->guc->stage_desc_pool_vaddr;
> -
> -	return &base[client->stage_id];
> +	return intel_guc_allocate_and_map_vma(guc, GUC_WQ_SIZE, &guc->workqueue,
> +					      &guc->workqueue_vaddr);
>   }
>   
> -static inline struct guc_process_desc *
> -__get_process_desc(struct intel_guc_client *client)
> +static void guc_workqueue_destroy(struct intel_guc *guc)
>   {
> -	return client->vaddr;
> +	i915_vma_unpin_and_release(&guc->workqueue, I915_VMA_RELEASE_MAP);
>   }
>   
>   /*
>    * Initialise the process descriptor shared with the GuC firmware.
>    */
> -static void guc_proc_desc_init(struct intel_guc_client *client)
> +static int guc_proc_desc_create(struct intel_guc *guc)
> +{
> +	const u32 size = PAGE_ALIGN(sizeof(struct guc_process_desc));
> +
> +	return intel_guc_allocate_and_map_vma(guc, size, &guc->proc_desc,
> +					      &guc->proc_desc_vaddr);
> +}
> +
> +static void guc_proc_desc_destroy(struct intel_guc *guc)
> +{
> +	i915_vma_unpin_and_release(&guc->proc_desc, I915_VMA_RELEASE_MAP);
> +}
> +
> +static void guc_proc_desc_init(struct intel_guc *guc)
>   {
>   	struct guc_process_desc *desc;
>   
> -	desc = memset(__get_process_desc(client), 0, sizeof(*desc));
> +	desc = memset(guc->proc_desc_vaddr, 0, sizeof(*desc));
>   
>   	/*
>   	 * XXX: pDoorbell and WQVBaseAddress are pointers in process address
> @@ -108,39 +109,27 @@ static void guc_proc_desc_init(struct intel_guc_client *client)
>   	desc->wq_base_addr = 0;
>   	desc->db_base_addr = 0;
>   
> -	desc->stage_id = client->stage_id;
>   	desc->wq_size_bytes = GUC_WQ_SIZE;
>   	desc->wq_status = WQ_STATUS_ACTIVE;
> -	desc->priority = client->priority;
> +	desc->priority = GUC_CLIENT_PRIORITY_KMD_NORMAL;
>   }
>   
> -static void guc_proc_desc_fini(struct intel_guc_client *client)
> +static void guc_proc_desc_fini(struct intel_guc *guc)
>   {
> -	struct guc_process_desc *desc;
> -
> -	desc = __get_process_desc(client);
> -	memset(desc, 0, sizeof(*desc));
> +	memset(guc->proc_desc_vaddr, 0, sizeof(struct guc_process_desc));
>   }
>   
>   static int guc_stage_desc_pool_create(struct intel_guc *guc)
>   {
>   	u32 size = PAGE_ALIGN(sizeof(struct guc_stage_desc) *
>   			      GUC_MAX_STAGE_DESCRIPTORS);
> -	int ret;
> -
> -	ret = intel_guc_allocate_and_map_vma(guc, size, &guc->stage_desc_pool,
> -					     &guc->stage_desc_pool_vaddr);
> -	if (ret)
> -		return ret;
> -
> -	ida_init(&guc->stage_ids);
>   
> -	return 0;
> +	return intel_guc_allocate_and_map_vma(guc, size, &guc->stage_desc_pool,
> +					      &guc->stage_desc_pool_vaddr);
>   }
>   
>   static void guc_stage_desc_pool_destroy(struct intel_guc *guc)
>   {
> -	ida_destroy(&guc->stage_ids);
>   	i915_vma_unpin_and_release(&guc->stage_desc_pool, I915_VMA_RELEASE_MAP);
>   }
>   
> @@ -148,58 +137,49 @@ static void guc_stage_desc_pool_destroy(struct intel_guc *guc)
>    * Initialise/clear the stage descriptor shared with the GuC firmware.
>    *
>    * This descriptor tells the GuC where (in GGTT space) to find the important
> - * data structures relating to this client (process descriptor, write queue,
> + * data structures related to work submission (process descriptor, write queue,
>    * etc).
>    */
> -static void guc_stage_desc_init(struct intel_guc_client *client)
> +static void guc_stage_desc_init(struct intel_guc *guc)
>   {
> -	struct intel_guc *guc = client->guc;
>   	struct guc_stage_desc *desc;
> -	u32 gfx_addr;
>   
> -	desc = __get_stage_desc(client);
> +	/* we only use 1 stage desc, so hardcode it to 0 */
> +	desc = __get_stage_desc(guc, 0);
>   	memset(desc, 0, sizeof(*desc));
>   
>   	desc->attribute = GUC_STAGE_DESC_ATTR_ACTIVE |
>   			  GUC_STAGE_DESC_ATTR_KERNEL;
> -	if (is_high_priority(client))
> -		desc->attribute |= GUC_STAGE_DESC_ATTR_PREEMPT;
> -	desc->stage_id = client->stage_id;
> -	desc->priority = client->priority;
>   
> -	/*
> -	 * The process descriptor and workqueue are all parts of the client
> -	 * object, which the GuC will reference via the GGTT
> -	 */
> -	gfx_addr = intel_guc_ggtt_offset(guc, client->vma);
> -	desc->process_desc = gfx_addr;
> -	desc->wq_addr = gfx_addr + GUC_PD_SIZE;
> -	desc->wq_size = GUC_WQ_SIZE;
> +	desc->stage_id = 0;
> +	desc->priority = GUC_CLIENT_PRIORITY_KMD_NORMAL;
>   
> -	desc->desc_private = ptr_to_u64(client);
> +	desc->process_desc = intel_guc_ggtt_offset(guc, guc->proc_desc);
> +	desc->wq_addr = intel_guc_ggtt_offset(guc, guc->workqueue);
> +	desc->wq_size = GUC_WQ_SIZE;
>   }
>   
> -static void guc_stage_desc_fini(struct intel_guc_client *client)
> +static void guc_stage_desc_fini(struct intel_guc *guc)
>   {
>   	struct guc_stage_desc *desc;
>   
> -	desc = __get_stage_desc(client);
> +	desc = __get_stage_desc(guc, 0);
>   	memset(desc, 0, sizeof(*desc));
>   }
>   
>   /* Construct a Work Item and append it to the GuC's Work Queue */
> -static void guc_wq_item_append(struct intel_guc_client *client,
> +static void guc_wq_item_append(struct intel_guc *guc,
>   			       u32 target_engine, u32 context_desc,
>   			       u32 ring_tail, u32 fence_id)
>   {
>   	/* wqi_len is in DWords, and does not include the one-word header */
>   	const size_t wqi_size = sizeof(struct guc_wq_item);
>   	const u32 wqi_len = wqi_size / sizeof(u32) - 1;
> -	struct guc_process_desc *desc = __get_process_desc(client);
> +	struct guc_process_desc *desc = guc->proc_desc_vaddr;
>   	struct guc_wq_item *wqi;
>   	u32 wq_off;
>   
> -	lockdep_assert_held(&client->wq_lock);
> +	lockdep_assert_held(&guc->wq_lock);
>   
>   	/* For now workqueue item is 4 DWs; workqueue buffer is 2 pages. So we
>   	 * should not have the case where structure wqi is across page, neither
> @@ -220,7 +200,7 @@ static void guc_wq_item_append(struct intel_guc_client *client,
>   	GEM_BUG_ON(wq_off & (wqi_size - 1));
>   
>   	/* WQ starts from the page after process_desc */
This comment is now invalid. With that fixed:
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>

> -	wqi = client->vaddr + wq_off + GUC_PD_SIZE;
> +	wqi = guc->workqueue_vaddr + wq_off;
>   
>   	/* Now fill in the 4-word work queue item */
>   	wqi->header = WQ_TYPE_INORDER |
> @@ -238,12 +218,11 @@ static void guc_wq_item_append(struct intel_guc_client *client,
>   
>   static void guc_add_request(struct intel_guc *guc, struct i915_request *rq)
>   {
> -	struct intel_guc_client *client = guc->execbuf_client;
>   	struct intel_engine_cs *engine = rq->engine;
>   	u32 ctx_desc = lower_32_bits(rq->hw_context->lrc_desc);
>   	u32 ring_tail = intel_ring_set_tail(rq->ring, rq->tail) / sizeof(u64);
>   
> -	guc_wq_item_append(client, engine->guc_id, ctx_desc,
> +	guc_wq_item_append(guc, engine->guc_id, ctx_desc,
>   			   ring_tail, rq->fence.seqno);
>   }
>   
> @@ -267,9 +246,8 @@ static void guc_submit(struct intel_engine_cs *engine,
>   		       struct i915_request **end)
>   {
>   	struct intel_guc *guc = &engine->gt->uc.guc;
> -	struct intel_guc_client *client = guc->execbuf_client;
>   
> -	spin_lock(&client->wq_lock);
> +	spin_lock(&guc->wq_lock);
>   
>   	do {
>   		struct i915_request *rq = *out++;
> @@ -278,7 +256,7 @@ static void guc_submit(struct intel_engine_cs *engine,
>   		guc_add_request(guc, rq);
>   	} while (out != end);
>   
> -	spin_unlock(&client->wq_lock);
> +	spin_unlock(&guc->wq_lock);
>   }
>   
>   static inline int rq_prio(const struct i915_request *rq)
> @@ -529,125 +507,6 @@ static void guc_reset_finish(struct intel_engine_cs *engine)
>    * path of guc_submit() above.
>    */
>   
> -/**
> - * guc_client_alloc() - Allocate an intel_guc_client
> - * @guc:	the intel_guc structure
> - * @priority:	four levels priority _CRITICAL, _HIGH, _NORMAL and _LOW
> - *		The kernel client to replace ExecList submission is created with
> - *		NORMAL priority. Priority of a client for scheduler can be HIGH,
> - *		while a preemption context can use CRITICAL.
> - *
> - * Return:	An intel_guc_client object if success, else NULL.
> - */
> -static struct intel_guc_client *
> -guc_client_alloc(struct intel_guc *guc, u32 priority)
> -{
> -	struct intel_guc_client *client;
> -	struct i915_vma *vma;
> -	void *vaddr;
> -	int ret;
> -
> -	client = kzalloc(sizeof(*client), GFP_KERNEL);
> -	if (!client)
> -		return ERR_PTR(-ENOMEM);
> -
> -	client->guc = guc;
> -	client->priority = priority;
> -	spin_lock_init(&client->wq_lock);
> -
> -	ret = ida_simple_get(&guc->stage_ids, 0, GUC_MAX_STAGE_DESCRIPTORS,
> -			     GFP_KERNEL);
> -	if (ret < 0)
> -		goto err_client;
> -
> -	client->stage_id = ret;
> -
> -	/* The first page is doorbell/proc_desc. Two followed pages are wq. */
> -	vma = intel_guc_allocate_vma(guc, GUC_PD_SIZE + GUC_WQ_SIZE);
> -	if (IS_ERR(vma)) {
> -		ret = PTR_ERR(vma);
> -		goto err_id;
> -	}
> -
> -	/* We'll keep just the first (doorbell/proc) page permanently kmap'd. */
> -	client->vma = vma;
> -
> -	vaddr = i915_gem_object_pin_map(vma->obj, I915_MAP_WB);
> -	if (IS_ERR(vaddr)) {
> -		ret = PTR_ERR(vaddr);
> -		goto err_vma;
> -	}
> -	client->vaddr = vaddr;
> -
> -	DRM_DEBUG_DRIVER("new priority %u client %p: stage_id %u\n",
> -			 priority, client, client->stage_id);
> -
> -	return client;
> -
> -err_vma:
> -	i915_vma_unpin_and_release(&client->vma, 0);
> -err_id:
> -	ida_simple_remove(&guc->stage_ids, client->stage_id);
> -err_client:
> -	kfree(client);
> -	return ERR_PTR(ret);
> -}
> -
> -static void guc_client_free(struct intel_guc_client *client)
> -{
> -	i915_vma_unpin_and_release(&client->vma, I915_VMA_RELEASE_MAP);
> -	ida_simple_remove(&client->guc->stage_ids, client->stage_id);
> -	kfree(client);
> -}
> -
> -static int guc_clients_create(struct intel_guc *guc)
> -{
> -	struct intel_guc_client *client;
> -
> -	GEM_BUG_ON(guc->execbuf_client);
> -
> -	client = guc_client_alloc(guc, GUC_CLIENT_PRIORITY_KMD_NORMAL);
> -	if (IS_ERR(client)) {
> -		DRM_ERROR("Failed to create GuC client for submission!\n");
> -		return PTR_ERR(client);
> -	}
> -	guc->execbuf_client = client;
> -
> -	return 0;
> -}
> -
> -static void guc_clients_destroy(struct intel_guc *guc)
> -{
> -	struct intel_guc_client *client;
> -
> -	client = fetch_and_zero(&guc->execbuf_client);
> -	if (client)
> -		guc_client_free(client);
> -}
> -
> -static void __guc_client_enable(struct intel_guc_client *client)
> -{
> -	guc_proc_desc_init(client);
> -	guc_stage_desc_init(client);
> -}
> -
> -static void __guc_client_disable(struct intel_guc_client *client)
> -{
> -	guc_stage_desc_fini(client);
> -	guc_proc_desc_fini(client);
> -}
> -
> -static void guc_clients_enable(struct intel_guc *guc)
> -{
> -	__guc_client_enable(guc->execbuf_client);
> -}
> -
> -static void guc_clients_disable(struct intel_guc *guc)
> -{
> -	if (guc->execbuf_client)
> -		__guc_client_disable(guc->execbuf_client);
> -}
> -
>   /*
>    * Set up the memory resources to be shared with the GuC (via the GGTT)
>    * at firmware loading time.
> @@ -668,12 +527,20 @@ int intel_guc_submission_init(struct intel_guc *guc)
>   	 */
>   	GEM_BUG_ON(!guc->stage_desc_pool);
>   
> -	ret = guc_clients_create(guc);
> +	ret = guc_workqueue_create(guc);
>   	if (ret)
>   		goto err_pool;
>   
> +	ret = guc_proc_desc_create(guc);
> +	if (ret)
> +		goto err_workqueue;
> +
> +	spin_lock_init(&guc->wq_lock);
> +
>   	return 0;
>   
> +err_workqueue:
> +	guc_workqueue_destroy(guc);
>   err_pool:
>   	guc_stage_desc_pool_destroy(guc);
>   	return ret;
> @@ -681,10 +548,11 @@ int intel_guc_submission_init(struct intel_guc *guc)
>   
>   void intel_guc_submission_fini(struct intel_guc *guc)
>   {
> -	guc_clients_destroy(guc);
> -
> -	if (guc->stage_desc_pool)
> +	if (guc->stage_desc_pool) {
> +		guc_proc_desc_destroy(guc);
> +		guc_workqueue_destroy(guc);
>   		guc_stage_desc_pool_destroy(guc);
> +	}
>   }
>   
>   static void guc_interrupts_capture(struct intel_gt *gt)
> @@ -816,9 +684,8 @@ void intel_guc_submission_enable(struct intel_guc *guc)
>   		     sizeof(struct guc_wq_item) *
>   		     I915_NUM_ENGINES > GUC_WQ_SIZE);
>   
> -	GEM_BUG_ON(!guc->execbuf_client);
> -
> -	guc_clients_enable(guc);
> +	guc_proc_desc_init(guc);
> +	guc_stage_desc_init(guc);
>   
>   	/* Take over from manual control of ELSP (execlists) */
>   	guc_interrupts_capture(gt);
> @@ -836,7 +703,9 @@ void intel_guc_submission_disable(struct intel_guc *guc)
>   	GEM_BUG_ON(gt->awake); /* GT should be parked first */
>   
>   	guc_interrupts_release(gt);
> -	guc_clients_disable(guc);
> +
> +	guc_stage_desc_fini(guc);
> +	guc_proc_desc_fini(guc);
>   }
>   
>   static bool __guc_submission_support(struct intel_guc *guc)
> @@ -854,3 +723,8 @@ void intel_guc_submission_init_early(struct intel_guc *guc)
>   {
>   	guc->submission_supported = __guc_submission_support(guc);
>   }
> +
> +bool intel_engine_in_guc_submission_mode(const struct intel_engine_cs *engine)
> +{
> +	return engine->set_default_submission == guc_set_default_submission;
> +}
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> index e2deb4e6f42a..e402a2932592 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> @@ -6,48 +6,10 @@
>   #ifndef _INTEL_GUC_SUBMISSION_H_
>   #define _INTEL_GUC_SUBMISSION_H_
>   
> -#include <linux/spinlock.h>
> +#include <linux/types.h>
>   
> -#include "gt/intel_engine_types.h"
> -
> -#include "i915_gem.h"
> -#include "i915_selftest.h"
> -
> -struct drm_i915_private;
> -
> -/*
> - * This structure primarily describes the GEM object shared with the GuC.
> - * The specs sometimes refer to this object as a "GuC context", but we use
> - * the term "client" to avoid confusion with hardware contexts. This
> - * GEM object is held for the entire lifetime of our interaction with
> - * the GuC, being allocated before the GuC is loaded with its firmware.
> - * Because there's no way to update the address used by the GuC after
> - * initialisation, the shared object must stay pinned into the GGTT as
> - * long as the GuC is in use. We also keep the first page (only) mapped
> - * into kernel address space, as it includes shared data that must be
> - * updated on every request submission.
> - *
> - * The single GEM object described here is actually made up of several
> - * separate areas, as far as the GuC is concerned. The first page (kept
> - * kmap'd) includes the "process descriptor" which holds sequence data for
> - * the doorbell, and one cacheline which actually *is* the doorbell; a
> - * write to this will "ring the doorbell" (i.e. send an interrupt to the
> - * GuC). The subsequent  pages of the client object constitute the work
> - * queue (a circular array of work items), again described in the process
> - * descriptor. Work queue pages are mapped momentarily as required.
> - */
> -struct intel_guc_client {
> -	struct i915_vma *vma;
> -	void *vaddr;
> -	struct intel_guc *guc;
> -
> -	/* bitmap of (host) engine ids */
> -	u32 priority;
> -	u32 stage_id;
> -
> -	/* Protects GuC client's WQ access */
> -	spinlock_t wq_lock;
> -};
> +struct intel_guc;
> +struct intel_engine_cs;
>   
>   void intel_guc_submission_init_early(struct intel_guc *guc);
>   int intel_guc_submission_init(struct intel_guc *guc);
> @@ -56,5 +18,6 @@ void intel_guc_submission_disable(struct intel_guc *guc);
>   void intel_guc_submission_fini(struct intel_guc *guc);
>   int intel_guc_preempt_work_create(struct intel_guc *guc);
>   void intel_guc_preempt_work_destroy(struct intel_guc *guc);
> +bool intel_engine_in_guc_submission_mode(const struct intel_engine_cs *engine);
>   
>   #endif
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 5d5974e7f3ed..f32e7b016197 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1802,23 +1802,12 @@ static void i915_guc_log_info(struct seq_file *m,
>   static int i915_guc_info(struct seq_file *m, void *data)
>   {
>   	struct drm_i915_private *dev_priv = node_to_i915(m->private);
> -	const struct intel_guc *guc = &dev_priv->gt.uc.guc;
> -	struct intel_guc_client *client = guc->execbuf_client;
>   
>   	if (!USES_GUC(dev_priv))
>   		return -ENODEV;
>   
>   	i915_guc_log_info(m, dev_priv);
>   
> -	if (!USES_GUC_SUBMISSION(dev_priv))
> -		return 0;
> -
> -	GEM_BUG_ON(!guc->execbuf_client);
> -
> -	seq_printf(m, "\nGuC execbuf client @ %p:\n", client);
> -	seq_printf(m, "\tPriority %d, GuC stage index: %u\n",
> -		   client->priority,
> -		   client->stage_id);
>   	/* Add more as required ... */
>   
>   	return 0;

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
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Re: [Intel-gfx] [PATCH 4/4] drm/i915/guc: kill the GuC client

[John Harrison]

On 11/6/2019 14:25, Daniele Ceraolo Spurio wrote:
> We now only use 1 client without any plan to add more. The client is
> also only holding information about the WQ and the process desc, so we
> can just move those in the intel_guc structure and always use stage_id
> 0.
>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> ---
>   drivers/gpu/drm/i915/gt/intel_reset.c         |   6 +-
>   drivers/gpu/drm/i915/gt/uc/intel_guc.h        |   8 +-
>   drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |   1 -
>   .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 272 +++++-------------
>   .../gpu/drm/i915/gt/uc/intel_guc_submission.h |  45 +--
>   drivers/gpu/drm/i915/i915_debugfs.c           |  11 -
>   6 files changed, 87 insertions(+), 256 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
> index f03e000051c1..d2d88d0bc9d7 100644
> --- a/drivers/gpu/drm/i915/gt/intel_reset.c
> +++ b/drivers/gpu/drm/i915/gt/intel_reset.c
> @@ -21,6 +21,7 @@
>   #include "intel_reset.h"
>   
>   #include "uc/intel_guc.h"
> +#include "uc/intel_guc_submission.h"
>   
>   #define RESET_MAX_RETRIES 3
>   
> @@ -1070,6 +1071,7 @@ static inline int intel_gt_reset_engine(struct intel_engine_cs *engine)
>   int intel_engine_reset(struct intel_engine_cs *engine, const char *msg)
>   {
>   	struct intel_gt *gt = engine->gt;
> +	bool uses_guc = intel_engine_in_guc_submission_mode(engine);
>   	int ret;
>   
>   	GEM_TRACE("%s flags=%lx\n", engine->name, gt->reset.flags);
> @@ -1085,14 +1087,14 @@ int intel_engine_reset(struct intel_engine_cs *engine, const char *msg)
>   			   "Resetting %s for %s\n", engine->name, msg);
>   	atomic_inc(&engine->i915->gpu_error.reset_engine_count[engine->uabi_class]);
>   
> -	if (!engine->gt->uc.guc.execbuf_client)
> +	if (!uses_guc)
>   		ret = intel_gt_reset_engine(engine);
>   	else
>   		ret = intel_guc_reset_engine(&engine->gt->uc.guc, engine);
>   	if (ret) {
>   		/* If we fail here, we expect to fallback to a global reset */
>   		DRM_DEBUG_DRIVER("%sFailed to reset %s, ret=%d\n",
> -				 engine->gt->uc.guc.execbuf_client ? "GuC " : "",
> +				 uses_guc ? "GuC " : "",
>   				 engine->name, ret);
>   		goto out;
>   	}
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> index b2d1766e689a..cd09c912e361 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> @@ -46,9 +46,13 @@ struct intel_guc {
>   
>   	struct i915_vma *stage_desc_pool;
>   	void *stage_desc_pool_vaddr;
> -	struct ida stage_ids;
>   
> -	struct intel_guc_client *execbuf_client;
> +	struct i915_vma *workqueue;
> +	void *workqueue_vaddr;
> +	spinlock_t wq_lock;
> +
> +	struct i915_vma *proc_desc;
> +	void *proc_desc_vaddr;
>   
>   	/* Control params for fw initialization */
>   	u32 params[GUC_CTL_MAX_DWORDS];
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> index 1e8e4af7d9ca..a6b733c146c9 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> @@ -31,7 +31,6 @@
>   
>   #define GUC_DOORBELL_INVALID		256
>   
> -#define GUC_PD_SIZE			(PAGE_SIZE)
>   #define GUC_WQ_SIZE			(PAGE_SIZE * 2)
>   
>   /* Work queue item header definitions */
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> index 0088c3417641..71788589f9fe 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> @@ -27,24 +27,13 @@
>    * code) matches the old submission model and will be updated as part of the
>    * upgrade to the new flow.
>    *
> - * GuC client:
> - * A intel_guc_client refers to a submission path through GuC. Currently, there
> - * is only one client, which is charged with all submissions to the GuC. This
> - * struct is the owner of a process descriptor and a workqueue (both of them
> - * inside a single gem object that contains all required pages for these
> - * elements).
> - *
>    * GuC stage descriptor:
>    * During initialization, the driver allocates a static pool of 1024 such
> - * descriptors, and shares them with the GuC.
> - * Currently, there exists a 1:1 mapping between a intel_guc_client and a
> - * guc_stage_desc (via the client's stage_id), so effectively only one
> - * gets used. This stage descriptor lets the GuC know about the workqueue and
> + * descriptors, and shares them with the GuC. Currently, we only use one
> + * descriptor. This stage descriptor lets the GuC know about the workqueue and
>    * process descriptor. Theoretically, it also lets the GuC know about our HW
>    * contexts (context ID, etc...), but we actually employ a kind of submission
> - * where the GuC uses the LRCA sent via the work item instead (the single
> - * guc_stage_desc associated to execbuf client contains information about the
> - * default kernel context only, but this is essentially unused). This is called
> + * where the GuC uses the LRCA sent via the work item instead. This is called
>    * a "proxy" submission.
>    *
>    * The Scratch registers:
> @@ -71,33 +60,45 @@ static inline struct i915_priolist *to_priolist(struct rb_node *rb)
>   	return rb_entry(rb, struct i915_priolist, node);
>   }
>   
> -static inline bool is_high_priority(struct intel_guc_client *client)
> +static struct guc_stage_desc *__get_stage_desc(struct intel_guc *guc, u32 id)
>   {
> -	return (client->priority == GUC_CLIENT_PRIORITY_KMD_HIGH ||
> -		client->priority == GUC_CLIENT_PRIORITY_HIGH);
> +	struct guc_stage_desc *base = guc->stage_desc_pool_vaddr;
> +
> +	return &base[id];
>   }
>   
> -static struct guc_stage_desc *__get_stage_desc(struct intel_guc_client *client)
> +static int guc_workqueue_create(struct intel_guc *guc)
>   {
> -	struct guc_stage_desc *base = client->guc->stage_desc_pool_vaddr;
> -
> -	return &base[client->stage_id];
> +	return intel_guc_allocate_and_map_vma(guc, GUC_WQ_SIZE, &guc->workqueue,
> +					      &guc->workqueue_vaddr);
>   }
>   
> -static inline struct guc_process_desc *
> -__get_process_desc(struct intel_guc_client *client)
> +static void guc_workqueue_destroy(struct intel_guc *guc)
>   {
> -	return client->vaddr;
> +	i915_vma_unpin_and_release(&guc->workqueue, I915_VMA_RELEASE_MAP);
>   }
>   
>   /*
>    * Initialise the process descriptor shared with the GuC firmware.
>    */
> -static void guc_proc_desc_init(struct intel_guc_client *client)
> +static int guc_proc_desc_create(struct intel_guc *guc)
> +{
> +	const u32 size = PAGE_ALIGN(sizeof(struct guc_process_desc));
> +
> +	return intel_guc_allocate_and_map_vma(guc, size, &guc->proc_desc,
> +					      &guc->proc_desc_vaddr);
> +}
> +
> +static void guc_proc_desc_destroy(struct intel_guc *guc)
> +{
> +	i915_vma_unpin_and_release(&guc->proc_desc, I915_VMA_RELEASE_MAP);
> +}
> +
> +static void guc_proc_desc_init(struct intel_guc *guc)
>   {
>   	struct guc_process_desc *desc;
>   
> -	desc = memset(__get_process_desc(client), 0, sizeof(*desc));
> +	desc = memset(guc->proc_desc_vaddr, 0, sizeof(*desc));
>   
>   	/*
>   	 * XXX: pDoorbell and WQVBaseAddress are pointers in process address
> @@ -108,39 +109,27 @@ static void guc_proc_desc_init(struct intel_guc_client *client)
>   	desc->wq_base_addr = 0;
>   	desc->db_base_addr = 0;
>   
> -	desc->stage_id = client->stage_id;
>   	desc->wq_size_bytes = GUC_WQ_SIZE;
>   	desc->wq_status = WQ_STATUS_ACTIVE;
> -	desc->priority = client->priority;
> +	desc->priority = GUC_CLIENT_PRIORITY_KMD_NORMAL;
>   }
>   
> -static void guc_proc_desc_fini(struct intel_guc_client *client)
> +static void guc_proc_desc_fini(struct intel_guc *guc)
>   {
> -	struct guc_process_desc *desc;
> -
> -	desc = __get_process_desc(client);
> -	memset(desc, 0, sizeof(*desc));
> +	memset(guc->proc_desc_vaddr, 0, sizeof(struct guc_process_desc));
>   }
>   
>   static int guc_stage_desc_pool_create(struct intel_guc *guc)
>   {
>   	u32 size = PAGE_ALIGN(sizeof(struct guc_stage_desc) *
>   			      GUC_MAX_STAGE_DESCRIPTORS);
> -	int ret;
> -
> -	ret = intel_guc_allocate_and_map_vma(guc, size, &guc->stage_desc_pool,
> -					     &guc->stage_desc_pool_vaddr);
> -	if (ret)
> -		return ret;
> -
> -	ida_init(&guc->stage_ids);
>   
> -	return 0;
> +	return intel_guc_allocate_and_map_vma(guc, size, &guc->stage_desc_pool,
> +					      &guc->stage_desc_pool_vaddr);
>   }
>   
>   static void guc_stage_desc_pool_destroy(struct intel_guc *guc)
>   {
> -	ida_destroy(&guc->stage_ids);
>   	i915_vma_unpin_and_release(&guc->stage_desc_pool, I915_VMA_RELEASE_MAP);
>   }
>   
> @@ -148,58 +137,49 @@ static void guc_stage_desc_pool_destroy(struct intel_guc *guc)
>    * Initialise/clear the stage descriptor shared with the GuC firmware.
>    *
>    * This descriptor tells the GuC where (in GGTT space) to find the important
> - * data structures relating to this client (process descriptor, write queue,
> + * data structures related to work submission (process descriptor, write queue,
>    * etc).
>    */
> -static void guc_stage_desc_init(struct intel_guc_client *client)
> +static void guc_stage_desc_init(struct intel_guc *guc)
>   {
> -	struct intel_guc *guc = client->guc;
>   	struct guc_stage_desc *desc;
> -	u32 gfx_addr;
>   
> -	desc = __get_stage_desc(client);
> +	/* we only use 1 stage desc, so hardcode it to 0 */
> +	desc = __get_stage_desc(guc, 0);
>   	memset(desc, 0, sizeof(*desc));
>   
>   	desc->attribute = GUC_STAGE_DESC_ATTR_ACTIVE |
>   			  GUC_STAGE_DESC_ATTR_KERNEL;
> -	if (is_high_priority(client))
> -		desc->attribute |= GUC_STAGE_DESC_ATTR_PREEMPT;
> -	desc->stage_id = client->stage_id;
> -	desc->priority = client->priority;
>   
> -	/*
> -	 * The process descriptor and workqueue are all parts of the client
> -	 * object, which the GuC will reference via the GGTT
> -	 */
> -	gfx_addr = intel_guc_ggtt_offset(guc, client->vma);
> -	desc->process_desc = gfx_addr;
> -	desc->wq_addr = gfx_addr + GUC_PD_SIZE;
> -	desc->wq_size = GUC_WQ_SIZE;
> +	desc->stage_id = 0;
> +	desc->priority = GUC_CLIENT_PRIORITY_KMD_NORMAL;
>   
> -	desc->desc_private = ptr_to_u64(client);
> +	desc->process_desc = intel_guc_ggtt_offset(guc, guc->proc_desc);
> +	desc->wq_addr = intel_guc_ggtt_offset(guc, guc->workqueue);
> +	desc->wq_size = GUC_WQ_SIZE;
>   }
>   
> -static void guc_stage_desc_fini(struct intel_guc_client *client)
> +static void guc_stage_desc_fini(struct intel_guc *guc)
>   {
>   	struct guc_stage_desc *desc;
>   
> -	desc = __get_stage_desc(client);
> +	desc = __get_stage_desc(guc, 0);
>   	memset(desc, 0, sizeof(*desc));
>   }
>   
>   /* Construct a Work Item and append it to the GuC's Work Queue */
> -static void guc_wq_item_append(struct intel_guc_client *client,
> +static void guc_wq_item_append(struct intel_guc *guc,
>   			       u32 target_engine, u32 context_desc,
>   			       u32 ring_tail, u32 fence_id)
>   {
>   	/* wqi_len is in DWords, and does not include the one-word header */
>   	const size_t wqi_size = sizeof(struct guc_wq_item);
>   	const u32 wqi_len = wqi_size / sizeof(u32) - 1;
> -	struct guc_process_desc *desc = __get_process_desc(client);
> +	struct guc_process_desc *desc = guc->proc_desc_vaddr;
>   	struct guc_wq_item *wqi;
>   	u32 wq_off;
>   
> -	lockdep_assert_held(&client->wq_lock);
> +	lockdep_assert_held(&guc->wq_lock);
>   
>   	/* For now workqueue item is 4 DWs; workqueue buffer is 2 pages. So we
>   	 * should not have the case where structure wqi is across page, neither
> @@ -220,7 +200,7 @@ static void guc_wq_item_append(struct intel_guc_client *client,
>   	GEM_BUG_ON(wq_off & (wqi_size - 1));
>   
>   	/* WQ starts from the page after process_desc */
This comment is now invalid. With that fixed:
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>

> -	wqi = client->vaddr + wq_off + GUC_PD_SIZE;
> +	wqi = guc->workqueue_vaddr + wq_off;
>   
>   	/* Now fill in the 4-word work queue item */
>   	wqi->header = WQ_TYPE_INORDER |
> @@ -238,12 +218,11 @@ static void guc_wq_item_append(struct intel_guc_client *client,
>   
>   static void guc_add_request(struct intel_guc *guc, struct i915_request *rq)
>   {
> -	struct intel_guc_client *client = guc->execbuf_client;
>   	struct intel_engine_cs *engine = rq->engine;
>   	u32 ctx_desc = lower_32_bits(rq->hw_context->lrc_desc);
>   	u32 ring_tail = intel_ring_set_tail(rq->ring, rq->tail) / sizeof(u64);
>   
> -	guc_wq_item_append(client, engine->guc_id, ctx_desc,
> +	guc_wq_item_append(guc, engine->guc_id, ctx_desc,
>   			   ring_tail, rq->fence.seqno);
>   }
>   
> @@ -267,9 +246,8 @@ static void guc_submit(struct intel_engine_cs *engine,
>   		       struct i915_request **end)
>   {
>   	struct intel_guc *guc = &engine->gt->uc.guc;
> -	struct intel_guc_client *client = guc->execbuf_client;
>   
> -	spin_lock(&client->wq_lock);
> +	spin_lock(&guc->wq_lock);
>   
>   	do {
>   		struct i915_request *rq = *out++;
> @@ -278,7 +256,7 @@ static void guc_submit(struct intel_engine_cs *engine,
>   		guc_add_request(guc, rq);
>   	} while (out != end);
>   
> -	spin_unlock(&client->wq_lock);
> +	spin_unlock(&guc->wq_lock);
>   }
>   
>   static inline int rq_prio(const struct i915_request *rq)
> @@ -529,125 +507,6 @@ static void guc_reset_finish(struct intel_engine_cs *engine)
>    * path of guc_submit() above.
>    */
>   
> -/**
> - * guc_client_alloc() - Allocate an intel_guc_client
> - * @guc:	the intel_guc structure
> - * @priority:	four levels priority _CRITICAL, _HIGH, _NORMAL and _LOW
> - *		The kernel client to replace ExecList submission is created with
> - *		NORMAL priority. Priority of a client for scheduler can be HIGH,
> - *		while a preemption context can use CRITICAL.
> - *
> - * Return:	An intel_guc_client object if success, else NULL.
> - */
> -static struct intel_guc_client *
> -guc_client_alloc(struct intel_guc *guc, u32 priority)
> -{
> -	struct intel_guc_client *client;
> -	struct i915_vma *vma;
> -	void *vaddr;
> -	int ret;
> -
> -	client = kzalloc(sizeof(*client), GFP_KERNEL);
> -	if (!client)
> -		return ERR_PTR(-ENOMEM);
> -
> -	client->guc = guc;
> -	client->priority = priority;
> -	spin_lock_init(&client->wq_lock);
> -
> -	ret = ida_simple_get(&guc->stage_ids, 0, GUC_MAX_STAGE_DESCRIPTORS,
> -			     GFP_KERNEL);
> -	if (ret < 0)
> -		goto err_client;
> -
> -	client->stage_id = ret;
> -
> -	/* The first page is doorbell/proc_desc. Two followed pages are wq. */
> -	vma = intel_guc_allocate_vma(guc, GUC_PD_SIZE + GUC_WQ_SIZE);
> -	if (IS_ERR(vma)) {
> -		ret = PTR_ERR(vma);
> -		goto err_id;
> -	}
> -
> -	/* We'll keep just the first (doorbell/proc) page permanently kmap'd. */
> -	client->vma = vma;
> -
> -	vaddr = i915_gem_object_pin_map(vma->obj, I915_MAP_WB);
> -	if (IS_ERR(vaddr)) {
> -		ret = PTR_ERR(vaddr);
> -		goto err_vma;
> -	}
> -	client->vaddr = vaddr;
> -
> -	DRM_DEBUG_DRIVER("new priority %u client %p: stage_id %u\n",
> -			 priority, client, client->stage_id);
> -
> -	return client;
> -
> -err_vma:
> -	i915_vma_unpin_and_release(&client->vma, 0);
> -err_id:
> -	ida_simple_remove(&guc->stage_ids, client->stage_id);
> -err_client:
> -	kfree(client);
> -	return ERR_PTR(ret);
> -}
> -
> -static void guc_client_free(struct intel_guc_client *client)
> -{
> -	i915_vma_unpin_and_release(&client->vma, I915_VMA_RELEASE_MAP);
> -	ida_simple_remove(&client->guc->stage_ids, client->stage_id);
> -	kfree(client);
> -}
> -
> -static int guc_clients_create(struct intel_guc *guc)
> -{
> -	struct intel_guc_client *client;
> -
> -	GEM_BUG_ON(guc->execbuf_client);
> -
> -	client = guc_client_alloc(guc, GUC_CLIENT_PRIORITY_KMD_NORMAL);
> -	if (IS_ERR(client)) {
> -		DRM_ERROR("Failed to create GuC client for submission!\n");
> -		return PTR_ERR(client);
> -	}
> -	guc->execbuf_client = client;
> -
> -	return 0;
> -}
> -
> -static void guc_clients_destroy(struct intel_guc *guc)
> -{
> -	struct intel_guc_client *client;
> -
> -	client = fetch_and_zero(&guc->execbuf_client);
> -	if (client)
> -		guc_client_free(client);
> -}
> -
> -static void __guc_client_enable(struct intel_guc_client *client)
> -{
> -	guc_proc_desc_init(client);
> -	guc_stage_desc_init(client);
> -}
> -
> -static void __guc_client_disable(struct intel_guc_client *client)
> -{
> -	guc_stage_desc_fini(client);
> -	guc_proc_desc_fini(client);
> -}
> -
> -static void guc_clients_enable(struct intel_guc *guc)
> -{
> -	__guc_client_enable(guc->execbuf_client);
> -}
> -
> -static void guc_clients_disable(struct intel_guc *guc)
> -{
> -	if (guc->execbuf_client)
> -		__guc_client_disable(guc->execbuf_client);
> -}
> -
>   /*
>    * Set up the memory resources to be shared with the GuC (via the GGTT)
>    * at firmware loading time.
> @@ -668,12 +527,20 @@ int intel_guc_submission_init(struct intel_guc *guc)
>   	 */
>   	GEM_BUG_ON(!guc->stage_desc_pool);
>   
> -	ret = guc_clients_create(guc);
> +	ret = guc_workqueue_create(guc);
>   	if (ret)
>   		goto err_pool;
>   
> +	ret = guc_proc_desc_create(guc);
> +	if (ret)
> +		goto err_workqueue;
> +
> +	spin_lock_init(&guc->wq_lock);
> +
>   	return 0;
>   
> +err_workqueue:
> +	guc_workqueue_destroy(guc);
>   err_pool:
>   	guc_stage_desc_pool_destroy(guc);
>   	return ret;
> @@ -681,10 +548,11 @@ int intel_guc_submission_init(struct intel_guc *guc)
>   
>   void intel_guc_submission_fini(struct intel_guc *guc)
>   {
> -	guc_clients_destroy(guc);
> -
> -	if (guc->stage_desc_pool)
> +	if (guc->stage_desc_pool) {
> +		guc_proc_desc_destroy(guc);
> +		guc_workqueue_destroy(guc);
>   		guc_stage_desc_pool_destroy(guc);
> +	}
>   }
>   
>   static void guc_interrupts_capture(struct intel_gt *gt)
> @@ -816,9 +684,8 @@ void intel_guc_submission_enable(struct intel_guc *guc)
>   		     sizeof(struct guc_wq_item) *
>   		     I915_NUM_ENGINES > GUC_WQ_SIZE);
>   
> -	GEM_BUG_ON(!guc->execbuf_client);
> -
> -	guc_clients_enable(guc);
> +	guc_proc_desc_init(guc);
> +	guc_stage_desc_init(guc);
>   
>   	/* Take over from manual control of ELSP (execlists) */
>   	guc_interrupts_capture(gt);
> @@ -836,7 +703,9 @@ void intel_guc_submission_disable(struct intel_guc *guc)
>   	GEM_BUG_ON(gt->awake); /* GT should be parked first */
>   
>   	guc_interrupts_release(gt);
> -	guc_clients_disable(guc);
> +
> +	guc_stage_desc_fini(guc);
> +	guc_proc_desc_fini(guc);
>   }
>   
>   static bool __guc_submission_support(struct intel_guc *guc)
> @@ -854,3 +723,8 @@ void intel_guc_submission_init_early(struct intel_guc *guc)
>   {
>   	guc->submission_supported = __guc_submission_support(guc);
>   }
> +
> +bool intel_engine_in_guc_submission_mode(const struct intel_engine_cs *engine)
> +{
> +	return engine->set_default_submission == guc_set_default_submission;
> +}
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> index e2deb4e6f42a..e402a2932592 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> @@ -6,48 +6,10 @@
>   #ifndef _INTEL_GUC_SUBMISSION_H_
>   #define _INTEL_GUC_SUBMISSION_H_
>   
> -#include <linux/spinlock.h>
> +#include <linux/types.h>
>   
> -#include "gt/intel_engine_types.h"
> -
> -#include "i915_gem.h"
> -#include "i915_selftest.h"
> -
> -struct drm_i915_private;
> -
> -/*
> - * This structure primarily describes the GEM object shared with the GuC.
> - * The specs sometimes refer to this object as a "GuC context", but we use
> - * the term "client" to avoid confusion with hardware contexts. This
> - * GEM object is held for the entire lifetime of our interaction with
> - * the GuC, being allocated before the GuC is loaded with its firmware.
> - * Because there's no way to update the address used by the GuC after
> - * initialisation, the shared object must stay pinned into the GGTT as
> - * long as the GuC is in use. We also keep the first page (only) mapped
> - * into kernel address space, as it includes shared data that must be
> - * updated on every request submission.
> - *
> - * The single GEM object described here is actually made up of several
> - * separate areas, as far as the GuC is concerned. The first page (kept
> - * kmap'd) includes the "process descriptor" which holds sequence data for
> - * the doorbell, and one cacheline which actually *is* the doorbell; a
> - * write to this will "ring the doorbell" (i.e. send an interrupt to the
> - * GuC). The subsequent  pages of the client object constitute the work
> - * queue (a circular array of work items), again described in the process
> - * descriptor. Work queue pages are mapped momentarily as required.
> - */
> -struct intel_guc_client {
> -	struct i915_vma *vma;
> -	void *vaddr;
> -	struct intel_guc *guc;
> -
> -	/* bitmap of (host) engine ids */
> -	u32 priority;
> -	u32 stage_id;
> -
> -	/* Protects GuC client's WQ access */
> -	spinlock_t wq_lock;
> -};
> +struct intel_guc;
> +struct intel_engine_cs;
>   
>   void intel_guc_submission_init_early(struct intel_guc *guc);
>   int intel_guc_submission_init(struct intel_guc *guc);
> @@ -56,5 +18,6 @@ void intel_guc_submission_disable(struct intel_guc *guc);
>   void intel_guc_submission_fini(struct intel_guc *guc);
>   int intel_guc_preempt_work_create(struct intel_guc *guc);
>   void intel_guc_preempt_work_destroy(struct intel_guc *guc);
> +bool intel_engine_in_guc_submission_mode(const struct intel_engine_cs *engine);
>   
>   #endif
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 5d5974e7f3ed..f32e7b016197 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1802,23 +1802,12 @@ static void i915_guc_log_info(struct seq_file *m,
>   static int i915_guc_info(struct seq_file *m, void *data)
>   {
>   	struct drm_i915_private *dev_priv = node_to_i915(m->private);
> -	const struct intel_guc *guc = &dev_priv->gt.uc.guc;
> -	struct intel_guc_client *client = guc->execbuf_client;
>   
>   	if (!USES_GUC(dev_priv))
>   		return -ENODEV;
>   
>   	i915_guc_log_info(m, dev_priv);
>   
> -	if (!USES_GUC_SUBMISSION(dev_priv))
> -		return 0;
> -
> -	GEM_BUG_ON(!guc->execbuf_client);
> -
> -	seq_printf(m, "\nGuC execbuf client @ %p:\n", client);
> -	seq_printf(m, "\tPriority %d, GuC stage index: %u\n",
> -		   client->priority,
> -		   client->stage_id);
>   	/* Add more as required ... */
>   
>   	return 0;

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✗ Fi.CI.CHECKPATCH: warning for Start removing legacy guc code

[Patchwork]

== Series Details ==

Series: Start removing legacy guc code
URL   : https://patchwork.freedesktop.org/series/69094/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
f79d5075618e drm/i915/guc: Drop leftover preemption code
a49c4957f9d6 drm/i915/guc: add a helper to allocate and map guc vma
e10d694e53f9 drm/i915/guc: kill doorbell code and selftests
-:672: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#672: 
deleted file mode 100644

total: 0 errors, 1 warnings, 0 checks, 612 lines checked
0f137976f5e5 drm/i915/guc: kill the GuC client
-:66: CHECK:UNCOMMENTED_DEFINITION: spinlock_t definition without comment
#66: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc.h:52:
+	spinlock_t wq_lock;

total: 0 errors, 0 warnings, 1 checks, 560 lines checked

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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Start removing legacy guc code

[Patchwork]

== Series Details ==

Series: Start removing legacy guc code
URL   : https://patchwork.freedesktop.org/series/69094/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
f79d5075618e drm/i915/guc: Drop leftover preemption code
a49c4957f9d6 drm/i915/guc: add a helper to allocate and map guc vma
e10d694e53f9 drm/i915/guc: kill doorbell code and selftests
-:672: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#672: 
deleted file mode 100644

total: 0 errors, 1 warnings, 0 checks, 612 lines checked
0f137976f5e5 drm/i915/guc: kill the GuC client
-:66: CHECK:UNCOMMENTED_DEFINITION: spinlock_t definition without comment
#66: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc.h:52:
+	spinlock_t wq_lock;

total: 0 errors, 0 warnings, 1 checks, 560 lines checked

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✗ Fi.CI.DOCS: warning for Start removing legacy guc code

[Patchwork]

== Series Details ==

Series: Start removing legacy guc code
URL   : https://patchwork.freedesktop.org/series/69094/
State : warning

== Summary ==

$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:1: warning: no structured comments found

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[Intel-gfx] ✗ Fi.CI.DOCS: warning for Start removing legacy guc code

[Patchwork]

== Series Details ==

Series: Start removing legacy guc code
URL   : https://patchwork.freedesktop.org/series/69094/
State : warning

== Summary ==

$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:1: warning: no structured comments found

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✓ Fi.CI.BAT: success for Start removing legacy guc code

[Patchwork]

== Series Details ==

Series: Start removing legacy guc code
URL   : https://patchwork.freedesktop.org/series/69094/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7277 -> Patchwork_15166
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/index.html

Known issues
------------

  Here are the changes found in Patchwork_15166 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live_hangcheck:
    - fi-bsw-n3050:       [PASS][1] -> [INCOMPLETE][2] ([fdo#105876])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/fi-bsw-n3050/igt@i915_selftest@live_hangcheck.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/fi-bsw-n3050/igt@i915_selftest@live_hangcheck.html

  
#### Possible fixes ####

  * igt@i915_selftest@live_gem_contexts:
    - fi-bsw-nick:        [INCOMPLETE][3] ([fdo# 111542]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/fi-bsw-nick/igt@i915_selftest@live_gem_contexts.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/fi-bsw-nick/igt@i915_selftest@live_gem_contexts.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - {fi-icl-u4}:        [FAIL][5] ([fdo#111045]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/fi-icl-u4/igt@kms_chamelium@hdmi-hpd-fast.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/fi-icl-u4/igt@kms_chamelium@hdmi-hpd-fast.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo# 111542]: https://bugs.freedesktop.org/show_bug.cgi?id= 111542
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#105876]: https://bugs.freedesktop.org/show_bug.cgi?id=105876
  [fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045


Participating hosts (51 -> 45)
------------------------------

  Missing    (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7277 -> Patchwork_15166

  CI-20190529: 20190529
  CI_DRM_7277: 31883640a2cad10ee99f005e155c371d8df582f6 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5264: f21213012393bd8041ad93084ce29da088ef8426 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_15166: 0f137976f5e5dd211406c7947a6534655655be2b @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

0f137976f5e5 drm/i915/guc: kill the GuC client
e10d694e53f9 drm/i915/guc: kill doorbell code and selftests
a49c4957f9d6 drm/i915/guc: add a helper to allocate and map guc vma
f79d5075618e drm/i915/guc: Drop leftover preemption code

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/index.html
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[Intel-gfx] ✓ Fi.CI.BAT: success for Start removing legacy guc code

[Patchwork]

== Series Details ==

Series: Start removing legacy guc code
URL   : https://patchwork.freedesktop.org/series/69094/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7277 -> Patchwork_15166
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/index.html

Known issues
------------

  Here are the changes found in Patchwork_15166 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live_hangcheck:
    - fi-bsw-n3050:       [PASS][1] -> [INCOMPLETE][2] ([fdo#105876])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/fi-bsw-n3050/igt@i915_selftest@live_hangcheck.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/fi-bsw-n3050/igt@i915_selftest@live_hangcheck.html

  
#### Possible fixes ####

  * igt@i915_selftest@live_gem_contexts:
    - fi-bsw-nick:        [INCOMPLETE][3] ([fdo# 111542]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/fi-bsw-nick/igt@i915_selftest@live_gem_contexts.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/fi-bsw-nick/igt@i915_selftest@live_gem_contexts.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - {fi-icl-u4}:        [FAIL][5] ([fdo#111045]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/fi-icl-u4/igt@kms_chamelium@hdmi-hpd-fast.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/fi-icl-u4/igt@kms_chamelium@hdmi-hpd-fast.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo# 111542]: https://bugs.freedesktop.org/show_bug.cgi?id= 111542
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#105876]: https://bugs.freedesktop.org/show_bug.cgi?id=105876
  [fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045


Participating hosts (51 -> 45)
------------------------------

  Missing    (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7277 -> Patchwork_15166

  CI-20190529: 20190529
  CI_DRM_7277: 31883640a2cad10ee99f005e155c371d8df582f6 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5264: f21213012393bd8041ad93084ce29da088ef8426 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_15166: 0f137976f5e5dd211406c7947a6534655655be2b @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

0f137976f5e5 drm/i915/guc: kill the GuC client
e10d694e53f9 drm/i915/guc: kill doorbell code and selftests
a49c4957f9d6 drm/i915/guc: add a helper to allocate and map guc vma
f79d5075618e drm/i915/guc: Drop leftover preemption code

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.IGT: success for Start removing legacy guc code

[Patchwork]

== Series Details ==

Series: Start removing legacy guc code
URL   : https://patchwork.freedesktop.org/series/69094/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7277_full -> Patchwork_15166_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_15166_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_exec@basic-invalid-context-vcs1:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([fdo#112080]) +15 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb4/igt@gem_ctx_exec@basic-invalid-context-vcs1.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb8/igt@gem_ctx_exec@basic-invalid-context-vcs1.html

  * igt@gem_ctx_isolation@vcs1-s3:
    - shard-tglb:         [PASS][3] -> [INCOMPLETE][4] ([fdo#111832])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb2/igt@gem_ctx_isolation@vcs1-s3.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb2/igt@gem_ctx_isolation@vcs1-s3.html

  * igt@gem_ctx_persistence@vcs1-queued:
    - shard-iclb:         [PASS][5] -> [SKIP][6] ([fdo#109276] / [fdo#112080]) +4 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb1/igt@gem_ctx_persistence@vcs1-queued.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb6/igt@gem_ctx_persistence@vcs1-queued.html

  * igt@gem_ctx_shared@exec-single-timeline-bsd:
    - shard-iclb:         [PASS][7] -> [SKIP][8] ([fdo#110841])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb3/igt@gem_ctx_shared@exec-single-timeline-bsd.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb2/igt@gem_ctx_shared@exec-single-timeline-bsd.html

  * igt@gem_exec_await@wide-contexts:
    - shard-tglb:         [PASS][9] -> [INCOMPLETE][10] ([fdo#111736])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb6/igt@gem_exec_await@wide-contexts.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb6/igt@gem_exec_await@wide-contexts.html

  * igt@gem_exec_schedule@preempt-queue-contexts-vebox:
    - shard-tglb:         [PASS][11] -> [INCOMPLETE][12] ([fdo#111677])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb3/igt@gem_exec_schedule@preempt-queue-contexts-vebox.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb6/igt@gem_exec_schedule@preempt-queue-contexts-vebox.html

  * igt@gem_exec_schedule@preemptive-hang-bsd:
    - shard-iclb:         [PASS][13] -> [SKIP][14] ([fdo#112146]) +4 similar issues
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb6/igt@gem_exec_schedule@preemptive-hang-bsd.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb1/igt@gem_exec_schedule@preemptive-hang-bsd.html

  * igt@gem_persistent_relocs@forked-interruptible-thrashing:
    - shard-iclb:         [PASS][15] -> [FAIL][16] ([fdo#112037])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb2/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb3/igt@gem_persistent_relocs@forked-interruptible-thrashing.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-snb:          [PASS][17] -> [DMESG-WARN][18] ([fdo#111870]) +1 similar issue
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-snb7/igt@gem_userptr_blits@dmabuf-sync.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-snb5/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@gem_userptr_blits@map-fixed-invalidate-busy-gup:
    - shard-hsw:          [PASS][19] -> [DMESG-WARN][20] ([fdo#111870]) +1 similar issue
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-hsw1/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-hsw5/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html

  * igt@i915_selftest@mock_requests:
    - shard-skl:          [PASS][21] -> [DMESG-WARN][22] ([fdo#111086])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-skl4/igt@i915_selftest@mock_requests.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-skl10/igt@i915_selftest@mock_requests.html

  * igt@kms_color@pipe-a-ctm-0-75:
    - shard-skl:          [PASS][23] -> [DMESG-WARN][24] ([fdo#106107])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-skl3/igt@kms_color@pipe-a-ctm-0-75.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-skl10/igt@kms_color@pipe-a-ctm-0-75.html

  * igt@kms_cursor_crc@pipe-c-cursor-suspend:
    - shard-kbl:          [PASS][25] -> [DMESG-WARN][26] ([fdo#108566]) +6 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-kbl3/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-kbl7/igt@kms_cursor_crc@pipe-c-cursor-suspend.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-tglb:         [PASS][27] -> [INCOMPLETE][28] ([fdo#111747] / [fdo#111832] / [fdo#111850])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb9/igt@kms_fbcon_fbt@fbc-suspend.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb3/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-skl:          [PASS][29] -> [INCOMPLETE][30] ([fdo#109507])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-skl6/igt@kms_flip@flip-vs-suspend.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-skl6/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-apl:          [PASS][31] -> [DMESG-WARN][32] ([fdo#108566]) +1 similar issue
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-apl7/igt@kms_flip@flip-vs-suspend-interruptible.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-apl6/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-blt:
    - shard-iclb:         [PASS][33] -> [FAIL][34] ([fdo#103167]) +4 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-blt.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt:
    - shard-tglb:         [PASS][35] -> [FAIL][36] ([fdo#103167]) +2 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb9/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-suspend:
    - shard-tglb:         [PASS][37] -> [INCOMPLETE][38] ([fdo#111832] / [fdo#111850] / [fdo#111884])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb1/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb3/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
    - shard-tglb:         [PASS][39] -> [INCOMPLETE][40] ([fdo#111832] / [fdo#111850]) +3 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb5/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html

  * igt@kms_psr@psr2_primary_blt:
    - shard-iclb:         [PASS][41] -> [SKIP][42] ([fdo#109441])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb2/igt@kms_psr@psr2_primary_blt.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb5/igt@kms_psr@psr2_primary_blt.html

  * igt@kms_setmode@basic:
    - shard-hsw:          [PASS][43] -> [FAIL][44] ([fdo#99912])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-hsw6/igt@kms_setmode@basic.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-hsw4/igt@kms_setmode@basic.html

  * igt@prime_busy@hang-bsd2:
    - shard-iclb:         [PASS][45] -> [SKIP][46] ([fdo#109276]) +22 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb1/igt@prime_busy@hang-bsd2.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb6/igt@prime_busy@hang-bsd2.html

  
#### Possible fixes ####

  * igt@gem_ctx_persistence@vcs1-cleanup:
    - shard-iclb:         [SKIP][47] ([fdo#109276] / [fdo#112080]) -> [PASS][48] +2 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb8/igt@gem_ctx_persistence@vcs1-cleanup.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb2/igt@gem_ctx_persistence@vcs1-cleanup.html

  * igt@gem_eio@in-flight-suspend:
    - shard-tglb:         [INCOMPLETE][49] ([fdo#111832] / [fdo#111850] / [fdo#112081]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb7/igt@gem_eio@in-flight-suspend.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb3/igt@gem_eio@in-flight-suspend.html
    - shard-apl:          [DMESG-WARN][51] ([fdo#108566]) -> [PASS][52] +1 similar issue
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-apl1/igt@gem_eio@in-flight-suspend.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-apl4/igt@gem_eio@in-flight-suspend.html

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [SKIP][53] ([fdo#110854]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb6/igt@gem_exec_balancer@smoke.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb1/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_parallel@fds:
    - shard-tglb:         [INCOMPLETE][55] ([fdo#111867]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb6/igt@gem_exec_parallel@fds.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb4/igt@gem_exec_parallel@fds.html

  * igt@gem_exec_schedule@independent-bsd2:
    - shard-iclb:         [SKIP][57] ([fdo#109276]) -> [PASS][58] +15 similar issues
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb3/igt@gem_exec_schedule@independent-bsd2.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb2/igt@gem_exec_schedule@independent-bsd2.html

  * igt@gem_exec_schedule@preempt-other-chain-bsd:
    - shard-iclb:         [SKIP][59] ([fdo#112146]) -> [PASS][60] +6 similar issues
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb2/igt@gem_exec_schedule@preempt-other-chain-bsd.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb5/igt@gem_exec_schedule@preempt-other-chain-bsd.html

  * igt@gem_softpin@noreloc-s3:
    - shard-tglb:         [INCOMPLETE][61] ([fdo#111832]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb8/igt@gem_softpin@noreloc-s3.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb6/igt@gem_softpin@noreloc-s3.html

  * igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy:
    - shard-hsw:          [DMESG-WARN][63] ([fdo#111870]) -> [PASS][64] +1 similar issue
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-hsw5/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-hsw6/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html

  * igt@gem_userptr_blits@sync-unmap-cycles:
    - shard-snb:          [DMESG-WARN][65] ([fdo#111870]) -> [PASS][66] +1 similar issue
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-snb1/igt@gem_userptr_blits@sync-unmap-cycles.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-snb1/igt@gem_userptr_blits@sync-unmap-cycles.html

  * igt@kms_busy@extended-pageflip-hang-oldfb-render-b:
    - shard-snb:          [SKIP][67] ([fdo#109271]) -> [PASS][68] +3 similar issues
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-snb6/igt@kms_busy@extended-pageflip-hang-oldfb-render-b.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-snb4/igt@kms_busy@extended-pageflip-hang-oldfb-render-b.html

  * igt@kms_color@pipe-b-ctm-0-5:
    - shard-skl:          [DMESG-WARN][69] ([fdo#106107]) -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-skl2/igt@kms_color@pipe-b-ctm-0-5.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-skl2/igt@kms_color@pipe-b-ctm-0-5.html

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-skl:          [FAIL][71] ([fdo#105363]) -> [PASS][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-skl9/igt@kms_flip@flip-vs-expired-vblank.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-skl7/igt@kms_flip@flip-vs-expired-vblank.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-hsw:          [INCOMPLETE][73] ([fdo#103540]) -> [PASS][74]
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-hsw5/igt@kms_flip@flip-vs-suspend-interruptible.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-hsw1/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt:
    - shard-tglb:         [FAIL][75] ([fdo#103167]) -> [PASS][76] +1 similar issue
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt:
    - shard-iclb:         [FAIL][77] ([fdo#103167]) -> [PASS][78] +2 similar issues
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
    - shard-kbl:          [INCOMPLETE][79] ([fdo#103665]) -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-kbl6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-kbl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
    - shard-skl:          [INCOMPLETE][81] ([fdo#104108]) -> [PASS][82]
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-skl9/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-skl2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [FAIL][83] ([fdo#108145] / [fdo#110403]) -> [PASS][84]
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_psr@psr2_dpms:
    - shard-iclb:         [SKIP][85] ([fdo#109441]) -> [PASS][86]
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb3/igt@kms_psr@psr2_dpms.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb2/igt@kms_psr@psr2_dpms.html

  * igt@kms_psr@suspend:
    - shard-tglb:         [INCOMPLETE][87] ([fdo#111832] / [fdo#111850]) -> [PASS][88]
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb1/igt@kms_psr@suspend.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb2/igt@kms_psr@suspend.html

  * igt@kms_setmode@basic:
    - shard-apl:          [FAIL][89] ([fdo#99912]) -> [PASS][90]
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-apl4/igt@kms_setmode@basic.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-apl4/igt@kms_setmode@basic.html

  * igt@kms_vblank@pipe-a-ts-continuation-suspend:
    - shard-kbl:          [DMESG-WARN][91] ([fdo#108566]) -> [PASS][92] +4 similar issues
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-kbl3/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-kbl7/igt@kms_vblank@pipe-a-ts-continuation-suspend.html

  * igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend:
    - shard-tglb:         [INCOMPLETE][93] ([fdo#111850]) -> [PASS][94]
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb1/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb9/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html

  * igt@perf_pmu@busy-no-semaphores-vcs1:
    - shard-iclb:         [SKIP][95] ([fdo#112080]) -> [PASS][96] +14 similar issues
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb6/igt@perf_pmu@busy-no-semaphores-vcs1.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb1/igt@perf_pmu@busy-no-semaphores-vcs1.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv:
    - shard-iclb:         [SKIP][97] ([fdo#109276] / [fdo#112080]) -> [FAIL][98] ([fdo#111329])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb6/igt@gem_ctx_isolation@vcs1-nonpriv.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb1/igt@gem_ctx_isolation@vcs1-nonpriv.html

  * igt@gem_ctx_isolation@vcs1-nonpriv-switch:
    - shard-iclb:         [FAIL][99] ([fdo#111329]) -> [SKIP][100] ([fdo#109276] / [fdo#112080])
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb1/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb7/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html

  * igt@gem_eio@kms:
    - shard-snb:          [DMESG-WARN][101] ([fdo#111780 ] / [fdo#111781]) -> [INCOMPLETE][102] ([fdo#105411])
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-snb2/igt@gem_eio@kms.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-snb5/igt@gem_eio@kms.html

  * igt@gem_exec_schedule@deep-bsd2:
    - shard-tglb:         [INCOMPLETE][103] ([fdo#111671]) -> [FAIL][104] ([fdo#111646])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb8/igt@gem_exec_schedule@deep-bsd2.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb1/igt@gem_exec_schedule@deep-bsd2.html

  * igt@gem_mocs_settings@mocs-rc6-bsd2:
    - shard-iclb:         [FAIL][105] ([fdo#111330]) -> [SKIP][106] ([fdo#109276])
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb1/igt@gem_mocs_settings@mocs-rc6-bsd2.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb6/igt@gem_mocs_settings@mocs-rc6-bsd2.html

  * igt@gem_mocs_settings@mocs-reset-bsd2:
    - shard-iclb:         [SKIP][107] ([fdo#109276]) -> [FAIL][108] ([fdo#111330]) +1 similar iss

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
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[Intel-gfx] ✓ Fi.CI.IGT: success for Start removing legacy guc code

[Patchwork]

== Series Details ==

Series: Start removing legacy guc code
URL   : https://patchwork.freedesktop.org/series/69094/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7277_full -> Patchwork_15166_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_15166_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_exec@basic-invalid-context-vcs1:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([fdo#112080]) +15 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb4/igt@gem_ctx_exec@basic-invalid-context-vcs1.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb8/igt@gem_ctx_exec@basic-invalid-context-vcs1.html

  * igt@gem_ctx_isolation@vcs1-s3:
    - shard-tglb:         [PASS][3] -> [INCOMPLETE][4] ([fdo#111832])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb2/igt@gem_ctx_isolation@vcs1-s3.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb2/igt@gem_ctx_isolation@vcs1-s3.html

  * igt@gem_ctx_persistence@vcs1-queued:
    - shard-iclb:         [PASS][5] -> [SKIP][6] ([fdo#109276] / [fdo#112080]) +4 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb1/igt@gem_ctx_persistence@vcs1-queued.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb6/igt@gem_ctx_persistence@vcs1-queued.html

  * igt@gem_ctx_shared@exec-single-timeline-bsd:
    - shard-iclb:         [PASS][7] -> [SKIP][8] ([fdo#110841])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb3/igt@gem_ctx_shared@exec-single-timeline-bsd.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb2/igt@gem_ctx_shared@exec-single-timeline-bsd.html

  * igt@gem_exec_await@wide-contexts:
    - shard-tglb:         [PASS][9] -> [INCOMPLETE][10] ([fdo#111736])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb6/igt@gem_exec_await@wide-contexts.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb6/igt@gem_exec_await@wide-contexts.html

  * igt@gem_exec_schedule@preempt-queue-contexts-vebox:
    - shard-tglb:         [PASS][11] -> [INCOMPLETE][12] ([fdo#111677])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb3/igt@gem_exec_schedule@preempt-queue-contexts-vebox.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb6/igt@gem_exec_schedule@preempt-queue-contexts-vebox.html

  * igt@gem_exec_schedule@preemptive-hang-bsd:
    - shard-iclb:         [PASS][13] -> [SKIP][14] ([fdo#112146]) +4 similar issues
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb6/igt@gem_exec_schedule@preemptive-hang-bsd.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb1/igt@gem_exec_schedule@preemptive-hang-bsd.html

  * igt@gem_persistent_relocs@forked-interruptible-thrashing:
    - shard-iclb:         [PASS][15] -> [FAIL][16] ([fdo#112037])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb2/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb3/igt@gem_persistent_relocs@forked-interruptible-thrashing.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-snb:          [PASS][17] -> [DMESG-WARN][18] ([fdo#111870]) +1 similar issue
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-snb7/igt@gem_userptr_blits@dmabuf-sync.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-snb5/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@gem_userptr_blits@map-fixed-invalidate-busy-gup:
    - shard-hsw:          [PASS][19] -> [DMESG-WARN][20] ([fdo#111870]) +1 similar issue
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-hsw1/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-hsw5/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html

  * igt@i915_selftest@mock_requests:
    - shard-skl:          [PASS][21] -> [DMESG-WARN][22] ([fdo#111086])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-skl4/igt@i915_selftest@mock_requests.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-skl10/igt@i915_selftest@mock_requests.html

  * igt@kms_color@pipe-a-ctm-0-75:
    - shard-skl:          [PASS][23] -> [DMESG-WARN][24] ([fdo#106107])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-skl3/igt@kms_color@pipe-a-ctm-0-75.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-skl10/igt@kms_color@pipe-a-ctm-0-75.html

  * igt@kms_cursor_crc@pipe-c-cursor-suspend:
    - shard-kbl:          [PASS][25] -> [DMESG-WARN][26] ([fdo#108566]) +6 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-kbl3/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-kbl7/igt@kms_cursor_crc@pipe-c-cursor-suspend.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-tglb:         [PASS][27] -> [INCOMPLETE][28] ([fdo#111747] / [fdo#111832] / [fdo#111850])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb9/igt@kms_fbcon_fbt@fbc-suspend.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb3/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-skl:          [PASS][29] -> [INCOMPLETE][30] ([fdo#109507])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-skl6/igt@kms_flip@flip-vs-suspend.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-skl6/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-apl:          [PASS][31] -> [DMESG-WARN][32] ([fdo#108566]) +1 similar issue
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-apl7/igt@kms_flip@flip-vs-suspend-interruptible.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-apl6/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-blt:
    - shard-iclb:         [PASS][33] -> [FAIL][34] ([fdo#103167]) +4 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-blt.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt:
    - shard-tglb:         [PASS][35] -> [FAIL][36] ([fdo#103167]) +2 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb9/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-suspend:
    - shard-tglb:         [PASS][37] -> [INCOMPLETE][38] ([fdo#111832] / [fdo#111850] / [fdo#111884])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb1/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb3/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
    - shard-tglb:         [PASS][39] -> [INCOMPLETE][40] ([fdo#111832] / [fdo#111850]) +3 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb5/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html

  * igt@kms_psr@psr2_primary_blt:
    - shard-iclb:         [PASS][41] -> [SKIP][42] ([fdo#109441])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb2/igt@kms_psr@psr2_primary_blt.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb5/igt@kms_psr@psr2_primary_blt.html

  * igt@kms_setmode@basic:
    - shard-hsw:          [PASS][43] -> [FAIL][44] ([fdo#99912])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-hsw6/igt@kms_setmode@basic.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-hsw4/igt@kms_setmode@basic.html

  * igt@prime_busy@hang-bsd2:
    - shard-iclb:         [PASS][45] -> [SKIP][46] ([fdo#109276]) +22 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb1/igt@prime_busy@hang-bsd2.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb6/igt@prime_busy@hang-bsd2.html

  
#### Possible fixes ####

  * igt@gem_ctx_persistence@vcs1-cleanup:
    - shard-iclb:         [SKIP][47] ([fdo#109276] / [fdo#112080]) -> [PASS][48] +2 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb8/igt@gem_ctx_persistence@vcs1-cleanup.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb2/igt@gem_ctx_persistence@vcs1-cleanup.html

  * igt@gem_eio@in-flight-suspend:
    - shard-tglb:         [INCOMPLETE][49] ([fdo#111832] / [fdo#111850] / [fdo#112081]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb7/igt@gem_eio@in-flight-suspend.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb3/igt@gem_eio@in-flight-suspend.html
    - shard-apl:          [DMESG-WARN][51] ([fdo#108566]) -> [PASS][52] +1 similar issue
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-apl1/igt@gem_eio@in-flight-suspend.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-apl4/igt@gem_eio@in-flight-suspend.html

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [SKIP][53] ([fdo#110854]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb6/igt@gem_exec_balancer@smoke.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb1/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_parallel@fds:
    - shard-tglb:         [INCOMPLETE][55] ([fdo#111867]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb6/igt@gem_exec_parallel@fds.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb4/igt@gem_exec_parallel@fds.html

  * igt@gem_exec_schedule@independent-bsd2:
    - shard-iclb:         [SKIP][57] ([fdo#109276]) -> [PASS][58] +15 similar issues
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb3/igt@gem_exec_schedule@independent-bsd2.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb2/igt@gem_exec_schedule@independent-bsd2.html

  * igt@gem_exec_schedule@preempt-other-chain-bsd:
    - shard-iclb:         [SKIP][59] ([fdo#112146]) -> [PASS][60] +6 similar issues
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb2/igt@gem_exec_schedule@preempt-other-chain-bsd.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb5/igt@gem_exec_schedule@preempt-other-chain-bsd.html

  * igt@gem_softpin@noreloc-s3:
    - shard-tglb:         [INCOMPLETE][61] ([fdo#111832]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb8/igt@gem_softpin@noreloc-s3.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb6/igt@gem_softpin@noreloc-s3.html

  * igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy:
    - shard-hsw:          [DMESG-WARN][63] ([fdo#111870]) -> [PASS][64] +1 similar issue
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-hsw5/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-hsw6/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html

  * igt@gem_userptr_blits@sync-unmap-cycles:
    - shard-snb:          [DMESG-WARN][65] ([fdo#111870]) -> [PASS][66] +1 similar issue
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-snb1/igt@gem_userptr_blits@sync-unmap-cycles.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-snb1/igt@gem_userptr_blits@sync-unmap-cycles.html

  * igt@kms_busy@extended-pageflip-hang-oldfb-render-b:
    - shard-snb:          [SKIP][67] ([fdo#109271]) -> [PASS][68] +3 similar issues
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-snb6/igt@kms_busy@extended-pageflip-hang-oldfb-render-b.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-snb4/igt@kms_busy@extended-pageflip-hang-oldfb-render-b.html

  * igt@kms_color@pipe-b-ctm-0-5:
    - shard-skl:          [DMESG-WARN][69] ([fdo#106107]) -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-skl2/igt@kms_color@pipe-b-ctm-0-5.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-skl2/igt@kms_color@pipe-b-ctm-0-5.html

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-skl:          [FAIL][71] ([fdo#105363]) -> [PASS][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-skl9/igt@kms_flip@flip-vs-expired-vblank.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-skl7/igt@kms_flip@flip-vs-expired-vblank.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-hsw:          [INCOMPLETE][73] ([fdo#103540]) -> [PASS][74]
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-hsw5/igt@kms_flip@flip-vs-suspend-interruptible.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-hsw1/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt:
    - shard-tglb:         [FAIL][75] ([fdo#103167]) -> [PASS][76] +1 similar issue
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt:
    - shard-iclb:         [FAIL][77] ([fdo#103167]) -> [PASS][78] +2 similar issues
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
    - shard-kbl:          [INCOMPLETE][79] ([fdo#103665]) -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-kbl6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-kbl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
    - shard-skl:          [INCOMPLETE][81] ([fdo#104108]) -> [PASS][82]
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-skl9/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-skl2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [FAIL][83] ([fdo#108145] / [fdo#110403]) -> [PASS][84]
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_psr@psr2_dpms:
    - shard-iclb:         [SKIP][85] ([fdo#109441]) -> [PASS][86]
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb3/igt@kms_psr@psr2_dpms.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb2/igt@kms_psr@psr2_dpms.html

  * igt@kms_psr@suspend:
    - shard-tglb:         [INCOMPLETE][87] ([fdo#111832] / [fdo#111850]) -> [PASS][88]
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb1/igt@kms_psr@suspend.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb2/igt@kms_psr@suspend.html

  * igt@kms_setmode@basic:
    - shard-apl:          [FAIL][89] ([fdo#99912]) -> [PASS][90]
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-apl4/igt@kms_setmode@basic.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-apl4/igt@kms_setmode@basic.html

  * igt@kms_vblank@pipe-a-ts-continuation-suspend:
    - shard-kbl:          [DMESG-WARN][91] ([fdo#108566]) -> [PASS][92] +4 similar issues
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-kbl3/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-kbl7/igt@kms_vblank@pipe-a-ts-continuation-suspend.html

  * igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend:
    - shard-tglb:         [INCOMPLETE][93] ([fdo#111850]) -> [PASS][94]
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb1/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb9/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html

  * igt@perf_pmu@busy-no-semaphores-vcs1:
    - shard-iclb:         [SKIP][95] ([fdo#112080]) -> [PASS][96] +14 similar issues
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb6/igt@perf_pmu@busy-no-semaphores-vcs1.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb1/igt@perf_pmu@busy-no-semaphores-vcs1.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv:
    - shard-iclb:         [SKIP][97] ([fdo#109276] / [fdo#112080]) -> [FAIL][98] ([fdo#111329])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb6/igt@gem_ctx_isolation@vcs1-nonpriv.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb1/igt@gem_ctx_isolation@vcs1-nonpriv.html

  * igt@gem_ctx_isolation@vcs1-nonpriv-switch:
    - shard-iclb:         [FAIL][99] ([fdo#111329]) -> [SKIP][100] ([fdo#109276] / [fdo#112080])
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb1/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb7/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html

  * igt@gem_eio@kms:
    - shard-snb:          [DMESG-WARN][101] ([fdo#111780 ] / [fdo#111781]) -> [INCOMPLETE][102] ([fdo#105411])
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-snb2/igt@gem_eio@kms.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-snb5/igt@gem_eio@kms.html

  * igt@gem_exec_schedule@deep-bsd2:
    - shard-tglb:         [INCOMPLETE][103] ([fdo#111671]) -> [FAIL][104] ([fdo#111646])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-tglb8/igt@gem_exec_schedule@deep-bsd2.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-tglb1/igt@gem_exec_schedule@deep-bsd2.html

  * igt@gem_mocs_settings@mocs-rc6-bsd2:
    - shard-iclb:         [FAIL][105] ([fdo#111330]) -> [SKIP][106] ([fdo#109276])
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7277/shard-iclb1/igt@gem_mocs_settings@mocs-rc6-bsd2.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/shard-iclb6/igt@gem_mocs_settings@mocs-rc6-bsd2.html

  * igt@gem_mocs_settings@mocs-reset-bsd2:
    - shard-iclb:         [SKIP][107] ([fdo#109276]) -> [FAIL][108] ([fdo#111330]) +1 similar iss

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15166/index.html
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