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From: Patchwork <patchwork@emeril.freedesktop.org>
To: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Enable second dbuf slice for ICL and TGL
Date: Thu, 07 Nov 2019 17:40:26 -0000	[thread overview]
Message-ID: <157314842681.21751.2589154899097725906@emeril.freedesktop.org> (raw)
In-Reply-To: <20191107131020.12869-1-stanislav.lisovskiy@intel.com>

== Series Details ==

Series: drm/i915: Enable second dbuf slice for ICL and TGL
URL   : https://patchwork.freedesktop.org/series/69124/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
2fdfc3b51c5b drm/i915: Enable second dbuf slice for ICL and TGL
-:221: WARNING:SUSPECT_CODE_INDENT: suspect code indent for conditional statements (8, 0)
#221: FILE: drivers/gpu/drm/i915/display/intel_display_power.h:311:
 	for ((wf) = intel_display_power_get((i915), (domain)); (wf); \
[...]
+u8 intel_dbuf_max_slices(struct drm_i915_private *dev_priv);

-:467: WARNING:LINE_CONTINUATIONS: Avoid unnecessary line continuations
#467: FILE: drivers/gpu/drm/i915/intel_pm.c:3953:
+		u32 pipe_dbuf_slice_mask = \

-:469: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#469: FILE: drivers/gpu/drm/i915/intel_pm.c:3955:
+			i915_get_allowed_dbuf_mask(dev_priv,
+						pipe,

-:585: CHECK:LINE_SPACING: Please don't use multiple blank lines
#585: FILE: drivers/gpu/drm/i915/intel_pm.c:4303:
+
+

-:589: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#589: FILE: drivers/gpu/drm/i915/intel_pm.c:4307:
+	DRM_DEBUG_KMS("Pipe %d downscale amount %d.%d\n",
+		       crtc->pipe, pipe_downscale.val >> 16,

-:608: CHECK:LINE_SPACING: Please don't use multiple blank lines
#608: FILE: drivers/gpu/drm/i915/intel_pm.c:4326:
+
+

-:609: CHECK:CAMELCASE: Avoid CamelCase: <DBuf1>
#609: FILE: drivers/gpu/drm/i915/intel_pm.c:4327:
+#define ICL_PIPE_A_DBUF_SLICES(DBuf1)  \

-:617: CHECK:CAMELCASE: Avoid CamelCase: <DBuf2>
#617: FILE: drivers/gpu/drm/i915/intel_pm.c:4335:
+#define ICL_PIPE_AB_DBUF_SLICES(DBuf1, DBuf2)   \

-:629: CHECK:CAMELCASE: Avoid CamelCase: <DBuf3>
#629: FILE: drivers/gpu/drm/i915/intel_pm.c:4347:
+#define ICL_PIPE_ABC_DBUF_SLICES(DBuf1, DBuf2, DBuf3)  \

-:639: CHECK:CAMELCASE: Avoid CamelCase: <DBuf4>
#639: FILE: drivers/gpu/drm/i915/intel_pm.c:4357:
+#define ICL_PIPE_ABCD_DBUF_SLICES(DBuf1, DBuf2, DBuf3, DBuf4)  \

-:748: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#748: FILE: drivers/gpu/drm/i915/intel_pm.c:4466:
+u32 i915_get_allowed_dbuf_mask(struct drm_i915_private *dev_priv,
+				      int pipe, u32 active_pipes,

total: 0 errors, 2 warnings, 9 checks, 680 lines checked

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: Patchwork <patchwork@emeril.freedesktop.org>
To: "Stanislav Lisovskiy" <stanislav.lisovskiy@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Enable second dbuf slice for ICL and TGL
Date: Thu, 07 Nov 2019 17:40:26 -0000	[thread overview]
Message-ID: <157314842681.21751.2589154899097725906@emeril.freedesktop.org> (raw)
Message-ID: <20191107174026.u8MVNuoiYyrfPxEozCOYvASCGv4g4Bztbt9bcCv8sx8@z> (raw)
In-Reply-To: <20191107131020.12869-1-stanislav.lisovskiy@intel.com>

== Series Details ==

Series: drm/i915: Enable second dbuf slice for ICL and TGL
URL   : https://patchwork.freedesktop.org/series/69124/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
2fdfc3b51c5b drm/i915: Enable second dbuf slice for ICL and TGL
-:221: WARNING:SUSPECT_CODE_INDENT: suspect code indent for conditional statements (8, 0)
#221: FILE: drivers/gpu/drm/i915/display/intel_display_power.h:311:
 	for ((wf) = intel_display_power_get((i915), (domain)); (wf); \
[...]
+u8 intel_dbuf_max_slices(struct drm_i915_private *dev_priv);

-:467: WARNING:LINE_CONTINUATIONS: Avoid unnecessary line continuations
#467: FILE: drivers/gpu/drm/i915/intel_pm.c:3953:
+		u32 pipe_dbuf_slice_mask = \

-:469: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#469: FILE: drivers/gpu/drm/i915/intel_pm.c:3955:
+			i915_get_allowed_dbuf_mask(dev_priv,
+						pipe,

-:585: CHECK:LINE_SPACING: Please don't use multiple blank lines
#585: FILE: drivers/gpu/drm/i915/intel_pm.c:4303:
+
+

-:589: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#589: FILE: drivers/gpu/drm/i915/intel_pm.c:4307:
+	DRM_DEBUG_KMS("Pipe %d downscale amount %d.%d\n",
+		       crtc->pipe, pipe_downscale.val >> 16,

-:608: CHECK:LINE_SPACING: Please don't use multiple blank lines
#608: FILE: drivers/gpu/drm/i915/intel_pm.c:4326:
+
+

-:609: CHECK:CAMELCASE: Avoid CamelCase: <DBuf1>
#609: FILE: drivers/gpu/drm/i915/intel_pm.c:4327:
+#define ICL_PIPE_A_DBUF_SLICES(DBuf1)  \

-:617: CHECK:CAMELCASE: Avoid CamelCase: <DBuf2>
#617: FILE: drivers/gpu/drm/i915/intel_pm.c:4335:
+#define ICL_PIPE_AB_DBUF_SLICES(DBuf1, DBuf2)   \

-:629: CHECK:CAMELCASE: Avoid CamelCase: <DBuf3>
#629: FILE: drivers/gpu/drm/i915/intel_pm.c:4347:
+#define ICL_PIPE_ABC_DBUF_SLICES(DBuf1, DBuf2, DBuf3)  \

-:639: CHECK:CAMELCASE: Avoid CamelCase: <DBuf4>
#639: FILE: drivers/gpu/drm/i915/intel_pm.c:4357:
+#define ICL_PIPE_ABCD_DBUF_SLICES(DBuf1, DBuf2, DBuf3, DBuf4)  \

-:748: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#748: FILE: drivers/gpu/drm/i915/intel_pm.c:4466:
+u32 i915_get_allowed_dbuf_mask(struct drm_i915_private *dev_priv,
+				      int pipe, u32 active_pipes,

total: 0 errors, 2 warnings, 9 checks, 680 lines checked

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2019-11-07 17:40 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-07 13:10 [PATCH v4] drm/i915: Enable second dbuf slice for ICL and TGL Stanislav Lisovskiy
2019-11-07 13:10 ` [Intel-gfx] " Stanislav Lisovskiy
2019-11-07 17:40 ` Patchwork [this message]
2019-11-07 17:40   ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2019-11-07 17:41 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-11-07 17:41   ` [Intel-gfx] " Patchwork
2019-11-07 18:12 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-11-07 18:12   ` [Intel-gfx] " Patchwork

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