* [Intel-gfx] [PATCH 1/2] drm/i915/guc: Add GuC method to determine if submission is active.
@ 2019-11-06 17:40 ` don.hiatt
0 siblings, 0 replies; 14+ messages in thread
From: don.hiatt @ 2019-11-06 17:40 UTC (permalink / raw)
To: intel-gfx
From: Don Hiatt <don.hiatt@intel.com>
Add intel_guc_submission_is_enabled() function to determine if
GuC submission is active. Based on code by Michal Wajdeczko.
Signed-off-by: Don Hiatt <don.hiatt@intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 +-
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h | 1 +
drivers/gpu/drm/i915/i915_drv.h | 14 ++++++++++++++
3 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 2498c55e0ea5..0aaef7c07879 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -1081,7 +1081,7 @@ static void guc_interrupts_release(struct intel_gt *gt)
rps->pm_intrmsk_mbz &= ~ARAT_EXPIRED_INTRMSK;
}
-static void guc_set_default_submission(struct intel_engine_cs *engine)
+void guc_set_default_submission(struct intel_engine_cs *engine)
{
/*
* We inherit a bunch of functions from execlists that we'd like
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
index 54d716828352..a0132f061ebc 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
@@ -63,5 +63,6 @@ void intel_guc_submission_disable(struct intel_guc *guc);
void intel_guc_submission_fini(struct intel_guc *guc);
int intel_guc_preempt_work_create(struct intel_guc *guc);
void intel_guc_preempt_work_destroy(struct intel_guc *guc);
+void guc_set_default_submission(struct intel_engine_cs *engine);
#endif
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7e0f67babe20..878d574bb1c1 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -78,8 +78,10 @@
#include "gt/intel_lrc.h"
#include "gt/intel_engine.h"
+#include "gt/intel_gt.h"
#include "gt/intel_gt_types.h"
#include "gt/intel_workarounds.h"
+#include "gt/uc/intel_guc_submission.h"
#include "gt/uc/intel_uc.h"
#include "intel_device_info.h"
@@ -2032,4 +2034,16 @@ i915_coherent_map_type(struct drm_i915_private *i915)
return HAS_LLC(i915) ? I915_MAP_WB : I915_MAP_WC;
}
+static inline bool intel_guc_submission_is_enabled(struct intel_guc *guc)
+{
+ struct intel_gt *gt = guc_to_gt(guc);
+ struct intel_engine_cs *engine;
+ enum intel_engine_id id;
+
+ for_each_engine(engine, gt, id)
+ return engine->set_default_submission ==
+ guc_set_default_submission;
+ return false;
+}
+
#endif
--
2.20.1
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^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 2/2] drm/i915/guc: Skip suspend/resume GuC action on platforms w/o GuC submission
@ 2019-11-06 17:40 ` don.hiatt
0 siblings, 0 replies; 14+ messages in thread
From: don.hiatt @ 2019-11-06 17:40 UTC (permalink / raw)
To: intel-gfx
From: Don Hiatt <don.hiatt@intel.com>
On some platforms (e.g. KBL) that do not support GuC submission, but
the user enabled the GuC communication (e.g for HuC authentication)
calling the GuC EXIT_S_STATE action results in lose of ability to
enter RC6. We can remove the GuC suspend/resume entirely as we do
not need to save the GuC submission status.
v2: Do not suspend/resume the GuC on platforms that do not support
Guc Submission.
v3: Fix typo, move suspend logic to remove goto.
v4: Use intel_guc_submission_is_enabled() to check GuC submission
status.
Signed-off-by: Don Hiatt <don.hiatt@intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 7 +++++++
drivers/gpu/drm/i915/gt/uc/intel_uc.c | 8 ++++++++
2 files changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 019ae6486e8d..92d9305c0d73 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -553,6 +553,13 @@ int intel_guc_suspend(struct intel_guc *guc)
GUC_POWER_D1, /* any value greater than GUC_POWER_D0 */
};
+ /*
+ * If GuC communication is enabled but submission is not supported,
+ * we do not need to suspend the GuC.
+ */
+ if (!intel_guc_submission_is_enabled(guc))
+ return 0;
+
/*
* The ENTER_S_STATE action queues the save/restore operation in GuC FW
* and then returns, so waiting on the H2G is not enough to guarantee
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
index 629b19377a29..4dd43b99a334 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
@@ -605,6 +605,14 @@ static int __uc_resume(struct intel_uc *uc, bool enable_communication)
if (enable_communication)
guc_enable_communication(guc);
+ /*
+ * If GuC communication is enabled but submission is not supported,
+ * we do not need to resume the GuC but we do need to enable the
+ * GuC communication on resume (above).
+ */
+ if (!intel_guc_submission_is_enabled(guc))
+ return 0;
+
err = intel_guc_resume(guc);
if (err) {
DRM_DEBUG_DRIVER("Failed to resume GuC, err=%d", err);
--
2.20.1
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 14+ messages in thread* [Intel-gfx] [PATCH 2/2] drm/i915/guc: Skip suspend/resume GuC action on platforms w/o GuC submission
@ 2019-11-06 17:40 ` don.hiatt
0 siblings, 0 replies; 14+ messages in thread
From: don.hiatt @ 2019-11-06 17:40 UTC (permalink / raw)
To: intel-gfx
From: Don Hiatt <don.hiatt@intel.com>
On some platforms (e.g. KBL) that do not support GuC submission, but
the user enabled the GuC communication (e.g for HuC authentication)
calling the GuC EXIT_S_STATE action results in lose of ability to
enter RC6. We can remove the GuC suspend/resume entirely as we do
not need to save the GuC submission status.
v2: Do not suspend/resume the GuC on platforms that do not support
Guc Submission.
v3: Fix typo, move suspend logic to remove goto.
v4: Use intel_guc_submission_is_enabled() to check GuC submission
status.
Signed-off-by: Don Hiatt <don.hiatt@intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 7 +++++++
drivers/gpu/drm/i915/gt/uc/intel_uc.c | 8 ++++++++
2 files changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 019ae6486e8d..92d9305c0d73 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -553,6 +553,13 @@ int intel_guc_suspend(struct intel_guc *guc)
GUC_POWER_D1, /* any value greater than GUC_POWER_D0 */
};
+ /*
+ * If GuC communication is enabled but submission is not supported,
+ * we do not need to suspend the GuC.
+ */
+ if (!intel_guc_submission_is_enabled(guc))
+ return 0;
+
/*
* The ENTER_S_STATE action queues the save/restore operation in GuC FW
* and then returns, so waiting on the H2G is not enough to guarantee
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
index 629b19377a29..4dd43b99a334 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
@@ -605,6 +605,14 @@ static int __uc_resume(struct intel_uc *uc, bool enable_communication)
if (enable_communication)
guc_enable_communication(guc);
+ /*
+ * If GuC communication is enabled but submission is not supported,
+ * we do not need to resume the GuC but we do need to enable the
+ * GuC communication on resume (above).
+ */
+ if (!intel_guc_submission_is_enabled(guc))
+ return 0;
+
err = intel_guc_resume(guc);
if (err) {
DRM_DEBUG_DRIVER("Failed to resume GuC, err=%d", err);
--
2.20.1
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^ permalink raw reply related [flat|nested] 14+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/guc: Add GuC method to determine if submission is active.
@ 2019-11-06 23:33 ` Patchwork
0 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2019-11-06 23:33 UTC (permalink / raw)
To: don.hiatt; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915/guc: Add GuC method to determine if submission is active.
URL : https://patchwork.freedesktop.org/series/69086/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7276 -> Patchwork_15163
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/index.html
Known issues
------------
Here are the changes found in Patchwork_15163 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live_blt:
- fi-hsw-peppy: [PASS][1] -> [DMESG-FAIL][2] ([fdo#112147])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/fi-hsw-peppy/igt@i915_selftest@live_blt.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/fi-hsw-peppy/igt@i915_selftest@live_blt.html
* igt@i915_selftest@live_gem_contexts:
- fi-bsw-nick: [PASS][3] -> [INCOMPLETE][4] ([fdo# 111542])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/fi-bsw-nick/igt@i915_selftest@live_gem_contexts.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/fi-bsw-nick/igt@i915_selftest@live_gem_contexts.html
[fdo# 111542]: https://bugs.freedesktop.org/show_bug.cgi?id= 111542
[fdo#112147]: https://bugs.freedesktop.org/show_bug.cgi?id=112147
Participating hosts (51 -> 45)
------------------------------
Missing (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7276 -> Patchwork_15163
CI-20190529: 20190529
CI_DRM_7276: c31b5e6955feebc68e1ab88fe6343b5e5ee7e9fe @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5264: f21213012393bd8041ad93084ce29da088ef8426 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_15163: 5be03d07769cee3a6a9afe2fd89271c9779e048a @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
5be03d07769c drm/i915/guc: Skip suspend/resume GuC action on platforms w/o GuC submission
2295a44e2101 drm/i915/guc: Add GuC method to determine if submission is active.
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/index.html
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH 1/2] drm/i915/guc: Add GuC method to determine if submission is active.
@ 2019-11-07 0:13 ` Daniele Ceraolo Spurio
0 siblings, 0 replies; 14+ messages in thread
From: Daniele Ceraolo Spurio @ 2019-11-07 0:13 UTC (permalink / raw)
To: don.hiatt, intel-gfx, Michal Wajdeczko
On 11/6/19 9:40 AM, don.hiatt@intel.com wrote:
> From: Don Hiatt <don.hiatt@intel.com>
>
> Add intel_guc_submission_is_enabled() function to determine if
> GuC submission is active. Based on code by Michal Wajdeczko.
>
> Signed-off-by: Don Hiatt <don.hiatt@intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 +-
> drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h | 1 +
> drivers/gpu/drm/i915/i915_drv.h | 14 ++++++++++++++
> 3 files changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> index 2498c55e0ea5..0aaef7c07879 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> @@ -1081,7 +1081,7 @@ static void guc_interrupts_release(struct intel_gt *gt)
> rps->pm_intrmsk_mbz &= ~ARAT_EXPIRED_INTRMSK;
> }
>
> -static void guc_set_default_submission(struct intel_engine_cs *engine)
> +void guc_set_default_submission(struct intel_engine_cs *engine)
> {
> /*
> * We inherit a bunch of functions from execlists that we'd like
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> index 54d716828352..a0132f061ebc 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> @@ -63,5 +63,6 @@ void intel_guc_submission_disable(struct intel_guc *guc);
> void intel_guc_submission_fini(struct intel_guc *guc);
> int intel_guc_preempt_work_create(struct intel_guc *guc);
> void intel_guc_preempt_work_destroy(struct intel_guc *guc);
> +void guc_set_default_submission(struct intel_engine_cs *engine);
>
> #endif
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 7e0f67babe20..878d574bb1c1 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -78,8 +78,10 @@
>
> #include "gt/intel_lrc.h"
> #include "gt/intel_engine.h"
> +#include "gt/intel_gt.h"
> #include "gt/intel_gt_types.h"
> #include "gt/intel_workarounds.h"
> +#include "gt/uc/intel_guc_submission.h"
> #include "gt/uc/intel_uc.h"
>
> #include "intel_device_info.h"
> @@ -2032,4 +2034,16 @@ i915_coherent_map_type(struct drm_i915_private *i915)
> return HAS_LLC(i915) ? I915_MAP_WB : I915_MAP_WC;
> }
>
> +static inline bool intel_guc_submission_is_enabled(struct intel_guc *guc)
> +{
> + struct intel_gt *gt = guc_to_gt(guc);
> + struct intel_engine_cs *engine;
> + enum intel_engine_id id;
> +
> + for_each_engine(engine, gt, id)
> + return engine->set_default_submission ==
> + guc_set_default_submission;
> + return false;
It feels weird that we need to go look into the engines to understand if
GuC submission is enabled or not. One of the patches I've sent earlier
today ("drm/i915/guc: kill doorbell code and selftests") makes it so
that intel_guc_submission_enable() can't fail, so after that it should
be possible to have something like:
bool intel_guc_submission_is_enabled(struct intel_guc *guc) {
return intel_guc_is_submission_supported(guc) &&
intel_guc_is_running(guc);
}
AFAICS, even without my patch we do sanitize the GuC is
intel_guc_submission_enable() fails, so the above should still work. If
something like this doesn't fly, my preference would be to set something
in intel_guc_submission_enable and check that instead of going inside
the engines.
Michal, any input here?
Thanks,
Daniele
> +}
> +
> #endif
>
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: Add GuC method to determine if submission is active.
@ 2019-11-07 0:13 ` Daniele Ceraolo Spurio
0 siblings, 0 replies; 14+ messages in thread
From: Daniele Ceraolo Spurio @ 2019-11-07 0:13 UTC (permalink / raw)
To: don.hiatt, intel-gfx, Michal Wajdeczko
On 11/6/19 9:40 AM, don.hiatt@intel.com wrote:
> From: Don Hiatt <don.hiatt@intel.com>
>
> Add intel_guc_submission_is_enabled() function to determine if
> GuC submission is active. Based on code by Michal Wajdeczko.
>
> Signed-off-by: Don Hiatt <don.hiatt@intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 +-
> drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h | 1 +
> drivers/gpu/drm/i915/i915_drv.h | 14 ++++++++++++++
> 3 files changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> index 2498c55e0ea5..0aaef7c07879 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> @@ -1081,7 +1081,7 @@ static void guc_interrupts_release(struct intel_gt *gt)
> rps->pm_intrmsk_mbz &= ~ARAT_EXPIRED_INTRMSK;
> }
>
> -static void guc_set_default_submission(struct intel_engine_cs *engine)
> +void guc_set_default_submission(struct intel_engine_cs *engine)
> {
> /*
> * We inherit a bunch of functions from execlists that we'd like
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> index 54d716828352..a0132f061ebc 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> @@ -63,5 +63,6 @@ void intel_guc_submission_disable(struct intel_guc *guc);
> void intel_guc_submission_fini(struct intel_guc *guc);
> int intel_guc_preempt_work_create(struct intel_guc *guc);
> void intel_guc_preempt_work_destroy(struct intel_guc *guc);
> +void guc_set_default_submission(struct intel_engine_cs *engine);
>
> #endif
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 7e0f67babe20..878d574bb1c1 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -78,8 +78,10 @@
>
> #include "gt/intel_lrc.h"
> #include "gt/intel_engine.h"
> +#include "gt/intel_gt.h"
> #include "gt/intel_gt_types.h"
> #include "gt/intel_workarounds.h"
> +#include "gt/uc/intel_guc_submission.h"
> #include "gt/uc/intel_uc.h"
>
> #include "intel_device_info.h"
> @@ -2032,4 +2034,16 @@ i915_coherent_map_type(struct drm_i915_private *i915)
> return HAS_LLC(i915) ? I915_MAP_WB : I915_MAP_WC;
> }
>
> +static inline bool intel_guc_submission_is_enabled(struct intel_guc *guc)
> +{
> + struct intel_gt *gt = guc_to_gt(guc);
> + struct intel_engine_cs *engine;
> + enum intel_engine_id id;
> +
> + for_each_engine(engine, gt, id)
> + return engine->set_default_submission ==
> + guc_set_default_submission;
> + return false;
It feels weird that we need to go look into the engines to understand if
GuC submission is enabled or not. One of the patches I've sent earlier
today ("drm/i915/guc: kill doorbell code and selftests") makes it so
that intel_guc_submission_enable() can't fail, so after that it should
be possible to have something like:
bool intel_guc_submission_is_enabled(struct intel_guc *guc) {
return intel_guc_is_submission_supported(guc) &&
intel_guc_is_running(guc);
}
AFAICS, even without my patch we do sanitize the GuC is
intel_guc_submission_enable() fails, so the above should still work. If
something like this doesn't fly, my preference would be to set something
in intel_guc_submission_enable and check that instead of going inside
the engines.
Michal, any input here?
Thanks,
Daniele
> +}
> +
> #endif
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915/guc: Add GuC method to determine if submission is active.
@ 2019-11-08 1:50 ` Patchwork
0 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2019-11-08 1:50 UTC (permalink / raw)
To: don.hiatt; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915/guc: Add GuC method to determine if submission is active.
URL : https://patchwork.freedesktop.org/series/69086/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7276_full -> Patchwork_15163_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_15163_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_15163_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_15163_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_flip_tiling@flip-to-yf-tiled:
- shard-skl: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-skl6/igt@kms_flip_tiling@flip-to-yf-tiled.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-skl2/igt@kms_flip_tiling@flip-to-yf-tiled.html
Known issues
------------
Here are the changes found in Patchwork_15163_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_isolation@bcs0-s3:
- shard-apl: [PASS][3] -> [DMESG-WARN][4] ([fdo#108566]) +2 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-apl1/igt@gem_ctx_isolation@bcs0-s3.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-apl1/igt@gem_ctx_isolation@bcs0-s3.html
* igt@gem_ctx_isolation@vecs0-s3:
- shard-skl: [PASS][5] -> [INCOMPLETE][6] ([fdo#104108])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-skl5/igt@gem_ctx_isolation@vecs0-s3.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-skl7/igt@gem_ctx_isolation@vecs0-s3.html
* igt@gem_ctx_persistence@vcs1-cleanup:
- shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#109276] / [fdo#112080]) +2 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-iclb1/igt@gem_ctx_persistence@vcs1-cleanup.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-iclb6/igt@gem_ctx_persistence@vcs1-cleanup.html
* igt@gem_exec_schedule@preempt-queue-bsd1:
- shard-tglb: [PASS][9] -> [INCOMPLETE][10] ([fdo#111677])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-tglb2/igt@gem_exec_schedule@preempt-queue-bsd1.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-tglb6/igt@gem_exec_schedule@preempt-queue-bsd1.html
* igt@gem_exec_schedule@preempt-queue-chain-blt:
- shard-tglb: [PASS][11] -> [INCOMPLETE][12] ([fdo#111606] / [fdo#111677])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-tglb7/igt@gem_exec_schedule@preempt-queue-chain-blt.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-tglb6/igt@gem_exec_schedule@preempt-queue-chain-blt.html
* igt@gem_exec_schedule@preemptive-hang-bsd:
- shard-iclb: [PASS][13] -> [SKIP][14] ([fdo#112146]) +4 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-iclb7/igt@gem_exec_schedule@preemptive-hang-bsd.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-iclb1/igt@gem_exec_schedule@preemptive-hang-bsd.html
* igt@gem_persistent_relocs@forked-thrashing:
- shard-tglb: [PASS][15] -> [INCOMPLETE][16] ([fdo#112068 ])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-tglb7/igt@gem_persistent_relocs@forked-thrashing.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-tglb8/igt@gem_persistent_relocs@forked-thrashing.html
* igt@gem_userptr_blits@map-fixed-invalidate-busy-gup:
- shard-hsw: [PASS][17] -> [DMESG-WARN][18] ([fdo#111870])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-hsw6/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-hsw6/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
* igt@gem_userptr_blits@sync-unmap-cycles:
- shard-snb: [PASS][19] -> [DMESG-WARN][20] ([fdo#111870])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-snb2/igt@gem_userptr_blits@sync-unmap-cycles.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-snb7/igt@gem_userptr_blits@sync-unmap-cycles.html
* igt@kms_color@pipe-a-ctm-0-5:
- shard-skl: [PASS][21] -> [DMESG-WARN][22] ([fdo#106107])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-skl6/igt@kms_color@pipe-a-ctm-0-5.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-skl2/igt@kms_color@pipe-a-ctm-0-5.html
* igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
- shard-glk: [PASS][23] -> [FAIL][24] ([fdo#104873])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-glk1/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-glk9/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
* igt@kms_cursor_legacy@cursor-vs-flip-toggle:
- shard-hsw: [PASS][25] -> [FAIL][26] ([fdo#103355])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-hsw1/igt@kms_cursor_legacy@cursor-vs-flip-toggle.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-hsw1/igt@kms_cursor_legacy@cursor-vs-flip-toggle.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-glk: [PASS][27] -> [FAIL][28] ([fdo#105363])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-glk9/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-glk7/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
- shard-glk: [PASS][29] -> [FAIL][30] ([fdo#100368])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-glk3/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-glk6/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-skl: [PASS][31] -> [FAIL][32] ([fdo#105363])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-skl2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-kbl: [PASS][33] -> [DMESG-WARN][34] ([fdo#108566]) +5 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-kbl3/igt@kms_flip@flip-vs-suspend-interruptible.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-kbl6/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt:
- shard-iclb: [PASS][35] -> [FAIL][36] ([fdo#103167]) +6 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt:
- shard-tglb: [PASS][37] -> [FAIL][38] ([fdo#103167]) +1 similar issue
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-tglb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-tglb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-suspend:
- shard-tglb: [PASS][39] -> [INCOMPLETE][40] ([fdo#111832] / [fdo#111850] / [fdo#111884])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-tglb4/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-tglb3/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
* igt@kms_frontbuffer_tracking@psr-suspend:
- shard-tglb: [PASS][41] -> [INCOMPLETE][42] ([fdo#111832] / [fdo#111850]) +2 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-tglb9/igt@kms_frontbuffer_tracking@psr-suspend.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-tglb1/igt@kms_frontbuffer_tracking@psr-suspend.html
* igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl: [PASS][43] -> [FAIL][44] ([fdo#108145])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-skl6/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-skl2/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [PASS][45] -> [FAIL][46] ([fdo#108145] / [fdo#110403])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-skl9/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-skl9/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_psr2_su@frontbuffer:
- shard-iclb: [PASS][47] -> [SKIP][48] ([fdo#109642] / [fdo#111068])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-iclb5/igt@kms_psr2_su@frontbuffer.html
* igt@kms_psr@psr2_primary_mmap_cpu:
- shard-iclb: [PASS][49] -> [SKIP][50] ([fdo#109441]) +1 similar issue
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-iclb4/igt@kms_psr@psr2_primary_mmap_cpu.html
* igt@kms_vblank@pipe-d-ts-continuation-dpms-suspend:
- shard-tglb: [PASS][51] -> [INCOMPLETE][52] ([fdo#111850])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-tglb8/igt@kms_vblank@pipe-d-ts-continuation-dpms-suspend.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-tglb3/igt@kms_vblank@pipe-d-ts-continuation-dpms-suspend.html
* igt@perf_pmu@busy-accuracy-2-vcs1:
- shard-iclb: [PASS][53] -> [SKIP][54] ([fdo#112080]) +5 similar issues
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-iclb1/igt@perf_pmu@busy-accuracy-2-vcs1.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-iclb6/igt@perf_pmu@busy-accuracy-2-vcs1.html
* igt@prime_busy@after-bsd2:
- shard-iclb: [PASS][55] -> [SKIP][56] ([fdo#109276]) +13 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-iclb2/igt@prime_busy@after-bsd2.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-iclb8/igt@prime_busy@after-bsd2.html
#### Possible fixes ####
* igt@gem_ctx_shared@q-smoketest-bsd:
- shard-tglb: [INCOMPLETE][57] ([fdo# 111852 ]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-tglb6/igt@gem_ctx_shared@q-smoketest-bsd.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-tglb2/igt@gem_ctx_shared@q-smoketest-bsd.html
* igt@gem_ctx_switch@all-light:
- shard-tglb: [INCOMPLETE][59] ([fdo#111672]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-tglb6/igt@gem_ctx_switch@all-light.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-tglb7/igt@gem_ctx_switch@all-light.html
* igt@gem_exec_balancer@smoke:
- shard-iclb: [SKIP][61] ([fdo#110854]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-iclb7/igt@gem_exec_balancer@smoke.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-iclb1/igt@gem_exec_balancer@smoke.html
* igt@gem_exec_schedule@fifo-bsd1:
- shard-iclb: [SKIP][63] ([fdo#109276]) -> [PASS][64] +9 similar issues
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-iclb7/igt@gem_exec_schedule@fifo-bsd1.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-iclb1/igt@gem_exec_schedule@fifo-bsd1.html
* igt@gem_exec_schedule@reorder-wide-bsd:
- shard-iclb: [SKIP][65] ([fdo#112146]) -> [PASS][66] +1 similar issue
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-iclb1/igt@gem_exec_schedule@reorder-wide-bsd.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-iclb6/igt@gem_exec_schedule@reorder-wide-bsd.html
* igt@gem_exec_suspend@basic-s3:
- shard-tglb: [INCOMPLETE][67] ([fdo#111736] / [fdo#111850]) -> [PASS][68]
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-tglb4/igt@gem_exec_suspend@basic-s3.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-tglb9/igt@gem_exec_suspend@basic-s3.html
* igt@gem_softpin@noreloc-s3:
- shard-skl: [INCOMPLETE][69] ([fdo#104108]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-skl3/igt@gem_softpin@noreloc-s3.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-skl3/igt@gem_softpin@noreloc-s3.html
* igt@gem_userptr_blits@map-fixed-invalidate-busy:
- shard-hsw: [DMESG-WARN][71] ([fdo#111870]) -> [PASS][72] +1 similar issue
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-hsw1/igt@gem_userptr_blits@map-fixed-invalidate-busy.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-hsw4/igt@gem_userptr_blits@map-fixed-invalidate-busy.html
* igt@i915_pm_dc@dc6-psr:
- shard-iclb: [FAIL][73] ([fdo#110548]) -> [PASS][74]
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-iclb2/igt@i915_pm_dc@dc6-psr.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-iclb8/igt@i915_pm_dc@dc6-psr.html
* igt@i915_pm_rps@waitboost:
- shard-apl: [FAIL][75] ([fdo#102250]) -> [PASS][76]
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-apl3/igt@i915_pm_rps@waitboost.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-apl3/igt@i915_pm_rps@waitboost.html
* igt@i915_selftest@mock_requests:
- shard-glk: [INCOMPLETE][77] ([fdo#103359] / [k.org#198133]) -> [PASS][78]
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-glk5/igt@i915_selftest@mock_requests.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-glk5/igt@i915_selftest@mock_requests.html
* igt@i915_suspend@sysfs-reader:
- shard-tglb: [INCOMPLETE][79] ([fdo#111832] / [fdo#111850]) -> [PASS][80] +2 similar issues
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-tglb4/igt@i915_suspend@sysfs-reader.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-tglb6/igt@i915_suspend@sysfs-reader.html
* igt@kms_cursor_crc@pipe-c-cursor-suspend:
- shard-kbl: [DMESG-WARN][81] ([fdo#108566]) -> [PASS][82] +1 similar issue
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-kbl1/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-kbl7/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-skl: [FAIL][83] ([fdo#105363]) -> [PASS][84]
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-skl10/igt@kms_flip@flip-vs-expired-vblank.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-skl2/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render:
- shard-iclb: [FAIL][85] ([fdo#103167]) -> [PASS][86] +3 similar issues
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-iclb8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-iclb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt:
- shard-tglb: [FAIL][87] ([fdo#103167]) -> [PASS][88]
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-tglb1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-tglb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
- shard-apl: [DMESG-WARN][89] ([fdo#108566]) -> [PASS][90] +1 similar issue
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-apl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-apl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
* igt@kms_plane_lowres@pipe-a-tiling-x:
- shard-iclb: [FAIL][91] ([fdo#103166]) -> [PASS][92]
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-iclb6/igt@kms_plane_lowres@pipe-a-tiling-x.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-iclb7/igt@kms_plane_lowres@pipe-a-tiling-x.html
* igt@kms_psr@psr2_cursor_mmap_cpu:
- shard-iclb: [SKIP][93] ([fdo#109441]) -> [PASS][94] +3 similar issues
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-iclb4/igt@kms_psr@psr2_cursor_mmap_cpu.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html
* igt@perf_pmu@busy-no-semaphores-vcs1:
- shard-iclb: [SKIP][95] ([fdo#112080]) -> [PASS][96] +10 similar issues
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-iclb7/igt@perf_pmu@busy-no-semaphores-vcs1.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-iclb1/igt@perf_pmu@busy-no-semaphores-vcs1.html
* igt@prime_vgem@sync-blt:
- shard-tglb: [INCOMPLETE][97] ([fdo#111612]) -> [PASS][98]
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-tglb6/igt@prime_vgem@sync-blt.html
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-tglb5/igt@prime_vgem@sync-blt.html
#### Warnings ####
* igt@gem_ctx_isolation@vcs1-nonpriv:
- shard-iclb: [SKIP][99] ([fdo#109276] / [fdo#112080]) -> [FAIL][100] ([fdo#111329])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-iclb7/igt@gem_ctx_isolation@vcs1-nonpriv.html
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-iclb1/igt@gem_ctx_isolation@vcs1-nonpriv.html
* igt@gem_eio@kms:
- shard-snb: [INCOMPLETE][101] ([fdo#105411]) -> [DMESG-WARN][102] ([fdo#111781])
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-snb2/igt@gem_eio@kms.html
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-snb7/igt@gem_eio@kms.html
* igt@gem_exec_schedule@deep-render:
- shard-tglb: [FAIL][103] ([fdo#111646]) -> [INCOMPLETE][104] ([fdo#111671]) +1 similar issue
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7276/shard-tglb8/igt@gem_exec_schedule@deep-render.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/shard-tglb3/igt@gem_exec_schedule@deep-render.html
* igt@gem_mocs_settings@mocs-reset-bsd2:
- shard-iclb:
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15163/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH 1/2] drm/i915/guc: Add GuC method to determine if submission is active.
@ 2019-11-10 11:10 ` Tomas Janousek
0 siblings, 0 replies; 14+ messages in thread
From: Tomas Janousek @ 2019-11-10 11:10 UTC (permalink / raw)
To: don.hiatt; +Cc: intel-gfx
On Wed, Nov 06, 2019 at 09:40:02AM -0800, don.hiatt@intel.com wrote:
> Add intel_guc_submission_is_enabled() function to determine if
> GuC submission is active. Based on code by Michal Wajdeczko.
Don't forget to update USES_GUC_SUBMISSION (and/or
intel_uc_uses_guc_submission) to use this new function.
(And I still think the "drm/i915/guc: Skip suspend/resume GuC action on" patch
should just use USES_GUC_SUBMISSION. The current version (v3 & v4) of the
patch which splits the logic between intel_guc.c and intel_uc.c just to avoid
the goto is making the code harder to maintain, in my opinion.)
>
> Signed-off-by: Don Hiatt <don.hiatt@intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 +-
> drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h | 1 +
> drivers/gpu/drm/i915/i915_drv.h | 14 ++++++++++++++
> 3 files changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> index 2498c55e0ea5..0aaef7c07879 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> @@ -1081,7 +1081,7 @@ static void guc_interrupts_release(struct intel_gt *gt)
> rps->pm_intrmsk_mbz &= ~ARAT_EXPIRED_INTRMSK;
> }
>
> -static void guc_set_default_submission(struct intel_engine_cs *engine)
> +void guc_set_default_submission(struct intel_engine_cs *engine)
> {
> /*
> * We inherit a bunch of functions from execlists that we'd like
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> index 54d716828352..a0132f061ebc 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> @@ -63,5 +63,6 @@ void intel_guc_submission_disable(struct intel_guc *guc);
> void intel_guc_submission_fini(struct intel_guc *guc);
> int intel_guc_preempt_work_create(struct intel_guc *guc);
> void intel_guc_preempt_work_destroy(struct intel_guc *guc);
> +void guc_set_default_submission(struct intel_engine_cs *engine);
>
> #endif
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 7e0f67babe20..878d574bb1c1 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -78,8 +78,10 @@
>
> #include "gt/intel_lrc.h"
> #include "gt/intel_engine.h"
> +#include "gt/intel_gt.h"
> #include "gt/intel_gt_types.h"
> #include "gt/intel_workarounds.h"
> +#include "gt/uc/intel_guc_submission.h"
> #include "gt/uc/intel_uc.h"
>
> #include "intel_device_info.h"
> @@ -2032,4 +2034,16 @@ i915_coherent_map_type(struct drm_i915_private *i915)
> return HAS_LLC(i915) ? I915_MAP_WB : I915_MAP_WC;
> }
>
> +static inline bool intel_guc_submission_is_enabled(struct intel_guc *guc)
> +{
> + struct intel_gt *gt = guc_to_gt(guc);
> + struct intel_engine_cs *engine;
> + enum intel_engine_id id;
> +
> + for_each_engine(engine, gt, id)
> + return engine->set_default_submission ==
> + guc_set_default_submission;
> + return false;
> +}
> +
> #endif
> --
> 2.20.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Tomáš Janoušek, a.k.a. Pivník, a.k.a. Liskni_si, http://work.lisk.in/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: Add GuC method to determine if submission is active.
@ 2019-11-10 11:10 ` Tomas Janousek
0 siblings, 0 replies; 14+ messages in thread
From: Tomas Janousek @ 2019-11-10 11:10 UTC (permalink / raw)
To: don.hiatt; +Cc: intel-gfx
On Wed, Nov 06, 2019 at 09:40:02AM -0800, don.hiatt@intel.com wrote:
> Add intel_guc_submission_is_enabled() function to determine if
> GuC submission is active. Based on code by Michal Wajdeczko.
Don't forget to update USES_GUC_SUBMISSION (and/or
intel_uc_uses_guc_submission) to use this new function.
(And I still think the "drm/i915/guc: Skip suspend/resume GuC action on" patch
should just use USES_GUC_SUBMISSION. The current version (v3 & v4) of the
patch which splits the logic between intel_guc.c and intel_uc.c just to avoid
the goto is making the code harder to maintain, in my opinion.)
>
> Signed-off-by: Don Hiatt <don.hiatt@intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 +-
> drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h | 1 +
> drivers/gpu/drm/i915/i915_drv.h | 14 ++++++++++++++
> 3 files changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> index 2498c55e0ea5..0aaef7c07879 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> @@ -1081,7 +1081,7 @@ static void guc_interrupts_release(struct intel_gt *gt)
> rps->pm_intrmsk_mbz &= ~ARAT_EXPIRED_INTRMSK;
> }
>
> -static void guc_set_default_submission(struct intel_engine_cs *engine)
> +void guc_set_default_submission(struct intel_engine_cs *engine)
> {
> /*
> * We inherit a bunch of functions from execlists that we'd like
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> index 54d716828352..a0132f061ebc 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> @@ -63,5 +63,6 @@ void intel_guc_submission_disable(struct intel_guc *guc);
> void intel_guc_submission_fini(struct intel_guc *guc);
> int intel_guc_preempt_work_create(struct intel_guc *guc);
> void intel_guc_preempt_work_destroy(struct intel_guc *guc);
> +void guc_set_default_submission(struct intel_engine_cs *engine);
>
> #endif
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 7e0f67babe20..878d574bb1c1 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -78,8 +78,10 @@
>
> #include "gt/intel_lrc.h"
> #include "gt/intel_engine.h"
> +#include "gt/intel_gt.h"
> #include "gt/intel_gt_types.h"
> #include "gt/intel_workarounds.h"
> +#include "gt/uc/intel_guc_submission.h"
> #include "gt/uc/intel_uc.h"
>
> #include "intel_device_info.h"
> @@ -2032,4 +2034,16 @@ i915_coherent_map_type(struct drm_i915_private *i915)
> return HAS_LLC(i915) ? I915_MAP_WB : I915_MAP_WC;
> }
>
> +static inline bool intel_guc_submission_is_enabled(struct intel_guc *guc)
> +{
> + struct intel_gt *gt = guc_to_gt(guc);
> + struct intel_engine_cs *engine;
> + enum intel_engine_id id;
> +
> + for_each_engine(engine, gt, id)
> + return engine->set_default_submission ==
> + guc_set_default_submission;
> + return false;
> +}
> +
> #endif
> --
> 2.20.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Tomáš Janoušek, a.k.a. Pivník, a.k.a. Liskni_si, http://work.lisk.in/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH 1/2] drm/i915/guc: Add GuC method to determine if submission is active.
@ 2019-11-11 18:04 ` Hiatt, Don
0 siblings, 0 replies; 14+ messages in thread
From: Hiatt, Don @ 2019-11-11 18:04 UTC (permalink / raw)
To: Tomas Janousek, Wajdeczko, Michal; +Cc: intel-gfx
> From: Tomas Janousek <tomi@nomi.cz>
> Sent: Sunday, November 10, 2019 3:11 AM
> To: Hiatt, Don <don.hiatt@intel.com>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 1/2] drm/i915/guc: Add GuC method to determine if
> submission is active.
>
> On Wed, Nov 06, 2019 at 09:40:02AM -0800, don.hiatt@intel.com wrote:
> > Add intel_guc_submission_is_enabled() function to determine if
> > GuC submission is active. Based on code by Michal Wajdeczko.
>
> Don't forget to update USES_GUC_SUBMISSION (and/or
> intel_uc_uses_guc_submission) to use this new function.
>
Michal said that you have to use USE_GUC_SUBMISSION until the engines
are up and that this function can't replace it's usage.
Michal: Based upon the feedback, do you have any issue with me going back to
v2 of the patch?
> (And I still think the "drm/i915/guc: Skip suspend/resume GuC action on" patch
> should just use USES_GUC_SUBMISSION. The current version (v3 & v4) of the
> patch which splits the logic between intel_guc.c and intel_uc.c just to avoid
> the goto is making the code harder to maintain, in my opinion.)
>
> >
> > Signed-off-by: Don Hiatt <don.hiatt@intel.com>
> > ---
> > drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 +-
> > drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h | 1 +
> > drivers/gpu/drm/i915/i915_drv.h | 14 ++++++++++++++
> > 3 files changed, 16 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> > index 2498c55e0ea5..0aaef7c07879 100644
> > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> > @@ -1081,7 +1081,7 @@ static void guc_interrupts_release(struct intel_gt
> *gt)
> > rps->pm_intrmsk_mbz &= ~ARAT_EXPIRED_INTRMSK;
> > }
> >
> > -static void guc_set_default_submission(struct intel_engine_cs *engine)
> > +void guc_set_default_submission(struct intel_engine_cs *engine)
> > {
> > /*
> > * We inherit a bunch of functions from execlists that we'd like
> > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> > index 54d716828352..a0132f061ebc 100644
> > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> > @@ -63,5 +63,6 @@ void intel_guc_submission_disable(struct intel_guc
> *guc);
> > void intel_guc_submission_fini(struct intel_guc *guc);
> > int intel_guc_preempt_work_create(struct intel_guc *guc);
> > void intel_guc_preempt_work_destroy(struct intel_guc *guc);
> > +void guc_set_default_submission(struct intel_engine_cs *engine);
> >
> > #endif
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h
> > index 7e0f67babe20..878d574bb1c1 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -78,8 +78,10 @@
> >
> > #include "gt/intel_lrc.h"
> > #include "gt/intel_engine.h"
> > +#include "gt/intel_gt.h"
> > #include "gt/intel_gt_types.h"
> > #include "gt/intel_workarounds.h"
> > +#include "gt/uc/intel_guc_submission.h"
> > #include "gt/uc/intel_uc.h"
> >
> > #include "intel_device_info.h"
> > @@ -2032,4 +2034,16 @@ i915_coherent_map_type(struct drm_i915_private
> *i915)
> > return HAS_LLC(i915) ? I915_MAP_WB : I915_MAP_WC;
> > }
> >
> > +static inline bool intel_guc_submission_is_enabled(struct intel_guc *guc)
> > +{
> > + struct intel_gt *gt = guc_to_gt(guc);
> > + struct intel_engine_cs *engine;
> > + enum intel_engine_id id;
> > +
> > + for_each_engine(engine, gt, id)
> > + return engine->set_default_submission ==
> > + guc_set_default_submission;
> > + return false;
> > +}
> > +
> > #endif
> > --
> > 2.20.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Tomáš Janoušek, a.k.a. Pivník, a.k.a. Liskni_si, http://work.lisk.in/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: Add GuC method to determine if submission is active.
@ 2019-11-11 18:04 ` Hiatt, Don
0 siblings, 0 replies; 14+ messages in thread
From: Hiatt, Don @ 2019-11-11 18:04 UTC (permalink / raw)
To: Tomas Janousek, Wajdeczko, Michal; +Cc: intel-gfx
> From: Tomas Janousek <tomi@nomi.cz>
> Sent: Sunday, November 10, 2019 3:11 AM
> To: Hiatt, Don <don.hiatt@intel.com>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 1/2] drm/i915/guc: Add GuC method to determine if
> submission is active.
>
> On Wed, Nov 06, 2019 at 09:40:02AM -0800, don.hiatt@intel.com wrote:
> > Add intel_guc_submission_is_enabled() function to determine if
> > GuC submission is active. Based on code by Michal Wajdeczko.
>
> Don't forget to update USES_GUC_SUBMISSION (and/or
> intel_uc_uses_guc_submission) to use this new function.
>
Michal said that you have to use USE_GUC_SUBMISSION until the engines
are up and that this function can't replace it's usage.
Michal: Based upon the feedback, do you have any issue with me going back to
v2 of the patch?
> (And I still think the "drm/i915/guc: Skip suspend/resume GuC action on" patch
> should just use USES_GUC_SUBMISSION. The current version (v3 & v4) of the
> patch which splits the logic between intel_guc.c and intel_uc.c just to avoid
> the goto is making the code harder to maintain, in my opinion.)
>
> >
> > Signed-off-by: Don Hiatt <don.hiatt@intel.com>
> > ---
> > drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 +-
> > drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h | 1 +
> > drivers/gpu/drm/i915/i915_drv.h | 14 ++++++++++++++
> > 3 files changed, 16 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> > index 2498c55e0ea5..0aaef7c07879 100644
> > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> > @@ -1081,7 +1081,7 @@ static void guc_interrupts_release(struct intel_gt
> *gt)
> > rps->pm_intrmsk_mbz &= ~ARAT_EXPIRED_INTRMSK;
> > }
> >
> > -static void guc_set_default_submission(struct intel_engine_cs *engine)
> > +void guc_set_default_submission(struct intel_engine_cs *engine)
> > {
> > /*
> > * We inherit a bunch of functions from execlists that we'd like
> > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> > index 54d716828352..a0132f061ebc 100644
> > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
> > @@ -63,5 +63,6 @@ void intel_guc_submission_disable(struct intel_guc
> *guc);
> > void intel_guc_submission_fini(struct intel_guc *guc);
> > int intel_guc_preempt_work_create(struct intel_guc *guc);
> > void intel_guc_preempt_work_destroy(struct intel_guc *guc);
> > +void guc_set_default_submission(struct intel_engine_cs *engine);
> >
> > #endif
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h
> > index 7e0f67babe20..878d574bb1c1 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -78,8 +78,10 @@
> >
> > #include "gt/intel_lrc.h"
> > #include "gt/intel_engine.h"
> > +#include "gt/intel_gt.h"
> > #include "gt/intel_gt_types.h"
> > #include "gt/intel_workarounds.h"
> > +#include "gt/uc/intel_guc_submission.h"
> > #include "gt/uc/intel_uc.h"
> >
> > #include "intel_device_info.h"
> > @@ -2032,4 +2034,16 @@ i915_coherent_map_type(struct drm_i915_private
> *i915)
> > return HAS_LLC(i915) ? I915_MAP_WB : I915_MAP_WC;
> > }
> >
> > +static inline bool intel_guc_submission_is_enabled(struct intel_guc *guc)
> > +{
> > + struct intel_gt *gt = guc_to_gt(guc);
> > + struct intel_engine_cs *engine;
> > + enum intel_engine_id id;
> > +
> > + for_each_engine(engine, gt, id)
> > + return engine->set_default_submission ==
> > + guc_set_default_submission;
> > + return false;
> > +}
> > +
> > #endif
> > --
> > 2.20.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Tomáš Janoušek, a.k.a. Pivník, a.k.a. Liskni_si, http://work.lisk.in/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread