* [PATCH] drm/i915/gem: Purge the sudden reappearance of i915_gem_object_pin()
@ 2019-11-15 12:00 ` Chris Wilson
0 siblings, 0 replies; 14+ messages in thread
From: Chris Wilson @ 2019-11-15 12:00 UTC (permalink / raw)
To: intel-gfx; +Cc: Matthew Auld
This died many years ago as we now use i915_vma first and foremost.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
---
.../gpu/drm/i915/gem/i915_gem_execbuffer.c | 13 +++----
drivers/gpu/drm/i915/i915_drv.h | 8 -----
drivers/gpu/drm/i915/i915_gem.c | 36 +++++++------------
3 files changed, 19 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index f0998f1225af..f09043a3ea9d 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -1995,28 +1995,29 @@ static int i915_reset_gen7_sol_offsets(struct i915_request *rq)
static struct i915_vma *
shadow_batch_pin(struct i915_execbuffer *eb, struct drm_i915_gem_object *obj)
{
- struct drm_i915_private *dev_priv = eb->i915;
struct i915_vma * const vma = *eb->vma;
- struct i915_address_space *vm;
u64 flags;
+ int err;
/*
* PPGTT backed shadow buffers must be mapped RO, to prevent
* post-scan tampering
*/
- if (CMDPARSER_USES_GGTT(dev_priv)) {
+ if (CMDPARSER_USES_GGTT(eb->i915)) {
flags = PIN_GLOBAL;
- vm = &dev_priv->ggtt.vm;
} else if (vma->vm->has_read_only) {
flags = PIN_USER;
- vm = vma->vm;
i915_gem_object_set_readonly(obj);
} else {
DRM_DEBUG("Cannot prevent post-scan tampering without RO capable vm\n");
return ERR_PTR(-EINVAL);
}
- return i915_gem_object_pin(obj, vm, NULL, 0, 0, flags);
+ err = i915_vma_pin(vma, 0, 0, flags);
+ if (err)
+ return ERR_PTR(err);
+
+ return vma;
}
static struct i915_vma *eb_parse(struct i915_execbuffer *eb)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1779f600fcfb..a70555e6befb 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1842,14 +1842,6 @@ int i915_gem_object_unbind(struct drm_i915_gem_object *obj,
unsigned long flags);
#define I915_GEM_OBJECT_UNBIND_ACTIVE BIT(0)
-struct i915_vma * __must_check
-i915_gem_object_pin(struct drm_i915_gem_object *obj,
- struct i915_address_space *vm,
- const struct i915_ggtt_view *view,
- u64 size,
- u64 alignment,
- u64 flags);
-
void i915_gem_runtime_suspend(struct drm_i915_private *dev_priv);
static inline int __must_check
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 43c532756c7c..89696f1a4e77 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -891,22 +891,8 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj,
u64 alignment,
u64 flags)
{
- struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
- struct i915_address_space *vm = &dev_priv->ggtt.vm;
-
- return i915_gem_object_pin(obj, vm, view, size, alignment,
- flags | PIN_GLOBAL);
-}
-
-struct i915_vma *
-i915_gem_object_pin(struct drm_i915_gem_object *obj,
- struct i915_address_space *vm,
- const struct i915_ggtt_view *view,
- u64 size,
- u64 alignment,
- u64 flags)
-{
- struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
+ struct drm_i915_private *i915 = to_i915(obj->base.dev);
+ struct i915_ggtt *ggtt = &i915->ggtt;
struct i915_vma *vma;
int ret;
@@ -915,17 +901,19 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
if (flags & PIN_MAPPABLE &&
(!view || view->type == I915_GGTT_VIEW_NORMAL)) {
- /* If the required space is larger than the available
+ /*
+ * If the required space is larger than the available
* aperture, we will not able to find a slot for the
* object and unbinding the object now will be in
* vain. Worse, doing so may cause us to ping-pong
* the object in and out of the Global GTT and
* waste a lot of cycles under the mutex.
*/
- if (obj->base.size > dev_priv->ggtt.mappable_end)
+ if (obj->base.size > ggtt->mappable_end)
return ERR_PTR(-E2BIG);
- /* If NONBLOCK is set the caller is optimistically
+ /*
+ * If NONBLOCK is set the caller is optimistically
* trying to cache the full object within the mappable
* aperture, and *must* have a fallback in place for
* situations where we cannot bind the object. We
@@ -941,11 +929,11 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
* we could try to minimise harm to others.
*/
if (flags & PIN_NONBLOCK &&
- obj->base.size > dev_priv->ggtt.mappable_end / 2)
+ obj->base.size > ggtt->mappable_end / 2)
return ERR_PTR(-ENOSPC);
}
- vma = i915_vma_instance(obj, vm, view);
+ vma = i915_vma_instance(obj, &ggtt->vm, view);
if (IS_ERR(vma))
return vma;
@@ -955,7 +943,7 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
return ERR_PTR(-ENOSPC);
if (flags & PIN_MAPPABLE &&
- vma->fence_size > dev_priv->ggtt.mappable_end / 2)
+ vma->fence_size > ggtt->mappable_end / 2)
return ERR_PTR(-ENOSPC);
}
@@ -965,9 +953,9 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
}
if (vma->fence && !i915_gem_object_is_tiled(obj)) {
- mutex_lock(&vma->vm->mutex);
+ mutex_lock(&ggtt->vm.mutex);
ret = i915_vma_revoke_fence(vma);
- mutex_unlock(&vma->vm->mutex);
+ mutex_unlock(&ggtt->vm.mutex);
if (ret)
return ERR_PTR(ret);
}
--
2.24.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Intel-gfx] [PATCH] drm/i915/gem: Purge the sudden reappearance of i915_gem_object_pin()
@ 2019-11-15 12:00 ` Chris Wilson
0 siblings, 0 replies; 14+ messages in thread
From: Chris Wilson @ 2019-11-15 12:00 UTC (permalink / raw)
To: intel-gfx; +Cc: Matthew Auld
This died many years ago as we now use i915_vma first and foremost.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
---
.../gpu/drm/i915/gem/i915_gem_execbuffer.c | 13 +++----
drivers/gpu/drm/i915/i915_drv.h | 8 -----
drivers/gpu/drm/i915/i915_gem.c | 36 +++++++------------
3 files changed, 19 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index f0998f1225af..f09043a3ea9d 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -1995,28 +1995,29 @@ static int i915_reset_gen7_sol_offsets(struct i915_request *rq)
static struct i915_vma *
shadow_batch_pin(struct i915_execbuffer *eb, struct drm_i915_gem_object *obj)
{
- struct drm_i915_private *dev_priv = eb->i915;
struct i915_vma * const vma = *eb->vma;
- struct i915_address_space *vm;
u64 flags;
+ int err;
/*
* PPGTT backed shadow buffers must be mapped RO, to prevent
* post-scan tampering
*/
- if (CMDPARSER_USES_GGTT(dev_priv)) {
+ if (CMDPARSER_USES_GGTT(eb->i915)) {
flags = PIN_GLOBAL;
- vm = &dev_priv->ggtt.vm;
} else if (vma->vm->has_read_only) {
flags = PIN_USER;
- vm = vma->vm;
i915_gem_object_set_readonly(obj);
} else {
DRM_DEBUG("Cannot prevent post-scan tampering without RO capable vm\n");
return ERR_PTR(-EINVAL);
}
- return i915_gem_object_pin(obj, vm, NULL, 0, 0, flags);
+ err = i915_vma_pin(vma, 0, 0, flags);
+ if (err)
+ return ERR_PTR(err);
+
+ return vma;
}
static struct i915_vma *eb_parse(struct i915_execbuffer *eb)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1779f600fcfb..a70555e6befb 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1842,14 +1842,6 @@ int i915_gem_object_unbind(struct drm_i915_gem_object *obj,
unsigned long flags);
#define I915_GEM_OBJECT_UNBIND_ACTIVE BIT(0)
-struct i915_vma * __must_check
-i915_gem_object_pin(struct drm_i915_gem_object *obj,
- struct i915_address_space *vm,
- const struct i915_ggtt_view *view,
- u64 size,
- u64 alignment,
- u64 flags);
-
void i915_gem_runtime_suspend(struct drm_i915_private *dev_priv);
static inline int __must_check
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 43c532756c7c..89696f1a4e77 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -891,22 +891,8 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj,
u64 alignment,
u64 flags)
{
- struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
- struct i915_address_space *vm = &dev_priv->ggtt.vm;
-
- return i915_gem_object_pin(obj, vm, view, size, alignment,
- flags | PIN_GLOBAL);
-}
-
-struct i915_vma *
-i915_gem_object_pin(struct drm_i915_gem_object *obj,
- struct i915_address_space *vm,
- const struct i915_ggtt_view *view,
- u64 size,
- u64 alignment,
- u64 flags)
-{
- struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
+ struct drm_i915_private *i915 = to_i915(obj->base.dev);
+ struct i915_ggtt *ggtt = &i915->ggtt;
struct i915_vma *vma;
int ret;
@@ -915,17 +901,19 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
if (flags & PIN_MAPPABLE &&
(!view || view->type == I915_GGTT_VIEW_NORMAL)) {
- /* If the required space is larger than the available
+ /*
+ * If the required space is larger than the available
* aperture, we will not able to find a slot for the
* object and unbinding the object now will be in
* vain. Worse, doing so may cause us to ping-pong
* the object in and out of the Global GTT and
* waste a lot of cycles under the mutex.
*/
- if (obj->base.size > dev_priv->ggtt.mappable_end)
+ if (obj->base.size > ggtt->mappable_end)
return ERR_PTR(-E2BIG);
- /* If NONBLOCK is set the caller is optimistically
+ /*
+ * If NONBLOCK is set the caller is optimistically
* trying to cache the full object within the mappable
* aperture, and *must* have a fallback in place for
* situations where we cannot bind the object. We
@@ -941,11 +929,11 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
* we could try to minimise harm to others.
*/
if (flags & PIN_NONBLOCK &&
- obj->base.size > dev_priv->ggtt.mappable_end / 2)
+ obj->base.size > ggtt->mappable_end / 2)
return ERR_PTR(-ENOSPC);
}
- vma = i915_vma_instance(obj, vm, view);
+ vma = i915_vma_instance(obj, &ggtt->vm, view);
if (IS_ERR(vma))
return vma;
@@ -955,7 +943,7 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
return ERR_PTR(-ENOSPC);
if (flags & PIN_MAPPABLE &&
- vma->fence_size > dev_priv->ggtt.mappable_end / 2)
+ vma->fence_size > ggtt->mappable_end / 2)
return ERR_PTR(-ENOSPC);
}
@@ -965,9 +953,9 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
}
if (vma->fence && !i915_gem_object_is_tiled(obj)) {
- mutex_lock(&vma->vm->mutex);
+ mutex_lock(&ggtt->vm.mutex);
ret = i915_vma_revoke_fence(vma);
- mutex_unlock(&vma->vm->mutex);
+ mutex_unlock(&ggtt->vm.mutex);
if (ret)
return ERR_PTR(ret);
}
--
2.24.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH] drm/i915/gem: Purge the sudden reappearance of i915_gem_object_pin()
@ 2019-11-15 12:34 ` Chris Wilson
0 siblings, 0 replies; 14+ messages in thread
From: Chris Wilson @ 2019-11-15 12:34 UTC (permalink / raw)
To: intel-gfx; +Cc: Matthew Auld
This died many years ago as we now use i915_vma first and foremost.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
---
The code was further away from my expectations!
-Chris
---
.../gpu/drm/i915/gem/i915_gem_execbuffer.c | 32 +++++++++++------
drivers/gpu/drm/i915/i915_drv.h | 8 -----
drivers/gpu/drm/i915/i915_gem.c | 36 +++++++------------
3 files changed, 33 insertions(+), 43 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index f0998f1225af..7b65777363b7 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -1995,28 +1995,38 @@ static int i915_reset_gen7_sol_offsets(struct i915_request *rq)
static struct i915_vma *
shadow_batch_pin(struct i915_execbuffer *eb, struct drm_i915_gem_object *obj)
{
- struct drm_i915_private *dev_priv = eb->i915;
- struct i915_vma * const vma = *eb->vma;
struct i915_address_space *vm;
+ struct i915_vma *vma;
u64 flags;
+ int err;
/*
* PPGTT backed shadow buffers must be mapped RO, to prevent
* post-scan tampering
*/
- if (CMDPARSER_USES_GGTT(dev_priv)) {
+ if (CMDPARSER_USES_GGTT(eb->i915)) {
+ vm = &eb->engine->gt->ggtt->vm;
flags = PIN_GLOBAL;
- vm = &dev_priv->ggtt.vm;
- } else if (vma->vm->has_read_only) {
- flags = PIN_USER;
- vm = vma->vm;
- i915_gem_object_set_readonly(obj);
} else {
- DRM_DEBUG("Cannot prevent post-scan tampering without RO capable vm\n");
- return ERR_PTR(-EINVAL);
+ vm = eb->context->vm;
+ if (!vm->has_read_only) {
+ DRM_DEBUG("Cannot prevent post-scan tampering without RO capable vm\n");
+ return ERR_PTR(-EINVAL);
+ }
+
+ i915_gem_object_set_readonly(obj);
+ flags = PIN_USER;
}
- return i915_gem_object_pin(obj, vm, NULL, 0, 0, flags);
+ vma = i915_vma_instance(obj, vm, NULL);
+ if (IS_ERR(vma))
+ return vma;
+
+ err = i915_vma_pin(vma, 0, 0, flags);
+ if (err)
+ return ERR_PTR(err);
+
+ return vma;
}
static struct i915_vma *eb_parse(struct i915_execbuffer *eb)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1779f600fcfb..a70555e6befb 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1842,14 +1842,6 @@ int i915_gem_object_unbind(struct drm_i915_gem_object *obj,
unsigned long flags);
#define I915_GEM_OBJECT_UNBIND_ACTIVE BIT(0)
-struct i915_vma * __must_check
-i915_gem_object_pin(struct drm_i915_gem_object *obj,
- struct i915_address_space *vm,
- const struct i915_ggtt_view *view,
- u64 size,
- u64 alignment,
- u64 flags);
-
void i915_gem_runtime_suspend(struct drm_i915_private *dev_priv);
static inline int __must_check
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 43c532756c7c..89696f1a4e77 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -891,22 +891,8 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj,
u64 alignment,
u64 flags)
{
- struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
- struct i915_address_space *vm = &dev_priv->ggtt.vm;
-
- return i915_gem_object_pin(obj, vm, view, size, alignment,
- flags | PIN_GLOBAL);
-}
-
-struct i915_vma *
-i915_gem_object_pin(struct drm_i915_gem_object *obj,
- struct i915_address_space *vm,
- const struct i915_ggtt_view *view,
- u64 size,
- u64 alignment,
- u64 flags)
-{
- struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
+ struct drm_i915_private *i915 = to_i915(obj->base.dev);
+ struct i915_ggtt *ggtt = &i915->ggtt;
struct i915_vma *vma;
int ret;
@@ -915,17 +901,19 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
if (flags & PIN_MAPPABLE &&
(!view || view->type == I915_GGTT_VIEW_NORMAL)) {
- /* If the required space is larger than the available
+ /*
+ * If the required space is larger than the available
* aperture, we will not able to find a slot for the
* object and unbinding the object now will be in
* vain. Worse, doing so may cause us to ping-pong
* the object in and out of the Global GTT and
* waste a lot of cycles under the mutex.
*/
- if (obj->base.size > dev_priv->ggtt.mappable_end)
+ if (obj->base.size > ggtt->mappable_end)
return ERR_PTR(-E2BIG);
- /* If NONBLOCK is set the caller is optimistically
+ /*
+ * If NONBLOCK is set the caller is optimistically
* trying to cache the full object within the mappable
* aperture, and *must* have a fallback in place for
* situations where we cannot bind the object. We
@@ -941,11 +929,11 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
* we could try to minimise harm to others.
*/
if (flags & PIN_NONBLOCK &&
- obj->base.size > dev_priv->ggtt.mappable_end / 2)
+ obj->base.size > ggtt->mappable_end / 2)
return ERR_PTR(-ENOSPC);
}
- vma = i915_vma_instance(obj, vm, view);
+ vma = i915_vma_instance(obj, &ggtt->vm, view);
if (IS_ERR(vma))
return vma;
@@ -955,7 +943,7 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
return ERR_PTR(-ENOSPC);
if (flags & PIN_MAPPABLE &&
- vma->fence_size > dev_priv->ggtt.mappable_end / 2)
+ vma->fence_size > ggtt->mappable_end / 2)
return ERR_PTR(-ENOSPC);
}
@@ -965,9 +953,9 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
}
if (vma->fence && !i915_gem_object_is_tiled(obj)) {
- mutex_lock(&vma->vm->mutex);
+ mutex_lock(&ggtt->vm.mutex);
ret = i915_vma_revoke_fence(vma);
- mutex_unlock(&vma->vm->mutex);
+ mutex_unlock(&ggtt->vm.mutex);
if (ret)
return ERR_PTR(ret);
}
--
2.24.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Intel-gfx] [PATCH] drm/i915/gem: Purge the sudden reappearance of i915_gem_object_pin()
@ 2019-11-15 12:34 ` Chris Wilson
0 siblings, 0 replies; 14+ messages in thread
From: Chris Wilson @ 2019-11-15 12:34 UTC (permalink / raw)
To: intel-gfx; +Cc: Matthew Auld
This died many years ago as we now use i915_vma first and foremost.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
---
The code was further away from my expectations!
-Chris
---
.../gpu/drm/i915/gem/i915_gem_execbuffer.c | 32 +++++++++++------
drivers/gpu/drm/i915/i915_drv.h | 8 -----
drivers/gpu/drm/i915/i915_gem.c | 36 +++++++------------
3 files changed, 33 insertions(+), 43 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index f0998f1225af..7b65777363b7 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -1995,28 +1995,38 @@ static int i915_reset_gen7_sol_offsets(struct i915_request *rq)
static struct i915_vma *
shadow_batch_pin(struct i915_execbuffer *eb, struct drm_i915_gem_object *obj)
{
- struct drm_i915_private *dev_priv = eb->i915;
- struct i915_vma * const vma = *eb->vma;
struct i915_address_space *vm;
+ struct i915_vma *vma;
u64 flags;
+ int err;
/*
* PPGTT backed shadow buffers must be mapped RO, to prevent
* post-scan tampering
*/
- if (CMDPARSER_USES_GGTT(dev_priv)) {
+ if (CMDPARSER_USES_GGTT(eb->i915)) {
+ vm = &eb->engine->gt->ggtt->vm;
flags = PIN_GLOBAL;
- vm = &dev_priv->ggtt.vm;
- } else if (vma->vm->has_read_only) {
- flags = PIN_USER;
- vm = vma->vm;
- i915_gem_object_set_readonly(obj);
} else {
- DRM_DEBUG("Cannot prevent post-scan tampering without RO capable vm\n");
- return ERR_PTR(-EINVAL);
+ vm = eb->context->vm;
+ if (!vm->has_read_only) {
+ DRM_DEBUG("Cannot prevent post-scan tampering without RO capable vm\n");
+ return ERR_PTR(-EINVAL);
+ }
+
+ i915_gem_object_set_readonly(obj);
+ flags = PIN_USER;
}
- return i915_gem_object_pin(obj, vm, NULL, 0, 0, flags);
+ vma = i915_vma_instance(obj, vm, NULL);
+ if (IS_ERR(vma))
+ return vma;
+
+ err = i915_vma_pin(vma, 0, 0, flags);
+ if (err)
+ return ERR_PTR(err);
+
+ return vma;
}
static struct i915_vma *eb_parse(struct i915_execbuffer *eb)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1779f600fcfb..a70555e6befb 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1842,14 +1842,6 @@ int i915_gem_object_unbind(struct drm_i915_gem_object *obj,
unsigned long flags);
#define I915_GEM_OBJECT_UNBIND_ACTIVE BIT(0)
-struct i915_vma * __must_check
-i915_gem_object_pin(struct drm_i915_gem_object *obj,
- struct i915_address_space *vm,
- const struct i915_ggtt_view *view,
- u64 size,
- u64 alignment,
- u64 flags);
-
void i915_gem_runtime_suspend(struct drm_i915_private *dev_priv);
static inline int __must_check
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 43c532756c7c..89696f1a4e77 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -891,22 +891,8 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj,
u64 alignment,
u64 flags)
{
- struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
- struct i915_address_space *vm = &dev_priv->ggtt.vm;
-
- return i915_gem_object_pin(obj, vm, view, size, alignment,
- flags | PIN_GLOBAL);
-}
-
-struct i915_vma *
-i915_gem_object_pin(struct drm_i915_gem_object *obj,
- struct i915_address_space *vm,
- const struct i915_ggtt_view *view,
- u64 size,
- u64 alignment,
- u64 flags)
-{
- struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
+ struct drm_i915_private *i915 = to_i915(obj->base.dev);
+ struct i915_ggtt *ggtt = &i915->ggtt;
struct i915_vma *vma;
int ret;
@@ -915,17 +901,19 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
if (flags & PIN_MAPPABLE &&
(!view || view->type == I915_GGTT_VIEW_NORMAL)) {
- /* If the required space is larger than the available
+ /*
+ * If the required space is larger than the available
* aperture, we will not able to find a slot for the
* object and unbinding the object now will be in
* vain. Worse, doing so may cause us to ping-pong
* the object in and out of the Global GTT and
* waste a lot of cycles under the mutex.
*/
- if (obj->base.size > dev_priv->ggtt.mappable_end)
+ if (obj->base.size > ggtt->mappable_end)
return ERR_PTR(-E2BIG);
- /* If NONBLOCK is set the caller is optimistically
+ /*
+ * If NONBLOCK is set the caller is optimistically
* trying to cache the full object within the mappable
* aperture, and *must* have a fallback in place for
* situations where we cannot bind the object. We
@@ -941,11 +929,11 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
* we could try to minimise harm to others.
*/
if (flags & PIN_NONBLOCK &&
- obj->base.size > dev_priv->ggtt.mappable_end / 2)
+ obj->base.size > ggtt->mappable_end / 2)
return ERR_PTR(-ENOSPC);
}
- vma = i915_vma_instance(obj, vm, view);
+ vma = i915_vma_instance(obj, &ggtt->vm, view);
if (IS_ERR(vma))
return vma;
@@ -955,7 +943,7 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
return ERR_PTR(-ENOSPC);
if (flags & PIN_MAPPABLE &&
- vma->fence_size > dev_priv->ggtt.mappable_end / 2)
+ vma->fence_size > ggtt->mappable_end / 2)
return ERR_PTR(-ENOSPC);
}
@@ -965,9 +953,9 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
}
if (vma->fence && !i915_gem_object_is_tiled(obj)) {
- mutex_lock(&vma->vm->mutex);
+ mutex_lock(&ggtt->vm.mutex);
ret = i915_vma_revoke_fence(vma);
- mutex_unlock(&vma->vm->mutex);
+ mutex_unlock(&ggtt->vm.mutex);
if (ret)
return ERR_PTR(ret);
}
--
2.24.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH] drm/i915/gem: Purge the sudden reappearance of i915_gem_object_pin()
@ 2019-11-15 12:34 ` Matthew Auld
0 siblings, 0 replies; 14+ messages in thread
From: Matthew Auld @ 2019-11-15 12:34 UTC (permalink / raw)
To: Chris Wilson; +Cc: Intel Graphics Development, Matthew Auld
On Fri, 15 Nov 2019 at 12:00, Chris Wilson <chris@chris-wilson.co.uk> wrote:
>
> This died many years ago as we now use i915_vma first and foremost.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/gem: Purge the sudden reappearance of i915_gem_object_pin()
@ 2019-11-15 12:34 ` Matthew Auld
0 siblings, 0 replies; 14+ messages in thread
From: Matthew Auld @ 2019-11-15 12:34 UTC (permalink / raw)
To: Chris Wilson; +Cc: Intel Graphics Development, Matthew Auld
On Fri, 15 Nov 2019 at 12:00, Chris Wilson <chris@chris-wilson.co.uk> wrote:
>
> This died many years ago as we now use i915_vma first and foremost.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH] drm/i915/gem: Purge the sudden reappearance of i915_gem_object_pin()
@ 2019-11-15 12:35 ` Chris Wilson
0 siblings, 0 replies; 14+ messages in thread
From: Chris Wilson @ 2019-11-15 12:35 UTC (permalink / raw)
To: intel-gfx; +Cc: Matthew Auld
This died many years ago as we now use i915_vma first and foremost.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
---
Might as well reduce the number of CMDPARSER_USES_GGTT(eb->i915) checks
here and use derived state after the first check.
---
.../gpu/drm/i915/gem/i915_gem_execbuffer.c | 36 ++++++++++++-------
drivers/gpu/drm/i915/i915_drv.h | 8 -----
drivers/gpu/drm/i915/i915_gem.c | 36 +++++++------------
3 files changed, 35 insertions(+), 45 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index f0998f1225af..c0a4a7a508f4 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -1995,28 +1995,38 @@ static int i915_reset_gen7_sol_offsets(struct i915_request *rq)
static struct i915_vma *
shadow_batch_pin(struct i915_execbuffer *eb, struct drm_i915_gem_object *obj)
{
- struct drm_i915_private *dev_priv = eb->i915;
- struct i915_vma * const vma = *eb->vma;
struct i915_address_space *vm;
+ struct i915_vma *vma;
u64 flags;
+ int err;
/*
* PPGTT backed shadow buffers must be mapped RO, to prevent
* post-scan tampering
*/
- if (CMDPARSER_USES_GGTT(dev_priv)) {
+ if (CMDPARSER_USES_GGTT(eb->i915)) {
+ vm = &eb->engine->gt->ggtt->vm;
flags = PIN_GLOBAL;
- vm = &dev_priv->ggtt.vm;
- } else if (vma->vm->has_read_only) {
- flags = PIN_USER;
- vm = vma->vm;
- i915_gem_object_set_readonly(obj);
} else {
- DRM_DEBUG("Cannot prevent post-scan tampering without RO capable vm\n");
- return ERR_PTR(-EINVAL);
+ vm = eb->context->vm;
+ if (!vm->has_read_only) {
+ DRM_DEBUG("Cannot prevent post-scan tampering without RO capable vm\n");
+ return ERR_PTR(-EINVAL);
+ }
+
+ i915_gem_object_set_readonly(obj);
+ flags = PIN_USER;
}
- return i915_gem_object_pin(obj, vm, NULL, 0, 0, flags);
+ vma = i915_vma_instance(obj, vm, NULL);
+ if (IS_ERR(vma))
+ return vma;
+
+ err = i915_vma_pin(vma, 0, 0, flags);
+ if (err)
+ return ERR_PTR(err);
+
+ return vma;
}
static struct i915_vma *eb_parse(struct i915_execbuffer *eb)
@@ -2058,7 +2068,7 @@ static struct i915_vma *eb_parse(struct i915_execbuffer *eb)
* For PPGTT backing however, we have no choice but to forcibly
* reject unsafe buffers
*/
- if (CMDPARSER_USES_GGTT(eb->i915) && (err == -EACCES))
+ if (i915_vma_is_ggtt(vma) && (err == -EACCES))
/* Execute original buffer non-secure */
vma = NULL;
else
@@ -2075,7 +2085,7 @@ static struct i915_vma *eb_parse(struct i915_execbuffer *eb)
eb->batch_start_offset = 0;
eb->batch = vma;
- if (CMDPARSER_USES_GGTT(eb->i915))
+ if (i915_vma_is_ggtt(vma))
eb->batch_flags |= I915_DISPATCH_SECURE;
/* eb->batch_len unchanged */
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1779f600fcfb..a70555e6befb 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1842,14 +1842,6 @@ int i915_gem_object_unbind(struct drm_i915_gem_object *obj,
unsigned long flags);
#define I915_GEM_OBJECT_UNBIND_ACTIVE BIT(0)
-struct i915_vma * __must_check
-i915_gem_object_pin(struct drm_i915_gem_object *obj,
- struct i915_address_space *vm,
- const struct i915_ggtt_view *view,
- u64 size,
- u64 alignment,
- u64 flags);
-
void i915_gem_runtime_suspend(struct drm_i915_private *dev_priv);
static inline int __must_check
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 43c532756c7c..89696f1a4e77 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -891,22 +891,8 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj,
u64 alignment,
u64 flags)
{
- struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
- struct i915_address_space *vm = &dev_priv->ggtt.vm;
-
- return i915_gem_object_pin(obj, vm, view, size, alignment,
- flags | PIN_GLOBAL);
-}
-
-struct i915_vma *
-i915_gem_object_pin(struct drm_i915_gem_object *obj,
- struct i915_address_space *vm,
- const struct i915_ggtt_view *view,
- u64 size,
- u64 alignment,
- u64 flags)
-{
- struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
+ struct drm_i915_private *i915 = to_i915(obj->base.dev);
+ struct i915_ggtt *ggtt = &i915->ggtt;
struct i915_vma *vma;
int ret;
@@ -915,17 +901,19 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
if (flags & PIN_MAPPABLE &&
(!view || view->type == I915_GGTT_VIEW_NORMAL)) {
- /* If the required space is larger than the available
+ /*
+ * If the required space is larger than the available
* aperture, we will not able to find a slot for the
* object and unbinding the object now will be in
* vain. Worse, doing so may cause us to ping-pong
* the object in and out of the Global GTT and
* waste a lot of cycles under the mutex.
*/
- if (obj->base.size > dev_priv->ggtt.mappable_end)
+ if (obj->base.size > ggtt->mappable_end)
return ERR_PTR(-E2BIG);
- /* If NONBLOCK is set the caller is optimistically
+ /*
+ * If NONBLOCK is set the caller is optimistically
* trying to cache the full object within the mappable
* aperture, and *must* have a fallback in place for
* situations where we cannot bind the object. We
@@ -941,11 +929,11 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
* we could try to minimise harm to others.
*/
if (flags & PIN_NONBLOCK &&
- obj->base.size > dev_priv->ggtt.mappable_end / 2)
+ obj->base.size > ggtt->mappable_end / 2)
return ERR_PTR(-ENOSPC);
}
- vma = i915_vma_instance(obj, vm, view);
+ vma = i915_vma_instance(obj, &ggtt->vm, view);
if (IS_ERR(vma))
return vma;
@@ -955,7 +943,7 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
return ERR_PTR(-ENOSPC);
if (flags & PIN_MAPPABLE &&
- vma->fence_size > dev_priv->ggtt.mappable_end / 2)
+ vma->fence_size > ggtt->mappable_end / 2)
return ERR_PTR(-ENOSPC);
}
@@ -965,9 +953,9 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
}
if (vma->fence && !i915_gem_object_is_tiled(obj)) {
- mutex_lock(&vma->vm->mutex);
+ mutex_lock(&ggtt->vm.mutex);
ret = i915_vma_revoke_fence(vma);
- mutex_unlock(&vma->vm->mutex);
+ mutex_unlock(&ggtt->vm.mutex);
if (ret)
return ERR_PTR(ret);
}
--
2.24.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Intel-gfx] [PATCH] drm/i915/gem: Purge the sudden reappearance of i915_gem_object_pin()
@ 2019-11-15 12:35 ` Chris Wilson
0 siblings, 0 replies; 14+ messages in thread
From: Chris Wilson @ 2019-11-15 12:35 UTC (permalink / raw)
To: intel-gfx; +Cc: Matthew Auld
This died many years ago as we now use i915_vma first and foremost.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
---
Might as well reduce the number of CMDPARSER_USES_GGTT(eb->i915) checks
here and use derived state after the first check.
---
.../gpu/drm/i915/gem/i915_gem_execbuffer.c | 36 ++++++++++++-------
drivers/gpu/drm/i915/i915_drv.h | 8 -----
drivers/gpu/drm/i915/i915_gem.c | 36 +++++++------------
3 files changed, 35 insertions(+), 45 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index f0998f1225af..c0a4a7a508f4 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -1995,28 +1995,38 @@ static int i915_reset_gen7_sol_offsets(struct i915_request *rq)
static struct i915_vma *
shadow_batch_pin(struct i915_execbuffer *eb, struct drm_i915_gem_object *obj)
{
- struct drm_i915_private *dev_priv = eb->i915;
- struct i915_vma * const vma = *eb->vma;
struct i915_address_space *vm;
+ struct i915_vma *vma;
u64 flags;
+ int err;
/*
* PPGTT backed shadow buffers must be mapped RO, to prevent
* post-scan tampering
*/
- if (CMDPARSER_USES_GGTT(dev_priv)) {
+ if (CMDPARSER_USES_GGTT(eb->i915)) {
+ vm = &eb->engine->gt->ggtt->vm;
flags = PIN_GLOBAL;
- vm = &dev_priv->ggtt.vm;
- } else if (vma->vm->has_read_only) {
- flags = PIN_USER;
- vm = vma->vm;
- i915_gem_object_set_readonly(obj);
} else {
- DRM_DEBUG("Cannot prevent post-scan tampering without RO capable vm\n");
- return ERR_PTR(-EINVAL);
+ vm = eb->context->vm;
+ if (!vm->has_read_only) {
+ DRM_DEBUG("Cannot prevent post-scan tampering without RO capable vm\n");
+ return ERR_PTR(-EINVAL);
+ }
+
+ i915_gem_object_set_readonly(obj);
+ flags = PIN_USER;
}
- return i915_gem_object_pin(obj, vm, NULL, 0, 0, flags);
+ vma = i915_vma_instance(obj, vm, NULL);
+ if (IS_ERR(vma))
+ return vma;
+
+ err = i915_vma_pin(vma, 0, 0, flags);
+ if (err)
+ return ERR_PTR(err);
+
+ return vma;
}
static struct i915_vma *eb_parse(struct i915_execbuffer *eb)
@@ -2058,7 +2068,7 @@ static struct i915_vma *eb_parse(struct i915_execbuffer *eb)
* For PPGTT backing however, we have no choice but to forcibly
* reject unsafe buffers
*/
- if (CMDPARSER_USES_GGTT(eb->i915) && (err == -EACCES))
+ if (i915_vma_is_ggtt(vma) && (err == -EACCES))
/* Execute original buffer non-secure */
vma = NULL;
else
@@ -2075,7 +2085,7 @@ static struct i915_vma *eb_parse(struct i915_execbuffer *eb)
eb->batch_start_offset = 0;
eb->batch = vma;
- if (CMDPARSER_USES_GGTT(eb->i915))
+ if (i915_vma_is_ggtt(vma))
eb->batch_flags |= I915_DISPATCH_SECURE;
/* eb->batch_len unchanged */
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1779f600fcfb..a70555e6befb 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1842,14 +1842,6 @@ int i915_gem_object_unbind(struct drm_i915_gem_object *obj,
unsigned long flags);
#define I915_GEM_OBJECT_UNBIND_ACTIVE BIT(0)
-struct i915_vma * __must_check
-i915_gem_object_pin(struct drm_i915_gem_object *obj,
- struct i915_address_space *vm,
- const struct i915_ggtt_view *view,
- u64 size,
- u64 alignment,
- u64 flags);
-
void i915_gem_runtime_suspend(struct drm_i915_private *dev_priv);
static inline int __must_check
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 43c532756c7c..89696f1a4e77 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -891,22 +891,8 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj,
u64 alignment,
u64 flags)
{
- struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
- struct i915_address_space *vm = &dev_priv->ggtt.vm;
-
- return i915_gem_object_pin(obj, vm, view, size, alignment,
- flags | PIN_GLOBAL);
-}
-
-struct i915_vma *
-i915_gem_object_pin(struct drm_i915_gem_object *obj,
- struct i915_address_space *vm,
- const struct i915_ggtt_view *view,
- u64 size,
- u64 alignment,
- u64 flags)
-{
- struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
+ struct drm_i915_private *i915 = to_i915(obj->base.dev);
+ struct i915_ggtt *ggtt = &i915->ggtt;
struct i915_vma *vma;
int ret;
@@ -915,17 +901,19 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
if (flags & PIN_MAPPABLE &&
(!view || view->type == I915_GGTT_VIEW_NORMAL)) {
- /* If the required space is larger than the available
+ /*
+ * If the required space is larger than the available
* aperture, we will not able to find a slot for the
* object and unbinding the object now will be in
* vain. Worse, doing so may cause us to ping-pong
* the object in and out of the Global GTT and
* waste a lot of cycles under the mutex.
*/
- if (obj->base.size > dev_priv->ggtt.mappable_end)
+ if (obj->base.size > ggtt->mappable_end)
return ERR_PTR(-E2BIG);
- /* If NONBLOCK is set the caller is optimistically
+ /*
+ * If NONBLOCK is set the caller is optimistically
* trying to cache the full object within the mappable
* aperture, and *must* have a fallback in place for
* situations where we cannot bind the object. We
@@ -941,11 +929,11 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
* we could try to minimise harm to others.
*/
if (flags & PIN_NONBLOCK &&
- obj->base.size > dev_priv->ggtt.mappable_end / 2)
+ obj->base.size > ggtt->mappable_end / 2)
return ERR_PTR(-ENOSPC);
}
- vma = i915_vma_instance(obj, vm, view);
+ vma = i915_vma_instance(obj, &ggtt->vm, view);
if (IS_ERR(vma))
return vma;
@@ -955,7 +943,7 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
return ERR_PTR(-ENOSPC);
if (flags & PIN_MAPPABLE &&
- vma->fence_size > dev_priv->ggtt.mappable_end / 2)
+ vma->fence_size > ggtt->mappable_end / 2)
return ERR_PTR(-ENOSPC);
}
@@ -965,9 +953,9 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
}
if (vma->fence && !i915_gem_object_is_tiled(obj)) {
- mutex_lock(&vma->vm->mutex);
+ mutex_lock(&ggtt->vm.mutex);
ret = i915_vma_revoke_fence(vma);
- mutex_unlock(&vma->vm->mutex);
+ mutex_unlock(&ggtt->vm.mutex);
if (ret)
return ERR_PTR(ret);
}
--
2.24.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2] drm/i915/gem: Purge the sudden reappearance of i915_gem_object_pin()
@ 2019-11-15 17:08 ` Chris Wilson
0 siblings, 0 replies; 14+ messages in thread
From: Chris Wilson @ 2019-11-15 17:08 UTC (permalink / raw)
To: intel-gfx; +Cc: Matthew Auld
This died many years ago as we now use i915_vma first and foremost.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
---
Restore the flags | PIN_GLOBAL.
---
.../gpu/drm/i915/gem/i915_gem_execbuffer.c | 36 +++++++++++-------
drivers/gpu/drm/i915/i915_drv.h | 8 ----
drivers/gpu/drm/i915/i915_gem.c | 38 +++++++------------
3 files changed, 36 insertions(+), 46 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 8da95772c8f2..58ae4c95060a 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -1995,28 +1995,38 @@ static int i915_reset_gen7_sol_offsets(struct i915_request *rq)
static struct i915_vma *
shadow_batch_pin(struct i915_execbuffer *eb, struct drm_i915_gem_object *obj)
{
- struct drm_i915_private *dev_priv = eb->i915;
- struct i915_vma * const vma = *eb->vma;
struct i915_address_space *vm;
+ struct i915_vma *vma;
u64 flags;
+ int err;
/*
* PPGTT backed shadow buffers must be mapped RO, to prevent
* post-scan tampering
*/
- if (CMDPARSER_USES_GGTT(dev_priv)) {
+ if (CMDPARSER_USES_GGTT(eb->i915)) {
+ vm = &eb->engine->gt->ggtt->vm;
flags = PIN_GLOBAL;
- vm = &dev_priv->ggtt.vm;
- } else if (vma->vm->has_read_only) {
- flags = PIN_USER;
- vm = vma->vm;
- i915_gem_object_set_readonly(obj);
} else {
- DRM_DEBUG("Cannot prevent post-scan tampering without RO capable vm\n");
- return ERR_PTR(-EINVAL);
+ vm = eb->context->vm;
+ if (!vm->has_read_only) {
+ DRM_DEBUG("Cannot prevent post-scan tampering without RO capable vm\n");
+ return ERR_PTR(-EINVAL);
+ }
+
+ i915_gem_object_set_readonly(obj);
+ flags = PIN_USER;
}
- return i915_gem_object_pin(obj, vm, NULL, 0, 0, flags);
+ vma = i915_vma_instance(obj, vm, NULL);
+ if (IS_ERR(vma))
+ return vma;
+
+ err = i915_vma_pin(vma, 0, 0, flags);
+ if (err)
+ return ERR_PTR(err);
+
+ return vma;
}
static struct i915_vma *eb_parse(struct i915_execbuffer *eb)
@@ -2058,7 +2068,7 @@ static struct i915_vma *eb_parse(struct i915_execbuffer *eb)
* For PPGTT backing however, we have no choice but to forcibly
* reject unsafe buffers
*/
- if (CMDPARSER_USES_GGTT(eb->i915) && (err == -EACCES))
+ if (i915_vma_is_ggtt(vma) && err == -EACCES)
/* Execute original buffer non-secure */
vma = NULL;
else
@@ -2075,7 +2085,7 @@ static struct i915_vma *eb_parse(struct i915_execbuffer *eb)
eb->batch_start_offset = 0;
eb->batch = vma;
- if (CMDPARSER_USES_GGTT(eb->i915))
+ if (i915_vma_is_ggtt(vma))
eb->batch_flags |= I915_DISPATCH_SECURE;
/* eb->batch_len unchanged */
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7bc1d8c102b2..5fa38c55daa3 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1842,14 +1842,6 @@ int i915_gem_object_unbind(struct drm_i915_gem_object *obj,
unsigned long flags);
#define I915_GEM_OBJECT_UNBIND_ACTIVE BIT(0)
-struct i915_vma * __must_check
-i915_gem_object_pin(struct drm_i915_gem_object *obj,
- struct i915_address_space *vm,
- const struct i915_ggtt_view *view,
- u64 size,
- u64 alignment,
- u64 flags);
-
void i915_gem_runtime_suspend(struct drm_i915_private *dev_priv);
static inline int __must_check
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 43c532756c7c..1ba5f26700b0 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -891,22 +891,8 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj,
u64 alignment,
u64 flags)
{
- struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
- struct i915_address_space *vm = &dev_priv->ggtt.vm;
-
- return i915_gem_object_pin(obj, vm, view, size, alignment,
- flags | PIN_GLOBAL);
-}
-
-struct i915_vma *
-i915_gem_object_pin(struct drm_i915_gem_object *obj,
- struct i915_address_space *vm,
- const struct i915_ggtt_view *view,
- u64 size,
- u64 alignment,
- u64 flags)
-{
- struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
+ struct drm_i915_private *i915 = to_i915(obj->base.dev);
+ struct i915_ggtt *ggtt = &i915->ggtt;
struct i915_vma *vma;
int ret;
@@ -915,17 +901,19 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
if (flags & PIN_MAPPABLE &&
(!view || view->type == I915_GGTT_VIEW_NORMAL)) {
- /* If the required space is larger than the available
+ /*
+ * If the required space is larger than the available
* aperture, we will not able to find a slot for the
* object and unbinding the object now will be in
* vain. Worse, doing so may cause us to ping-pong
* the object in and out of the Global GTT and
* waste a lot of cycles under the mutex.
*/
- if (obj->base.size > dev_priv->ggtt.mappable_end)
+ if (obj->base.size > ggtt->mappable_end)
return ERR_PTR(-E2BIG);
- /* If NONBLOCK is set the caller is optimistically
+ /*
+ * If NONBLOCK is set the caller is optimistically
* trying to cache the full object within the mappable
* aperture, and *must* have a fallback in place for
* situations where we cannot bind the object. We
@@ -941,11 +929,11 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
* we could try to minimise harm to others.
*/
if (flags & PIN_NONBLOCK &&
- obj->base.size > dev_priv->ggtt.mappable_end / 2)
+ obj->base.size > ggtt->mappable_end / 2)
return ERR_PTR(-ENOSPC);
}
- vma = i915_vma_instance(obj, vm, view);
+ vma = i915_vma_instance(obj, &ggtt->vm, view);
if (IS_ERR(vma))
return vma;
@@ -955,7 +943,7 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
return ERR_PTR(-ENOSPC);
if (flags & PIN_MAPPABLE &&
- vma->fence_size > dev_priv->ggtt.mappable_end / 2)
+ vma->fence_size > ggtt->mappable_end / 2)
return ERR_PTR(-ENOSPC);
}
@@ -965,14 +953,14 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
}
if (vma->fence && !i915_gem_object_is_tiled(obj)) {
- mutex_lock(&vma->vm->mutex);
+ mutex_lock(&ggtt->vm.mutex);
ret = i915_vma_revoke_fence(vma);
- mutex_unlock(&vma->vm->mutex);
+ mutex_unlock(&ggtt->vm.mutex);
if (ret)
return ERR_PTR(ret);
}
- ret = i915_vma_pin(vma, size, alignment, flags);
+ ret = i915_vma_pin(vma, size, alignment, flags | PIN_GLOBAL);
if (ret)
return ERR_PTR(ret);
--
2.24.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Intel-gfx] [PATCH v2] drm/i915/gem: Purge the sudden reappearance of i915_gem_object_pin()
@ 2019-11-15 17:08 ` Chris Wilson
0 siblings, 0 replies; 14+ messages in thread
From: Chris Wilson @ 2019-11-15 17:08 UTC (permalink / raw)
To: intel-gfx; +Cc: Matthew Auld
This died many years ago as we now use i915_vma first and foremost.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
---
Restore the flags | PIN_GLOBAL.
---
.../gpu/drm/i915/gem/i915_gem_execbuffer.c | 36 +++++++++++-------
drivers/gpu/drm/i915/i915_drv.h | 8 ----
drivers/gpu/drm/i915/i915_gem.c | 38 +++++++------------
3 files changed, 36 insertions(+), 46 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 8da95772c8f2..58ae4c95060a 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -1995,28 +1995,38 @@ static int i915_reset_gen7_sol_offsets(struct i915_request *rq)
static struct i915_vma *
shadow_batch_pin(struct i915_execbuffer *eb, struct drm_i915_gem_object *obj)
{
- struct drm_i915_private *dev_priv = eb->i915;
- struct i915_vma * const vma = *eb->vma;
struct i915_address_space *vm;
+ struct i915_vma *vma;
u64 flags;
+ int err;
/*
* PPGTT backed shadow buffers must be mapped RO, to prevent
* post-scan tampering
*/
- if (CMDPARSER_USES_GGTT(dev_priv)) {
+ if (CMDPARSER_USES_GGTT(eb->i915)) {
+ vm = &eb->engine->gt->ggtt->vm;
flags = PIN_GLOBAL;
- vm = &dev_priv->ggtt.vm;
- } else if (vma->vm->has_read_only) {
- flags = PIN_USER;
- vm = vma->vm;
- i915_gem_object_set_readonly(obj);
} else {
- DRM_DEBUG("Cannot prevent post-scan tampering without RO capable vm\n");
- return ERR_PTR(-EINVAL);
+ vm = eb->context->vm;
+ if (!vm->has_read_only) {
+ DRM_DEBUG("Cannot prevent post-scan tampering without RO capable vm\n");
+ return ERR_PTR(-EINVAL);
+ }
+
+ i915_gem_object_set_readonly(obj);
+ flags = PIN_USER;
}
- return i915_gem_object_pin(obj, vm, NULL, 0, 0, flags);
+ vma = i915_vma_instance(obj, vm, NULL);
+ if (IS_ERR(vma))
+ return vma;
+
+ err = i915_vma_pin(vma, 0, 0, flags);
+ if (err)
+ return ERR_PTR(err);
+
+ return vma;
}
static struct i915_vma *eb_parse(struct i915_execbuffer *eb)
@@ -2058,7 +2068,7 @@ static struct i915_vma *eb_parse(struct i915_execbuffer *eb)
* For PPGTT backing however, we have no choice but to forcibly
* reject unsafe buffers
*/
- if (CMDPARSER_USES_GGTT(eb->i915) && (err == -EACCES))
+ if (i915_vma_is_ggtt(vma) && err == -EACCES)
/* Execute original buffer non-secure */
vma = NULL;
else
@@ -2075,7 +2085,7 @@ static struct i915_vma *eb_parse(struct i915_execbuffer *eb)
eb->batch_start_offset = 0;
eb->batch = vma;
- if (CMDPARSER_USES_GGTT(eb->i915))
+ if (i915_vma_is_ggtt(vma))
eb->batch_flags |= I915_DISPATCH_SECURE;
/* eb->batch_len unchanged */
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7bc1d8c102b2..5fa38c55daa3 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1842,14 +1842,6 @@ int i915_gem_object_unbind(struct drm_i915_gem_object *obj,
unsigned long flags);
#define I915_GEM_OBJECT_UNBIND_ACTIVE BIT(0)
-struct i915_vma * __must_check
-i915_gem_object_pin(struct drm_i915_gem_object *obj,
- struct i915_address_space *vm,
- const struct i915_ggtt_view *view,
- u64 size,
- u64 alignment,
- u64 flags);
-
void i915_gem_runtime_suspend(struct drm_i915_private *dev_priv);
static inline int __must_check
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 43c532756c7c..1ba5f26700b0 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -891,22 +891,8 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj,
u64 alignment,
u64 flags)
{
- struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
- struct i915_address_space *vm = &dev_priv->ggtt.vm;
-
- return i915_gem_object_pin(obj, vm, view, size, alignment,
- flags | PIN_GLOBAL);
-}
-
-struct i915_vma *
-i915_gem_object_pin(struct drm_i915_gem_object *obj,
- struct i915_address_space *vm,
- const struct i915_ggtt_view *view,
- u64 size,
- u64 alignment,
- u64 flags)
-{
- struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
+ struct drm_i915_private *i915 = to_i915(obj->base.dev);
+ struct i915_ggtt *ggtt = &i915->ggtt;
struct i915_vma *vma;
int ret;
@@ -915,17 +901,19 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
if (flags & PIN_MAPPABLE &&
(!view || view->type == I915_GGTT_VIEW_NORMAL)) {
- /* If the required space is larger than the available
+ /*
+ * If the required space is larger than the available
* aperture, we will not able to find a slot for the
* object and unbinding the object now will be in
* vain. Worse, doing so may cause us to ping-pong
* the object in and out of the Global GTT and
* waste a lot of cycles under the mutex.
*/
- if (obj->base.size > dev_priv->ggtt.mappable_end)
+ if (obj->base.size > ggtt->mappable_end)
return ERR_PTR(-E2BIG);
- /* If NONBLOCK is set the caller is optimistically
+ /*
+ * If NONBLOCK is set the caller is optimistically
* trying to cache the full object within the mappable
* aperture, and *must* have a fallback in place for
* situations where we cannot bind the object. We
@@ -941,11 +929,11 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
* we could try to minimise harm to others.
*/
if (flags & PIN_NONBLOCK &&
- obj->base.size > dev_priv->ggtt.mappable_end / 2)
+ obj->base.size > ggtt->mappable_end / 2)
return ERR_PTR(-ENOSPC);
}
- vma = i915_vma_instance(obj, vm, view);
+ vma = i915_vma_instance(obj, &ggtt->vm, view);
if (IS_ERR(vma))
return vma;
@@ -955,7 +943,7 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
return ERR_PTR(-ENOSPC);
if (flags & PIN_MAPPABLE &&
- vma->fence_size > dev_priv->ggtt.mappable_end / 2)
+ vma->fence_size > ggtt->mappable_end / 2)
return ERR_PTR(-ENOSPC);
}
@@ -965,14 +953,14 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
}
if (vma->fence && !i915_gem_object_is_tiled(obj)) {
- mutex_lock(&vma->vm->mutex);
+ mutex_lock(&ggtt->vm.mutex);
ret = i915_vma_revoke_fence(vma);
- mutex_unlock(&vma->vm->mutex);
+ mutex_unlock(&ggtt->vm.mutex);
if (ret)
return ERR_PTR(ret);
}
- ret = i915_vma_pin(vma, size, alignment, flags);
+ ret = i915_vma_pin(vma, size, alignment, flags | PIN_GLOBAL);
if (ret)
return ERR_PTR(ret);
--
2.24.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 14+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/gem: Purge the sudden reappearance of i915_gem_object_pin() (rev4)
@ 2019-11-15 21:58 ` Patchwork
0 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2019-11-15 21:58 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/gem: Purge the sudden reappearance of i915_gem_object_pin() (rev4)
URL : https://patchwork.freedesktop.org/series/69524/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7356 -> Patchwork_15293
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/index.html
Known issues
------------
Here are the changes found in Patchwork_15293 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_pm_rpm@module-reload:
- fi-skl-6770hq: [PASS][1] -> [DMESG-WARN][2] ([fdo#112261])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
* igt@i915_selftest@live_blt:
- fi-hsw-peppy: [PASS][3] -> [DMESG-FAIL][4] ([fdo#112147])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/fi-hsw-peppy/igt@i915_selftest@live_blt.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/fi-hsw-peppy/igt@i915_selftest@live_blt.html
* igt@kms_busy@basic-flip-pipe-b:
- fi-skl-6770hq: [PASS][5] -> [DMESG-WARN][6] ([fdo#105541])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/fi-skl-6770hq/igt@kms_busy@basic-flip-pipe-b.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/fi-skl-6770hq/igt@kms_busy@basic-flip-pipe-b.html
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u2: [PASS][7] -> [FAIL][8] ([fdo#103167])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
#### Possible fixes ####
* igt@gem_mmap_gtt@basic-small-copy:
- fi-icl-dsi: [DMESG-WARN][9] ([fdo#106107]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/fi-icl-dsi/igt@gem_mmap_gtt@basic-small-copy.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/fi-icl-dsi/igt@gem_mmap_gtt@basic-small-copy.html
* igt@i915_selftest@live_hangcheck:
- fi-bsw-n3050: [INCOMPLETE][11] ([fdo#105876]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/fi-bsw-n3050/igt@i915_selftest@live_hangcheck.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/fi-bsw-n3050/igt@i915_selftest@live_hangcheck.html
- fi-hsw-4770r: [DMESG-FAIL][13] ([fdo#111991]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/fi-hsw-4770r/igt@i915_selftest@live_hangcheck.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/fi-hsw-4770r/igt@i915_selftest@live_hangcheck.html
* igt@kms_chamelium@dp-crc-fast:
- fi-icl-u2: [FAIL][15] ([fdo#109635 ] / [fdo#110387]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/fi-icl-u2/igt@kms_chamelium@dp-crc-fast.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/fi-icl-u2/igt@kms_chamelium@dp-crc-fast.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][17] ([fdo#111045] / [fdo#111096]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u3: [FAIL][19] ([fdo#103167]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/fi-icl-u3/igt@kms_frontbuffer_tracking@basic.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/fi-icl-u3/igt@kms_frontbuffer_tracking@basic.html
#### Warnings ####
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-icl-u2: [DMESG-WARN][21] ([fdo#102505] / [fdo#110390]) -> [DMESG-WARN][22] ([fdo#102505] / [fdo#106107] / [fdo#110390])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102505]: https://bugs.freedesktop.org/show_bug.cgi?id=102505
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#105541]: https://bugs.freedesktop.org/show_bug.cgi?id=105541
[fdo#105876]: https://bugs.freedesktop.org/show_bug.cgi?id=105876
[fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107
[fdo#109635 ]: https://bugs.freedesktop.org/show_bug.cgi?id=109635
[fdo#109964]: https://bugs.freedesktop.org/show_bug.cgi?id=109964
[fdo#110387]: https://bugs.freedesktop.org/show_bug.cgi?id=110387
[fdo#110390]: https://bugs.freedesktop.org/show_bug.cgi?id=110390
[fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
[fdo#111991]: https://bugs.freedesktop.org/show_bug.cgi?id=111991
[fdo#112147]: https://bugs.freedesktop.org/show_bug.cgi?id=112147
[fdo#112261]: https://bugs.freedesktop.org/show_bug.cgi?id=112261
[fdo#112298]: https://bugs.freedesktop.org/show_bug.cgi?id=112298
Participating hosts (52 -> 45)
------------------------------
Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7356 -> Patchwork_15293
CI-20190529: 20190529
CI_DRM_7356: 967093f255d4e9c64856f381722c80cf56c96d3d @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5288: ff4551e36cd8e573ceb1e450d17a12e3298dc04c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_15293: 6a7f1df9dcd2ba6d5fcf11c526f26fa01de002e7 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
6a7f1df9dcd2 drm/i915/gem: Purge the sudden reappearance of i915_gem_object_pin()
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gem: Purge the sudden reappearance of i915_gem_object_pin() (rev4)
@ 2019-11-15 21:58 ` Patchwork
0 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2019-11-15 21:58 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/gem: Purge the sudden reappearance of i915_gem_object_pin() (rev4)
URL : https://patchwork.freedesktop.org/series/69524/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7356 -> Patchwork_15293
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/index.html
Known issues
------------
Here are the changes found in Patchwork_15293 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_pm_rpm@module-reload:
- fi-skl-6770hq: [PASS][1] -> [DMESG-WARN][2] ([fdo#112261])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
* igt@i915_selftest@live_blt:
- fi-hsw-peppy: [PASS][3] -> [DMESG-FAIL][4] ([fdo#112147])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/fi-hsw-peppy/igt@i915_selftest@live_blt.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/fi-hsw-peppy/igt@i915_selftest@live_blt.html
* igt@kms_busy@basic-flip-pipe-b:
- fi-skl-6770hq: [PASS][5] -> [DMESG-WARN][6] ([fdo#105541])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/fi-skl-6770hq/igt@kms_busy@basic-flip-pipe-b.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/fi-skl-6770hq/igt@kms_busy@basic-flip-pipe-b.html
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u2: [PASS][7] -> [FAIL][8] ([fdo#103167])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
#### Possible fixes ####
* igt@gem_mmap_gtt@basic-small-copy:
- fi-icl-dsi: [DMESG-WARN][9] ([fdo#106107]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/fi-icl-dsi/igt@gem_mmap_gtt@basic-small-copy.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/fi-icl-dsi/igt@gem_mmap_gtt@basic-small-copy.html
* igt@i915_selftest@live_hangcheck:
- fi-bsw-n3050: [INCOMPLETE][11] ([fdo#105876]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/fi-bsw-n3050/igt@i915_selftest@live_hangcheck.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/fi-bsw-n3050/igt@i915_selftest@live_hangcheck.html
- fi-hsw-4770r: [DMESG-FAIL][13] ([fdo#111991]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/fi-hsw-4770r/igt@i915_selftest@live_hangcheck.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/fi-hsw-4770r/igt@i915_selftest@live_hangcheck.html
* igt@kms_chamelium@dp-crc-fast:
- fi-icl-u2: [FAIL][15] ([fdo#109635 ] / [fdo#110387]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/fi-icl-u2/igt@kms_chamelium@dp-crc-fast.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/fi-icl-u2/igt@kms_chamelium@dp-crc-fast.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][17] ([fdo#111045] / [fdo#111096]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u3: [FAIL][19] ([fdo#103167]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/fi-icl-u3/igt@kms_frontbuffer_tracking@basic.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/fi-icl-u3/igt@kms_frontbuffer_tracking@basic.html
#### Warnings ####
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-icl-u2: [DMESG-WARN][21] ([fdo#102505] / [fdo#110390]) -> [DMESG-WARN][22] ([fdo#102505] / [fdo#106107] / [fdo#110390])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102505]: https://bugs.freedesktop.org/show_bug.cgi?id=102505
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#105541]: https://bugs.freedesktop.org/show_bug.cgi?id=105541
[fdo#105876]: https://bugs.freedesktop.org/show_bug.cgi?id=105876
[fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107
[fdo#109635 ]: https://bugs.freedesktop.org/show_bug.cgi?id=109635
[fdo#109964]: https://bugs.freedesktop.org/show_bug.cgi?id=109964
[fdo#110387]: https://bugs.freedesktop.org/show_bug.cgi?id=110387
[fdo#110390]: https://bugs.freedesktop.org/show_bug.cgi?id=110390
[fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
[fdo#111991]: https://bugs.freedesktop.org/show_bug.cgi?id=111991
[fdo#112147]: https://bugs.freedesktop.org/show_bug.cgi?id=112147
[fdo#112261]: https://bugs.freedesktop.org/show_bug.cgi?id=112261
[fdo#112298]: https://bugs.freedesktop.org/show_bug.cgi?id=112298
Participating hosts (52 -> 45)
------------------------------
Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7356 -> Patchwork_15293
CI-20190529: 20190529
CI_DRM_7356: 967093f255d4e9c64856f381722c80cf56c96d3d @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5288: ff4551e36cd8e573ceb1e450d17a12e3298dc04c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_15293: 6a7f1df9dcd2ba6d5fcf11c526f26fa01de002e7 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
6a7f1df9dcd2 drm/i915/gem: Purge the sudden reappearance of i915_gem_object_pin()
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915/gem: Purge the sudden reappearance of i915_gem_object_pin() (rev4)
@ 2019-11-17 10:20 ` Patchwork
0 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2019-11-17 10:20 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/gem: Purge the sudden reappearance of i915_gem_object_pin() (rev4)
URL : https://patchwork.freedesktop.org/series/69524/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7356_full -> Patchwork_15293_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_15293_full:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@gem_exec_parse_blt@batch-invalid-length}:
- shard-tglb: NOTRUN -> [SKIP][1] +3 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb3/igt@gem_exec_parse_blt@batch-invalid-length.html
Known issues
------------
Here are the changes found in Patchwork_15293_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_exec@basic-invalid-context-vcs1:
- shard-iclb: [PASS][2] -> [SKIP][3] ([fdo#112080]) +8 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb4/igt@gem_ctx_exec@basic-invalid-context-vcs1.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb6/igt@gem_ctx_exec@basic-invalid-context-vcs1.html
* igt@gem_ctx_isolation@rcs0-s3:
- shard-kbl: [PASS][4] -> [DMESG-WARN][5] ([fdo#108566]) +4 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-kbl7/igt@gem_ctx_isolation@rcs0-s3.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-kbl4/igt@gem_ctx_isolation@rcs0-s3.html
* igt@gem_ctx_isolation@vcs1-none:
- shard-iclb: [PASS][6] -> [SKIP][7] ([fdo#109276] / [fdo#112080]) +1 similar issue
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb4/igt@gem_ctx_isolation@vcs1-none.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb6/igt@gem_ctx_isolation@vcs1-none.html
* igt@gem_ctx_isolation@vecs0-s3:
- shard-glk: [PASS][8] -> [INCOMPLETE][9] ([fdo#103359] / [k.org#198133])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-glk8/igt@gem_ctx_isolation@vecs0-s3.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-glk2/igt@gem_ctx_isolation@vecs0-s3.html
* igt@gem_eio@in-flight-10ms:
- shard-snb: [PASS][10] -> [FAIL][11] ([fdo#111946])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-snb6/igt@gem_eio@in-flight-10ms.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-snb2/igt@gem_eio@in-flight-10ms.html
* igt@gem_eio@in-flight-suspend:
- shard-tglb: [PASS][12] -> [INCOMPLETE][13] ([fdo#111832] / [fdo#111850] / [fdo#112081])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb8/igt@gem_eio@in-flight-suspend.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb2/igt@gem_eio@in-flight-suspend.html
* igt@gem_exec_balancer@smoke:
- shard-iclb: [PASS][14] -> [SKIP][15] ([fdo#110854])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb4/igt@gem_exec_balancer@smoke.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb6/igt@gem_exec_balancer@smoke.html
* igt@gem_exec_schedule@preempt-other-chain-bsd:
- shard-iclb: [PASS][16] -> [SKIP][17] ([fdo#112146]) +5 similar issues
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb5/igt@gem_exec_schedule@preempt-other-chain-bsd.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb2/igt@gem_exec_schedule@preempt-other-chain-bsd.html
* igt@gem_exec_schedule@preempt-queue-chain-bsd2:
- shard-tglb: [PASS][18] -> [INCOMPLETE][19] ([fdo#111677])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb4/igt@gem_exec_schedule@preempt-queue-chain-bsd2.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb6/igt@gem_exec_schedule@preempt-queue-chain-bsd2.html
* igt@gem_exec_schedule@preempt-queue-render:
- shard-tglb: [PASS][20] -> [INCOMPLETE][21] ([fdo#111606] / [fdo#111677])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb3/igt@gem_exec_schedule@preempt-queue-render.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb6/igt@gem_exec_schedule@preempt-queue-render.html
* igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive:
- shard-hsw: [PASS][22] -> [TIMEOUT][23] ([fdo#112068 ])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-hsw7/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-hsw2/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive.html
* igt@gem_userptr_blits@map-fixed-invalidate-busy-gup:
- shard-snb: [PASS][24] -> [DMESG-WARN][25] ([fdo#111870])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-snb5/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-snb2/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
* igt@gem_workarounds@suspend-resume:
- shard-tglb: [PASS][26] -> [INCOMPLETE][27] ([fdo#111832] / [fdo#111850]) +2 similar issues
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb4/igt@gem_workarounds@suspend-resume.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb7/igt@gem_workarounds@suspend-resume.html
* igt@gem_workarounds@suspend-resume-context:
- shard-apl: [PASS][28] -> [DMESG-WARN][29] ([fdo#108566])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-apl7/igt@gem_workarounds@suspend-resume-context.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-apl6/igt@gem_workarounds@suspend-resume-context.html
* igt@i915_pm_dc@dc6-psr:
- shard-iclb: [PASS][30] -> [FAIL][31] ([fdo#111830 ])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb1/igt@i915_pm_dc@dc6-psr.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb8/igt@i915_pm_dc@dc6-psr.html
* igt@i915_selftest@live_hangcheck:
- shard-iclb: [PASS][32] -> [INCOMPLETE][33] ([fdo#107713] / [fdo#108569])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb8/igt@i915_selftest@live_hangcheck.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb5/igt@i915_selftest@live_hangcheck.html
* igt@kms_color@pipe-a-ctm-red-to-blue:
- shard-skl: [PASS][34] -> [FAIL][35] ([fdo#107201])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-skl1/igt@kms_color@pipe-a-ctm-red-to-blue.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-skl8/igt@kms_color@pipe-a-ctm-red-to-blue.html
* igt@kms_cursor_crc@pipe-a-cursor-128x42-sliding:
- shard-skl: [PASS][36] -> [FAIL][37] ([fdo#103232])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-skl1/igt@kms_cursor_crc@pipe-a-cursor-128x42-sliding.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-skl8/igt@kms_cursor_crc@pipe-a-cursor-128x42-sliding.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-tglb: [PASS][38] -> [INCOMPLETE][39] ([fdo#111747] / [fdo#111832] / [fdo#111850])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb9/igt@kms_fbcon_fbt@fbc-suspend.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb3/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@flip-vs-suspend:
- shard-skl: [PASS][40] -> [INCOMPLETE][41] ([fdo#109507])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-skl7/igt@kms_flip@flip-vs-suspend.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-skl5/igt@kms_flip@flip-vs-suspend.html
* igt@kms_flip_tiling@flip-to-y-tiled:
- shard-skl: [PASS][42] -> [FAIL][43] ([fdo#107931] / [fdo#108134])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-skl1/igt@kms_flip_tiling@flip-to-y-tiled.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-skl8/igt@kms_flip_tiling@flip-to-y-tiled.html
* igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw:
- shard-iclb: [PASS][44] -> [FAIL][45] ([fdo#103167]) +6 similar issues
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@fbcpsr-shrfb-scaledprimary:
- shard-tglb: [PASS][46] -> [FAIL][47] ([fdo#103167]) +4 similar issues
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb4/igt@kms_frontbuffer_tracking@fbcpsr-shrfb-scaledprimary.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb4/igt@kms_frontbuffer_tracking@fbcpsr-shrfb-scaledprimary.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
- shard-snb: [PASS][48] -> [DMESG-WARN][49] ([fdo#102365])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-snb2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-snb2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [PASS][50] -> [FAIL][51] ([fdo#108145]) +1 similar issue
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
* igt@kms_psr@psr2_dpms:
- shard-iclb: [PASS][52] -> [SKIP][53] ([fdo#109441])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb2/igt@kms_psr@psr2_dpms.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb7/igt@kms_psr@psr2_dpms.html
* igt@kms_vblank@pipe-d-ts-continuation-suspend:
- shard-tglb: [PASS][54] -> [INCOMPLETE][55] ([fdo#111850])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb8/igt@kms_vblank@pipe-d-ts-continuation-suspend.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb7/igt@kms_vblank@pipe-d-ts-continuation-suspend.html
* igt@prime_busy@hang-bsd2:
- shard-iclb: [PASS][56] -> [SKIP][57] ([fdo#109276]) +23 similar issues
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb1/igt@prime_busy@hang-bsd2.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb8/igt@prime_busy@hang-bsd2.html
#### Possible fixes ####
* igt@gem_ctx_isolation@vcs0-s3:
- shard-skl: [INCOMPLETE][58] ([fdo#104108]) -> [PASS][59]
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-skl10/igt@gem_ctx_isolation@vcs0-s3.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-skl9/igt@gem_ctx_isolation@vcs0-s3.html
- shard-tglb: [INCOMPLETE][60] ([fdo#111832]) -> [PASS][61]
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb5/igt@gem_ctx_isolation@vcs0-s3.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb6/igt@gem_ctx_isolation@vcs0-s3.html
* igt@gem_ctx_persistence@vcs1-mixed:
- shard-iclb: [SKIP][62] ([fdo#109276] / [fdo#112080]) -> [PASS][63]
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb5/igt@gem_ctx_persistence@vcs1-mixed.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb2/igt@gem_ctx_persistence@vcs1-mixed.html
* igt@gem_ctx_switch@queue-light:
- shard-tglb: [INCOMPLETE][64] ([fdo#111672]) -> [PASS][65]
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb6/igt@gem_ctx_switch@queue-light.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb3/igt@gem_ctx_switch@queue-light.html
* igt@gem_ctx_switch@vcs1-heavy:
- shard-iclb: [SKIP][66] ([fdo#112080]) -> [PASS][67] +15 similar issues
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb7/igt@gem_ctx_switch@vcs1-heavy.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb4/igt@gem_ctx_switch@vcs1-heavy.html
* igt@gem_exec_gttfill@basic:
- shard-tglb: [INCOMPLETE][68] ([fdo#111593]) -> [PASS][69]
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb6/igt@gem_exec_gttfill@basic.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb9/igt@gem_exec_gttfill@basic.html
* igt@gem_exec_nop@basic-parallel:
- shard-tglb: [INCOMPLETE][70] ([fdo#111747]) -> [PASS][71]
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb6/igt@gem_exec_nop@basic-parallel.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb1/igt@gem_exec_nop@basic-parallel.html
* igt@gem_exec_schedule@preempt-bsd:
- shard-iclb: [SKIP][72] ([fdo#112146]) -> [PASS][73] +5 similar issues
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb4/igt@gem_exec_schedule@preempt-bsd.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb6/igt@gem_exec_schedule@preempt-bsd.html
* igt@gem_userptr_blits@sync-unmap-after-close:
- shard-hsw: [DMESG-WARN][74] ([fdo#111870]) -> [PASS][75] +4 similar issues
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-hsw1/igt@gem_userptr_blits@sync-unmap-after-close.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-hsw6/igt@gem_userptr_blits@sync-unmap-after-close.html
- shard-snb: [DMESG-WARN][76] ([fdo#111870]) -> [PASS][77]
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-snb7/igt@gem_userptr_blits@sync-unmap-after-close.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-snb4/igt@gem_userptr_blits@sync-unmap-after-close.html
* igt@i915_pm_rc6_residency@rc6-accuracy:
- shard-kbl: [SKIP][78] ([fdo#109271]) -> [PASS][79]
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-kbl2/igt@i915_pm_rc6_residency@rc6-accuracy.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-kbl3/igt@i915_pm_rc6_residency@rc6-accuracy.html
* igt@i915_suspend@debugfs-reader:
- shard-tglb: [INCOMPLETE][80] ([fdo#111832] / [fdo#111850]) -> [PASS][81] +1 similar issue
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb1/igt@i915_suspend@debugfs-reader.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb3/igt@i915_suspend@debugfs-reader.html
* igt@i915_suspend@fence-restore-untiled:
- shard-snb: [DMESG-WARN][82] ([fdo#102365]) -> [PASS][83]
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-snb2/igt@i915_suspend@fence-restore-untiled.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-snb6/igt@i915_suspend@fence-restore-untiled.html
* igt@i915_suspend@sysfs-reader:
- shard-apl: [DMESG-WARN][84] ([fdo#108566]) -> [PASS][85] +1 similar issue
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-apl4/igt@i915_suspend@sysfs-reader.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-apl1/igt@i915_suspend@sysfs-reader.html
* igt@kms_cursor_crc@pipe-c-cursor-64x64-random:
- shard-hsw: [INCOMPLETE][86] ([fdo#103540]) -> [PASS][87]
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-hsw2/igt@kms_cursor_crc@pipe-c-cursor-64x64-random.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-hsw5/igt@kms_cursor_crc@pipe-c-cursor-64x64-random.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-skl: [FAIL][88] ([fdo#105363]) -> [PASS][89] +1 similar issue
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-skl3/igt@kms_flip@flip-vs-expired-vblank.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-skl3/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-kbl: [DMESG-WARN][90] ([fdo#108566]) -> [PASS][91] +1 similar issue
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-kbl1/igt@kms_flip@flip-vs-suspend-interruptible.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-kbl2/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt:
- shard-tglb: [FAIL][92] ([fdo#103167]) -> [PASS][93] +2 similar issues
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb9/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render:
- shard-iclb: [FAIL][94] ([fdo#103167]) -> [PASS][95] +4 similar issues
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html
* igt@kms_plane_lowres@pipe-a-tiling-x:
- shard-iclb: [FAIL][96] ([fdo#103166]) -> [PASS][97]
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb4/igt@kms_plane_lowres@pipe-a-tiling-x.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb8/igt@kms_plane_lowres@pipe-a-tiling-x.html
* igt@kms_psr@psr2_primary_mmap_gtt:
- shard-iclb: [SKIP][98] ([fdo#109441]) -> [PASS][99]
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb8/igt@kms_psr@psr2_primary_mmap_gtt.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb2/igt@kms_psr@psr2_primary_mmap_gtt.html
* igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend:
- shard-tglb: [INCOMPLETE][100] ([fdo#111850]) -> [PASS][101]
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb3/igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend.html
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb4/igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend.html
* igt@prime_vgem@fence-wait-bsd2:
- shard-iclb: [SKIP][102] ([fdo#109276]) -> [PASS][103] +19 similar issues
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb7/igt@prime_vgem@fence-wait-bsd2.html
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb4/igt@prime_vgem@fence-wait-bsd2.html
#### Warnings ####
* igt@gem_ctx_isolation@vcs1-nonpriv:
- shard-iclb: [FAIL][104] ([fdo#111329]) -> [SKIP][105] ([fdo#109276] / [fdo#112080])
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb1/igt@gem_ctx_isolation@vcs1-nonpriv.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb3/igt@gem_ctx_isolation@vcs1-nonpriv.html
* igt@gem_ctx_isolation@vcs2-none:
- shard-tglb: [SKIP][106] ([fdo#112080]) -> [SKIP][107] ([fdo#111912] / [fdo#112080])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_73
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gem: Purge the sudden reappearance of i915_gem_object_pin() (rev4)
@ 2019-11-17 10:20 ` Patchwork
0 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2019-11-17 10:20 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/gem: Purge the sudden reappearance of i915_gem_object_pin() (rev4)
URL : https://patchwork.freedesktop.org/series/69524/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7356_full -> Patchwork_15293_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_15293_full:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@gem_exec_parse_blt@batch-invalid-length}:
- shard-tglb: NOTRUN -> [SKIP][1] +3 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb3/igt@gem_exec_parse_blt@batch-invalid-length.html
Known issues
------------
Here are the changes found in Patchwork_15293_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_exec@basic-invalid-context-vcs1:
- shard-iclb: [PASS][2] -> [SKIP][3] ([fdo#112080]) +8 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb4/igt@gem_ctx_exec@basic-invalid-context-vcs1.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb6/igt@gem_ctx_exec@basic-invalid-context-vcs1.html
* igt@gem_ctx_isolation@rcs0-s3:
- shard-kbl: [PASS][4] -> [DMESG-WARN][5] ([fdo#108566]) +4 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-kbl7/igt@gem_ctx_isolation@rcs0-s3.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-kbl4/igt@gem_ctx_isolation@rcs0-s3.html
* igt@gem_ctx_isolation@vcs1-none:
- shard-iclb: [PASS][6] -> [SKIP][7] ([fdo#109276] / [fdo#112080]) +1 similar issue
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb4/igt@gem_ctx_isolation@vcs1-none.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb6/igt@gem_ctx_isolation@vcs1-none.html
* igt@gem_ctx_isolation@vecs0-s3:
- shard-glk: [PASS][8] -> [INCOMPLETE][9] ([fdo#103359] / [k.org#198133])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-glk8/igt@gem_ctx_isolation@vecs0-s3.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-glk2/igt@gem_ctx_isolation@vecs0-s3.html
* igt@gem_eio@in-flight-10ms:
- shard-snb: [PASS][10] -> [FAIL][11] ([fdo#111946])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-snb6/igt@gem_eio@in-flight-10ms.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-snb2/igt@gem_eio@in-flight-10ms.html
* igt@gem_eio@in-flight-suspend:
- shard-tglb: [PASS][12] -> [INCOMPLETE][13] ([fdo#111832] / [fdo#111850] / [fdo#112081])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb8/igt@gem_eio@in-flight-suspend.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb2/igt@gem_eio@in-flight-suspend.html
* igt@gem_exec_balancer@smoke:
- shard-iclb: [PASS][14] -> [SKIP][15] ([fdo#110854])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb4/igt@gem_exec_balancer@smoke.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb6/igt@gem_exec_balancer@smoke.html
* igt@gem_exec_schedule@preempt-other-chain-bsd:
- shard-iclb: [PASS][16] -> [SKIP][17] ([fdo#112146]) +5 similar issues
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb5/igt@gem_exec_schedule@preempt-other-chain-bsd.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb2/igt@gem_exec_schedule@preempt-other-chain-bsd.html
* igt@gem_exec_schedule@preempt-queue-chain-bsd2:
- shard-tglb: [PASS][18] -> [INCOMPLETE][19] ([fdo#111677])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb4/igt@gem_exec_schedule@preempt-queue-chain-bsd2.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb6/igt@gem_exec_schedule@preempt-queue-chain-bsd2.html
* igt@gem_exec_schedule@preempt-queue-render:
- shard-tglb: [PASS][20] -> [INCOMPLETE][21] ([fdo#111606] / [fdo#111677])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb3/igt@gem_exec_schedule@preempt-queue-render.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb6/igt@gem_exec_schedule@preempt-queue-render.html
* igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive:
- shard-hsw: [PASS][22] -> [TIMEOUT][23] ([fdo#112068 ])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-hsw7/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-hsw2/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive.html
* igt@gem_userptr_blits@map-fixed-invalidate-busy-gup:
- shard-snb: [PASS][24] -> [DMESG-WARN][25] ([fdo#111870])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-snb5/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-snb2/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
* igt@gem_workarounds@suspend-resume:
- shard-tglb: [PASS][26] -> [INCOMPLETE][27] ([fdo#111832] / [fdo#111850]) +2 similar issues
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb4/igt@gem_workarounds@suspend-resume.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb7/igt@gem_workarounds@suspend-resume.html
* igt@gem_workarounds@suspend-resume-context:
- shard-apl: [PASS][28] -> [DMESG-WARN][29] ([fdo#108566])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-apl7/igt@gem_workarounds@suspend-resume-context.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-apl6/igt@gem_workarounds@suspend-resume-context.html
* igt@i915_pm_dc@dc6-psr:
- shard-iclb: [PASS][30] -> [FAIL][31] ([fdo#111830 ])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb1/igt@i915_pm_dc@dc6-psr.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb8/igt@i915_pm_dc@dc6-psr.html
* igt@i915_selftest@live_hangcheck:
- shard-iclb: [PASS][32] -> [INCOMPLETE][33] ([fdo#107713] / [fdo#108569])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb8/igt@i915_selftest@live_hangcheck.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb5/igt@i915_selftest@live_hangcheck.html
* igt@kms_color@pipe-a-ctm-red-to-blue:
- shard-skl: [PASS][34] -> [FAIL][35] ([fdo#107201])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-skl1/igt@kms_color@pipe-a-ctm-red-to-blue.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-skl8/igt@kms_color@pipe-a-ctm-red-to-blue.html
* igt@kms_cursor_crc@pipe-a-cursor-128x42-sliding:
- shard-skl: [PASS][36] -> [FAIL][37] ([fdo#103232])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-skl1/igt@kms_cursor_crc@pipe-a-cursor-128x42-sliding.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-skl8/igt@kms_cursor_crc@pipe-a-cursor-128x42-sliding.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-tglb: [PASS][38] -> [INCOMPLETE][39] ([fdo#111747] / [fdo#111832] / [fdo#111850])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb9/igt@kms_fbcon_fbt@fbc-suspend.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb3/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@flip-vs-suspend:
- shard-skl: [PASS][40] -> [INCOMPLETE][41] ([fdo#109507])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-skl7/igt@kms_flip@flip-vs-suspend.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-skl5/igt@kms_flip@flip-vs-suspend.html
* igt@kms_flip_tiling@flip-to-y-tiled:
- shard-skl: [PASS][42] -> [FAIL][43] ([fdo#107931] / [fdo#108134])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-skl1/igt@kms_flip_tiling@flip-to-y-tiled.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-skl8/igt@kms_flip_tiling@flip-to-y-tiled.html
* igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw:
- shard-iclb: [PASS][44] -> [FAIL][45] ([fdo#103167]) +6 similar issues
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@fbcpsr-shrfb-scaledprimary:
- shard-tglb: [PASS][46] -> [FAIL][47] ([fdo#103167]) +4 similar issues
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb4/igt@kms_frontbuffer_tracking@fbcpsr-shrfb-scaledprimary.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb4/igt@kms_frontbuffer_tracking@fbcpsr-shrfb-scaledprimary.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
- shard-snb: [PASS][48] -> [DMESG-WARN][49] ([fdo#102365])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-snb2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-snb2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [PASS][50] -> [FAIL][51] ([fdo#108145]) +1 similar issue
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
* igt@kms_psr@psr2_dpms:
- shard-iclb: [PASS][52] -> [SKIP][53] ([fdo#109441])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb2/igt@kms_psr@psr2_dpms.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb7/igt@kms_psr@psr2_dpms.html
* igt@kms_vblank@pipe-d-ts-continuation-suspend:
- shard-tglb: [PASS][54] -> [INCOMPLETE][55] ([fdo#111850])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb8/igt@kms_vblank@pipe-d-ts-continuation-suspend.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb7/igt@kms_vblank@pipe-d-ts-continuation-suspend.html
* igt@prime_busy@hang-bsd2:
- shard-iclb: [PASS][56] -> [SKIP][57] ([fdo#109276]) +23 similar issues
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb1/igt@prime_busy@hang-bsd2.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb8/igt@prime_busy@hang-bsd2.html
#### Possible fixes ####
* igt@gem_ctx_isolation@vcs0-s3:
- shard-skl: [INCOMPLETE][58] ([fdo#104108]) -> [PASS][59]
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-skl10/igt@gem_ctx_isolation@vcs0-s3.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-skl9/igt@gem_ctx_isolation@vcs0-s3.html
- shard-tglb: [INCOMPLETE][60] ([fdo#111832]) -> [PASS][61]
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb5/igt@gem_ctx_isolation@vcs0-s3.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb6/igt@gem_ctx_isolation@vcs0-s3.html
* igt@gem_ctx_persistence@vcs1-mixed:
- shard-iclb: [SKIP][62] ([fdo#109276] / [fdo#112080]) -> [PASS][63]
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb5/igt@gem_ctx_persistence@vcs1-mixed.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb2/igt@gem_ctx_persistence@vcs1-mixed.html
* igt@gem_ctx_switch@queue-light:
- shard-tglb: [INCOMPLETE][64] ([fdo#111672]) -> [PASS][65]
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb6/igt@gem_ctx_switch@queue-light.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb3/igt@gem_ctx_switch@queue-light.html
* igt@gem_ctx_switch@vcs1-heavy:
- shard-iclb: [SKIP][66] ([fdo#112080]) -> [PASS][67] +15 similar issues
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb7/igt@gem_ctx_switch@vcs1-heavy.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb4/igt@gem_ctx_switch@vcs1-heavy.html
* igt@gem_exec_gttfill@basic:
- shard-tglb: [INCOMPLETE][68] ([fdo#111593]) -> [PASS][69]
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb6/igt@gem_exec_gttfill@basic.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb9/igt@gem_exec_gttfill@basic.html
* igt@gem_exec_nop@basic-parallel:
- shard-tglb: [INCOMPLETE][70] ([fdo#111747]) -> [PASS][71]
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb6/igt@gem_exec_nop@basic-parallel.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb1/igt@gem_exec_nop@basic-parallel.html
* igt@gem_exec_schedule@preempt-bsd:
- shard-iclb: [SKIP][72] ([fdo#112146]) -> [PASS][73] +5 similar issues
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb4/igt@gem_exec_schedule@preempt-bsd.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb6/igt@gem_exec_schedule@preempt-bsd.html
* igt@gem_userptr_blits@sync-unmap-after-close:
- shard-hsw: [DMESG-WARN][74] ([fdo#111870]) -> [PASS][75] +4 similar issues
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-hsw1/igt@gem_userptr_blits@sync-unmap-after-close.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-hsw6/igt@gem_userptr_blits@sync-unmap-after-close.html
- shard-snb: [DMESG-WARN][76] ([fdo#111870]) -> [PASS][77]
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-snb7/igt@gem_userptr_blits@sync-unmap-after-close.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-snb4/igt@gem_userptr_blits@sync-unmap-after-close.html
* igt@i915_pm_rc6_residency@rc6-accuracy:
- shard-kbl: [SKIP][78] ([fdo#109271]) -> [PASS][79]
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-kbl2/igt@i915_pm_rc6_residency@rc6-accuracy.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-kbl3/igt@i915_pm_rc6_residency@rc6-accuracy.html
* igt@i915_suspend@debugfs-reader:
- shard-tglb: [INCOMPLETE][80] ([fdo#111832] / [fdo#111850]) -> [PASS][81] +1 similar issue
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb1/igt@i915_suspend@debugfs-reader.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb3/igt@i915_suspend@debugfs-reader.html
* igt@i915_suspend@fence-restore-untiled:
- shard-snb: [DMESG-WARN][82] ([fdo#102365]) -> [PASS][83]
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-snb2/igt@i915_suspend@fence-restore-untiled.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-snb6/igt@i915_suspend@fence-restore-untiled.html
* igt@i915_suspend@sysfs-reader:
- shard-apl: [DMESG-WARN][84] ([fdo#108566]) -> [PASS][85] +1 similar issue
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-apl4/igt@i915_suspend@sysfs-reader.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-apl1/igt@i915_suspend@sysfs-reader.html
* igt@kms_cursor_crc@pipe-c-cursor-64x64-random:
- shard-hsw: [INCOMPLETE][86] ([fdo#103540]) -> [PASS][87]
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-hsw2/igt@kms_cursor_crc@pipe-c-cursor-64x64-random.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-hsw5/igt@kms_cursor_crc@pipe-c-cursor-64x64-random.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-skl: [FAIL][88] ([fdo#105363]) -> [PASS][89] +1 similar issue
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-skl3/igt@kms_flip@flip-vs-expired-vblank.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-skl3/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-kbl: [DMESG-WARN][90] ([fdo#108566]) -> [PASS][91] +1 similar issue
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-kbl1/igt@kms_flip@flip-vs-suspend-interruptible.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-kbl2/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt:
- shard-tglb: [FAIL][92] ([fdo#103167]) -> [PASS][93] +2 similar issues
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb9/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render:
- shard-iclb: [FAIL][94] ([fdo#103167]) -> [PASS][95] +4 similar issues
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html
* igt@kms_plane_lowres@pipe-a-tiling-x:
- shard-iclb: [FAIL][96] ([fdo#103166]) -> [PASS][97]
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb4/igt@kms_plane_lowres@pipe-a-tiling-x.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb8/igt@kms_plane_lowres@pipe-a-tiling-x.html
* igt@kms_psr@psr2_primary_mmap_gtt:
- shard-iclb: [SKIP][98] ([fdo#109441]) -> [PASS][99]
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb8/igt@kms_psr@psr2_primary_mmap_gtt.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb2/igt@kms_psr@psr2_primary_mmap_gtt.html
* igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend:
- shard-tglb: [INCOMPLETE][100] ([fdo#111850]) -> [PASS][101]
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-tglb3/igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend.html
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-tglb4/igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend.html
* igt@prime_vgem@fence-wait-bsd2:
- shard-iclb: [SKIP][102] ([fdo#109276]) -> [PASS][103] +19 similar issues
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb7/igt@prime_vgem@fence-wait-bsd2.html
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb4/igt@prime_vgem@fence-wait-bsd2.html
#### Warnings ####
* igt@gem_ctx_isolation@vcs1-nonpriv:
- shard-iclb: [FAIL][104] ([fdo#111329]) -> [SKIP][105] ([fdo#109276] / [fdo#112080])
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7356/shard-iclb1/igt@gem_ctx_isolation@vcs1-nonpriv.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/shard-iclb3/igt@gem_ctx_isolation@vcs1-nonpriv.html
* igt@gem_ctx_isolation@vcs2-none:
- shard-tglb: [SKIP][106] ([fdo#112080]) -> [SKIP][107] ([fdo#111912] / [fdo#112080])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_73
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15293/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2019-11-17 10:20 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-11-15 12:00 [PATCH] drm/i915/gem: Purge the sudden reappearance of i915_gem_object_pin() Chris Wilson
2019-11-15 12:00 ` [Intel-gfx] " Chris Wilson
2019-11-15 12:34 ` Chris Wilson
2019-11-15 12:34 ` [Intel-gfx] " Chris Wilson
2019-11-15 12:34 ` Matthew Auld
2019-11-15 12:34 ` [Intel-gfx] " Matthew Auld
2019-11-15 12:35 ` Chris Wilson
2019-11-15 12:35 ` [Intel-gfx] " Chris Wilson
2019-11-15 17:08 ` [PATCH v2] " Chris Wilson
2019-11-15 17:08 ` [Intel-gfx] " Chris Wilson
2019-11-15 21:58 ` ✓ Fi.CI.BAT: success for drm/i915/gem: Purge the sudden reappearance of i915_gem_object_pin() (rev4) Patchwork
2019-11-15 21:58 ` [Intel-gfx] " Patchwork
2019-11-17 10:20 ` ✓ Fi.CI.IGT: " Patchwork
2019-11-17 10:20 ` [Intel-gfx] " Patchwork
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