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* [PATCH 1/5] drm/amdgpu: fix GFX10 missing CSIB set
@ 2019-11-26 11:50 ` Monk Liu
  0 siblings, 0 replies; 41+ messages in thread
From: Monk Liu @ 2019-11-26 11:50 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Monk Liu

still need to init csb even for SRIOV

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 4d6df35..879c0a1 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -1926,14 +1926,16 @@ static int gfx_v10_0_rlc_resume(struct amdgpu_device *adev)
 {
 	int r;
 
-	if (amdgpu_sriov_vf(adev))
-		return 0;
-
 	if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
 		r = gfx_v10_0_wait_for_rlc_autoload_complete(adev);
 		if (r)
 			return r;
 
+		if (amdgpu_sriov_vf(adev)) {
+			gfx_v10_0_init_csb(adev);
+			return 0;
+		}
+
 		r = gfx_v10_0_init_pg(adev);
 		if (r)
 			return r;
-- 
2.7.4

_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 41+ messages in thread

* [PATCH 1/5] drm/amdgpu: fix GFX10 missing CSIB set
@ 2019-11-26 11:50 ` Monk Liu
  0 siblings, 0 replies; 41+ messages in thread
From: Monk Liu @ 2019-11-26 11:50 UTC (permalink / raw)
  To: amd-gfx; +Cc: Monk Liu

still need to init csb even for SRIOV

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 4d6df35..879c0a1 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -1926,14 +1926,16 @@ static int gfx_v10_0_rlc_resume(struct amdgpu_device *adev)
 {
 	int r;
 
-	if (amdgpu_sriov_vf(adev))
-		return 0;
-
 	if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
 		r = gfx_v10_0_wait_for_rlc_autoload_complete(adev);
 		if (r)
 			return r;
 
+		if (amdgpu_sriov_vf(adev)) {
+			gfx_v10_0_init_csb(adev);
+			return 0;
+		}
+
 		r = gfx_v10_0_init_pg(adev);
 		if (r)
 			return r;
-- 
2.7.4

_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 41+ messages in thread

* [PATCH 2/5] drm/amdgpu: skip rlc ucode loading for SRIOV gfx10
@ 2019-11-26 11:50     ` Monk Liu
  0 siblings, 0 replies; 41+ messages in thread
From: Monk Liu @ 2019-11-26 11:50 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Monk Liu

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 80 +++++++++++++++++-----------------
 1 file changed, 41 insertions(+), 39 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 879c0a1..a56cba9 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -691,59 +691,61 @@ static int gfx_v10_0_init_microcode(struct amdgpu_device *adev)
 	adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);
 	adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);
 
-	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name);
-	err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev);
-	if (err)
-		goto out;
-	err = amdgpu_ucode_validate(adev->gfx.rlc_fw);
-	rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data;
-	version_major = le16_to_cpu(rlc_hdr->header.header_version_major);
-	version_minor = le16_to_cpu(rlc_hdr->header.header_version_minor);
-	if (version_major == 2 && version_minor == 1)
-		adev->gfx.rlc.is_rlc_v2_1 = true;
-
-	adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version);
-	adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version);
-	adev->gfx.rlc.save_and_restore_offset =
+	if (!amdgpu_sriov_vf(adev)) {
+		snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name);
+		err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev);
+		if (err)
+			goto out;
+		err = amdgpu_ucode_validate(adev->gfx.rlc_fw);
+		rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data;
+		version_major = le16_to_cpu(rlc_hdr->header.header_version_major);
+		version_minor = le16_to_cpu(rlc_hdr->header.header_version_minor);
+		if (version_major == 2 && version_minor == 1)
+			adev->gfx.rlc.is_rlc_v2_1 = true;
+
+		adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version);
+		adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version);
+		adev->gfx.rlc.save_and_restore_offset =
 			le32_to_cpu(rlc_hdr->save_and_restore_offset);
-	adev->gfx.rlc.clear_state_descriptor_offset =
+		adev->gfx.rlc.clear_state_descriptor_offset =
 			le32_to_cpu(rlc_hdr->clear_state_descriptor_offset);
-	adev->gfx.rlc.avail_scratch_ram_locations =
+		adev->gfx.rlc.avail_scratch_ram_locations =
 			le32_to_cpu(rlc_hdr->avail_scratch_ram_locations);
-	adev->gfx.rlc.reg_restore_list_size =
+		adev->gfx.rlc.reg_restore_list_size =
 			le32_to_cpu(rlc_hdr->reg_restore_list_size);
-	adev->gfx.rlc.reg_list_format_start =
+		adev->gfx.rlc.reg_list_format_start =
 			le32_to_cpu(rlc_hdr->reg_list_format_start);
-	adev->gfx.rlc.reg_list_format_separate_start =
+		adev->gfx.rlc.reg_list_format_separate_start =
 			le32_to_cpu(rlc_hdr->reg_list_format_separate_start);
-	adev->gfx.rlc.starting_offsets_start =
+		adev->gfx.rlc.starting_offsets_start =
 			le32_to_cpu(rlc_hdr->starting_offsets_start);
-	adev->gfx.rlc.reg_list_format_size_bytes =
+		adev->gfx.rlc.reg_list_format_size_bytes =
 			le32_to_cpu(rlc_hdr->reg_list_format_size_bytes);
-	adev->gfx.rlc.reg_list_size_bytes =
+		adev->gfx.rlc.reg_list_size_bytes =
 			le32_to_cpu(rlc_hdr->reg_list_size_bytes);
-	adev->gfx.rlc.register_list_format =
+		adev->gfx.rlc.register_list_format =
 			kmalloc(adev->gfx.rlc.reg_list_format_size_bytes +
-				adev->gfx.rlc.reg_list_size_bytes, GFP_KERNEL);
-	if (!adev->gfx.rlc.register_list_format) {
-		err = -ENOMEM;
-		goto out;
-	}
+					adev->gfx.rlc.reg_list_size_bytes, GFP_KERNEL);
+		if (!adev->gfx.rlc.register_list_format) {
+			err = -ENOMEM;
+			goto out;
+		}
 
-	tmp = (unsigned int *)((uintptr_t)rlc_hdr +
-			le32_to_cpu(rlc_hdr->reg_list_format_array_offset_bytes));
-	for (i = 0 ; i < (rlc_hdr->reg_list_format_size_bytes >> 2); i++)
-		adev->gfx.rlc.register_list_format[i] =	le32_to_cpu(tmp[i]);
+		tmp = (unsigned int *)((uintptr_t)rlc_hdr +
+							   le32_to_cpu(rlc_hdr->reg_list_format_array_offset_bytes));
+		for (i = 0 ; i < (rlc_hdr->reg_list_format_size_bytes >> 2); i++)
+			adev->gfx.rlc.register_list_format[i] =	le32_to_cpu(tmp[i]);
 
-	adev->gfx.rlc.register_restore = adev->gfx.rlc.register_list_format + i;
+		adev->gfx.rlc.register_restore = adev->gfx.rlc.register_list_format + i;
 
-	tmp = (unsigned int *)((uintptr_t)rlc_hdr +
-			le32_to_cpu(rlc_hdr->reg_list_array_offset_bytes));
-	for (i = 0 ; i < (rlc_hdr->reg_list_size_bytes >> 2); i++)
-		adev->gfx.rlc.register_restore[i] = le32_to_cpu(tmp[i]);
+		tmp = (unsigned int *)((uintptr_t)rlc_hdr +
+							   le32_to_cpu(rlc_hdr->reg_list_array_offset_bytes));
+		for (i = 0 ; i < (rlc_hdr->reg_list_size_bytes >> 2); i++)
+			adev->gfx.rlc.register_restore[i] = le32_to_cpu(tmp[i]);
 
-	if (adev->gfx.rlc.is_rlc_v2_1)
-		gfx_v10_0_init_rlc_ext_microcode(adev);
+		if (adev->gfx.rlc.is_rlc_v2_1)
+			gfx_v10_0_init_rlc_ext_microcode(adev);
+	}
 
 	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec%s.bin", chip_name, wks);
 	err = request_firmware(&adev->gfx.mec_fw, fw_name, adev->dev);
-- 
2.7.4

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 41+ messages in thread

* [PATCH 2/5] drm/amdgpu: skip rlc ucode loading for SRIOV gfx10
@ 2019-11-26 11:50     ` Monk Liu
  0 siblings, 0 replies; 41+ messages in thread
From: Monk Liu @ 2019-11-26 11:50 UTC (permalink / raw)
  To: amd-gfx; +Cc: Monk Liu

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 80 +++++++++++++++++-----------------
 1 file changed, 41 insertions(+), 39 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 879c0a1..a56cba9 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -691,59 +691,61 @@ static int gfx_v10_0_init_microcode(struct amdgpu_device *adev)
 	adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);
 	adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);
 
-	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name);
-	err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev);
-	if (err)
-		goto out;
-	err = amdgpu_ucode_validate(adev->gfx.rlc_fw);
-	rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data;
-	version_major = le16_to_cpu(rlc_hdr->header.header_version_major);
-	version_minor = le16_to_cpu(rlc_hdr->header.header_version_minor);
-	if (version_major == 2 && version_minor == 1)
-		adev->gfx.rlc.is_rlc_v2_1 = true;
-
-	adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version);
-	adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version);
-	adev->gfx.rlc.save_and_restore_offset =
+	if (!amdgpu_sriov_vf(adev)) {
+		snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name);
+		err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev);
+		if (err)
+			goto out;
+		err = amdgpu_ucode_validate(adev->gfx.rlc_fw);
+		rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data;
+		version_major = le16_to_cpu(rlc_hdr->header.header_version_major);
+		version_minor = le16_to_cpu(rlc_hdr->header.header_version_minor);
+		if (version_major == 2 && version_minor == 1)
+			adev->gfx.rlc.is_rlc_v2_1 = true;
+
+		adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version);
+		adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version);
+		adev->gfx.rlc.save_and_restore_offset =
 			le32_to_cpu(rlc_hdr->save_and_restore_offset);
-	adev->gfx.rlc.clear_state_descriptor_offset =
+		adev->gfx.rlc.clear_state_descriptor_offset =
 			le32_to_cpu(rlc_hdr->clear_state_descriptor_offset);
-	adev->gfx.rlc.avail_scratch_ram_locations =
+		adev->gfx.rlc.avail_scratch_ram_locations =
 			le32_to_cpu(rlc_hdr->avail_scratch_ram_locations);
-	adev->gfx.rlc.reg_restore_list_size =
+		adev->gfx.rlc.reg_restore_list_size =
 			le32_to_cpu(rlc_hdr->reg_restore_list_size);
-	adev->gfx.rlc.reg_list_format_start =
+		adev->gfx.rlc.reg_list_format_start =
 			le32_to_cpu(rlc_hdr->reg_list_format_start);
-	adev->gfx.rlc.reg_list_format_separate_start =
+		adev->gfx.rlc.reg_list_format_separate_start =
 			le32_to_cpu(rlc_hdr->reg_list_format_separate_start);
-	adev->gfx.rlc.starting_offsets_start =
+		adev->gfx.rlc.starting_offsets_start =
 			le32_to_cpu(rlc_hdr->starting_offsets_start);
-	adev->gfx.rlc.reg_list_format_size_bytes =
+		adev->gfx.rlc.reg_list_format_size_bytes =
 			le32_to_cpu(rlc_hdr->reg_list_format_size_bytes);
-	adev->gfx.rlc.reg_list_size_bytes =
+		adev->gfx.rlc.reg_list_size_bytes =
 			le32_to_cpu(rlc_hdr->reg_list_size_bytes);
-	adev->gfx.rlc.register_list_format =
+		adev->gfx.rlc.register_list_format =
 			kmalloc(adev->gfx.rlc.reg_list_format_size_bytes +
-				adev->gfx.rlc.reg_list_size_bytes, GFP_KERNEL);
-	if (!adev->gfx.rlc.register_list_format) {
-		err = -ENOMEM;
-		goto out;
-	}
+					adev->gfx.rlc.reg_list_size_bytes, GFP_KERNEL);
+		if (!adev->gfx.rlc.register_list_format) {
+			err = -ENOMEM;
+			goto out;
+		}
 
-	tmp = (unsigned int *)((uintptr_t)rlc_hdr +
-			le32_to_cpu(rlc_hdr->reg_list_format_array_offset_bytes));
-	for (i = 0 ; i < (rlc_hdr->reg_list_format_size_bytes >> 2); i++)
-		adev->gfx.rlc.register_list_format[i] =	le32_to_cpu(tmp[i]);
+		tmp = (unsigned int *)((uintptr_t)rlc_hdr +
+							   le32_to_cpu(rlc_hdr->reg_list_format_array_offset_bytes));
+		for (i = 0 ; i < (rlc_hdr->reg_list_format_size_bytes >> 2); i++)
+			adev->gfx.rlc.register_list_format[i] =	le32_to_cpu(tmp[i]);
 
-	adev->gfx.rlc.register_restore = adev->gfx.rlc.register_list_format + i;
+		adev->gfx.rlc.register_restore = adev->gfx.rlc.register_list_format + i;
 
-	tmp = (unsigned int *)((uintptr_t)rlc_hdr +
-			le32_to_cpu(rlc_hdr->reg_list_array_offset_bytes));
-	for (i = 0 ; i < (rlc_hdr->reg_list_size_bytes >> 2); i++)
-		adev->gfx.rlc.register_restore[i] = le32_to_cpu(tmp[i]);
+		tmp = (unsigned int *)((uintptr_t)rlc_hdr +
+							   le32_to_cpu(rlc_hdr->reg_list_array_offset_bytes));
+		for (i = 0 ; i < (rlc_hdr->reg_list_size_bytes >> 2); i++)
+			adev->gfx.rlc.register_restore[i] = le32_to_cpu(tmp[i]);
 
-	if (adev->gfx.rlc.is_rlc_v2_1)
-		gfx_v10_0_init_rlc_ext_microcode(adev);
+		if (adev->gfx.rlc.is_rlc_v2_1)
+			gfx_v10_0_init_rlc_ext_microcode(adev);
+	}
 
 	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec%s.bin", chip_name, wks);
 	err = request_firmware(&adev->gfx.mec_fw, fw_name, adev->dev);
-- 
2.7.4

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 41+ messages in thread

* [PATCH 3/5] drm/amdgpu: do autoload right after MEC loaded for SRIOV VF
@ 2019-11-26 11:50     ` Monk Liu
  0 siblings, 0 replies; 41+ messages in thread
From: Monk Liu @ 2019-11-26 11:50 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Monk Liu

since we don't have RLCG ucode loading and no SRlist as well

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 96a6b00..b65fda9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -1490,8 +1490,7 @@ static int psp_np_fw_load(struct psp_context *psp)
 			return ret;
 
 		/* Start rlc autoload after psp recieved all the gfx firmware */
-		if (psp->autoload_supported && ucode->ucode_id ==
-			AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM) {
+		if (psp->autoload_supported && ucode->ucode_id == (amdgpu_sriov_vf(adev) ? AMDGPU_UCODE_ID_CP_MEC2 : AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM)) {
 			ret = psp_rlc_autoload(psp);
 			if (ret) {
 				DRM_ERROR("Failed to start rlc autoload\n");
-- 
2.7.4

_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 41+ messages in thread

* [PATCH 3/5] drm/amdgpu: do autoload right after MEC loaded for SRIOV VF
@ 2019-11-26 11:50     ` Monk Liu
  0 siblings, 0 replies; 41+ messages in thread
From: Monk Liu @ 2019-11-26 11:50 UTC (permalink / raw)
  To: amd-gfx; +Cc: Monk Liu

since we don't have RLCG ucode loading and no SRlist as well

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 96a6b00..b65fda9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -1490,8 +1490,7 @@ static int psp_np_fw_load(struct psp_context *psp)
 			return ret;
 
 		/* Start rlc autoload after psp recieved all the gfx firmware */
-		if (psp->autoload_supported && ucode->ucode_id ==
-			AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM) {
+		if (psp->autoload_supported && ucode->ucode_id == (amdgpu_sriov_vf(adev) ? AMDGPU_UCODE_ID_CP_MEC2 : AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM)) {
 			ret = psp_rlc_autoload(psp);
 			if (ret) {
 				DRM_ERROR("Failed to start rlc autoload\n");
-- 
2.7.4

_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 41+ messages in thread

* [PATCH 4/5] drm/amdgpu: use CPU to flush vmhub if sched stopped
@ 2019-11-26 11:50     ` Monk Liu
  0 siblings, 0 replies; 41+ messages in thread
From: Monk Liu @ 2019-11-26 11:50 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Monk Liu

otherwse the flush_gpu_tlb will hang if we unload the
KMD becuase the schedulers already stopped

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index 321f8a9..4bb4d27 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -326,7 +326,8 @@ static void gmc_v10_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
 
 	if (!adev->mman.buffer_funcs_enabled ||
 	    !adev->ib_pool_ready ||
-	    adev->in_gpu_reset) {
+	    adev->in_gpu_reset ||
+		ring->sched.ready == false) {
 		gmc_v10_0_flush_vm_hub(adev, vmid, AMDGPU_GFXHUB_0, 0);
 		mutex_unlock(&adev->mman.gtt_window_lock);
 		return;
-- 
2.7.4

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 41+ messages in thread

* [PATCH 4/5] drm/amdgpu: use CPU to flush vmhub if sched stopped
@ 2019-11-26 11:50     ` Monk Liu
  0 siblings, 0 replies; 41+ messages in thread
From: Monk Liu @ 2019-11-26 11:50 UTC (permalink / raw)
  To: amd-gfx; +Cc: Monk Liu

otherwse the flush_gpu_tlb will hang if we unload the
KMD becuase the schedulers already stopped

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index 321f8a9..4bb4d27 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -326,7 +326,8 @@ static void gmc_v10_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
 
 	if (!adev->mman.buffer_funcs_enabled ||
 	    !adev->ib_pool_ready ||
-	    adev->in_gpu_reset) {
+	    adev->in_gpu_reset ||
+		ring->sched.ready == false) {
 		gmc_v10_0_flush_vm_hub(adev, vmid, AMDGPU_GFXHUB_0, 0);
 		mutex_unlock(&adev->mman.gtt_window_lock);
 		return;
-- 
2.7.4

_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 41+ messages in thread

* [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload
@ 2019-11-26 11:50     ` Monk Liu
  0 siblings, 0 replies; 41+ messages in thread
From: Monk Liu @ 2019-11-26 11:50 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Monk Liu

kernel would report a warning on double unpin
on the csb BO because we unpin it during hw_fini
but actually we don't need to pin/unpin it during
hw_init/fini since it is created with kernel pinned

remove all those useless code for gfx9/10

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c |  1 -
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c  | 38 --------------------------------
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c   | 39 ---------------------------------
 3 files changed, 78 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
index c8793e6..289fada 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
@@ -145,7 +145,6 @@ int amdgpu_gfx_rlc_init_csb(struct amdgpu_device *adev)
 	dst_ptr = adev->gfx.rlc.cs_ptr;
 	adev->gfx.rlc.funcs->get_csb_buffer(adev, dst_ptr);
 	amdgpu_bo_kunmap(adev->gfx.rlc.clear_state_obj);
-	amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
 	amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
 
 	return 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index a56cba9..5ee7467 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -996,39 +996,6 @@ static int gfx_v10_0_rlc_init(struct amdgpu_device *adev)
 	return 0;
 }
 
-static int gfx_v10_0_csb_vram_pin(struct amdgpu_device *adev)
-{
-	int r;
-
-	r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
-	if (unlikely(r != 0))
-		return r;
-
-	r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
-			AMDGPU_GEM_DOMAIN_VRAM);
-	if (!r)
-		adev->gfx.rlc.clear_state_gpu_addr =
-			amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
-
-	amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
-
-	return r;
-}
-
-static void gfx_v10_0_csb_vram_unpin(struct amdgpu_device *adev)
-{
-	int r;
-
-	if (!adev->gfx.rlc.clear_state_obj)
-		return;
-
-	r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
-	if (likely(r == 0)) {
-		amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
-		amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
-	}
-}
-
 static void gfx_v10_0_mec_fini(struct amdgpu_device *adev)
 {
 	amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL);
@@ -3780,10 +3747,6 @@ static int gfx_v10_0_hw_init(void *handle)
 	int r;
 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-	r = gfx_v10_0_csb_vram_pin(adev);
-	if (r)
-		return r;
-
 	if (!amdgpu_emu_mode)
 		gfx_v10_0_init_golden_registers(adev);
 
@@ -3871,7 +3834,6 @@ static int gfx_v10_0_hw_fini(void *handle)
 	}
 	gfx_v10_0_cp_enable(adev, false);
 	gfx_v10_0_enable_gui_idle_interrupt(adev, false);
-	gfx_v10_0_csb_vram_unpin(adev);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 4cc2e50..524a7ba 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -1683,39 +1683,6 @@ static int gfx_v9_0_rlc_init(struct amdgpu_device *adev)
 	return 0;
 }
 
-static int gfx_v9_0_csb_vram_pin(struct amdgpu_device *adev)
-{
-	int r;
-
-	r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
-	if (unlikely(r != 0))
-		return r;
-
-	r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
-			AMDGPU_GEM_DOMAIN_VRAM);
-	if (!r)
-		adev->gfx.rlc.clear_state_gpu_addr =
-			amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
-
-	amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
-
-	return r;
-}
-
-static void gfx_v9_0_csb_vram_unpin(struct amdgpu_device *adev)
-{
-	int r;
-
-	if (!adev->gfx.rlc.clear_state_obj)
-		return;
-
-	r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
-	if (likely(r == 0)) {
-		amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
-		amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
-	}
-}
-
 static void gfx_v9_0_mec_fini(struct amdgpu_device *adev)
 {
 	amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL);
@@ -3694,10 +3661,6 @@ static int gfx_v9_0_hw_init(void *handle)
 
 	gfx_v9_0_constants_init(adev);
 
-	r = gfx_v9_0_csb_vram_pin(adev);
-	if (r)
-		return r;
-
 	r = adev->gfx.rlc.funcs->resume(adev);
 	if (r)
 		return r;
@@ -3779,8 +3742,6 @@ static int gfx_v9_0_hw_fini(void *handle)
 	gfx_v9_0_cp_enable(adev, false);
 	adev->gfx.rlc.funcs->stop(adev);
 
-	gfx_v9_0_csb_vram_unpin(adev);
-
 	return 0;
 }
 
-- 
2.7.4

_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 41+ messages in thread

* [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload
@ 2019-11-26 11:50     ` Monk Liu
  0 siblings, 0 replies; 41+ messages in thread
From: Monk Liu @ 2019-11-26 11:50 UTC (permalink / raw)
  To: amd-gfx; +Cc: Monk Liu

kernel would report a warning on double unpin
on the csb BO because we unpin it during hw_fini
but actually we don't need to pin/unpin it during
hw_init/fini since it is created with kernel pinned

remove all those useless code for gfx9/10

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c |  1 -
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c  | 38 --------------------------------
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c   | 39 ---------------------------------
 3 files changed, 78 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
index c8793e6..289fada 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
@@ -145,7 +145,6 @@ int amdgpu_gfx_rlc_init_csb(struct amdgpu_device *adev)
 	dst_ptr = adev->gfx.rlc.cs_ptr;
 	adev->gfx.rlc.funcs->get_csb_buffer(adev, dst_ptr);
 	amdgpu_bo_kunmap(adev->gfx.rlc.clear_state_obj);
-	amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
 	amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
 
 	return 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index a56cba9..5ee7467 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -996,39 +996,6 @@ static int gfx_v10_0_rlc_init(struct amdgpu_device *adev)
 	return 0;
 }
 
-static int gfx_v10_0_csb_vram_pin(struct amdgpu_device *adev)
-{
-	int r;
-
-	r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
-	if (unlikely(r != 0))
-		return r;
-
-	r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
-			AMDGPU_GEM_DOMAIN_VRAM);
-	if (!r)
-		adev->gfx.rlc.clear_state_gpu_addr =
-			amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
-
-	amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
-
-	return r;
-}
-
-static void gfx_v10_0_csb_vram_unpin(struct amdgpu_device *adev)
-{
-	int r;
-
-	if (!adev->gfx.rlc.clear_state_obj)
-		return;
-
-	r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
-	if (likely(r == 0)) {
-		amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
-		amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
-	}
-}
-
 static void gfx_v10_0_mec_fini(struct amdgpu_device *adev)
 {
 	amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL);
@@ -3780,10 +3747,6 @@ static int gfx_v10_0_hw_init(void *handle)
 	int r;
 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-	r = gfx_v10_0_csb_vram_pin(adev);
-	if (r)
-		return r;
-
 	if (!amdgpu_emu_mode)
 		gfx_v10_0_init_golden_registers(adev);
 
@@ -3871,7 +3834,6 @@ static int gfx_v10_0_hw_fini(void *handle)
 	}
 	gfx_v10_0_cp_enable(adev, false);
 	gfx_v10_0_enable_gui_idle_interrupt(adev, false);
-	gfx_v10_0_csb_vram_unpin(adev);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 4cc2e50..524a7ba 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -1683,39 +1683,6 @@ static int gfx_v9_0_rlc_init(struct amdgpu_device *adev)
 	return 0;
 }
 
-static int gfx_v9_0_csb_vram_pin(struct amdgpu_device *adev)
-{
-	int r;
-
-	r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
-	if (unlikely(r != 0))
-		return r;
-
-	r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
-			AMDGPU_GEM_DOMAIN_VRAM);
-	if (!r)
-		adev->gfx.rlc.clear_state_gpu_addr =
-			amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
-
-	amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
-
-	return r;
-}
-
-static void gfx_v9_0_csb_vram_unpin(struct amdgpu_device *adev)
-{
-	int r;
-
-	if (!adev->gfx.rlc.clear_state_obj)
-		return;
-
-	r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
-	if (likely(r == 0)) {
-		amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
-		amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
-	}
-}
-
 static void gfx_v9_0_mec_fini(struct amdgpu_device *adev)
 {
 	amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL);
@@ -3694,10 +3661,6 @@ static int gfx_v9_0_hw_init(void *handle)
 
 	gfx_v9_0_constants_init(adev);
 
-	r = gfx_v9_0_csb_vram_pin(adev);
-	if (r)
-		return r;
-
 	r = adev->gfx.rlc.funcs->resume(adev);
 	if (r)
 		return r;
@@ -3779,8 +3742,6 @@ static int gfx_v9_0_hw_fini(void *handle)
 	gfx_v9_0_cp_enable(adev, false);
 	adev->gfx.rlc.funcs->stop(adev);
 
-	gfx_v9_0_csb_vram_unpin(adev);
-
 	return 0;
 }
 
-- 
2.7.4

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^ permalink raw reply related	[flat|nested] 41+ messages in thread

* Re: [PATCH 4/5] drm/amdgpu: use CPU to flush vmhub if sched stopped
@ 2019-11-26 12:20         ` Christian König
  0 siblings, 0 replies; 41+ messages in thread
From: Christian König @ 2019-11-26 12:20 UTC (permalink / raw)
  To: Monk Liu, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

Am 26.11.19 um 12:50 schrieb Monk Liu:
> otherwse the flush_gpu_tlb will hang if we unload the
> KMD becuase the schedulers already stopped
>
> Signed-off-by: Monk Liu <Monk.Liu@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> index 321f8a9..4bb4d27 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> @@ -326,7 +326,8 @@ static void gmc_v10_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
>   
>   	if (!adev->mman.buffer_funcs_enabled ||
>   	    !adev->ib_pool_ready ||
> -	    adev->in_gpu_reset) {
> +	    adev->in_gpu_reset ||
> +		ring->sched.ready == false) {

Good catch, but you are somehow messing up the indentation here.

With that fixed the patch is Reviewed-by: Christian König 
<christian.koenig@amd.com>

>   		gmc_v10_0_flush_vm_hub(adev, vmid, AMDGPU_GFXHUB_0, 0);
>   		mutex_unlock(&adev->mman.gtt_window_lock);
>   		return;

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^ permalink raw reply	[flat|nested] 41+ messages in thread

* Re: [PATCH 4/5] drm/amdgpu: use CPU to flush vmhub if sched stopped
@ 2019-11-26 12:20         ` Christian König
  0 siblings, 0 replies; 41+ messages in thread
From: Christian König @ 2019-11-26 12:20 UTC (permalink / raw)
  To: Monk Liu, amd-gfx

Am 26.11.19 um 12:50 schrieb Monk Liu:
> otherwse the flush_gpu_tlb will hang if we unload the
> KMD becuase the schedulers already stopped
>
> Signed-off-by: Monk Liu <Monk.Liu@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> index 321f8a9..4bb4d27 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> @@ -326,7 +326,8 @@ static void gmc_v10_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
>   
>   	if (!adev->mman.buffer_funcs_enabled ||
>   	    !adev->ib_pool_ready ||
> -	    adev->in_gpu_reset) {
> +	    adev->in_gpu_reset ||
> +		ring->sched.ready == false) {

Good catch, but you are somehow messing up the indentation here.

With that fixed the patch is Reviewed-by: Christian König 
<christian.koenig@amd.com>

>   		gmc_v10_0_flush_vm_hub(adev, vmid, AMDGPU_GFXHUB_0, 0);
>   		mutex_unlock(&adev->mman.gtt_window_lock);
>   		return;

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^ permalink raw reply	[flat|nested] 41+ messages in thread

* Re: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload
@ 2019-11-26 13:09         ` Yuan, Xiaojie
  0 siblings, 0 replies; 41+ messages in thread
From: Yuan, Xiaojie @ 2019-11-26 13:09 UTC (permalink / raw)
  To: Liu, Monk; +Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

Hi Monk,

hw_fini() is called in suspend code path as well. I'm wondering how csb can be evicted if it's not unpined before suspend.

BR,
Xiaojie

> On Nov 26, 2019, at 7:50 PM, Monk Liu <Monk.Liu@amd.com> wrote:
> 
> kernel would report a warning on double unpin
> on the csb BO because we unpin it during hw_fini
> but actually we don't need to pin/unpin it during
> hw_init/fini since it is created with kernel pinned
> 
> remove all those useless code for gfx9/10
> 
> Signed-off-by: Monk Liu <Monk.Liu@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c |  1 -
> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c  | 38 --------------------------------
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c   | 39 ---------------------------------
> 3 files changed, 78 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
> index c8793e6..289fada 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
> @@ -145,7 +145,6 @@ int amdgpu_gfx_rlc_init_csb(struct amdgpu_device *adev)
>    dst_ptr = adev->gfx.rlc.cs_ptr;
>    adev->gfx.rlc.funcs->get_csb_buffer(adev, dst_ptr);
>    amdgpu_bo_kunmap(adev->gfx.rlc.clear_state_obj);
> -    amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
>    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> 
>    return 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> index a56cba9..5ee7467 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> @@ -996,39 +996,6 @@ static int gfx_v10_0_rlc_init(struct amdgpu_device *adev)
>    return 0;
> }
> 
> -static int gfx_v10_0_csb_vram_pin(struct amdgpu_device *adev)
> -{
> -    int r;
> -
> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
> -    if (unlikely(r != 0))
> -        return r;
> -
> -    r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
> -            AMDGPU_GEM_DOMAIN_VRAM);
> -    if (!r)
> -        adev->gfx.rlc.clear_state_gpu_addr =
> -            amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
> -
> -    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> -
> -    return r;
> -}
> -
> -static void gfx_v10_0_csb_vram_unpin(struct amdgpu_device *adev)
> -{
> -    int r;
> -
> -    if (!adev->gfx.rlc.clear_state_obj)
> -        return;
> -
> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
> -    if (likely(r == 0)) {
> -        amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
> -        amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> -    }
> -}
> -
> static void gfx_v10_0_mec_fini(struct amdgpu_device *adev)
> {
>    amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL);
> @@ -3780,10 +3747,6 @@ static int gfx_v10_0_hw_init(void *handle)
>    int r;
>    struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> 
> -    r = gfx_v10_0_csb_vram_pin(adev);
> -    if (r)
> -        return r;
> -
>    if (!amdgpu_emu_mode)
>        gfx_v10_0_init_golden_registers(adev);
> 
> @@ -3871,7 +3834,6 @@ static int gfx_v10_0_hw_fini(void *handle)
>    }
>    gfx_v10_0_cp_enable(adev, false);
>    gfx_v10_0_enable_gui_idle_interrupt(adev, false);
> -    gfx_v10_0_csb_vram_unpin(adev);
> 
>    return 0;
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 4cc2e50..524a7ba 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -1683,39 +1683,6 @@ static int gfx_v9_0_rlc_init(struct amdgpu_device *adev)
>    return 0;
> }
> 
> -static int gfx_v9_0_csb_vram_pin(struct amdgpu_device *adev)
> -{
> -    int r;
> -
> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
> -    if (unlikely(r != 0))
> -        return r;
> -
> -    r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
> -            AMDGPU_GEM_DOMAIN_VRAM);
> -    if (!r)
> -        adev->gfx.rlc.clear_state_gpu_addr =
> -            amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
> -
> -    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> -
> -    return r;
> -}
> -
> -static void gfx_v9_0_csb_vram_unpin(struct amdgpu_device *adev)
> -{
> -    int r;
> -
> -    if (!adev->gfx.rlc.clear_state_obj)
> -        return;
> -
> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
> -    if (likely(r == 0)) {
> -        amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
> -        amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> -    }
> -}
> -
> static void gfx_v9_0_mec_fini(struct amdgpu_device *adev)
> {
>    amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL);
> @@ -3694,10 +3661,6 @@ static int gfx_v9_0_hw_init(void *handle)
> 
>    gfx_v9_0_constants_init(adev);
> 
> -    r = gfx_v9_0_csb_vram_pin(adev);
> -    if (r)
> -        return r;
> -
>    r = adev->gfx.rlc.funcs->resume(adev);
>    if (r)
>        return r;
> @@ -3779,8 +3742,6 @@ static int gfx_v9_0_hw_fini(void *handle)
>    gfx_v9_0_cp_enable(adev, false);
>    adev->gfx.rlc.funcs->stop(adev);
> 
> -    gfx_v9_0_csb_vram_unpin(adev);
> -
>    return 0;
> }
> 
> -- 
> 2.7.4
> 
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=02%7C01%7CXiaojie.Yuan%40amd.com%7C65e162e509ea4a90f79308d77266de65%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637103658464512751&amp;sdata=r5fpid5IsP8anzg%2FZIYHn0N8xceBvG7rtRG80%2B7868o%3D&amp;reserved=0
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 41+ messages in thread

* Re: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload
@ 2019-11-26 13:09         ` Yuan, Xiaojie
  0 siblings, 0 replies; 41+ messages in thread
From: Yuan, Xiaojie @ 2019-11-26 13:09 UTC (permalink / raw)
  To: Liu, Monk; +Cc: amd-gfx

Hi Monk,

hw_fini() is called in suspend code path as well. I'm wondering how csb can be evicted if it's not unpined before suspend.

BR,
Xiaojie

> On Nov 26, 2019, at 7:50 PM, Monk Liu <Monk.Liu@amd.com> wrote:
> 
> kernel would report a warning on double unpin
> on the csb BO because we unpin it during hw_fini
> but actually we don't need to pin/unpin it during
> hw_init/fini since it is created with kernel pinned
> 
> remove all those useless code for gfx9/10
> 
> Signed-off-by: Monk Liu <Monk.Liu@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c |  1 -
> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c  | 38 --------------------------------
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c   | 39 ---------------------------------
> 3 files changed, 78 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
> index c8793e6..289fada 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
> @@ -145,7 +145,6 @@ int amdgpu_gfx_rlc_init_csb(struct amdgpu_device *adev)
>    dst_ptr = adev->gfx.rlc.cs_ptr;
>    adev->gfx.rlc.funcs->get_csb_buffer(adev, dst_ptr);
>    amdgpu_bo_kunmap(adev->gfx.rlc.clear_state_obj);
> -    amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
>    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> 
>    return 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> index a56cba9..5ee7467 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> @@ -996,39 +996,6 @@ static int gfx_v10_0_rlc_init(struct amdgpu_device *adev)
>    return 0;
> }
> 
> -static int gfx_v10_0_csb_vram_pin(struct amdgpu_device *adev)
> -{
> -    int r;
> -
> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
> -    if (unlikely(r != 0))
> -        return r;
> -
> -    r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
> -            AMDGPU_GEM_DOMAIN_VRAM);
> -    if (!r)
> -        adev->gfx.rlc.clear_state_gpu_addr =
> -            amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
> -
> -    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> -
> -    return r;
> -}
> -
> -static void gfx_v10_0_csb_vram_unpin(struct amdgpu_device *adev)
> -{
> -    int r;
> -
> -    if (!adev->gfx.rlc.clear_state_obj)
> -        return;
> -
> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
> -    if (likely(r == 0)) {
> -        amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
> -        amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> -    }
> -}
> -
> static void gfx_v10_0_mec_fini(struct amdgpu_device *adev)
> {
>    amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL);
> @@ -3780,10 +3747,6 @@ static int gfx_v10_0_hw_init(void *handle)
>    int r;
>    struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> 
> -    r = gfx_v10_0_csb_vram_pin(adev);
> -    if (r)
> -        return r;
> -
>    if (!amdgpu_emu_mode)
>        gfx_v10_0_init_golden_registers(adev);
> 
> @@ -3871,7 +3834,6 @@ static int gfx_v10_0_hw_fini(void *handle)
>    }
>    gfx_v10_0_cp_enable(adev, false);
>    gfx_v10_0_enable_gui_idle_interrupt(adev, false);
> -    gfx_v10_0_csb_vram_unpin(adev);
> 
>    return 0;
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 4cc2e50..524a7ba 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -1683,39 +1683,6 @@ static int gfx_v9_0_rlc_init(struct amdgpu_device *adev)
>    return 0;
> }
> 
> -static int gfx_v9_0_csb_vram_pin(struct amdgpu_device *adev)
> -{
> -    int r;
> -
> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
> -    if (unlikely(r != 0))
> -        return r;
> -
> -    r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
> -            AMDGPU_GEM_DOMAIN_VRAM);
> -    if (!r)
> -        adev->gfx.rlc.clear_state_gpu_addr =
> -            amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
> -
> -    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> -
> -    return r;
> -}
> -
> -static void gfx_v9_0_csb_vram_unpin(struct amdgpu_device *adev)
> -{
> -    int r;
> -
> -    if (!adev->gfx.rlc.clear_state_obj)
> -        return;
> -
> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
> -    if (likely(r == 0)) {
> -        amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
> -        amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> -    }
> -}
> -
> static void gfx_v9_0_mec_fini(struct amdgpu_device *adev)
> {
>    amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL);
> @@ -3694,10 +3661,6 @@ static int gfx_v9_0_hw_init(void *handle)
> 
>    gfx_v9_0_constants_init(adev);
> 
> -    r = gfx_v9_0_csb_vram_pin(adev);
> -    if (r)
> -        return r;
> -
>    r = adev->gfx.rlc.funcs->resume(adev);
>    if (r)
>        return r;
> @@ -3779,8 +3742,6 @@ static int gfx_v9_0_hw_fini(void *handle)
>    gfx_v9_0_cp_enable(adev, false);
>    adev->gfx.rlc.funcs->stop(adev);
> 
> -    gfx_v9_0_csb_vram_unpin(adev);
> -
>    return 0;
> }
> 
> -- 
> 2.7.4
> 
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=02%7C01%7CXiaojie.Yuan%40amd.com%7C65e162e509ea4a90f79308d77266de65%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637103658464512751&amp;sdata=r5fpid5IsP8anzg%2FZIYHn0N8xceBvG7rtRG80%2B7868o%3D&amp;reserved=0
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 41+ messages in thread

* RE: [PATCH 1/5] drm/amdgpu: fix GFX10 missing CSIB set
@ 2019-11-28  2:21     ` Liu, Monk
  0 siblings, 0 replies; 41+ messages in thread
From: Liu, Monk @ 2019-11-28  2:21 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

Ping 

_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: Monk Liu <Monk.Liu@amd.com> 
Sent: Tuesday, November 26, 2019 7:50 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Monk <Monk.Liu@amd.com>
Subject: [PATCH 1/5] drm/amdgpu: fix GFX10 missing CSIB set

still need to init csb even for SRIOV

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 4d6df35..879c0a1 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -1926,14 +1926,16 @@ static int gfx_v10_0_rlc_resume(struct amdgpu_device *adev)  {
 	int r;
 
-	if (amdgpu_sriov_vf(adev))
-		return 0;
-
 	if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
 		r = gfx_v10_0_wait_for_rlc_autoload_complete(adev);
 		if (r)
 			return r;
 
+		if (amdgpu_sriov_vf(adev)) {
+			gfx_v10_0_init_csb(adev);
+			return 0;
+		}
+
 		r = gfx_v10_0_init_pg(adev);
 		if (r)
 			return r;
--
2.7.4

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 41+ messages in thread

* RE: [PATCH 1/5] drm/amdgpu: fix GFX10 missing CSIB set
@ 2019-11-28  2:21     ` Liu, Monk
  0 siblings, 0 replies; 41+ messages in thread
From: Liu, Monk @ 2019-11-28  2:21 UTC (permalink / raw)
  To: amd-gfx

Ping 

_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: Monk Liu <Monk.Liu@amd.com> 
Sent: Tuesday, November 26, 2019 7:50 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Monk <Monk.Liu@amd.com>
Subject: [PATCH 1/5] drm/amdgpu: fix GFX10 missing CSIB set

still need to init csb even for SRIOV

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 4d6df35..879c0a1 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -1926,14 +1926,16 @@ static int gfx_v10_0_rlc_resume(struct amdgpu_device *adev)  {
 	int r;
 
-	if (amdgpu_sriov_vf(adev))
-		return 0;
-
 	if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
 		r = gfx_v10_0_wait_for_rlc_autoload_complete(adev);
 		if (r)
 			return r;
 
+		if (amdgpu_sriov_vf(adev)) {
+			gfx_v10_0_init_csb(adev);
+			return 0;
+		}
+
 		r = gfx_v10_0_init_pg(adev);
 		if (r)
 			return r;
--
2.7.4

_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 41+ messages in thread

* RE: [PATCH 2/5] drm/amdgpu: skip rlc ucode loading for SRIOV gfx10
@ 2019-11-28  2:21         ` Liu, Monk
  0 siblings, 0 replies; 41+ messages in thread
From: Liu, Monk @ 2019-11-28  2:21 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW



_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: Monk Liu <Monk.Liu@amd.com> 
Sent: Tuesday, November 26, 2019 7:50 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Monk <Monk.Liu@amd.com>
Subject: [PATCH 2/5] drm/amdgpu: skip rlc ucode loading for SRIOV gfx10

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 80 +++++++++++++++++-----------------
 1 file changed, 41 insertions(+), 39 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 879c0a1..a56cba9 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -691,59 +691,61 @@ static int gfx_v10_0_init_microcode(struct amdgpu_device *adev)
 	adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);
 	adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);
 
-	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name);
-	err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev);
-	if (err)
-		goto out;
-	err = amdgpu_ucode_validate(adev->gfx.rlc_fw);
-	rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data;
-	version_major = le16_to_cpu(rlc_hdr->header.header_version_major);
-	version_minor = le16_to_cpu(rlc_hdr->header.header_version_minor);
-	if (version_major == 2 && version_minor == 1)
-		adev->gfx.rlc.is_rlc_v2_1 = true;
-
-	adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version);
-	adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version);
-	adev->gfx.rlc.save_and_restore_offset =
+	if (!amdgpu_sriov_vf(adev)) {
+		snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name);
+		err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev);
+		if (err)
+			goto out;
+		err = amdgpu_ucode_validate(adev->gfx.rlc_fw);
+		rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data;
+		version_major = le16_to_cpu(rlc_hdr->header.header_version_major);
+		version_minor = le16_to_cpu(rlc_hdr->header.header_version_minor);
+		if (version_major == 2 && version_minor == 1)
+			adev->gfx.rlc.is_rlc_v2_1 = true;
+
+		adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version);
+		adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version);
+		adev->gfx.rlc.save_and_restore_offset =
 			le32_to_cpu(rlc_hdr->save_and_restore_offset);
-	adev->gfx.rlc.clear_state_descriptor_offset =
+		adev->gfx.rlc.clear_state_descriptor_offset =
 			le32_to_cpu(rlc_hdr->clear_state_descriptor_offset);
-	adev->gfx.rlc.avail_scratch_ram_locations =
+		adev->gfx.rlc.avail_scratch_ram_locations =
 			le32_to_cpu(rlc_hdr->avail_scratch_ram_locations);
-	adev->gfx.rlc.reg_restore_list_size =
+		adev->gfx.rlc.reg_restore_list_size =
 			le32_to_cpu(rlc_hdr->reg_restore_list_size);
-	adev->gfx.rlc.reg_list_format_start =
+		adev->gfx.rlc.reg_list_format_start =
 			le32_to_cpu(rlc_hdr->reg_list_format_start);
-	adev->gfx.rlc.reg_list_format_separate_start =
+		adev->gfx.rlc.reg_list_format_separate_start =
 			le32_to_cpu(rlc_hdr->reg_list_format_separate_start);
-	adev->gfx.rlc.starting_offsets_start =
+		adev->gfx.rlc.starting_offsets_start =
 			le32_to_cpu(rlc_hdr->starting_offsets_start);
-	adev->gfx.rlc.reg_list_format_size_bytes =
+		adev->gfx.rlc.reg_list_format_size_bytes =
 			le32_to_cpu(rlc_hdr->reg_list_format_size_bytes);
-	adev->gfx.rlc.reg_list_size_bytes =
+		adev->gfx.rlc.reg_list_size_bytes =
 			le32_to_cpu(rlc_hdr->reg_list_size_bytes);
-	adev->gfx.rlc.register_list_format =
+		adev->gfx.rlc.register_list_format =
 			kmalloc(adev->gfx.rlc.reg_list_format_size_bytes +
-				adev->gfx.rlc.reg_list_size_bytes, GFP_KERNEL);
-	if (!adev->gfx.rlc.register_list_format) {
-		err = -ENOMEM;
-		goto out;
-	}
+					adev->gfx.rlc.reg_list_size_bytes, GFP_KERNEL);
+		if (!adev->gfx.rlc.register_list_format) {
+			err = -ENOMEM;
+			goto out;
+		}
 
-	tmp = (unsigned int *)((uintptr_t)rlc_hdr +
-			le32_to_cpu(rlc_hdr->reg_list_format_array_offset_bytes));
-	for (i = 0 ; i < (rlc_hdr->reg_list_format_size_bytes >> 2); i++)
-		adev->gfx.rlc.register_list_format[i] =	le32_to_cpu(tmp[i]);
+		tmp = (unsigned int *)((uintptr_t)rlc_hdr +
+							   le32_to_cpu(rlc_hdr->reg_list_format_array_offset_bytes));
+		for (i = 0 ; i < (rlc_hdr->reg_list_format_size_bytes >> 2); i++)
+			adev->gfx.rlc.register_list_format[i] =	le32_to_cpu(tmp[i]);
 
-	adev->gfx.rlc.register_restore = adev->gfx.rlc.register_list_format + i;
+		adev->gfx.rlc.register_restore = adev->gfx.rlc.register_list_format + i;
 
-	tmp = (unsigned int *)((uintptr_t)rlc_hdr +
-			le32_to_cpu(rlc_hdr->reg_list_array_offset_bytes));
-	for (i = 0 ; i < (rlc_hdr->reg_list_size_bytes >> 2); i++)
-		adev->gfx.rlc.register_restore[i] = le32_to_cpu(tmp[i]);
+		tmp = (unsigned int *)((uintptr_t)rlc_hdr +
+							   le32_to_cpu(rlc_hdr->reg_list_array_offset_bytes));
+		for (i = 0 ; i < (rlc_hdr->reg_list_size_bytes >> 2); i++)
+			adev->gfx.rlc.register_restore[i] = le32_to_cpu(tmp[i]);
 
-	if (adev->gfx.rlc.is_rlc_v2_1)
-		gfx_v10_0_init_rlc_ext_microcode(adev);
+		if (adev->gfx.rlc.is_rlc_v2_1)
+			gfx_v10_0_init_rlc_ext_microcode(adev);
+	}
 
 	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec%s.bin", chip_name, wks);
 	err = request_firmware(&adev->gfx.mec_fw, fw_name, adev->dev);
-- 
2.7.4

_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 41+ messages in thread

* RE: [PATCH 2/5] drm/amdgpu: skip rlc ucode loading for SRIOV gfx10
@ 2019-11-28  2:21         ` Liu, Monk
  0 siblings, 0 replies; 41+ messages in thread
From: Liu, Monk @ 2019-11-28  2:21 UTC (permalink / raw)
  To: amd-gfx



_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: Monk Liu <Monk.Liu@amd.com> 
Sent: Tuesday, November 26, 2019 7:50 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Monk <Monk.Liu@amd.com>
Subject: [PATCH 2/5] drm/amdgpu: skip rlc ucode loading for SRIOV gfx10

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 80 +++++++++++++++++-----------------
 1 file changed, 41 insertions(+), 39 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 879c0a1..a56cba9 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -691,59 +691,61 @@ static int gfx_v10_0_init_microcode(struct amdgpu_device *adev)
 	adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);
 	adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);
 
-	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name);
-	err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev);
-	if (err)
-		goto out;
-	err = amdgpu_ucode_validate(adev->gfx.rlc_fw);
-	rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data;
-	version_major = le16_to_cpu(rlc_hdr->header.header_version_major);
-	version_minor = le16_to_cpu(rlc_hdr->header.header_version_minor);
-	if (version_major == 2 && version_minor == 1)
-		adev->gfx.rlc.is_rlc_v2_1 = true;
-
-	adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version);
-	adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version);
-	adev->gfx.rlc.save_and_restore_offset =
+	if (!amdgpu_sriov_vf(adev)) {
+		snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name);
+		err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev);
+		if (err)
+			goto out;
+		err = amdgpu_ucode_validate(adev->gfx.rlc_fw);
+		rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data;
+		version_major = le16_to_cpu(rlc_hdr->header.header_version_major);
+		version_minor = le16_to_cpu(rlc_hdr->header.header_version_minor);
+		if (version_major == 2 && version_minor == 1)
+			adev->gfx.rlc.is_rlc_v2_1 = true;
+
+		adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version);
+		adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version);
+		adev->gfx.rlc.save_and_restore_offset =
 			le32_to_cpu(rlc_hdr->save_and_restore_offset);
-	adev->gfx.rlc.clear_state_descriptor_offset =
+		adev->gfx.rlc.clear_state_descriptor_offset =
 			le32_to_cpu(rlc_hdr->clear_state_descriptor_offset);
-	adev->gfx.rlc.avail_scratch_ram_locations =
+		adev->gfx.rlc.avail_scratch_ram_locations =
 			le32_to_cpu(rlc_hdr->avail_scratch_ram_locations);
-	adev->gfx.rlc.reg_restore_list_size =
+		adev->gfx.rlc.reg_restore_list_size =
 			le32_to_cpu(rlc_hdr->reg_restore_list_size);
-	adev->gfx.rlc.reg_list_format_start =
+		adev->gfx.rlc.reg_list_format_start =
 			le32_to_cpu(rlc_hdr->reg_list_format_start);
-	adev->gfx.rlc.reg_list_format_separate_start =
+		adev->gfx.rlc.reg_list_format_separate_start =
 			le32_to_cpu(rlc_hdr->reg_list_format_separate_start);
-	adev->gfx.rlc.starting_offsets_start =
+		adev->gfx.rlc.starting_offsets_start =
 			le32_to_cpu(rlc_hdr->starting_offsets_start);
-	adev->gfx.rlc.reg_list_format_size_bytes =
+		adev->gfx.rlc.reg_list_format_size_bytes =
 			le32_to_cpu(rlc_hdr->reg_list_format_size_bytes);
-	adev->gfx.rlc.reg_list_size_bytes =
+		adev->gfx.rlc.reg_list_size_bytes =
 			le32_to_cpu(rlc_hdr->reg_list_size_bytes);
-	adev->gfx.rlc.register_list_format =
+		adev->gfx.rlc.register_list_format =
 			kmalloc(adev->gfx.rlc.reg_list_format_size_bytes +
-				adev->gfx.rlc.reg_list_size_bytes, GFP_KERNEL);
-	if (!adev->gfx.rlc.register_list_format) {
-		err = -ENOMEM;
-		goto out;
-	}
+					adev->gfx.rlc.reg_list_size_bytes, GFP_KERNEL);
+		if (!adev->gfx.rlc.register_list_format) {
+			err = -ENOMEM;
+			goto out;
+		}
 
-	tmp = (unsigned int *)((uintptr_t)rlc_hdr +
-			le32_to_cpu(rlc_hdr->reg_list_format_array_offset_bytes));
-	for (i = 0 ; i < (rlc_hdr->reg_list_format_size_bytes >> 2); i++)
-		adev->gfx.rlc.register_list_format[i] =	le32_to_cpu(tmp[i]);
+		tmp = (unsigned int *)((uintptr_t)rlc_hdr +
+							   le32_to_cpu(rlc_hdr->reg_list_format_array_offset_bytes));
+		for (i = 0 ; i < (rlc_hdr->reg_list_format_size_bytes >> 2); i++)
+			adev->gfx.rlc.register_list_format[i] =	le32_to_cpu(tmp[i]);
 
-	adev->gfx.rlc.register_restore = adev->gfx.rlc.register_list_format + i;
+		adev->gfx.rlc.register_restore = adev->gfx.rlc.register_list_format + i;
 
-	tmp = (unsigned int *)((uintptr_t)rlc_hdr +
-			le32_to_cpu(rlc_hdr->reg_list_array_offset_bytes));
-	for (i = 0 ; i < (rlc_hdr->reg_list_size_bytes >> 2); i++)
-		adev->gfx.rlc.register_restore[i] = le32_to_cpu(tmp[i]);
+		tmp = (unsigned int *)((uintptr_t)rlc_hdr +
+							   le32_to_cpu(rlc_hdr->reg_list_array_offset_bytes));
+		for (i = 0 ; i < (rlc_hdr->reg_list_size_bytes >> 2); i++)
+			adev->gfx.rlc.register_restore[i] = le32_to_cpu(tmp[i]);
 
-	if (adev->gfx.rlc.is_rlc_v2_1)
-		gfx_v10_0_init_rlc_ext_microcode(adev);
+		if (adev->gfx.rlc.is_rlc_v2_1)
+			gfx_v10_0_init_rlc_ext_microcode(adev);
+	}
 
 	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec%s.bin", chip_name, wks);
 	err = request_firmware(&adev->gfx.mec_fw, fw_name, adev->dev);
-- 
2.7.4

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 41+ messages in thread

* RE: [PATCH 3/5] drm/amdgpu: do autoload right after MEC loaded for SRIOV VF
@ 2019-11-28  2:21         ` Liu, Monk
  0 siblings, 0 replies; 41+ messages in thread
From: Liu, Monk @ 2019-11-28  2:21 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

ping
_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: Monk Liu <Monk.Liu@amd.com> 
Sent: Tuesday, November 26, 2019 7:50 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Monk <Monk.Liu@amd.com>
Subject: [PATCH 3/5] drm/amdgpu: do autoload right after MEC loaded for SRIOV VF

since we don't have RLCG ucode loading and no SRlist as well

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 96a6b00..b65fda9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -1490,8 +1490,7 @@ static int psp_np_fw_load(struct psp_context *psp)
 			return ret;
 
 		/* Start rlc autoload after psp recieved all the gfx firmware */
-		if (psp->autoload_supported && ucode->ucode_id ==
-			AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM) {
+		if (psp->autoload_supported && ucode->ucode_id == (amdgpu_sriov_vf(adev) ? AMDGPU_UCODE_ID_CP_MEC2 : AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM)) {
 			ret = psp_rlc_autoload(psp);
 			if (ret) {
 				DRM_ERROR("Failed to start rlc autoload\n");
-- 
2.7.4

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 41+ messages in thread

* RE: [PATCH 3/5] drm/amdgpu: do autoload right after MEC loaded for SRIOV VF
@ 2019-11-28  2:21         ` Liu, Monk
  0 siblings, 0 replies; 41+ messages in thread
From: Liu, Monk @ 2019-11-28  2:21 UTC (permalink / raw)
  To: amd-gfx

ping
_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: Monk Liu <Monk.Liu@amd.com> 
Sent: Tuesday, November 26, 2019 7:50 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Monk <Monk.Liu@amd.com>
Subject: [PATCH 3/5] drm/amdgpu: do autoload right after MEC loaded for SRIOV VF

since we don't have RLCG ucode loading and no SRlist as well

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 96a6b00..b65fda9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -1490,8 +1490,7 @@ static int psp_np_fw_load(struct psp_context *psp)
 			return ret;
 
 		/* Start rlc autoload after psp recieved all the gfx firmware */
-		if (psp->autoload_supported && ucode->ucode_id ==
-			AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM) {
+		if (psp->autoload_supported && ucode->ucode_id == (amdgpu_sriov_vf(adev) ? AMDGPU_UCODE_ID_CP_MEC2 : AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM)) {
 			ret = psp_rlc_autoload(psp);
 			if (ret) {
 				DRM_ERROR("Failed to start rlc autoload\n");
-- 
2.7.4

_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 41+ messages in thread

* RE: [PATCH 4/5] drm/amdgpu: use CPU to flush vmhub if sched stopped
@ 2019-11-28  2:21         ` Liu, Monk
  0 siblings, 0 replies; 41+ messages in thread
From: Liu, Monk @ 2019-11-28  2:21 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

ping

_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: Monk Liu <Monk.Liu@amd.com> 
Sent: Tuesday, November 26, 2019 7:50 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Monk <Monk.Liu@amd.com>
Subject: [PATCH 4/5] drm/amdgpu: use CPU to flush vmhub if sched stopped

otherwse the flush_gpu_tlb will hang if we unload the KMD becuase the schedulers already stopped

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index 321f8a9..4bb4d27 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -326,7 +326,8 @@ static void gmc_v10_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
 
 	if (!adev->mman.buffer_funcs_enabled ||
 	    !adev->ib_pool_ready ||
-	    adev->in_gpu_reset) {
+	    adev->in_gpu_reset ||
+		ring->sched.ready == false) {
 		gmc_v10_0_flush_vm_hub(adev, vmid, AMDGPU_GFXHUB_0, 0);
 		mutex_unlock(&adev->mman.gtt_window_lock);
 		return;
--
2.7.4

_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 41+ messages in thread

* RE: [PATCH 4/5] drm/amdgpu: use CPU to flush vmhub if sched stopped
@ 2019-11-28  2:21         ` Liu, Monk
  0 siblings, 0 replies; 41+ messages in thread
From: Liu, Monk @ 2019-11-28  2:21 UTC (permalink / raw)
  To: amd-gfx

ping

_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: Monk Liu <Monk.Liu@amd.com> 
Sent: Tuesday, November 26, 2019 7:50 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Monk <Monk.Liu@amd.com>
Subject: [PATCH 4/5] drm/amdgpu: use CPU to flush vmhub if sched stopped

otherwse the flush_gpu_tlb will hang if we unload the KMD becuase the schedulers already stopped

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index 321f8a9..4bb4d27 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -326,7 +326,8 @@ static void gmc_v10_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
 
 	if (!adev->mman.buffer_funcs_enabled ||
 	    !adev->ib_pool_ready ||
-	    adev->in_gpu_reset) {
+	    adev->in_gpu_reset ||
+		ring->sched.ready == false) {
 		gmc_v10_0_flush_vm_hub(adev, vmid, AMDGPU_GFXHUB_0, 0);
 		mutex_unlock(&adev->mman.gtt_window_lock);
 		return;
--
2.7.4

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 41+ messages in thread

* RE: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload
@ 2019-11-28  2:21         ` Liu, Monk
  0 siblings, 0 replies; 41+ messages in thread
From: Liu, Monk @ 2019-11-28  2:21 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

ping

_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: Monk Liu <Monk.Liu@amd.com> 
Sent: Tuesday, November 26, 2019 7:50 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Monk <Monk.Liu@amd.com>
Subject: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload

kernel would report a warning on double unpin on the csb BO because we unpin it during hw_fini but actually we don't need to pin/unpin it during hw_init/fini since it is created with kernel pinned

remove all those useless code for gfx9/10

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c |  1 -  drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c  | 38 --------------------------------
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c   | 39 ---------------------------------
 3 files changed, 78 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
index c8793e6..289fada 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
@@ -145,7 +145,6 @@ int amdgpu_gfx_rlc_init_csb(struct amdgpu_device *adev)
 	dst_ptr = adev->gfx.rlc.cs_ptr;
 	adev->gfx.rlc.funcs->get_csb_buffer(adev, dst_ptr);
 	amdgpu_bo_kunmap(adev->gfx.rlc.clear_state_obj);
-	amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
 	amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
 
 	return 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index a56cba9..5ee7467 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -996,39 +996,6 @@ static int gfx_v10_0_rlc_init(struct amdgpu_device *adev)
 	return 0;
 }
 
-static int gfx_v10_0_csb_vram_pin(struct amdgpu_device *adev) -{
-	int r;
-
-	r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
-	if (unlikely(r != 0))
-		return r;
-
-	r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
-			AMDGPU_GEM_DOMAIN_VRAM);
-	if (!r)
-		adev->gfx.rlc.clear_state_gpu_addr =
-			amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
-
-	amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
-
-	return r;
-}
-
-static void gfx_v10_0_csb_vram_unpin(struct amdgpu_device *adev) -{
-	int r;
-
-	if (!adev->gfx.rlc.clear_state_obj)
-		return;
-
-	r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
-	if (likely(r == 0)) {
-		amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
-		amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
-	}
-}
-
 static void gfx_v10_0_mec_fini(struct amdgpu_device *adev)  {
 	amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); @@ -3780,10 +3747,6 @@ static int gfx_v10_0_hw_init(void *handle)
 	int r;
 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-	r = gfx_v10_0_csb_vram_pin(adev);
-	if (r)
-		return r;
-
 	if (!amdgpu_emu_mode)
 		gfx_v10_0_init_golden_registers(adev);
 
@@ -3871,7 +3834,6 @@ static int gfx_v10_0_hw_fini(void *handle)
 	}
 	gfx_v10_0_cp_enable(adev, false);
 	gfx_v10_0_enable_gui_idle_interrupt(adev, false);
-	gfx_v10_0_csb_vram_unpin(adev);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 4cc2e50..524a7ba 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -1683,39 +1683,6 @@ static int gfx_v9_0_rlc_init(struct amdgpu_device *adev)
 	return 0;
 }
 
-static int gfx_v9_0_csb_vram_pin(struct amdgpu_device *adev) -{
-	int r;
-
-	r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
-	if (unlikely(r != 0))
-		return r;
-
-	r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
-			AMDGPU_GEM_DOMAIN_VRAM);
-	if (!r)
-		adev->gfx.rlc.clear_state_gpu_addr =
-			amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
-
-	amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
-
-	return r;
-}
-
-static void gfx_v9_0_csb_vram_unpin(struct amdgpu_device *adev) -{
-	int r;
-
-	if (!adev->gfx.rlc.clear_state_obj)
-		return;
-
-	r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
-	if (likely(r == 0)) {
-		amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
-		amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
-	}
-}
-
 static void gfx_v9_0_mec_fini(struct amdgpu_device *adev)  {
 	amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); @@ -3694,10 +3661,6 @@ static int gfx_v9_0_hw_init(void *handle)
 
 	gfx_v9_0_constants_init(adev);
 
-	r = gfx_v9_0_csb_vram_pin(adev);
-	if (r)
-		return r;
-
 	r = adev->gfx.rlc.funcs->resume(adev);
 	if (r)
 		return r;
@@ -3779,8 +3742,6 @@ static int gfx_v9_0_hw_fini(void *handle)
 	gfx_v9_0_cp_enable(adev, false);
 	adev->gfx.rlc.funcs->stop(adev);
 
-	gfx_v9_0_csb_vram_unpin(adev);
-
 	return 0;
 }
 
--
2.7.4

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^ permalink raw reply related	[flat|nested] 41+ messages in thread

* RE: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload
@ 2019-11-28  2:21         ` Liu, Monk
  0 siblings, 0 replies; 41+ messages in thread
From: Liu, Monk @ 2019-11-28  2:21 UTC (permalink / raw)
  To: amd-gfx

ping

_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: Monk Liu <Monk.Liu@amd.com> 
Sent: Tuesday, November 26, 2019 7:50 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Monk <Monk.Liu@amd.com>
Subject: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload

kernel would report a warning on double unpin on the csb BO because we unpin it during hw_fini but actually we don't need to pin/unpin it during hw_init/fini since it is created with kernel pinned

remove all those useless code for gfx9/10

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c |  1 -  drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c  | 38 --------------------------------
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c   | 39 ---------------------------------
 3 files changed, 78 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
index c8793e6..289fada 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
@@ -145,7 +145,6 @@ int amdgpu_gfx_rlc_init_csb(struct amdgpu_device *adev)
 	dst_ptr = adev->gfx.rlc.cs_ptr;
 	adev->gfx.rlc.funcs->get_csb_buffer(adev, dst_ptr);
 	amdgpu_bo_kunmap(adev->gfx.rlc.clear_state_obj);
-	amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
 	amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
 
 	return 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index a56cba9..5ee7467 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -996,39 +996,6 @@ static int gfx_v10_0_rlc_init(struct amdgpu_device *adev)
 	return 0;
 }
 
-static int gfx_v10_0_csb_vram_pin(struct amdgpu_device *adev) -{
-	int r;
-
-	r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
-	if (unlikely(r != 0))
-		return r;
-
-	r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
-			AMDGPU_GEM_DOMAIN_VRAM);
-	if (!r)
-		adev->gfx.rlc.clear_state_gpu_addr =
-			amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
-
-	amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
-
-	return r;
-}
-
-static void gfx_v10_0_csb_vram_unpin(struct amdgpu_device *adev) -{
-	int r;
-
-	if (!adev->gfx.rlc.clear_state_obj)
-		return;
-
-	r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
-	if (likely(r == 0)) {
-		amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
-		amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
-	}
-}
-
 static void gfx_v10_0_mec_fini(struct amdgpu_device *adev)  {
 	amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); @@ -3780,10 +3747,6 @@ static int gfx_v10_0_hw_init(void *handle)
 	int r;
 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-	r = gfx_v10_0_csb_vram_pin(adev);
-	if (r)
-		return r;
-
 	if (!amdgpu_emu_mode)
 		gfx_v10_0_init_golden_registers(adev);
 
@@ -3871,7 +3834,6 @@ static int gfx_v10_0_hw_fini(void *handle)
 	}
 	gfx_v10_0_cp_enable(adev, false);
 	gfx_v10_0_enable_gui_idle_interrupt(adev, false);
-	gfx_v10_0_csb_vram_unpin(adev);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 4cc2e50..524a7ba 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -1683,39 +1683,6 @@ static int gfx_v9_0_rlc_init(struct amdgpu_device *adev)
 	return 0;
 }
 
-static int gfx_v9_0_csb_vram_pin(struct amdgpu_device *adev) -{
-	int r;
-
-	r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
-	if (unlikely(r != 0))
-		return r;
-
-	r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
-			AMDGPU_GEM_DOMAIN_VRAM);
-	if (!r)
-		adev->gfx.rlc.clear_state_gpu_addr =
-			amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
-
-	amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
-
-	return r;
-}
-
-static void gfx_v9_0_csb_vram_unpin(struct amdgpu_device *adev) -{
-	int r;
-
-	if (!adev->gfx.rlc.clear_state_obj)
-		return;
-
-	r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
-	if (likely(r == 0)) {
-		amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
-		amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
-	}
-}
-
 static void gfx_v9_0_mec_fini(struct amdgpu_device *adev)  {
 	amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); @@ -3694,10 +3661,6 @@ static int gfx_v9_0_hw_init(void *handle)
 
 	gfx_v9_0_constants_init(adev);
 
-	r = gfx_v9_0_csb_vram_pin(adev);
-	if (r)
-		return r;
-
 	r = adev->gfx.rlc.funcs->resume(adev);
 	if (r)
 		return r;
@@ -3779,8 +3742,6 @@ static int gfx_v9_0_hw_fini(void *handle)
 	gfx_v9_0_cp_enable(adev, false);
 	adev->gfx.rlc.funcs->stop(adev);
 
-	gfx_v9_0_csb_vram_unpin(adev);
-
 	return 0;
 }
 
--
2.7.4

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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 41+ messages in thread

* RE: [PATCH 4/5] drm/amdgpu: use CPU to flush vmhub if sched stopped
@ 2019-11-28  2:23             ` Liu, Monk
  0 siblings, 0 replies; 41+ messages in thread
From: Liu, Monk @ 2019-11-28  2:23 UTC (permalink / raw)
  To: Koenig, Christian, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

Christian 

>> Good catch, but you are somehow messing up the indentation here.
I cannot align with the indentation, because my coding style check script (we use it to push code to gerritgit) requires me to use "tab" instead of "space"
It means the current coding style is in fact wrong .... 
_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: Christian König <ckoenig.leichtzumerken@gmail.com> 
Sent: Tuesday, November 26, 2019 8:20 PM
To: Liu, Monk <Monk.Liu@amd.com>; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 4/5] drm/amdgpu: use CPU to flush vmhub if sched stopped

Am 26.11.19 um 12:50 schrieb Monk Liu:
> otherwse the flush_gpu_tlb will hang if we unload the KMD becuase the 
> schedulers already stopped
>
> Signed-off-by: Monk Liu <Monk.Liu@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c 
> b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> index 321f8a9..4bb4d27 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> @@ -326,7 +326,8 @@ static void gmc_v10_0_flush_gpu_tlb(struct 
> amdgpu_device *adev, uint32_t vmid,
>   
>   	if (!adev->mman.buffer_funcs_enabled ||
>   	    !adev->ib_pool_ready ||
> -	    adev->in_gpu_reset) {
> +	    adev->in_gpu_reset ||
> +		ring->sched.ready == false) {

Good catch, but you are somehow messing up the indentation here.

With that fixed the patch is Reviewed-by: Christian König <christian.koenig@amd.com>

>   		gmc_v10_0_flush_vm_hub(adev, vmid, AMDGPU_GFXHUB_0, 0);
>   		mutex_unlock(&adev->mman.gtt_window_lock);
>   		return;

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^ permalink raw reply	[flat|nested] 41+ messages in thread

* RE: [PATCH 4/5] drm/amdgpu: use CPU to flush vmhub if sched stopped
@ 2019-11-28  2:23             ` Liu, Monk
  0 siblings, 0 replies; 41+ messages in thread
From: Liu, Monk @ 2019-11-28  2:23 UTC (permalink / raw)
  To: Koenig, Christian, amd-gfx

Christian 

>> Good catch, but you are somehow messing up the indentation here.
I cannot align with the indentation, because my coding style check script (we use it to push code to gerritgit) requires me to use "tab" instead of "space"
It means the current coding style is in fact wrong .... 
_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: Christian König <ckoenig.leichtzumerken@gmail.com> 
Sent: Tuesday, November 26, 2019 8:20 PM
To: Liu, Monk <Monk.Liu@amd.com>; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 4/5] drm/amdgpu: use CPU to flush vmhub if sched stopped

Am 26.11.19 um 12:50 schrieb Monk Liu:
> otherwse the flush_gpu_tlb will hang if we unload the KMD becuase the 
> schedulers already stopped
>
> Signed-off-by: Monk Liu <Monk.Liu@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c 
> b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> index 321f8a9..4bb4d27 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> @@ -326,7 +326,8 @@ static void gmc_v10_0_flush_gpu_tlb(struct 
> amdgpu_device *adev, uint32_t vmid,
>   
>   	if (!adev->mman.buffer_funcs_enabled ||
>   	    !adev->ib_pool_ready ||
> -	    adev->in_gpu_reset) {
> +	    adev->in_gpu_reset ||
> +		ring->sched.ready == false) {

Good catch, but you are somehow messing up the indentation here.

With that fixed the patch is Reviewed-by: Christian König <christian.koenig@amd.com>

>   		gmc_v10_0_flush_vm_hub(adev, vmid, AMDGPU_GFXHUB_0, 0);
>   		mutex_unlock(&adev->mman.gtt_window_lock);
>   		return;

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^ permalink raw reply	[flat|nested] 41+ messages in thread

* RE: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload
@ 2019-11-28  2:53             ` Liu, Monk
  0 siblings, 0 replies; 41+ messages in thread
From: Liu, Monk @ 2019-11-28  2:53 UTC (permalink / raw)
  To: Yuan, Xiaojie, Deucher, Alexander, Koenig, Christian
  Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

Hi Xiaojie

For SRIOV we don't use suspend so I didn't think to that part, thanks for the remind !
But we still need to fix this call trace issue anyway (our jenkins testing  system consider such call trace as an error )

How about we do "  adev->gfx.rlc.funcs->get_csb_buffer(adev, dst_ptr);" in the hw_init() ? this way
You don't need to evict the CSIB during suspend and the CSIB always will be re-initialized after S3 resume ?

@Deucher, Alexander @Koenig, Christian what's your opinion ? 
_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: Yuan, Xiaojie <Xiaojie.Yuan@amd.com> 
Sent: Tuesday, November 26, 2019 9:10 PM
To: Liu, Monk <Monk.Liu@amd.com>
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload

Hi Monk,

hw_fini() is called in suspend code path as well. I'm wondering how csb can be evicted if it's not unpined before suspend.

BR,
Xiaojie

> On Nov 26, 2019, at 7:50 PM, Monk Liu <Monk.Liu@amd.com> wrote:
> 
> kernel would report a warning on double unpin on the csb BO because we 
> unpin it during hw_fini but actually we don't need to pin/unpin it 
> during hw_init/fini since it is created with kernel pinned
> 
> remove all those useless code for gfx9/10
> 
> Signed-off-by: Monk Liu <Monk.Liu@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c |  1 - 
> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c  | 38 --------------------------------
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c   | 39 ---------------------------------
> 3 files changed, 78 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
> index c8793e6..289fada 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
> @@ -145,7 +145,6 @@ int amdgpu_gfx_rlc_init_csb(struct amdgpu_device *adev)
>    dst_ptr = adev->gfx.rlc.cs_ptr;
>    adev->gfx.rlc.funcs->get_csb_buffer(adev, dst_ptr);
>    amdgpu_bo_kunmap(adev->gfx.rlc.clear_state_obj);
> -    amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
>    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> 
>    return 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 
> b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> index a56cba9..5ee7467 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> @@ -996,39 +996,6 @@ static int gfx_v10_0_rlc_init(struct amdgpu_device *adev)
>    return 0;
> }
> 
> -static int gfx_v10_0_csb_vram_pin(struct amdgpu_device *adev) -{
> -    int r;
> -
> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
> -    if (unlikely(r != 0))
> -        return r;
> -
> -    r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
> -            AMDGPU_GEM_DOMAIN_VRAM);
> -    if (!r)
> -        adev->gfx.rlc.clear_state_gpu_addr =
> -            amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
> -
> -    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> -
> -    return r;
> -}
> -
> -static void gfx_v10_0_csb_vram_unpin(struct amdgpu_device *adev) -{
> -    int r;
> -
> -    if (!adev->gfx.rlc.clear_state_obj)
> -        return;
> -
> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
> -    if (likely(r == 0)) {
> -        amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
> -        amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> -    }
> -}
> -
> static void gfx_v10_0_mec_fini(struct amdgpu_device *adev) {
>    amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); @@ 
> -3780,10 +3747,6 @@ static int gfx_v10_0_hw_init(void *handle)
>    int r;
>    struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> 
> -    r = gfx_v10_0_csb_vram_pin(adev);
> -    if (r)
> -        return r;
> -
>    if (!amdgpu_emu_mode)
>        gfx_v10_0_init_golden_registers(adev);
> 
> @@ -3871,7 +3834,6 @@ static int gfx_v10_0_hw_fini(void *handle)
>    }
>    gfx_v10_0_cp_enable(adev, false);
>    gfx_v10_0_enable_gui_idle_interrupt(adev, false);
> -    gfx_v10_0_csb_vram_unpin(adev);
> 
>    return 0;
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 
> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 4cc2e50..524a7ba 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -1683,39 +1683,6 @@ static int gfx_v9_0_rlc_init(struct amdgpu_device *adev)
>    return 0;
> }
> 
> -static int gfx_v9_0_csb_vram_pin(struct amdgpu_device *adev) -{
> -    int r;
> -
> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
> -    if (unlikely(r != 0))
> -        return r;
> -
> -    r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
> -            AMDGPU_GEM_DOMAIN_VRAM);
> -    if (!r)
> -        adev->gfx.rlc.clear_state_gpu_addr =
> -            amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
> -
> -    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> -
> -    return r;
> -}
> -
> -static void gfx_v9_0_csb_vram_unpin(struct amdgpu_device *adev) -{
> -    int r;
> -
> -    if (!adev->gfx.rlc.clear_state_obj)
> -        return;
> -
> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
> -    if (likely(r == 0)) {
> -        amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
> -        amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> -    }
> -}
> -
> static void gfx_v9_0_mec_fini(struct amdgpu_device *adev) {
>    amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); @@ 
> -3694,10 +3661,6 @@ static int gfx_v9_0_hw_init(void *handle)
> 
>    gfx_v9_0_constants_init(adev);
> 
> -    r = gfx_v9_0_csb_vram_pin(adev);
> -    if (r)
> -        return r;
> -
>    r = adev->gfx.rlc.funcs->resume(adev);
>    if (r)
>        return r;
> @@ -3779,8 +3742,6 @@ static int gfx_v9_0_hw_fini(void *handle)
>    gfx_v9_0_cp_enable(adev, false);
>    adev->gfx.rlc.funcs->stop(adev);
> 
> -    gfx_v9_0_csb_vram_unpin(adev);
> -
>    return 0;
> }
> 
> --
> 2.7.4
> 
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flist
> s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=02%7C01%7CXi
> aojie.Yuan%40amd.com%7C65e162e509ea4a90f79308d77266de65%7C3dd8961fe488
> 4e608e11a82d994e183d%7C0%7C0%7C637103658464512751&amp;sdata=r5fpid5IsP
> 8anzg%2FZIYHn0N8xceBvG7rtRG80%2B7868o%3D&amp;reserved=0
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 41+ messages in thread

* RE: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload
@ 2019-11-28  2:53             ` Liu, Monk
  0 siblings, 0 replies; 41+ messages in thread
From: Liu, Monk @ 2019-11-28  2:53 UTC (permalink / raw)
  To: Yuan, Xiaojie, Deucher, Alexander, Koenig, Christian; +Cc: amd-gfx

Hi Xiaojie

For SRIOV we don't use suspend so I didn't think to that part, thanks for the remind !
But we still need to fix this call trace issue anyway (our jenkins testing  system consider such call trace as an error )

How about we do "  adev->gfx.rlc.funcs->get_csb_buffer(adev, dst_ptr);" in the hw_init() ? this way
You don't need to evict the CSIB during suspend and the CSIB always will be re-initialized after S3 resume ?

@Deucher, Alexander @Koenig, Christian what's your opinion ? 
_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: Yuan, Xiaojie <Xiaojie.Yuan@amd.com> 
Sent: Tuesday, November 26, 2019 9:10 PM
To: Liu, Monk <Monk.Liu@amd.com>
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload

Hi Monk,

hw_fini() is called in suspend code path as well. I'm wondering how csb can be evicted if it's not unpined before suspend.

BR,
Xiaojie

> On Nov 26, 2019, at 7:50 PM, Monk Liu <Monk.Liu@amd.com> wrote:
> 
> kernel would report a warning on double unpin on the csb BO because we 
> unpin it during hw_fini but actually we don't need to pin/unpin it 
> during hw_init/fini since it is created with kernel pinned
> 
> remove all those useless code for gfx9/10
> 
> Signed-off-by: Monk Liu <Monk.Liu@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c |  1 - 
> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c  | 38 --------------------------------
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c   | 39 ---------------------------------
> 3 files changed, 78 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
> index c8793e6..289fada 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
> @@ -145,7 +145,6 @@ int amdgpu_gfx_rlc_init_csb(struct amdgpu_device *adev)
>    dst_ptr = adev->gfx.rlc.cs_ptr;
>    adev->gfx.rlc.funcs->get_csb_buffer(adev, dst_ptr);
>    amdgpu_bo_kunmap(adev->gfx.rlc.clear_state_obj);
> -    amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
>    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> 
>    return 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 
> b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> index a56cba9..5ee7467 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> @@ -996,39 +996,6 @@ static int gfx_v10_0_rlc_init(struct amdgpu_device *adev)
>    return 0;
> }
> 
> -static int gfx_v10_0_csb_vram_pin(struct amdgpu_device *adev) -{
> -    int r;
> -
> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
> -    if (unlikely(r != 0))
> -        return r;
> -
> -    r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
> -            AMDGPU_GEM_DOMAIN_VRAM);
> -    if (!r)
> -        adev->gfx.rlc.clear_state_gpu_addr =
> -            amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
> -
> -    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> -
> -    return r;
> -}
> -
> -static void gfx_v10_0_csb_vram_unpin(struct amdgpu_device *adev) -{
> -    int r;
> -
> -    if (!adev->gfx.rlc.clear_state_obj)
> -        return;
> -
> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
> -    if (likely(r == 0)) {
> -        amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
> -        amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> -    }
> -}
> -
> static void gfx_v10_0_mec_fini(struct amdgpu_device *adev) {
>    amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); @@ 
> -3780,10 +3747,6 @@ static int gfx_v10_0_hw_init(void *handle)
>    int r;
>    struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> 
> -    r = gfx_v10_0_csb_vram_pin(adev);
> -    if (r)
> -        return r;
> -
>    if (!amdgpu_emu_mode)
>        gfx_v10_0_init_golden_registers(adev);
> 
> @@ -3871,7 +3834,6 @@ static int gfx_v10_0_hw_fini(void *handle)
>    }
>    gfx_v10_0_cp_enable(adev, false);
>    gfx_v10_0_enable_gui_idle_interrupt(adev, false);
> -    gfx_v10_0_csb_vram_unpin(adev);
> 
>    return 0;
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 
> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 4cc2e50..524a7ba 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -1683,39 +1683,6 @@ static int gfx_v9_0_rlc_init(struct amdgpu_device *adev)
>    return 0;
> }
> 
> -static int gfx_v9_0_csb_vram_pin(struct amdgpu_device *adev) -{
> -    int r;
> -
> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
> -    if (unlikely(r != 0))
> -        return r;
> -
> -    r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
> -            AMDGPU_GEM_DOMAIN_VRAM);
> -    if (!r)
> -        adev->gfx.rlc.clear_state_gpu_addr =
> -            amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
> -
> -    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> -
> -    return r;
> -}
> -
> -static void gfx_v9_0_csb_vram_unpin(struct amdgpu_device *adev) -{
> -    int r;
> -
> -    if (!adev->gfx.rlc.clear_state_obj)
> -        return;
> -
> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
> -    if (likely(r == 0)) {
> -        amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
> -        amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> -    }
> -}
> -
> static void gfx_v9_0_mec_fini(struct amdgpu_device *adev) {
>    amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); @@ 
> -3694,10 +3661,6 @@ static int gfx_v9_0_hw_init(void *handle)
> 
>    gfx_v9_0_constants_init(adev);
> 
> -    r = gfx_v9_0_csb_vram_pin(adev);
> -    if (r)
> -        return r;
> -
>    r = adev->gfx.rlc.funcs->resume(adev);
>    if (r)
>        return r;
> @@ -3779,8 +3742,6 @@ static int gfx_v9_0_hw_fini(void *handle)
>    gfx_v9_0_cp_enable(adev, false);
>    adev->gfx.rlc.funcs->stop(adev);
> 
> -    gfx_v9_0_csb_vram_unpin(adev);
> -
>    return 0;
> }
> 
> --
> 2.7.4
> 
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flist
> s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=02%7C01%7CXi
> aojie.Yuan%40amd.com%7C65e162e509ea4a90f79308d77266de65%7C3dd8961fe488
> 4e608e11a82d994e183d%7C0%7C0%7C637103658464512751&amp;sdata=r5fpid5IsP
> 8anzg%2FZIYHn0N8xceBvG7rtRG80%2B7868o%3D&amp;reserved=0
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 41+ messages in thread

* Re: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload
@ 2019-11-28  3:32                 ` Yuan, Xiaojie
  0 siblings, 0 replies; 41+ messages in thread
From: Yuan, Xiaojie @ 2019-11-28  3:32 UTC (permalink / raw)
  To: Liu, Monk, Deucher, Alexander, Koenig, Christian, Zhang, Hawking,
	Xiao, Jack
  Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

[AMD Official Use Only - Internal Distribution Only]

Hi Monk,

As long as the content of CSIB won't be changed by CP FW in runtime, I have no objection to 're-initialize after S3 resume'.
I am not quite sure about the actual behavior, let me do an experiment to confirm that and add Hawking / Jack who adds the original CSIB code for comment.

BTW, note that I recently has a patch to re-initialize CSIB in baco sequence, please consider to squash it when making your final fix:

commit c8494497feb0050a66128ca626f3883d6f08d783
Author: Xiaojie Yuan <xiaojie.yuan@amd.com>
Date:   Wed Nov 20 14:02:22 2019 +0800

    drm/amdgpu/gfx10: re-init clear state buffer after gpu reset

    This patch fixes 2nd baco reset failure with gfxoff enabled on navi1x.

    clear state buffer (resides in vram) is corrupted after 1st baco reset,
    upon gfxoff exit, CPF gets garbage header in CSIB and hangs.

    Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
    Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

BR,
Xiaojie

________________________________________
From: Liu, Monk <Monk.Liu@amd.com>
Sent: Thursday, November 28, 2019 10:53 AM
To: Yuan, Xiaojie; Deucher, Alexander; Koenig, Christian
Cc: amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload

Hi Xiaojie

For SRIOV we don't use suspend so I didn't think to that part, thanks for the remind !
But we still need to fix this call trace issue anyway (our jenkins testing  system consider such call trace as an error )

How about we do "  adev->gfx.rlc.funcs->get_csb_buffer(adev, dst_ptr);" in the hw_init() ? this way
You don't need to evict the CSIB during suspend and the CSIB always will be re-initialized after S3 resume ?

@Deucher, Alexander @Koenig, Christian what's your opinion ?
_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: Yuan, Xiaojie <Xiaojie.Yuan@amd.com>
Sent: Tuesday, November 26, 2019 9:10 PM
To: Liu, Monk <Monk.Liu@amd.com>
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload

Hi Monk,

hw_fini() is called in suspend code path as well. I'm wondering how csb can be evicted if it's not unpined before suspend.

BR,
Xiaojie

> On Nov 26, 2019, at 7:50 PM, Monk Liu <Monk.Liu@amd.com> wrote:
>
> kernel would report a warning on double unpin on the csb BO because we
> unpin it during hw_fini but actually we don't need to pin/unpin it
> during hw_init/fini since it is created with kernel pinned
>
> remove all those useless code for gfx9/10
>
> Signed-off-by: Monk Liu <Monk.Liu@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c |  1 -
> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c  | 38 --------------------------------
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c   | 39 ---------------------------------
> 3 files changed, 78 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
> index c8793e6..289fada 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
> @@ -145,7 +145,6 @@ int amdgpu_gfx_rlc_init_csb(struct amdgpu_device *adev)
>    dst_ptr = adev->gfx.rlc.cs_ptr;
>    adev->gfx.rlc.funcs->get_csb_buffer(adev, dst_ptr);
>    amdgpu_bo_kunmap(adev->gfx.rlc.clear_state_obj);
> -    amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
>    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>
>    return 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> index a56cba9..5ee7467 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> @@ -996,39 +996,6 @@ static int gfx_v10_0_rlc_init(struct amdgpu_device *adev)
>    return 0;
> }
>
> -static int gfx_v10_0_csb_vram_pin(struct amdgpu_device *adev) -{
> -    int r;
> -
> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
> -    if (unlikely(r != 0))
> -        return r;
> -
> -    r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
> -            AMDGPU_GEM_DOMAIN_VRAM);
> -    if (!r)
> -        adev->gfx.rlc.clear_state_gpu_addr =
> -            amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
> -
> -    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> -
> -    return r;
> -}
> -
> -static void gfx_v10_0_csb_vram_unpin(struct amdgpu_device *adev) -{
> -    int r;
> -
> -    if (!adev->gfx.rlc.clear_state_obj)
> -        return;
> -
> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
> -    if (likely(r == 0)) {
> -        amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
> -        amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> -    }
> -}
> -
> static void gfx_v10_0_mec_fini(struct amdgpu_device *adev) {
>    amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); @@
> -3780,10 +3747,6 @@ static int gfx_v10_0_hw_init(void *handle)
>    int r;
>    struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>
> -    r = gfx_v10_0_csb_vram_pin(adev);
> -    if (r)
> -        return r;
> -
>    if (!amdgpu_emu_mode)
>        gfx_v10_0_init_golden_registers(adev);
>
> @@ -3871,7 +3834,6 @@ static int gfx_v10_0_hw_fini(void *handle)
>    }
>    gfx_v10_0_cp_enable(adev, false);
>    gfx_v10_0_enable_gui_idle_interrupt(adev, false);
> -    gfx_v10_0_csb_vram_unpin(adev);
>
>    return 0;
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 4cc2e50..524a7ba 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -1683,39 +1683,6 @@ static int gfx_v9_0_rlc_init(struct amdgpu_device *adev)
>    return 0;
> }
>
> -static int gfx_v9_0_csb_vram_pin(struct amdgpu_device *adev) -{
> -    int r;
> -
> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
> -    if (unlikely(r != 0))
> -        return r;
> -
> -    r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
> -            AMDGPU_GEM_DOMAIN_VRAM);
> -    if (!r)
> -        adev->gfx.rlc.clear_state_gpu_addr =
> -            amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
> -
> -    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> -
> -    return r;
> -}
> -
> -static void gfx_v9_0_csb_vram_unpin(struct amdgpu_device *adev) -{
> -    int r;
> -
> -    if (!adev->gfx.rlc.clear_state_obj)
> -        return;
> -
> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
> -    if (likely(r == 0)) {
> -        amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
> -        amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> -    }
> -}
> -
> static void gfx_v9_0_mec_fini(struct amdgpu_device *adev) {
>    amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); @@
> -3694,10 +3661,6 @@ static int gfx_v9_0_hw_init(void *handle)
>
>    gfx_v9_0_constants_init(adev);
>
> -    r = gfx_v9_0_csb_vram_pin(adev);
> -    if (r)
> -        return r;
> -
>    r = adev->gfx.rlc.funcs->resume(adev);
>    if (r)
>        return r;
> @@ -3779,8 +3742,6 @@ static int gfx_v9_0_hw_fini(void *handle)
>    gfx_v9_0_cp_enable(adev, false);
>    adev->gfx.rlc.funcs->stop(adev);
>
> -    gfx_v9_0_csb_vram_unpin(adev);
> -
>    return 0;
> }
>
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flist
> s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=02%7C01%7CXi
> aojie.Yuan%40amd.com%7C65e162e509ea4a90f79308d77266de65%7C3dd8961fe488
> 4e608e11a82d994e183d%7C0%7C0%7C637103658464512751&amp;sdata=r5fpid5IsP
> 8anzg%2FZIYHn0N8xceBvG7rtRG80%2B7868o%3D&amp;reserved=0
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 41+ messages in thread

* Re: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload
@ 2019-11-28  3:32                 ` Yuan, Xiaojie
  0 siblings, 0 replies; 41+ messages in thread
From: Yuan, Xiaojie @ 2019-11-28  3:32 UTC (permalink / raw)
  To: Liu, Monk, Deucher, Alexander, Koenig, Christian, Zhang, Hawking,
	Xiao, Jack
  Cc: amd-gfx

[AMD Official Use Only - Internal Distribution Only]

Hi Monk,

As long as the content of CSIB won't be changed by CP FW in runtime, I have no objection to 're-initialize after S3 resume'.
I am not quite sure about the actual behavior, let me do an experiment to confirm that and add Hawking / Jack who adds the original CSIB code for comment.

BTW, note that I recently has a patch to re-initialize CSIB in baco sequence, please consider to squash it when making your final fix:

commit c8494497feb0050a66128ca626f3883d6f08d783
Author: Xiaojie Yuan <xiaojie.yuan@amd.com>
Date:   Wed Nov 20 14:02:22 2019 +0800

    drm/amdgpu/gfx10: re-init clear state buffer after gpu reset

    This patch fixes 2nd baco reset failure with gfxoff enabled on navi1x.

    clear state buffer (resides in vram) is corrupted after 1st baco reset,
    upon gfxoff exit, CPF gets garbage header in CSIB and hangs.

    Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
    Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

BR,
Xiaojie

________________________________________
From: Liu, Monk <Monk.Liu@amd.com>
Sent: Thursday, November 28, 2019 10:53 AM
To: Yuan, Xiaojie; Deucher, Alexander; Koenig, Christian
Cc: amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload

Hi Xiaojie

For SRIOV we don't use suspend so I didn't think to that part, thanks for the remind !
But we still need to fix this call trace issue anyway (our jenkins testing  system consider such call trace as an error )

How about we do "  adev->gfx.rlc.funcs->get_csb_buffer(adev, dst_ptr);" in the hw_init() ? this way
You don't need to evict the CSIB during suspend and the CSIB always will be re-initialized after S3 resume ?

@Deucher, Alexander @Koenig, Christian what's your opinion ?
_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: Yuan, Xiaojie <Xiaojie.Yuan@amd.com>
Sent: Tuesday, November 26, 2019 9:10 PM
To: Liu, Monk <Monk.Liu@amd.com>
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload

Hi Monk,

hw_fini() is called in suspend code path as well. I'm wondering how csb can be evicted if it's not unpined before suspend.

BR,
Xiaojie

> On Nov 26, 2019, at 7:50 PM, Monk Liu <Monk.Liu@amd.com> wrote:
>
> kernel would report a warning on double unpin on the csb BO because we
> unpin it during hw_fini but actually we don't need to pin/unpin it
> during hw_init/fini since it is created with kernel pinned
>
> remove all those useless code for gfx9/10
>
> Signed-off-by: Monk Liu <Monk.Liu@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c |  1 -
> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c  | 38 --------------------------------
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c   | 39 ---------------------------------
> 3 files changed, 78 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
> index c8793e6..289fada 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
> @@ -145,7 +145,6 @@ int amdgpu_gfx_rlc_init_csb(struct amdgpu_device *adev)
>    dst_ptr = adev->gfx.rlc.cs_ptr;
>    adev->gfx.rlc.funcs->get_csb_buffer(adev, dst_ptr);
>    amdgpu_bo_kunmap(adev->gfx.rlc.clear_state_obj);
> -    amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
>    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>
>    return 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> index a56cba9..5ee7467 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> @@ -996,39 +996,6 @@ static int gfx_v10_0_rlc_init(struct amdgpu_device *adev)
>    return 0;
> }
>
> -static int gfx_v10_0_csb_vram_pin(struct amdgpu_device *adev) -{
> -    int r;
> -
> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
> -    if (unlikely(r != 0))
> -        return r;
> -
> -    r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
> -            AMDGPU_GEM_DOMAIN_VRAM);
> -    if (!r)
> -        adev->gfx.rlc.clear_state_gpu_addr =
> -            amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
> -
> -    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> -
> -    return r;
> -}
> -
> -static void gfx_v10_0_csb_vram_unpin(struct amdgpu_device *adev) -{
> -    int r;
> -
> -    if (!adev->gfx.rlc.clear_state_obj)
> -        return;
> -
> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
> -    if (likely(r == 0)) {
> -        amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
> -        amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> -    }
> -}
> -
> static void gfx_v10_0_mec_fini(struct amdgpu_device *adev) {
>    amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); @@
> -3780,10 +3747,6 @@ static int gfx_v10_0_hw_init(void *handle)
>    int r;
>    struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>
> -    r = gfx_v10_0_csb_vram_pin(adev);
> -    if (r)
> -        return r;
> -
>    if (!amdgpu_emu_mode)
>        gfx_v10_0_init_golden_registers(adev);
>
> @@ -3871,7 +3834,6 @@ static int gfx_v10_0_hw_fini(void *handle)
>    }
>    gfx_v10_0_cp_enable(adev, false);
>    gfx_v10_0_enable_gui_idle_interrupt(adev, false);
> -    gfx_v10_0_csb_vram_unpin(adev);
>
>    return 0;
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 4cc2e50..524a7ba 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -1683,39 +1683,6 @@ static int gfx_v9_0_rlc_init(struct amdgpu_device *adev)
>    return 0;
> }
>
> -static int gfx_v9_0_csb_vram_pin(struct amdgpu_device *adev) -{
> -    int r;
> -
> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
> -    if (unlikely(r != 0))
> -        return r;
> -
> -    r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
> -            AMDGPU_GEM_DOMAIN_VRAM);
> -    if (!r)
> -        adev->gfx.rlc.clear_state_gpu_addr =
> -            amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
> -
> -    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> -
> -    return r;
> -}
> -
> -static void gfx_v9_0_csb_vram_unpin(struct amdgpu_device *adev) -{
> -    int r;
> -
> -    if (!adev->gfx.rlc.clear_state_obj)
> -        return;
> -
> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
> -    if (likely(r == 0)) {
> -        amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
> -        amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> -    }
> -}
> -
> static void gfx_v9_0_mec_fini(struct amdgpu_device *adev) {
>    amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); @@
> -3694,10 +3661,6 @@ static int gfx_v9_0_hw_init(void *handle)
>
>    gfx_v9_0_constants_init(adev);
>
> -    r = gfx_v9_0_csb_vram_pin(adev);
> -    if (r)
> -        return r;
> -
>    r = adev->gfx.rlc.funcs->resume(adev);
>    if (r)
>        return r;
> @@ -3779,8 +3742,6 @@ static int gfx_v9_0_hw_fini(void *handle)
>    gfx_v9_0_cp_enable(adev, false);
>    adev->gfx.rlc.funcs->stop(adev);
>
> -    gfx_v9_0_csb_vram_unpin(adev);
> -
>    return 0;
> }
>
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flist
> s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=02%7C01%7CXi
> aojie.Yuan%40amd.com%7C65e162e509ea4a90f79308d77266de65%7C3dd8961fe488
> 4e608e11a82d994e183d%7C0%7C0%7C637103658464512751&amp;sdata=r5fpid5IsP
> 8anzg%2FZIYHn0N8xceBvG7rtRG80%2B7868o%3D&amp;reserved=0
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 41+ messages in thread

* Re: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload
@ 2019-11-28 11:50                 ` Christian König
  0 siblings, 0 replies; 41+ messages in thread
From: Christian König @ 2019-11-28 11:50 UTC (permalink / raw)
  To: Liu, Monk, Yuan, Xiaojie, Deucher, Alexander, Koenig, Christian
  Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

Hi Monk,

if the content of the CSIB is constant then it is certainly better to 
just re-initialize it.

This also prevents from corruption because of VRAM lost.

Christian.

Am 28.11.19 um 03:53 schrieb Liu, Monk:
> Hi Xiaojie
>
> For SRIOV we don't use suspend so I didn't think to that part, thanks for the remind !
> But we still need to fix this call trace issue anyway (our jenkins testing  system consider such call trace as an error )
>
> How about we do "  adev->gfx.rlc.funcs->get_csb_buffer(adev, dst_ptr);" in the hw_init() ? this way
> You don't need to evict the CSIB during suspend and the CSIB always will be re-initialized after S3 resume ?
>
> @Deucher, Alexander @Koenig, Christian what's your opinion ?
> _____________________________________
> Monk Liu|GPU Virtualization Team |AMD
>
>
> -----Original Message-----
> From: Yuan, Xiaojie <Xiaojie.Yuan@amd.com>
> Sent: Tuesday, November 26, 2019 9:10 PM
> To: Liu, Monk <Monk.Liu@amd.com>
> Cc: amd-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload
>
> Hi Monk,
>
> hw_fini() is called in suspend code path as well. I'm wondering how csb can be evicted if it's not unpined before suspend.
>
> BR,
> Xiaojie
>
>> On Nov 26, 2019, at 7:50 PM, Monk Liu <Monk.Liu@amd.com> wrote:
>>
>> kernel would report a warning on double unpin on the csb BO because we
>> unpin it during hw_fini but actually we don't need to pin/unpin it
>> during hw_init/fini since it is created with kernel pinned
>>
>> remove all those useless code for gfx9/10
>>
>> Signed-off-by: Monk Liu <Monk.Liu@amd.com>
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c |  1 -
>> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c  | 38 --------------------------------
>> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c   | 39 ---------------------------------
>> 3 files changed, 78 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
>> index c8793e6..289fada 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
>> @@ -145,7 +145,6 @@ int amdgpu_gfx_rlc_init_csb(struct amdgpu_device *adev)
>>     dst_ptr = adev->gfx.rlc.cs_ptr;
>>     adev->gfx.rlc.funcs->get_csb_buffer(adev, dst_ptr);
>>     amdgpu_bo_kunmap(adev->gfx.rlc.clear_state_obj);
>> -    amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
>>     amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>>
>>     return 0;
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
>> b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
>> index a56cba9..5ee7467 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
>> @@ -996,39 +996,6 @@ static int gfx_v10_0_rlc_init(struct amdgpu_device *adev)
>>     return 0;
>> }
>>
>> -static int gfx_v10_0_csb_vram_pin(struct amdgpu_device *adev) -{
>> -    int r;
>> -
>> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
>> -    if (unlikely(r != 0))
>> -        return r;
>> -
>> -    r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
>> -            AMDGPU_GEM_DOMAIN_VRAM);
>> -    if (!r)
>> -        adev->gfx.rlc.clear_state_gpu_addr =
>> -            amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
>> -
>> -    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>> -
>> -    return r;
>> -}
>> -
>> -static void gfx_v10_0_csb_vram_unpin(struct amdgpu_device *adev) -{
>> -    int r;
>> -
>> -    if (!adev->gfx.rlc.clear_state_obj)
>> -        return;
>> -
>> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
>> -    if (likely(r == 0)) {
>> -        amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
>> -        amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>> -    }
>> -}
>> -
>> static void gfx_v10_0_mec_fini(struct amdgpu_device *adev) {
>>     amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); @@
>> -3780,10 +3747,6 @@ static int gfx_v10_0_hw_init(void *handle)
>>     int r;
>>     struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>>
>> -    r = gfx_v10_0_csb_vram_pin(adev);
>> -    if (r)
>> -        return r;
>> -
>>     if (!amdgpu_emu_mode)
>>         gfx_v10_0_init_golden_registers(adev);
>>
>> @@ -3871,7 +3834,6 @@ static int gfx_v10_0_hw_fini(void *handle)
>>     }
>>     gfx_v10_0_cp_enable(adev, false);
>>     gfx_v10_0_enable_gui_idle_interrupt(adev, false);
>> -    gfx_v10_0_csb_vram_unpin(adev);
>>
>>     return 0;
>> }
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>> index 4cc2e50..524a7ba 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>> @@ -1683,39 +1683,6 @@ static int gfx_v9_0_rlc_init(struct amdgpu_device *adev)
>>     return 0;
>> }
>>
>> -static int gfx_v9_0_csb_vram_pin(struct amdgpu_device *adev) -{
>> -    int r;
>> -
>> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
>> -    if (unlikely(r != 0))
>> -        return r;
>> -
>> -    r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
>> -            AMDGPU_GEM_DOMAIN_VRAM);
>> -    if (!r)
>> -        adev->gfx.rlc.clear_state_gpu_addr =
>> -            amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
>> -
>> -    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>> -
>> -    return r;
>> -}
>> -
>> -static void gfx_v9_0_csb_vram_unpin(struct amdgpu_device *adev) -{
>> -    int r;
>> -
>> -    if (!adev->gfx.rlc.clear_state_obj)
>> -        return;
>> -
>> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
>> -    if (likely(r == 0)) {
>> -        amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
>> -        amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>> -    }
>> -}
>> -
>> static void gfx_v9_0_mec_fini(struct amdgpu_device *adev) {
>>     amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); @@
>> -3694,10 +3661,6 @@ static int gfx_v9_0_hw_init(void *handle)
>>
>>     gfx_v9_0_constants_init(adev);
>>
>> -    r = gfx_v9_0_csb_vram_pin(adev);
>> -    if (r)
>> -        return r;
>> -
>>     r = adev->gfx.rlc.funcs->resume(adev);
>>     if (r)
>>         return r;
>> @@ -3779,8 +3742,6 @@ static int gfx_v9_0_hw_fini(void *handle)
>>     gfx_v9_0_cp_enable(adev, false);
>>     adev->gfx.rlc.funcs->stop(adev);
>>
>> -    gfx_v9_0_csb_vram_unpin(adev);
>> -
>>     return 0;
>> }
>>
>> --
>> 2.7.4
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flist
>> s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=02%7C01%7CXi
>> aojie.Yuan%40amd.com%7C65e162e509ea4a90f79308d77266de65%7C3dd8961fe488
>> 4e608e11a82d994e183d%7C0%7C0%7C637103658464512751&amp;sdata=r5fpid5IsP
>> 8anzg%2FZIYHn0N8xceBvG7rtRG80%2B7868o%3D&amp;reserved=0
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 41+ messages in thread

* Re: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload
@ 2019-11-28 11:50                 ` Christian König
  0 siblings, 0 replies; 41+ messages in thread
From: Christian König @ 2019-11-28 11:50 UTC (permalink / raw)
  To: Liu, Monk, Yuan, Xiaojie, Deucher, Alexander, Koenig, Christian; +Cc: amd-gfx

Hi Monk,

if the content of the CSIB is constant then it is certainly better to 
just re-initialize it.

This also prevents from corruption because of VRAM lost.

Christian.

Am 28.11.19 um 03:53 schrieb Liu, Monk:
> Hi Xiaojie
>
> For SRIOV we don't use suspend so I didn't think to that part, thanks for the remind !
> But we still need to fix this call trace issue anyway (our jenkins testing  system consider such call trace as an error )
>
> How about we do "  adev->gfx.rlc.funcs->get_csb_buffer(adev, dst_ptr);" in the hw_init() ? this way
> You don't need to evict the CSIB during suspend and the CSIB always will be re-initialized after S3 resume ?
>
> @Deucher, Alexander @Koenig, Christian what's your opinion ?
> _____________________________________
> Monk Liu|GPU Virtualization Team |AMD
>
>
> -----Original Message-----
> From: Yuan, Xiaojie <Xiaojie.Yuan@amd.com>
> Sent: Tuesday, November 26, 2019 9:10 PM
> To: Liu, Monk <Monk.Liu@amd.com>
> Cc: amd-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload
>
> Hi Monk,
>
> hw_fini() is called in suspend code path as well. I'm wondering how csb can be evicted if it's not unpined before suspend.
>
> BR,
> Xiaojie
>
>> On Nov 26, 2019, at 7:50 PM, Monk Liu <Monk.Liu@amd.com> wrote:
>>
>> kernel would report a warning on double unpin on the csb BO because we
>> unpin it during hw_fini but actually we don't need to pin/unpin it
>> during hw_init/fini since it is created with kernel pinned
>>
>> remove all those useless code for gfx9/10
>>
>> Signed-off-by: Monk Liu <Monk.Liu@amd.com>
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c |  1 -
>> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c  | 38 --------------------------------
>> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c   | 39 ---------------------------------
>> 3 files changed, 78 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
>> index c8793e6..289fada 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
>> @@ -145,7 +145,6 @@ int amdgpu_gfx_rlc_init_csb(struct amdgpu_device *adev)
>>     dst_ptr = adev->gfx.rlc.cs_ptr;
>>     adev->gfx.rlc.funcs->get_csb_buffer(adev, dst_ptr);
>>     amdgpu_bo_kunmap(adev->gfx.rlc.clear_state_obj);
>> -    amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
>>     amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>>
>>     return 0;
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
>> b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
>> index a56cba9..5ee7467 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
>> @@ -996,39 +996,6 @@ static int gfx_v10_0_rlc_init(struct amdgpu_device *adev)
>>     return 0;
>> }
>>
>> -static int gfx_v10_0_csb_vram_pin(struct amdgpu_device *adev) -{
>> -    int r;
>> -
>> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
>> -    if (unlikely(r != 0))
>> -        return r;
>> -
>> -    r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
>> -            AMDGPU_GEM_DOMAIN_VRAM);
>> -    if (!r)
>> -        adev->gfx.rlc.clear_state_gpu_addr =
>> -            amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
>> -
>> -    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>> -
>> -    return r;
>> -}
>> -
>> -static void gfx_v10_0_csb_vram_unpin(struct amdgpu_device *adev) -{
>> -    int r;
>> -
>> -    if (!adev->gfx.rlc.clear_state_obj)
>> -        return;
>> -
>> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
>> -    if (likely(r == 0)) {
>> -        amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
>> -        amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>> -    }
>> -}
>> -
>> static void gfx_v10_0_mec_fini(struct amdgpu_device *adev) {
>>     amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); @@
>> -3780,10 +3747,6 @@ static int gfx_v10_0_hw_init(void *handle)
>>     int r;
>>     struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>>
>> -    r = gfx_v10_0_csb_vram_pin(adev);
>> -    if (r)
>> -        return r;
>> -
>>     if (!amdgpu_emu_mode)
>>         gfx_v10_0_init_golden_registers(adev);
>>
>> @@ -3871,7 +3834,6 @@ static int gfx_v10_0_hw_fini(void *handle)
>>     }
>>     gfx_v10_0_cp_enable(adev, false);
>>     gfx_v10_0_enable_gui_idle_interrupt(adev, false);
>> -    gfx_v10_0_csb_vram_unpin(adev);
>>
>>     return 0;
>> }
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>> index 4cc2e50..524a7ba 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>> @@ -1683,39 +1683,6 @@ static int gfx_v9_0_rlc_init(struct amdgpu_device *adev)
>>     return 0;
>> }
>>
>> -static int gfx_v9_0_csb_vram_pin(struct amdgpu_device *adev) -{
>> -    int r;
>> -
>> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
>> -    if (unlikely(r != 0))
>> -        return r;
>> -
>> -    r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
>> -            AMDGPU_GEM_DOMAIN_VRAM);
>> -    if (!r)
>> -        adev->gfx.rlc.clear_state_gpu_addr =
>> -            amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
>> -
>> -    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>> -
>> -    return r;
>> -}
>> -
>> -static void gfx_v9_0_csb_vram_unpin(struct amdgpu_device *adev) -{
>> -    int r;
>> -
>> -    if (!adev->gfx.rlc.clear_state_obj)
>> -        return;
>> -
>> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
>> -    if (likely(r == 0)) {
>> -        amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
>> -        amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>> -    }
>> -}
>> -
>> static void gfx_v9_0_mec_fini(struct amdgpu_device *adev) {
>>     amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); @@
>> -3694,10 +3661,6 @@ static int gfx_v9_0_hw_init(void *handle)
>>
>>     gfx_v9_0_constants_init(adev);
>>
>> -    r = gfx_v9_0_csb_vram_pin(adev);
>> -    if (r)
>> -        return r;
>> -
>>     r = adev->gfx.rlc.funcs->resume(adev);
>>     if (r)
>>         return r;
>> @@ -3779,8 +3742,6 @@ static int gfx_v9_0_hw_fini(void *handle)
>>     gfx_v9_0_cp_enable(adev, false);
>>     adev->gfx.rlc.funcs->stop(adev);
>>
>> -    gfx_v9_0_csb_vram_unpin(adev);
>> -
>>     return 0;
>> }
>>
>> --
>> 2.7.4
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flist
>> s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=02%7C01%7CXi
>> aojie.Yuan%40amd.com%7C65e162e509ea4a90f79308d77266de65%7C3dd8961fe488
>> 4e608e11a82d994e183d%7C0%7C0%7C637103658464512751&amp;sdata=r5fpid5IsP
>> 8anzg%2FZIYHn0N8xceBvG7rtRG80%2B7868o%3D&amp;reserved=0
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx

_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 41+ messages in thread

* RE: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload
@ 2019-11-29  1:58                     ` Liu, Monk
  0 siblings, 0 replies; 41+ messages in thread
From: Liu, Monk @ 2019-11-29  1:58 UTC (permalink / raw)
  To: Koenig, Christian, Yuan, Xiaojie, Deucher, Alexander
  Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

The content of CSIB is always static, I submitted a patch to use the re-init and get rid of pin/unpin CSIB in hw_ini/fini,  (my purpose is to fix the double unpin warning during unload )
_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: Christian König <ckoenig.leichtzumerken@gmail.com> 
Sent: Thursday, November 28, 2019 7:51 PM
To: Liu, Monk <Monk.Liu@amd.com>; Yuan, Xiaojie <Xiaojie.Yuan@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload

Hi Monk,

if the content of the CSIB is constant then it is certainly better to just re-initialize it.

This also prevents from corruption because of VRAM lost.

Christian.

Am 28.11.19 um 03:53 schrieb Liu, Monk:
> Hi Xiaojie
>
> For SRIOV we don't use suspend so I didn't think to that part, thanks for the remind !
> But we still need to fix this call trace issue anyway (our jenkins 
> testing  system consider such call trace as an error )
>
> How about we do "  adev->gfx.rlc.funcs->get_csb_buffer(adev, 
> dst_ptr);" in the hw_init() ? this way You don't need to evict the CSIB during suspend and the CSIB always will be re-initialized after S3 resume ?
>
> @Deucher, Alexander @Koenig, Christian what's your opinion ?
> _____________________________________
> Monk Liu|GPU Virtualization Team |AMD
>
>
> -----Original Message-----
> From: Yuan, Xiaojie <Xiaojie.Yuan@amd.com>
> Sent: Tuesday, November 26, 2019 9:10 PM
> To: Liu, Monk <Monk.Liu@amd.com>
> Cc: amd-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload
>
> Hi Monk,
>
> hw_fini() is called in suspend code path as well. I'm wondering how csb can be evicted if it's not unpined before suspend.
>
> BR,
> Xiaojie
>
>> On Nov 26, 2019, at 7:50 PM, Monk Liu <Monk.Liu@amd.com> wrote:
>>
>> kernel would report a warning on double unpin on the csb BO because 
>> we unpin it during hw_fini but actually we don't need to pin/unpin it 
>> during hw_init/fini since it is created with kernel pinned
>>
>> remove all those useless code for gfx9/10
>>
>> Signed-off-by: Monk Liu <Monk.Liu@amd.com>
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c |  1 - 
>> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c  | 38 --------------------------------
>> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c   | 39 ---------------------------------
>> 3 files changed, 78 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
>> index c8793e6..289fada 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
>> @@ -145,7 +145,6 @@ int amdgpu_gfx_rlc_init_csb(struct amdgpu_device *adev)
>>     dst_ptr = adev->gfx.rlc.cs_ptr;
>>     adev->gfx.rlc.funcs->get_csb_buffer(adev, dst_ptr);
>>     amdgpu_bo_kunmap(adev->gfx.rlc.clear_state_obj);
>> -    amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
>>     amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>>
>>     return 0;
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
>> b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
>> index a56cba9..5ee7467 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
>> @@ -996,39 +996,6 @@ static int gfx_v10_0_rlc_init(struct amdgpu_device *adev)
>>     return 0;
>> }
>>
>> -static int gfx_v10_0_csb_vram_pin(struct amdgpu_device *adev) -{
>> -    int r;
>> -
>> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
>> -    if (unlikely(r != 0))
>> -        return r;
>> -
>> -    r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
>> -            AMDGPU_GEM_DOMAIN_VRAM);
>> -    if (!r)
>> -        adev->gfx.rlc.clear_state_gpu_addr =
>> -            amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
>> -
>> -    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>> -
>> -    return r;
>> -}
>> -
>> -static void gfx_v10_0_csb_vram_unpin(struct amdgpu_device *adev) -{
>> -    int r;
>> -
>> -    if (!adev->gfx.rlc.clear_state_obj)
>> -        return;
>> -
>> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
>> -    if (likely(r == 0)) {
>> -        amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
>> -        amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>> -    }
>> -}
>> -
>> static void gfx_v10_0_mec_fini(struct amdgpu_device *adev) {
>>     amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); @@
>> -3780,10 +3747,6 @@ static int gfx_v10_0_hw_init(void *handle)
>>     int r;
>>     struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>>
>> -    r = gfx_v10_0_csb_vram_pin(adev);
>> -    if (r)
>> -        return r;
>> -
>>     if (!amdgpu_emu_mode)
>>         gfx_v10_0_init_golden_registers(adev);
>>
>> @@ -3871,7 +3834,6 @@ static int gfx_v10_0_hw_fini(void *handle)
>>     }
>>     gfx_v10_0_cp_enable(adev, false);
>>     gfx_v10_0_enable_gui_idle_interrupt(adev, false);
>> -    gfx_v10_0_csb_vram_unpin(adev);
>>
>>     return 0;
>> }
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>> index 4cc2e50..524a7ba 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>> @@ -1683,39 +1683,6 @@ static int gfx_v9_0_rlc_init(struct amdgpu_device *adev)
>>     return 0;
>> }
>>
>> -static int gfx_v9_0_csb_vram_pin(struct amdgpu_device *adev) -{
>> -    int r;
>> -
>> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
>> -    if (unlikely(r != 0))
>> -        return r;
>> -
>> -    r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
>> -            AMDGPU_GEM_DOMAIN_VRAM);
>> -    if (!r)
>> -        adev->gfx.rlc.clear_state_gpu_addr =
>> -            amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
>> -
>> -    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>> -
>> -    return r;
>> -}
>> -
>> -static void gfx_v9_0_csb_vram_unpin(struct amdgpu_device *adev) -{
>> -    int r;
>> -
>> -    if (!adev->gfx.rlc.clear_state_obj)
>> -        return;
>> -
>> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
>> -    if (likely(r == 0)) {
>> -        amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
>> -        amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>> -    }
>> -}
>> -
>> static void gfx_v9_0_mec_fini(struct amdgpu_device *adev) {
>>     amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); @@
>> -3694,10 +3661,6 @@ static int gfx_v9_0_hw_init(void *handle)
>>
>>     gfx_v9_0_constants_init(adev);
>>
>> -    r = gfx_v9_0_csb_vram_pin(adev);
>> -    if (r)
>> -        return r;
>> -
>>     r = adev->gfx.rlc.funcs->resume(adev);
>>     if (r)
>>         return r;
>> @@ -3779,8 +3742,6 @@ static int gfx_v9_0_hw_fini(void *handle)
>>     gfx_v9_0_cp_enable(adev, false);
>>     adev->gfx.rlc.funcs->stop(adev);
>>
>> -    gfx_v9_0_csb_vram_unpin(adev);
>> -
>>     return 0;
>> }
>>
>> --
>> 2.7.4
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flis
>> t 
>> s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=02%7C01%7CX
>> i
>> aojie.Yuan%40amd.com%7C65e162e509ea4a90f79308d77266de65%7C3dd8961fe48
>> 8 
>> 4e608e11a82d994e183d%7C0%7C0%7C637103658464512751&amp;sdata=r5fpid5Is
>> P
>> 8anzg%2FZIYHn0N8xceBvG7rtRG80%2B7868o%3D&amp;reserved=0
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flist
> s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=02%7C01%7CMo
> nk.Liu%40amd.com%7Ccadef01b84ab45f90f1908d773f932cc%7C3dd8961fe4884e60
> 8e11a82d994e183d%7C0%7C0%7C637105386456299680&amp;sdata=hYsvNtzUb%2BTb
> iANKAx2x9dmYW1ikC66r%2B6Hbk3244PE%3D&amp;reserved=0

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https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 41+ messages in thread

* RE: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload
@ 2019-11-29  1:58                     ` Liu, Monk
  0 siblings, 0 replies; 41+ messages in thread
From: Liu, Monk @ 2019-11-29  1:58 UTC (permalink / raw)
  To: Koenig, Christian, Yuan, Xiaojie, Deucher, Alexander; +Cc: amd-gfx

The content of CSIB is always static, I submitted a patch to use the re-init and get rid of pin/unpin CSIB in hw_ini/fini,  (my purpose is to fix the double unpin warning during unload )
_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: Christian König <ckoenig.leichtzumerken@gmail.com> 
Sent: Thursday, November 28, 2019 7:51 PM
To: Liu, Monk <Monk.Liu@amd.com>; Yuan, Xiaojie <Xiaojie.Yuan@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload

Hi Monk,

if the content of the CSIB is constant then it is certainly better to just re-initialize it.

This also prevents from corruption because of VRAM lost.

Christian.

Am 28.11.19 um 03:53 schrieb Liu, Monk:
> Hi Xiaojie
>
> For SRIOV we don't use suspend so I didn't think to that part, thanks for the remind !
> But we still need to fix this call trace issue anyway (our jenkins 
> testing  system consider such call trace as an error )
>
> How about we do "  adev->gfx.rlc.funcs->get_csb_buffer(adev, 
> dst_ptr);" in the hw_init() ? this way You don't need to evict the CSIB during suspend and the CSIB always will be re-initialized after S3 resume ?
>
> @Deucher, Alexander @Koenig, Christian what's your opinion ?
> _____________________________________
> Monk Liu|GPU Virtualization Team |AMD
>
>
> -----Original Message-----
> From: Yuan, Xiaojie <Xiaojie.Yuan@amd.com>
> Sent: Tuesday, November 26, 2019 9:10 PM
> To: Liu, Monk <Monk.Liu@amd.com>
> Cc: amd-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload
>
> Hi Monk,
>
> hw_fini() is called in suspend code path as well. I'm wondering how csb can be evicted if it's not unpined before suspend.
>
> BR,
> Xiaojie
>
>> On Nov 26, 2019, at 7:50 PM, Monk Liu <Monk.Liu@amd.com> wrote:
>>
>> kernel would report a warning on double unpin on the csb BO because 
>> we unpin it during hw_fini but actually we don't need to pin/unpin it 
>> during hw_init/fini since it is created with kernel pinned
>>
>> remove all those useless code for gfx9/10
>>
>> Signed-off-by: Monk Liu <Monk.Liu@amd.com>
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c |  1 - 
>> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c  | 38 --------------------------------
>> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c   | 39 ---------------------------------
>> 3 files changed, 78 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
>> index c8793e6..289fada 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
>> @@ -145,7 +145,6 @@ int amdgpu_gfx_rlc_init_csb(struct amdgpu_device *adev)
>>     dst_ptr = adev->gfx.rlc.cs_ptr;
>>     adev->gfx.rlc.funcs->get_csb_buffer(adev, dst_ptr);
>>     amdgpu_bo_kunmap(adev->gfx.rlc.clear_state_obj);
>> -    amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
>>     amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>>
>>     return 0;
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
>> b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
>> index a56cba9..5ee7467 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
>> @@ -996,39 +996,6 @@ static int gfx_v10_0_rlc_init(struct amdgpu_device *adev)
>>     return 0;
>> }
>>
>> -static int gfx_v10_0_csb_vram_pin(struct amdgpu_device *adev) -{
>> -    int r;
>> -
>> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
>> -    if (unlikely(r != 0))
>> -        return r;
>> -
>> -    r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
>> -            AMDGPU_GEM_DOMAIN_VRAM);
>> -    if (!r)
>> -        adev->gfx.rlc.clear_state_gpu_addr =
>> -            amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
>> -
>> -    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>> -
>> -    return r;
>> -}
>> -
>> -static void gfx_v10_0_csb_vram_unpin(struct amdgpu_device *adev) -{
>> -    int r;
>> -
>> -    if (!adev->gfx.rlc.clear_state_obj)
>> -        return;
>> -
>> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
>> -    if (likely(r == 0)) {
>> -        amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
>> -        amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>> -    }
>> -}
>> -
>> static void gfx_v10_0_mec_fini(struct amdgpu_device *adev) {
>>     amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); @@
>> -3780,10 +3747,6 @@ static int gfx_v10_0_hw_init(void *handle)
>>     int r;
>>     struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>>
>> -    r = gfx_v10_0_csb_vram_pin(adev);
>> -    if (r)
>> -        return r;
>> -
>>     if (!amdgpu_emu_mode)
>>         gfx_v10_0_init_golden_registers(adev);
>>
>> @@ -3871,7 +3834,6 @@ static int gfx_v10_0_hw_fini(void *handle)
>>     }
>>     gfx_v10_0_cp_enable(adev, false);
>>     gfx_v10_0_enable_gui_idle_interrupt(adev, false);
>> -    gfx_v10_0_csb_vram_unpin(adev);
>>
>>     return 0;
>> }
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>> index 4cc2e50..524a7ba 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>> @@ -1683,39 +1683,6 @@ static int gfx_v9_0_rlc_init(struct amdgpu_device *adev)
>>     return 0;
>> }
>>
>> -static int gfx_v9_0_csb_vram_pin(struct amdgpu_device *adev) -{
>> -    int r;
>> -
>> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
>> -    if (unlikely(r != 0))
>> -        return r;
>> -
>> -    r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
>> -            AMDGPU_GEM_DOMAIN_VRAM);
>> -    if (!r)
>> -        adev->gfx.rlc.clear_state_gpu_addr =
>> -            amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
>> -
>> -    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>> -
>> -    return r;
>> -}
>> -
>> -static void gfx_v9_0_csb_vram_unpin(struct amdgpu_device *adev) -{
>> -    int r;
>> -
>> -    if (!adev->gfx.rlc.clear_state_obj)
>> -        return;
>> -
>> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
>> -    if (likely(r == 0)) {
>> -        amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
>> -        amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>> -    }
>> -}
>> -
>> static void gfx_v9_0_mec_fini(struct amdgpu_device *adev) {
>>     amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); @@
>> -3694,10 +3661,6 @@ static int gfx_v9_0_hw_init(void *handle)
>>
>>     gfx_v9_0_constants_init(adev);
>>
>> -    r = gfx_v9_0_csb_vram_pin(adev);
>> -    if (r)
>> -        return r;
>> -
>>     r = adev->gfx.rlc.funcs->resume(adev);
>>     if (r)
>>         return r;
>> @@ -3779,8 +3742,6 @@ static int gfx_v9_0_hw_fini(void *handle)
>>     gfx_v9_0_cp_enable(adev, false);
>>     adev->gfx.rlc.funcs->stop(adev);
>>
>> -    gfx_v9_0_csb_vram_unpin(adev);
>> -
>>     return 0;
>> }
>>
>> --
>> 2.7.4
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flis
>> t 
>> s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=02%7C01%7CX
>> i
>> aojie.Yuan%40amd.com%7C65e162e509ea4a90f79308d77266de65%7C3dd8961fe48
>> 8 
>> 4e608e11a82d994e183d%7C0%7C0%7C637103658464512751&amp;sdata=r5fpid5Is
>> P
>> 8anzg%2FZIYHn0N8xceBvG7rtRG80%2B7868o%3D&amp;reserved=0
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flist
> s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=02%7C01%7CMo
> nk.Liu%40amd.com%7Ccadef01b84ab45f90f1908d773f932cc%7C3dd8961fe4884e60
> 8e11a82d994e183d%7C0%7C0%7C637105386456299680&amp;sdata=hYsvNtzUb%2BTb
> iANKAx2x9dmYW1ikC66r%2B6Hbk3244PE%3D&amp;reserved=0

_______________________________________________
amd-gfx mailing list
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 41+ messages in thread

* Re: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload
  2019-11-29  1:58                     ` Liu, Monk
  (?)
@ 2019-11-29  7:45                     ` Christian König
  2019-11-29  7:53                       ` Liu, Monk
  -1 siblings, 1 reply; 41+ messages in thread
From: Christian König @ 2019-11-29  7:45 UTC (permalink / raw)
  To: Liu, Monk, Yuan, Xiaojie, Deucher, Alexander; +Cc: amd-gfx

In this case feel free to add an Acked-by: Christian König 
<christian.koenig@amd.com> to your patch.

But I would recommend to get an rb from somebody which knows that stuff 
better than I do.

Regards,
Christian.

Am 29.11.19 um 02:58 schrieb Liu, Monk:
> The content of CSIB is always static, I submitted a patch to use the re-init and get rid of pin/unpin CSIB in hw_ini/fini,  (my purpose is to fix the double unpin warning during unload )
> _____________________________________
> Monk Liu|GPU Virtualization Team |AMD
>
>
> -----Original Message-----
> From: Christian König <ckoenig.leichtzumerken@gmail.com>
> Sent: Thursday, November 28, 2019 7:51 PM
> To: Liu, Monk <Monk.Liu@amd.com>; Yuan, Xiaojie <Xiaojie.Yuan@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>
> Cc: amd-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload
>
> Hi Monk,
>
> if the content of the CSIB is constant then it is certainly better to just re-initialize it.
>
> This also prevents from corruption because of VRAM lost.
>
> Christian.
>
> Am 28.11.19 um 03:53 schrieb Liu, Monk:
>> Hi Xiaojie
>>
>> For SRIOV we don't use suspend so I didn't think to that part, thanks for the remind !
>> But we still need to fix this call trace issue anyway (our jenkins
>> testing  system consider such call trace as an error )
>>
>> How about we do "  adev->gfx.rlc.funcs->get_csb_buffer(adev,
>> dst_ptr);" in the hw_init() ? this way You don't need to evict the CSIB during suspend and the CSIB always will be re-initialized after S3 resume ?
>>
>> @Deucher, Alexander @Koenig, Christian what's your opinion ?
>> _____________________________________
>> Monk Liu|GPU Virtualization Team |AMD
>>
>>
>> -----Original Message-----
>> From: Yuan, Xiaojie <Xiaojie.Yuan@amd.com>
>> Sent: Tuesday, November 26, 2019 9:10 PM
>> To: Liu, Monk <Monk.Liu@amd.com>
>> Cc: amd-gfx@lists.freedesktop.org
>> Subject: Re: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload
>>
>> Hi Monk,
>>
>> hw_fini() is called in suspend code path as well. I'm wondering how csb can be evicted if it's not unpined before suspend.
>>
>> BR,
>> Xiaojie
>>
>>> On Nov 26, 2019, at 7:50 PM, Monk Liu <Monk.Liu@amd.com> wrote:
>>>
>>> kernel would report a warning on double unpin on the csb BO because
>>> we unpin it during hw_fini but actually we don't need to pin/unpin it
>>> during hw_init/fini since it is created with kernel pinned
>>>
>>> remove all those useless code for gfx9/10
>>>
>>> Signed-off-by: Monk Liu <Monk.Liu@amd.com>
>>> ---
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c |  1 -
>>> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c  | 38 --------------------------------
>>> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c   | 39 ---------------------------------
>>> 3 files changed, 78 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
>>> index c8793e6..289fada 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
>>> @@ -145,7 +145,6 @@ int amdgpu_gfx_rlc_init_csb(struct amdgpu_device *adev)
>>>      dst_ptr = adev->gfx.rlc.cs_ptr;
>>>      adev->gfx.rlc.funcs->get_csb_buffer(adev, dst_ptr);
>>>      amdgpu_bo_kunmap(adev->gfx.rlc.clear_state_obj);
>>> -    amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
>>>      amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>>>
>>>      return 0;
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
>>> b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
>>> index a56cba9..5ee7467 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
>>> @@ -996,39 +996,6 @@ static int gfx_v10_0_rlc_init(struct amdgpu_device *adev)
>>>      return 0;
>>> }
>>>
>>> -static int gfx_v10_0_csb_vram_pin(struct amdgpu_device *adev) -{
>>> -    int r;
>>> -
>>> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
>>> -    if (unlikely(r != 0))
>>> -        return r;
>>> -
>>> -    r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
>>> -            AMDGPU_GEM_DOMAIN_VRAM);
>>> -    if (!r)
>>> -        adev->gfx.rlc.clear_state_gpu_addr =
>>> -            amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
>>> -
>>> -    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>>> -
>>> -    return r;
>>> -}
>>> -
>>> -static void gfx_v10_0_csb_vram_unpin(struct amdgpu_device *adev) -{
>>> -    int r;
>>> -
>>> -    if (!adev->gfx.rlc.clear_state_obj)
>>> -        return;
>>> -
>>> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
>>> -    if (likely(r == 0)) {
>>> -        amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
>>> -        amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>>> -    }
>>> -}
>>> -
>>> static void gfx_v10_0_mec_fini(struct amdgpu_device *adev) {
>>>      amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); @@
>>> -3780,10 +3747,6 @@ static int gfx_v10_0_hw_init(void *handle)
>>>      int r;
>>>      struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>>>
>>> -    r = gfx_v10_0_csb_vram_pin(adev);
>>> -    if (r)
>>> -        return r;
>>> -
>>>      if (!amdgpu_emu_mode)
>>>          gfx_v10_0_init_golden_registers(adev);
>>>
>>> @@ -3871,7 +3834,6 @@ static int gfx_v10_0_hw_fini(void *handle)
>>>      }
>>>      gfx_v10_0_cp_enable(adev, false);
>>>      gfx_v10_0_enable_gui_idle_interrupt(adev, false);
>>> -    gfx_v10_0_csb_vram_unpin(adev);
>>>
>>>      return 0;
>>> }
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>>> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>>> index 4cc2e50..524a7ba 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>>> @@ -1683,39 +1683,6 @@ static int gfx_v9_0_rlc_init(struct amdgpu_device *adev)
>>>      return 0;
>>> }
>>>
>>> -static int gfx_v9_0_csb_vram_pin(struct amdgpu_device *adev) -{
>>> -    int r;
>>> -
>>> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
>>> -    if (unlikely(r != 0))
>>> -        return r;
>>> -
>>> -    r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
>>> -            AMDGPU_GEM_DOMAIN_VRAM);
>>> -    if (!r)
>>> -        adev->gfx.rlc.clear_state_gpu_addr =
>>> -            amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
>>> -
>>> -    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>>> -
>>> -    return r;
>>> -}
>>> -
>>> -static void gfx_v9_0_csb_vram_unpin(struct amdgpu_device *adev) -{
>>> -    int r;
>>> -
>>> -    if (!adev->gfx.rlc.clear_state_obj)
>>> -        return;
>>> -
>>> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
>>> -    if (likely(r == 0)) {
>>> -        amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
>>> -        amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>>> -    }
>>> -}
>>> -
>>> static void gfx_v9_0_mec_fini(struct amdgpu_device *adev) {
>>>      amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); @@
>>> -3694,10 +3661,6 @@ static int gfx_v9_0_hw_init(void *handle)
>>>
>>>      gfx_v9_0_constants_init(adev);
>>>
>>> -    r = gfx_v9_0_csb_vram_pin(adev);
>>> -    if (r)
>>> -        return r;
>>> -
>>>      r = adev->gfx.rlc.funcs->resume(adev);
>>>      if (r)
>>>          return r;
>>> @@ -3779,8 +3742,6 @@ static int gfx_v9_0_hw_fini(void *handle)
>>>      gfx_v9_0_cp_enable(adev, false);
>>>      adev->gfx.rlc.funcs->stop(adev);
>>>
>>> -    gfx_v9_0_csb_vram_unpin(adev);
>>> -
>>>      return 0;
>>> }
>>>
>>> --
>>> 2.7.4
>>>
>>> _______________________________________________
>>> amd-gfx mailing list
>>> amd-gfx@lists.freedesktop.org
>>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flis
>>> t
>>> s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=02%7C01%7CX
>>> i
>>> aojie.Yuan%40amd.com%7C65e162e509ea4a90f79308d77266de65%7C3dd8961fe48
>>> 8
>>> 4e608e11a82d994e183d%7C0%7C0%7C637103658464512751&amp;sdata=r5fpid5Is
>>> P
>>> 8anzg%2FZIYHn0N8xceBvG7rtRG80%2B7868o%3D&amp;reserved=0
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flist
>> s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=02%7C01%7CMo
>> nk.Liu%40amd.com%7Ccadef01b84ab45f90f1908d773f932cc%7C3dd8961fe4884e60
>> 8e11a82d994e183d%7C0%7C0%7C637105386456299680&amp;sdata=hYsvNtzUb%2BTb
>> iANKAx2x9dmYW1ikC66r%2B6Hbk3244PE%3D&amp;reserved=0

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 41+ messages in thread

* RE: [PATCH 2/5] drm/amdgpu: skip rlc ucode loading for SRIOV gfx10
  2019-11-28  2:21         ` Liu, Monk
  (?)
@ 2019-11-29  7:47         ` Liu, Monk
  2019-11-29  8:09           ` Zhang, Hawking
  -1 siblings, 1 reply; 41+ messages in thread
From: Liu, Monk @ 2019-11-29  7:47 UTC (permalink / raw)
  To: Liu, Monk, amd-gfx, Zhang, Hawking, Deucher, Alexander

@Zhang, Hawking @Deucher, Alexander
Can you help to review it for me

_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Liu, Monk
Sent: Thursday, November 28, 2019 10:21 AM
To: amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH 2/5] drm/amdgpu: skip rlc ucode loading for SRIOV gfx10



_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: Monk Liu <Monk.Liu@amd.com> 
Sent: Tuesday, November 26, 2019 7:50 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Monk <Monk.Liu@amd.com>
Subject: [PATCH 2/5] drm/amdgpu: skip rlc ucode loading for SRIOV gfx10

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 80 +++++++++++++++++-----------------
 1 file changed, 41 insertions(+), 39 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 879c0a1..a56cba9 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -691,59 +691,61 @@ static int gfx_v10_0_init_microcode(struct amdgpu_device *adev)
 	adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);
 	adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);
 
-	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name);
-	err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev);
-	if (err)
-		goto out;
-	err = amdgpu_ucode_validate(adev->gfx.rlc_fw);
-	rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data;
-	version_major = le16_to_cpu(rlc_hdr->header.header_version_major);
-	version_minor = le16_to_cpu(rlc_hdr->header.header_version_minor);
-	if (version_major == 2 && version_minor == 1)
-		adev->gfx.rlc.is_rlc_v2_1 = true;
-
-	adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version);
-	adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version);
-	adev->gfx.rlc.save_and_restore_offset =
+	if (!amdgpu_sriov_vf(adev)) {
+		snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name);
+		err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev);
+		if (err)
+			goto out;
+		err = amdgpu_ucode_validate(adev->gfx.rlc_fw);
+		rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data;
+		version_major = le16_to_cpu(rlc_hdr->header.header_version_major);
+		version_minor = le16_to_cpu(rlc_hdr->header.header_version_minor);
+		if (version_major == 2 && version_minor == 1)
+			adev->gfx.rlc.is_rlc_v2_1 = true;
+
+		adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version);
+		adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version);
+		adev->gfx.rlc.save_and_restore_offset =
 			le32_to_cpu(rlc_hdr->save_and_restore_offset);
-	adev->gfx.rlc.clear_state_descriptor_offset =
+		adev->gfx.rlc.clear_state_descriptor_offset =
 			le32_to_cpu(rlc_hdr->clear_state_descriptor_offset);
-	adev->gfx.rlc.avail_scratch_ram_locations =
+		adev->gfx.rlc.avail_scratch_ram_locations =
 			le32_to_cpu(rlc_hdr->avail_scratch_ram_locations);
-	adev->gfx.rlc.reg_restore_list_size =
+		adev->gfx.rlc.reg_restore_list_size =
 			le32_to_cpu(rlc_hdr->reg_restore_list_size);
-	adev->gfx.rlc.reg_list_format_start =
+		adev->gfx.rlc.reg_list_format_start =
 			le32_to_cpu(rlc_hdr->reg_list_format_start);
-	adev->gfx.rlc.reg_list_format_separate_start =
+		adev->gfx.rlc.reg_list_format_separate_start =
 			le32_to_cpu(rlc_hdr->reg_list_format_separate_start);
-	adev->gfx.rlc.starting_offsets_start =
+		adev->gfx.rlc.starting_offsets_start =
 			le32_to_cpu(rlc_hdr->starting_offsets_start);
-	adev->gfx.rlc.reg_list_format_size_bytes =
+		adev->gfx.rlc.reg_list_format_size_bytes =
 			le32_to_cpu(rlc_hdr->reg_list_format_size_bytes);
-	adev->gfx.rlc.reg_list_size_bytes =
+		adev->gfx.rlc.reg_list_size_bytes =
 			le32_to_cpu(rlc_hdr->reg_list_size_bytes);
-	adev->gfx.rlc.register_list_format =
+		adev->gfx.rlc.register_list_format =
 			kmalloc(adev->gfx.rlc.reg_list_format_size_bytes +
-				adev->gfx.rlc.reg_list_size_bytes, GFP_KERNEL);
-	if (!adev->gfx.rlc.register_list_format) {
-		err = -ENOMEM;
-		goto out;
-	}
+					adev->gfx.rlc.reg_list_size_bytes, GFP_KERNEL);
+		if (!adev->gfx.rlc.register_list_format) {
+			err = -ENOMEM;
+			goto out;
+		}
 
-	tmp = (unsigned int *)((uintptr_t)rlc_hdr +
-			le32_to_cpu(rlc_hdr->reg_list_format_array_offset_bytes));
-	for (i = 0 ; i < (rlc_hdr->reg_list_format_size_bytes >> 2); i++)
-		adev->gfx.rlc.register_list_format[i] =	le32_to_cpu(tmp[i]);
+		tmp = (unsigned int *)((uintptr_t)rlc_hdr +
+							   le32_to_cpu(rlc_hdr->reg_list_format_array_offset_bytes));
+		for (i = 0 ; i < (rlc_hdr->reg_list_format_size_bytes >> 2); i++)
+			adev->gfx.rlc.register_list_format[i] =	le32_to_cpu(tmp[i]);
 
-	adev->gfx.rlc.register_restore = adev->gfx.rlc.register_list_format + i;
+		adev->gfx.rlc.register_restore = adev->gfx.rlc.register_list_format + i;
 
-	tmp = (unsigned int *)((uintptr_t)rlc_hdr +
-			le32_to_cpu(rlc_hdr->reg_list_array_offset_bytes));
-	for (i = 0 ; i < (rlc_hdr->reg_list_size_bytes >> 2); i++)
-		adev->gfx.rlc.register_restore[i] = le32_to_cpu(tmp[i]);
+		tmp = (unsigned int *)((uintptr_t)rlc_hdr +
+							   le32_to_cpu(rlc_hdr->reg_list_array_offset_bytes));
+		for (i = 0 ; i < (rlc_hdr->reg_list_size_bytes >> 2); i++)
+			adev->gfx.rlc.register_restore[i] = le32_to_cpu(tmp[i]);
 
-	if (adev->gfx.rlc.is_rlc_v2_1)
-		gfx_v10_0_init_rlc_ext_microcode(adev);
+		if (adev->gfx.rlc.is_rlc_v2_1)
+			gfx_v10_0_init_rlc_ext_microcode(adev);
+	}
 
 	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec%s.bin", chip_name, wks);
 	err = request_firmware(&adev->gfx.mec_fw, fw_name, adev->dev);
-- 
2.7.4

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^ permalink raw reply related	[flat|nested] 41+ messages in thread

* RE: [PATCH 3/5] drm/amdgpu: do autoload right after MEC loaded for SRIOV VF
  2019-11-28  2:21         ` Liu, Monk
  (?)
@ 2019-11-29  7:47         ` Liu, Monk
  2019-11-29  8:05           ` Zhang, Hawking
  -1 siblings, 1 reply; 41+ messages in thread
From: Liu, Monk @ 2019-11-29  7:47 UTC (permalink / raw)
  To: Liu, Monk, amd-gfx, Zhang, Hawking, Deucher, Alexander

@Zhang, Hawking@Deucher, Alexander

Can you help to review it for me ? 

_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Liu, Monk
Sent: Thursday, November 28, 2019 10:22 AM
To: amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH 3/5] drm/amdgpu: do autoload right after MEC loaded for SRIOV VF

ping
_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: Monk Liu <Monk.Liu@amd.com> 
Sent: Tuesday, November 26, 2019 7:50 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Monk <Monk.Liu@amd.com>
Subject: [PATCH 3/5] drm/amdgpu: do autoload right after MEC loaded for SRIOV VF

since we don't have RLCG ucode loading and no SRlist as well

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 96a6b00..b65fda9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -1490,8 +1490,7 @@ static int psp_np_fw_load(struct psp_context *psp)
 			return ret;
 
 		/* Start rlc autoload after psp recieved all the gfx firmware */
-		if (psp->autoload_supported && ucode->ucode_id ==
-			AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM) {
+		if (psp->autoload_supported && ucode->ucode_id == (amdgpu_sriov_vf(adev) ? AMDGPU_UCODE_ID_CP_MEC2 : AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM)) {
 			ret = psp_rlc_autoload(psp);
 			if (ret) {
 				DRM_ERROR("Failed to start rlc autoload\n");
-- 
2.7.4

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^ permalink raw reply related	[flat|nested] 41+ messages in thread

* RE: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload
  2019-11-29  7:45                     ` Christian König
@ 2019-11-29  7:53                       ` Liu, Monk
  0 siblings, 0 replies; 41+ messages in thread
From: Liu, Monk @ 2019-11-29  7:53 UTC (permalink / raw)
  To: Koenig, Christian, Yuan, Xiaojie, Deucher, Alexander; +Cc: amd-gfx

It is tested/verified by Xiaojie  on nv14 against S3 issues.

Thanks 

_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: Koenig, Christian <Christian.Koenig@amd.com> 
Sent: Friday, November 29, 2019 3:46 PM
To: Liu, Monk <Monk.Liu@amd.com>; Yuan, Xiaojie <Xiaojie.Yuan@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload

In this case feel free to add an Acked-by: Christian König <christian.koenig@amd.com> to your patch.

But I would recommend to get an rb from somebody which knows that stuff better than I do.

Regards,
Christian.

Am 29.11.19 um 02:58 schrieb Liu, Monk:
> The content of CSIB is always static, I submitted a patch to use the 
> re-init and get rid of pin/unpin CSIB in hw_ini/fini,  (my purpose is 
> to fix the double unpin warning during unload ) 
> _____________________________________
> Monk Liu|GPU Virtualization Team |AMD
>
>
> -----Original Message-----
> From: Christian König <ckoenig.leichtzumerken@gmail.com>
> Sent: Thursday, November 28, 2019 7:51 PM
> To: Liu, Monk <Monk.Liu@amd.com>; Yuan, Xiaojie 
> <Xiaojie.Yuan@amd.com>; Deucher, Alexander 
> <Alexander.Deucher@amd.com>; Koenig, Christian 
> <Christian.Koenig@amd.com>
> Cc: amd-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload
>
> Hi Monk,
>
> if the content of the CSIB is constant then it is certainly better to just re-initialize it.
>
> This also prevents from corruption because of VRAM lost.
>
> Christian.
>
> Am 28.11.19 um 03:53 schrieb Liu, Monk:
>> Hi Xiaojie
>>
>> For SRIOV we don't use suspend so I didn't think to that part, thanks for the remind !
>> But we still need to fix this call trace issue anyway (our jenkins 
>> testing  system consider such call trace as an error )
>>
>> How about we do "  adev->gfx.rlc.funcs->get_csb_buffer(adev,
>> dst_ptr);" in the hw_init() ? this way You don't need to evict the CSIB during suspend and the CSIB always will be re-initialized after S3 resume ?
>>
>> @Deucher, Alexander @Koenig, Christian what's your opinion ?
>> _____________________________________
>> Monk Liu|GPU Virtualization Team |AMD
>>
>>
>> -----Original Message-----
>> From: Yuan, Xiaojie <Xiaojie.Yuan@amd.com>
>> Sent: Tuesday, November 26, 2019 9:10 PM
>> To: Liu, Monk <Monk.Liu@amd.com>
>> Cc: amd-gfx@lists.freedesktop.org
>> Subject: Re: [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload
>>
>> Hi Monk,
>>
>> hw_fini() is called in suspend code path as well. I'm wondering how csb can be evicted if it's not unpined before suspend.
>>
>> BR,
>> Xiaojie
>>
>>> On Nov 26, 2019, at 7:50 PM, Monk Liu <Monk.Liu@amd.com> wrote:
>>>
>>> kernel would report a warning on double unpin on the csb BO because 
>>> we unpin it during hw_fini but actually we don't need to pin/unpin 
>>> it during hw_init/fini since it is created with kernel pinned
>>>
>>> remove all those useless code for gfx9/10
>>>
>>> Signed-off-by: Monk Liu <Monk.Liu@amd.com>
>>> ---
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c |  1 - 
>>> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c  | 38 --------------------------------
>>> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c   | 39 ---------------------------------
>>> 3 files changed, 78 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
>>> index c8793e6..289fada 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
>>> @@ -145,7 +145,6 @@ int amdgpu_gfx_rlc_init_csb(struct amdgpu_device *adev)
>>>      dst_ptr = adev->gfx.rlc.cs_ptr;
>>>      adev->gfx.rlc.funcs->get_csb_buffer(adev, dst_ptr);
>>>      amdgpu_bo_kunmap(adev->gfx.rlc.clear_state_obj);
>>> -    amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
>>>      amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>>>
>>>      return 0;
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
>>> b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
>>> index a56cba9..5ee7467 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
>>> @@ -996,39 +996,6 @@ static int gfx_v10_0_rlc_init(struct amdgpu_device *adev)
>>>      return 0;
>>> }
>>>
>>> -static int gfx_v10_0_csb_vram_pin(struct amdgpu_device *adev) -{
>>> -    int r;
>>> -
>>> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
>>> -    if (unlikely(r != 0))
>>> -        return r;
>>> -
>>> -    r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
>>> -            AMDGPU_GEM_DOMAIN_VRAM);
>>> -    if (!r)
>>> -        adev->gfx.rlc.clear_state_gpu_addr =
>>> -            amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
>>> -
>>> -    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>>> -
>>> -    return r;
>>> -}
>>> -
>>> -static void gfx_v10_0_csb_vram_unpin(struct amdgpu_device *adev) -{
>>> -    int r;
>>> -
>>> -    if (!adev->gfx.rlc.clear_state_obj)
>>> -        return;
>>> -
>>> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
>>> -    if (likely(r == 0)) {
>>> -        amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
>>> -        amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>>> -    }
>>> -}
>>> -
>>> static void gfx_v10_0_mec_fini(struct amdgpu_device *adev) {
>>>      amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); 
>>> @@
>>> -3780,10 +3747,6 @@ static int gfx_v10_0_hw_init(void *handle)
>>>      int r;
>>>      struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>>>
>>> -    r = gfx_v10_0_csb_vram_pin(adev);
>>> -    if (r)
>>> -        return r;
>>> -
>>>      if (!amdgpu_emu_mode)
>>>          gfx_v10_0_init_golden_registers(adev);
>>>
>>> @@ -3871,7 +3834,6 @@ static int gfx_v10_0_hw_fini(void *handle)
>>>      }
>>>      gfx_v10_0_cp_enable(adev, false);
>>>      gfx_v10_0_enable_gui_idle_interrupt(adev, false);
>>> -    gfx_v10_0_csb_vram_unpin(adev);
>>>
>>>      return 0;
>>> }
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>>> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>>> index 4cc2e50..524a7ba 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>>> @@ -1683,39 +1683,6 @@ static int gfx_v9_0_rlc_init(struct amdgpu_device *adev)
>>>      return 0;
>>> }
>>>
>>> -static int gfx_v9_0_csb_vram_pin(struct amdgpu_device *adev) -{
>>> -    int r;
>>> -
>>> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
>>> -    if (unlikely(r != 0))
>>> -        return r;
>>> -
>>> -    r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
>>> -            AMDGPU_GEM_DOMAIN_VRAM);
>>> -    if (!r)
>>> -        adev->gfx.rlc.clear_state_gpu_addr =
>>> -            amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
>>> -
>>> -    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>>> -
>>> -    return r;
>>> -}
>>> -
>>> -static void gfx_v9_0_csb_vram_unpin(struct amdgpu_device *adev) -{
>>> -    int r;
>>> -
>>> -    if (!adev->gfx.rlc.clear_state_obj)
>>> -        return;
>>> -
>>> -    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
>>> -    if (likely(r == 0)) {
>>> -        amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
>>> -        amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
>>> -    }
>>> -}
>>> -
>>> static void gfx_v9_0_mec_fini(struct amdgpu_device *adev) {
>>>      amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); 
>>> @@
>>> -3694,10 +3661,6 @@ static int gfx_v9_0_hw_init(void *handle)
>>>
>>>      gfx_v9_0_constants_init(adev);
>>>
>>> -    r = gfx_v9_0_csb_vram_pin(adev);
>>> -    if (r)
>>> -        return r;
>>> -
>>>      r = adev->gfx.rlc.funcs->resume(adev);
>>>      if (r)
>>>          return r;
>>> @@ -3779,8 +3742,6 @@ static int gfx_v9_0_hw_fini(void *handle)
>>>      gfx_v9_0_cp_enable(adev, false);
>>>      adev->gfx.rlc.funcs->stop(adev);
>>>
>>> -    gfx_v9_0_csb_vram_unpin(adev);
>>> -
>>>      return 0;
>>> }
>>>
>>> --
>>> 2.7.4
>>>
>>> _______________________________________________
>>> amd-gfx mailing list
>>> amd-gfx@lists.freedesktop.org
>>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fli
>>> s
>>> t
>>> s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=02%7C01%7C
>>> X
>>> i
>>> aojie.Yuan%40amd.com%7C65e162e509ea4a90f79308d77266de65%7C3dd8961fe4
>>> 8
>>> 8
>>> 4e608e11a82d994e183d%7C0%7C0%7C637103658464512751&amp;sdata=r5fpid5I
>>> s
>>> P
>>> 8anzg%2FZIYHn0N8xceBvG7rtRG80%2B7868o%3D&amp;reserved=0
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flis
>> t 
>> s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=02%7C01%7CM
>> o
>> nk.Liu%40amd.com%7Ccadef01b84ab45f90f1908d773f932cc%7C3dd8961fe4884e6
>> 0 
>> 8e11a82d994e183d%7C0%7C0%7C637105386456299680&amp;sdata=hYsvNtzUb%2BT
>> b
>> iANKAx2x9dmYW1ikC66r%2B6Hbk3244PE%3D&amp;reserved=0

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^ permalink raw reply	[flat|nested] 41+ messages in thread

* RE: [PATCH 3/5] drm/amdgpu: do autoload right after MEC loaded for SRIOV VF
  2019-11-29  7:47         ` Liu, Monk
@ 2019-11-29  8:05           ` Zhang, Hawking
  2019-11-29  8:13             ` Liu, Monk
  0 siblings, 1 reply; 41+ messages in thread
From: Zhang, Hawking @ 2019-11-29  8:05 UTC (permalink / raw)
  To: Liu, Monk, amd-gfx, Deucher, Alexander

[AMD Official Use Only - Internal Distribution Only]

It seems to me this is one line code that more than 80 characters. Please kindly split it to several ones.
Other than that, the Patch is

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>

Regards,
Hawking

-----Original Message-----
From: Liu, Monk <Monk.Liu@amd.com> 
Sent: 2019年11月29日 15:48
To: Liu, Monk <Monk.Liu@amd.com>; amd-gfx@lists.freedesktop.org; Zhang, Hawking <Hawking.Zhang@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>
Subject: RE: [PATCH 3/5] drm/amdgpu: do autoload right after MEC loaded for SRIOV VF

@Zhang, Hawking@Deucher, Alexander

Can you help to review it for me ? 

_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Liu, Monk
Sent: Thursday, November 28, 2019 10:22 AM
To: amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH 3/5] drm/amdgpu: do autoload right after MEC loaded for SRIOV VF

ping
_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: Monk Liu <Monk.Liu@amd.com> 
Sent: Tuesday, November 26, 2019 7:50 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Monk <Monk.Liu@amd.com>
Subject: [PATCH 3/5] drm/amdgpu: do autoload right after MEC loaded for SRIOV VF

since we don't have RLCG ucode loading and no SRlist as well

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 96a6b00..b65fda9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -1490,8 +1490,7 @@ static int psp_np_fw_load(struct psp_context *psp)
 			return ret;
 
 		/* Start rlc autoload after psp recieved all the gfx firmware */
-		if (psp->autoload_supported && ucode->ucode_id ==
-			AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM) {
+		if (psp->autoload_supported && ucode->ucode_id == (amdgpu_sriov_vf(adev) ? AMDGPU_UCODE_ID_CP_MEC2 : AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM)) {
 			ret = psp_rlc_autoload(psp);
 			if (ret) {
 				DRM_ERROR("Failed to start rlc autoload\n");
-- 
2.7.4

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^ permalink raw reply related	[flat|nested] 41+ messages in thread

* RE: [PATCH 2/5] drm/amdgpu: skip rlc ucode loading for SRIOV gfx10
  2019-11-29  7:47         ` Liu, Monk
@ 2019-11-29  8:09           ` Zhang, Hawking
  0 siblings, 0 replies; 41+ messages in thread
From: Zhang, Hawking @ 2019-11-29  8:09 UTC (permalink / raw)
  To: Liu, Monk, amd-gfx, Deucher, Alexander

[AMD Official Use Only - Internal Distribution Only]

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>

Regards,
Hawking
-----Original Message-----
From: Liu, Monk <Monk.Liu@amd.com> 
Sent: 2019年11月29日 15:47
To: Liu, Monk <Monk.Liu@amd.com>; amd-gfx@lists.freedesktop.org; Zhang, Hawking <Hawking.Zhang@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>
Subject: RE: [PATCH 2/5] drm/amdgpu: skip rlc ucode loading for SRIOV gfx10

@Zhang, Hawking @Deucher, Alexander
Can you help to review it for me

_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Liu, Monk
Sent: Thursday, November 28, 2019 10:21 AM
To: amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH 2/5] drm/amdgpu: skip rlc ucode loading for SRIOV gfx10



_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: Monk Liu <Monk.Liu@amd.com> 
Sent: Tuesday, November 26, 2019 7:50 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Monk <Monk.Liu@amd.com>
Subject: [PATCH 2/5] drm/amdgpu: skip rlc ucode loading for SRIOV gfx10

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 80 +++++++++++++++++-----------------
 1 file changed, 41 insertions(+), 39 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 879c0a1..a56cba9 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -691,59 +691,61 @@ static int gfx_v10_0_init_microcode(struct amdgpu_device *adev)
 	adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);
 	adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);
 
-	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name);
-	err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev);
-	if (err)
-		goto out;
-	err = amdgpu_ucode_validate(adev->gfx.rlc_fw);
-	rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data;
-	version_major = le16_to_cpu(rlc_hdr->header.header_version_major);
-	version_minor = le16_to_cpu(rlc_hdr->header.header_version_minor);
-	if (version_major == 2 && version_minor == 1)
-		adev->gfx.rlc.is_rlc_v2_1 = true;
-
-	adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version);
-	adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version);
-	adev->gfx.rlc.save_and_restore_offset =
+	if (!amdgpu_sriov_vf(adev)) {
+		snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name);
+		err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev);
+		if (err)
+			goto out;
+		err = amdgpu_ucode_validate(adev->gfx.rlc_fw);
+		rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data;
+		version_major = le16_to_cpu(rlc_hdr->header.header_version_major);
+		version_minor = le16_to_cpu(rlc_hdr->header.header_version_minor);
+		if (version_major == 2 && version_minor == 1)
+			adev->gfx.rlc.is_rlc_v2_1 = true;
+
+		adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version);
+		adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version);
+		adev->gfx.rlc.save_and_restore_offset =
 			le32_to_cpu(rlc_hdr->save_and_restore_offset);
-	adev->gfx.rlc.clear_state_descriptor_offset =
+		adev->gfx.rlc.clear_state_descriptor_offset =
 			le32_to_cpu(rlc_hdr->clear_state_descriptor_offset);
-	adev->gfx.rlc.avail_scratch_ram_locations =
+		adev->gfx.rlc.avail_scratch_ram_locations =
 			le32_to_cpu(rlc_hdr->avail_scratch_ram_locations);
-	adev->gfx.rlc.reg_restore_list_size =
+		adev->gfx.rlc.reg_restore_list_size =
 			le32_to_cpu(rlc_hdr->reg_restore_list_size);
-	adev->gfx.rlc.reg_list_format_start =
+		adev->gfx.rlc.reg_list_format_start =
 			le32_to_cpu(rlc_hdr->reg_list_format_start);
-	adev->gfx.rlc.reg_list_format_separate_start =
+		adev->gfx.rlc.reg_list_format_separate_start =
 			le32_to_cpu(rlc_hdr->reg_list_format_separate_start);
-	adev->gfx.rlc.starting_offsets_start =
+		adev->gfx.rlc.starting_offsets_start =
 			le32_to_cpu(rlc_hdr->starting_offsets_start);
-	adev->gfx.rlc.reg_list_format_size_bytes =
+		adev->gfx.rlc.reg_list_format_size_bytes =
 			le32_to_cpu(rlc_hdr->reg_list_format_size_bytes);
-	adev->gfx.rlc.reg_list_size_bytes =
+		adev->gfx.rlc.reg_list_size_bytes =
 			le32_to_cpu(rlc_hdr->reg_list_size_bytes);
-	adev->gfx.rlc.register_list_format =
+		adev->gfx.rlc.register_list_format =
 			kmalloc(adev->gfx.rlc.reg_list_format_size_bytes +
-				adev->gfx.rlc.reg_list_size_bytes, GFP_KERNEL);
-	if (!adev->gfx.rlc.register_list_format) {
-		err = -ENOMEM;
-		goto out;
-	}
+					adev->gfx.rlc.reg_list_size_bytes, GFP_KERNEL);
+		if (!adev->gfx.rlc.register_list_format) {
+			err = -ENOMEM;
+			goto out;
+		}
 
-	tmp = (unsigned int *)((uintptr_t)rlc_hdr +
-			le32_to_cpu(rlc_hdr->reg_list_format_array_offset_bytes));
-	for (i = 0 ; i < (rlc_hdr->reg_list_format_size_bytes >> 2); i++)
-		adev->gfx.rlc.register_list_format[i] =	le32_to_cpu(tmp[i]);
+		tmp = (unsigned int *)((uintptr_t)rlc_hdr +
+							   le32_to_cpu(rlc_hdr->reg_list_format_array_offset_bytes));
+		for (i = 0 ; i < (rlc_hdr->reg_list_format_size_bytes >> 2); i++)
+			adev->gfx.rlc.register_list_format[i] =	le32_to_cpu(tmp[i]);
 
-	adev->gfx.rlc.register_restore = adev->gfx.rlc.register_list_format + i;
+		adev->gfx.rlc.register_restore = adev->gfx.rlc.register_list_format + i;
 
-	tmp = (unsigned int *)((uintptr_t)rlc_hdr +
-			le32_to_cpu(rlc_hdr->reg_list_array_offset_bytes));
-	for (i = 0 ; i < (rlc_hdr->reg_list_size_bytes >> 2); i++)
-		adev->gfx.rlc.register_restore[i] = le32_to_cpu(tmp[i]);
+		tmp = (unsigned int *)((uintptr_t)rlc_hdr +
+							   le32_to_cpu(rlc_hdr->reg_list_array_offset_bytes));
+		for (i = 0 ; i < (rlc_hdr->reg_list_size_bytes >> 2); i++)
+			adev->gfx.rlc.register_restore[i] = le32_to_cpu(tmp[i]);
 
-	if (adev->gfx.rlc.is_rlc_v2_1)
-		gfx_v10_0_init_rlc_ext_microcode(adev);
+		if (adev->gfx.rlc.is_rlc_v2_1)
+			gfx_v10_0_init_rlc_ext_microcode(adev);
+	}
 
 	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec%s.bin", chip_name, wks);
 	err = request_firmware(&adev->gfx.mec_fw, fw_name, adev->dev);
-- 
2.7.4

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^ permalink raw reply related	[flat|nested] 41+ messages in thread

* RE: [PATCH 3/5] drm/amdgpu: do autoload right after MEC loaded for SRIOV VF
  2019-11-29  8:05           ` Zhang, Hawking
@ 2019-11-29  8:13             ` Liu, Monk
  0 siblings, 0 replies; 41+ messages in thread
From: Liu, Monk @ 2019-11-29  8:13 UTC (permalink / raw)
  To: Zhang, Hawking, amd-gfx, Deucher, Alexander

Okay, will do

Thanks 

_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: Zhang, Hawking <Hawking.Zhang@amd.com> 
Sent: Friday, November 29, 2019 4:05 PM
To: Liu, Monk <Monk.Liu@amd.com>; amd-gfx@lists.freedesktop.org; Deucher, Alexander <Alexander.Deucher@amd.com>
Subject: RE: [PATCH 3/5] drm/amdgpu: do autoload right after MEC loaded for SRIOV VF

[AMD Official Use Only - Internal Distribution Only]

It seems to me this is one line code that more than 80 characters. Please kindly split it to several ones.
Other than that, the Patch is

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>

Regards,
Hawking

-----Original Message-----
From: Liu, Monk <Monk.Liu@amd.com> 
Sent: 2019年11月29日 15:48
To: Liu, Monk <Monk.Liu@amd.com>; amd-gfx@lists.freedesktop.org; Zhang, Hawking <Hawking.Zhang@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>
Subject: RE: [PATCH 3/5] drm/amdgpu: do autoload right after MEC loaded for SRIOV VF

@Zhang, Hawking@Deucher, Alexander

Can you help to review it for me ? 

_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Liu, Monk
Sent: Thursday, November 28, 2019 10:22 AM
To: amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH 3/5] drm/amdgpu: do autoload right after MEC loaded for SRIOV VF

ping
_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: Monk Liu <Monk.Liu@amd.com> 
Sent: Tuesday, November 26, 2019 7:50 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Monk <Monk.Liu@amd.com>
Subject: [PATCH 3/5] drm/amdgpu: do autoload right after MEC loaded for SRIOV VF

since we don't have RLCG ucode loading and no SRlist as well

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 96a6b00..b65fda9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -1490,8 +1490,7 @@ static int psp_np_fw_load(struct psp_context *psp)
 			return ret;
 
 		/* Start rlc autoload after psp recieved all the gfx firmware */
-		if (psp->autoload_supported && ucode->ucode_id ==
-			AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM) {
+		if (psp->autoload_supported && ucode->ucode_id == (amdgpu_sriov_vf(adev) ? AMDGPU_UCODE_ID_CP_MEC2 : AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM)) {
 			ret = psp_rlc_autoload(psp);
 			if (ret) {
 				DRM_ERROR("Failed to start rlc autoload\n");
-- 
2.7.4

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^ permalink raw reply related	[flat|nested] 41+ messages in thread

end of thread, other threads:[~2019-11-29  8:13 UTC | newest]

Thread overview: 41+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-11-26 11:50 [PATCH 1/5] drm/amdgpu: fix GFX10 missing CSIB set Monk Liu
2019-11-26 11:50 ` Monk Liu
     [not found] ` <1574769024-30611-1-git-send-email-Monk.Liu-5C7GfCeVMHo@public.gmane.org>
2019-11-26 11:50   ` [PATCH 2/5] drm/amdgpu: skip rlc ucode loading for SRIOV gfx10 Monk Liu
2019-11-26 11:50     ` Monk Liu
     [not found]     ` <1574769024-30611-2-git-send-email-Monk.Liu-5C7GfCeVMHo@public.gmane.org>
2019-11-28  2:21       ` Liu, Monk
2019-11-28  2:21         ` Liu, Monk
2019-11-29  7:47         ` Liu, Monk
2019-11-29  8:09           ` Zhang, Hawking
2019-11-26 11:50   ` [PATCH 3/5] drm/amdgpu: do autoload right after MEC loaded for SRIOV VF Monk Liu
2019-11-26 11:50     ` Monk Liu
     [not found]     ` <1574769024-30611-3-git-send-email-Monk.Liu-5C7GfCeVMHo@public.gmane.org>
2019-11-28  2:21       ` Liu, Monk
2019-11-28  2:21         ` Liu, Monk
2019-11-29  7:47         ` Liu, Monk
2019-11-29  8:05           ` Zhang, Hawking
2019-11-29  8:13             ` Liu, Monk
2019-11-26 11:50   ` [PATCH 4/5] drm/amdgpu: use CPU to flush vmhub if sched stopped Monk Liu
2019-11-26 11:50     ` Monk Liu
     [not found]     ` <1574769024-30611-4-git-send-email-Monk.Liu-5C7GfCeVMHo@public.gmane.org>
2019-11-26 12:20       ` Christian König
2019-11-26 12:20         ` Christian König
     [not found]         ` <74af5d01-6d42-113e-9e74-4e481bb6bf2d-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2019-11-28  2:23           ` Liu, Monk
2019-11-28  2:23             ` Liu, Monk
2019-11-28  2:21       ` Liu, Monk
2019-11-28  2:21         ` Liu, Monk
2019-11-26 11:50   ` [PATCH 5/5] drm/amdgpu: fix calltrace during kmd unload Monk Liu
2019-11-26 11:50     ` Monk Liu
     [not found]     ` <1574769024-30611-5-git-send-email-Monk.Liu-5C7GfCeVMHo@public.gmane.org>
2019-11-26 13:09       ` Yuan, Xiaojie
2019-11-26 13:09         ` Yuan, Xiaojie
     [not found]         ` <7D1BEE15-D37F-4821-9DFF-CC1DD258A2CB-5C7GfCeVMHo@public.gmane.org>
2019-11-28  2:53           ` Liu, Monk
2019-11-28  2:53             ` Liu, Monk
     [not found]             ` <MN2PR12MB3933457BEF5A0AAAC37BE79184470-rweVpJHSKTq/67K4VYF1uAdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2019-11-28  3:32               ` Yuan, Xiaojie
2019-11-28  3:32                 ` Yuan, Xiaojie
2019-11-28 11:50               ` Christian König
2019-11-28 11:50                 ` Christian König
     [not found]                 ` <6d31ba81-c01d-f334-7c14-fb6964674d97-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2019-11-29  1:58                   ` Liu, Monk
2019-11-29  1:58                     ` Liu, Monk
2019-11-29  7:45                     ` Christian König
2019-11-29  7:53                       ` Liu, Monk
2019-11-28  2:21       ` Liu, Monk
2019-11-28  2:21         ` Liu, Monk
2019-11-28  2:21   ` [PATCH 1/5] drm/amdgpu: fix GFX10 missing CSIB set Liu, Monk
2019-11-28  2:21     ` Liu, Monk

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