[Intel-gfx] [PATCH 1/6] drm/i915/fbc: Reject PLANE_OFFSET.y%4!=0 on icl+ too

[Intel-gfx] [PATCH 1/6] drm/i915/fbc: Reject PLANE_OFFSET.y%4!=0 on icl+ too

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

icl and tgl are still affected by the modulo 4 PLANE_OFFSET.y
underrun issue. Reject such configurations on all gen9+ platforms.

Can be reproduced easily with the following sequence of
hardware poking:
while {
  write FBC_CTL.enable=1
  wait for vblank

  write PLANE_OFFSET .x=0 .y=32
  write PLANE_SURF
  wait for vblank

  # if PLANE_OFFSET.y is multiple of 4 the underrun won't happen
  write PLANE_OFFSET .x=0 .y=31
  write PLANE_SURF
  wait for vblank

  # extra vblank wait is required here presumably
  # to get FBC into the proper state
  wait for vblank

  write FBC_CTL.enable=0
  # underrun happens some time after FBC disable
  wait for vblank
}

Both 8888 and 565 pixel formats and all tilinga formats
seem affected. Reproduced on KBL/GLK/ICL/TGL. BDW confirmed
not affected.

Closes: https://gitlab.freedesktop.org/drm/intel/issues/792
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 6f1d5c032681..a1048ece541e 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -776,7 +776,7 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc)
 	 * having a Y offset that isn't divisible by 4 causes FIFO underrun
 	 * and screen flicker.
 	 */
-	if (IS_GEN_RANGE(dev_priv, 9, 10) &&
+	if (INTEL_GEN(dev_priv) >= 9 &&
 	    (fbc->state_cache.plane.adjusted_y & 3)) {
 		fbc->no_fbc_reason = "plane Y offset is misaligned";
 		return false;
-- 
2.23.0

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[Intel-gfx] [PATCH 2/6] drm/i915/fbc: Remove second redundant intel_fbc_pre_update() call

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

I fumbled the conflict resolution a bit when applying the
fbc vblank wait w/a. Because of that we now call intel_fbc_pre_update()
twice. Remove the second redundant call.

Reported-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 0f37f1d2026d..8f14352a2193 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -6062,9 +6062,6 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
 	    intel_fbc_pre_update(crtc, new_crtc_state, new_primary_state))
 		intel_wait_for_vblank(dev_priv, pipe);
 
-	if (new_primary_state)
-		intel_fbc_pre_update(crtc, new_crtc_state, new_primary_state);
-
 	/* Display WA 827 */
 	if (!needs_nv12_wa(old_crtc_state) &&
 	    needs_nv12_wa(new_crtc_state))
-- 
2.23.0

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[Intel-gfx] [PATCH 3/6] drm/i915/fbc: Move the plane state check into the fbc functions

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Instead of dealing with the presence/absence of the primary
plane in the higher level pre/post plane update code let's
move all that into the fbc code itself. Now the higher level
code doesn't have to think about FBC details anymore.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 26 +++----------
 drivers/gpu/drm/i915/display/intel_fbc.c     | 40 +++++++++++++++-----
 drivers/gpu/drm/i915/display/intel_fbc.h     | 13 +++----
 3 files changed, 42 insertions(+), 37 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 8f14352a2193..3e540fcca216 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -6013,13 +6013,10 @@ static void intel_post_plane_update(struct intel_atomic_state *state,
 				    struct intel_crtc *crtc)
 {
 	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
-	struct intel_plane *primary = to_intel_plane(crtc->base.primary);
 	const struct intel_crtc_state *old_crtc_state =
 		intel_atomic_get_old_crtc_state(state, crtc);
 	const struct intel_crtc_state *new_crtc_state =
 		intel_atomic_get_new_crtc_state(state, crtc);
-	const struct intel_plane_state *new_primary_state =
-		intel_atomic_get_new_plane_state(state, primary);
 	enum pipe pipe = crtc->pipe;
 
 	intel_frontbuffer_flip(dev_priv, new_crtc_state->fb_bits);
@@ -6030,8 +6027,7 @@ static void intel_post_plane_update(struct intel_atomic_state *state,
 	if (hsw_post_update_enable_ips(old_crtc_state, new_crtc_state))
 		hsw_enable_ips(new_crtc_state);
 
-	if (new_primary_state)
-		intel_fbc_post_update(crtc);
+	intel_fbc_post_update(state, crtc);
 
 	if (needs_nv12_wa(old_crtc_state) &&
 	    !needs_nv12_wa(new_crtc_state))
@@ -6046,20 +6042,16 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
 				   struct intel_crtc *crtc)
 {
 	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
-	struct intel_plane *primary = to_intel_plane(crtc->base.primary);
 	const struct intel_crtc_state *old_crtc_state =
 		intel_atomic_get_old_crtc_state(state, crtc);
 	const struct intel_crtc_state *new_crtc_state =
 		intel_atomic_get_new_crtc_state(state, crtc);
-	const struct intel_plane_state *new_primary_state =
-		intel_atomic_get_new_plane_state(state, primary);
 	enum pipe pipe = crtc->pipe;
 
 	if (hsw_pre_update_disable_ips(old_crtc_state, new_crtc_state))
 		hsw_disable_ips(old_crtc_state);
 
-	if (new_primary_state &&
-	    intel_fbc_pre_update(crtc, new_crtc_state, new_primary_state))
+	if (intel_fbc_pre_update(state, crtc))
 		intel_wait_for_vblank(dev_priv, pipe);
 
 	/* Display WA 827 */
@@ -14289,9 +14281,6 @@ static void intel_update_crtc(struct intel_crtc *crtc,
 {
 	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
 	bool modeset = needs_modeset(new_crtc_state);
-	struct intel_plane_state *new_plane_state =
-		intel_atomic_get_new_plane_state(state,
-						 to_intel_plane(crtc->base.primary));
 
 	if (modeset) {
 		intel_crtc_update_active_timings(new_crtc_state);
@@ -14314,8 +14303,8 @@ static void intel_update_crtc(struct intel_crtc *crtc,
 
 	if (new_crtc_state->update_pipe && !new_crtc_state->enable_fbc)
 		intel_fbc_disable(crtc);
-	else if (new_plane_state)
-		intel_fbc_enable(crtc, new_crtc_state, new_plane_state);
+	else
+		intel_fbc_enable(state, crtc);
 
 	/* Perform vblank evasion around commit operation */
 	intel_pipe_update_start(new_crtc_state);
@@ -14472,15 +14461,12 @@ static void intel_post_crtc_enable_updates(struct intel_crtc *crtc,
 		intel_atomic_get_new_crtc_state(state, crtc);
 	struct intel_crtc_state *old_crtc_state =
 		intel_atomic_get_old_crtc_state(state, crtc);
-	struct intel_plane_state *new_plane_state =
-		intel_atomic_get_new_plane_state(state,
-						 to_intel_plane(crtc->base.primary));
 	bool modeset = needs_modeset(new_crtc_state);
 
 	if (new_crtc_state->update_pipe && !new_crtc_state->enable_fbc)
 		intel_fbc_disable(crtc);
-	else if (new_plane_state)
-		intel_fbc_enable(crtc, new_crtc_state, new_plane_state);
+	else
+		intel_fbc_enable(state, crtc);
 
 	/* Perform vblank evasion around commit operation */
 	intel_pipe_update_start(new_crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index a1048ece541e..42504e6353d5 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -867,10 +867,14 @@ static bool intel_fbc_can_flip_nuke(const struct intel_crtc_state *crtc_state)
 	return true;
 }
 
-bool intel_fbc_pre_update(struct intel_crtc *crtc,
-			  const struct intel_crtc_state *crtc_state,
-			  const struct intel_plane_state *plane_state)
+bool intel_fbc_pre_update(struct intel_atomic_state *state,
+			  struct intel_crtc *crtc)
 {
+	struct intel_plane *plane = to_intel_plane(crtc->base.primary);
+	const struct intel_crtc_state *crtc_state =
+		intel_atomic_get_new_crtc_state(state, crtc);
+	const struct intel_plane_state *plane_state =
+		intel_atomic_get_new_plane_state(state, plane);
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	struct intel_fbc *fbc = &dev_priv->fbc;
 	const char *reason = "update pending";
@@ -879,6 +883,9 @@ bool intel_fbc_pre_update(struct intel_crtc *crtc,
 	if (!fbc_supported(dev_priv))
 		return need_vblank_wait;
 
+	if (!plane_state)
+		return need_vblank_wait;
+
 	mutex_lock(&fbc->lock);
 
 	if (fbc->crtc != crtc)
@@ -967,14 +974,21 @@ static void __intel_fbc_post_update(struct intel_crtc *crtc)
 		intel_fbc_deactivate(dev_priv, "frontbuffer write");
 }
 
-void intel_fbc_post_update(struct intel_crtc *crtc)
+void intel_fbc_post_update(struct intel_atomic_state *state,
+			   struct intel_crtc *crtc)
 {
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+	struct intel_plane *plane = to_intel_plane(crtc->base.primary);
+	const struct intel_plane_state *plane_state =
+		intel_atomic_get_new_plane_state(state, plane);
 	struct intel_fbc *fbc = &dev_priv->fbc;
 
 	if (!fbc_supported(dev_priv))
 		return;
 
+	if (!plane_state)
+		return;
+
 	mutex_lock(&fbc->lock);
 	__intel_fbc_post_update(crtc);
 	mutex_unlock(&fbc->lock);
@@ -1107,18 +1121,24 @@ void intel_fbc_choose_crtc(struct drm_i915_private *dev_priv,
  * intel_fbc_enable multiple times for the same pipe without an
  * intel_fbc_disable in the middle, as long as it is deactivated.
  */
-void intel_fbc_enable(struct intel_crtc *crtc,
-		      const struct intel_crtc_state *crtc_state,
-		      const struct intel_plane_state *plane_state)
+void intel_fbc_enable(struct intel_atomic_state *state,
+		      struct intel_crtc *crtc)
 {
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+	struct intel_plane *plane = to_intel_plane(crtc->base.primary);
+	const struct intel_crtc_state *crtc_state =
+		intel_atomic_get_new_crtc_state(state, crtc);
+	const struct intel_plane_state *plane_state =
+		intel_atomic_get_new_plane_state(state, plane);
 	struct intel_fbc *fbc = &dev_priv->fbc;
 	struct intel_fbc_state_cache *cache = &fbc->state_cache;
-	const struct drm_framebuffer *fb = plane_state->hw.fb;
 
 	if (!fbc_supported(dev_priv))
 		return;
 
+	if (!plane_state)
+		return;
+
 	mutex_lock(&fbc->lock);
 
 	if (fbc->crtc) {
@@ -1139,14 +1159,14 @@ void intel_fbc_enable(struct intel_crtc *crtc,
 
 	if (intel_fbc_alloc_cfb(dev_priv,
 				intel_fbc_calculate_cfb_size(dev_priv, cache),
-				fb->format->cpp[0])) {
+				plane_state->hw.fb->format->cpp[0])) {
 		cache->plane.visible = false;
 		fbc->no_fbc_reason = "not enough stolen memory";
 		goto out;
 	}
 
 	if ((IS_GEN9_BC(dev_priv) || IS_BROXTON(dev_priv)) &&
-	    fb->modifier != I915_FORMAT_MOD_X_TILED)
+	    plane_state->hw.fb->modifier != I915_FORMAT_MOD_X_TILED)
 		cache->gen9_wa_cfb_stride =
 			DIV_ROUND_UP(cache->plane.src_w, 32 * fbc->threshold) * 8;
 	else
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.h b/drivers/gpu/drm/i915/display/intel_fbc.h
index c8a5e5098687..6dc1edefe81b 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.h
+++ b/drivers/gpu/drm/i915/display/intel_fbc.h
@@ -19,14 +19,13 @@ struct intel_plane_state;
 void intel_fbc_choose_crtc(struct drm_i915_private *dev_priv,
 			   struct intel_atomic_state *state);
 bool intel_fbc_is_active(struct drm_i915_private *dev_priv);
-bool intel_fbc_pre_update(struct intel_crtc *crtc,
-			  const struct intel_crtc_state *crtc_state,
-			  const struct intel_plane_state *plane_state);
-void intel_fbc_post_update(struct intel_crtc *crtc);
+bool intel_fbc_pre_update(struct intel_atomic_state *state,
+			  struct intel_crtc *crtc);
+void intel_fbc_post_update(struct intel_atomic_state *state,
+			   struct intel_crtc *crtc);
 void intel_fbc_init(struct drm_i915_private *dev_priv);
-void intel_fbc_enable(struct intel_crtc *crtc,
-		      const struct intel_crtc_state *crtc_state,
-		      const struct intel_plane_state *plane_state);
+void intel_fbc_enable(struct intel_atomic_state *state,
+		      struct intel_crtc *crtc);
 void intel_fbc_disable(struct intel_crtc *crtc);
 void intel_fbc_global_disable(struct drm_i915_private *dev_priv);
 void intel_fbc_invalidate(struct drm_i915_private *dev_priv,
-- 
2.23.0

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[Intel-gfx] [PATCH 4/6] drm/i915/fbc: Nuke fbc_supported()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

fbc_supported() is just a pointless wrapper for HAS_FBC(). Get
rid of it. In places where we're operating on a specific plane
we can replace this with a plane->has_fbc check to avoid
doing anything for crtcs that don't even support fbc.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 33 +++++++-----------------
 1 file changed, 10 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 42504e6353d5..28adf4636800 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -45,11 +45,6 @@
 #include "intel_fbc.h"
 #include "intel_frontbuffer.h"
 
-static inline bool fbc_supported(struct drm_i915_private *dev_priv)
-{
-	return HAS_FBC(dev_priv);
-}
-
 /*
  * In some platforms where the CRTC's x:0/y:0 coordinates doesn't match the
  * frontbuffer's x:0/y:0 coordinates we lie to the hardware about the plane's
@@ -543,7 +538,7 @@ void intel_fbc_cleanup_cfb(struct drm_i915_private *dev_priv)
 {
 	struct intel_fbc *fbc = &dev_priv->fbc;
 
-	if (!fbc_supported(dev_priv))
+	if (!HAS_FBC(dev_priv))
 		return;
 
 	mutex_lock(&fbc->lock);
@@ -880,10 +875,7 @@ bool intel_fbc_pre_update(struct intel_atomic_state *state,
 	const char *reason = "update pending";
 	bool need_vblank_wait = false;
 
-	if (!fbc_supported(dev_priv))
-		return need_vblank_wait;
-
-	if (!plane_state)
+	if (!plane->has_fbc || !plane_state)
 		return need_vblank_wait;
 
 	mutex_lock(&fbc->lock);
@@ -983,10 +975,7 @@ void intel_fbc_post_update(struct intel_atomic_state *state,
 		intel_atomic_get_new_plane_state(state, plane);
 	struct intel_fbc *fbc = &dev_priv->fbc;
 
-	if (!fbc_supported(dev_priv))
-		return;
-
-	if (!plane_state)
+	if (!plane->has_fbc || !plane_state)
 		return;
 
 	mutex_lock(&fbc->lock);
@@ -1008,7 +997,7 @@ void intel_fbc_invalidate(struct drm_i915_private *dev_priv,
 {
 	struct intel_fbc *fbc = &dev_priv->fbc;
 
-	if (!fbc_supported(dev_priv))
+	if (!HAS_FBC(dev_priv))
 		return;
 
 	if (origin == ORIGIN_GTT || origin == ORIGIN_FLIP)
@@ -1029,7 +1018,7 @@ void intel_fbc_flush(struct drm_i915_private *dev_priv,
 {
 	struct intel_fbc *fbc = &dev_priv->fbc;
 
-	if (!fbc_supported(dev_priv))
+	if (!HAS_FBC(dev_priv))
 		return;
 
 	mutex_lock(&fbc->lock);
@@ -1133,10 +1122,7 @@ void intel_fbc_enable(struct intel_atomic_state *state,
 	struct intel_fbc *fbc = &dev_priv->fbc;
 	struct intel_fbc_state_cache *cache = &fbc->state_cache;
 
-	if (!fbc_supported(dev_priv))
-		return;
-
-	if (!plane_state)
+	if (!plane->has_fbc || !plane_state)
 		return;
 
 	mutex_lock(&fbc->lock);
@@ -1189,9 +1175,10 @@ void intel_fbc_enable(struct intel_atomic_state *state,
 void intel_fbc_disable(struct intel_crtc *crtc)
 {
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+	struct intel_plane *plane = to_intel_plane(crtc->base.primary);
 	struct intel_fbc *fbc = &dev_priv->fbc;
 
-	if (!fbc_supported(dev_priv))
+	if (!plane->has_fbc)
 		return;
 
 	mutex_lock(&fbc->lock);
@@ -1210,7 +1197,7 @@ void intel_fbc_global_disable(struct drm_i915_private *dev_priv)
 {
 	struct intel_fbc *fbc = &dev_priv->fbc;
 
-	if (!fbc_supported(dev_priv))
+	if (!HAS_FBC(dev_priv))
 		return;
 
 	mutex_lock(&fbc->lock);
@@ -1287,7 +1274,7 @@ void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *dev_priv)
 {
 	struct intel_fbc *fbc = &dev_priv->fbc;
 
-	if (!fbc_supported(dev_priv))
+	if (!HAS_FBC(dev_priv))
 		return;
 
 	/* There's no guarantee that underrun_detected won't be set to true
-- 
2.23.0

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[Intel-gfx] [PATCH 5/6] drm/i915/fbc: Add fbc tracepoints

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Add tracepoints which let us know when fbc activates/deactivates/nukes.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c |  9 ++++
 drivers/gpu/drm/i915/i915_trace.h        | 62 ++++++++++++++++++++++++
 2 files changed, 71 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 28adf4636800..88a9c2fea695 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -41,6 +41,7 @@
 #include <drm/drm_fourcc.h>
 
 #include "i915_drv.h"
+#include "i915_trace.h"
 #include "intel_display_types.h"
 #include "intel_fbc.h"
 #include "intel_frontbuffer.h"
@@ -200,6 +201,10 @@ static bool g4x_fbc_is_active(struct drm_i915_private *dev_priv)
 /* This function forces a CFB recompression through the nuke operation. */
 static void intel_fbc_recompress(struct drm_i915_private *dev_priv)
 {
+	struct intel_fbc *fbc = &dev_priv->fbc;
+
+	trace_intel_fbc_nuke(fbc->crtc);
+
 	I915_WRITE(MSG_FBC_REND_STATE, FBC_REND_NUKE);
 	POSTING_READ(MSG_FBC_REND_STATE);
 }
@@ -356,6 +361,8 @@ static void intel_fbc_hw_activate(struct drm_i915_private *dev_priv)
 {
 	struct intel_fbc *fbc = &dev_priv->fbc;
 
+	trace_intel_fbc_activate(fbc->crtc);
+
 	fbc->active = true;
 	fbc->activated = true;
 
@@ -373,6 +380,8 @@ static void intel_fbc_hw_deactivate(struct drm_i915_private *dev_priv)
 {
 	struct intel_fbc *fbc = &dev_priv->fbc;
 
+	trace_intel_fbc_deactivate(fbc->crtc);
+
 	fbc->active = false;
 
 	if (INTEL_GEN(dev_priv) >= 5)
diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
index 7ef7a1e1664c..66ff96303b95 100644
--- a/drivers/gpu/drm/i915/i915_trace.h
+++ b/drivers/gpu/drm/i915/i915_trace.h
@@ -339,6 +339,68 @@ TRACE_EVENT(intel_disable_plane,
 		      __entry->frame, __entry->scanline)
 );
 
+/* fbc */
+
+TRACE_EVENT(intel_fbc_activate,
+	    TP_PROTO(struct intel_crtc *crtc),
+	    TP_ARGS(crtc),
+
+	    TP_STRUCT__entry(
+			     __field(enum pipe, pipe)
+			     __field(u32, frame)
+			     __field(u32, scanline)
+			     ),
+
+	    TP_fast_assign(
+			   __entry->pipe = crtc->pipe;
+			   __entry->frame = intel_crtc_get_vblank_counter(crtc);
+			   __entry->scanline = intel_get_crtc_scanline(crtc);
+			   ),
+
+	    TP_printk("pipe %c, frame=%u, scanline=%u",
+		      pipe_name(__entry->pipe), __entry->frame, __entry->scanline)
+);
+
+TRACE_EVENT(intel_fbc_deactivate,
+	    TP_PROTO(struct intel_crtc *crtc),
+	    TP_ARGS(crtc),
+
+	    TP_STRUCT__entry(
+			     __field(enum pipe, pipe)
+			     __field(u32, frame)
+			     __field(u32, scanline)
+			     ),
+
+	    TP_fast_assign(
+			   __entry->pipe = crtc->pipe;
+			   __entry->frame = intel_crtc_get_vblank_counter(crtc);
+			   __entry->scanline = intel_get_crtc_scanline(crtc);
+			   ),
+
+	    TP_printk("pipe %c, frame=%u, scanline=%u",
+		      pipe_name(__entry->pipe), __entry->frame, __entry->scanline)
+);
+
+TRACE_EVENT(intel_fbc_nuke,
+	    TP_PROTO(struct intel_crtc *crtc),
+	    TP_ARGS(crtc),
+
+	    TP_STRUCT__entry(
+			     __field(enum pipe, pipe)
+			     __field(u32, frame)
+			     __field(u32, scanline)
+			     ),
+
+	    TP_fast_assign(
+			   __entry->pipe = crtc->pipe;
+			   __entry->frame = intel_crtc_get_vblank_counter(crtc);
+			   __entry->scanline = intel_get_crtc_scanline(crtc);
+			   ),
+
+	    TP_printk("pipe %c, frame=%u, scanline=%u",
+		      pipe_name(__entry->pipe), __entry->frame, __entry->scanline)
+);
+
 /* pipe updates */
 
 TRACE_EVENT(i915_pipe_update_start,
-- 
2.23.0

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[Intel-gfx] [PATCH 6/6] drm/i915: Rename pipe update tracepoints

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

All the other display related tracepoints use intel_ instead
if i915_ as the prefix. Do the same for the pipe update
tracepoints so I don't always have to spend time looking for
them.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_sprite.c | 6 +++---
 drivers/gpu/drm/i915/i915_trace.h           | 6 +++---
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 8394502b092d..a5b7cab6dff3 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -120,7 +120,7 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state)
 
 	crtc->debug.min_vbl = min;
 	crtc->debug.max_vbl = max;
-	trace_i915_pipe_update_start(crtc);
+	trace_intel_pipe_update_start(crtc);
 
 	for (;;) {
 		/*
@@ -173,7 +173,7 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state)
 	crtc->debug.start_vbl_time = ktime_get();
 	crtc->debug.start_vbl_count = intel_crtc_get_vblank_counter(crtc);
 
-	trace_i915_pipe_update_vblank_evaded(crtc);
+	trace_intel_pipe_update_vblank_evaded(crtc);
 	return;
 
 irq_disable:
@@ -197,7 +197,7 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state)
 	ktime_t end_vbl_time = ktime_get();
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 
-	trace_i915_pipe_update_end(crtc, end_vbl_count, scanline_end);
+	trace_intel_pipe_update_end(crtc, end_vbl_count, scanline_end);
 
 	/* We're still in the vblank-evade critical section, this can't race.
 	 * Would be slightly nice to just grab the vblank count and arm the
diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
index 66ff96303b95..162c76a9d1e8 100644
--- a/drivers/gpu/drm/i915/i915_trace.h
+++ b/drivers/gpu/drm/i915/i915_trace.h
@@ -403,7 +403,7 @@ TRACE_EVENT(intel_fbc_nuke,
 
 /* pipe updates */
 
-TRACE_EVENT(i915_pipe_update_start,
+TRACE_EVENT(intel_pipe_update_start,
 	    TP_PROTO(struct intel_crtc *crtc),
 	    TP_ARGS(crtc),
 
@@ -428,7 +428,7 @@ TRACE_EVENT(i915_pipe_update_start,
 		       __entry->scanline, __entry->min, __entry->max)
 );
 
-TRACE_EVENT(i915_pipe_update_vblank_evaded,
+TRACE_EVENT(intel_pipe_update_vblank_evaded,
 	    TP_PROTO(struct intel_crtc *crtc),
 	    TP_ARGS(crtc),
 
@@ -453,7 +453,7 @@ TRACE_EVENT(i915_pipe_update_vblank_evaded,
 		       __entry->scanline, __entry->min, __entry->max)
 );
 
-TRACE_EVENT(i915_pipe_update_end,
+TRACE_EVENT(intel_pipe_update_end,
 	    TP_PROTO(struct intel_crtc *crtc, u32 frame, int scanline_end),
 	    TP_ARGS(crtc, frame, scanline_end),
 
-- 
2.23.0

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Re: [Intel-gfx] [PATCH 2/6] drm/i915/fbc: Remove second redundant intel_fbc_pre_update() call

[Chris Wilson]

Quoting Ville Syrjala (2019-12-13 13:34:49)
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> I fumbled the conflict resolution a bit when applying the
> fbc vblank wait w/a. Because of that we now call intel_fbc_pre_update()
> twice. Remove the second redundant call.
> 
> Reported-by: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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Re: [Intel-gfx] [PATCH 6/6] drm/i915: Rename pipe update tracepoints

[Chris Wilson]

Quoting Ville Syrjala (2019-12-13 13:34:53)
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> All the other display related tracepoints use intel_ instead
> if i915_ as the prefix. Do the same for the pipe update
> tracepoints so I don't always have to spend time looking for
> them.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Makes sense, keeps intel to roughly mean HW events,
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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Re: [Intel-gfx] [PATCH 5/6] drm/i915/fbc: Add fbc tracepoints

[Chris Wilson]

Quoting Ville Syrjala (2019-12-13 13:34:52)
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Add tracepoints which let us know when fbc activates/deactivates/nukes.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Passing comment, prepare for multiple devices?
-Chris
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Re: [Intel-gfx] [PATCH 4/6] drm/i915/fbc: Nuke fbc_supported()

[Chris Wilson]

Quoting Ville Syrjala (2019-12-13 13:34:51)
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> fbc_supported() is just a pointless wrapper for HAS_FBC(). Get
> rid of it. In places where we're operating on a specific plane
> we can replace this with a plane->has_fbc check to avoid
> doing anything for crtcs that don't even support fbc.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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Re: [Intel-gfx] [PATCH 5/6] drm/i915/fbc: Add fbc tracepoints

[Ville Syrjälä]

On Fri, Dec 13, 2019 at 01:41:55PM +0000, Chris Wilson wrote:
> Quoting Ville Syrjala (2019-12-13 13:34:52)
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Add tracepoints which let us know when fbc activates/deactivates/nukes.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Passing comment, prepare for multiple devices?

Yeah, we should add the device to most tracepoints somehow. However
not quite sure what the best way to do that is. Would be nice if we
could use the filter thing to filter based on the device. Can't
immediately see any standard thing for that in ftrace so I guess
we need to roll something ourselves.

-- 
Ville Syrjälä
Intel
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/6] drm/i915/fbc: Reject PLANE_OFFSET.y%4!=0 on icl+ too

[Patchwork]

== Series Details ==

Series: series starting with [1/6] drm/i915/fbc: Reject PLANE_OFFSET.y%4!=0 on icl+ too
URL   : https://patchwork.freedesktop.org/series/70883/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
ebb81ae8272f drm/i915/fbc: Reject PLANE_OFFSET.y%4!=0 on icl+ too
b4e5657e75ab drm/i915/fbc: Remove second redundant intel_fbc_pre_update() call
54e2dc31a9c3 drm/i915/fbc: Move the plane state check into the fbc functions
a84c1d1acf34 drm/i915/fbc: Nuke fbc_supported()
a9bc1b69a844 drm/i915/fbc: Add fbc tracepoints
-:68: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#68: FILE: drivers/gpu/drm/i915/i915_trace.h:348:
+	    TP_STRUCT__entry(

-:74: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#74: FILE: drivers/gpu/drm/i915/i915_trace.h:354:
+	    TP_fast_assign(

-:88: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#88: FILE: drivers/gpu/drm/i915/i915_trace.h:368:
+	    TP_STRUCT__entry(

-:94: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#94: FILE: drivers/gpu/drm/i915/i915_trace.h:374:
+	    TP_fast_assign(

-:108: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#108: FILE: drivers/gpu/drm/i915/i915_trace.h:388:
+	    TP_STRUCT__entry(

-:114: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#114: FILE: drivers/gpu/drm/i915/i915_trace.h:394:
+	    TP_fast_assign(

total: 0 errors, 0 warnings, 6 checks, 101 lines checked
b2bd1c12ad0d drm/i915: Rename pipe update tracepoints

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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] drm/i915/fbc: Reject PLANE_OFFSET.y%4!=0 on icl+ too

[Patchwork]

== Series Details ==

Series: series starting with [1/6] drm/i915/fbc: Reject PLANE_OFFSET.y%4!=0 on icl+ too
URL   : https://patchwork.freedesktop.org/series/70883/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7559 -> Patchwork_15745
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/index.html

Known issues
------------

  Here are the changes found in Patchwork_15745 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live_blt:
    - fi-hsw-4770r:       [PASS][1] -> [DMESG-FAIL][2] ([i915#553] / [i915#725])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/fi-hsw-4770r/igt@i915_selftest@live_blt.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/fi-hsw-4770r/igt@i915_selftest@live_blt.html

  
#### Possible fixes ####

  * igt@i915_selftest@live_requests:
    - fi-ivb-3770:        [INCOMPLETE][3] ([i915#773]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/fi-ivb-3770/igt@i915_selftest@live_requests.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/fi-ivb-3770/igt@i915_selftest@live_requests.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][5] ([fdo#111407]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  
#### Warnings ####

  * igt@i915_selftest@live_gem_contexts:
    - fi-hsw-peppy:       [DMESG-FAIL][7] ([i915#722]) -> [INCOMPLETE][8] ([i915#694])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/fi-hsw-peppy/igt@i915_selftest@live_gem_contexts.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/fi-hsw-peppy/igt@i915_selftest@live_gem_contexts.html
    - fi-byt-n2820:       [DMESG-FAIL][9] -> [INCOMPLETE][10] ([i915#45])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/fi-byt-n2820/igt@i915_selftest@live_gem_contexts.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/fi-byt-n2820/igt@i915_selftest@live_gem_contexts.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
    - fi-kbl-x1275:       [DMESG-WARN][11] ([i915#62] / [i915#92]) -> [DMESG-WARN][12] ([i915#62] / [i915#92] / [i915#95]) +6 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/fi-kbl-x1275/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/fi-kbl-x1275/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html

  * igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size:
    - fi-kbl-x1275:       [DMESG-WARN][13] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][14] ([i915#62] / [i915#92]) +3 similar issues
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/fi-kbl-x1275/igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/fi-kbl-x1275/igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size.html

  
  [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
  [i915#45]: https://gitlab.freedesktop.org/drm/intel/issues/45
  [i915#553]: https://gitlab.freedesktop.org/drm/intel/issues/553
  [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
  [i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
  [i915#722]: https://gitlab.freedesktop.org/drm/intel/issues/722
  [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
  [i915#773]: https://gitlab.freedesktop.org/drm/intel/issues/773
  [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95


Participating hosts (54 -> 47)
------------------------------

  Additional (1): fi-whl-u 
  Missing    (8): fi-icl-1065g7 fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7559 -> Patchwork_15745

  CI-20190529: 20190529
  CI_DRM_7559: 20e59a24767007b53544c05d51ebeb874dbf194d @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5349: 048f58513d8b8ec6bb307a939f0ac959bc0f0e10 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_15745: b2bd1c12ad0dc481565048b5b36d8931aaf22965 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

b2bd1c12ad0d drm/i915: Rename pipe update tracepoints
a9bc1b69a844 drm/i915/fbc: Add fbc tracepoints
a84c1d1acf34 drm/i915/fbc: Nuke fbc_supported()
54e2dc31a9c3 drm/i915/fbc: Move the plane state check into the fbc functions
b4e5657e75ab drm/i915/fbc: Remove second redundant intel_fbc_pre_update() call
ebb81ae8272f drm/i915/fbc: Reject PLANE_OFFSET.y%4!=0 on icl+ too

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/index.html
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[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/6] drm/i915/fbc: Reject PLANE_OFFSET.y%4!=0 on icl+ too

[Patchwork]

== Series Details ==

Series: series starting with [1/6] drm/i915/fbc: Reject PLANE_OFFSET.y%4!=0 on icl+ too
URL   : https://patchwork.freedesktop.org/series/70883/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7559_full -> Patchwork_15745_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_15745_full:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@gen9_exec_parse@allowed-single}:
    - shard-skl:          [PASS][1] -> [DMESG-WARN][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-skl7/igt@gen9_exec_parse@allowed-single.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-skl4/igt@gen9_exec_parse@allowed-single.html

  * {igt@gen9_exec_parse@bb-secure}:
    - shard-tglb:         NOTRUN -> [SKIP][3] +3 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-tglb9/igt@gen9_exec_parse@bb-secure.html

  * {igt@gen9_exec_parse@bb-start-param}:
    - shard-iclb:         NOTRUN -> [SKIP][4]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-iclb3/igt@gen9_exec_parse@bb-start-param.html

  
Known issues
------------

  Here are the changes found in Patchwork_15745_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_isolation@rcs0-s3:
    - shard-apl:          [PASS][5] -> [DMESG-WARN][6] ([i915#180]) +3 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-apl4/igt@gem_ctx_isolation@rcs0-s3.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-apl6/igt@gem_ctx_isolation@rcs0-s3.html

  * igt@gem_ctx_isolation@vecs0-s3:
    - shard-skl:          [PASS][7] -> [INCOMPLETE][8] ([i915#69]) +1 similar issue
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-skl2/igt@gem_ctx_isolation@vecs0-s3.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-skl3/igt@gem_ctx_isolation@vecs0-s3.html

  * igt@gem_ctx_persistence@vcs1-mixed-process:
    - shard-iclb:         [PASS][9] -> [SKIP][10] ([fdo#109276] / [fdo#112080]) +2 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-iclb4/igt@gem_ctx_persistence@vcs1-mixed-process.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-iclb3/igt@gem_ctx_persistence@vcs1-mixed-process.html

  * igt@gem_eio@in-flight-suspend:
    - shard-tglb:         [PASS][11] -> [INCOMPLETE][12] ([i915#456] / [i915#460] / [i915#534])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-tglb1/igt@gem_eio@in-flight-suspend.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-tglb2/igt@gem_eio@in-flight-suspend.html

  * igt@gem_exec_balancer@bonded-slice:
    - shard-tglb:         [PASS][13] -> [FAIL][14] ([i915#800])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-tglb4/igt@gem_exec_balancer@bonded-slice.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-tglb3/igt@gem_exec_balancer@bonded-slice.html

  * igt@gem_exec_balancer@nop:
    - shard-tglb:         [PASS][15] -> [INCOMPLETE][16] ([fdo#111736])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-tglb4/igt@gem_exec_balancer@nop.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-tglb4/igt@gem_exec_balancer@nop.html

  * igt@gem_exec_parallel@fds:
    - shard-tglb:         [PASS][17] -> [INCOMPLETE][18] ([i915#470])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-tglb1/igt@gem_exec_parallel@fds.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-tglb6/igt@gem_exec_parallel@fds.html

  * igt@gem_exec_schedule@preempt-other-chain-bsd:
    - shard-iclb:         [PASS][19] -> [SKIP][20] ([fdo#112146]) +1 similar issue
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-iclb8/igt@gem_exec_schedule@preempt-other-chain-bsd.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-iclb4/igt@gem_exec_schedule@preempt-other-chain-bsd.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
    - shard-tglb:         [PASS][21] -> [FAIL][22] ([i915#644])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-tglb7/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-tglb1/igt@gem_ppgtt@flink-and-close-vma-leak.html

  * igt@gem_sync@basic-each:
    - shard-tglb:         [PASS][23] -> [INCOMPLETE][24] ([i915#472] / [i915#707])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-tglb4/igt@gem_sync@basic-each.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-tglb3/igt@gem_sync@basic-each.html

  * igt@gem_tiled_blits@interruptible:
    - shard-hsw:          [PASS][25] -> [FAIL][26] ([i915#818])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-hsw4/igt@gem_tiled_blits@interruptible.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-hsw1/igt@gem_tiled_blits@interruptible.html

  * igt@gem_userptr_blits@sync-unmap-cycles:
    - shard-snb:          [PASS][27] -> [DMESG-WARN][28] ([fdo#111870]) +1 similar issue
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-snb6/igt@gem_userptr_blits@sync-unmap-cycles.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-snb4/igt@gem_userptr_blits@sync-unmap-cycles.html

  * igt@i915_hangman@error-state-capture-vcs1:
    - shard-iclb:         [PASS][29] -> [SKIP][30] ([fdo#112080]) +2 similar issues
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-iclb1/igt@i915_hangman@error-state-capture-vcs1.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-iclb8/igt@i915_hangman@error-state-capture-vcs1.html

  * igt@i915_selftest@live_requests:
    - shard-tglb:         [PASS][31] -> [INCOMPLETE][32] ([fdo#112057])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-tglb2/igt@i915_selftest@live_requests.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-tglb7/igt@i915_selftest@live_requests.html

  * igt@kms_color@pipe-a-ctm-0-25:
    - shard-skl:          [PASS][33] -> [DMESG-WARN][34] ([i915#109])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-skl3/igt@kms_color@pipe-a-ctm-0-25.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-skl9/igt@kms_color@pipe-a-ctm-0-25.html

  * igt@kms_cursor_crc@pipe-a-cursor-128x42-sliding:
    - shard-skl:          [PASS][35] -> [FAIL][36] ([i915#54]) +3 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-skl5/igt@kms_cursor_crc@pipe-a-cursor-128x42-sliding.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-skl1/igt@kms_cursor_crc@pipe-a-cursor-128x42-sliding.html

  * igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen:
    - shard-hsw:          [PASS][37] -> [DMESG-WARN][38] ([IGT#6])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-hsw6/igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-hsw6/igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-glk:          [PASS][39] -> [FAIL][40] ([i915#79]) +1 similar issue
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-glk8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-glk7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-hsw:          [PASS][41] -> [INCOMPLETE][42] ([i915#61])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-hsw4/igt@kms_flip@flip-vs-suspend.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-hsw5/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-tglb:         [PASS][43] -> [INCOMPLETE][44] ([i915#456] / [i915#460] / [i915#474])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-tglb2/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-tglb8/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite:
    - shard-tglb:         [PASS][45] -> [FAIL][46] ([i915#49]) +1 similar issue
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-tglb9/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary:
    - shard-tglb:         [PASS][47] -> [FAIL][48] ([i915#160])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-tglb7/igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-tglb7/igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary.html
    - shard-iclb:         [PASS][49] -> [FAIL][50] ([i915#160])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-msflip-blt:
    - shard-tglb:         [PASS][51] -> [INCOMPLETE][52] ([i915#435] / [i915#667])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-tglb5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-msflip-blt.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-tglb2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-msflip-blt.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - shard-kbl:          [PASS][53] -> [DMESG-WARN][54] ([i915#180]) +3 similar issues
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-kbl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-kbl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  * igt@kms_plane@pixel-format-pipe-b-planes-source-clamping:
    - shard-skl:          [PASS][55] -> [INCOMPLETE][56] ([fdo#112347] / [fdo#112391] / [i915#648] / [i915#667])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-skl6/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-skl6/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html

  * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
    - shard-skl:          [PASS][57] -> [FAIL][58] ([fdo#108145])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html

  * igt@kms_psr@psr2_sprite_mmap_gtt:
    - shard-iclb:         [PASS][59] -> [SKIP][60] ([fdo#109441]) +1 similar issue
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-iclb8/igt@kms_psr@psr2_sprite_mmap_gtt.html

  * igt@kms_psr@suspend:
    - shard-tglb:         [PASS][61] -> [INCOMPLETE][62] ([i915#456] / [i915#460]) +1 similar issue
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-tglb3/igt@kms_psr@suspend.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-tglb3/igt@kms_psr@suspend.html

  * igt@prime_vgem@fence-wait-bsd2:
    - shard-iclb:         [PASS][63] -> [SKIP][64] ([fdo#109276]) +9 similar issues
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-iclb4/igt@prime_vgem@fence-wait-bsd2.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-iclb3/igt@prime_vgem@fence-wait-bsd2.html

  
#### Possible fixes ####

  * igt@gem_busy@close-race:
    - shard-tglb:         [INCOMPLETE][65] ([i915#435]) -> [PASS][66]
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-tglb6/igt@gem_busy@close-race.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-tglb5/igt@gem_busy@close-race.html

  * igt@gem_ctx_isolation@vcs1-clean:
    - shard-iclb:         [SKIP][67] ([fdo#109276] / [fdo#112080]) -> [PASS][68] +1 similar issue
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-iclb3/igt@gem_ctx_isolation@vcs1-clean.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-iclb4/igt@gem_ctx_isolation@vcs1-clean.html

  * igt@gem_ctx_persistence@vcs0-mixed-process:
    - shard-apl:          [FAIL][69] ([i915#679]) -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-apl7/igt@gem_ctx_persistence@vcs0-mixed-process.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-apl4/igt@gem_ctx_persistence@vcs0-mixed-process.html

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [SKIP][71] ([fdo#110854]) -> [PASS][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-iclb8/igt@gem_exec_balancer@smoke.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-iclb4/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_gttfill@basic:
    - shard-tglb:         [INCOMPLETE][73] ([fdo#111593]) -> [PASS][74]
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-tglb4/igt@gem_exec_gttfill@basic.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-tglb1/igt@gem_exec_gttfill@basic.html

  * {igt@gem_exec_schedule@pi-userfault-bsd2}:
    - shard-iclb:         [SKIP][75] ([fdo#109276]) -> [PASS][76] +8 similar issues
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-iclb3/igt@gem_exec_schedule@pi-userfault-bsd2.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-iclb2/igt@gem_exec_schedule@pi-userfault-bsd2.html

  * igt@gem_exec_schedule@preemptive-hang-bsd:
    - shard-iclb:         [SKIP][77] ([fdo#112146]) -> [PASS][78] +6 similar issues
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-iclb1/igt@gem_exec_schedule@preemptive-hang-bsd.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-iclb8/igt@gem_exec_schedule@preemptive-hang-bsd.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
    - shard-apl:          [FAIL][79] ([i915#644]) -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-apl3/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-apl7/igt@gem_ppgtt@flink-and-close-vma-leak.html

  * igt@gem_userptr_blits@map-fixed-invalidate-busy-gup:
    - shard-snb:          [DMESG-WARN][81] ([fdo#111870]) -> [PASS][82] +1 similar issue
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-snb7/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-snb2/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html

  * {igt@gen9_exec_parse@allowed-single}:
    - shard-kbl:          [DMESG-WARN][83] -> [PASS][84]
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-kbl3/igt@gen9_exec_parse@allowed-single.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-kbl7/igt@gen9_exec_parse@allowed-single.html

  * igt@i915_selftest@mock_sanitycheck:
    - shard-kbl:          [DMESG-WARN][85] ([i915#747]) -> [PASS][86]
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-kbl2/igt@i915_selftest@mock_sanitycheck.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-kbl1/igt@i915_selftest@mock_sanitycheck.html

  * igt@kms_color@pipe-b-ctm-green-to-red:
    - shard-skl:          [DMESG-WARN][87] ([i915#109]) -> [PASS][88]
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-skl4/igt@kms_color@pipe-b-ctm-green-to-red.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-skl8/igt@kms_color@pipe-b-ctm-green-to-red.html

  * igt@kms_cursor_crc@pipe-a-cursor-suspend:
    - shard-kbl:          [DMESG-WARN][89] ([i915#180]) -> [PASS][90] +4 similar issues
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-kbl7/igt@kms_cursor_crc@pipe-a-cursor-suspend.html

  * igt@kms_cursor_crc@pipe-b-cursor-64x21-sliding:
    - shard-skl:          [FAIL][91] ([i915#54]) -> [PASS][92] +4 similar issues
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-skl10/igt@kms_cursor_crc@pipe-b-cursor-64x21-sliding.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-skl2/igt@kms_cursor_crc@pipe-b-cursor-64x21-sliding.html

  * igt@kms_cursor_crc@pipe-c-cursor-128x128-onscreen:
    - shard-hsw:          [DMESG-WARN][93] ([IGT#6]) -> [PASS][94]
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-hsw6/igt@kms_cursor_crc@pipe-c-cursor-128x128-onscreen.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-hsw4/igt@kms_cursor_crc@pipe-c-cursor-128x128-onscreen.html

  * igt@kms_cursor_crc@pipe-c-cursor-128x42-offscreen:
    - shard-iclb:         [DMESG-WARN][95] ([IGT#6]) -> [PASS][96]
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-iclb3/igt@kms_cursor_crc@pipe-c-cursor-128x42-offscreen.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-iclb2/igt@kms_cursor_crc@pipe-c-cursor-128x42-offscreen.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-apl:          [FAIL][97] ([i915#79]) -> [PASS][98]
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-apl3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-apl7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_frontbuffer_tracking@fbcpsr-suspend:
    - shard-tglb:         [INCOMPLETE][99] ([i915#456] / [i915#460] / [i915#474]) -> [PASS][100]
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-tglb7/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html

  * igt@kms_plane@pixel-format-pipe-b-planes:
    - shard-kbl:          [INCOMPLETE][101] ([fdo#103665] / [i915#648] / [i915#667]) -> [PASS][102]
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-kbl1/igt@kms_plane@pixel-format-pipe-b-planes.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-kbl4/igt@kms_plane@pixel-format-pipe-b-planes.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
    - shard-skl:          [FAIL][103] ([fdo#108145]) -> [PASS][104]
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-skl3/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html

  * igt@kms_psr@psr2_suspend:
    - shard-iclb:         [SKIP][105] ([fdo#109441]) -> [PASS][106]
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-iclb3/igt@kms_psr@psr2_suspend.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-iclb2/igt@kms_psr@psr2_suspend.html

  * igt@kms_vblank@pipe-b-ts-continuation-suspend:
    - shard-tglb:         [INCOMPLETE][107] ([i915#456] / [i915#460]) -> [PASS][108]
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-tglb7/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-tglb6/igt@kms_vblank@pipe-b-ts-continuation-suspend.html

  * igt@perf@oa-exponents:
    - shard-glk:          [FAIL][109] ([i915#84]) -> [PASS][110]
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-glk8/igt@perf@oa-exponents.html
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-glk1/igt@perf@oa-exponents.html

  * igt@perf_pmu@busy-no-semaphores-vcs1:
    - shard-iclb:         [SKIP][111] ([fdo#112080]) -> [PASS][112] +4 similar issues
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-iclb3/igt@perf_pmu@busy-no-semaphores-vcs1.html
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-iclb2/igt@perf_pmu@busy-no-semaphores-vcs1.html

  
#### Warnings ####

  * igt@gem_eio@kms:
    - shard-snb:          [DMESG-WARN][113] ([i915#444]) -> [DMESG-WARN][114] ([i915#109] / [i915#443] / [i915#444])
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-snb1/igt@gem_eio@kms.html
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-snb2/igt@gem_eio@kms.html

  * igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary:
    - shard-iclb:         [DMESG-WARN][115] ([fdo#107724]) -> [FAIL][116] ([i915#160])
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html

  * igt@kms_plane@pixel-format-pipe-a-planes-source-clamping:
    - shard-skl:          [INCOMPLETE][117] ([i915#648]) -> [INCOMPLETE][118] ([i915#648] / [i915#667])
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7559/shard-skl6/igt@kms_plane@pixel-format-pipe-a-planes-source-clamping.html
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/shard-skl5/igt@kms_plane@pixel-format-pipe-a-planes-source-clamping.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [IGT#6]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/6
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
  [fdo#111593]: https://bugs.freedesktop.org/show_bug.cgi?id=111593
  [fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736
  [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
  [fdo#112057]: https://bugs.freedesktop.org/show_bug.cgi?id=112057
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
  [fdo#112347]: https://bugs.freedesktop.org/show_bug.cgi?id=112347
  [fdo#112391]: https://bugs.freedesktop.org/show_bug.cgi?id=112391
  [i915#109]: https://gitlab.freedesktop.org/drm/intel/issues/109
  [i915#160]: https://gitlab.freedesktop.org/drm/intel/issues/160
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#435]: https://gitlab.freedesktop.org/drm/intel/issues/435
  [i915#443]: https://gitlab.freedesktop.org/drm/intel/issues/443
  [i915#444]: https://gitlab.freedesktop.org/drm/intel/issues/444
  [i915#456]: https://gitlab.freedesktop.org/drm/intel/issues/456
  [i915#460]: https://gitlab.freedesktop.org/drm/intel/issues/460
  [i915#470]: https://gitlab.freedesktop.org/drm/intel/issues/470
  [i915#472]: https://gitlab.freedesktop.org/drm/intel/issues/472
  [i915#474]: https://gitlab.freedesktop.org/drm/intel/issues/474
  [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
  [i915#534]: https://gitlab.freedesktop.org/drm/intel/issues/534
  [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
  [i915#61]: https://gitlab.freedesktop.org/drm/intel/issues/61
  [i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
  [i915#648]: https://gitlab.freedesktop.org/drm/intel/issues/648
  [i915#667]: https://gitlab.freedesktop.org/drm/intel/issues/667
  [i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
  [i915#679]: https://gitlab.freedesktop.org/drm/intel/issues/679
  [i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
  [i915#707]: https://gitlab.freedesktop.org/drm/intel/issues/707
  [i915#747]: https://gitlab.freedesktop.org/drm/intel/issues/747
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
  [i915#800]: https://gitlab.freedesktop.org/drm/intel/issues/800
  [i915#818]: https://gitlab.freedesktop.org/drm/intel/issues/818
  [i915#84]: https://gitlab.freedesktop.org/drm/intel/issues/84


Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7559 -> Patchwork_15745

  CI-20190529: 20190529
  CI_DRM_7559: 20e59a24767007b53544c05d51ebeb874dbf194d @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5349: 048f58513d8b8ec6bb307a939f0ac959bc0f0e10 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_15745: b2bd1c12ad0dc481565048b5b36d8931aaf22965 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15745/index.html
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Re: [Intel-gfx] [PATCH 1/6] drm/i915/fbc: Reject PLANE_OFFSET.y%4!=0 on icl+ too

[Imre Deak]

On Fri, Dec 13, 2019 at 03:34:48PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> icl and tgl are still affected by the modulo 4 PLANE_OFFSET.y
> underrun issue. Reject such configurations on all gen9+ platforms.
> 
> Can be reproduced easily with the following sequence of
> hardware poking:
> while {
>   write FBC_CTL.enable=1
>   wait for vblank
> 
>   write PLANE_OFFSET .x=0 .y=32
>   write PLANE_SURF
>   wait for vblank
> 
>   # if PLANE_OFFSET.y is multiple of 4 the underrun won't happen
>   write PLANE_OFFSET .x=0 .y=31
>   write PLANE_SURF
>   wait for vblank
> 
>   # extra vblank wait is required here presumably
>   # to get FBC into the proper state
>   wait for vblank
> 
>   write FBC_CTL.enable=0
>   # underrun happens some time after FBC disable
>   wait for vblank
> }
> 
> Both 8888 and 565 pixel formats and all tilinga formats
> seem affected. Reproduced on KBL/GLK/ICL/TGL. BDW confirmed
> not affected.
> 
> Closes: https://gitlab.freedesktop.org/drm/intel/issues/792
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Imre Deak <imre.deak@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 6f1d5c032681..a1048ece541e 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -776,7 +776,7 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc)
>  	 * having a Y offset that isn't divisible by 4 causes FIFO underrun
>  	 * and screen flicker.
>  	 */
> -	if (IS_GEN_RANGE(dev_priv, 9, 10) &&
> +	if (INTEL_GEN(dev_priv) >= 9 &&
>  	    (fbc->state_cache.plane.adjusted_y & 3)) {
>  		fbc->no_fbc_reason = "plane Y offset is misaligned";
>  		return false;
> -- 
> 2.23.0
> 
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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Re: [Intel-gfx] [PATCH 3/6] drm/i915/fbc: Move the plane state check into the fbc functions

[Imre Deak]

On Fri, Dec 13, 2019 at 03:34:50PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Instead of dealing with the presence/absence of the primary
> plane in the higher level pre/post plane update code let's
> move all that into the fbc code itself. Now the higher level
> code doesn't have to think about FBC details anymore.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Imre Deak <imre.deak@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 26 +++----------
>  drivers/gpu/drm/i915/display/intel_fbc.c     | 40 +++++++++++++++-----
>  drivers/gpu/drm/i915/display/intel_fbc.h     | 13 +++----
>  3 files changed, 42 insertions(+), 37 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 8f14352a2193..3e540fcca216 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -6013,13 +6013,10 @@ static void intel_post_plane_update(struct intel_atomic_state *state,
>  				    struct intel_crtc *crtc)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> -	struct intel_plane *primary = to_intel_plane(crtc->base.primary);
>  	const struct intel_crtc_state *old_crtc_state =
>  		intel_atomic_get_old_crtc_state(state, crtc);
>  	const struct intel_crtc_state *new_crtc_state =
>  		intel_atomic_get_new_crtc_state(state, crtc);
> -	const struct intel_plane_state *new_primary_state =
> -		intel_atomic_get_new_plane_state(state, primary);
>  	enum pipe pipe = crtc->pipe;
>  
>  	intel_frontbuffer_flip(dev_priv, new_crtc_state->fb_bits);
> @@ -6030,8 +6027,7 @@ static void intel_post_plane_update(struct intel_atomic_state *state,
>  	if (hsw_post_update_enable_ips(old_crtc_state, new_crtc_state))
>  		hsw_enable_ips(new_crtc_state);
>  
> -	if (new_primary_state)
> -		intel_fbc_post_update(crtc);
> +	intel_fbc_post_update(state, crtc);
>  
>  	if (needs_nv12_wa(old_crtc_state) &&
>  	    !needs_nv12_wa(new_crtc_state))
> @@ -6046,20 +6042,16 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
>  				   struct intel_crtc *crtc)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> -	struct intel_plane *primary = to_intel_plane(crtc->base.primary);
>  	const struct intel_crtc_state *old_crtc_state =
>  		intel_atomic_get_old_crtc_state(state, crtc);
>  	const struct intel_crtc_state *new_crtc_state =
>  		intel_atomic_get_new_crtc_state(state, crtc);
> -	const struct intel_plane_state *new_primary_state =
> -		intel_atomic_get_new_plane_state(state, primary);
>  	enum pipe pipe = crtc->pipe;
>  
>  	if (hsw_pre_update_disable_ips(old_crtc_state, new_crtc_state))
>  		hsw_disable_ips(old_crtc_state);
>  
> -	if (new_primary_state &&
> -	    intel_fbc_pre_update(crtc, new_crtc_state, new_primary_state))
> +	if (intel_fbc_pre_update(state, crtc))
>  		intel_wait_for_vblank(dev_priv, pipe);
>  
>  	/* Display WA 827 */
> @@ -14289,9 +14281,6 @@ static void intel_update_crtc(struct intel_crtc *crtc,
>  {
>  	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
>  	bool modeset = needs_modeset(new_crtc_state);
> -	struct intel_plane_state *new_plane_state =
> -		intel_atomic_get_new_plane_state(state,
> -						 to_intel_plane(crtc->base.primary));
>  
>  	if (modeset) {
>  		intel_crtc_update_active_timings(new_crtc_state);
> @@ -14314,8 +14303,8 @@ static void intel_update_crtc(struct intel_crtc *crtc,
>  
>  	if (new_crtc_state->update_pipe && !new_crtc_state->enable_fbc)
>  		intel_fbc_disable(crtc);
> -	else if (new_plane_state)
> -		intel_fbc_enable(crtc, new_crtc_state, new_plane_state);
> +	else
> +		intel_fbc_enable(state, crtc);
>  
>  	/* Perform vblank evasion around commit operation */
>  	intel_pipe_update_start(new_crtc_state);
> @@ -14472,15 +14461,12 @@ static void intel_post_crtc_enable_updates(struct intel_crtc *crtc,
>  		intel_atomic_get_new_crtc_state(state, crtc);
>  	struct intel_crtc_state *old_crtc_state =
>  		intel_atomic_get_old_crtc_state(state, crtc);
> -	struct intel_plane_state *new_plane_state =
> -		intel_atomic_get_new_plane_state(state,
> -						 to_intel_plane(crtc->base.primary));
>  	bool modeset = needs_modeset(new_crtc_state);
>  
>  	if (new_crtc_state->update_pipe && !new_crtc_state->enable_fbc)
>  		intel_fbc_disable(crtc);
> -	else if (new_plane_state)
> -		intel_fbc_enable(crtc, new_crtc_state, new_plane_state);
> +	else
> +		intel_fbc_enable(state, crtc);
>  
>  	/* Perform vblank evasion around commit operation */
>  	intel_pipe_update_start(new_crtc_state);
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index a1048ece541e..42504e6353d5 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -867,10 +867,14 @@ static bool intel_fbc_can_flip_nuke(const struct intel_crtc_state *crtc_state)
>  	return true;
>  }
>  
> -bool intel_fbc_pre_update(struct intel_crtc *crtc,
> -			  const struct intel_crtc_state *crtc_state,
> -			  const struct intel_plane_state *plane_state)
> +bool intel_fbc_pre_update(struct intel_atomic_state *state,
> +			  struct intel_crtc *crtc)
>  {
> +	struct intel_plane *plane = to_intel_plane(crtc->base.primary);
> +	const struct intel_crtc_state *crtc_state =
> +		intel_atomic_get_new_crtc_state(state, crtc);
> +	const struct intel_plane_state *plane_state =
> +		intel_atomic_get_new_plane_state(state, plane);
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  	struct intel_fbc *fbc = &dev_priv->fbc;
>  	const char *reason = "update pending";
> @@ -879,6 +883,9 @@ bool intel_fbc_pre_update(struct intel_crtc *crtc,
>  	if (!fbc_supported(dev_priv))
>  		return need_vblank_wait;
>  
> +	if (!plane_state)
> +		return need_vblank_wait;
> +
>  	mutex_lock(&fbc->lock);
>  
>  	if (fbc->crtc != crtc)
> @@ -967,14 +974,21 @@ static void __intel_fbc_post_update(struct intel_crtc *crtc)
>  		intel_fbc_deactivate(dev_priv, "frontbuffer write");
>  }
>  
> -void intel_fbc_post_update(struct intel_crtc *crtc)
> +void intel_fbc_post_update(struct intel_atomic_state *state,
> +			   struct intel_crtc *crtc)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> +	struct intel_plane *plane = to_intel_plane(crtc->base.primary);
> +	const struct intel_plane_state *plane_state =
> +		intel_atomic_get_new_plane_state(state, plane);
>  	struct intel_fbc *fbc = &dev_priv->fbc;
>  
>  	if (!fbc_supported(dev_priv))
>  		return;
>  
> +	if (!plane_state)
> +		return;
> +
>  	mutex_lock(&fbc->lock);
>  	__intel_fbc_post_update(crtc);
>  	mutex_unlock(&fbc->lock);
> @@ -1107,18 +1121,24 @@ void intel_fbc_choose_crtc(struct drm_i915_private *dev_priv,
>   * intel_fbc_enable multiple times for the same pipe without an
>   * intel_fbc_disable in the middle, as long as it is deactivated.
>   */
> -void intel_fbc_enable(struct intel_crtc *crtc,
> -		      const struct intel_crtc_state *crtc_state,
> -		      const struct intel_plane_state *plane_state)
> +void intel_fbc_enable(struct intel_atomic_state *state,
> +		      struct intel_crtc *crtc)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> +	struct intel_plane *plane = to_intel_plane(crtc->base.primary);
> +	const struct intel_crtc_state *crtc_state =
> +		intel_atomic_get_new_crtc_state(state, crtc);
> +	const struct intel_plane_state *plane_state =
> +		intel_atomic_get_new_plane_state(state, plane);
>  	struct intel_fbc *fbc = &dev_priv->fbc;
>  	struct intel_fbc_state_cache *cache = &fbc->state_cache;
> -	const struct drm_framebuffer *fb = plane_state->hw.fb;
>  
>  	if (!fbc_supported(dev_priv))
>  		return;
>  
> +	if (!plane_state)
> +		return;
> +
>  	mutex_lock(&fbc->lock);
>  
>  	if (fbc->crtc) {
> @@ -1139,14 +1159,14 @@ void intel_fbc_enable(struct intel_crtc *crtc,
>  
>  	if (intel_fbc_alloc_cfb(dev_priv,
>  				intel_fbc_calculate_cfb_size(dev_priv, cache),
> -				fb->format->cpp[0])) {
> +				plane_state->hw.fb->format->cpp[0])) {
>  		cache->plane.visible = false;
>  		fbc->no_fbc_reason = "not enough stolen memory";
>  		goto out;
>  	}
>  
>  	if ((IS_GEN9_BC(dev_priv) || IS_BROXTON(dev_priv)) &&
> -	    fb->modifier != I915_FORMAT_MOD_X_TILED)
> +	    plane_state->hw.fb->modifier != I915_FORMAT_MOD_X_TILED)
>  		cache->gen9_wa_cfb_stride =
>  			DIV_ROUND_UP(cache->plane.src_w, 32 * fbc->threshold) * 8;
>  	else
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.h b/drivers/gpu/drm/i915/display/intel_fbc.h
> index c8a5e5098687..6dc1edefe81b 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.h
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.h
> @@ -19,14 +19,13 @@ struct intel_plane_state;
>  void intel_fbc_choose_crtc(struct drm_i915_private *dev_priv,
>  			   struct intel_atomic_state *state);
>  bool intel_fbc_is_active(struct drm_i915_private *dev_priv);
> -bool intel_fbc_pre_update(struct intel_crtc *crtc,
> -			  const struct intel_crtc_state *crtc_state,
> -			  const struct intel_plane_state *plane_state);
> -void intel_fbc_post_update(struct intel_crtc *crtc);
> +bool intel_fbc_pre_update(struct intel_atomic_state *state,
> +			  struct intel_crtc *crtc);
> +void intel_fbc_post_update(struct intel_atomic_state *state,
> +			   struct intel_crtc *crtc);
>  void intel_fbc_init(struct drm_i915_private *dev_priv);
> -void intel_fbc_enable(struct intel_crtc *crtc,
> -		      const struct intel_crtc_state *crtc_state,
> -		      const struct intel_plane_state *plane_state);
> +void intel_fbc_enable(struct intel_atomic_state *state,
> +		      struct intel_crtc *crtc);
>  void intel_fbc_disable(struct intel_crtc *crtc);
>  void intel_fbc_global_disable(struct drm_i915_private *dev_priv);
>  void intel_fbc_invalidate(struct drm_i915_private *dev_priv,
> -- 
> 2.23.0
> 
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Re: [Intel-gfx] [PATCH 5/6] drm/i915/fbc: Add fbc tracepoints

[Imre Deak]

On Fri, Dec 13, 2019 at 03:34:52PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Add tracepoints which let us know when fbc activates/deactivates/nukes.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Imre Deak <imre.deak@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c |  9 ++++
>  drivers/gpu/drm/i915/i915_trace.h        | 62 ++++++++++++++++++++++++
>  2 files changed, 71 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 28adf4636800..88a9c2fea695 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -41,6 +41,7 @@
>  #include <drm/drm_fourcc.h>
>  
>  #include "i915_drv.h"
> +#include "i915_trace.h"
>  #include "intel_display_types.h"
>  #include "intel_fbc.h"
>  #include "intel_frontbuffer.h"
> @@ -200,6 +201,10 @@ static bool g4x_fbc_is_active(struct drm_i915_private *dev_priv)
>  /* This function forces a CFB recompression through the nuke operation. */
>  static void intel_fbc_recompress(struct drm_i915_private *dev_priv)
>  {
> +	struct intel_fbc *fbc = &dev_priv->fbc;
> +
> +	trace_intel_fbc_nuke(fbc->crtc);
> +
>  	I915_WRITE(MSG_FBC_REND_STATE, FBC_REND_NUKE);
>  	POSTING_READ(MSG_FBC_REND_STATE);
>  }
> @@ -356,6 +361,8 @@ static void intel_fbc_hw_activate(struct drm_i915_private *dev_priv)
>  {
>  	struct intel_fbc *fbc = &dev_priv->fbc;
>  
> +	trace_intel_fbc_activate(fbc->crtc);
> +
>  	fbc->active = true;
>  	fbc->activated = true;
>  
> @@ -373,6 +380,8 @@ static void intel_fbc_hw_deactivate(struct drm_i915_private *dev_priv)
>  {
>  	struct intel_fbc *fbc = &dev_priv->fbc;
>  
> +	trace_intel_fbc_deactivate(fbc->crtc);
> +
>  	fbc->active = false;
>  
>  	if (INTEL_GEN(dev_priv) >= 5)
> diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
> index 7ef7a1e1664c..66ff96303b95 100644
> --- a/drivers/gpu/drm/i915/i915_trace.h
> +++ b/drivers/gpu/drm/i915/i915_trace.h
> @@ -339,6 +339,68 @@ TRACE_EVENT(intel_disable_plane,
>  		      __entry->frame, __entry->scanline)
>  );
>  
> +/* fbc */
> +
> +TRACE_EVENT(intel_fbc_activate,
> +	    TP_PROTO(struct intel_crtc *crtc),
> +	    TP_ARGS(crtc),
> +
> +	    TP_STRUCT__entry(
> +			     __field(enum pipe, pipe)
> +			     __field(u32, frame)
> +			     __field(u32, scanline)
> +			     ),
> +
> +	    TP_fast_assign(
> +			   __entry->pipe = crtc->pipe;
> +			   __entry->frame = intel_crtc_get_vblank_counter(crtc);
> +			   __entry->scanline = intel_get_crtc_scanline(crtc);
> +			   ),
> +
> +	    TP_printk("pipe %c, frame=%u, scanline=%u",
> +		      pipe_name(__entry->pipe), __entry->frame, __entry->scanline)
> +);
> +
> +TRACE_EVENT(intel_fbc_deactivate,
> +	    TP_PROTO(struct intel_crtc *crtc),
> +	    TP_ARGS(crtc),
> +
> +	    TP_STRUCT__entry(
> +			     __field(enum pipe, pipe)
> +			     __field(u32, frame)
> +			     __field(u32, scanline)
> +			     ),
> +
> +	    TP_fast_assign(
> +			   __entry->pipe = crtc->pipe;
> +			   __entry->frame = intel_crtc_get_vblank_counter(crtc);
> +			   __entry->scanline = intel_get_crtc_scanline(crtc);
> +			   ),
> +
> +	    TP_printk("pipe %c, frame=%u, scanline=%u",
> +		      pipe_name(__entry->pipe), __entry->frame, __entry->scanline)
> +);
> +
> +TRACE_EVENT(intel_fbc_nuke,
> +	    TP_PROTO(struct intel_crtc *crtc),
> +	    TP_ARGS(crtc),
> +
> +	    TP_STRUCT__entry(
> +			     __field(enum pipe, pipe)
> +			     __field(u32, frame)
> +			     __field(u32, scanline)
> +			     ),
> +
> +	    TP_fast_assign(
> +			   __entry->pipe = crtc->pipe;
> +			   __entry->frame = intel_crtc_get_vblank_counter(crtc);
> +			   __entry->scanline = intel_get_crtc_scanline(crtc);
> +			   ),
> +
> +	    TP_printk("pipe %c, frame=%u, scanline=%u",
> +		      pipe_name(__entry->pipe), __entry->frame, __entry->scanline)
> +);
> +
>  /* pipe updates */
>  
>  TRACE_EVENT(i915_pipe_update_start,
> -- 
> 2.23.0
> 
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