* [PATCH 0/5] drm/i915: conversion to new drm logging macros. @ 2020-01-07 15:13 ` Wambui Karuga 0 siblings, 0 replies; 42+ messages in thread From: Wambui Karuga @ 2020-01-07 15:13 UTC (permalink / raw) To: jani.nikula, joonas.lahtinen, rodrigo.vivi, airlied, daniel Cc: seanpaul, intel-gfx, dri-devel, linux-kernel This series begins the conversion to using the new struct drm_device based logging macros in drm/i915. Wambui Karuga (5): drm/i915: convert to using the drm_dbg_kms() macro. drm/i915: use new struct drm_device logging macros. drm/i915: use new struct drm_device based logging macros. drm/i915: convert to using new struct drm_device logging macros drm/i915: use new struct drm_device based macros. drivers/gpu/drm/i915/intel_pch.c | 46 +-- drivers/gpu/drm/i915/intel_pm.c | 351 +++++++++++++---------- drivers/gpu/drm/i915/intel_region_lmem.c | 10 +- drivers/gpu/drm/i915/intel_sideband.c | 29 +- drivers/gpu/drm/i915/intel_uncore.c | 25 +- 5 files changed, 254 insertions(+), 207 deletions(-) -- 2.24.1 ^ permalink raw reply [flat|nested] 42+ messages in thread
* [Intel-gfx] [PATCH 0/5] drm/i915: conversion to new drm logging macros. @ 2020-01-07 15:13 ` Wambui Karuga 0 siblings, 0 replies; 42+ messages in thread From: Wambui Karuga @ 2020-01-07 15:13 UTC (permalink / raw) To: jani.nikula, joonas.lahtinen, rodrigo.vivi, airlied, daniel Cc: intel-gfx, seanpaul, linux-kernel, dri-devel This series begins the conversion to using the new struct drm_device based logging macros in drm/i915. Wambui Karuga (5): drm/i915: convert to using the drm_dbg_kms() macro. drm/i915: use new struct drm_device logging macros. drm/i915: use new struct drm_device based logging macros. drm/i915: convert to using new struct drm_device logging macros drm/i915: use new struct drm_device based macros. drivers/gpu/drm/i915/intel_pch.c | 46 +-- drivers/gpu/drm/i915/intel_pm.c | 351 +++++++++++++---------- drivers/gpu/drm/i915/intel_region_lmem.c | 10 +- drivers/gpu/drm/i915/intel_sideband.c | 29 +- drivers/gpu/drm/i915/intel_uncore.c | 25 +- 5 files changed, 254 insertions(+), 207 deletions(-) -- 2.24.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH 0/5] drm/i915: conversion to new drm logging macros. @ 2020-01-07 15:13 ` Wambui Karuga 0 siblings, 0 replies; 42+ messages in thread From: Wambui Karuga @ 2020-01-07 15:13 UTC (permalink / raw) To: jani.nikula, joonas.lahtinen, rodrigo.vivi, airlied, daniel Cc: intel-gfx, seanpaul, linux-kernel, dri-devel This series begins the conversion to using the new struct drm_device based logging macros in drm/i915. Wambui Karuga (5): drm/i915: convert to using the drm_dbg_kms() macro. drm/i915: use new struct drm_device logging macros. drm/i915: use new struct drm_device based logging macros. drm/i915: convert to using new struct drm_device logging macros drm/i915: use new struct drm_device based macros. drivers/gpu/drm/i915/intel_pch.c | 46 +-- drivers/gpu/drm/i915/intel_pm.c | 351 +++++++++++++---------- drivers/gpu/drm/i915/intel_region_lmem.c | 10 +- drivers/gpu/drm/i915/intel_sideband.c | 29 +- drivers/gpu/drm/i915/intel_uncore.c | 25 +- 5 files changed, 254 insertions(+), 207 deletions(-) -- 2.24.1 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH 1/5] drm/i915: convert to using the drm_dbg_kms() macro. 2020-01-07 15:13 ` Wambui Karuga (?) @ 2020-01-07 15:13 ` Wambui Karuga -1 siblings, 0 replies; 42+ messages in thread From: Wambui Karuga @ 2020-01-07 15:13 UTC (permalink / raw) To: jani.nikula, joonas.lahtinen, rodrigo.vivi, airlied, daniel Cc: seanpaul, intel-gfx, dri-devel, linux-kernel Convert the use of the DRM_DEBUG_KMS() logging macro to the new struct drm_device based drm_dbg_kms() logging macro in i915/intel_pch.c. Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> --- drivers/gpu/drm/i915/intel_pch.c | 46 +++++++++++++++++--------------- 1 file changed, 24 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c index 43b68b5fc562..4ed60e1f01db 100644 --- a/drivers/gpu/drm/i915/intel_pch.c +++ b/drivers/gpu/drm/i915/intel_pch.c @@ -12,90 +12,91 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) { switch (id) { case INTEL_PCH_IBX_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Ibex Peak PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n"); WARN_ON(!IS_GEN(dev_priv, 5)); return PCH_IBX; case INTEL_PCH_CPT_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found CougarPoint PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found CougarPoint PCH\n"); WARN_ON(!IS_GEN(dev_priv, 6) && !IS_IVYBRIDGE(dev_priv)); return PCH_CPT; case INTEL_PCH_PPT_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found PantherPoint PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found PantherPoint PCH\n"); WARN_ON(!IS_GEN(dev_priv, 6) && !IS_IVYBRIDGE(dev_priv)); /* PantherPoint is CPT compatible */ return PCH_CPT; case INTEL_PCH_LPT_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found LynxPoint PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found LynxPoint PCH\n"); WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); WARN_ON(IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv)); return PCH_LPT; case INTEL_PCH_LPT_LP_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found LynxPoint LP PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found LynxPoint LP PCH\n"); WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); WARN_ON(!IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv)); return PCH_LPT; case INTEL_PCH_WPT_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found WildcatPoint PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found WildcatPoint PCH\n"); WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); WARN_ON(IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv)); /* WildcatPoint is LPT compatible */ return PCH_LPT; case INTEL_PCH_WPT_LP_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found WildcatPoint LP PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found WildcatPoint LP PCH\n"); WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); WARN_ON(!IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv)); /* WildcatPoint is LPT compatible */ return PCH_LPT; case INTEL_PCH_SPT_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found SunrisePoint PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found SunrisePoint PCH\n"); WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv)); return PCH_SPT; case INTEL_PCH_SPT_LP_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found SunrisePoint LP PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found SunrisePoint LP PCH\n"); WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv)); return PCH_SPT; case INTEL_PCH_KBP_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Kaby Lake PCH (KBP)\n"); + drm_dbg_kms(&dev_priv->drm, "Found Kaby Lake PCH (KBP)\n"); WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv)); /* KBP is SPT compatible */ return PCH_SPT; case INTEL_PCH_CNP_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Cannon Lake PCH (CNP)\n"); + drm_dbg_kms(&dev_priv->drm, "Found Cannon Lake PCH (CNP)\n"); WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv)); return PCH_CNP; case INTEL_PCH_CNP_LP_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Cannon Lake LP PCH (CNP-LP)\n"); + drm_dbg_kms(&dev_priv->drm, + "Found Cannon Lake LP PCH (CNP-LP)\n"); WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv)); return PCH_CNP; case INTEL_PCH_CMP_DEVICE_ID_TYPE: case INTEL_PCH_CMP2_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Comet Lake PCH (CMP)\n"); + drm_dbg_kms(&dev_priv->drm, "Found Comet Lake PCH (CMP)\n"); WARN_ON(!IS_COFFEELAKE(dev_priv)); /* CometPoint is CNP Compatible */ return PCH_CNP; case INTEL_PCH_CMP_V_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Comet Lake V PCH (CMP-V)\n"); + drm_dbg_kms(&dev_priv->drm, "Found Comet Lake V PCH (CMP-V)\n"); WARN_ON(!IS_COFFEELAKE(dev_priv)); /* Comet Lake V PCH is based on KBP, which is SPT compatible */ return PCH_SPT; case INTEL_PCH_ICP_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Ice Lake PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found Ice Lake PCH\n"); WARN_ON(!IS_ICELAKE(dev_priv)); return PCH_ICP; case INTEL_PCH_MCC_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Mule Creek Canyon PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found Mule Creek Canyon PCH\n"); WARN_ON(!IS_ELKHARTLAKE(dev_priv)); return PCH_MCC; case INTEL_PCH_TGP_DEVICE_ID_TYPE: case INTEL_PCH_TGP2_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Tiger Lake LP PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found Tiger Lake LP PCH\n"); WARN_ON(!IS_TIGERLAKE(dev_priv)); return PCH_TGP; case INTEL_PCH_JSP_DEVICE_ID_TYPE: case INTEL_PCH_JSP2_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Jasper Lake PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found Jasper Lake PCH\n"); WARN_ON(!IS_ELKHARTLAKE(dev_priv)); return PCH_JSP; default: @@ -145,9 +146,9 @@ intel_virt_detect_pch(const struct drm_i915_private *dev_priv) id = INTEL_PCH_IBX_DEVICE_ID_TYPE; if (id) - DRM_DEBUG_KMS("Assuming PCH ID %04x\n", id); + drm_dbg_kms(&dev_priv->drm, "Assuming PCH ID %04x\n", id); else - DRM_DEBUG_KMS("Assuming no PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Assuming no PCH\n"); return id; } @@ -201,13 +202,14 @@ void intel_detect_pch(struct drm_i915_private *dev_priv) * display. */ if (pch && !HAS_DISPLAY(dev_priv)) { - DRM_DEBUG_KMS("Display disabled, reverting to NOP PCH\n"); + drm_dbg_kms(&dev_priv->drm, + "Display disabled, reverting to NOP PCH\n"); dev_priv->pch_type = PCH_NOP; dev_priv->pch_id = 0; } if (!pch) - DRM_DEBUG_KMS("No PCH found.\n"); + drm_dbg_kms(&dev_priv->drm, "No PCH found.\n"); pci_dev_put(pch); } -- 2.24.1 ^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Intel-gfx] [PATCH 1/5] drm/i915: convert to using the drm_dbg_kms() macro. @ 2020-01-07 15:13 ` Wambui Karuga 0 siblings, 0 replies; 42+ messages in thread From: Wambui Karuga @ 2020-01-07 15:13 UTC (permalink / raw) To: jani.nikula, joonas.lahtinen, rodrigo.vivi, airlied, daniel Cc: intel-gfx, seanpaul, linux-kernel, dri-devel Convert the use of the DRM_DEBUG_KMS() logging macro to the new struct drm_device based drm_dbg_kms() logging macro in i915/intel_pch.c. Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> --- drivers/gpu/drm/i915/intel_pch.c | 46 +++++++++++++++++--------------- 1 file changed, 24 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c index 43b68b5fc562..4ed60e1f01db 100644 --- a/drivers/gpu/drm/i915/intel_pch.c +++ b/drivers/gpu/drm/i915/intel_pch.c @@ -12,90 +12,91 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) { switch (id) { case INTEL_PCH_IBX_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Ibex Peak PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n"); WARN_ON(!IS_GEN(dev_priv, 5)); return PCH_IBX; case INTEL_PCH_CPT_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found CougarPoint PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found CougarPoint PCH\n"); WARN_ON(!IS_GEN(dev_priv, 6) && !IS_IVYBRIDGE(dev_priv)); return PCH_CPT; case INTEL_PCH_PPT_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found PantherPoint PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found PantherPoint PCH\n"); WARN_ON(!IS_GEN(dev_priv, 6) && !IS_IVYBRIDGE(dev_priv)); /* PantherPoint is CPT compatible */ return PCH_CPT; case INTEL_PCH_LPT_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found LynxPoint PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found LynxPoint PCH\n"); WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); WARN_ON(IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv)); return PCH_LPT; case INTEL_PCH_LPT_LP_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found LynxPoint LP PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found LynxPoint LP PCH\n"); WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); WARN_ON(!IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv)); return PCH_LPT; case INTEL_PCH_WPT_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found WildcatPoint PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found WildcatPoint PCH\n"); WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); WARN_ON(IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv)); /* WildcatPoint is LPT compatible */ return PCH_LPT; case INTEL_PCH_WPT_LP_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found WildcatPoint LP PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found WildcatPoint LP PCH\n"); WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); WARN_ON(!IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv)); /* WildcatPoint is LPT compatible */ return PCH_LPT; case INTEL_PCH_SPT_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found SunrisePoint PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found SunrisePoint PCH\n"); WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv)); return PCH_SPT; case INTEL_PCH_SPT_LP_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found SunrisePoint LP PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found SunrisePoint LP PCH\n"); WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv)); return PCH_SPT; case INTEL_PCH_KBP_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Kaby Lake PCH (KBP)\n"); + drm_dbg_kms(&dev_priv->drm, "Found Kaby Lake PCH (KBP)\n"); WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv)); /* KBP is SPT compatible */ return PCH_SPT; case INTEL_PCH_CNP_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Cannon Lake PCH (CNP)\n"); + drm_dbg_kms(&dev_priv->drm, "Found Cannon Lake PCH (CNP)\n"); WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv)); return PCH_CNP; case INTEL_PCH_CNP_LP_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Cannon Lake LP PCH (CNP-LP)\n"); + drm_dbg_kms(&dev_priv->drm, + "Found Cannon Lake LP PCH (CNP-LP)\n"); WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv)); return PCH_CNP; case INTEL_PCH_CMP_DEVICE_ID_TYPE: case INTEL_PCH_CMP2_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Comet Lake PCH (CMP)\n"); + drm_dbg_kms(&dev_priv->drm, "Found Comet Lake PCH (CMP)\n"); WARN_ON(!IS_COFFEELAKE(dev_priv)); /* CometPoint is CNP Compatible */ return PCH_CNP; case INTEL_PCH_CMP_V_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Comet Lake V PCH (CMP-V)\n"); + drm_dbg_kms(&dev_priv->drm, "Found Comet Lake V PCH (CMP-V)\n"); WARN_ON(!IS_COFFEELAKE(dev_priv)); /* Comet Lake V PCH is based on KBP, which is SPT compatible */ return PCH_SPT; case INTEL_PCH_ICP_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Ice Lake PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found Ice Lake PCH\n"); WARN_ON(!IS_ICELAKE(dev_priv)); return PCH_ICP; case INTEL_PCH_MCC_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Mule Creek Canyon PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found Mule Creek Canyon PCH\n"); WARN_ON(!IS_ELKHARTLAKE(dev_priv)); return PCH_MCC; case INTEL_PCH_TGP_DEVICE_ID_TYPE: case INTEL_PCH_TGP2_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Tiger Lake LP PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found Tiger Lake LP PCH\n"); WARN_ON(!IS_TIGERLAKE(dev_priv)); return PCH_TGP; case INTEL_PCH_JSP_DEVICE_ID_TYPE: case INTEL_PCH_JSP2_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Jasper Lake PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found Jasper Lake PCH\n"); WARN_ON(!IS_ELKHARTLAKE(dev_priv)); return PCH_JSP; default: @@ -145,9 +146,9 @@ intel_virt_detect_pch(const struct drm_i915_private *dev_priv) id = INTEL_PCH_IBX_DEVICE_ID_TYPE; if (id) - DRM_DEBUG_KMS("Assuming PCH ID %04x\n", id); + drm_dbg_kms(&dev_priv->drm, "Assuming PCH ID %04x\n", id); else - DRM_DEBUG_KMS("Assuming no PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Assuming no PCH\n"); return id; } @@ -201,13 +202,14 @@ void intel_detect_pch(struct drm_i915_private *dev_priv) * display. */ if (pch && !HAS_DISPLAY(dev_priv)) { - DRM_DEBUG_KMS("Display disabled, reverting to NOP PCH\n"); + drm_dbg_kms(&dev_priv->drm, + "Display disabled, reverting to NOP PCH\n"); dev_priv->pch_type = PCH_NOP; dev_priv->pch_id = 0; } if (!pch) - DRM_DEBUG_KMS("No PCH found.\n"); + drm_dbg_kms(&dev_priv->drm, "No PCH found.\n"); pci_dev_put(pch); } -- 2.24.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH 1/5] drm/i915: convert to using the drm_dbg_kms() macro. @ 2020-01-07 15:13 ` Wambui Karuga 0 siblings, 0 replies; 42+ messages in thread From: Wambui Karuga @ 2020-01-07 15:13 UTC (permalink / raw) To: jani.nikula, joonas.lahtinen, rodrigo.vivi, airlied, daniel Cc: intel-gfx, seanpaul, linux-kernel, dri-devel Convert the use of the DRM_DEBUG_KMS() logging macro to the new struct drm_device based drm_dbg_kms() logging macro in i915/intel_pch.c. Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> --- drivers/gpu/drm/i915/intel_pch.c | 46 +++++++++++++++++--------------- 1 file changed, 24 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c index 43b68b5fc562..4ed60e1f01db 100644 --- a/drivers/gpu/drm/i915/intel_pch.c +++ b/drivers/gpu/drm/i915/intel_pch.c @@ -12,90 +12,91 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) { switch (id) { case INTEL_PCH_IBX_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Ibex Peak PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n"); WARN_ON(!IS_GEN(dev_priv, 5)); return PCH_IBX; case INTEL_PCH_CPT_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found CougarPoint PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found CougarPoint PCH\n"); WARN_ON(!IS_GEN(dev_priv, 6) && !IS_IVYBRIDGE(dev_priv)); return PCH_CPT; case INTEL_PCH_PPT_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found PantherPoint PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found PantherPoint PCH\n"); WARN_ON(!IS_GEN(dev_priv, 6) && !IS_IVYBRIDGE(dev_priv)); /* PantherPoint is CPT compatible */ return PCH_CPT; case INTEL_PCH_LPT_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found LynxPoint PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found LynxPoint PCH\n"); WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); WARN_ON(IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv)); return PCH_LPT; case INTEL_PCH_LPT_LP_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found LynxPoint LP PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found LynxPoint LP PCH\n"); WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); WARN_ON(!IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv)); return PCH_LPT; case INTEL_PCH_WPT_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found WildcatPoint PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found WildcatPoint PCH\n"); WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); WARN_ON(IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv)); /* WildcatPoint is LPT compatible */ return PCH_LPT; case INTEL_PCH_WPT_LP_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found WildcatPoint LP PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found WildcatPoint LP PCH\n"); WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); WARN_ON(!IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv)); /* WildcatPoint is LPT compatible */ return PCH_LPT; case INTEL_PCH_SPT_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found SunrisePoint PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found SunrisePoint PCH\n"); WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv)); return PCH_SPT; case INTEL_PCH_SPT_LP_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found SunrisePoint LP PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found SunrisePoint LP PCH\n"); WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv)); return PCH_SPT; case INTEL_PCH_KBP_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Kaby Lake PCH (KBP)\n"); + drm_dbg_kms(&dev_priv->drm, "Found Kaby Lake PCH (KBP)\n"); WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv)); /* KBP is SPT compatible */ return PCH_SPT; case INTEL_PCH_CNP_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Cannon Lake PCH (CNP)\n"); + drm_dbg_kms(&dev_priv->drm, "Found Cannon Lake PCH (CNP)\n"); WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv)); return PCH_CNP; case INTEL_PCH_CNP_LP_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Cannon Lake LP PCH (CNP-LP)\n"); + drm_dbg_kms(&dev_priv->drm, + "Found Cannon Lake LP PCH (CNP-LP)\n"); WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv)); return PCH_CNP; case INTEL_PCH_CMP_DEVICE_ID_TYPE: case INTEL_PCH_CMP2_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Comet Lake PCH (CMP)\n"); + drm_dbg_kms(&dev_priv->drm, "Found Comet Lake PCH (CMP)\n"); WARN_ON(!IS_COFFEELAKE(dev_priv)); /* CometPoint is CNP Compatible */ return PCH_CNP; case INTEL_PCH_CMP_V_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Comet Lake V PCH (CMP-V)\n"); + drm_dbg_kms(&dev_priv->drm, "Found Comet Lake V PCH (CMP-V)\n"); WARN_ON(!IS_COFFEELAKE(dev_priv)); /* Comet Lake V PCH is based on KBP, which is SPT compatible */ return PCH_SPT; case INTEL_PCH_ICP_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Ice Lake PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found Ice Lake PCH\n"); WARN_ON(!IS_ICELAKE(dev_priv)); return PCH_ICP; case INTEL_PCH_MCC_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Mule Creek Canyon PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found Mule Creek Canyon PCH\n"); WARN_ON(!IS_ELKHARTLAKE(dev_priv)); return PCH_MCC; case INTEL_PCH_TGP_DEVICE_ID_TYPE: case INTEL_PCH_TGP2_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Tiger Lake LP PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found Tiger Lake LP PCH\n"); WARN_ON(!IS_TIGERLAKE(dev_priv)); return PCH_TGP; case INTEL_PCH_JSP_DEVICE_ID_TYPE: case INTEL_PCH_JSP2_DEVICE_ID_TYPE: - DRM_DEBUG_KMS("Found Jasper Lake PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Found Jasper Lake PCH\n"); WARN_ON(!IS_ELKHARTLAKE(dev_priv)); return PCH_JSP; default: @@ -145,9 +146,9 @@ intel_virt_detect_pch(const struct drm_i915_private *dev_priv) id = INTEL_PCH_IBX_DEVICE_ID_TYPE; if (id) - DRM_DEBUG_KMS("Assuming PCH ID %04x\n", id); + drm_dbg_kms(&dev_priv->drm, "Assuming PCH ID %04x\n", id); else - DRM_DEBUG_KMS("Assuming no PCH\n"); + drm_dbg_kms(&dev_priv->drm, "Assuming no PCH\n"); return id; } @@ -201,13 +202,14 @@ void intel_detect_pch(struct drm_i915_private *dev_priv) * display. */ if (pch && !HAS_DISPLAY(dev_priv)) { - DRM_DEBUG_KMS("Display disabled, reverting to NOP PCH\n"); + drm_dbg_kms(&dev_priv->drm, + "Display disabled, reverting to NOP PCH\n"); dev_priv->pch_type = PCH_NOP; dev_priv->pch_id = 0; } if (!pch) - DRM_DEBUG_KMS("No PCH found.\n"); + drm_dbg_kms(&dev_priv->drm, "No PCH found.\n"); pci_dev_put(pch); } -- 2.24.1 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 42+ messages in thread
* Re: [PATCH 1/5] drm/i915: convert to using the drm_dbg_kms() macro. 2020-01-07 15:13 ` Wambui Karuga (?) @ 2020-01-08 8:26 ` Joonas Lahtinen -1 siblings, 0 replies; 42+ messages in thread From: Joonas Lahtinen @ 2020-01-08 8:26 UTC (permalink / raw) To: Wambui Karuga, airlied, daniel, jani.nikula, rodrigo.vivi Cc: seanpaul, intel-gfx, dri-devel, linux-kernel Quoting Wambui Karuga (2020-01-07 17:13:29) > Convert the use of the DRM_DEBUG_KMS() logging macro to the new struct > drm_device based drm_dbg_kms() logging macro in i915/intel_pch.c. > > Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> > --- > drivers/gpu/drm/i915/intel_pch.c | 46 +++++++++++++++++--------------- > 1 file changed, 24 insertions(+), 22 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c > index 43b68b5fc562..4ed60e1f01db 100644 > --- a/drivers/gpu/drm/i915/intel_pch.c > +++ b/drivers/gpu/drm/i915/intel_pch.c > @@ -12,90 +12,91 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) > { > switch (id) { > case INTEL_PCH_IBX_DEVICE_ID_TYPE: > - DRM_DEBUG_KMS("Found Ibex Peak PCH\n"); > + drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n"); Did we at some point consider i915_dbg_kms alias? That would just take dev_priv (or i915, as it's called in newer code). It would shorten many of the statements. i915_dbg_kms(dev_priv, ...) or i915_dbg_kms(i915, ...) Regards, Joonas ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Intel-gfx] [PATCH 1/5] drm/i915: convert to using the drm_dbg_kms() macro. @ 2020-01-08 8:26 ` Joonas Lahtinen 0 siblings, 0 replies; 42+ messages in thread From: Joonas Lahtinen @ 2020-01-08 8:26 UTC (permalink / raw) To: Wambui Karuga, airlied, daniel, jani.nikula, rodrigo.vivi Cc: intel-gfx, seanpaul, linux-kernel, dri-devel Quoting Wambui Karuga (2020-01-07 17:13:29) > Convert the use of the DRM_DEBUG_KMS() logging macro to the new struct > drm_device based drm_dbg_kms() logging macro in i915/intel_pch.c. > > Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> > --- > drivers/gpu/drm/i915/intel_pch.c | 46 +++++++++++++++++--------------- > 1 file changed, 24 insertions(+), 22 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c > index 43b68b5fc562..4ed60e1f01db 100644 > --- a/drivers/gpu/drm/i915/intel_pch.c > +++ b/drivers/gpu/drm/i915/intel_pch.c > @@ -12,90 +12,91 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) > { > switch (id) { > case INTEL_PCH_IBX_DEVICE_ID_TYPE: > - DRM_DEBUG_KMS("Found Ibex Peak PCH\n"); > + drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n"); Did we at some point consider i915_dbg_kms alias? That would just take dev_priv (or i915, as it's called in newer code). It would shorten many of the statements. i915_dbg_kms(dev_priv, ...) or i915_dbg_kms(i915, ...) Regards, Joonas _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH 1/5] drm/i915: convert to using the drm_dbg_kms() macro. @ 2020-01-08 8:26 ` Joonas Lahtinen 0 siblings, 0 replies; 42+ messages in thread From: Joonas Lahtinen @ 2020-01-08 8:26 UTC (permalink / raw) To: Wambui Karuga, airlied, daniel, jani.nikula, rodrigo.vivi Cc: intel-gfx, seanpaul, linux-kernel, dri-devel Quoting Wambui Karuga (2020-01-07 17:13:29) > Convert the use of the DRM_DEBUG_KMS() logging macro to the new struct > drm_device based drm_dbg_kms() logging macro in i915/intel_pch.c. > > Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> > --- > drivers/gpu/drm/i915/intel_pch.c | 46 +++++++++++++++++--------------- > 1 file changed, 24 insertions(+), 22 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c > index 43b68b5fc562..4ed60e1f01db 100644 > --- a/drivers/gpu/drm/i915/intel_pch.c > +++ b/drivers/gpu/drm/i915/intel_pch.c > @@ -12,90 +12,91 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) > { > switch (id) { > case INTEL_PCH_IBX_DEVICE_ID_TYPE: > - DRM_DEBUG_KMS("Found Ibex Peak PCH\n"); > + drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n"); Did we at some point consider i915_dbg_kms alias? That would just take dev_priv (or i915, as it's called in newer code). It would shorten many of the statements. i915_dbg_kms(dev_priv, ...) or i915_dbg_kms(i915, ...) Regards, Joonas _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH 1/5] drm/i915: convert to using the drm_dbg_kms() macro. 2020-01-08 8:26 ` Joonas Lahtinen (?) @ 2020-01-08 9:40 ` Jani Nikula -1 siblings, 0 replies; 42+ messages in thread From: Jani Nikula @ 2020-01-08 9:40 UTC (permalink / raw) To: Joonas Lahtinen, Wambui Karuga, airlied, daniel, rodrigo.vivi Cc: seanpaul, intel-gfx, dri-devel, linux-kernel On Wed, 08 Jan 2020, Joonas Lahtinen <joonas.lahtinen@linux.intel.com> wrote: > Quoting Wambui Karuga (2020-01-07 17:13:29) >> Convert the use of the DRM_DEBUG_KMS() logging macro to the new struct >> drm_device based drm_dbg_kms() logging macro in i915/intel_pch.c. >> >> Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> >> --- >> drivers/gpu/drm/i915/intel_pch.c | 46 +++++++++++++++++--------------- >> 1 file changed, 24 insertions(+), 22 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c >> index 43b68b5fc562..4ed60e1f01db 100644 >> --- a/drivers/gpu/drm/i915/intel_pch.c >> +++ b/drivers/gpu/drm/i915/intel_pch.c >> @@ -12,90 +12,91 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) >> { >> switch (id) { >> case INTEL_PCH_IBX_DEVICE_ID_TYPE: >> - DRM_DEBUG_KMS("Found Ibex Peak PCH\n"); >> + drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n"); > > Did we at some point consider i915_dbg_kms alias? That would just take > dev_priv (or i915, as it's called in newer code). It would shorten many > of the statements. > > i915_dbg_kms(dev_priv, ...) or i915_dbg_kms(i915, ...) I'd rather use the common drm logging macros. I thought about adding i915 specific ones only if the drm device specific logging macros weren't going to be merged. BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Intel-gfx] [PATCH 1/5] drm/i915: convert to using the drm_dbg_kms() macro. @ 2020-01-08 9:40 ` Jani Nikula 0 siblings, 0 replies; 42+ messages in thread From: Jani Nikula @ 2020-01-08 9:40 UTC (permalink / raw) To: Joonas Lahtinen, Wambui Karuga, airlied, daniel, rodrigo.vivi Cc: intel-gfx, seanpaul, linux-kernel, dri-devel On Wed, 08 Jan 2020, Joonas Lahtinen <joonas.lahtinen@linux.intel.com> wrote: > Quoting Wambui Karuga (2020-01-07 17:13:29) >> Convert the use of the DRM_DEBUG_KMS() logging macro to the new struct >> drm_device based drm_dbg_kms() logging macro in i915/intel_pch.c. >> >> Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> >> --- >> drivers/gpu/drm/i915/intel_pch.c | 46 +++++++++++++++++--------------- >> 1 file changed, 24 insertions(+), 22 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c >> index 43b68b5fc562..4ed60e1f01db 100644 >> --- a/drivers/gpu/drm/i915/intel_pch.c >> +++ b/drivers/gpu/drm/i915/intel_pch.c >> @@ -12,90 +12,91 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) >> { >> switch (id) { >> case INTEL_PCH_IBX_DEVICE_ID_TYPE: >> - DRM_DEBUG_KMS("Found Ibex Peak PCH\n"); >> + drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n"); > > Did we at some point consider i915_dbg_kms alias? That would just take > dev_priv (or i915, as it's called in newer code). It would shorten many > of the statements. > > i915_dbg_kms(dev_priv, ...) or i915_dbg_kms(i915, ...) I'd rather use the common drm logging macros. I thought about adding i915 specific ones only if the drm device specific logging macros weren't going to be merged. BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH 1/5] drm/i915: convert to using the drm_dbg_kms() macro. @ 2020-01-08 9:40 ` Jani Nikula 0 siblings, 0 replies; 42+ messages in thread From: Jani Nikula @ 2020-01-08 9:40 UTC (permalink / raw) To: Joonas Lahtinen, Wambui Karuga, airlied, daniel, rodrigo.vivi Cc: intel-gfx, seanpaul, linux-kernel, dri-devel On Wed, 08 Jan 2020, Joonas Lahtinen <joonas.lahtinen@linux.intel.com> wrote: > Quoting Wambui Karuga (2020-01-07 17:13:29) >> Convert the use of the DRM_DEBUG_KMS() logging macro to the new struct >> drm_device based drm_dbg_kms() logging macro in i915/intel_pch.c. >> >> Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> >> --- >> drivers/gpu/drm/i915/intel_pch.c | 46 +++++++++++++++++--------------- >> 1 file changed, 24 insertions(+), 22 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c >> index 43b68b5fc562..4ed60e1f01db 100644 >> --- a/drivers/gpu/drm/i915/intel_pch.c >> +++ b/drivers/gpu/drm/i915/intel_pch.c >> @@ -12,90 +12,91 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) >> { >> switch (id) { >> case INTEL_PCH_IBX_DEVICE_ID_TYPE: >> - DRM_DEBUG_KMS("Found Ibex Peak PCH\n"); >> + drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n"); > > Did we at some point consider i915_dbg_kms alias? That would just take > dev_priv (or i915, as it's called in newer code). It would shorten many > of the statements. > > i915_dbg_kms(dev_priv, ...) or i915_dbg_kms(i915, ...) I'd rather use the common drm logging macros. I thought about adding i915 specific ones only if the drm device specific logging macros weren't going to be merged. BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Intel-gfx] [PATCH 1/5] drm/i915: convert to using the drm_dbg_kms() macro. 2020-01-08 9:40 ` Jani Nikula (?) @ 2020-01-08 10:44 ` Chris Wilson -1 siblings, 0 replies; 42+ messages in thread From: Chris Wilson @ 2020-01-08 10:44 UTC (permalink / raw) To: Jani Nikula, Joonas Lahtinen, Wambui Karuga, airlied, daniel, rodrigo.vivi Cc: intel-gfx, seanpaul, linux-kernel, dri-devel Quoting Jani Nikula (2020-01-08 09:40:40) > On Wed, 08 Jan 2020, Joonas Lahtinen <joonas.lahtinen@linux.intel.com> wrote: > > Quoting Wambui Karuga (2020-01-07 17:13:29) > >> Convert the use of the DRM_DEBUG_KMS() logging macro to the new struct > >> drm_device based drm_dbg_kms() logging macro in i915/intel_pch.c. > >> > >> Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> > >> --- > >> drivers/gpu/drm/i915/intel_pch.c | 46 +++++++++++++++++--------------- > >> 1 file changed, 24 insertions(+), 22 deletions(-) > >> > >> diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c > >> index 43b68b5fc562..4ed60e1f01db 100644 > >> --- a/drivers/gpu/drm/i915/intel_pch.c > >> +++ b/drivers/gpu/drm/i915/intel_pch.c > >> @@ -12,90 +12,91 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) > >> { > >> switch (id) { > >> case INTEL_PCH_IBX_DEVICE_ID_TYPE: > >> - DRM_DEBUG_KMS("Found Ibex Peak PCH\n"); > >> + drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n"); > > > > Did we at some point consider i915_dbg_kms alias? That would just take > > dev_priv (or i915, as it's called in newer code). It would shorten many > > of the statements. > > > > i915_dbg_kms(dev_priv, ...) or i915_dbg_kms(i915, ...) > > I'd rather use the common drm logging macros. I thought about adding > i915 specific ones only if the drm device specific logging macros > weren't going to be merged. Why do they even exist? Why isn't it enough to do #define drm_info(drm, fmt, ...) dev_info(&(drm)->dev, fmt, ##__VA_ARGS) ? #define i915_info(i915, fmt, ...) drm_info(&(i915)->drm, fmt, ##__VA_ARGS) The lea for &i915->drm.dev is the same as the mov, so we shave off an unnecessary wrapper. -Chris ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Intel-gfx] [PATCH 1/5] drm/i915: convert to using the drm_dbg_kms() macro. @ 2020-01-08 10:44 ` Chris Wilson 0 siblings, 0 replies; 42+ messages in thread From: Chris Wilson @ 2020-01-08 10:44 UTC (permalink / raw) To: Jani Nikula, Joonas Lahtinen, Wambui Karuga, airlied, daniel, rodrigo.vivi Cc: intel-gfx, seanpaul, linux-kernel, dri-devel Quoting Jani Nikula (2020-01-08 09:40:40) > On Wed, 08 Jan 2020, Joonas Lahtinen <joonas.lahtinen@linux.intel.com> wrote: > > Quoting Wambui Karuga (2020-01-07 17:13:29) > >> Convert the use of the DRM_DEBUG_KMS() logging macro to the new struct > >> drm_device based drm_dbg_kms() logging macro in i915/intel_pch.c. > >> > >> Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> > >> --- > >> drivers/gpu/drm/i915/intel_pch.c | 46 +++++++++++++++++--------------- > >> 1 file changed, 24 insertions(+), 22 deletions(-) > >> > >> diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c > >> index 43b68b5fc562..4ed60e1f01db 100644 > >> --- a/drivers/gpu/drm/i915/intel_pch.c > >> +++ b/drivers/gpu/drm/i915/intel_pch.c > >> @@ -12,90 +12,91 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) > >> { > >> switch (id) { > >> case INTEL_PCH_IBX_DEVICE_ID_TYPE: > >> - DRM_DEBUG_KMS("Found Ibex Peak PCH\n"); > >> + drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n"); > > > > Did we at some point consider i915_dbg_kms alias? That would just take > > dev_priv (or i915, as it's called in newer code). It would shorten many > > of the statements. > > > > i915_dbg_kms(dev_priv, ...) or i915_dbg_kms(i915, ...) > > I'd rather use the common drm logging macros. I thought about adding > i915 specific ones only if the drm device specific logging macros > weren't going to be merged. Why do they even exist? Why isn't it enough to do #define drm_info(drm, fmt, ...) dev_info(&(drm)->dev, fmt, ##__VA_ARGS) ? #define i915_info(i915, fmt, ...) drm_info(&(i915)->drm, fmt, ##__VA_ARGS) The lea for &i915->drm.dev is the same as the mov, so we shave off an unnecessary wrapper. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Intel-gfx] [PATCH 1/5] drm/i915: convert to using the drm_dbg_kms() macro. @ 2020-01-08 10:44 ` Chris Wilson 0 siblings, 0 replies; 42+ messages in thread From: Chris Wilson @ 2020-01-08 10:44 UTC (permalink / raw) To: Jani Nikula, Joonas Lahtinen, Wambui Karuga, airlied, daniel, rodrigo.vivi Cc: intel-gfx, seanpaul, linux-kernel, dri-devel Quoting Jani Nikula (2020-01-08 09:40:40) > On Wed, 08 Jan 2020, Joonas Lahtinen <joonas.lahtinen@linux.intel.com> wrote: > > Quoting Wambui Karuga (2020-01-07 17:13:29) > >> Convert the use of the DRM_DEBUG_KMS() logging macro to the new struct > >> drm_device based drm_dbg_kms() logging macro in i915/intel_pch.c. > >> > >> Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> > >> --- > >> drivers/gpu/drm/i915/intel_pch.c | 46 +++++++++++++++++--------------- > >> 1 file changed, 24 insertions(+), 22 deletions(-) > >> > >> diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c > >> index 43b68b5fc562..4ed60e1f01db 100644 > >> --- a/drivers/gpu/drm/i915/intel_pch.c > >> +++ b/drivers/gpu/drm/i915/intel_pch.c > >> @@ -12,90 +12,91 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) > >> { > >> switch (id) { > >> case INTEL_PCH_IBX_DEVICE_ID_TYPE: > >> - DRM_DEBUG_KMS("Found Ibex Peak PCH\n"); > >> + drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n"); > > > > Did we at some point consider i915_dbg_kms alias? That would just take > > dev_priv (or i915, as it's called in newer code). It would shorten many > > of the statements. > > > > i915_dbg_kms(dev_priv, ...) or i915_dbg_kms(i915, ...) > > I'd rather use the common drm logging macros. I thought about adding > i915 specific ones only if the drm device specific logging macros > weren't going to be merged. Why do they even exist? Why isn't it enough to do #define drm_info(drm, fmt, ...) dev_info(&(drm)->dev, fmt, ##__VA_ARGS) ? #define i915_info(i915, fmt, ...) drm_info(&(i915)->drm, fmt, ##__VA_ARGS) The lea for &i915->drm.dev is the same as the mov, so we shave off an unnecessary wrapper. -Chris _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Intel-gfx] [PATCH 1/5] drm/i915: convert to using the drm_dbg_kms() macro. 2020-01-08 10:44 ` Chris Wilson (?) @ 2020-01-08 14:44 ` Jani Nikula -1 siblings, 0 replies; 42+ messages in thread From: Jani Nikula @ 2020-01-08 14:44 UTC (permalink / raw) To: Chris Wilson, Joonas Lahtinen, Wambui Karuga, airlied, daniel, rodrigo.vivi Cc: intel-gfx, seanpaul, linux-kernel, dri-devel On Wed, 08 Jan 2020, Chris Wilson <chris@chris-wilson.co.uk> wrote: > Quoting Jani Nikula (2020-01-08 09:40:40) >> On Wed, 08 Jan 2020, Joonas Lahtinen <joonas.lahtinen@linux.intel.com> wrote: >> > Quoting Wambui Karuga (2020-01-07 17:13:29) >> >> Convert the use of the DRM_DEBUG_KMS() logging macro to the new struct >> >> drm_device based drm_dbg_kms() logging macro in i915/intel_pch.c. >> >> >> >> Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> >> >> --- >> >> drivers/gpu/drm/i915/intel_pch.c | 46 +++++++++++++++++--------------- >> >> 1 file changed, 24 insertions(+), 22 deletions(-) >> >> >> >> diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c >> >> index 43b68b5fc562..4ed60e1f01db 100644 >> >> --- a/drivers/gpu/drm/i915/intel_pch.c >> >> +++ b/drivers/gpu/drm/i915/intel_pch.c >> >> @@ -12,90 +12,91 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) >> >> { >> >> switch (id) { >> >> case INTEL_PCH_IBX_DEVICE_ID_TYPE: >> >> - DRM_DEBUG_KMS("Found Ibex Peak PCH\n"); >> >> + drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n"); >> > >> > Did we at some point consider i915_dbg_kms alias? That would just take >> > dev_priv (or i915, as it's called in newer code). It would shorten many >> > of the statements. >> > >> > i915_dbg_kms(dev_priv, ...) or i915_dbg_kms(i915, ...) >> >> I'd rather use the common drm logging macros. I thought about adding >> i915 specific ones only if the drm device specific logging macros >> weren't going to be merged. > > Why do they even exist? Why isn't it enough to do > #define drm_info(drm, fmt, ...) dev_info(&(drm)->dev, fmt, ##__VA_ARGS) ? It *is* enough to do that, and that's essentially what the new macros do, just with an extra helper macro in between. > #define i915_info(i915, fmt, ...) drm_info(&(i915)->drm, fmt, ##__VA_ARGS) > > The lea for &i915->drm.dev is the same as the mov, so we shave off an > unnecessary wrapper. I was hoping to avoid having our own aliases and abstractions of everything, and instead making the drm macros do what we want. I mean I could've just ignored drm completely, add our own hacks and convert the driver... Sure, there's the boilerplate of dereferencing &i915->drm, but in many places we already have struct drm_device * available too. BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Intel-gfx] [PATCH 1/5] drm/i915: convert to using the drm_dbg_kms() macro. @ 2020-01-08 14:44 ` Jani Nikula 0 siblings, 0 replies; 42+ messages in thread From: Jani Nikula @ 2020-01-08 14:44 UTC (permalink / raw) To: Chris Wilson, Joonas Lahtinen, Wambui Karuga, airlied, daniel, rodrigo.vivi Cc: intel-gfx, seanpaul, linux-kernel, dri-devel On Wed, 08 Jan 2020, Chris Wilson <chris@chris-wilson.co.uk> wrote: > Quoting Jani Nikula (2020-01-08 09:40:40) >> On Wed, 08 Jan 2020, Joonas Lahtinen <joonas.lahtinen@linux.intel.com> wrote: >> > Quoting Wambui Karuga (2020-01-07 17:13:29) >> >> Convert the use of the DRM_DEBUG_KMS() logging macro to the new struct >> >> drm_device based drm_dbg_kms() logging macro in i915/intel_pch.c. >> >> >> >> Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> >> >> --- >> >> drivers/gpu/drm/i915/intel_pch.c | 46 +++++++++++++++++--------------- >> >> 1 file changed, 24 insertions(+), 22 deletions(-) >> >> >> >> diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c >> >> index 43b68b5fc562..4ed60e1f01db 100644 >> >> --- a/drivers/gpu/drm/i915/intel_pch.c >> >> +++ b/drivers/gpu/drm/i915/intel_pch.c >> >> @@ -12,90 +12,91 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) >> >> { >> >> switch (id) { >> >> case INTEL_PCH_IBX_DEVICE_ID_TYPE: >> >> - DRM_DEBUG_KMS("Found Ibex Peak PCH\n"); >> >> + drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n"); >> > >> > Did we at some point consider i915_dbg_kms alias? That would just take >> > dev_priv (or i915, as it's called in newer code). It would shorten many >> > of the statements. >> > >> > i915_dbg_kms(dev_priv, ...) or i915_dbg_kms(i915, ...) >> >> I'd rather use the common drm logging macros. I thought about adding >> i915 specific ones only if the drm device specific logging macros >> weren't going to be merged. > > Why do they even exist? Why isn't it enough to do > #define drm_info(drm, fmt, ...) dev_info(&(drm)->dev, fmt, ##__VA_ARGS) ? It *is* enough to do that, and that's essentially what the new macros do, just with an extra helper macro in between. > #define i915_info(i915, fmt, ...) drm_info(&(i915)->drm, fmt, ##__VA_ARGS) > > The lea for &i915->drm.dev is the same as the mov, so we shave off an > unnecessary wrapper. I was hoping to avoid having our own aliases and abstractions of everything, and instead making the drm macros do what we want. I mean I could've just ignored drm completely, add our own hacks and convert the driver... Sure, there's the boilerplate of dereferencing &i915->drm, but in many places we already have struct drm_device * available too. BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Intel-gfx] [PATCH 1/5] drm/i915: convert to using the drm_dbg_kms() macro. @ 2020-01-08 14:44 ` Jani Nikula 0 siblings, 0 replies; 42+ messages in thread From: Jani Nikula @ 2020-01-08 14:44 UTC (permalink / raw) To: Chris Wilson, Joonas Lahtinen, Wambui Karuga, airlied, daniel, rodrigo.vivi Cc: intel-gfx, seanpaul, linux-kernel, dri-devel On Wed, 08 Jan 2020, Chris Wilson <chris@chris-wilson.co.uk> wrote: > Quoting Jani Nikula (2020-01-08 09:40:40) >> On Wed, 08 Jan 2020, Joonas Lahtinen <joonas.lahtinen@linux.intel.com> wrote: >> > Quoting Wambui Karuga (2020-01-07 17:13:29) >> >> Convert the use of the DRM_DEBUG_KMS() logging macro to the new struct >> >> drm_device based drm_dbg_kms() logging macro in i915/intel_pch.c. >> >> >> >> Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> >> >> --- >> >> drivers/gpu/drm/i915/intel_pch.c | 46 +++++++++++++++++--------------- >> >> 1 file changed, 24 insertions(+), 22 deletions(-) >> >> >> >> diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c >> >> index 43b68b5fc562..4ed60e1f01db 100644 >> >> --- a/drivers/gpu/drm/i915/intel_pch.c >> >> +++ b/drivers/gpu/drm/i915/intel_pch.c >> >> @@ -12,90 +12,91 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) >> >> { >> >> switch (id) { >> >> case INTEL_PCH_IBX_DEVICE_ID_TYPE: >> >> - DRM_DEBUG_KMS("Found Ibex Peak PCH\n"); >> >> + drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n"); >> > >> > Did we at some point consider i915_dbg_kms alias? That would just take >> > dev_priv (or i915, as it's called in newer code). It would shorten many >> > of the statements. >> > >> > i915_dbg_kms(dev_priv, ...) or i915_dbg_kms(i915, ...) >> >> I'd rather use the common drm logging macros. I thought about adding >> i915 specific ones only if the drm device specific logging macros >> weren't going to be merged. > > Why do they even exist? Why isn't it enough to do > #define drm_info(drm, fmt, ...) dev_info(&(drm)->dev, fmt, ##__VA_ARGS) ? It *is* enough to do that, and that's essentially what the new macros do, just with an extra helper macro in between. > #define i915_info(i915, fmt, ...) drm_info(&(i915)->drm, fmt, ##__VA_ARGS) > > The lea for &i915->drm.dev is the same as the mov, so we shave off an > unnecessary wrapper. I was hoping to avoid having our own aliases and abstractions of everything, and instead making the drm macros do what we want. I mean I could've just ignored drm completely, add our own hacks and convert the driver... Sure, there's the boilerplate of dereferencing &i915->drm, but in many places we already have struct drm_device * available too. BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Intel-gfx] [PATCH 1/5] drm/i915: convert to using the drm_dbg_kms() macro. 2020-01-08 14:44 ` Jani Nikula (?) @ 2020-01-08 14:53 ` Chris Wilson -1 siblings, 0 replies; 42+ messages in thread From: Chris Wilson @ 2020-01-08 14:53 UTC (permalink / raw) To: Jani Nikula, Joonas Lahtinen, Wambui Karuga, airlied, daniel, rodrigo.vivi Cc: intel-gfx, seanpaul, linux-kernel, dri-devel Quoting Jani Nikula (2020-01-08 14:44:38) > On Wed, 08 Jan 2020, Chris Wilson <chris@chris-wilson.co.uk> wrote: > > Quoting Jani Nikula (2020-01-08 09:40:40) > >> On Wed, 08 Jan 2020, Joonas Lahtinen <joonas.lahtinen@linux.intel.com> wrote: > >> > Quoting Wambui Karuga (2020-01-07 17:13:29) > >> >> Convert the use of the DRM_DEBUG_KMS() logging macro to the new struct > >> >> drm_device based drm_dbg_kms() logging macro in i915/intel_pch.c. > >> >> > >> >> Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> > >> >> --- > >> >> drivers/gpu/drm/i915/intel_pch.c | 46 +++++++++++++++++--------------- > >> >> 1 file changed, 24 insertions(+), 22 deletions(-) > >> >> > >> >> diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c > >> >> index 43b68b5fc562..4ed60e1f01db 100644 > >> >> --- a/drivers/gpu/drm/i915/intel_pch.c > >> >> +++ b/drivers/gpu/drm/i915/intel_pch.c > >> >> @@ -12,90 +12,91 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) > >> >> { > >> >> switch (id) { > >> >> case INTEL_PCH_IBX_DEVICE_ID_TYPE: > >> >> - DRM_DEBUG_KMS("Found Ibex Peak PCH\n"); > >> >> + drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n"); > >> > > >> > Did we at some point consider i915_dbg_kms alias? That would just take > >> > dev_priv (or i915, as it's called in newer code). It would shorten many > >> > of the statements. > >> > > >> > i915_dbg_kms(dev_priv, ...) or i915_dbg_kms(i915, ...) > >> > >> I'd rather use the common drm logging macros. I thought about adding > >> i915 specific ones only if the drm device specific logging macros > >> weren't going to be merged. > > > > Why do they even exist? Why isn't it enough to do > > #define drm_info(drm, fmt, ...) dev_info(&(drm)->dev, fmt, ##__VA_ARGS) ? > > It *is* enough to do that, and that's essentially what the new macros > do, just with an extra helper macro in between. /o\ Mistook __drm_printk() for the older drm_dev_printk() -Chris ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Intel-gfx] [PATCH 1/5] drm/i915: convert to using the drm_dbg_kms() macro. @ 2020-01-08 14:53 ` Chris Wilson 0 siblings, 0 replies; 42+ messages in thread From: Chris Wilson @ 2020-01-08 14:53 UTC (permalink / raw) To: Jani Nikula, Joonas Lahtinen, Wambui Karuga, airlied, daniel, rodrigo.vivi Cc: intel-gfx, seanpaul, linux-kernel, dri-devel Quoting Jani Nikula (2020-01-08 14:44:38) > On Wed, 08 Jan 2020, Chris Wilson <chris@chris-wilson.co.uk> wrote: > > Quoting Jani Nikula (2020-01-08 09:40:40) > >> On Wed, 08 Jan 2020, Joonas Lahtinen <joonas.lahtinen@linux.intel.com> wrote: > >> > Quoting Wambui Karuga (2020-01-07 17:13:29) > >> >> Convert the use of the DRM_DEBUG_KMS() logging macro to the new struct > >> >> drm_device based drm_dbg_kms() logging macro in i915/intel_pch.c. > >> >> > >> >> Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> > >> >> --- > >> >> drivers/gpu/drm/i915/intel_pch.c | 46 +++++++++++++++++--------------- > >> >> 1 file changed, 24 insertions(+), 22 deletions(-) > >> >> > >> >> diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c > >> >> index 43b68b5fc562..4ed60e1f01db 100644 > >> >> --- a/drivers/gpu/drm/i915/intel_pch.c > >> >> +++ b/drivers/gpu/drm/i915/intel_pch.c > >> >> @@ -12,90 +12,91 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) > >> >> { > >> >> switch (id) { > >> >> case INTEL_PCH_IBX_DEVICE_ID_TYPE: > >> >> - DRM_DEBUG_KMS("Found Ibex Peak PCH\n"); > >> >> + drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n"); > >> > > >> > Did we at some point consider i915_dbg_kms alias? That would just take > >> > dev_priv (or i915, as it's called in newer code). It would shorten many > >> > of the statements. > >> > > >> > i915_dbg_kms(dev_priv, ...) or i915_dbg_kms(i915, ...) > >> > >> I'd rather use the common drm logging macros. I thought about adding > >> i915 specific ones only if the drm device specific logging macros > >> weren't going to be merged. > > > > Why do they even exist? Why isn't it enough to do > > #define drm_info(drm, fmt, ...) dev_info(&(drm)->dev, fmt, ##__VA_ARGS) ? > > It *is* enough to do that, and that's essentially what the new macros > do, just with an extra helper macro in between. /o\ Mistook __drm_printk() for the older drm_dev_printk() -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Intel-gfx] [PATCH 1/5] drm/i915: convert to using the drm_dbg_kms() macro. @ 2020-01-08 14:53 ` Chris Wilson 0 siblings, 0 replies; 42+ messages in thread From: Chris Wilson @ 2020-01-08 14:53 UTC (permalink / raw) To: Jani Nikula, Joonas Lahtinen, Wambui Karuga, airlied, daniel, rodrigo.vivi Cc: intel-gfx, seanpaul, linux-kernel, dri-devel Quoting Jani Nikula (2020-01-08 14:44:38) > On Wed, 08 Jan 2020, Chris Wilson <chris@chris-wilson.co.uk> wrote: > > Quoting Jani Nikula (2020-01-08 09:40:40) > >> On Wed, 08 Jan 2020, Joonas Lahtinen <joonas.lahtinen@linux.intel.com> wrote: > >> > Quoting Wambui Karuga (2020-01-07 17:13:29) > >> >> Convert the use of the DRM_DEBUG_KMS() logging macro to the new struct > >> >> drm_device based drm_dbg_kms() logging macro in i915/intel_pch.c. > >> >> > >> >> Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> > >> >> --- > >> >> drivers/gpu/drm/i915/intel_pch.c | 46 +++++++++++++++++--------------- > >> >> 1 file changed, 24 insertions(+), 22 deletions(-) > >> >> > >> >> diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c > >> >> index 43b68b5fc562..4ed60e1f01db 100644 > >> >> --- a/drivers/gpu/drm/i915/intel_pch.c > >> >> +++ b/drivers/gpu/drm/i915/intel_pch.c > >> >> @@ -12,90 +12,91 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) > >> >> { > >> >> switch (id) { > >> >> case INTEL_PCH_IBX_DEVICE_ID_TYPE: > >> >> - DRM_DEBUG_KMS("Found Ibex Peak PCH\n"); > >> >> + drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n"); > >> > > >> > Did we at some point consider i915_dbg_kms alias? That would just take > >> > dev_priv (or i915, as it's called in newer code). It would shorten many > >> > of the statements. > >> > > >> > i915_dbg_kms(dev_priv, ...) or i915_dbg_kms(i915, ...) > >> > >> I'd rather use the common drm logging macros. I thought about adding > >> i915 specific ones only if the drm device specific logging macros > >> weren't going to be merged. > > > > Why do they even exist? Why isn't it enough to do > > #define drm_info(drm, fmt, ...) dev_info(&(drm)->dev, fmt, ##__VA_ARGS) ? > > It *is* enough to do that, and that's essentially what the new macros > do, just with an extra helper macro in between. /o\ Mistook __drm_printk() for the older drm_dev_printk() -Chris _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH 2/5] drm/i915: use new struct drm_device logging macros. 2020-01-07 15:13 ` Wambui Karuga (?) @ 2020-01-07 15:13 ` Wambui Karuga -1 siblings, 0 replies; 42+ messages in thread From: Wambui Karuga @ 2020-01-07 15:13 UTC (permalink / raw) To: jani.nikula, joonas.lahtinen, rodrigo.vivi, airlied, daniel Cc: seanpaul, intel-gfx, dri-devel, linux-kernel This converts various instances of the struct device and printk based logging macros with the new struct drm_device based logging macros in i915/intel_pm.c Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> --- drivers/gpu/drm/i915/intel_pm.c | 351 ++++++++++++++++++-------------- 1 file changed, 194 insertions(+), 157 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 148ac455dfa7..bd2d30ecc030 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -199,8 +199,8 @@ static void ilk_get_mem_freq(struct drm_i915_private *dev_priv) dev_priv->mem_freq = 1600; break; default: - DRM_DEBUG_DRIVER("unknown memory frequency 0x%02x\n", - ddrpll & 0xff); + drm_dbg(&dev_priv->drm, "unknown memory frequency 0x%02x\n", + ddrpll & 0xff); dev_priv->mem_freq = 0; break; } @@ -228,8 +228,8 @@ static void ilk_get_mem_freq(struct drm_i915_private *dev_priv) dev_priv->fsb_freq = 6400; break; default: - DRM_DEBUG_DRIVER("unknown fsb frequency 0x%04x\n", - csipll & 0x3ff); + drm_dbg(&dev_priv->drm, "unknown fsb frequency 0x%04x\n", + csipll & 0x3ff); dev_priv->fsb_freq = 0; break; } @@ -314,7 +314,8 @@ static void chv_set_memory_dvfs(struct drm_i915_private *dev_priv, bool enable) if (wait_for((vlv_punit_read(dev_priv, PUNIT_REG_DDR_SETUP2) & FORCE_DDR_FREQ_REQ_ACK) == 0, 3)) - DRM_ERROR("timed out waiting for Punit DDR DVFS request\n"); + drm_err(&dev_priv->drm, + "timed out waiting for Punit DDR DVFS request\n"); vlv_punit_put(dev_priv); } @@ -383,9 +384,9 @@ static bool _intel_set_memory_cxsr(struct drm_i915_private *dev_priv, bool enabl trace_intel_memory_cxsr(dev_priv, was_enabled, enable); - DRM_DEBUG_KMS("memory self-refresh is %s (was %s)\n", - enableddisabled(enable), - enableddisabled(was_enabled)); + drm_dbg_kms(&dev_priv->drm, "memory self-refresh is %s (was %s)\n", + enableddisabled(enable), + enableddisabled(was_enabled)); return was_enabled; } @@ -510,8 +511,8 @@ static int i9xx_get_fifo_size(struct drm_i915_private *dev_priv, if (i9xx_plane == PLANE_B) size = ((dsparb >> DSPARB_CSTART_SHIFT) & 0x7f) - size; - DRM_DEBUG_KMS("FIFO size - (0x%08x) %c: %d\n", - dsparb, plane_name(i9xx_plane), size); + drm_dbg_kms(&dev_priv->drm, "FIFO size - (0x%08x) %c: %d\n", + dsparb, plane_name(i9xx_plane), size); return size; } @@ -527,8 +528,8 @@ static int i830_get_fifo_size(struct drm_i915_private *dev_priv, size = ((dsparb >> DSPARB_BEND_SHIFT) & 0x1ff) - size; size >>= 1; /* Convert to cachelines */ - DRM_DEBUG_KMS("FIFO size - (0x%08x) %c: %d\n", - dsparb, plane_name(i9xx_plane), size); + drm_dbg_kms(&dev_priv->drm, "FIFO size - (0x%08x) %c: %d\n", + dsparb, plane_name(i9xx_plane), size); return size; } @@ -542,8 +543,8 @@ static int i845_get_fifo_size(struct drm_i915_private *dev_priv, size = dsparb & 0x7f; size >>= 2; /* Convert to cachelines */ - DRM_DEBUG_KMS("FIFO size - (0x%08x) %c: %d\n", - dsparb, plane_name(i9xx_plane), size); + drm_dbg_kms(&dev_priv->drm, "FIFO size - (0x%08x) %c: %d\n", + dsparb, plane_name(i9xx_plane), size); return size; } @@ -870,7 +871,8 @@ static void pnv_update_wm(struct intel_crtc *unused_crtc) dev_priv->fsb_freq, dev_priv->mem_freq); if (!latency) { - DRM_DEBUG_KMS("Unknown FSB/MEM found, disable CxSR\n"); + drm_dbg_kms(&dev_priv->drm, + "Unknown FSB/MEM found, disable CxSR\n"); intel_set_memory_cxsr(dev_priv, false); return; } @@ -892,7 +894,7 @@ static void pnv_update_wm(struct intel_crtc *unused_crtc) reg &= ~DSPFW_SR_MASK; reg |= FW_WM(wm, SR); I915_WRITE(DSPFW1, reg); - DRM_DEBUG_KMS("DSPFW1 register is %x\n", reg); + drm_dbg_kms(&dev_priv->drm, "DSPFW1 register is %x\n", reg); /* cursor SR */ wm = intel_calculate_wm(clock, &pnv_cursor_wm, @@ -920,7 +922,7 @@ static void pnv_update_wm(struct intel_crtc *unused_crtc) reg &= ~DSPFW_HPLL_CURSOR_MASK; reg |= FW_WM(wm, HPLL_CURSOR); I915_WRITE(DSPFW3, reg); - DRM_DEBUG_KMS("DSPFW3 register is %x\n", reg); + drm_dbg_kms(&dev_priv->drm, "DSPFW3 register is %x\n", reg); intel_set_memory_cxsr(dev_priv, true); } else { @@ -1211,6 +1213,7 @@ static bool g4x_raw_plane_wm_compute(struct intel_crtc_state *crtc_state, const struct intel_plane_state *plane_state) { struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); int num_levels = intel_wm_num_levels(to_i915(plane->base.dev)); enum plane_id plane_id = plane->id; bool dirty = false; @@ -1263,16 +1266,18 @@ static bool g4x_raw_plane_wm_compute(struct intel_crtc_state *crtc_state, out: if (dirty) { - DRM_DEBUG_KMS("%s watermarks: normal=%d, SR=%d, HPLL=%d\n", - plane->base.name, - crtc_state->wm.g4x.raw[G4X_WM_LEVEL_NORMAL].plane[plane_id], - crtc_state->wm.g4x.raw[G4X_WM_LEVEL_SR].plane[plane_id], - crtc_state->wm.g4x.raw[G4X_WM_LEVEL_HPLL].plane[plane_id]); + drm_dbg_kms(&dev_priv->drm, + "%s watermarks: normal=%d, SR=%d, HPLL=%d\n", + plane->base.name, + crtc_state->wm.g4x.raw[G4X_WM_LEVEL_NORMAL].plane[plane_id], + crtc_state->wm.g4x.raw[G4X_WM_LEVEL_SR].plane[plane_id], + crtc_state->wm.g4x.raw[G4X_WM_LEVEL_HPLL].plane[plane_id]); if (plane_id == PLANE_PRIMARY) - DRM_DEBUG_KMS("FBC watermarks: SR=%d, HPLL=%d\n", - crtc_state->wm.g4x.raw[G4X_WM_LEVEL_SR].fbc, - crtc_state->wm.g4x.raw[G4X_WM_LEVEL_HPLL].fbc); + drm_dbg_kms(&dev_priv->drm, + "FBC watermarks: SR=%d, HPLL=%d\n", + crtc_state->wm.g4x.raw[G4X_WM_LEVEL_SR].fbc, + crtc_state->wm.g4x.raw[G4X_WM_LEVEL_HPLL].fbc); } return dirty; @@ -1790,6 +1795,7 @@ static bool vlv_raw_plane_wm_compute(struct intel_crtc_state *crtc_state, const struct intel_plane_state *plane_state) { struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); enum plane_id plane_id = plane->id; int num_levels = intel_wm_num_levels(to_i915(plane->base.dev)); int level; @@ -1817,11 +1823,12 @@ static bool vlv_raw_plane_wm_compute(struct intel_crtc_state *crtc_state, out: if (dirty) - DRM_DEBUG_KMS("%s watermarks: PM2=%d, PM5=%d, DDR DVFS=%d\n", - plane->base.name, - crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM2].plane[plane_id], - crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM5].plane[plane_id], - crtc_state->wm.vlv.raw[VLV_WM_LEVEL_DDR_DVFS].plane[plane_id]); + drm_dbg_kms(&dev_priv->drm, + "%s watermarks: PM2=%d, PM5=%d, DDR DVFS=%d\n", + plane->base.name, + crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM2].plane[plane_id], + crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM5].plane[plane_id], + crtc_state->wm.vlv.raw[VLV_WM_LEVEL_DDR_DVFS].plane[plane_id]); return dirty; } @@ -2236,8 +2243,9 @@ static void i965_update_wm(struct intel_crtc *unused_crtc) if (srwm < 0) srwm = 1; srwm &= 0x1ff; - DRM_DEBUG_KMS("self-refresh entries: %d, wm: %d\n", - entries, srwm); + drm_dbg_kms(&dev_priv->drm, + "self-refresh entries: %d, wm: %d\n", + entries, srwm); entries = intel_wm_method2(clock, htotal, crtc->base.cursor->state->crtc_w, 4, @@ -2250,8 +2258,9 @@ static void i965_update_wm(struct intel_crtc *unused_crtc) if (cursor_sr > i965_cursor_wm_info.max_wm) cursor_sr = i965_cursor_wm_info.max_wm; - DRM_DEBUG_KMS("self-refresh watermark: display plane %d " - "cursor %d\n", srwm, cursor_sr); + drm_dbg_kms(&dev_priv->drm, + "self-refresh watermark: display plane %d " + "cursor %d\n", srwm, cursor_sr); cxsr_enabled = true; } else { @@ -2260,8 +2269,9 @@ static void i965_update_wm(struct intel_crtc *unused_crtc) intel_set_memory_cxsr(dev_priv, false); } - DRM_DEBUG_KMS("Setting FIFO watermarks - A: 8, B: 8, C: 8, SR %d\n", - srwm); + drm_dbg_kms(&dev_priv->drm, + "Setting FIFO watermarks - A: 8, B: 8, C: 8, SR %d\n", + srwm); /* 965 has limitations... */ I915_WRITE(DSPFW1, FW_WM(srwm, SR) | @@ -2351,7 +2361,8 @@ static void i9xx_update_wm(struct intel_crtc *unused_crtc) planeb_wm = wm_info->max_wm; } - DRM_DEBUG_KMS("FIFO watermarks - A: %d, B: %d\n", planea_wm, planeb_wm); + drm_dbg_kms(&dev_priv->drm, + "FIFO watermarks - A: %d, B: %d\n", planea_wm, planeb_wm); if (IS_I915GM(dev_priv) && enabled) { struct drm_i915_gem_object *obj; @@ -2393,7 +2404,8 @@ static void i9xx_update_wm(struct intel_crtc *unused_crtc) entries = intel_wm_method2(clock, htotal, hdisplay, cpp, sr_latency_ns / 100); entries = DIV_ROUND_UP(entries, wm_info->cacheline_size); - DRM_DEBUG_KMS("self-refresh entries: %d\n", entries); + drm_dbg_kms(&dev_priv->drm, + "self-refresh entries: %d\n", entries); srwm = wm_info->fifo_size - entries; if (srwm < 0) srwm = 1; @@ -2405,8 +2417,9 @@ static void i9xx_update_wm(struct intel_crtc *unused_crtc) I915_WRITE(FW_BLC_SELF, srwm & 0x3f); } - DRM_DEBUG_KMS("Setting FIFO watermarks - A: %d, B: %d, C: %d, SR %d\n", - planea_wm, planeb_wm, cwm, srwm); + drm_dbg_kms(&dev_priv->drm, + "Setting FIFO watermarks - A: %d, B: %d, C: %d, SR %d\n", + planea_wm, planeb_wm, cwm, srwm); fwater_lo = ((planeb_wm & 0x3f) << 16) | (planea_wm & 0x3f); fwater_hi = (cwm & 0x1f); @@ -2442,7 +2455,8 @@ static void i845_update_wm(struct intel_crtc *unused_crtc) fwater_lo = I915_READ(FW_BLC) & ~0xfff; fwater_lo |= (3<<8) | planea_wm; - DRM_DEBUG_KMS("Setting FIFO watermarks - A: %d\n", planea_wm); + drm_dbg_kms(&dev_priv->drm, + "Setting FIFO watermarks - A: %d\n", planea_wm); I915_WRITE(FW_BLC, fwater_lo); } @@ -2841,7 +2855,8 @@ static void intel_read_wm_latency(struct drm_i915_private *dev_priv, &val, NULL); if (ret) { - DRM_ERROR("SKL Mailbox read error = %d\n", ret); + drm_err(&dev_priv->drm, + "SKL Mailbox read error = %d\n", ret); return; } @@ -2859,7 +2874,8 @@ static void intel_read_wm_latency(struct drm_i915_private *dev_priv, GEN9_PCODE_READ_MEM_LATENCY, &val, NULL); if (ret) { - DRM_ERROR("SKL Mailbox read error = %d\n", ret); + drm_err(&dev_priv->drm, + "SKL Mailbox read error = %d\n", ret); return; } @@ -2977,8 +2993,9 @@ static void intel_print_wm_latency(struct drm_i915_private *dev_priv, unsigned int latency = wm[level]; if (latency == 0) { - DRM_DEBUG_KMS("%s WM%d latency not provided\n", - name, level); + drm_dbg_kms(&dev_priv->drm, + "%s WM%d latency not provided\n", + name, level); continue; } @@ -2991,9 +3008,9 @@ static void intel_print_wm_latency(struct drm_i915_private *dev_priv, else if (level > 0) latency *= 5; - DRM_DEBUG_KMS("%s WM%d latency %u (%u.%u usec)\n", - name, level, wm[level], - latency / 10, latency % 10); + drm_dbg_kms(&dev_priv->drm, + "%s WM%d latency %u (%u.%u usec)\n", name, level, + wm[level], latency / 10, latency % 10); } } @@ -3027,7 +3044,8 @@ static void snb_wm_latency_quirk(struct drm_i915_private *dev_priv) if (!changed) return; - DRM_DEBUG_KMS("WM latency values increased to avoid potential underruns\n"); + drm_dbg_kms(&dev_priv->drm, + "WM latency values increased to avoid potential underruns\n"); intel_print_wm_latency(dev_priv, "Primary", dev_priv->wm.pri_latency); intel_print_wm_latency(dev_priv, "Sprite", dev_priv->wm.spr_latency); intel_print_wm_latency(dev_priv, "Cursor", dev_priv->wm.cur_latency); @@ -3055,7 +3073,8 @@ static void snb_wm_lp3_irq_quirk(struct drm_i915_private *dev_priv) dev_priv->wm.spr_latency[3] = 0; dev_priv->wm.cur_latency[3] = 0; - DRM_DEBUG_KMS("LP3 watermarks disabled due to potential for lost interrupts\n"); + drm_dbg_kms(&dev_priv->drm, + "LP3 watermarks disabled due to potential for lost interrupts\n"); intel_print_wm_latency(dev_priv, "Primary", dev_priv->wm.pri_latency); intel_print_wm_latency(dev_priv, "Sprite", dev_priv->wm.spr_latency); intel_print_wm_latency(dev_priv, "Cursor", dev_priv->wm.cur_latency); @@ -3105,7 +3124,7 @@ static bool ilk_validate_pipe_wm(const struct drm_i915_private *dev_priv, /* At least LP0 must be valid */ if (!ilk_validate_wm_level(0, &max, &pipe_wm->wm[0])) { - DRM_DEBUG_KMS("LP0 watermark invalid\n"); + drm_dbg_kms(&dev_priv->drm, "LP0 watermark invalid\n"); return false; } @@ -3682,7 +3701,7 @@ skl_setup_sagv_block_time(struct drm_i915_private *dev_priv) return; } - DRM_DEBUG_DRIVER("Couldn't read SAGV block time!\n"); + drm_dbg(&dev_priv->drm, "Couldn't read SAGV block time!\n"); } else if (IS_GEN(dev_priv, 11)) { dev_priv->sagv_block_time_us = 10; return; @@ -3722,7 +3741,7 @@ intel_enable_sagv(struct drm_i915_private *dev_priv) if (dev_priv->sagv_status == I915_SAGV_ENABLED) return 0; - DRM_DEBUG_KMS("Enabling SAGV\n"); + drm_dbg_kms(&dev_priv->drm, "Enabling SAGV\n"); ret = sandybridge_pcode_write(dev_priv, GEN9_PCODE_SAGV_CONTROL, GEN9_SAGV_ENABLE); @@ -3733,11 +3752,11 @@ intel_enable_sagv(struct drm_i915_private *dev_priv) * don't actually have SAGV. */ if (IS_SKYLAKE(dev_priv) && ret == -ENXIO) { - DRM_DEBUG_DRIVER("No SAGV found on system, ignoring\n"); + drm_dbg(&dev_priv->drm, "No SAGV found on system, ignoring\n"); dev_priv->sagv_status = I915_SAGV_NOT_CONTROLLED; return 0; } else if (ret < 0) { - DRM_ERROR("Failed to enable SAGV\n"); + drm_err(&dev_priv->drm, "Failed to enable SAGV\n"); return ret; } @@ -3756,7 +3775,7 @@ intel_disable_sagv(struct drm_i915_private *dev_priv) if (dev_priv->sagv_status == I915_SAGV_DISABLED) return 0; - DRM_DEBUG_KMS("Disabling SAGV\n"); + drm_dbg_kms(&dev_priv->drm, "Disabling SAGV\n"); /* bspec says to keep retrying for at least 1 ms */ ret = skl_pcode_request(dev_priv, GEN9_PCODE_SAGV_CONTROL, GEN9_SAGV_DISABLE, @@ -3767,11 +3786,11 @@ intel_disable_sagv(struct drm_i915_private *dev_priv) * don't actually have SAGV. */ if (IS_SKYLAKE(dev_priv) && ret == -ENXIO) { - DRM_DEBUG_DRIVER("No SAGV found on system, ignoring\n"); + drm_dbg(&dev_priv->drm, "No SAGV found on system, ignoring\n"); dev_priv->sagv_status = I915_SAGV_NOT_CONTROLLED; return 0; } else if (ret < 0) { - DRM_ERROR("Failed to disable SAGV (%d)\n", ret); + drm_err(&dev_priv->drm, "Failed to disable SAGV (%d)\n", ret); return ret; } @@ -4340,9 +4359,10 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *crtc_state, } if (level < 0) { - DRM_DEBUG_KMS("Requested display configuration exceeds system DDB limitations"); - DRM_DEBUG_KMS("minimum required %d/%d\n", blocks, - alloc_size); + drm_dbg_kms(&dev_priv->drm, + "Requested display configuration exceeds system DDB limitations"); + drm_dbg_kms(&dev_priv->drm, "minimum required %d/%d\n", + blocks, alloc_size); return -EINVAL; } @@ -4570,7 +4590,8 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state, /* only planar format has two planes */ if (color_plane == 1 && !intel_format_info_is_yuv_semiplanar(format, modifier)) { - DRM_DEBUG_KMS("Non planar format have single plane\n"); + drm_dbg_kms(&dev_priv->drm, + "Non planar format have single plane\n"); return -EINVAL; } @@ -5269,10 +5290,11 @@ skl_print_wm_changes(struct intel_atomic_state *state) if (skl_ddb_entry_equal(old, new)) continue; - DRM_DEBUG_KMS("[PLANE:%d:%s] ddb (%4d - %4d) -> (%4d - %4d), size %4d -> %4d\n", - plane->base.base.id, plane->base.name, - old->start, old->end, new->start, new->end, - skl_ddb_entry_size(old), skl_ddb_entry_size(new)); + drm_dbg_kms(&dev_priv->drm, + "[PLANE:%d:%s] ddb (%4d - %4d) -> (%4d - %4d), size %4d -> %4d\n", + plane->base.base.id, plane->base.name, + old->start, old->end, new->start, new->end, + skl_ddb_entry_size(old), skl_ddb_entry_size(new)); } for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { @@ -5285,70 +5307,74 @@ skl_print_wm_changes(struct intel_atomic_state *state) if (skl_plane_wm_equals(dev_priv, old_wm, new_wm)) continue; - DRM_DEBUG_KMS("[PLANE:%d:%s] level %cwm0,%cwm1,%cwm2,%cwm3,%cwm4,%cwm5,%cwm6,%cwm7,%ctwm" - " -> %cwm0,%cwm1,%cwm2,%cwm3,%cwm4,%cwm5,%cwm6,%cwm7,%ctwm\n", - plane->base.base.id, plane->base.name, - enast(old_wm->wm[0].plane_en), enast(old_wm->wm[1].plane_en), - enast(old_wm->wm[2].plane_en), enast(old_wm->wm[3].plane_en), - enast(old_wm->wm[4].plane_en), enast(old_wm->wm[5].plane_en), - enast(old_wm->wm[6].plane_en), enast(old_wm->wm[7].plane_en), - enast(old_wm->trans_wm.plane_en), - enast(new_wm->wm[0].plane_en), enast(new_wm->wm[1].plane_en), - enast(new_wm->wm[2].plane_en), enast(new_wm->wm[3].plane_en), - enast(new_wm->wm[4].plane_en), enast(new_wm->wm[5].plane_en), - enast(new_wm->wm[6].plane_en), enast(new_wm->wm[7].plane_en), - enast(new_wm->trans_wm.plane_en)); - - DRM_DEBUG_KMS("[PLANE:%d:%s] lines %c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d" + drm_dbg_kms(&dev_priv->drm, + "[PLANE:%d:%s] level %cwm0,%cwm1,%cwm2,%cwm3,%cwm4,%cwm5,%cwm6,%cwm7,%ctwm" + " -> %cwm0,%cwm1,%cwm2,%cwm3,%cwm4,%cwm5,%cwm6,%cwm7,%ctwm\n", + plane->base.base.id, plane->base.name, + enast(old_wm->wm[0].plane_en), enast(old_wm->wm[1].plane_en), + enast(old_wm->wm[2].plane_en), enast(old_wm->wm[3].plane_en), + enast(old_wm->wm[4].plane_en), enast(old_wm->wm[5].plane_en), + enast(old_wm->wm[6].plane_en), enast(old_wm->wm[7].plane_en), + enast(old_wm->trans_wm.plane_en), + enast(new_wm->wm[0].plane_en), enast(new_wm->wm[1].plane_en), + enast(new_wm->wm[2].plane_en), enast(new_wm->wm[3].plane_en), + enast(new_wm->wm[4].plane_en), enast(new_wm->wm[5].plane_en), + enast(new_wm->wm[6].plane_en), enast(new_wm->wm[7].plane_en), + enast(new_wm->trans_wm.plane_en)); + + drm_dbg_kms(&dev_priv->drm, + "[PLANE:%d:%s] lines %c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d" " -> %c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d\n", - plane->base.base.id, plane->base.name, - enast(old_wm->wm[0].ignore_lines), old_wm->wm[0].plane_res_l, - enast(old_wm->wm[1].ignore_lines), old_wm->wm[1].plane_res_l, - enast(old_wm->wm[2].ignore_lines), old_wm->wm[2].plane_res_l, - enast(old_wm->wm[3].ignore_lines), old_wm->wm[3].plane_res_l, - enast(old_wm->wm[4].ignore_lines), old_wm->wm[4].plane_res_l, - enast(old_wm->wm[5].ignore_lines), old_wm->wm[5].plane_res_l, - enast(old_wm->wm[6].ignore_lines), old_wm->wm[6].plane_res_l, - enast(old_wm->wm[7].ignore_lines), old_wm->wm[7].plane_res_l, - enast(old_wm->trans_wm.ignore_lines), old_wm->trans_wm.plane_res_l, - - enast(new_wm->wm[0].ignore_lines), new_wm->wm[0].plane_res_l, - enast(new_wm->wm[1].ignore_lines), new_wm->wm[1].plane_res_l, - enast(new_wm->wm[2].ignore_lines), new_wm->wm[2].plane_res_l, - enast(new_wm->wm[3].ignore_lines), new_wm->wm[3].plane_res_l, - enast(new_wm->wm[4].ignore_lines), new_wm->wm[4].plane_res_l, - enast(new_wm->wm[5].ignore_lines), new_wm->wm[5].plane_res_l, - enast(new_wm->wm[6].ignore_lines), new_wm->wm[6].plane_res_l, - enast(new_wm->wm[7].ignore_lines), new_wm->wm[7].plane_res_l, - enast(new_wm->trans_wm.ignore_lines), new_wm->trans_wm.plane_res_l); - - DRM_DEBUG_KMS("[PLANE:%d:%s] blocks %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d" - " -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d\n", - plane->base.base.id, plane->base.name, - old_wm->wm[0].plane_res_b, old_wm->wm[1].plane_res_b, - old_wm->wm[2].plane_res_b, old_wm->wm[3].plane_res_b, - old_wm->wm[4].plane_res_b, old_wm->wm[5].plane_res_b, - old_wm->wm[6].plane_res_b, old_wm->wm[7].plane_res_b, - old_wm->trans_wm.plane_res_b, - new_wm->wm[0].plane_res_b, new_wm->wm[1].plane_res_b, - new_wm->wm[2].plane_res_b, new_wm->wm[3].plane_res_b, - new_wm->wm[4].plane_res_b, new_wm->wm[5].plane_res_b, - new_wm->wm[6].plane_res_b, new_wm->wm[7].plane_res_b, - new_wm->trans_wm.plane_res_b); - - DRM_DEBUG_KMS("[PLANE:%d:%s] min_ddb %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d" - " -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d\n", - plane->base.base.id, plane->base.name, - old_wm->wm[0].min_ddb_alloc, old_wm->wm[1].min_ddb_alloc, - old_wm->wm[2].min_ddb_alloc, old_wm->wm[3].min_ddb_alloc, - old_wm->wm[4].min_ddb_alloc, old_wm->wm[5].min_ddb_alloc, - old_wm->wm[6].min_ddb_alloc, old_wm->wm[7].min_ddb_alloc, - old_wm->trans_wm.min_ddb_alloc, - new_wm->wm[0].min_ddb_alloc, new_wm->wm[1].min_ddb_alloc, - new_wm->wm[2].min_ddb_alloc, new_wm->wm[3].min_ddb_alloc, - new_wm->wm[4].min_ddb_alloc, new_wm->wm[5].min_ddb_alloc, - new_wm->wm[6].min_ddb_alloc, new_wm->wm[7].min_ddb_alloc, - new_wm->trans_wm.min_ddb_alloc); + plane->base.base.id, plane->base.name, + enast(old_wm->wm[0].ignore_lines), old_wm->wm[0].plane_res_l, + enast(old_wm->wm[1].ignore_lines), old_wm->wm[1].plane_res_l, + enast(old_wm->wm[2].ignore_lines), old_wm->wm[2].plane_res_l, + enast(old_wm->wm[3].ignore_lines), old_wm->wm[3].plane_res_l, + enast(old_wm->wm[4].ignore_lines), old_wm->wm[4].plane_res_l, + enast(old_wm->wm[5].ignore_lines), old_wm->wm[5].plane_res_l, + enast(old_wm->wm[6].ignore_lines), old_wm->wm[6].plane_res_l, + enast(old_wm->wm[7].ignore_lines), old_wm->wm[7].plane_res_l, + enast(old_wm->trans_wm.ignore_lines), old_wm->trans_wm.plane_res_l, + + enast(new_wm->wm[0].ignore_lines), new_wm->wm[0].plane_res_l, + enast(new_wm->wm[1].ignore_lines), new_wm->wm[1].plane_res_l, + enast(new_wm->wm[2].ignore_lines), new_wm->wm[2].plane_res_l, + enast(new_wm->wm[3].ignore_lines), new_wm->wm[3].plane_res_l, + enast(new_wm->wm[4].ignore_lines), new_wm->wm[4].plane_res_l, + enast(new_wm->wm[5].ignore_lines), new_wm->wm[5].plane_res_l, + enast(new_wm->wm[6].ignore_lines), new_wm->wm[6].plane_res_l, + enast(new_wm->wm[7].ignore_lines), new_wm->wm[7].plane_res_l, + enast(new_wm->trans_wm.ignore_lines), new_wm->trans_wm.plane_res_l); + + drm_dbg_kms(&dev_priv->drm, + "[PLANE:%d:%s] blocks %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d" + " -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d\n", + plane->base.base.id, plane->base.name, + old_wm->wm[0].plane_res_b, old_wm->wm[1].plane_res_b, + old_wm->wm[2].plane_res_b, old_wm->wm[3].plane_res_b, + old_wm->wm[4].plane_res_b, old_wm->wm[5].plane_res_b, + old_wm->wm[6].plane_res_b, old_wm->wm[7].plane_res_b, + old_wm->trans_wm.plane_res_b, + new_wm->wm[0].plane_res_b, new_wm->wm[1].plane_res_b, + new_wm->wm[2].plane_res_b, new_wm->wm[3].plane_res_b, + new_wm->wm[4].plane_res_b, new_wm->wm[5].plane_res_b, + new_wm->wm[6].plane_res_b, new_wm->wm[7].plane_res_b, + new_wm->trans_wm.plane_res_b); + + drm_dbg_kms(&dev_priv->drm, + "[PLANE:%d:%s] min_ddb %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d" + " -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d\n", + plane->base.base.id, plane->base.name, + old_wm->wm[0].min_ddb_alloc, old_wm->wm[1].min_ddb_alloc, + old_wm->wm[2].min_ddb_alloc, old_wm->wm[3].min_ddb_alloc, + old_wm->wm[4].min_ddb_alloc, old_wm->wm[5].min_ddb_alloc, + old_wm->wm[6].min_ddb_alloc, old_wm->wm[7].min_ddb_alloc, + old_wm->trans_wm.min_ddb_alloc, + new_wm->wm[0].min_ddb_alloc, new_wm->wm[1].min_ddb_alloc, + new_wm->wm[2].min_ddb_alloc, new_wm->wm[3].min_ddb_alloc, + new_wm->wm[4].min_ddb_alloc, new_wm->wm[5].min_ddb_alloc, + new_wm->wm[6].min_ddb_alloc, new_wm->wm[7].min_ddb_alloc, + new_wm->trans_wm.min_ddb_alloc); } } } @@ -5940,19 +5966,22 @@ void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv) crtc_state->wm.g4x.optimal = *active; crtc_state->wm.g4x.intermediate = *active; - DRM_DEBUG_KMS("Initial watermarks: pipe %c, plane=%d, cursor=%d, sprite=%d\n", - pipe_name(pipe), - wm->pipe[pipe].plane[PLANE_PRIMARY], - wm->pipe[pipe].plane[PLANE_CURSOR], - wm->pipe[pipe].plane[PLANE_SPRITE0]); + drm_dbg_kms(&dev_priv->drm, + "Initial watermarks: pipe %c, plane=%d, cursor=%d, sprite=%d\n", + pipe_name(pipe), + wm->pipe[pipe].plane[PLANE_PRIMARY], + wm->pipe[pipe].plane[PLANE_CURSOR], + wm->pipe[pipe].plane[PLANE_SPRITE0]); } - DRM_DEBUG_KMS("Initial SR watermarks: plane=%d, cursor=%d fbc=%d\n", - wm->sr.plane, wm->sr.cursor, wm->sr.fbc); - DRM_DEBUG_KMS("Initial HPLL watermarks: plane=%d, SR cursor=%d fbc=%d\n", - wm->hpll.plane, wm->hpll.cursor, wm->hpll.fbc); - DRM_DEBUG_KMS("Initial SR=%s HPLL=%s FBC=%s\n", - yesno(wm->cxsr), yesno(wm->hpll_en), yesno(wm->fbc_en)); + drm_dbg_kms(&dev_priv->drm, + "Initial SR watermarks: plane=%d, cursor=%d fbc=%d\n", + wm->sr.plane, wm->sr.cursor, wm->sr.fbc); + drm_dbg_kms(&dev_priv->drm, + "Initial HPLL watermarks: plane=%d, SR cursor=%d fbc=%d\n", + wm->hpll.plane, wm->hpll.cursor, wm->hpll.fbc); + drm_dbg_kms(&dev_priv->drm, "Initial SR=%s HPLL=%s FBC=%s\n", + yesno(wm->cxsr), yesno(wm->hpll_en), yesno(wm->fbc_en)); } void g4x_wm_sanitize(struct drm_i915_private *dev_priv) @@ -6044,8 +6073,9 @@ void vlv_wm_get_hw_state(struct drm_i915_private *dev_priv) if (wait_for((vlv_punit_read(dev_priv, PUNIT_REG_DDR_SETUP2) & FORCE_DDR_FREQ_REQ_ACK) == 0, 3)) { - DRM_DEBUG_KMS("Punit not acking DDR DVFS request, " - "assuming DDR DVFS is disabled\n"); + drm_dbg_kms(&dev_priv->drm, + "Punit not acking DDR DVFS request, " + "assuming DDR DVFS is disabled\n"); dev_priv->wm.max_level = VLV_WM_LEVEL_PM5; } else { val = vlv_punit_read(dev_priv, PUNIT_REG_DDR_SETUP2); @@ -6096,16 +6126,18 @@ void vlv_wm_get_hw_state(struct drm_i915_private *dev_priv) crtc_state->wm.vlv.optimal = *active; crtc_state->wm.vlv.intermediate = *active; - DRM_DEBUG_KMS("Initial watermarks: pipe %c, plane=%d, cursor=%d, sprite0=%d, sprite1=%d\n", - pipe_name(pipe), - wm->pipe[pipe].plane[PLANE_PRIMARY], - wm->pipe[pipe].plane[PLANE_CURSOR], - wm->pipe[pipe].plane[PLANE_SPRITE0], - wm->pipe[pipe].plane[PLANE_SPRITE1]); + drm_dbg_kms(&dev_priv->drm, + "Initial watermarks: pipe %c, plane=%d, cursor=%d, sprite0=%d, sprite1=%d\n", + pipe_name(pipe), + wm->pipe[pipe].plane[PLANE_PRIMARY], + wm->pipe[pipe].plane[PLANE_CURSOR], + wm->pipe[pipe].plane[PLANE_SPRITE0], + wm->pipe[pipe].plane[PLANE_SPRITE1]); } - DRM_DEBUG_KMS("Initial watermarks: SR plane=%d, SR cursor=%d level=%d cxsr=%d\n", - wm->sr.plane, wm->sr.cursor, wm->level, wm->cxsr); + drm_dbg_kms(&dev_priv->drm, + "Initial watermarks: SR plane=%d, SR cursor=%d level=%d cxsr=%d\n", + wm->sr.plane, wm->sr.cursor, wm->level, wm->cxsr); } void vlv_wm_sanitize(struct drm_i915_private *dev_priv) @@ -6421,8 +6453,9 @@ static void gen6_check_mch_setup(struct drm_i915_private *dev_priv) tmp = I915_READ(MCH_SSKPD); if ((tmp & MCH_SSKPD_WM0_MASK) != MCH_SSKPD_WM0_VAL) - DRM_DEBUG_KMS("Wrong MCH_SSKPD value: 0x%08x This can cause underruns.\n", - tmp); + drm_dbg_kms(&dev_priv->drm, + "Wrong MCH_SSKPD value: 0x%08x This can cause underruns.\n", + tmp); } static void gen6_init_clock_gating(struct drm_i915_private *dev_priv) @@ -7137,7 +7170,8 @@ void intel_suspend_hw(struct drm_i915_private *dev_priv) static void nop_init_clock_gating(struct drm_i915_private *dev_priv) { - DRM_DEBUG_KMS("No clock gating settings or workarounds applied.\n"); + drm_dbg_kms(&dev_priv->drm, + "No clock gating settings or workarounds applied.\n"); } /** @@ -7232,8 +7266,9 @@ void intel_init_pm(struct drm_i915_private *dev_priv) dev_priv->display.optimize_watermarks = ilk_optimize_watermarks; } else { - DRM_DEBUG_KMS("Failed to read display plane latency. " - "Disable CxSR\n"); + drm_dbg_kms(&dev_priv->drm, + "Failed to read display plane latency. " + "Disable CxSR\n"); } } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { vlv_setup_wm_latency(dev_priv); @@ -7253,7 +7288,8 @@ void intel_init_pm(struct drm_i915_private *dev_priv) dev_priv->is_ddr3, dev_priv->fsb_freq, dev_priv->mem_freq)) { - DRM_INFO("failed to find known CxSR latency " + drm_info(&dev_priv->drm, + "failed to find known CxSR latency " "(found ddr%s fsb freq %d, mem freq %d), " "disabling CxSR\n", (dev_priv->is_ddr3 == 1) ? "3" : "2", @@ -7277,7 +7313,8 @@ void intel_init_pm(struct drm_i915_private *dev_priv) dev_priv->display.get_fifo_size = i830_get_fifo_size; } } else { - DRM_ERROR("unexpected fall-through in intel_init_pm\n"); + drm_err(&dev_priv->drm, + "unexpected fall-through in %s\n", __func__); } } -- 2.24.1 ^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Intel-gfx] [PATCH 2/5] drm/i915: use new struct drm_device logging macros. @ 2020-01-07 15:13 ` Wambui Karuga 0 siblings, 0 replies; 42+ messages in thread From: Wambui Karuga @ 2020-01-07 15:13 UTC (permalink / raw) To: jani.nikula, joonas.lahtinen, rodrigo.vivi, airlied, daniel Cc: intel-gfx, seanpaul, linux-kernel, dri-devel This converts various instances of the struct device and printk based logging macros with the new struct drm_device based logging macros in i915/intel_pm.c Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> --- drivers/gpu/drm/i915/intel_pm.c | 351 ++++++++++++++++++-------------- 1 file changed, 194 insertions(+), 157 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 148ac455dfa7..bd2d30ecc030 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -199,8 +199,8 @@ static void ilk_get_mem_freq(struct drm_i915_private *dev_priv) dev_priv->mem_freq = 1600; break; default: - DRM_DEBUG_DRIVER("unknown memory frequency 0x%02x\n", - ddrpll & 0xff); + drm_dbg(&dev_priv->drm, "unknown memory frequency 0x%02x\n", + ddrpll & 0xff); dev_priv->mem_freq = 0; break; } @@ -228,8 +228,8 @@ static void ilk_get_mem_freq(struct drm_i915_private *dev_priv) dev_priv->fsb_freq = 6400; break; default: - DRM_DEBUG_DRIVER("unknown fsb frequency 0x%04x\n", - csipll & 0x3ff); + drm_dbg(&dev_priv->drm, "unknown fsb frequency 0x%04x\n", + csipll & 0x3ff); dev_priv->fsb_freq = 0; break; } @@ -314,7 +314,8 @@ static void chv_set_memory_dvfs(struct drm_i915_private *dev_priv, bool enable) if (wait_for((vlv_punit_read(dev_priv, PUNIT_REG_DDR_SETUP2) & FORCE_DDR_FREQ_REQ_ACK) == 0, 3)) - DRM_ERROR("timed out waiting for Punit DDR DVFS request\n"); + drm_err(&dev_priv->drm, + "timed out waiting for Punit DDR DVFS request\n"); vlv_punit_put(dev_priv); } @@ -383,9 +384,9 @@ static bool _intel_set_memory_cxsr(struct drm_i915_private *dev_priv, bool enabl trace_intel_memory_cxsr(dev_priv, was_enabled, enable); - DRM_DEBUG_KMS("memory self-refresh is %s (was %s)\n", - enableddisabled(enable), - enableddisabled(was_enabled)); + drm_dbg_kms(&dev_priv->drm, "memory self-refresh is %s (was %s)\n", + enableddisabled(enable), + enableddisabled(was_enabled)); return was_enabled; } @@ -510,8 +511,8 @@ static int i9xx_get_fifo_size(struct drm_i915_private *dev_priv, if (i9xx_plane == PLANE_B) size = ((dsparb >> DSPARB_CSTART_SHIFT) & 0x7f) - size; - DRM_DEBUG_KMS("FIFO size - (0x%08x) %c: %d\n", - dsparb, plane_name(i9xx_plane), size); + drm_dbg_kms(&dev_priv->drm, "FIFO size - (0x%08x) %c: %d\n", + dsparb, plane_name(i9xx_plane), size); return size; } @@ -527,8 +528,8 @@ static int i830_get_fifo_size(struct drm_i915_private *dev_priv, size = ((dsparb >> DSPARB_BEND_SHIFT) & 0x1ff) - size; size >>= 1; /* Convert to cachelines */ - DRM_DEBUG_KMS("FIFO size - (0x%08x) %c: %d\n", - dsparb, plane_name(i9xx_plane), size); + drm_dbg_kms(&dev_priv->drm, "FIFO size - (0x%08x) %c: %d\n", + dsparb, plane_name(i9xx_plane), size); return size; } @@ -542,8 +543,8 @@ static int i845_get_fifo_size(struct drm_i915_private *dev_priv, size = dsparb & 0x7f; size >>= 2; /* Convert to cachelines */ - DRM_DEBUG_KMS("FIFO size - (0x%08x) %c: %d\n", - dsparb, plane_name(i9xx_plane), size); + drm_dbg_kms(&dev_priv->drm, "FIFO size - (0x%08x) %c: %d\n", + dsparb, plane_name(i9xx_plane), size); return size; } @@ -870,7 +871,8 @@ static void pnv_update_wm(struct intel_crtc *unused_crtc) dev_priv->fsb_freq, dev_priv->mem_freq); if (!latency) { - DRM_DEBUG_KMS("Unknown FSB/MEM found, disable CxSR\n"); + drm_dbg_kms(&dev_priv->drm, + "Unknown FSB/MEM found, disable CxSR\n"); intel_set_memory_cxsr(dev_priv, false); return; } @@ -892,7 +894,7 @@ static void pnv_update_wm(struct intel_crtc *unused_crtc) reg &= ~DSPFW_SR_MASK; reg |= FW_WM(wm, SR); I915_WRITE(DSPFW1, reg); - DRM_DEBUG_KMS("DSPFW1 register is %x\n", reg); + drm_dbg_kms(&dev_priv->drm, "DSPFW1 register is %x\n", reg); /* cursor SR */ wm = intel_calculate_wm(clock, &pnv_cursor_wm, @@ -920,7 +922,7 @@ static void pnv_update_wm(struct intel_crtc *unused_crtc) reg &= ~DSPFW_HPLL_CURSOR_MASK; reg |= FW_WM(wm, HPLL_CURSOR); I915_WRITE(DSPFW3, reg); - DRM_DEBUG_KMS("DSPFW3 register is %x\n", reg); + drm_dbg_kms(&dev_priv->drm, "DSPFW3 register is %x\n", reg); intel_set_memory_cxsr(dev_priv, true); } else { @@ -1211,6 +1213,7 @@ static bool g4x_raw_plane_wm_compute(struct intel_crtc_state *crtc_state, const struct intel_plane_state *plane_state) { struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); int num_levels = intel_wm_num_levels(to_i915(plane->base.dev)); enum plane_id plane_id = plane->id; bool dirty = false; @@ -1263,16 +1266,18 @@ static bool g4x_raw_plane_wm_compute(struct intel_crtc_state *crtc_state, out: if (dirty) { - DRM_DEBUG_KMS("%s watermarks: normal=%d, SR=%d, HPLL=%d\n", - plane->base.name, - crtc_state->wm.g4x.raw[G4X_WM_LEVEL_NORMAL].plane[plane_id], - crtc_state->wm.g4x.raw[G4X_WM_LEVEL_SR].plane[plane_id], - crtc_state->wm.g4x.raw[G4X_WM_LEVEL_HPLL].plane[plane_id]); + drm_dbg_kms(&dev_priv->drm, + "%s watermarks: normal=%d, SR=%d, HPLL=%d\n", + plane->base.name, + crtc_state->wm.g4x.raw[G4X_WM_LEVEL_NORMAL].plane[plane_id], + crtc_state->wm.g4x.raw[G4X_WM_LEVEL_SR].plane[plane_id], + crtc_state->wm.g4x.raw[G4X_WM_LEVEL_HPLL].plane[plane_id]); if (plane_id == PLANE_PRIMARY) - DRM_DEBUG_KMS("FBC watermarks: SR=%d, HPLL=%d\n", - crtc_state->wm.g4x.raw[G4X_WM_LEVEL_SR].fbc, - crtc_state->wm.g4x.raw[G4X_WM_LEVEL_HPLL].fbc); + drm_dbg_kms(&dev_priv->drm, + "FBC watermarks: SR=%d, HPLL=%d\n", + crtc_state->wm.g4x.raw[G4X_WM_LEVEL_SR].fbc, + crtc_state->wm.g4x.raw[G4X_WM_LEVEL_HPLL].fbc); } return dirty; @@ -1790,6 +1795,7 @@ static bool vlv_raw_plane_wm_compute(struct intel_crtc_state *crtc_state, const struct intel_plane_state *plane_state) { struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); enum plane_id plane_id = plane->id; int num_levels = intel_wm_num_levels(to_i915(plane->base.dev)); int level; @@ -1817,11 +1823,12 @@ static bool vlv_raw_plane_wm_compute(struct intel_crtc_state *crtc_state, out: if (dirty) - DRM_DEBUG_KMS("%s watermarks: PM2=%d, PM5=%d, DDR DVFS=%d\n", - plane->base.name, - crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM2].plane[plane_id], - crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM5].plane[plane_id], - crtc_state->wm.vlv.raw[VLV_WM_LEVEL_DDR_DVFS].plane[plane_id]); + drm_dbg_kms(&dev_priv->drm, + "%s watermarks: PM2=%d, PM5=%d, DDR DVFS=%d\n", + plane->base.name, + crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM2].plane[plane_id], + crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM5].plane[plane_id], + crtc_state->wm.vlv.raw[VLV_WM_LEVEL_DDR_DVFS].plane[plane_id]); return dirty; } @@ -2236,8 +2243,9 @@ static void i965_update_wm(struct intel_crtc *unused_crtc) if (srwm < 0) srwm = 1; srwm &= 0x1ff; - DRM_DEBUG_KMS("self-refresh entries: %d, wm: %d\n", - entries, srwm); + drm_dbg_kms(&dev_priv->drm, + "self-refresh entries: %d, wm: %d\n", + entries, srwm); entries = intel_wm_method2(clock, htotal, crtc->base.cursor->state->crtc_w, 4, @@ -2250,8 +2258,9 @@ static void i965_update_wm(struct intel_crtc *unused_crtc) if (cursor_sr > i965_cursor_wm_info.max_wm) cursor_sr = i965_cursor_wm_info.max_wm; - DRM_DEBUG_KMS("self-refresh watermark: display plane %d " - "cursor %d\n", srwm, cursor_sr); + drm_dbg_kms(&dev_priv->drm, + "self-refresh watermark: display plane %d " + "cursor %d\n", srwm, cursor_sr); cxsr_enabled = true; } else { @@ -2260,8 +2269,9 @@ static void i965_update_wm(struct intel_crtc *unused_crtc) intel_set_memory_cxsr(dev_priv, false); } - DRM_DEBUG_KMS("Setting FIFO watermarks - A: 8, B: 8, C: 8, SR %d\n", - srwm); + drm_dbg_kms(&dev_priv->drm, + "Setting FIFO watermarks - A: 8, B: 8, C: 8, SR %d\n", + srwm); /* 965 has limitations... */ I915_WRITE(DSPFW1, FW_WM(srwm, SR) | @@ -2351,7 +2361,8 @@ static void i9xx_update_wm(struct intel_crtc *unused_crtc) planeb_wm = wm_info->max_wm; } - DRM_DEBUG_KMS("FIFO watermarks - A: %d, B: %d\n", planea_wm, planeb_wm); + drm_dbg_kms(&dev_priv->drm, + "FIFO watermarks - A: %d, B: %d\n", planea_wm, planeb_wm); if (IS_I915GM(dev_priv) && enabled) { struct drm_i915_gem_object *obj; @@ -2393,7 +2404,8 @@ static void i9xx_update_wm(struct intel_crtc *unused_crtc) entries = intel_wm_method2(clock, htotal, hdisplay, cpp, sr_latency_ns / 100); entries = DIV_ROUND_UP(entries, wm_info->cacheline_size); - DRM_DEBUG_KMS("self-refresh entries: %d\n", entries); + drm_dbg_kms(&dev_priv->drm, + "self-refresh entries: %d\n", entries); srwm = wm_info->fifo_size - entries; if (srwm < 0) srwm = 1; @@ -2405,8 +2417,9 @@ static void i9xx_update_wm(struct intel_crtc *unused_crtc) I915_WRITE(FW_BLC_SELF, srwm & 0x3f); } - DRM_DEBUG_KMS("Setting FIFO watermarks - A: %d, B: %d, C: %d, SR %d\n", - planea_wm, planeb_wm, cwm, srwm); + drm_dbg_kms(&dev_priv->drm, + "Setting FIFO watermarks - A: %d, B: %d, C: %d, SR %d\n", + planea_wm, planeb_wm, cwm, srwm); fwater_lo = ((planeb_wm & 0x3f) << 16) | (planea_wm & 0x3f); fwater_hi = (cwm & 0x1f); @@ -2442,7 +2455,8 @@ static void i845_update_wm(struct intel_crtc *unused_crtc) fwater_lo = I915_READ(FW_BLC) & ~0xfff; fwater_lo |= (3<<8) | planea_wm; - DRM_DEBUG_KMS("Setting FIFO watermarks - A: %d\n", planea_wm); + drm_dbg_kms(&dev_priv->drm, + "Setting FIFO watermarks - A: %d\n", planea_wm); I915_WRITE(FW_BLC, fwater_lo); } @@ -2841,7 +2855,8 @@ static void intel_read_wm_latency(struct drm_i915_private *dev_priv, &val, NULL); if (ret) { - DRM_ERROR("SKL Mailbox read error = %d\n", ret); + drm_err(&dev_priv->drm, + "SKL Mailbox read error = %d\n", ret); return; } @@ -2859,7 +2874,8 @@ static void intel_read_wm_latency(struct drm_i915_private *dev_priv, GEN9_PCODE_READ_MEM_LATENCY, &val, NULL); if (ret) { - DRM_ERROR("SKL Mailbox read error = %d\n", ret); + drm_err(&dev_priv->drm, + "SKL Mailbox read error = %d\n", ret); return; } @@ -2977,8 +2993,9 @@ static void intel_print_wm_latency(struct drm_i915_private *dev_priv, unsigned int latency = wm[level]; if (latency == 0) { - DRM_DEBUG_KMS("%s WM%d latency not provided\n", - name, level); + drm_dbg_kms(&dev_priv->drm, + "%s WM%d latency not provided\n", + name, level); continue; } @@ -2991,9 +3008,9 @@ static void intel_print_wm_latency(struct drm_i915_private *dev_priv, else if (level > 0) latency *= 5; - DRM_DEBUG_KMS("%s WM%d latency %u (%u.%u usec)\n", - name, level, wm[level], - latency / 10, latency % 10); + drm_dbg_kms(&dev_priv->drm, + "%s WM%d latency %u (%u.%u usec)\n", name, level, + wm[level], latency / 10, latency % 10); } } @@ -3027,7 +3044,8 @@ static void snb_wm_latency_quirk(struct drm_i915_private *dev_priv) if (!changed) return; - DRM_DEBUG_KMS("WM latency values increased to avoid potential underruns\n"); + drm_dbg_kms(&dev_priv->drm, + "WM latency values increased to avoid potential underruns\n"); intel_print_wm_latency(dev_priv, "Primary", dev_priv->wm.pri_latency); intel_print_wm_latency(dev_priv, "Sprite", dev_priv->wm.spr_latency); intel_print_wm_latency(dev_priv, "Cursor", dev_priv->wm.cur_latency); @@ -3055,7 +3073,8 @@ static void snb_wm_lp3_irq_quirk(struct drm_i915_private *dev_priv) dev_priv->wm.spr_latency[3] = 0; dev_priv->wm.cur_latency[3] = 0; - DRM_DEBUG_KMS("LP3 watermarks disabled due to potential for lost interrupts\n"); + drm_dbg_kms(&dev_priv->drm, + "LP3 watermarks disabled due to potential for lost interrupts\n"); intel_print_wm_latency(dev_priv, "Primary", dev_priv->wm.pri_latency); intel_print_wm_latency(dev_priv, "Sprite", dev_priv->wm.spr_latency); intel_print_wm_latency(dev_priv, "Cursor", dev_priv->wm.cur_latency); @@ -3105,7 +3124,7 @@ static bool ilk_validate_pipe_wm(const struct drm_i915_private *dev_priv, /* At least LP0 must be valid */ if (!ilk_validate_wm_level(0, &max, &pipe_wm->wm[0])) { - DRM_DEBUG_KMS("LP0 watermark invalid\n"); + drm_dbg_kms(&dev_priv->drm, "LP0 watermark invalid\n"); return false; } @@ -3682,7 +3701,7 @@ skl_setup_sagv_block_time(struct drm_i915_private *dev_priv) return; } - DRM_DEBUG_DRIVER("Couldn't read SAGV block time!\n"); + drm_dbg(&dev_priv->drm, "Couldn't read SAGV block time!\n"); } else if (IS_GEN(dev_priv, 11)) { dev_priv->sagv_block_time_us = 10; return; @@ -3722,7 +3741,7 @@ intel_enable_sagv(struct drm_i915_private *dev_priv) if (dev_priv->sagv_status == I915_SAGV_ENABLED) return 0; - DRM_DEBUG_KMS("Enabling SAGV\n"); + drm_dbg_kms(&dev_priv->drm, "Enabling SAGV\n"); ret = sandybridge_pcode_write(dev_priv, GEN9_PCODE_SAGV_CONTROL, GEN9_SAGV_ENABLE); @@ -3733,11 +3752,11 @@ intel_enable_sagv(struct drm_i915_private *dev_priv) * don't actually have SAGV. */ if (IS_SKYLAKE(dev_priv) && ret == -ENXIO) { - DRM_DEBUG_DRIVER("No SAGV found on system, ignoring\n"); + drm_dbg(&dev_priv->drm, "No SAGV found on system, ignoring\n"); dev_priv->sagv_status = I915_SAGV_NOT_CONTROLLED; return 0; } else if (ret < 0) { - DRM_ERROR("Failed to enable SAGV\n"); + drm_err(&dev_priv->drm, "Failed to enable SAGV\n"); return ret; } @@ -3756,7 +3775,7 @@ intel_disable_sagv(struct drm_i915_private *dev_priv) if (dev_priv->sagv_status == I915_SAGV_DISABLED) return 0; - DRM_DEBUG_KMS("Disabling SAGV\n"); + drm_dbg_kms(&dev_priv->drm, "Disabling SAGV\n"); /* bspec says to keep retrying for at least 1 ms */ ret = skl_pcode_request(dev_priv, GEN9_PCODE_SAGV_CONTROL, GEN9_SAGV_DISABLE, @@ -3767,11 +3786,11 @@ intel_disable_sagv(struct drm_i915_private *dev_priv) * don't actually have SAGV. */ if (IS_SKYLAKE(dev_priv) && ret == -ENXIO) { - DRM_DEBUG_DRIVER("No SAGV found on system, ignoring\n"); + drm_dbg(&dev_priv->drm, "No SAGV found on system, ignoring\n"); dev_priv->sagv_status = I915_SAGV_NOT_CONTROLLED; return 0; } else if (ret < 0) { - DRM_ERROR("Failed to disable SAGV (%d)\n", ret); + drm_err(&dev_priv->drm, "Failed to disable SAGV (%d)\n", ret); return ret; } @@ -4340,9 +4359,10 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *crtc_state, } if (level < 0) { - DRM_DEBUG_KMS("Requested display configuration exceeds system DDB limitations"); - DRM_DEBUG_KMS("minimum required %d/%d\n", blocks, - alloc_size); + drm_dbg_kms(&dev_priv->drm, + "Requested display configuration exceeds system DDB limitations"); + drm_dbg_kms(&dev_priv->drm, "minimum required %d/%d\n", + blocks, alloc_size); return -EINVAL; } @@ -4570,7 +4590,8 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state, /* only planar format has two planes */ if (color_plane == 1 && !intel_format_info_is_yuv_semiplanar(format, modifier)) { - DRM_DEBUG_KMS("Non planar format have single plane\n"); + drm_dbg_kms(&dev_priv->drm, + "Non planar format have single plane\n"); return -EINVAL; } @@ -5269,10 +5290,11 @@ skl_print_wm_changes(struct intel_atomic_state *state) if (skl_ddb_entry_equal(old, new)) continue; - DRM_DEBUG_KMS("[PLANE:%d:%s] ddb (%4d - %4d) -> (%4d - %4d), size %4d -> %4d\n", - plane->base.base.id, plane->base.name, - old->start, old->end, new->start, new->end, - skl_ddb_entry_size(old), skl_ddb_entry_size(new)); + drm_dbg_kms(&dev_priv->drm, + "[PLANE:%d:%s] ddb (%4d - %4d) -> (%4d - %4d), size %4d -> %4d\n", + plane->base.base.id, plane->base.name, + old->start, old->end, new->start, new->end, + skl_ddb_entry_size(old), skl_ddb_entry_size(new)); } for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { @@ -5285,70 +5307,74 @@ skl_print_wm_changes(struct intel_atomic_state *state) if (skl_plane_wm_equals(dev_priv, old_wm, new_wm)) continue; - DRM_DEBUG_KMS("[PLANE:%d:%s] level %cwm0,%cwm1,%cwm2,%cwm3,%cwm4,%cwm5,%cwm6,%cwm7,%ctwm" - " -> %cwm0,%cwm1,%cwm2,%cwm3,%cwm4,%cwm5,%cwm6,%cwm7,%ctwm\n", - plane->base.base.id, plane->base.name, - enast(old_wm->wm[0].plane_en), enast(old_wm->wm[1].plane_en), - enast(old_wm->wm[2].plane_en), enast(old_wm->wm[3].plane_en), - enast(old_wm->wm[4].plane_en), enast(old_wm->wm[5].plane_en), - enast(old_wm->wm[6].plane_en), enast(old_wm->wm[7].plane_en), - enast(old_wm->trans_wm.plane_en), - enast(new_wm->wm[0].plane_en), enast(new_wm->wm[1].plane_en), - enast(new_wm->wm[2].plane_en), enast(new_wm->wm[3].plane_en), - enast(new_wm->wm[4].plane_en), enast(new_wm->wm[5].plane_en), - enast(new_wm->wm[6].plane_en), enast(new_wm->wm[7].plane_en), - enast(new_wm->trans_wm.plane_en)); - - DRM_DEBUG_KMS("[PLANE:%d:%s] lines %c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d" + drm_dbg_kms(&dev_priv->drm, + "[PLANE:%d:%s] level %cwm0,%cwm1,%cwm2,%cwm3,%cwm4,%cwm5,%cwm6,%cwm7,%ctwm" + " -> %cwm0,%cwm1,%cwm2,%cwm3,%cwm4,%cwm5,%cwm6,%cwm7,%ctwm\n", + plane->base.base.id, plane->base.name, + enast(old_wm->wm[0].plane_en), enast(old_wm->wm[1].plane_en), + enast(old_wm->wm[2].plane_en), enast(old_wm->wm[3].plane_en), + enast(old_wm->wm[4].plane_en), enast(old_wm->wm[5].plane_en), + enast(old_wm->wm[6].plane_en), enast(old_wm->wm[7].plane_en), + enast(old_wm->trans_wm.plane_en), + enast(new_wm->wm[0].plane_en), enast(new_wm->wm[1].plane_en), + enast(new_wm->wm[2].plane_en), enast(new_wm->wm[3].plane_en), + enast(new_wm->wm[4].plane_en), enast(new_wm->wm[5].plane_en), + enast(new_wm->wm[6].plane_en), enast(new_wm->wm[7].plane_en), + enast(new_wm->trans_wm.plane_en)); + + drm_dbg_kms(&dev_priv->drm, + "[PLANE:%d:%s] lines %c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d" " -> %c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d\n", - plane->base.base.id, plane->base.name, - enast(old_wm->wm[0].ignore_lines), old_wm->wm[0].plane_res_l, - enast(old_wm->wm[1].ignore_lines), old_wm->wm[1].plane_res_l, - enast(old_wm->wm[2].ignore_lines), old_wm->wm[2].plane_res_l, - enast(old_wm->wm[3].ignore_lines), old_wm->wm[3].plane_res_l, - enast(old_wm->wm[4].ignore_lines), old_wm->wm[4].plane_res_l, - enast(old_wm->wm[5].ignore_lines), old_wm->wm[5].plane_res_l, - enast(old_wm->wm[6].ignore_lines), old_wm->wm[6].plane_res_l, - enast(old_wm->wm[7].ignore_lines), old_wm->wm[7].plane_res_l, - enast(old_wm->trans_wm.ignore_lines), old_wm->trans_wm.plane_res_l, - - enast(new_wm->wm[0].ignore_lines), new_wm->wm[0].plane_res_l, - enast(new_wm->wm[1].ignore_lines), new_wm->wm[1].plane_res_l, - enast(new_wm->wm[2].ignore_lines), new_wm->wm[2].plane_res_l, - enast(new_wm->wm[3].ignore_lines), new_wm->wm[3].plane_res_l, - enast(new_wm->wm[4].ignore_lines), new_wm->wm[4].plane_res_l, - enast(new_wm->wm[5].ignore_lines), new_wm->wm[5].plane_res_l, - enast(new_wm->wm[6].ignore_lines), new_wm->wm[6].plane_res_l, - enast(new_wm->wm[7].ignore_lines), new_wm->wm[7].plane_res_l, - enast(new_wm->trans_wm.ignore_lines), new_wm->trans_wm.plane_res_l); - - DRM_DEBUG_KMS("[PLANE:%d:%s] blocks %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d" - " -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d\n", - plane->base.base.id, plane->base.name, - old_wm->wm[0].plane_res_b, old_wm->wm[1].plane_res_b, - old_wm->wm[2].plane_res_b, old_wm->wm[3].plane_res_b, - old_wm->wm[4].plane_res_b, old_wm->wm[5].plane_res_b, - old_wm->wm[6].plane_res_b, old_wm->wm[7].plane_res_b, - old_wm->trans_wm.plane_res_b, - new_wm->wm[0].plane_res_b, new_wm->wm[1].plane_res_b, - new_wm->wm[2].plane_res_b, new_wm->wm[3].plane_res_b, - new_wm->wm[4].plane_res_b, new_wm->wm[5].plane_res_b, - new_wm->wm[6].plane_res_b, new_wm->wm[7].plane_res_b, - new_wm->trans_wm.plane_res_b); - - DRM_DEBUG_KMS("[PLANE:%d:%s] min_ddb %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d" - " -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d\n", - plane->base.base.id, plane->base.name, - old_wm->wm[0].min_ddb_alloc, old_wm->wm[1].min_ddb_alloc, - old_wm->wm[2].min_ddb_alloc, old_wm->wm[3].min_ddb_alloc, - old_wm->wm[4].min_ddb_alloc, old_wm->wm[5].min_ddb_alloc, - old_wm->wm[6].min_ddb_alloc, old_wm->wm[7].min_ddb_alloc, - old_wm->trans_wm.min_ddb_alloc, - new_wm->wm[0].min_ddb_alloc, new_wm->wm[1].min_ddb_alloc, - new_wm->wm[2].min_ddb_alloc, new_wm->wm[3].min_ddb_alloc, - new_wm->wm[4].min_ddb_alloc, new_wm->wm[5].min_ddb_alloc, - new_wm->wm[6].min_ddb_alloc, new_wm->wm[7].min_ddb_alloc, - new_wm->trans_wm.min_ddb_alloc); + plane->base.base.id, plane->base.name, + enast(old_wm->wm[0].ignore_lines), old_wm->wm[0].plane_res_l, + enast(old_wm->wm[1].ignore_lines), old_wm->wm[1].plane_res_l, + enast(old_wm->wm[2].ignore_lines), old_wm->wm[2].plane_res_l, + enast(old_wm->wm[3].ignore_lines), old_wm->wm[3].plane_res_l, + enast(old_wm->wm[4].ignore_lines), old_wm->wm[4].plane_res_l, + enast(old_wm->wm[5].ignore_lines), old_wm->wm[5].plane_res_l, + enast(old_wm->wm[6].ignore_lines), old_wm->wm[6].plane_res_l, + enast(old_wm->wm[7].ignore_lines), old_wm->wm[7].plane_res_l, + enast(old_wm->trans_wm.ignore_lines), old_wm->trans_wm.plane_res_l, + + enast(new_wm->wm[0].ignore_lines), new_wm->wm[0].plane_res_l, + enast(new_wm->wm[1].ignore_lines), new_wm->wm[1].plane_res_l, + enast(new_wm->wm[2].ignore_lines), new_wm->wm[2].plane_res_l, + enast(new_wm->wm[3].ignore_lines), new_wm->wm[3].plane_res_l, + enast(new_wm->wm[4].ignore_lines), new_wm->wm[4].plane_res_l, + enast(new_wm->wm[5].ignore_lines), new_wm->wm[5].plane_res_l, + enast(new_wm->wm[6].ignore_lines), new_wm->wm[6].plane_res_l, + enast(new_wm->wm[7].ignore_lines), new_wm->wm[7].plane_res_l, + enast(new_wm->trans_wm.ignore_lines), new_wm->trans_wm.plane_res_l); + + drm_dbg_kms(&dev_priv->drm, + "[PLANE:%d:%s] blocks %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d" + " -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d\n", + plane->base.base.id, plane->base.name, + old_wm->wm[0].plane_res_b, old_wm->wm[1].plane_res_b, + old_wm->wm[2].plane_res_b, old_wm->wm[3].plane_res_b, + old_wm->wm[4].plane_res_b, old_wm->wm[5].plane_res_b, + old_wm->wm[6].plane_res_b, old_wm->wm[7].plane_res_b, + old_wm->trans_wm.plane_res_b, + new_wm->wm[0].plane_res_b, new_wm->wm[1].plane_res_b, + new_wm->wm[2].plane_res_b, new_wm->wm[3].plane_res_b, + new_wm->wm[4].plane_res_b, new_wm->wm[5].plane_res_b, + new_wm->wm[6].plane_res_b, new_wm->wm[7].plane_res_b, + new_wm->trans_wm.plane_res_b); + + drm_dbg_kms(&dev_priv->drm, + "[PLANE:%d:%s] min_ddb %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d" + " -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d\n", + plane->base.base.id, plane->base.name, + old_wm->wm[0].min_ddb_alloc, old_wm->wm[1].min_ddb_alloc, + old_wm->wm[2].min_ddb_alloc, old_wm->wm[3].min_ddb_alloc, + old_wm->wm[4].min_ddb_alloc, old_wm->wm[5].min_ddb_alloc, + old_wm->wm[6].min_ddb_alloc, old_wm->wm[7].min_ddb_alloc, + old_wm->trans_wm.min_ddb_alloc, + new_wm->wm[0].min_ddb_alloc, new_wm->wm[1].min_ddb_alloc, + new_wm->wm[2].min_ddb_alloc, new_wm->wm[3].min_ddb_alloc, + new_wm->wm[4].min_ddb_alloc, new_wm->wm[5].min_ddb_alloc, + new_wm->wm[6].min_ddb_alloc, new_wm->wm[7].min_ddb_alloc, + new_wm->trans_wm.min_ddb_alloc); } } } @@ -5940,19 +5966,22 @@ void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv) crtc_state->wm.g4x.optimal = *active; crtc_state->wm.g4x.intermediate = *active; - DRM_DEBUG_KMS("Initial watermarks: pipe %c, plane=%d, cursor=%d, sprite=%d\n", - pipe_name(pipe), - wm->pipe[pipe].plane[PLANE_PRIMARY], - wm->pipe[pipe].plane[PLANE_CURSOR], - wm->pipe[pipe].plane[PLANE_SPRITE0]); + drm_dbg_kms(&dev_priv->drm, + "Initial watermarks: pipe %c, plane=%d, cursor=%d, sprite=%d\n", + pipe_name(pipe), + wm->pipe[pipe].plane[PLANE_PRIMARY], + wm->pipe[pipe].plane[PLANE_CURSOR], + wm->pipe[pipe].plane[PLANE_SPRITE0]); } - DRM_DEBUG_KMS("Initial SR watermarks: plane=%d, cursor=%d fbc=%d\n", - wm->sr.plane, wm->sr.cursor, wm->sr.fbc); - DRM_DEBUG_KMS("Initial HPLL watermarks: plane=%d, SR cursor=%d fbc=%d\n", - wm->hpll.plane, wm->hpll.cursor, wm->hpll.fbc); - DRM_DEBUG_KMS("Initial SR=%s HPLL=%s FBC=%s\n", - yesno(wm->cxsr), yesno(wm->hpll_en), yesno(wm->fbc_en)); + drm_dbg_kms(&dev_priv->drm, + "Initial SR watermarks: plane=%d, cursor=%d fbc=%d\n", + wm->sr.plane, wm->sr.cursor, wm->sr.fbc); + drm_dbg_kms(&dev_priv->drm, + "Initial HPLL watermarks: plane=%d, SR cursor=%d fbc=%d\n", + wm->hpll.plane, wm->hpll.cursor, wm->hpll.fbc); + drm_dbg_kms(&dev_priv->drm, "Initial SR=%s HPLL=%s FBC=%s\n", + yesno(wm->cxsr), yesno(wm->hpll_en), yesno(wm->fbc_en)); } void g4x_wm_sanitize(struct drm_i915_private *dev_priv) @@ -6044,8 +6073,9 @@ void vlv_wm_get_hw_state(struct drm_i915_private *dev_priv) if (wait_for((vlv_punit_read(dev_priv, PUNIT_REG_DDR_SETUP2) & FORCE_DDR_FREQ_REQ_ACK) == 0, 3)) { - DRM_DEBUG_KMS("Punit not acking DDR DVFS request, " - "assuming DDR DVFS is disabled\n"); + drm_dbg_kms(&dev_priv->drm, + "Punit not acking DDR DVFS request, " + "assuming DDR DVFS is disabled\n"); dev_priv->wm.max_level = VLV_WM_LEVEL_PM5; } else { val = vlv_punit_read(dev_priv, PUNIT_REG_DDR_SETUP2); @@ -6096,16 +6126,18 @@ void vlv_wm_get_hw_state(struct drm_i915_private *dev_priv) crtc_state->wm.vlv.optimal = *active; crtc_state->wm.vlv.intermediate = *active; - DRM_DEBUG_KMS("Initial watermarks: pipe %c, plane=%d, cursor=%d, sprite0=%d, sprite1=%d\n", - pipe_name(pipe), - wm->pipe[pipe].plane[PLANE_PRIMARY], - wm->pipe[pipe].plane[PLANE_CURSOR], - wm->pipe[pipe].plane[PLANE_SPRITE0], - wm->pipe[pipe].plane[PLANE_SPRITE1]); + drm_dbg_kms(&dev_priv->drm, + "Initial watermarks: pipe %c, plane=%d, cursor=%d, sprite0=%d, sprite1=%d\n", + pipe_name(pipe), + wm->pipe[pipe].plane[PLANE_PRIMARY], + wm->pipe[pipe].plane[PLANE_CURSOR], + wm->pipe[pipe].plane[PLANE_SPRITE0], + wm->pipe[pipe].plane[PLANE_SPRITE1]); } - DRM_DEBUG_KMS("Initial watermarks: SR plane=%d, SR cursor=%d level=%d cxsr=%d\n", - wm->sr.plane, wm->sr.cursor, wm->level, wm->cxsr); + drm_dbg_kms(&dev_priv->drm, + "Initial watermarks: SR plane=%d, SR cursor=%d level=%d cxsr=%d\n", + wm->sr.plane, wm->sr.cursor, wm->level, wm->cxsr); } void vlv_wm_sanitize(struct drm_i915_private *dev_priv) @@ -6421,8 +6453,9 @@ static void gen6_check_mch_setup(struct drm_i915_private *dev_priv) tmp = I915_READ(MCH_SSKPD); if ((tmp & MCH_SSKPD_WM0_MASK) != MCH_SSKPD_WM0_VAL) - DRM_DEBUG_KMS("Wrong MCH_SSKPD value: 0x%08x This can cause underruns.\n", - tmp); + drm_dbg_kms(&dev_priv->drm, + "Wrong MCH_SSKPD value: 0x%08x This can cause underruns.\n", + tmp); } static void gen6_init_clock_gating(struct drm_i915_private *dev_priv) @@ -7137,7 +7170,8 @@ void intel_suspend_hw(struct drm_i915_private *dev_priv) static void nop_init_clock_gating(struct drm_i915_private *dev_priv) { - DRM_DEBUG_KMS("No clock gating settings or workarounds applied.\n"); + drm_dbg_kms(&dev_priv->drm, + "No clock gating settings or workarounds applied.\n"); } /** @@ -7232,8 +7266,9 @@ void intel_init_pm(struct drm_i915_private *dev_priv) dev_priv->display.optimize_watermarks = ilk_optimize_watermarks; } else { - DRM_DEBUG_KMS("Failed to read display plane latency. " - "Disable CxSR\n"); + drm_dbg_kms(&dev_priv->drm, + "Failed to read display plane latency. " + "Disable CxSR\n"); } } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { vlv_setup_wm_latency(dev_priv); @@ -7253,7 +7288,8 @@ void intel_init_pm(struct drm_i915_private *dev_priv) dev_priv->is_ddr3, dev_priv->fsb_freq, dev_priv->mem_freq)) { - DRM_INFO("failed to find known CxSR latency " + drm_info(&dev_priv->drm, + "failed to find known CxSR latency " "(found ddr%s fsb freq %d, mem freq %d), " "disabling CxSR\n", (dev_priv->is_ddr3 == 1) ? "3" : "2", @@ -7277,7 +7313,8 @@ void intel_init_pm(struct drm_i915_private *dev_priv) dev_priv->display.get_fifo_size = i830_get_fifo_size; } } else { - DRM_ERROR("unexpected fall-through in intel_init_pm\n"); + drm_err(&dev_priv->drm, + "unexpected fall-through in %s\n", __func__); } } -- 2.24.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH 2/5] drm/i915: use new struct drm_device logging macros. @ 2020-01-07 15:13 ` Wambui Karuga 0 siblings, 0 replies; 42+ messages in thread From: Wambui Karuga @ 2020-01-07 15:13 UTC (permalink / raw) To: jani.nikula, joonas.lahtinen, rodrigo.vivi, airlied, daniel Cc: intel-gfx, seanpaul, linux-kernel, dri-devel This converts various instances of the struct device and printk based logging macros with the new struct drm_device based logging macros in i915/intel_pm.c Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> --- drivers/gpu/drm/i915/intel_pm.c | 351 ++++++++++++++++++-------------- 1 file changed, 194 insertions(+), 157 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 148ac455dfa7..bd2d30ecc030 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -199,8 +199,8 @@ static void ilk_get_mem_freq(struct drm_i915_private *dev_priv) dev_priv->mem_freq = 1600; break; default: - DRM_DEBUG_DRIVER("unknown memory frequency 0x%02x\n", - ddrpll & 0xff); + drm_dbg(&dev_priv->drm, "unknown memory frequency 0x%02x\n", + ddrpll & 0xff); dev_priv->mem_freq = 0; break; } @@ -228,8 +228,8 @@ static void ilk_get_mem_freq(struct drm_i915_private *dev_priv) dev_priv->fsb_freq = 6400; break; default: - DRM_DEBUG_DRIVER("unknown fsb frequency 0x%04x\n", - csipll & 0x3ff); + drm_dbg(&dev_priv->drm, "unknown fsb frequency 0x%04x\n", + csipll & 0x3ff); dev_priv->fsb_freq = 0; break; } @@ -314,7 +314,8 @@ static void chv_set_memory_dvfs(struct drm_i915_private *dev_priv, bool enable) if (wait_for((vlv_punit_read(dev_priv, PUNIT_REG_DDR_SETUP2) & FORCE_DDR_FREQ_REQ_ACK) == 0, 3)) - DRM_ERROR("timed out waiting for Punit DDR DVFS request\n"); + drm_err(&dev_priv->drm, + "timed out waiting for Punit DDR DVFS request\n"); vlv_punit_put(dev_priv); } @@ -383,9 +384,9 @@ static bool _intel_set_memory_cxsr(struct drm_i915_private *dev_priv, bool enabl trace_intel_memory_cxsr(dev_priv, was_enabled, enable); - DRM_DEBUG_KMS("memory self-refresh is %s (was %s)\n", - enableddisabled(enable), - enableddisabled(was_enabled)); + drm_dbg_kms(&dev_priv->drm, "memory self-refresh is %s (was %s)\n", + enableddisabled(enable), + enableddisabled(was_enabled)); return was_enabled; } @@ -510,8 +511,8 @@ static int i9xx_get_fifo_size(struct drm_i915_private *dev_priv, if (i9xx_plane == PLANE_B) size = ((dsparb >> DSPARB_CSTART_SHIFT) & 0x7f) - size; - DRM_DEBUG_KMS("FIFO size - (0x%08x) %c: %d\n", - dsparb, plane_name(i9xx_plane), size); + drm_dbg_kms(&dev_priv->drm, "FIFO size - (0x%08x) %c: %d\n", + dsparb, plane_name(i9xx_plane), size); return size; } @@ -527,8 +528,8 @@ static int i830_get_fifo_size(struct drm_i915_private *dev_priv, size = ((dsparb >> DSPARB_BEND_SHIFT) & 0x1ff) - size; size >>= 1; /* Convert to cachelines */ - DRM_DEBUG_KMS("FIFO size - (0x%08x) %c: %d\n", - dsparb, plane_name(i9xx_plane), size); + drm_dbg_kms(&dev_priv->drm, "FIFO size - (0x%08x) %c: %d\n", + dsparb, plane_name(i9xx_plane), size); return size; } @@ -542,8 +543,8 @@ static int i845_get_fifo_size(struct drm_i915_private *dev_priv, size = dsparb & 0x7f; size >>= 2; /* Convert to cachelines */ - DRM_DEBUG_KMS("FIFO size - (0x%08x) %c: %d\n", - dsparb, plane_name(i9xx_plane), size); + drm_dbg_kms(&dev_priv->drm, "FIFO size - (0x%08x) %c: %d\n", + dsparb, plane_name(i9xx_plane), size); return size; } @@ -870,7 +871,8 @@ static void pnv_update_wm(struct intel_crtc *unused_crtc) dev_priv->fsb_freq, dev_priv->mem_freq); if (!latency) { - DRM_DEBUG_KMS("Unknown FSB/MEM found, disable CxSR\n"); + drm_dbg_kms(&dev_priv->drm, + "Unknown FSB/MEM found, disable CxSR\n"); intel_set_memory_cxsr(dev_priv, false); return; } @@ -892,7 +894,7 @@ static void pnv_update_wm(struct intel_crtc *unused_crtc) reg &= ~DSPFW_SR_MASK; reg |= FW_WM(wm, SR); I915_WRITE(DSPFW1, reg); - DRM_DEBUG_KMS("DSPFW1 register is %x\n", reg); + drm_dbg_kms(&dev_priv->drm, "DSPFW1 register is %x\n", reg); /* cursor SR */ wm = intel_calculate_wm(clock, &pnv_cursor_wm, @@ -920,7 +922,7 @@ static void pnv_update_wm(struct intel_crtc *unused_crtc) reg &= ~DSPFW_HPLL_CURSOR_MASK; reg |= FW_WM(wm, HPLL_CURSOR); I915_WRITE(DSPFW3, reg); - DRM_DEBUG_KMS("DSPFW3 register is %x\n", reg); + drm_dbg_kms(&dev_priv->drm, "DSPFW3 register is %x\n", reg); intel_set_memory_cxsr(dev_priv, true); } else { @@ -1211,6 +1213,7 @@ static bool g4x_raw_plane_wm_compute(struct intel_crtc_state *crtc_state, const struct intel_plane_state *plane_state) { struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); int num_levels = intel_wm_num_levels(to_i915(plane->base.dev)); enum plane_id plane_id = plane->id; bool dirty = false; @@ -1263,16 +1266,18 @@ static bool g4x_raw_plane_wm_compute(struct intel_crtc_state *crtc_state, out: if (dirty) { - DRM_DEBUG_KMS("%s watermarks: normal=%d, SR=%d, HPLL=%d\n", - plane->base.name, - crtc_state->wm.g4x.raw[G4X_WM_LEVEL_NORMAL].plane[plane_id], - crtc_state->wm.g4x.raw[G4X_WM_LEVEL_SR].plane[plane_id], - crtc_state->wm.g4x.raw[G4X_WM_LEVEL_HPLL].plane[plane_id]); + drm_dbg_kms(&dev_priv->drm, + "%s watermarks: normal=%d, SR=%d, HPLL=%d\n", + plane->base.name, + crtc_state->wm.g4x.raw[G4X_WM_LEVEL_NORMAL].plane[plane_id], + crtc_state->wm.g4x.raw[G4X_WM_LEVEL_SR].plane[plane_id], + crtc_state->wm.g4x.raw[G4X_WM_LEVEL_HPLL].plane[plane_id]); if (plane_id == PLANE_PRIMARY) - DRM_DEBUG_KMS("FBC watermarks: SR=%d, HPLL=%d\n", - crtc_state->wm.g4x.raw[G4X_WM_LEVEL_SR].fbc, - crtc_state->wm.g4x.raw[G4X_WM_LEVEL_HPLL].fbc); + drm_dbg_kms(&dev_priv->drm, + "FBC watermarks: SR=%d, HPLL=%d\n", + crtc_state->wm.g4x.raw[G4X_WM_LEVEL_SR].fbc, + crtc_state->wm.g4x.raw[G4X_WM_LEVEL_HPLL].fbc); } return dirty; @@ -1790,6 +1795,7 @@ static bool vlv_raw_plane_wm_compute(struct intel_crtc_state *crtc_state, const struct intel_plane_state *plane_state) { struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); enum plane_id plane_id = plane->id; int num_levels = intel_wm_num_levels(to_i915(plane->base.dev)); int level; @@ -1817,11 +1823,12 @@ static bool vlv_raw_plane_wm_compute(struct intel_crtc_state *crtc_state, out: if (dirty) - DRM_DEBUG_KMS("%s watermarks: PM2=%d, PM5=%d, DDR DVFS=%d\n", - plane->base.name, - crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM2].plane[plane_id], - crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM5].plane[plane_id], - crtc_state->wm.vlv.raw[VLV_WM_LEVEL_DDR_DVFS].plane[plane_id]); + drm_dbg_kms(&dev_priv->drm, + "%s watermarks: PM2=%d, PM5=%d, DDR DVFS=%d\n", + plane->base.name, + crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM2].plane[plane_id], + crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM5].plane[plane_id], + crtc_state->wm.vlv.raw[VLV_WM_LEVEL_DDR_DVFS].plane[plane_id]); return dirty; } @@ -2236,8 +2243,9 @@ static void i965_update_wm(struct intel_crtc *unused_crtc) if (srwm < 0) srwm = 1; srwm &= 0x1ff; - DRM_DEBUG_KMS("self-refresh entries: %d, wm: %d\n", - entries, srwm); + drm_dbg_kms(&dev_priv->drm, + "self-refresh entries: %d, wm: %d\n", + entries, srwm); entries = intel_wm_method2(clock, htotal, crtc->base.cursor->state->crtc_w, 4, @@ -2250,8 +2258,9 @@ static void i965_update_wm(struct intel_crtc *unused_crtc) if (cursor_sr > i965_cursor_wm_info.max_wm) cursor_sr = i965_cursor_wm_info.max_wm; - DRM_DEBUG_KMS("self-refresh watermark: display plane %d " - "cursor %d\n", srwm, cursor_sr); + drm_dbg_kms(&dev_priv->drm, + "self-refresh watermark: display plane %d " + "cursor %d\n", srwm, cursor_sr); cxsr_enabled = true; } else { @@ -2260,8 +2269,9 @@ static void i965_update_wm(struct intel_crtc *unused_crtc) intel_set_memory_cxsr(dev_priv, false); } - DRM_DEBUG_KMS("Setting FIFO watermarks - A: 8, B: 8, C: 8, SR %d\n", - srwm); + drm_dbg_kms(&dev_priv->drm, + "Setting FIFO watermarks - A: 8, B: 8, C: 8, SR %d\n", + srwm); /* 965 has limitations... */ I915_WRITE(DSPFW1, FW_WM(srwm, SR) | @@ -2351,7 +2361,8 @@ static void i9xx_update_wm(struct intel_crtc *unused_crtc) planeb_wm = wm_info->max_wm; } - DRM_DEBUG_KMS("FIFO watermarks - A: %d, B: %d\n", planea_wm, planeb_wm); + drm_dbg_kms(&dev_priv->drm, + "FIFO watermarks - A: %d, B: %d\n", planea_wm, planeb_wm); if (IS_I915GM(dev_priv) && enabled) { struct drm_i915_gem_object *obj; @@ -2393,7 +2404,8 @@ static void i9xx_update_wm(struct intel_crtc *unused_crtc) entries = intel_wm_method2(clock, htotal, hdisplay, cpp, sr_latency_ns / 100); entries = DIV_ROUND_UP(entries, wm_info->cacheline_size); - DRM_DEBUG_KMS("self-refresh entries: %d\n", entries); + drm_dbg_kms(&dev_priv->drm, + "self-refresh entries: %d\n", entries); srwm = wm_info->fifo_size - entries; if (srwm < 0) srwm = 1; @@ -2405,8 +2417,9 @@ static void i9xx_update_wm(struct intel_crtc *unused_crtc) I915_WRITE(FW_BLC_SELF, srwm & 0x3f); } - DRM_DEBUG_KMS("Setting FIFO watermarks - A: %d, B: %d, C: %d, SR %d\n", - planea_wm, planeb_wm, cwm, srwm); + drm_dbg_kms(&dev_priv->drm, + "Setting FIFO watermarks - A: %d, B: %d, C: %d, SR %d\n", + planea_wm, planeb_wm, cwm, srwm); fwater_lo = ((planeb_wm & 0x3f) << 16) | (planea_wm & 0x3f); fwater_hi = (cwm & 0x1f); @@ -2442,7 +2455,8 @@ static void i845_update_wm(struct intel_crtc *unused_crtc) fwater_lo = I915_READ(FW_BLC) & ~0xfff; fwater_lo |= (3<<8) | planea_wm; - DRM_DEBUG_KMS("Setting FIFO watermarks - A: %d\n", planea_wm); + drm_dbg_kms(&dev_priv->drm, + "Setting FIFO watermarks - A: %d\n", planea_wm); I915_WRITE(FW_BLC, fwater_lo); } @@ -2841,7 +2855,8 @@ static void intel_read_wm_latency(struct drm_i915_private *dev_priv, &val, NULL); if (ret) { - DRM_ERROR("SKL Mailbox read error = %d\n", ret); + drm_err(&dev_priv->drm, + "SKL Mailbox read error = %d\n", ret); return; } @@ -2859,7 +2874,8 @@ static void intel_read_wm_latency(struct drm_i915_private *dev_priv, GEN9_PCODE_READ_MEM_LATENCY, &val, NULL); if (ret) { - DRM_ERROR("SKL Mailbox read error = %d\n", ret); + drm_err(&dev_priv->drm, + "SKL Mailbox read error = %d\n", ret); return; } @@ -2977,8 +2993,9 @@ static void intel_print_wm_latency(struct drm_i915_private *dev_priv, unsigned int latency = wm[level]; if (latency == 0) { - DRM_DEBUG_KMS("%s WM%d latency not provided\n", - name, level); + drm_dbg_kms(&dev_priv->drm, + "%s WM%d latency not provided\n", + name, level); continue; } @@ -2991,9 +3008,9 @@ static void intel_print_wm_latency(struct drm_i915_private *dev_priv, else if (level > 0) latency *= 5; - DRM_DEBUG_KMS("%s WM%d latency %u (%u.%u usec)\n", - name, level, wm[level], - latency / 10, latency % 10); + drm_dbg_kms(&dev_priv->drm, + "%s WM%d latency %u (%u.%u usec)\n", name, level, + wm[level], latency / 10, latency % 10); } } @@ -3027,7 +3044,8 @@ static void snb_wm_latency_quirk(struct drm_i915_private *dev_priv) if (!changed) return; - DRM_DEBUG_KMS("WM latency values increased to avoid potential underruns\n"); + drm_dbg_kms(&dev_priv->drm, + "WM latency values increased to avoid potential underruns\n"); intel_print_wm_latency(dev_priv, "Primary", dev_priv->wm.pri_latency); intel_print_wm_latency(dev_priv, "Sprite", dev_priv->wm.spr_latency); intel_print_wm_latency(dev_priv, "Cursor", dev_priv->wm.cur_latency); @@ -3055,7 +3073,8 @@ static void snb_wm_lp3_irq_quirk(struct drm_i915_private *dev_priv) dev_priv->wm.spr_latency[3] = 0; dev_priv->wm.cur_latency[3] = 0; - DRM_DEBUG_KMS("LP3 watermarks disabled due to potential for lost interrupts\n"); + drm_dbg_kms(&dev_priv->drm, + "LP3 watermarks disabled due to potential for lost interrupts\n"); intel_print_wm_latency(dev_priv, "Primary", dev_priv->wm.pri_latency); intel_print_wm_latency(dev_priv, "Sprite", dev_priv->wm.spr_latency); intel_print_wm_latency(dev_priv, "Cursor", dev_priv->wm.cur_latency); @@ -3105,7 +3124,7 @@ static bool ilk_validate_pipe_wm(const struct drm_i915_private *dev_priv, /* At least LP0 must be valid */ if (!ilk_validate_wm_level(0, &max, &pipe_wm->wm[0])) { - DRM_DEBUG_KMS("LP0 watermark invalid\n"); + drm_dbg_kms(&dev_priv->drm, "LP0 watermark invalid\n"); return false; } @@ -3682,7 +3701,7 @@ skl_setup_sagv_block_time(struct drm_i915_private *dev_priv) return; } - DRM_DEBUG_DRIVER("Couldn't read SAGV block time!\n"); + drm_dbg(&dev_priv->drm, "Couldn't read SAGV block time!\n"); } else if (IS_GEN(dev_priv, 11)) { dev_priv->sagv_block_time_us = 10; return; @@ -3722,7 +3741,7 @@ intel_enable_sagv(struct drm_i915_private *dev_priv) if (dev_priv->sagv_status == I915_SAGV_ENABLED) return 0; - DRM_DEBUG_KMS("Enabling SAGV\n"); + drm_dbg_kms(&dev_priv->drm, "Enabling SAGV\n"); ret = sandybridge_pcode_write(dev_priv, GEN9_PCODE_SAGV_CONTROL, GEN9_SAGV_ENABLE); @@ -3733,11 +3752,11 @@ intel_enable_sagv(struct drm_i915_private *dev_priv) * don't actually have SAGV. */ if (IS_SKYLAKE(dev_priv) && ret == -ENXIO) { - DRM_DEBUG_DRIVER("No SAGV found on system, ignoring\n"); + drm_dbg(&dev_priv->drm, "No SAGV found on system, ignoring\n"); dev_priv->sagv_status = I915_SAGV_NOT_CONTROLLED; return 0; } else if (ret < 0) { - DRM_ERROR("Failed to enable SAGV\n"); + drm_err(&dev_priv->drm, "Failed to enable SAGV\n"); return ret; } @@ -3756,7 +3775,7 @@ intel_disable_sagv(struct drm_i915_private *dev_priv) if (dev_priv->sagv_status == I915_SAGV_DISABLED) return 0; - DRM_DEBUG_KMS("Disabling SAGV\n"); + drm_dbg_kms(&dev_priv->drm, "Disabling SAGV\n"); /* bspec says to keep retrying for at least 1 ms */ ret = skl_pcode_request(dev_priv, GEN9_PCODE_SAGV_CONTROL, GEN9_SAGV_DISABLE, @@ -3767,11 +3786,11 @@ intel_disable_sagv(struct drm_i915_private *dev_priv) * don't actually have SAGV. */ if (IS_SKYLAKE(dev_priv) && ret == -ENXIO) { - DRM_DEBUG_DRIVER("No SAGV found on system, ignoring\n"); + drm_dbg(&dev_priv->drm, "No SAGV found on system, ignoring\n"); dev_priv->sagv_status = I915_SAGV_NOT_CONTROLLED; return 0; } else if (ret < 0) { - DRM_ERROR("Failed to disable SAGV (%d)\n", ret); + drm_err(&dev_priv->drm, "Failed to disable SAGV (%d)\n", ret); return ret; } @@ -4340,9 +4359,10 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *crtc_state, } if (level < 0) { - DRM_DEBUG_KMS("Requested display configuration exceeds system DDB limitations"); - DRM_DEBUG_KMS("minimum required %d/%d\n", blocks, - alloc_size); + drm_dbg_kms(&dev_priv->drm, + "Requested display configuration exceeds system DDB limitations"); + drm_dbg_kms(&dev_priv->drm, "minimum required %d/%d\n", + blocks, alloc_size); return -EINVAL; } @@ -4570,7 +4590,8 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state, /* only planar format has two planes */ if (color_plane == 1 && !intel_format_info_is_yuv_semiplanar(format, modifier)) { - DRM_DEBUG_KMS("Non planar format have single plane\n"); + drm_dbg_kms(&dev_priv->drm, + "Non planar format have single plane\n"); return -EINVAL; } @@ -5269,10 +5290,11 @@ skl_print_wm_changes(struct intel_atomic_state *state) if (skl_ddb_entry_equal(old, new)) continue; - DRM_DEBUG_KMS("[PLANE:%d:%s] ddb (%4d - %4d) -> (%4d - %4d), size %4d -> %4d\n", - plane->base.base.id, plane->base.name, - old->start, old->end, new->start, new->end, - skl_ddb_entry_size(old), skl_ddb_entry_size(new)); + drm_dbg_kms(&dev_priv->drm, + "[PLANE:%d:%s] ddb (%4d - %4d) -> (%4d - %4d), size %4d -> %4d\n", + plane->base.base.id, plane->base.name, + old->start, old->end, new->start, new->end, + skl_ddb_entry_size(old), skl_ddb_entry_size(new)); } for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { @@ -5285,70 +5307,74 @@ skl_print_wm_changes(struct intel_atomic_state *state) if (skl_plane_wm_equals(dev_priv, old_wm, new_wm)) continue; - DRM_DEBUG_KMS("[PLANE:%d:%s] level %cwm0,%cwm1,%cwm2,%cwm3,%cwm4,%cwm5,%cwm6,%cwm7,%ctwm" - " -> %cwm0,%cwm1,%cwm2,%cwm3,%cwm4,%cwm5,%cwm6,%cwm7,%ctwm\n", - plane->base.base.id, plane->base.name, - enast(old_wm->wm[0].plane_en), enast(old_wm->wm[1].plane_en), - enast(old_wm->wm[2].plane_en), enast(old_wm->wm[3].plane_en), - enast(old_wm->wm[4].plane_en), enast(old_wm->wm[5].plane_en), - enast(old_wm->wm[6].plane_en), enast(old_wm->wm[7].plane_en), - enast(old_wm->trans_wm.plane_en), - enast(new_wm->wm[0].plane_en), enast(new_wm->wm[1].plane_en), - enast(new_wm->wm[2].plane_en), enast(new_wm->wm[3].plane_en), - enast(new_wm->wm[4].plane_en), enast(new_wm->wm[5].plane_en), - enast(new_wm->wm[6].plane_en), enast(new_wm->wm[7].plane_en), - enast(new_wm->trans_wm.plane_en)); - - DRM_DEBUG_KMS("[PLANE:%d:%s] lines %c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d" + drm_dbg_kms(&dev_priv->drm, + "[PLANE:%d:%s] level %cwm0,%cwm1,%cwm2,%cwm3,%cwm4,%cwm5,%cwm6,%cwm7,%ctwm" + " -> %cwm0,%cwm1,%cwm2,%cwm3,%cwm4,%cwm5,%cwm6,%cwm7,%ctwm\n", + plane->base.base.id, plane->base.name, + enast(old_wm->wm[0].plane_en), enast(old_wm->wm[1].plane_en), + enast(old_wm->wm[2].plane_en), enast(old_wm->wm[3].plane_en), + enast(old_wm->wm[4].plane_en), enast(old_wm->wm[5].plane_en), + enast(old_wm->wm[6].plane_en), enast(old_wm->wm[7].plane_en), + enast(old_wm->trans_wm.plane_en), + enast(new_wm->wm[0].plane_en), enast(new_wm->wm[1].plane_en), + enast(new_wm->wm[2].plane_en), enast(new_wm->wm[3].plane_en), + enast(new_wm->wm[4].plane_en), enast(new_wm->wm[5].plane_en), + enast(new_wm->wm[6].plane_en), enast(new_wm->wm[7].plane_en), + enast(new_wm->trans_wm.plane_en)); + + drm_dbg_kms(&dev_priv->drm, + "[PLANE:%d:%s] lines %c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d" " -> %c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d\n", - plane->base.base.id, plane->base.name, - enast(old_wm->wm[0].ignore_lines), old_wm->wm[0].plane_res_l, - enast(old_wm->wm[1].ignore_lines), old_wm->wm[1].plane_res_l, - enast(old_wm->wm[2].ignore_lines), old_wm->wm[2].plane_res_l, - enast(old_wm->wm[3].ignore_lines), old_wm->wm[3].plane_res_l, - enast(old_wm->wm[4].ignore_lines), old_wm->wm[4].plane_res_l, - enast(old_wm->wm[5].ignore_lines), old_wm->wm[5].plane_res_l, - enast(old_wm->wm[6].ignore_lines), old_wm->wm[6].plane_res_l, - enast(old_wm->wm[7].ignore_lines), old_wm->wm[7].plane_res_l, - enast(old_wm->trans_wm.ignore_lines), old_wm->trans_wm.plane_res_l, - - enast(new_wm->wm[0].ignore_lines), new_wm->wm[0].plane_res_l, - enast(new_wm->wm[1].ignore_lines), new_wm->wm[1].plane_res_l, - enast(new_wm->wm[2].ignore_lines), new_wm->wm[2].plane_res_l, - enast(new_wm->wm[3].ignore_lines), new_wm->wm[3].plane_res_l, - enast(new_wm->wm[4].ignore_lines), new_wm->wm[4].plane_res_l, - enast(new_wm->wm[5].ignore_lines), new_wm->wm[5].plane_res_l, - enast(new_wm->wm[6].ignore_lines), new_wm->wm[6].plane_res_l, - enast(new_wm->wm[7].ignore_lines), new_wm->wm[7].plane_res_l, - enast(new_wm->trans_wm.ignore_lines), new_wm->trans_wm.plane_res_l); - - DRM_DEBUG_KMS("[PLANE:%d:%s] blocks %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d" - " -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d\n", - plane->base.base.id, plane->base.name, - old_wm->wm[0].plane_res_b, old_wm->wm[1].plane_res_b, - old_wm->wm[2].plane_res_b, old_wm->wm[3].plane_res_b, - old_wm->wm[4].plane_res_b, old_wm->wm[5].plane_res_b, - old_wm->wm[6].plane_res_b, old_wm->wm[7].plane_res_b, - old_wm->trans_wm.plane_res_b, - new_wm->wm[0].plane_res_b, new_wm->wm[1].plane_res_b, - new_wm->wm[2].plane_res_b, new_wm->wm[3].plane_res_b, - new_wm->wm[4].plane_res_b, new_wm->wm[5].plane_res_b, - new_wm->wm[6].plane_res_b, new_wm->wm[7].plane_res_b, - new_wm->trans_wm.plane_res_b); - - DRM_DEBUG_KMS("[PLANE:%d:%s] min_ddb %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d" - " -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d\n", - plane->base.base.id, plane->base.name, - old_wm->wm[0].min_ddb_alloc, old_wm->wm[1].min_ddb_alloc, - old_wm->wm[2].min_ddb_alloc, old_wm->wm[3].min_ddb_alloc, - old_wm->wm[4].min_ddb_alloc, old_wm->wm[5].min_ddb_alloc, - old_wm->wm[6].min_ddb_alloc, old_wm->wm[7].min_ddb_alloc, - old_wm->trans_wm.min_ddb_alloc, - new_wm->wm[0].min_ddb_alloc, new_wm->wm[1].min_ddb_alloc, - new_wm->wm[2].min_ddb_alloc, new_wm->wm[3].min_ddb_alloc, - new_wm->wm[4].min_ddb_alloc, new_wm->wm[5].min_ddb_alloc, - new_wm->wm[6].min_ddb_alloc, new_wm->wm[7].min_ddb_alloc, - new_wm->trans_wm.min_ddb_alloc); + plane->base.base.id, plane->base.name, + enast(old_wm->wm[0].ignore_lines), old_wm->wm[0].plane_res_l, + enast(old_wm->wm[1].ignore_lines), old_wm->wm[1].plane_res_l, + enast(old_wm->wm[2].ignore_lines), old_wm->wm[2].plane_res_l, + enast(old_wm->wm[3].ignore_lines), old_wm->wm[3].plane_res_l, + enast(old_wm->wm[4].ignore_lines), old_wm->wm[4].plane_res_l, + enast(old_wm->wm[5].ignore_lines), old_wm->wm[5].plane_res_l, + enast(old_wm->wm[6].ignore_lines), old_wm->wm[6].plane_res_l, + enast(old_wm->wm[7].ignore_lines), old_wm->wm[7].plane_res_l, + enast(old_wm->trans_wm.ignore_lines), old_wm->trans_wm.plane_res_l, + + enast(new_wm->wm[0].ignore_lines), new_wm->wm[0].plane_res_l, + enast(new_wm->wm[1].ignore_lines), new_wm->wm[1].plane_res_l, + enast(new_wm->wm[2].ignore_lines), new_wm->wm[2].plane_res_l, + enast(new_wm->wm[3].ignore_lines), new_wm->wm[3].plane_res_l, + enast(new_wm->wm[4].ignore_lines), new_wm->wm[4].plane_res_l, + enast(new_wm->wm[5].ignore_lines), new_wm->wm[5].plane_res_l, + enast(new_wm->wm[6].ignore_lines), new_wm->wm[6].plane_res_l, + enast(new_wm->wm[7].ignore_lines), new_wm->wm[7].plane_res_l, + enast(new_wm->trans_wm.ignore_lines), new_wm->trans_wm.plane_res_l); + + drm_dbg_kms(&dev_priv->drm, + "[PLANE:%d:%s] blocks %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d" + " -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d\n", + plane->base.base.id, plane->base.name, + old_wm->wm[0].plane_res_b, old_wm->wm[1].plane_res_b, + old_wm->wm[2].plane_res_b, old_wm->wm[3].plane_res_b, + old_wm->wm[4].plane_res_b, old_wm->wm[5].plane_res_b, + old_wm->wm[6].plane_res_b, old_wm->wm[7].plane_res_b, + old_wm->trans_wm.plane_res_b, + new_wm->wm[0].plane_res_b, new_wm->wm[1].plane_res_b, + new_wm->wm[2].plane_res_b, new_wm->wm[3].plane_res_b, + new_wm->wm[4].plane_res_b, new_wm->wm[5].plane_res_b, + new_wm->wm[6].plane_res_b, new_wm->wm[7].plane_res_b, + new_wm->trans_wm.plane_res_b); + + drm_dbg_kms(&dev_priv->drm, + "[PLANE:%d:%s] min_ddb %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d" + " -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d\n", + plane->base.base.id, plane->base.name, + old_wm->wm[0].min_ddb_alloc, old_wm->wm[1].min_ddb_alloc, + old_wm->wm[2].min_ddb_alloc, old_wm->wm[3].min_ddb_alloc, + old_wm->wm[4].min_ddb_alloc, old_wm->wm[5].min_ddb_alloc, + old_wm->wm[6].min_ddb_alloc, old_wm->wm[7].min_ddb_alloc, + old_wm->trans_wm.min_ddb_alloc, + new_wm->wm[0].min_ddb_alloc, new_wm->wm[1].min_ddb_alloc, + new_wm->wm[2].min_ddb_alloc, new_wm->wm[3].min_ddb_alloc, + new_wm->wm[4].min_ddb_alloc, new_wm->wm[5].min_ddb_alloc, + new_wm->wm[6].min_ddb_alloc, new_wm->wm[7].min_ddb_alloc, + new_wm->trans_wm.min_ddb_alloc); } } } @@ -5940,19 +5966,22 @@ void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv) crtc_state->wm.g4x.optimal = *active; crtc_state->wm.g4x.intermediate = *active; - DRM_DEBUG_KMS("Initial watermarks: pipe %c, plane=%d, cursor=%d, sprite=%d\n", - pipe_name(pipe), - wm->pipe[pipe].plane[PLANE_PRIMARY], - wm->pipe[pipe].plane[PLANE_CURSOR], - wm->pipe[pipe].plane[PLANE_SPRITE0]); + drm_dbg_kms(&dev_priv->drm, + "Initial watermarks: pipe %c, plane=%d, cursor=%d, sprite=%d\n", + pipe_name(pipe), + wm->pipe[pipe].plane[PLANE_PRIMARY], + wm->pipe[pipe].plane[PLANE_CURSOR], + wm->pipe[pipe].plane[PLANE_SPRITE0]); } - DRM_DEBUG_KMS("Initial SR watermarks: plane=%d, cursor=%d fbc=%d\n", - wm->sr.plane, wm->sr.cursor, wm->sr.fbc); - DRM_DEBUG_KMS("Initial HPLL watermarks: plane=%d, SR cursor=%d fbc=%d\n", - wm->hpll.plane, wm->hpll.cursor, wm->hpll.fbc); - DRM_DEBUG_KMS("Initial SR=%s HPLL=%s FBC=%s\n", - yesno(wm->cxsr), yesno(wm->hpll_en), yesno(wm->fbc_en)); + drm_dbg_kms(&dev_priv->drm, + "Initial SR watermarks: plane=%d, cursor=%d fbc=%d\n", + wm->sr.plane, wm->sr.cursor, wm->sr.fbc); + drm_dbg_kms(&dev_priv->drm, + "Initial HPLL watermarks: plane=%d, SR cursor=%d fbc=%d\n", + wm->hpll.plane, wm->hpll.cursor, wm->hpll.fbc); + drm_dbg_kms(&dev_priv->drm, "Initial SR=%s HPLL=%s FBC=%s\n", + yesno(wm->cxsr), yesno(wm->hpll_en), yesno(wm->fbc_en)); } void g4x_wm_sanitize(struct drm_i915_private *dev_priv) @@ -6044,8 +6073,9 @@ void vlv_wm_get_hw_state(struct drm_i915_private *dev_priv) if (wait_for((vlv_punit_read(dev_priv, PUNIT_REG_DDR_SETUP2) & FORCE_DDR_FREQ_REQ_ACK) == 0, 3)) { - DRM_DEBUG_KMS("Punit not acking DDR DVFS request, " - "assuming DDR DVFS is disabled\n"); + drm_dbg_kms(&dev_priv->drm, + "Punit not acking DDR DVFS request, " + "assuming DDR DVFS is disabled\n"); dev_priv->wm.max_level = VLV_WM_LEVEL_PM5; } else { val = vlv_punit_read(dev_priv, PUNIT_REG_DDR_SETUP2); @@ -6096,16 +6126,18 @@ void vlv_wm_get_hw_state(struct drm_i915_private *dev_priv) crtc_state->wm.vlv.optimal = *active; crtc_state->wm.vlv.intermediate = *active; - DRM_DEBUG_KMS("Initial watermarks: pipe %c, plane=%d, cursor=%d, sprite0=%d, sprite1=%d\n", - pipe_name(pipe), - wm->pipe[pipe].plane[PLANE_PRIMARY], - wm->pipe[pipe].plane[PLANE_CURSOR], - wm->pipe[pipe].plane[PLANE_SPRITE0], - wm->pipe[pipe].plane[PLANE_SPRITE1]); + drm_dbg_kms(&dev_priv->drm, + "Initial watermarks: pipe %c, plane=%d, cursor=%d, sprite0=%d, sprite1=%d\n", + pipe_name(pipe), + wm->pipe[pipe].plane[PLANE_PRIMARY], + wm->pipe[pipe].plane[PLANE_CURSOR], + wm->pipe[pipe].plane[PLANE_SPRITE0], + wm->pipe[pipe].plane[PLANE_SPRITE1]); } - DRM_DEBUG_KMS("Initial watermarks: SR plane=%d, SR cursor=%d level=%d cxsr=%d\n", - wm->sr.plane, wm->sr.cursor, wm->level, wm->cxsr); + drm_dbg_kms(&dev_priv->drm, + "Initial watermarks: SR plane=%d, SR cursor=%d level=%d cxsr=%d\n", + wm->sr.plane, wm->sr.cursor, wm->level, wm->cxsr); } void vlv_wm_sanitize(struct drm_i915_private *dev_priv) @@ -6421,8 +6453,9 @@ static void gen6_check_mch_setup(struct drm_i915_private *dev_priv) tmp = I915_READ(MCH_SSKPD); if ((tmp & MCH_SSKPD_WM0_MASK) != MCH_SSKPD_WM0_VAL) - DRM_DEBUG_KMS("Wrong MCH_SSKPD value: 0x%08x This can cause underruns.\n", - tmp); + drm_dbg_kms(&dev_priv->drm, + "Wrong MCH_SSKPD value: 0x%08x This can cause underruns.\n", + tmp); } static void gen6_init_clock_gating(struct drm_i915_private *dev_priv) @@ -7137,7 +7170,8 @@ void intel_suspend_hw(struct drm_i915_private *dev_priv) static void nop_init_clock_gating(struct drm_i915_private *dev_priv) { - DRM_DEBUG_KMS("No clock gating settings or workarounds applied.\n"); + drm_dbg_kms(&dev_priv->drm, + "No clock gating settings or workarounds applied.\n"); } /** @@ -7232,8 +7266,9 @@ void intel_init_pm(struct drm_i915_private *dev_priv) dev_priv->display.optimize_watermarks = ilk_optimize_watermarks; } else { - DRM_DEBUG_KMS("Failed to read display plane latency. " - "Disable CxSR\n"); + drm_dbg_kms(&dev_priv->drm, + "Failed to read display plane latency. " + "Disable CxSR\n"); } } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { vlv_setup_wm_latency(dev_priv); @@ -7253,7 +7288,8 @@ void intel_init_pm(struct drm_i915_private *dev_priv) dev_priv->is_ddr3, dev_priv->fsb_freq, dev_priv->mem_freq)) { - DRM_INFO("failed to find known CxSR latency " + drm_info(&dev_priv->drm, + "failed to find known CxSR latency " "(found ddr%s fsb freq %d, mem freq %d), " "disabling CxSR\n", (dev_priv->is_ddr3 == 1) ? "3" : "2", @@ -7277,7 +7313,8 @@ void intel_init_pm(struct drm_i915_private *dev_priv) dev_priv->display.get_fifo_size = i830_get_fifo_size; } } else { - DRM_ERROR("unexpected fall-through in intel_init_pm\n"); + drm_err(&dev_priv->drm, + "unexpected fall-through in %s\n", __func__); } } -- 2.24.1 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH 3/5] drm/i915: use new struct drm_device based logging macros. 2020-01-07 15:13 ` Wambui Karuga (?) @ 2020-01-07 15:13 ` Wambui Karuga -1 siblings, 0 replies; 42+ messages in thread From: Wambui Karuga @ 2020-01-07 15:13 UTC (permalink / raw) To: jani.nikula, joonas.lahtinen, rodrigo.vivi, airlied, daniel Cc: seanpaul, intel-gfx, dri-devel, linux-kernel Replace instances of printk based logging macros with the new struct drm_device logging macros in i915/intel_region_lmem.c. Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> --- drivers/gpu/drm/i915/intel_region_lmem.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_region_lmem.c b/drivers/gpu/drm/i915/intel_region_lmem.c index e6a6b571dad4..14b59b899c9b 100644 --- a/drivers/gpu/drm/i915/intel_region_lmem.c +++ b/drivers/gpu/drm/i915/intel_region_lmem.c @@ -125,10 +125,12 @@ intel_setup_fake_lmem(struct drm_i915_private *i915) io_start, &intel_region_lmem_ops); if (!IS_ERR(mem)) { - DRM_INFO("Intel graphics fake LMEM: %pR\n", &mem->region); - DRM_INFO("Intel graphics fake LMEM IO start: %llx\n", - (u64)mem->io_start); - DRM_INFO("Intel graphics fake LMEM size: %llx\n", + drm_info(&i915->drm, "Intel graphics fake LMEM: %pR\n", + &mem->region); + drm_info(&i915->drm, + "Intel graphics fake LMEM IO start: %llx\n", + (u64)mem->io_start); + drm_info(&i915->drm, "Intel graphics fake LMEM size: %llx\n", (u64)resource_size(&mem->region)); } -- 2.24.1 ^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Intel-gfx] [PATCH 3/5] drm/i915: use new struct drm_device based logging macros. @ 2020-01-07 15:13 ` Wambui Karuga 0 siblings, 0 replies; 42+ messages in thread From: Wambui Karuga @ 2020-01-07 15:13 UTC (permalink / raw) To: jani.nikula, joonas.lahtinen, rodrigo.vivi, airlied, daniel Cc: intel-gfx, seanpaul, linux-kernel, dri-devel Replace instances of printk based logging macros with the new struct drm_device logging macros in i915/intel_region_lmem.c. Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> --- drivers/gpu/drm/i915/intel_region_lmem.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_region_lmem.c b/drivers/gpu/drm/i915/intel_region_lmem.c index e6a6b571dad4..14b59b899c9b 100644 --- a/drivers/gpu/drm/i915/intel_region_lmem.c +++ b/drivers/gpu/drm/i915/intel_region_lmem.c @@ -125,10 +125,12 @@ intel_setup_fake_lmem(struct drm_i915_private *i915) io_start, &intel_region_lmem_ops); if (!IS_ERR(mem)) { - DRM_INFO("Intel graphics fake LMEM: %pR\n", &mem->region); - DRM_INFO("Intel graphics fake LMEM IO start: %llx\n", - (u64)mem->io_start); - DRM_INFO("Intel graphics fake LMEM size: %llx\n", + drm_info(&i915->drm, "Intel graphics fake LMEM: %pR\n", + &mem->region); + drm_info(&i915->drm, + "Intel graphics fake LMEM IO start: %llx\n", + (u64)mem->io_start); + drm_info(&i915->drm, "Intel graphics fake LMEM size: %llx\n", (u64)resource_size(&mem->region)); } -- 2.24.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH 3/5] drm/i915: use new struct drm_device based logging macros. @ 2020-01-07 15:13 ` Wambui Karuga 0 siblings, 0 replies; 42+ messages in thread From: Wambui Karuga @ 2020-01-07 15:13 UTC (permalink / raw) To: jani.nikula, joonas.lahtinen, rodrigo.vivi, airlied, daniel Cc: intel-gfx, seanpaul, linux-kernel, dri-devel Replace instances of printk based logging macros with the new struct drm_device logging macros in i915/intel_region_lmem.c. Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> --- drivers/gpu/drm/i915/intel_region_lmem.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_region_lmem.c b/drivers/gpu/drm/i915/intel_region_lmem.c index e6a6b571dad4..14b59b899c9b 100644 --- a/drivers/gpu/drm/i915/intel_region_lmem.c +++ b/drivers/gpu/drm/i915/intel_region_lmem.c @@ -125,10 +125,12 @@ intel_setup_fake_lmem(struct drm_i915_private *i915) io_start, &intel_region_lmem_ops); if (!IS_ERR(mem)) { - DRM_INFO("Intel graphics fake LMEM: %pR\n", &mem->region); - DRM_INFO("Intel graphics fake LMEM IO start: %llx\n", - (u64)mem->io_start); - DRM_INFO("Intel graphics fake LMEM size: %llx\n", + drm_info(&i915->drm, "Intel graphics fake LMEM: %pR\n", + &mem->region); + drm_info(&i915->drm, + "Intel graphics fake LMEM IO start: %llx\n", + (u64)mem->io_start); + drm_info(&i915->drm, "Intel graphics fake LMEM size: %llx\n", (u64)resource_size(&mem->region)); } -- 2.24.1 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH 4/5] drm/i915: convert to using new struct drm_device logging macros 2020-01-07 15:13 ` Wambui Karuga (?) @ 2020-01-07 15:13 ` Wambui Karuga -1 siblings, 0 replies; 42+ messages in thread From: Wambui Karuga @ 2020-01-07 15:13 UTC (permalink / raw) To: jani.nikula, joonas.lahtinen, rodrigo.vivi, airlied, daniel Cc: seanpaul, intel-gfx, dri-devel, linux-kernel Replace the use of printk based debugging macros with the struct drm_device based logging macros in i915/intel_sideband.c. Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> --- drivers/gpu/drm/i915/intel_sideband.c | 29 ++++++++++++++++----------- 1 file changed, 17 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_sideband.c b/drivers/gpu/drm/i915/intel_sideband.c index e06b35b844a0..cbfb7171d62d 100644 --- a/drivers/gpu/drm/i915/intel_sideband.c +++ b/drivers/gpu/drm/i915/intel_sideband.c @@ -105,8 +105,8 @@ static int vlv_sideband_rw(struct drm_i915_private *i915, if (intel_wait_for_register(uncore, VLV_IOSF_DOORBELL_REQ, IOSF_SB_BUSY, 0, 5)) { - DRM_DEBUG_DRIVER("IOSF sideband idle wait (%s) timed out\n", - is_read ? "read" : "write"); + drm_dbg(&i915->drm, "IOSF sideband idle wait (%s) timed out\n", + is_read ? "read" : "write"); return -EAGAIN; } @@ -129,8 +129,8 @@ static int vlv_sideband_rw(struct drm_i915_private *i915, *val = intel_uncore_read_fw(uncore, VLV_IOSF_DATA); err = 0; } else { - DRM_DEBUG_DRIVER("IOSF sideband finish wait (%s) timed out\n", - is_read ? "read" : "write"); + drm_dbg(&i915->drm, "IOSF sideband finish wait (%s) timed out\n", + is_read ? "read" : "write"); err = -ETIMEDOUT; } @@ -283,7 +283,8 @@ static int intel_sbi_rw(struct drm_i915_private *i915, u16 reg, if (intel_wait_for_register_fw(uncore, SBI_CTL_STAT, SBI_BUSY, 0, 100)) { - DRM_ERROR("timeout waiting for SBI to become ready\n"); + drm_err(&i915->drm, + "timeout waiting for SBI to become ready\n"); return -EBUSY; } @@ -301,12 +302,13 @@ static int intel_sbi_rw(struct drm_i915_private *i915, u16 reg, if (__intel_wait_for_register_fw(uncore, SBI_CTL_STAT, SBI_BUSY, 0, 100, 100, &cmd)) { - DRM_ERROR("timeout waiting for SBI to complete read\n"); + drm_err(&i915->drm, + "timeout waiting for SBI to complete read\n"); return -ETIMEDOUT; } if (cmd & SBI_RESPONSE_FAIL) { - DRM_ERROR("error during SBI read of reg %x\n", reg); + drm_err(&i915->drm, "error during SBI read of reg %x\n", reg); return -ENXIO; } @@ -426,8 +428,9 @@ int sandybridge_pcode_read(struct drm_i915_private *i915, u32 mbox, mutex_unlock(&i915->sb_lock); if (err) { - DRM_DEBUG_DRIVER("warning: pcode (read from mbox %x) mailbox access failed for %ps: %d\n", - mbox, __builtin_return_address(0), err); + drm_dbg(&i915->drm, + "warning: pcode (read from mbox %x) mailbox access failed for %ps: %d\n", + mbox, __builtin_return_address(0), err); } return err; @@ -447,8 +450,9 @@ int sandybridge_pcode_write_timeout(struct drm_i915_private *i915, mutex_unlock(&i915->sb_lock); if (err) { - DRM_DEBUG_DRIVER("warning: pcode (write of 0x%08x to mbox %x) mailbox access failed for %ps: %d\n", - val, mbox, __builtin_return_address(0), err); + drm_dbg(&i915->drm, + "warning: pcode (write of 0x%08x to mbox %x) mailbox access failed for %ps: %d\n", + val, mbox, __builtin_return_address(0), err); } return err; @@ -519,7 +523,8 @@ int skl_pcode_request(struct drm_i915_private *i915, u32 mbox, u32 request, * requests, and for any quirks of the PCODE firmware that delays * the request completion. */ - DRM_DEBUG_KMS("PCODE timeout, retrying with preemption disabled\n"); + drm_dbg_kms(&i915->drm, + "PCODE timeout, retrying with preemption disabled\n"); WARN_ON_ONCE(timeout_base_ms > 3); preempt_disable(); ret = wait_for_atomic(COND, 50); -- 2.24.1 ^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Intel-gfx] [PATCH 4/5] drm/i915: convert to using new struct drm_device logging macros @ 2020-01-07 15:13 ` Wambui Karuga 0 siblings, 0 replies; 42+ messages in thread From: Wambui Karuga @ 2020-01-07 15:13 UTC (permalink / raw) To: jani.nikula, joonas.lahtinen, rodrigo.vivi, airlied, daniel Cc: intel-gfx, seanpaul, linux-kernel, dri-devel Replace the use of printk based debugging macros with the struct drm_device based logging macros in i915/intel_sideband.c. Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> --- drivers/gpu/drm/i915/intel_sideband.c | 29 ++++++++++++++++----------- 1 file changed, 17 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_sideband.c b/drivers/gpu/drm/i915/intel_sideband.c index e06b35b844a0..cbfb7171d62d 100644 --- a/drivers/gpu/drm/i915/intel_sideband.c +++ b/drivers/gpu/drm/i915/intel_sideband.c @@ -105,8 +105,8 @@ static int vlv_sideband_rw(struct drm_i915_private *i915, if (intel_wait_for_register(uncore, VLV_IOSF_DOORBELL_REQ, IOSF_SB_BUSY, 0, 5)) { - DRM_DEBUG_DRIVER("IOSF sideband idle wait (%s) timed out\n", - is_read ? "read" : "write"); + drm_dbg(&i915->drm, "IOSF sideband idle wait (%s) timed out\n", + is_read ? "read" : "write"); return -EAGAIN; } @@ -129,8 +129,8 @@ static int vlv_sideband_rw(struct drm_i915_private *i915, *val = intel_uncore_read_fw(uncore, VLV_IOSF_DATA); err = 0; } else { - DRM_DEBUG_DRIVER("IOSF sideband finish wait (%s) timed out\n", - is_read ? "read" : "write"); + drm_dbg(&i915->drm, "IOSF sideband finish wait (%s) timed out\n", + is_read ? "read" : "write"); err = -ETIMEDOUT; } @@ -283,7 +283,8 @@ static int intel_sbi_rw(struct drm_i915_private *i915, u16 reg, if (intel_wait_for_register_fw(uncore, SBI_CTL_STAT, SBI_BUSY, 0, 100)) { - DRM_ERROR("timeout waiting for SBI to become ready\n"); + drm_err(&i915->drm, + "timeout waiting for SBI to become ready\n"); return -EBUSY; } @@ -301,12 +302,13 @@ static int intel_sbi_rw(struct drm_i915_private *i915, u16 reg, if (__intel_wait_for_register_fw(uncore, SBI_CTL_STAT, SBI_BUSY, 0, 100, 100, &cmd)) { - DRM_ERROR("timeout waiting for SBI to complete read\n"); + drm_err(&i915->drm, + "timeout waiting for SBI to complete read\n"); return -ETIMEDOUT; } if (cmd & SBI_RESPONSE_FAIL) { - DRM_ERROR("error during SBI read of reg %x\n", reg); + drm_err(&i915->drm, "error during SBI read of reg %x\n", reg); return -ENXIO; } @@ -426,8 +428,9 @@ int sandybridge_pcode_read(struct drm_i915_private *i915, u32 mbox, mutex_unlock(&i915->sb_lock); if (err) { - DRM_DEBUG_DRIVER("warning: pcode (read from mbox %x) mailbox access failed for %ps: %d\n", - mbox, __builtin_return_address(0), err); + drm_dbg(&i915->drm, + "warning: pcode (read from mbox %x) mailbox access failed for %ps: %d\n", + mbox, __builtin_return_address(0), err); } return err; @@ -447,8 +450,9 @@ int sandybridge_pcode_write_timeout(struct drm_i915_private *i915, mutex_unlock(&i915->sb_lock); if (err) { - DRM_DEBUG_DRIVER("warning: pcode (write of 0x%08x to mbox %x) mailbox access failed for %ps: %d\n", - val, mbox, __builtin_return_address(0), err); + drm_dbg(&i915->drm, + "warning: pcode (write of 0x%08x to mbox %x) mailbox access failed for %ps: %d\n", + val, mbox, __builtin_return_address(0), err); } return err; @@ -519,7 +523,8 @@ int skl_pcode_request(struct drm_i915_private *i915, u32 mbox, u32 request, * requests, and for any quirks of the PCODE firmware that delays * the request completion. */ - DRM_DEBUG_KMS("PCODE timeout, retrying with preemption disabled\n"); + drm_dbg_kms(&i915->drm, + "PCODE timeout, retrying with preemption disabled\n"); WARN_ON_ONCE(timeout_base_ms > 3); preempt_disable(); ret = wait_for_atomic(COND, 50); -- 2.24.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH 4/5] drm/i915: convert to using new struct drm_device logging macros @ 2020-01-07 15:13 ` Wambui Karuga 0 siblings, 0 replies; 42+ messages in thread From: Wambui Karuga @ 2020-01-07 15:13 UTC (permalink / raw) To: jani.nikula, joonas.lahtinen, rodrigo.vivi, airlied, daniel Cc: intel-gfx, seanpaul, linux-kernel, dri-devel Replace the use of printk based debugging macros with the struct drm_device based logging macros in i915/intel_sideband.c. Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> --- drivers/gpu/drm/i915/intel_sideband.c | 29 ++++++++++++++++----------- 1 file changed, 17 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_sideband.c b/drivers/gpu/drm/i915/intel_sideband.c index e06b35b844a0..cbfb7171d62d 100644 --- a/drivers/gpu/drm/i915/intel_sideband.c +++ b/drivers/gpu/drm/i915/intel_sideband.c @@ -105,8 +105,8 @@ static int vlv_sideband_rw(struct drm_i915_private *i915, if (intel_wait_for_register(uncore, VLV_IOSF_DOORBELL_REQ, IOSF_SB_BUSY, 0, 5)) { - DRM_DEBUG_DRIVER("IOSF sideband idle wait (%s) timed out\n", - is_read ? "read" : "write"); + drm_dbg(&i915->drm, "IOSF sideband idle wait (%s) timed out\n", + is_read ? "read" : "write"); return -EAGAIN; } @@ -129,8 +129,8 @@ static int vlv_sideband_rw(struct drm_i915_private *i915, *val = intel_uncore_read_fw(uncore, VLV_IOSF_DATA); err = 0; } else { - DRM_DEBUG_DRIVER("IOSF sideband finish wait (%s) timed out\n", - is_read ? "read" : "write"); + drm_dbg(&i915->drm, "IOSF sideband finish wait (%s) timed out\n", + is_read ? "read" : "write"); err = -ETIMEDOUT; } @@ -283,7 +283,8 @@ static int intel_sbi_rw(struct drm_i915_private *i915, u16 reg, if (intel_wait_for_register_fw(uncore, SBI_CTL_STAT, SBI_BUSY, 0, 100)) { - DRM_ERROR("timeout waiting for SBI to become ready\n"); + drm_err(&i915->drm, + "timeout waiting for SBI to become ready\n"); return -EBUSY; } @@ -301,12 +302,13 @@ static int intel_sbi_rw(struct drm_i915_private *i915, u16 reg, if (__intel_wait_for_register_fw(uncore, SBI_CTL_STAT, SBI_BUSY, 0, 100, 100, &cmd)) { - DRM_ERROR("timeout waiting for SBI to complete read\n"); + drm_err(&i915->drm, + "timeout waiting for SBI to complete read\n"); return -ETIMEDOUT; } if (cmd & SBI_RESPONSE_FAIL) { - DRM_ERROR("error during SBI read of reg %x\n", reg); + drm_err(&i915->drm, "error during SBI read of reg %x\n", reg); return -ENXIO; } @@ -426,8 +428,9 @@ int sandybridge_pcode_read(struct drm_i915_private *i915, u32 mbox, mutex_unlock(&i915->sb_lock); if (err) { - DRM_DEBUG_DRIVER("warning: pcode (read from mbox %x) mailbox access failed for %ps: %d\n", - mbox, __builtin_return_address(0), err); + drm_dbg(&i915->drm, + "warning: pcode (read from mbox %x) mailbox access failed for %ps: %d\n", + mbox, __builtin_return_address(0), err); } return err; @@ -447,8 +450,9 @@ int sandybridge_pcode_write_timeout(struct drm_i915_private *i915, mutex_unlock(&i915->sb_lock); if (err) { - DRM_DEBUG_DRIVER("warning: pcode (write of 0x%08x to mbox %x) mailbox access failed for %ps: %d\n", - val, mbox, __builtin_return_address(0), err); + drm_dbg(&i915->drm, + "warning: pcode (write of 0x%08x to mbox %x) mailbox access failed for %ps: %d\n", + val, mbox, __builtin_return_address(0), err); } return err; @@ -519,7 +523,8 @@ int skl_pcode_request(struct drm_i915_private *i915, u32 mbox, u32 request, * requests, and for any quirks of the PCODE firmware that delays * the request completion. */ - DRM_DEBUG_KMS("PCODE timeout, retrying with preemption disabled\n"); + drm_dbg_kms(&i915->drm, + "PCODE timeout, retrying with preemption disabled\n"); WARN_ON_ONCE(timeout_base_ms > 3); preempt_disable(); ret = wait_for_atomic(COND, 50); -- 2.24.1 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH 5/5] drm/i915: use new struct drm_device based macros. 2020-01-07 15:13 ` Wambui Karuga (?) @ 2020-01-07 15:13 ` Wambui Karuga -1 siblings, 0 replies; 42+ messages in thread From: Wambui Karuga @ 2020-01-07 15:13 UTC (permalink / raw) To: jani.nikula, joonas.lahtinen, rodrigo.vivi, airlied, daniel Cc: seanpaul, intel-gfx, dri-devel, linux-kernel Convert to the use of new struct drm_device based logging macros to replace the use of the printk based macros in i915/intel_uncore.c Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> --- drivers/gpu/drm/i915/intel_uncore.c | 25 +++++++++++++------------ 1 file changed, 13 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index 94a97bf8c021..5f2cf6f43b8b 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -359,7 +359,8 @@ static void __gen6_gt_wait_for_fifo(struct intel_uncore *uncore) if (wait_for_atomic((n = fifo_free_entries(uncore)) > GT_FIFO_NUM_RESERVED_ENTRIES, GT_FIFO_TIMEOUT_MS)) { - DRM_DEBUG("GT_FIFO timeout, entries: %u\n", n); + drm_dbg(&uncore->i915->drm, + "GT_FIFO timeout, entries: %u\n", n); return; } } @@ -432,7 +433,7 @@ intel_uncore_forcewake_reset(struct intel_uncore *uncore) break; if (--retry_count == 0) { - DRM_ERROR("Timed out waiting for forcewake timers to finish\n"); + drm_err(&uncore->i915->drm, "Timed out waiting for forcewake timers to finish\n"); break; } @@ -490,7 +491,7 @@ gen6_check_for_fifo_debug(struct intel_uncore *uncore) fifodbg = __raw_uncore_read32(uncore, GTFIFODBG); if (unlikely(fifodbg)) { - DRM_DEBUG_DRIVER("GTFIFODBG = 0x08%x\n", fifodbg); + drm_dbg(&uncore->i915->drm, "GTFIFODBG = 0x08%x\n", fifodbg); __raw_uncore_write32(uncore, GTFIFODBG, fifodbg); } @@ -562,7 +563,7 @@ void intel_uncore_resume_early(struct intel_uncore *uncore) unsigned int restore_forcewake; if (intel_uncore_unclaimed_mmio(uncore)) - DRM_DEBUG("unclaimed mmio detected on resume, clearing\n"); + drm_dbg(&uncore->i915->drm, "unclaimed mmio detected on resume, clearing\n"); if (!intel_uncore_has_forcewake(uncore)) return; @@ -1595,8 +1596,8 @@ static int intel_uncore_fw_domains_init(struct intel_uncore *uncore) spin_unlock_irq(&uncore->lock); if (!(ecobus & FORCEWAKE_MT_ENABLE)) { - DRM_INFO("No MT forcewake available on Ivybridge, this can result in issues\n"); - DRM_INFO("when using vblank-synced partial screen updates.\n"); + drm_info(&i915->drm, "No MT forcewake available on Ivybridge, this can result in issues\n"); + drm_info(&i915->drm, "when using vblank-synced partial screen updates.\n"); fw_domain_fini(uncore, FW_DOMAIN_ID_RENDER); fw_domain_init(uncore, FW_DOMAIN_ID_RENDER, FORCEWAKE, FORCEWAKE_ACK); @@ -1683,8 +1684,7 @@ static int uncore_mmio_setup(struct intel_uncore *uncore) mmio_size = 2 * 1024 * 1024; uncore->regs = pci_iomap(pdev, mmio_bar, mmio_size); if (uncore->regs == NULL) { - DRM_ERROR("failed to map registers\n"); - + drm_err(&i915->drm, "failed to map registers\n"); return -EIO; } @@ -1807,7 +1807,7 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore) /* clear out unclaimed reg detection bit */ if (intel_uncore_unclaimed_mmio(uncore)) - DRM_DEBUG("unclaimed mmio detected on uncore init, clearing\n"); + drm_dbg(&i915->drm, "unclaimed mmio detected on uncore init, clearing\n"); return 0; @@ -2072,9 +2072,10 @@ intel_uncore_arm_unclaimed_mmio_detection(struct intel_uncore *uncore) if (unlikely(check_for_unclaimed_mmio(uncore))) { if (!i915_modparams.mmio_debug) { - DRM_DEBUG("Unclaimed register detected, " - "enabling oneshot unclaimed register reporting. " - "Please use i915.mmio_debug=N for more information.\n"); + drm_dbg(&uncore->i915->drm, + "Unclaimed register detected, " + "enabling oneshot unclaimed register reporting. " + "Please use i915.mmio_debug=N for more information.\n"); i915_modparams.mmio_debug++; } uncore->debug->unclaimed_mmio_check--; -- 2.24.1 ^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Intel-gfx] [PATCH 5/5] drm/i915: use new struct drm_device based macros. @ 2020-01-07 15:13 ` Wambui Karuga 0 siblings, 0 replies; 42+ messages in thread From: Wambui Karuga @ 2020-01-07 15:13 UTC (permalink / raw) To: jani.nikula, joonas.lahtinen, rodrigo.vivi, airlied, daniel Cc: intel-gfx, seanpaul, linux-kernel, dri-devel Convert to the use of new struct drm_device based logging macros to replace the use of the printk based macros in i915/intel_uncore.c Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> --- drivers/gpu/drm/i915/intel_uncore.c | 25 +++++++++++++------------ 1 file changed, 13 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index 94a97bf8c021..5f2cf6f43b8b 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -359,7 +359,8 @@ static void __gen6_gt_wait_for_fifo(struct intel_uncore *uncore) if (wait_for_atomic((n = fifo_free_entries(uncore)) > GT_FIFO_NUM_RESERVED_ENTRIES, GT_FIFO_TIMEOUT_MS)) { - DRM_DEBUG("GT_FIFO timeout, entries: %u\n", n); + drm_dbg(&uncore->i915->drm, + "GT_FIFO timeout, entries: %u\n", n); return; } } @@ -432,7 +433,7 @@ intel_uncore_forcewake_reset(struct intel_uncore *uncore) break; if (--retry_count == 0) { - DRM_ERROR("Timed out waiting for forcewake timers to finish\n"); + drm_err(&uncore->i915->drm, "Timed out waiting for forcewake timers to finish\n"); break; } @@ -490,7 +491,7 @@ gen6_check_for_fifo_debug(struct intel_uncore *uncore) fifodbg = __raw_uncore_read32(uncore, GTFIFODBG); if (unlikely(fifodbg)) { - DRM_DEBUG_DRIVER("GTFIFODBG = 0x08%x\n", fifodbg); + drm_dbg(&uncore->i915->drm, "GTFIFODBG = 0x08%x\n", fifodbg); __raw_uncore_write32(uncore, GTFIFODBG, fifodbg); } @@ -562,7 +563,7 @@ void intel_uncore_resume_early(struct intel_uncore *uncore) unsigned int restore_forcewake; if (intel_uncore_unclaimed_mmio(uncore)) - DRM_DEBUG("unclaimed mmio detected on resume, clearing\n"); + drm_dbg(&uncore->i915->drm, "unclaimed mmio detected on resume, clearing\n"); if (!intel_uncore_has_forcewake(uncore)) return; @@ -1595,8 +1596,8 @@ static int intel_uncore_fw_domains_init(struct intel_uncore *uncore) spin_unlock_irq(&uncore->lock); if (!(ecobus & FORCEWAKE_MT_ENABLE)) { - DRM_INFO("No MT forcewake available on Ivybridge, this can result in issues\n"); - DRM_INFO("when using vblank-synced partial screen updates.\n"); + drm_info(&i915->drm, "No MT forcewake available on Ivybridge, this can result in issues\n"); + drm_info(&i915->drm, "when using vblank-synced partial screen updates.\n"); fw_domain_fini(uncore, FW_DOMAIN_ID_RENDER); fw_domain_init(uncore, FW_DOMAIN_ID_RENDER, FORCEWAKE, FORCEWAKE_ACK); @@ -1683,8 +1684,7 @@ static int uncore_mmio_setup(struct intel_uncore *uncore) mmio_size = 2 * 1024 * 1024; uncore->regs = pci_iomap(pdev, mmio_bar, mmio_size); if (uncore->regs == NULL) { - DRM_ERROR("failed to map registers\n"); - + drm_err(&i915->drm, "failed to map registers\n"); return -EIO; } @@ -1807,7 +1807,7 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore) /* clear out unclaimed reg detection bit */ if (intel_uncore_unclaimed_mmio(uncore)) - DRM_DEBUG("unclaimed mmio detected on uncore init, clearing\n"); + drm_dbg(&i915->drm, "unclaimed mmio detected on uncore init, clearing\n"); return 0; @@ -2072,9 +2072,10 @@ intel_uncore_arm_unclaimed_mmio_detection(struct intel_uncore *uncore) if (unlikely(check_for_unclaimed_mmio(uncore))) { if (!i915_modparams.mmio_debug) { - DRM_DEBUG("Unclaimed register detected, " - "enabling oneshot unclaimed register reporting. " - "Please use i915.mmio_debug=N for more information.\n"); + drm_dbg(&uncore->i915->drm, + "Unclaimed register detected, " + "enabling oneshot unclaimed register reporting. " + "Please use i915.mmio_debug=N for more information.\n"); i915_modparams.mmio_debug++; } uncore->debug->unclaimed_mmio_check--; -- 2.24.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH 5/5] drm/i915: use new struct drm_device based macros. @ 2020-01-07 15:13 ` Wambui Karuga 0 siblings, 0 replies; 42+ messages in thread From: Wambui Karuga @ 2020-01-07 15:13 UTC (permalink / raw) To: jani.nikula, joonas.lahtinen, rodrigo.vivi, airlied, daniel Cc: intel-gfx, seanpaul, linux-kernel, dri-devel Convert to the use of new struct drm_device based logging macros to replace the use of the printk based macros in i915/intel_uncore.c Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> --- drivers/gpu/drm/i915/intel_uncore.c | 25 +++++++++++++------------ 1 file changed, 13 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index 94a97bf8c021..5f2cf6f43b8b 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -359,7 +359,8 @@ static void __gen6_gt_wait_for_fifo(struct intel_uncore *uncore) if (wait_for_atomic((n = fifo_free_entries(uncore)) > GT_FIFO_NUM_RESERVED_ENTRIES, GT_FIFO_TIMEOUT_MS)) { - DRM_DEBUG("GT_FIFO timeout, entries: %u\n", n); + drm_dbg(&uncore->i915->drm, + "GT_FIFO timeout, entries: %u\n", n); return; } } @@ -432,7 +433,7 @@ intel_uncore_forcewake_reset(struct intel_uncore *uncore) break; if (--retry_count == 0) { - DRM_ERROR("Timed out waiting for forcewake timers to finish\n"); + drm_err(&uncore->i915->drm, "Timed out waiting for forcewake timers to finish\n"); break; } @@ -490,7 +491,7 @@ gen6_check_for_fifo_debug(struct intel_uncore *uncore) fifodbg = __raw_uncore_read32(uncore, GTFIFODBG); if (unlikely(fifodbg)) { - DRM_DEBUG_DRIVER("GTFIFODBG = 0x08%x\n", fifodbg); + drm_dbg(&uncore->i915->drm, "GTFIFODBG = 0x08%x\n", fifodbg); __raw_uncore_write32(uncore, GTFIFODBG, fifodbg); } @@ -562,7 +563,7 @@ void intel_uncore_resume_early(struct intel_uncore *uncore) unsigned int restore_forcewake; if (intel_uncore_unclaimed_mmio(uncore)) - DRM_DEBUG("unclaimed mmio detected on resume, clearing\n"); + drm_dbg(&uncore->i915->drm, "unclaimed mmio detected on resume, clearing\n"); if (!intel_uncore_has_forcewake(uncore)) return; @@ -1595,8 +1596,8 @@ static int intel_uncore_fw_domains_init(struct intel_uncore *uncore) spin_unlock_irq(&uncore->lock); if (!(ecobus & FORCEWAKE_MT_ENABLE)) { - DRM_INFO("No MT forcewake available on Ivybridge, this can result in issues\n"); - DRM_INFO("when using vblank-synced partial screen updates.\n"); + drm_info(&i915->drm, "No MT forcewake available on Ivybridge, this can result in issues\n"); + drm_info(&i915->drm, "when using vblank-synced partial screen updates.\n"); fw_domain_fini(uncore, FW_DOMAIN_ID_RENDER); fw_domain_init(uncore, FW_DOMAIN_ID_RENDER, FORCEWAKE, FORCEWAKE_ACK); @@ -1683,8 +1684,7 @@ static int uncore_mmio_setup(struct intel_uncore *uncore) mmio_size = 2 * 1024 * 1024; uncore->regs = pci_iomap(pdev, mmio_bar, mmio_size); if (uncore->regs == NULL) { - DRM_ERROR("failed to map registers\n"); - + drm_err(&i915->drm, "failed to map registers\n"); return -EIO; } @@ -1807,7 +1807,7 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore) /* clear out unclaimed reg detection bit */ if (intel_uncore_unclaimed_mmio(uncore)) - DRM_DEBUG("unclaimed mmio detected on uncore init, clearing\n"); + drm_dbg(&i915->drm, "unclaimed mmio detected on uncore init, clearing\n"); return 0; @@ -2072,9 +2072,10 @@ intel_uncore_arm_unclaimed_mmio_detection(struct intel_uncore *uncore) if (unlikely(check_for_unclaimed_mmio(uncore))) { if (!i915_modparams.mmio_debug) { - DRM_DEBUG("Unclaimed register detected, " - "enabling oneshot unclaimed register reporting. " - "Please use i915.mmio_debug=N for more information.\n"); + drm_dbg(&uncore->i915->drm, + "Unclaimed register detected, " + "enabling oneshot unclaimed register reporting. " + "Please use i915.mmio_debug=N for more information.\n"); i915_modparams.mmio_debug++; } uncore->debug->unclaimed_mmio_check--; -- 2.24.1 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: conversion to new drm logging macros. 2020-01-07 15:13 ` Wambui Karuga ` (6 preceding siblings ...) (?) @ 2020-01-07 19:08 ` Patchwork -1 siblings, 0 replies; 42+ messages in thread From: Patchwork @ 2020-01-07 19:08 UTC (permalink / raw) To: Wambui Karuga; +Cc: intel-gfx == Series Details == Series: drm/i915: conversion to new drm logging macros. URL : https://patchwork.freedesktop.org/series/71698/ State : warning == Summary == $ dim checkpatch origin/drm-tip 9baa398403ea drm/i915: convert to using the drm_dbg_kms() macro. 1cae57305c57 drm/i915: use new struct drm_device logging macros. -:524: WARNING:LONG_LINE: line over 100 characters #524: FILE: drivers/gpu/drm/i915/intel_pm.c:5337: + enast(old_wm->trans_wm.ignore_lines), old_wm->trans_wm.plane_res_l, -:534: WARNING:LONG_LINE: line over 100 characters #534: FILE: drivers/gpu/drm/i915/intel_pm.c:5347: + enast(new_wm->trans_wm.ignore_lines), new_wm->trans_wm.plane_res_l); total: 0 errors, 2 warnings, 0 checks, 634 lines checked ea6cb30e7a0c drm/i915: use new struct drm_device based logging macros. 9209ec64ba41 drm/i915: convert to using new struct drm_device logging macros 4bfa0a3eef65 drm/i915: use new struct drm_device based macros. _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 42+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: conversion to new drm logging macros. 2020-01-07 15:13 ` Wambui Karuga ` (7 preceding siblings ...) (?) @ 2020-01-07 20:07 ` Patchwork -1 siblings, 0 replies; 42+ messages in thread From: Patchwork @ 2020-01-07 20:07 UTC (permalink / raw) To: Wambui Karuga; +Cc: intel-gfx == Series Details == Series: drm/i915: conversion to new drm logging macros. URL : https://patchwork.freedesktop.org/series/71698/ State : success == Summary == CI Bug Log - changes from CI_DRM_7695 -> Patchwork_16016 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/index.html Known issues ------------ Here are the changes found in Patchwork_16016 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_mmap_gtt@basic-copy: - fi-glk-dsi: [PASS][1] -> [INCOMPLETE][2] ([i915#58] / [k.org#198133]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/fi-glk-dsi/igt@gem_mmap_gtt@basic-copy.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/fi-glk-dsi/igt@gem_mmap_gtt@basic-copy.html * igt@i915_selftest@live_blt: - fi-ivb-3770: [PASS][3] -> [DMESG-FAIL][4] ([i915#725]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/fi-ivb-3770/igt@i915_selftest@live_blt.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/fi-ivb-3770/igt@i915_selftest@live_blt.html - fi-hsw-4770: [PASS][5] -> [DMESG-FAIL][6] ([i915#563]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/fi-hsw-4770/igt@i915_selftest@live_blt.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/fi-hsw-4770/igt@i915_selftest@live_blt.html - fi-hsw-4770r: [PASS][7] -> [DMESG-FAIL][8] ([i915#553]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/fi-hsw-4770r/igt@i915_selftest@live_blt.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/fi-hsw-4770r/igt@i915_selftest@live_blt.html * igt@i915_selftest@live_gem_contexts: - fi-hsw-peppy: [PASS][9] -> [DMESG-FAIL][10] ([i915#722]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/fi-hsw-peppy/igt@i915_selftest@live_gem_contexts.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/fi-hsw-peppy/igt@i915_selftest@live_gem_contexts.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-icl-u2: [PASS][11] -> [FAIL][12] ([i915#217]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html #### Possible fixes #### * igt@gem_close_race@basic-threads: - fi-byt-j1900: [TIMEOUT][13] ([i915#816]) -> [PASS][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/fi-byt-j1900/igt@gem_close_race@basic-threads.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/fi-byt-j1900/igt@gem_close_race@basic-threads.html * igt@i915_module_load@reload-with-fault-injection: - fi-skl-6770hq: [INCOMPLETE][15] ([i915#671]) -> [PASS][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/fi-skl-6770hq/igt@i915_module_load@reload-with-fault-injection.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/fi-skl-6770hq/igt@i915_module_load@reload-with-fault-injection.html * igt@i915_selftest@live_blt: - fi-bsw-nick: [DMESG-FAIL][17] ([i915#723]) -> [PASS][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/fi-bsw-nick/igt@i915_selftest@live_blt.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/fi-bsw-nick/igt@i915_selftest@live_blt.html #### Warnings #### * igt@runner@aborted: - fi-kbl-8809g: [FAIL][19] ([i915#192] / [i915#193] / [i915#194]) -> [FAIL][20] ([i915#858]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/fi-kbl-8809g/igt@runner@aborted.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/fi-kbl-8809g/igt@runner@aborted.html [i915#192]: https://gitlab.freedesktop.org/drm/intel/issues/192 [i915#193]: https://gitlab.freedesktop.org/drm/intel/issues/193 [i915#194]: https://gitlab.freedesktop.org/drm/intel/issues/194 [i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217 [i915#553]: https://gitlab.freedesktop.org/drm/intel/issues/553 [i915#563]: https://gitlab.freedesktop.org/drm/intel/issues/563 [i915#58]: https://gitlab.freedesktop.org/drm/intel/issues/58 [i915#671]: https://gitlab.freedesktop.org/drm/intel/issues/671 [i915#722]: https://gitlab.freedesktop.org/drm/intel/issues/722 [i915#723]: https://gitlab.freedesktop.org/drm/intel/issues/723 [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725 [i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816 [i915#858]: https://gitlab.freedesktop.org/drm/intel/issues/858 [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133 Participating hosts (53 -> 43) ------------------------------ Missing (10): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-bwr-2160 fi-ilk-650 fi-ctg-p8600 fi-byt-n2820 fi-byt-clapper fi-bdw-samus Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_7695 -> Patchwork_16016 CI-20190529: 20190529 CI_DRM_7695: 8df346a062d56d97ab53555d3f5829c26f950233 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5358: c6fc013f414b806175dc4143c58ab445e5235ea5 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_16016: 4bfa0a3eef65aee458743fa89b22c1d9c60777f3 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 4bfa0a3eef65 drm/i915: use new struct drm_device based macros. 9209ec64ba41 drm/i915: convert to using new struct drm_device logging macros ea6cb30e7a0c drm/i915: use new struct drm_device based logging macros. 1cae57305c57 drm/i915: use new struct drm_device logging macros. 9baa398403ea drm/i915: convert to using the drm_dbg_kms() macro. == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 42+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: conversion to new drm logging macros. 2020-01-07 15:13 ` Wambui Karuga ` (8 preceding siblings ...) (?) @ 2020-01-08 5:47 ` Patchwork -1 siblings, 0 replies; 42+ messages in thread From: Patchwork @ 2020-01-08 5:47 UTC (permalink / raw) To: Wambui Karuga; +Cc: intel-gfx == Series Details == Series: drm/i915: conversion to new drm logging macros. URL : https://patchwork.freedesktop.org/series/71698/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7695_full -> Patchwork_16016_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with Patchwork_16016_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_16016_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_16016_full: ### IGT changes ### #### Possible regressions #### * igt@gem_busy@close-race: - shard-hsw: [PASS][1] -> [TIMEOUT][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-hsw1/igt@gem_busy@close-race.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-hsw7/igt@gem_busy@close-race.html * igt@kms_plane@pixel-format-pipe-c-planes-source-clamping: - shard-tglb: [PASS][3] -> [INCOMPLETE][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-tglb2/igt@kms_plane@pixel-format-pipe-c-planes-source-clamping.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-tglb9/igt@kms_plane@pixel-format-pipe-c-planes-source-clamping.html Known issues ------------ Here are the changes found in Patchwork_16016_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_busy@busy-vcs1: - shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#112080]) +11 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-iclb2/igt@gem_busy@busy-vcs1.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-iclb3/igt@gem_busy@busy-vcs1.html * igt@gem_ctx_persistence@vcs1-mixed-process: - shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#109276] / [fdo#112080]) +3 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-iclb4/igt@gem_ctx_persistence@vcs1-mixed-process.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-iclb6/igt@gem_ctx_persistence@vcs1-mixed-process.html * igt@gem_exec_schedule@pi-distinct-iova-bsd: - shard-iclb: [PASS][9] -> [SKIP][10] ([i915#677]) +3 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-iclb5/igt@gem_exec_schedule@pi-distinct-iova-bsd.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-iclb2/igt@gem_exec_schedule@pi-distinct-iova-bsd.html * igt@gem_exec_schedule@preempt-other-chain-bsd: - shard-iclb: [PASS][11] -> [SKIP][12] ([fdo#112146]) +2 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-iclb7/igt@gem_exec_schedule@preempt-other-chain-bsd.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-iclb4/igt@gem_exec_schedule@preempt-other-chain-bsd.html * igt@gem_exec_schedule@smoketest-bsd1: - shard-tglb: [PASS][13] -> [INCOMPLETE][14] ([i915#463] / [i915#472]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-tglb2/igt@gem_exec_schedule@smoketest-bsd1.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-tglb9/igt@gem_exec_schedule@smoketest-bsd1.html * igt@gem_exec_schedule@smoketest-bsd2: - shard-tglb: [PASS][15] -> [INCOMPLETE][16] ([i915#472] / [i915#707]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-tglb4/igt@gem_exec_schedule@smoketest-bsd2.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-tglb3/igt@gem_exec_schedule@smoketest-bsd2.html * igt@gem_exec_suspend@basic-s3: - shard-tglb: [PASS][17] -> [INCOMPLETE][18] ([fdo#111736] / [i915#460] / [i915#472]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-tglb1/igt@gem_exec_suspend@basic-s3.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-tglb9/igt@gem_exec_suspend@basic-s3.html - shard-skl: [PASS][19] -> [INCOMPLETE][20] ([i915#69]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-skl1/igt@gem_exec_suspend@basic-s3.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-skl7/igt@gem_exec_suspend@basic-s3.html * igt@gem_persistent_relocs@forked-interruptible-thrash-inactive: - shard-snb: [PASS][21] -> [TIMEOUT][22] ([i915#530]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-snb4/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-snb4/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html * igt@gem_tiled_blits@normal: - shard-tglb: [PASS][23] -> [INCOMPLETE][24] ([i915#435]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-tglb7/igt@gem_tiled_blits@normal.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-tglb6/igt@gem_tiled_blits@normal.html * igt@kms_color@pipe-b-ctm-0-25: - shard-skl: [PASS][25] -> [DMESG-WARN][26] ([i915#109]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-skl10/igt@kms_color@pipe-b-ctm-0-25.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-skl3/igt@kms_color@pipe-b-ctm-0-25.html * igt@kms_cursor_crc@pipe-b-cursor-suspend: - shard-skl: [PASS][27] -> [INCOMPLETE][28] ([i915#300]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-skl9/igt@kms_cursor_crc@pipe-b-cursor-suspend.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-skl2/igt@kms_cursor_crc@pipe-b-cursor-suspend.html * igt@kms_psr@psr2_basic: - shard-iclb: [PASS][29] -> [SKIP][30] ([fdo#109441]) +1 similar issue [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-iclb2/igt@kms_psr@psr2_basic.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-iclb8/igt@kms_psr@psr2_basic.html * igt@kms_vblank@pipe-a-ts-continuation-suspend: - shard-kbl: [PASS][31] -> [DMESG-WARN][32] ([i915#180]) +4 similar issues [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-kbl3/igt@kms_vblank@pipe-a-ts-continuation-suspend.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-kbl2/igt@kms_vblank@pipe-a-ts-continuation-suspend.html * igt@kms_vblank@pipe-c-ts-continuation-suspend: - shard-apl: [PASS][33] -> [DMESG-WARN][34] ([i915#180]) +1 similar issue [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-apl3/igt@kms_vblank@pipe-c-ts-continuation-suspend.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-apl1/igt@kms_vblank@pipe-c-ts-continuation-suspend.html * igt@perf_pmu@cpu-hotplug: - shard-hsw: [PASS][35] -> [INCOMPLETE][36] ([i915#61]) [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-hsw7/igt@perf_pmu@cpu-hotplug.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-hsw4/igt@perf_pmu@cpu-hotplug.html * igt@perf_pmu@enable-race-vcs1: - shard-tglb: [PASS][37] -> [INCOMPLETE][38] ([i915#435] / [i915#472]) +1 similar issue [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-tglb6/igt@perf_pmu@enable-race-vcs1.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-tglb2/igt@perf_pmu@enable-race-vcs1.html * igt@perf_pmu@most-busy-idle-check-all-rcs0: - shard-tglb: [PASS][39] -> [INCOMPLETE][40] ([i915#472]) [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-tglb5/igt@perf_pmu@most-busy-idle-check-all-rcs0.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-tglb3/igt@perf_pmu@most-busy-idle-check-all-rcs0.html * igt@prime_busy@hang-bsd2: - shard-iclb: [PASS][41] -> [SKIP][42] ([fdo#109276]) +21 similar issues [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-iclb2/igt@prime_busy@hang-bsd2.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-iclb8/igt@prime_busy@hang-bsd2.html #### Possible fixes #### * igt@gem_blits@basic: - shard-kbl: [DMESG-WARN][43] ([i915#836]) -> [PASS][44] [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-kbl2/igt@gem_blits@basic.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-kbl2/igt@gem_blits@basic.html * igt@gem_ctx_isolation@rcs0-s3: - shard-kbl: [DMESG-WARN][45] ([i915#180]) -> [PASS][46] +8 similar issues [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-kbl1/igt@gem_ctx_isolation@rcs0-s3.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-kbl4/igt@gem_ctx_isolation@rcs0-s3.html * igt@gem_ctx_isolation@vcs1-dirty-create: - shard-iclb: [SKIP][47] ([fdo#109276] / [fdo#112080]) -> [PASS][48] +1 similar issue [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-iclb3/igt@gem_ctx_isolation@vcs1-dirty-create.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-iclb2/igt@gem_ctx_isolation@vcs1-dirty-create.html * igt@gem_eio@kms: - shard-tglb: [INCOMPLETE][49] ([i915#476]) -> [PASS][50] [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-tglb8/igt@gem_eio@kms.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-tglb5/igt@gem_eio@kms.html * igt@gem_exec_balancer@smoke: - shard-iclb: [SKIP][51] ([fdo#110854]) -> [PASS][52] [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-iclb7/igt@gem_exec_balancer@smoke.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-iclb2/igt@gem_exec_balancer@smoke.html * igt@gem_exec_nop@basic-parallel: - shard-tglb: [INCOMPLETE][53] ([i915#435] / [i915#472]) -> [PASS][54] [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-tglb1/igt@gem_exec_nop@basic-parallel.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-tglb5/igt@gem_exec_nop@basic-parallel.html * igt@gem_exec_parallel@basic: - shard-tglb: [INCOMPLETE][55] ([i915#472] / [i915#476]) -> [PASS][56] [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-tglb3/igt@gem_exec_parallel@basic.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-tglb5/igt@gem_exec_parallel@basic.html * igt@gem_exec_schedule@preempt-queue-contexts-chain-render: - shard-tglb: [INCOMPLETE][57] ([fdo#111677] / [i915#472]) -> [PASS][58] [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-tglb8/igt@gem_exec_schedule@preempt-queue-contexts-chain-render.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-tglb2/igt@gem_exec_schedule@preempt-queue-contexts-chain-render.html * igt@gem_exec_schedule@reorder-wide-bsd: - shard-iclb: [SKIP][59] ([fdo#112146]) -> [PASS][60] +10 similar issues [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-iclb4/igt@gem_exec_schedule@reorder-wide-bsd.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-iclb6/igt@gem_exec_schedule@reorder-wide-bsd.html * igt@gem_persistent_relocs@forked-faulting-reloc-thrashing: - shard-iclb: [TIMEOUT][61] ([i915#530]) -> [PASS][62] [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-iclb6/igt@gem_persistent_relocs@forked-faulting-reloc-thrashing.html [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-iclb4/igt@gem_persistent_relocs@forked-faulting-reloc-thrashing.html * igt@gem_persistent_relocs@forked-interruptible-thrashing: - shard-tglb: [TIMEOUT][63] ([fdo#112126] / [i915#530]) -> [PASS][64] [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-tglb7/igt@gem_persistent_relocs@forked-interruptible-thrashing.html [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-tglb7/igt@gem_persistent_relocs@forked-interruptible-thrashing.html * igt@gem_ppgtt@blt-vs-render-ctxn: - shard-tglb: [INCOMPLETE][65] ([i915#470]) -> [PASS][66] [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-tglb9/igt@gem_ppgtt@blt-vs-render-ctxn.html [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-tglb8/igt@gem_ppgtt@blt-vs-render-ctxn.html * igt@gem_ppgtt@flink-and-close-vma-leak: - shard-apl: [FAIL][67] ([i915#644]) -> [PASS][68] [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-apl4/igt@gem_ppgtt@flink-and-close-vma-leak.html [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-apl2/igt@gem_ppgtt@flink-and-close-vma-leak.html * igt@gem_sync@basic-each: - shard-tglb: [INCOMPLETE][69] ([i915#472] / [i915#707]) -> [PASS][70] +2 similar issues [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-tglb9/igt@gem_sync@basic-each.html [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-tglb1/igt@gem_sync@basic-each.html * igt@i915_selftest@live_hangcheck: - shard-tglb: [INCOMPLETE][71] ([i915#435]) -> [PASS][72] [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-tglb3/igt@i915_selftest@live_hangcheck.html [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-tglb8/igt@i915_selftest@live_hangcheck.html * igt@i915_suspend@fence-restore-untiled: - shard-apl: [DMESG-WARN][73] ([i915#180]) -> [PASS][74] +2 similar issues [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-apl6/igt@i915_suspend@fence-restore-untiled.html [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-apl2/igt@i915_suspend@fence-restore-untiled.html * igt@kms_cursor_crc@pipe-a-cursor-256x256-sliding: - shard-skl: [FAIL][75] ([i915#54]) -> [PASS][76] +1 similar issue [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-skl8/igt@kms_cursor_crc@pipe-a-cursor-256x256-sliding.html [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-skl5/igt@kms_cursor_crc@pipe-a-cursor-256x256-sliding.html * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy: - shard-glk: [FAIL][77] ([i915#72]) -> [PASS][78] [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-glk5/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-glk1/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html * igt@kms_fbcon_fbt@psr-suspend: - shard-skl: [DMESG-WARN][79] ([i915#109]) -> [PASS][80] [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-skl6/igt@kms_fbcon_fbt@psr-suspend.html [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-skl10/igt@kms_fbcon_fbt@psr-suspend.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt: - shard-tglb: [FAIL][81] ([i915#49]) -> [PASS][82] [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-tglb8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt.html [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-tglb6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt.html * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: - shard-skl: [FAIL][83] ([fdo#108145] / [i915#265]) -> [PASS][84] [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-skl5/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html * igt@kms_psr@psr2_no_drrs: - shard-iclb: [SKIP][85] ([fdo#109441]) -> [PASS][86] +2 similar issues [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-iclb6/igt@kms_psr@psr2_no_drrs.html [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-iclb2/igt@kms_psr@psr2_no_drrs.html * igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend: - shard-skl: [INCOMPLETE][87] ([i915#69]) -> [PASS][88] [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-skl9/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-skl3/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html * igt@perf_pmu@busy-check-all-vcs1: - shard-iclb: [SKIP][89] ([fdo#112080]) -> [PASS][90] +13 similar issues [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-iclb5/igt@perf_pmu@busy-check-all-vcs1.html [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-iclb2/igt@perf_pmu@busy-check-all-vcs1.html * igt@prime_vgem@fence-wait-bsd2: - shard-iclb: [SKIP][91] ([fdo#109276]) -> [PASS][92] +31 similar issues [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-iclb3/igt@prime_vgem@fence-wait-bsd2.html [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-iclb2/igt@prime_vgem@fence-wait-bsd2.html #### Warnings #### * igt@gem_ctx_isolation@vcs1-nonpriv-switch: - shard-iclb: [SKIP][93] ([fdo#109276] / [fdo#112080]) -> [FAIL][94] ([IGT#28]) [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-iclb8/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-iclb4/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html * igt@gem_tiled_blits@normal: - shard-hsw: [FAIL][95] ([i915#818]) -> [FAIL][96] ([i915#694]) [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-hsw7/igt@gem_tiled_blits@normal.html [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-hsw2/igt@gem_tiled_blits@normal.html * igt@i915_selftest@live_blt: - shard-hsw: [DMESG-FAIL][97] ([i915#725]) -> [DMESG-FAIL][98] ([i915#553] / [i915#725]) [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7695/shard-hsw8/igt@i915_selftest@live_blt.html [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/shard-hsw5/igt@i915_selftest@live_blt.html [IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854 [fdo#111677]: https://bugs.freedesktop.org/show_bug.cgi?id=111677 [fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736 [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080 [fdo#112126]: https://bugs.freedesktop.org/show_bug.cgi?id=112126 [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146 [i915#109]: https://gitlab.freedesktop.org/drm/intel/issues/109 [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265 [i915#300]: https://gitlab.freedesktop.org/drm/intel/issues/300 [i915#435]: https://gitlab.freedesktop.org/drm/intel/issues/435 [i915#460]: https://gitlab.freedesktop.org/drm/intel/issues/460 [i915#463]: https://gitlab.freedesktop.org/drm/intel/issues/463 [i915#470]: https://gitlab.freedesktop.org/drm/intel/issues/470 [i915#472]: https://gitlab.freedesktop.org/drm/intel/issues/472 [i915#476]: https://gitlab.freedesktop.org/drm/intel/issues/476 [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49 [i915#530]: https://gitlab.freedesktop.org/drm/intel/issues/530 [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54 [i915#553]: https://gitlab.freedesktop.org/drm/intel/issues/553 [i915#61]: https://gitlab.freedesktop.org/drm/intel/issues/61 [i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644 [i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677 [i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69 [i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694 [i915#707]: https://gitlab.freedesktop.org/drm/intel/issues/707 [i915#72]: https://gitlab.freedesktop.org/drm/intel/issues/72 [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725 [i915#818]: https://gitlab.freedesktop.org/drm/intel/issues/818 [i915#836]: https://gitlab.freedesktop.org/drm/intel/issues/836 Participating hosts (11 -> 11) ------------------------------ No changes in participating hosts Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_7695 -> Patchwork_16016 CI-20190529: 20190529 CI_DRM_7695: 8df346a062d56d97ab53555d3f5829c26f950233 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5358: c6fc013f414b806175dc4143c58ab445e5235ea5 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_16016: 4bfa0a3eef65aee458743fa89b22c1d9c60777f3 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16016/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH 0/5] drm/i915: conversion to new drm logging macros. 2020-01-07 15:13 ` Wambui Karuga (?) @ 2020-01-10 14:17 ` Jani Nikula -1 siblings, 0 replies; 42+ messages in thread From: Jani Nikula @ 2020-01-10 14:17 UTC (permalink / raw) To: Wambui Karuga, joonas.lahtinen, rodrigo.vivi, airlied, daniel Cc: seanpaul, intel-gfx, dri-devel, linux-kernel On Tue, 07 Jan 2020, Wambui Karuga <wambui.karugax@gmail.com> wrote: > This series begins the conversion to using the new struct drm_device > based logging macros in drm/i915. > > Wambui Karuga (5): > drm/i915: convert to using the drm_dbg_kms() macro. > drm/i915: use new struct drm_device logging macros. > drm/i915: use new struct drm_device based logging macros. > drm/i915: convert to using new struct drm_device logging macros > drm/i915: use new struct drm_device based macros. Thanks for the patches, pushed to drm-intel-next-queued. As it's impossible to distinguish the commits from each other by the subject line alone, I've amended the prefix while pushing as follows: drm/i915/pch: convert to using the drm_dbg_kms() macro. drm/i915/pm: use new struct drm_device logging macros. drm/i915/lmem: use new struct drm_device based logging macros. drm/i915/sideband: convert to using new struct drm_device logging macros drm/i915/uncore: use new struct drm_device based macros. Please pay attention to this in future work. It's not always obvious what the prefix should be, but 'git log -- path/to/file.c' will go a long way. BR, Jani. > > drivers/gpu/drm/i915/intel_pch.c | 46 +-- > drivers/gpu/drm/i915/intel_pm.c | 351 +++++++++++++---------- > drivers/gpu/drm/i915/intel_region_lmem.c | 10 +- > drivers/gpu/drm/i915/intel_sideband.c | 29 +- > drivers/gpu/drm/i915/intel_uncore.c | 25 +- > 5 files changed, 254 insertions(+), 207 deletions(-) -- Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Intel-gfx] [PATCH 0/5] drm/i915: conversion to new drm logging macros. @ 2020-01-10 14:17 ` Jani Nikula 0 siblings, 0 replies; 42+ messages in thread From: Jani Nikula @ 2020-01-10 14:17 UTC (permalink / raw) To: Wambui Karuga, joonas.lahtinen, rodrigo.vivi, airlied, daniel Cc: intel-gfx, seanpaul, linux-kernel, dri-devel On Tue, 07 Jan 2020, Wambui Karuga <wambui.karugax@gmail.com> wrote: > This series begins the conversion to using the new struct drm_device > based logging macros in drm/i915. > > Wambui Karuga (5): > drm/i915: convert to using the drm_dbg_kms() macro. > drm/i915: use new struct drm_device logging macros. > drm/i915: use new struct drm_device based logging macros. > drm/i915: convert to using new struct drm_device logging macros > drm/i915: use new struct drm_device based macros. Thanks for the patches, pushed to drm-intel-next-queued. As it's impossible to distinguish the commits from each other by the subject line alone, I've amended the prefix while pushing as follows: drm/i915/pch: convert to using the drm_dbg_kms() macro. drm/i915/pm: use new struct drm_device logging macros. drm/i915/lmem: use new struct drm_device based logging macros. drm/i915/sideband: convert to using new struct drm_device logging macros drm/i915/uncore: use new struct drm_device based macros. Please pay attention to this in future work. It's not always obvious what the prefix should be, but 'git log -- path/to/file.c' will go a long way. BR, Jani. > > drivers/gpu/drm/i915/intel_pch.c | 46 +-- > drivers/gpu/drm/i915/intel_pm.c | 351 +++++++++++++---------- > drivers/gpu/drm/i915/intel_region_lmem.c | 10 +- > drivers/gpu/drm/i915/intel_sideband.c | 29 +- > drivers/gpu/drm/i915/intel_uncore.c | 25 +- > 5 files changed, 254 insertions(+), 207 deletions(-) -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH 0/5] drm/i915: conversion to new drm logging macros. @ 2020-01-10 14:17 ` Jani Nikula 0 siblings, 0 replies; 42+ messages in thread From: Jani Nikula @ 2020-01-10 14:17 UTC (permalink / raw) To: Wambui Karuga, joonas.lahtinen, rodrigo.vivi, airlied, daniel Cc: intel-gfx, seanpaul, linux-kernel, dri-devel On Tue, 07 Jan 2020, Wambui Karuga <wambui.karugax@gmail.com> wrote: > This series begins the conversion to using the new struct drm_device > based logging macros in drm/i915. > > Wambui Karuga (5): > drm/i915: convert to using the drm_dbg_kms() macro. > drm/i915: use new struct drm_device logging macros. > drm/i915: use new struct drm_device based logging macros. > drm/i915: convert to using new struct drm_device logging macros > drm/i915: use new struct drm_device based macros. Thanks for the patches, pushed to drm-intel-next-queued. As it's impossible to distinguish the commits from each other by the subject line alone, I've amended the prefix while pushing as follows: drm/i915/pch: convert to using the drm_dbg_kms() macro. drm/i915/pm: use new struct drm_device logging macros. drm/i915/lmem: use new struct drm_device based logging macros. drm/i915/sideband: convert to using new struct drm_device logging macros drm/i915/uncore: use new struct drm_device based macros. Please pay attention to this in future work. It's not always obvious what the prefix should be, but 'git log -- path/to/file.c' will go a long way. BR, Jani. > > drivers/gpu/drm/i915/intel_pch.c | 46 +-- > drivers/gpu/drm/i915/intel_pm.c | 351 +++++++++++++---------- > drivers/gpu/drm/i915/intel_region_lmem.c | 10 +- > drivers/gpu/drm/i915/intel_sideband.c | 29 +- > drivers/gpu/drm/i915/intel_uncore.c | 25 +- > 5 files changed, 254 insertions(+), 207 deletions(-) -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH 0/5] drm/i915: conversion to new drm logging macros. 2020-01-10 14:17 ` Jani Nikula (?) @ 2020-01-10 17:44 ` Wambui Karuga -1 siblings, 0 replies; 42+ messages in thread From: Wambui Karuga @ 2020-01-10 17:44 UTC (permalink / raw) To: Jani Nikula Cc: Wambui Karuga, joonas.lahtinen, rodrigo.vivi, airlied, daniel, seanpaul, intel-gfx, dri-devel, linux-kernel On Fri, 10 Jan 2020, Jani Nikula wrote: > On Tue, 07 Jan 2020, Wambui Karuga <wambui.karugax@gmail.com> wrote: >> This series begins the conversion to using the new struct drm_device >> based logging macros in drm/i915. >> >> Wambui Karuga (5): >> drm/i915: convert to using the drm_dbg_kms() macro. >> drm/i915: use new struct drm_device logging macros. >> drm/i915: use new struct drm_device based logging macros. >> drm/i915: convert to using new struct drm_device logging macros >> drm/i915: use new struct drm_device based macros. > > Thanks for the patches, pushed to drm-intel-next-queued. > > As it's impossible to distinguish the commits from each other by the > subject line alone, I've amended the prefix while pushing as follows: > > drm/i915/pch: convert to using the drm_dbg_kms() macro. > drm/i915/pm: use new struct drm_device logging macros. > drm/i915/lmem: use new struct drm_device based logging macros. > drm/i915/sideband: convert to using new struct drm_device logging macros > drm/i915/uncore: use new struct drm_device based macros. > > Please pay attention to this in future work. It's not always obvious > what the prefix should be, but 'git log -- path/to/file.c' will go a > long way. > Sure, I'll do that from now on. Thanks. > BR, > Jani. > > >> >> drivers/gpu/drm/i915/intel_pch.c | 46 +-- >> drivers/gpu/drm/i915/intel_pm.c | 351 +++++++++++++---------- >> drivers/gpu/drm/i915/intel_region_lmem.c | 10 +- >> drivers/gpu/drm/i915/intel_sideband.c | 29 +- >> drivers/gpu/drm/i915/intel_uncore.c | 25 +- >> 5 files changed, 254 insertions(+), 207 deletions(-) > > -- > Jani Nikula, Intel Open Source Graphics Center > ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Intel-gfx] [PATCH 0/5] drm/i915: conversion to new drm logging macros. @ 2020-01-10 17:44 ` Wambui Karuga 0 siblings, 0 replies; 42+ messages in thread From: Wambui Karuga @ 2020-01-10 17:44 UTC (permalink / raw) To: Jani Nikula Cc: airlied, intel-gfx, linux-kernel, dri-devel, seanpaul, Wambui Karuga On Fri, 10 Jan 2020, Jani Nikula wrote: > On Tue, 07 Jan 2020, Wambui Karuga <wambui.karugax@gmail.com> wrote: >> This series begins the conversion to using the new struct drm_device >> based logging macros in drm/i915. >> >> Wambui Karuga (5): >> drm/i915: convert to using the drm_dbg_kms() macro. >> drm/i915: use new struct drm_device logging macros. >> drm/i915: use new struct drm_device based logging macros. >> drm/i915: convert to using new struct drm_device logging macros >> drm/i915: use new struct drm_device based macros. > > Thanks for the patches, pushed to drm-intel-next-queued. > > As it's impossible to distinguish the commits from each other by the > subject line alone, I've amended the prefix while pushing as follows: > > drm/i915/pch: convert to using the drm_dbg_kms() macro. > drm/i915/pm: use new struct drm_device logging macros. > drm/i915/lmem: use new struct drm_device based logging macros. > drm/i915/sideband: convert to using new struct drm_device logging macros > drm/i915/uncore: use new struct drm_device based macros. > > Please pay attention to this in future work. It's not always obvious > what the prefix should be, but 'git log -- path/to/file.c' will go a > long way. > Sure, I'll do that from now on. Thanks. > BR, > Jani. > > >> >> drivers/gpu/drm/i915/intel_pch.c | 46 +-- >> drivers/gpu/drm/i915/intel_pm.c | 351 +++++++++++++---------- >> drivers/gpu/drm/i915/intel_region_lmem.c | 10 +- >> drivers/gpu/drm/i915/intel_sideband.c | 29 +- >> drivers/gpu/drm/i915/intel_uncore.c | 25 +- >> 5 files changed, 254 insertions(+), 207 deletions(-) > > -- > Jani Nikula, Intel Open Source Graphics Center > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH 0/5] drm/i915: conversion to new drm logging macros. @ 2020-01-10 17:44 ` Wambui Karuga 0 siblings, 0 replies; 42+ messages in thread From: Wambui Karuga @ 2020-01-10 17:44 UTC (permalink / raw) To: Jani Nikula Cc: airlied, intel-gfx, linux-kernel, dri-devel, seanpaul, rodrigo.vivi, Wambui Karuga On Fri, 10 Jan 2020, Jani Nikula wrote: > On Tue, 07 Jan 2020, Wambui Karuga <wambui.karugax@gmail.com> wrote: >> This series begins the conversion to using the new struct drm_device >> based logging macros in drm/i915. >> >> Wambui Karuga (5): >> drm/i915: convert to using the drm_dbg_kms() macro. >> drm/i915: use new struct drm_device logging macros. >> drm/i915: use new struct drm_device based logging macros. >> drm/i915: convert to using new struct drm_device logging macros >> drm/i915: use new struct drm_device based macros. > > Thanks for the patches, pushed to drm-intel-next-queued. > > As it's impossible to distinguish the commits from each other by the > subject line alone, I've amended the prefix while pushing as follows: > > drm/i915/pch: convert to using the drm_dbg_kms() macro. > drm/i915/pm: use new struct drm_device logging macros. > drm/i915/lmem: use new struct drm_device based logging macros. > drm/i915/sideband: convert to using new struct drm_device logging macros > drm/i915/uncore: use new struct drm_device based macros. > > Please pay attention to this in future work. It's not always obvious > what the prefix should be, but 'git log -- path/to/file.c' will go a > long way. > Sure, I'll do that from now on. Thanks. > BR, > Jani. > > >> >> drivers/gpu/drm/i915/intel_pch.c | 46 +-- >> drivers/gpu/drm/i915/intel_pm.c | 351 +++++++++++++---------- >> drivers/gpu/drm/i915/intel_region_lmem.c | 10 +- >> drivers/gpu/drm/i915/intel_sideband.c | 29 +- >> drivers/gpu/drm/i915/intel_uncore.c | 25 +- >> 5 files changed, 254 insertions(+), 207 deletions(-) > > -- > Jani Nikula, Intel Open Source Graphics Center > _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 42+ messages in thread
end of thread, other threads:[~2020-01-12 12:37 UTC | newest] Thread overview: 42+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2020-01-07 15:13 [PATCH 0/5] drm/i915: conversion to new drm logging macros Wambui Karuga 2020-01-07 15:13 ` [Intel-gfx] " Wambui Karuga 2020-01-07 15:13 ` Wambui Karuga 2020-01-07 15:13 ` [PATCH 1/5] drm/i915: convert to using the drm_dbg_kms() macro Wambui Karuga 2020-01-07 15:13 ` [Intel-gfx] " Wambui Karuga 2020-01-07 15:13 ` Wambui Karuga 2020-01-08 8:26 ` Joonas Lahtinen 2020-01-08 8:26 ` [Intel-gfx] " Joonas Lahtinen 2020-01-08 8:26 ` Joonas Lahtinen 2020-01-08 9:40 ` Jani Nikula 2020-01-08 9:40 ` [Intel-gfx] " Jani Nikula 2020-01-08 9:40 ` Jani Nikula 2020-01-08 10:44 ` [Intel-gfx] " Chris Wilson 2020-01-08 10:44 ` Chris Wilson 2020-01-08 10:44 ` Chris Wilson 2020-01-08 14:44 ` Jani Nikula 2020-01-08 14:44 ` Jani Nikula 2020-01-08 14:44 ` Jani Nikula 2020-01-08 14:53 ` Chris Wilson 2020-01-08 14:53 ` Chris Wilson 2020-01-08 14:53 ` Chris Wilson 2020-01-07 15:13 ` [PATCH 2/5] drm/i915: use new struct drm_device logging macros Wambui Karuga 2020-01-07 15:13 ` [Intel-gfx] " Wambui Karuga 2020-01-07 15:13 ` Wambui Karuga 2020-01-07 15:13 ` [PATCH 3/5] drm/i915: use new struct drm_device based " Wambui Karuga 2020-01-07 15:13 ` [Intel-gfx] " Wambui Karuga 2020-01-07 15:13 ` Wambui Karuga 2020-01-07 15:13 ` [PATCH 4/5] drm/i915: convert to using new struct drm_device " Wambui Karuga 2020-01-07 15:13 ` [Intel-gfx] " Wambui Karuga 2020-01-07 15:13 ` Wambui Karuga 2020-01-07 15:13 ` [PATCH 5/5] drm/i915: use new struct drm_device based macros Wambui Karuga 2020-01-07 15:13 ` [Intel-gfx] " Wambui Karuga 2020-01-07 15:13 ` Wambui Karuga 2020-01-07 19:08 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: conversion to new drm logging macros Patchwork 2020-01-07 20:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2020-01-08 5:47 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork 2020-01-10 14:17 ` [PATCH 0/5] " Jani Nikula 2020-01-10 14:17 ` [Intel-gfx] " Jani Nikula 2020-01-10 14:17 ` Jani Nikula 2020-01-10 17:44 ` Wambui Karuga 2020-01-10 17:44 ` [Intel-gfx] " Wambui Karuga 2020-01-10 17:44 ` Wambui Karuga
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