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* [Intel-gfx] [PATCH v2] drm/i915/tgl: Add Wa_1409825376 to tgl
@ 2020-01-09 22:37 Radhakrishna Sripada
  2020-01-10  1:21 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tgl: Add Wa_1409825376 to tgl (rev2) Patchwork
                   ` (9 more replies)
  0 siblings, 10 replies; 12+ messages in thread
From: Radhakrishna Sripada @ 2020-01-09 22:37 UTC (permalink / raw)
  To: intel-gfx

Workaround database indicates we should disable VRH clockgating
in pre-production hardware.

V2:
 - Use REG_BIT macro
 - Update reference in commit message(Matt)

Bspec: 52890
Bspec: 49424
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 3 +++
 drivers/gpu/drm/i915/intel_pm.c | 5 +++++
 2 files changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 6cc55c103f67..a023166ca7b9 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4124,6 +4124,9 @@ enum {
 #define   PWM2_GATING_DIS		(1 << 14)
 #define   PWM1_GATING_DIS		(1 << 13)
 
+#define GEN9_CLKGATE_DIS_3		_MMIO(0x46538)
+#define   TGL_VRH_GATING_DIS		REG_BIT(31)
+
 #define GEN9_CLKGATE_DIS_4		_MMIO(0x4653C)
 #define   BXT_GMBUS_GATING_DIS		(1 << 14)
 
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 148ac455dfa7..0d71fc19d0ee 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6630,6 +6630,11 @@ static void tgl_init_clock_gating(struct drm_i915_private *dev_priv)
 
 	I915_WRITE(POWERGATE_ENABLE,
 		   I915_READ(POWERGATE_ENABLE) | vd_pg_enable);
+
+	/* Wa_1409825376:tgl (pre-prod)*/
+	if (IS_TGL_REVID(dev_priv, TGL_REVID_A0, TGL_REVID_A0))
+		I915_WRITE(GEN9_CLKGATE_DIS_3, I915_READ(GEN9_CLKGATE_DIS_3) |
+			   TGL_VRH_GATING_DIS);
 }
 
 static void cnp_init_clock_gating(struct drm_i915_private *dev_priv)
-- 
2.20.1

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^ permalink raw reply related	[flat|nested] 12+ messages in thread

end of thread, other threads:[~2020-01-17  1:09 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-01-09 22:37 [Intel-gfx] [PATCH v2] drm/i915/tgl: Add Wa_1409825376 to tgl Radhakrishna Sripada
2020-01-10  1:21 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tgl: Add Wa_1409825376 to tgl (rev2) Patchwork
2020-01-13 17:36 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tgl: Add Wa_1409825376 to tgl (rev3) Patchwork
2020-01-13 17:36 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
2020-01-14  1:08 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/tgl: Add Wa_1409825376 to tgl (rev4) Patchwork
2020-01-14  1:08 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
2020-01-14 20:44 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tgl: Add Wa_1409825376 to tgl (rev5) Patchwork
2020-01-14 20:44 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
2020-01-15  9:35 ` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/tgl: Add Wa_1409825376 to tgl (rev2) Patchwork
2020-01-15 16:34   ` Matt Roper
2020-01-15 17:14 ` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/tgl: Add Wa_1409825376 to tgl (rev3) Patchwork
2020-01-17  1:09 ` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/tgl: Add Wa_1409825376 to tgl (rev5) Patchwork

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