* [Intel-gfx] [PATCH i-g-t] test/i915_pm_rc6_residency: Check we enter RC6 when mostly idle
@ 2020-01-09 22:23 ` Chris Wilson
0 siblings, 0 replies; 9+ messages in thread
From: Chris Wilson @ 2020-01-09 22:23 UTC (permalink / raw)
To: intel-gfx; +Cc: igt-dev
Long ago, we would only approach runtime-suspend if the GPU had been
idle (no userspace submissions) for a second or two. However, since
disabling automatic HW RC6 such a relaxed approach to runtime-suspend
caused us to never enter RC6 on the desktop and consume vast quantities
of power. Surmise this behaviour by setting up a background load that is
only active for ~1% of the time (so equivalent to a compositor that is
updating the clock every 50ms or so) and verify that we do continue to
enter RC6 between the GPU pulses.
References: https://gitlab.freedesktop.org/drm/intel/issues/614
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
tests/Makefile.am | 1 +
tests/i915/i915_pm_rc6_residency.c | 174 +++++++++++++++++++++++++++--
tests/meson.build | 9 +-
3 files changed, 173 insertions(+), 11 deletions(-)
diff --git a/tests/Makefile.am b/tests/Makefile.am
index 9a320bc23..fc3052475 100644
--- a/tests/Makefile.am
+++ b/tests/Makefile.am
@@ -122,6 +122,7 @@ gem_threaded_access_tiled_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
gem_threaded_access_tiled_LDADD = $(LDADD) -lpthread
gem_tiled_swapping_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
gem_tiled_swapping_LDADD = $(LDADD) -lpthread
+i915_pm_rc6_residency_LDADD = $(LDADD) $(top_builddir)/lib/libigt_perf.la
prime_self_import_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
prime_self_import_LDADD = $(LDADD) -lpthread
gem_userptr_blits_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
diff --git a/tests/i915/i915_pm_rc6_residency.c b/tests/i915/i915_pm_rc6_residency.c
index 1b39c870e..a5bcb084b 100644
--- a/tests/i915/i915_pm_rc6_residency.c
+++ b/tests/i915/i915_pm_rc6_residency.c
@@ -25,8 +25,6 @@
*
*/
-#include "igt.h"
-#include "igt_sysfs.h"
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
@@ -34,6 +32,9 @@
#include <errno.h>
#include <time.h>
+#include "igt.h"
+#include "igt_perf.h"
+#include "igt_sysfs.h"
#define SLEEP_DURATION 3 /* in seconds */
@@ -195,31 +196,180 @@ static bool wait_for_rc6(void)
return false;
}
+static uint64_t __pmu_read_single(int fd, uint64_t *ts)
+{
+ uint64_t data[2];
+
+ igt_assert_eq(read(fd, data, sizeof(data)), sizeof(data));
+
+ if (ts)
+ *ts = data[1];
+
+ return data[0];
+}
+
+static uint64_t pmu_read_single(int fd)
+{
+ return __pmu_read_single(fd, NULL);
+}
+
+#define __assert_within_epsilon(x, ref, tol_up, tol_down) \
+ igt_assert_f((double)(x) <= (1.0 + (tol_up)) * (double)(ref) && \
+ (double)(x) >= (1.0 - (tol_down)) * (double)(ref), \
+ "'%s' != '%s' (%f not within +%.1f%%/-%.1f%% tolerance of %f)\n",\
+ #x, #ref, (double)(x), \
+ (tol_up) * 100.0, (tol_down) * 100.0, \
+ (double)(ref))
+
+#define assert_within_epsilon(x, ref, tolerance) \
+ __assert_within_epsilon(x, ref, tolerance, tolerance)
+
+static bool __pmu_wait_for_rc6(int fd)
+{
+ struct timespec tv = {};
+ uint64_t start, now;
+
+ /* First wait for roughly an RC6 Evaluation Interval */
+ usleep(160 * 1000);
+
+ /* Then poll for RC6 to start ticking */
+ now = pmu_read_single(fd);
+ do {
+ start = now;
+ usleep(5000);
+ now = pmu_read_single(fd);
+ if (now - start > 1e6)
+ return true;
+ } while (!igt_seconds_elapsed(&tv));
+
+ return false;
+}
+
+static unsigned int measured_usleep(unsigned int usec)
+{
+ struct timespec ts = { };
+ unsigned int slept;
+
+ slept = igt_nsec_elapsed(&ts);
+ igt_assert(slept == 0);
+ do {
+ usleep(usec - slept);
+ slept = igt_nsec_elapsed(&ts) / 1000;
+ } while (slept < usec);
+
+ return igt_nsec_elapsed(&ts);
+}
+
+static uint32_t batch_create(int fd)
+{
+ const uint32_t bbe = MI_BATCH_BUFFER_END;
+ uint32_t handle;
+
+ handle = gem_create(fd, 4096);
+ gem_write(fd, handle, 0, &bbe, sizeof(bbe));
+
+ return handle;
+}
+
+static int open_pmu(int i915, uint64_t config)
+{
+ int fd;
+
+ fd = perf_i915_open(config);
+ igt_skip_on(fd < 0 && errno == ENODEV);
+ igt_assert(fd >= 0);
+
+ return fd;
+}
+
+static void rc6_perf(int i915)
+{
+ const int64_t duration_ns = 2e9;
+ uint64_t idle, prev, ts[2];
+ unsigned long slept, cycles;
+ unsigned long *done;
+ int fd;
+
+ fd = open_pmu(i915, I915_PMU_RC6_RESIDENCY);
+ igt_require(__pmu_wait_for_rc6(fd));
+
+ /* While idle check full RC6. */
+ prev = __pmu_read_single(fd, &ts[0]);
+ slept = measured_usleep(duration_ns / 1000);
+ idle = __pmu_read_single(fd, &ts[1]);
+ igt_debug("slept=%lu perf=%"PRIu64"\n", slept, ts[1] - ts[0]);
+ assert_within_epsilon(idle - prev, ts[1] - ts[0], 5);
+
+ /* Setup up a very light load */
+ done = mmap(0, 4096, PROT_WRITE, MAP_SHARED | MAP_ANON, -1, 0);
+ igt_fork(child, 1) {
+ struct drm_i915_gem_exec_object2 obj = {
+ .handle = batch_create(i915),
+ };
+ struct drm_i915_gem_execbuffer2 execbuf = {
+ .buffers_ptr = to_user_pointer(&obj),
+ .buffer_count = 1,
+ };
+
+ do {
+ struct timespec tv = {};
+
+ igt_seconds_elapsed(&tv);
+
+ gem_execbuf(i915, &execbuf);
+ gem_sync(i915, obj.handle);
+ done[1]++;
+
+ usleep(igt_seconds_elapsed(&tv) / 10); /* => 1% busy */
+ } while (!*done);
+ }
+
+ /* While very nearly idle (idle to within tolerance), except full RC6 */
+ cycles = -done[1];
+ prev = __pmu_read_single(fd, &ts[0]);
+ slept = measured_usleep(duration_ns / 1000);
+ idle = __pmu_read_single(fd, &ts[1]);
+ cycles += done[1];
+ igt_debug("slept=%lu perf=%"PRIu64", cycles=%lu\n",
+ slept, ts[1] - ts[0], cycles);
+ igt_assert(cycles > 0);
+ assert_within_epsilon(idle - prev, ts[1] - ts[0], 5);
+
+ close(fd);
+
+ *done = 1;
+ igt_waitchildren();
+}
+
igt_main
{
unsigned int rc6_enabled = 0;
unsigned int devid = 0;
+ int i915 = -1;
/* Use drm_open_driver to verify device existence */
igt_fixture {
- int fd;
-
- fd = drm_open_driver(DRIVER_INTEL);
- devid = intel_get_drm_devid(fd);
- sysfs = igt_sysfs_open(fd);
+ i915 = drm_open_driver(DRIVER_INTEL);
+ devid = intel_get_drm_devid(i915);
+ sysfs = igt_sysfs_open(i915);
igt_require(has_rc6_residency("rc6"));
/* Make sure rc6 counters are running */
- igt_drop_caches_set(fd, DROP_IDLE);
+ igt_drop_caches_set(i915, DROP_IDLE);
igt_require(wait_for_rc6());
- close(fd);
-
rc6_enabled = get_rc6_enabled_mask();
igt_require(rc6_enabled & RC6_ENABLED);
}
+ igt_subtest("rc6-perf") {
+ igt_require_gem(i915);
+ gem_quiescent_gpu(i915);
+
+ rc6_perf(i915);
+ }
+
igt_subtest("rc6-accuracy") {
struct residencies res;
@@ -235,4 +385,8 @@ igt_main
measure_residencies(devid, rc6_enabled, &res);
residency_accuracy(res.media_rc6, res.duration, "media_rc6");
}
+
+ igt_fixture
+ close(i915);
+
}
diff --git a/tests/meson.build b/tests/meson.build
index 570de5459..a79d22ba1 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -232,7 +232,6 @@ i915_progs = [
'i915_module_load',
'i915_pm_backlight',
'i915_pm_lpsp',
- 'i915_pm_rc6_residency',
'i915_pm_rpm',
'i915_pm_dc',
'i915_pm_rps',
@@ -336,6 +335,14 @@ test_executables += executable('gem_mmap_offset',
install : true)
test_list += 'gem_mmap_offset'
+test_executables += executable('i915_pm_rc6_residency',
+ join_paths('i915', 'i915_pm_rc6_residency.c'),
+ dependencies : test_deps + [ lib_igt_perf ],
+ install_dir : libexecdir,
+ install_rpath : libexecdir_rpathdir,
+ install : true)
+test_list += 'i915_pm_rc6_residency'
+
test_executables += executable('perf_pmu', 'perf_pmu.c',
dependencies : test_deps + [ lib_igt_perf ],
install_dir : libexecdir,
--
2.25.0.rc2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [igt-dev] [PATCH i-g-t] test/i915_pm_rc6_residency: Check we enter RC6 when mostly idle
@ 2020-01-09 22:23 ` Chris Wilson
0 siblings, 0 replies; 9+ messages in thread
From: Chris Wilson @ 2020-01-09 22:23 UTC (permalink / raw)
To: intel-gfx; +Cc: igt-dev, Tvrtko Ursulin
Long ago, we would only approach runtime-suspend if the GPU had been
idle (no userspace submissions) for a second or two. However, since
disabling automatic HW RC6 such a relaxed approach to runtime-suspend
caused us to never enter RC6 on the desktop and consume vast quantities
of power. Surmise this behaviour by setting up a background load that is
only active for ~1% of the time (so equivalent to a compositor that is
updating the clock every 50ms or so) and verify that we do continue to
enter RC6 between the GPU pulses.
References: https://gitlab.freedesktop.org/drm/intel/issues/614
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
tests/Makefile.am | 1 +
tests/i915/i915_pm_rc6_residency.c | 174 +++++++++++++++++++++++++++--
tests/meson.build | 9 +-
3 files changed, 173 insertions(+), 11 deletions(-)
diff --git a/tests/Makefile.am b/tests/Makefile.am
index 9a320bc23..fc3052475 100644
--- a/tests/Makefile.am
+++ b/tests/Makefile.am
@@ -122,6 +122,7 @@ gem_threaded_access_tiled_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
gem_threaded_access_tiled_LDADD = $(LDADD) -lpthread
gem_tiled_swapping_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
gem_tiled_swapping_LDADD = $(LDADD) -lpthread
+i915_pm_rc6_residency_LDADD = $(LDADD) $(top_builddir)/lib/libigt_perf.la
prime_self_import_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
prime_self_import_LDADD = $(LDADD) -lpthread
gem_userptr_blits_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
diff --git a/tests/i915/i915_pm_rc6_residency.c b/tests/i915/i915_pm_rc6_residency.c
index 1b39c870e..a5bcb084b 100644
--- a/tests/i915/i915_pm_rc6_residency.c
+++ b/tests/i915/i915_pm_rc6_residency.c
@@ -25,8 +25,6 @@
*
*/
-#include "igt.h"
-#include "igt_sysfs.h"
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
@@ -34,6 +32,9 @@
#include <errno.h>
#include <time.h>
+#include "igt.h"
+#include "igt_perf.h"
+#include "igt_sysfs.h"
#define SLEEP_DURATION 3 /* in seconds */
@@ -195,31 +196,180 @@ static bool wait_for_rc6(void)
return false;
}
+static uint64_t __pmu_read_single(int fd, uint64_t *ts)
+{
+ uint64_t data[2];
+
+ igt_assert_eq(read(fd, data, sizeof(data)), sizeof(data));
+
+ if (ts)
+ *ts = data[1];
+
+ return data[0];
+}
+
+static uint64_t pmu_read_single(int fd)
+{
+ return __pmu_read_single(fd, NULL);
+}
+
+#define __assert_within_epsilon(x, ref, tol_up, tol_down) \
+ igt_assert_f((double)(x) <= (1.0 + (tol_up)) * (double)(ref) && \
+ (double)(x) >= (1.0 - (tol_down)) * (double)(ref), \
+ "'%s' != '%s' (%f not within +%.1f%%/-%.1f%% tolerance of %f)\n",\
+ #x, #ref, (double)(x), \
+ (tol_up) * 100.0, (tol_down) * 100.0, \
+ (double)(ref))
+
+#define assert_within_epsilon(x, ref, tolerance) \
+ __assert_within_epsilon(x, ref, tolerance, tolerance)
+
+static bool __pmu_wait_for_rc6(int fd)
+{
+ struct timespec tv = {};
+ uint64_t start, now;
+
+ /* First wait for roughly an RC6 Evaluation Interval */
+ usleep(160 * 1000);
+
+ /* Then poll for RC6 to start ticking */
+ now = pmu_read_single(fd);
+ do {
+ start = now;
+ usleep(5000);
+ now = pmu_read_single(fd);
+ if (now - start > 1e6)
+ return true;
+ } while (!igt_seconds_elapsed(&tv));
+
+ return false;
+}
+
+static unsigned int measured_usleep(unsigned int usec)
+{
+ struct timespec ts = { };
+ unsigned int slept;
+
+ slept = igt_nsec_elapsed(&ts);
+ igt_assert(slept == 0);
+ do {
+ usleep(usec - slept);
+ slept = igt_nsec_elapsed(&ts) / 1000;
+ } while (slept < usec);
+
+ return igt_nsec_elapsed(&ts);
+}
+
+static uint32_t batch_create(int fd)
+{
+ const uint32_t bbe = MI_BATCH_BUFFER_END;
+ uint32_t handle;
+
+ handle = gem_create(fd, 4096);
+ gem_write(fd, handle, 0, &bbe, sizeof(bbe));
+
+ return handle;
+}
+
+static int open_pmu(int i915, uint64_t config)
+{
+ int fd;
+
+ fd = perf_i915_open(config);
+ igt_skip_on(fd < 0 && errno == ENODEV);
+ igt_assert(fd >= 0);
+
+ return fd;
+}
+
+static void rc6_perf(int i915)
+{
+ const int64_t duration_ns = 2e9;
+ uint64_t idle, prev, ts[2];
+ unsigned long slept, cycles;
+ unsigned long *done;
+ int fd;
+
+ fd = open_pmu(i915, I915_PMU_RC6_RESIDENCY);
+ igt_require(__pmu_wait_for_rc6(fd));
+
+ /* While idle check full RC6. */
+ prev = __pmu_read_single(fd, &ts[0]);
+ slept = measured_usleep(duration_ns / 1000);
+ idle = __pmu_read_single(fd, &ts[1]);
+ igt_debug("slept=%lu perf=%"PRIu64"\n", slept, ts[1] - ts[0]);
+ assert_within_epsilon(idle - prev, ts[1] - ts[0], 5);
+
+ /* Setup up a very light load */
+ done = mmap(0, 4096, PROT_WRITE, MAP_SHARED | MAP_ANON, -1, 0);
+ igt_fork(child, 1) {
+ struct drm_i915_gem_exec_object2 obj = {
+ .handle = batch_create(i915),
+ };
+ struct drm_i915_gem_execbuffer2 execbuf = {
+ .buffers_ptr = to_user_pointer(&obj),
+ .buffer_count = 1,
+ };
+
+ do {
+ struct timespec tv = {};
+
+ igt_seconds_elapsed(&tv);
+
+ gem_execbuf(i915, &execbuf);
+ gem_sync(i915, obj.handle);
+ done[1]++;
+
+ usleep(igt_seconds_elapsed(&tv) / 10); /* => 1% busy */
+ } while (!*done);
+ }
+
+ /* While very nearly idle (idle to within tolerance), except full RC6 */
+ cycles = -done[1];
+ prev = __pmu_read_single(fd, &ts[0]);
+ slept = measured_usleep(duration_ns / 1000);
+ idle = __pmu_read_single(fd, &ts[1]);
+ cycles += done[1];
+ igt_debug("slept=%lu perf=%"PRIu64", cycles=%lu\n",
+ slept, ts[1] - ts[0], cycles);
+ igt_assert(cycles > 0);
+ assert_within_epsilon(idle - prev, ts[1] - ts[0], 5);
+
+ close(fd);
+
+ *done = 1;
+ igt_waitchildren();
+}
+
igt_main
{
unsigned int rc6_enabled = 0;
unsigned int devid = 0;
+ int i915 = -1;
/* Use drm_open_driver to verify device existence */
igt_fixture {
- int fd;
-
- fd = drm_open_driver(DRIVER_INTEL);
- devid = intel_get_drm_devid(fd);
- sysfs = igt_sysfs_open(fd);
+ i915 = drm_open_driver(DRIVER_INTEL);
+ devid = intel_get_drm_devid(i915);
+ sysfs = igt_sysfs_open(i915);
igt_require(has_rc6_residency("rc6"));
/* Make sure rc6 counters are running */
- igt_drop_caches_set(fd, DROP_IDLE);
+ igt_drop_caches_set(i915, DROP_IDLE);
igt_require(wait_for_rc6());
- close(fd);
-
rc6_enabled = get_rc6_enabled_mask();
igt_require(rc6_enabled & RC6_ENABLED);
}
+ igt_subtest("rc6-perf") {
+ igt_require_gem(i915);
+ gem_quiescent_gpu(i915);
+
+ rc6_perf(i915);
+ }
+
igt_subtest("rc6-accuracy") {
struct residencies res;
@@ -235,4 +385,8 @@ igt_main
measure_residencies(devid, rc6_enabled, &res);
residency_accuracy(res.media_rc6, res.duration, "media_rc6");
}
+
+ igt_fixture
+ close(i915);
+
}
diff --git a/tests/meson.build b/tests/meson.build
index 570de5459..a79d22ba1 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -232,7 +232,6 @@ i915_progs = [
'i915_module_load',
'i915_pm_backlight',
'i915_pm_lpsp',
- 'i915_pm_rc6_residency',
'i915_pm_rpm',
'i915_pm_dc',
'i915_pm_rps',
@@ -336,6 +335,14 @@ test_executables += executable('gem_mmap_offset',
install : true)
test_list += 'gem_mmap_offset'
+test_executables += executable('i915_pm_rc6_residency',
+ join_paths('i915', 'i915_pm_rc6_residency.c'),
+ dependencies : test_deps + [ lib_igt_perf ],
+ install_dir : libexecdir,
+ install_rpath : libexecdir_rpathdir,
+ install : true)
+test_list += 'i915_pm_rc6_residency'
+
test_executables += executable('perf_pmu', 'perf_pmu.c',
dependencies : test_deps + [ lib_igt_perf ],
install_dir : libexecdir,
--
2.25.0.rc2
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [igt-dev] ✗ GitLab.Pipeline: failure for test/i915_pm_rc6_residency: Check we enter RC6 when mostly idle
2020-01-09 22:23 ` [igt-dev] " Chris Wilson
(?)
@ 2020-01-09 22:41 ` Patchwork
-1 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2020-01-09 22:41 UTC (permalink / raw)
To: Chris Wilson; +Cc: igt-dev
== Series Details ==
Series: test/i915_pm_rc6_residency: Check we enter RC6 when mostly idle
URL : https://patchwork.freedesktop.org/series/71855/
State : failure
== Summary ==
ERROR! This series introduces new undocumented tests:
i915_pm_rc6_residency@rc6-perf
Can you document them as per the requirement in the [CONTRIBUTING.md]?
[Documentation] has more details on how to do this.
Here are few examples:
https://gitlab.freedesktop.org/drm/igt-gpu-tools/commit/0316695d03aa46108296b27f3982ec93200c7a6e
https://gitlab.freedesktop.org/drm/igt-gpu-tools/commit/443cc658e1e6b492ee17bf4f4d891029eb7a205d
Thanks in advance!
[CONTRIBUTING.md]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/blob/master/CONTRIBUTING.md#L19
[Documentation]: https://drm.pages.freedesktop.org/igt-gpu-tools/igt-gpu-tools-Core.html#igt-describe
Other than that, pipeline status: SUCCESS.
see https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/pipelines/95548 for the overview.
== Logs ==
For more details see: https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/pipelines/95548
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 9+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for test/i915_pm_rc6_residency: Check we enter RC6 when mostly idle
2020-01-09 22:23 ` [igt-dev] " Chris Wilson
(?)
(?)
@ 2020-01-09 22:51 ` Patchwork
-1 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2020-01-09 22:51 UTC (permalink / raw)
To: Chris Wilson; +Cc: igt-dev
== Series Details ==
Series: test/i915_pm_rc6_residency: Check we enter RC6 when mostly idle
URL : https://patchwork.freedesktop.org/series/71855/
State : success
== Summary ==
CI Bug Log - changes from IGT_5359 -> IGTPW_3912
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/index.html
Known issues
------------
Here are the changes found in IGTPW_3912 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_module_load@reload-with-fault-injection:
- fi-cfl-guc: [PASS][1] -> [INCOMPLETE][2] ([i915#505] / [i915#671])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/fi-cfl-guc/igt@i915_module_load@reload-with-fault-injection.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/fi-cfl-guc/igt@i915_module_load@reload-with-fault-injection.html
- fi-kbl-x1275: [PASS][3] -> [INCOMPLETE][4] ([i915#879])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/fi-kbl-x1275/igt@i915_module_load@reload-with-fault-injection.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/fi-kbl-x1275/igt@i915_module_load@reload-with-fault-injection.html
* igt@i915_pm_rpm@module-reload:
- fi-skl-lmem: [PASS][5] -> [DMESG-WARN][6] ([i915#889]) +1 similar issue
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/fi-skl-lmem/igt@i915_pm_rpm@module-reload.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/fi-skl-lmem/igt@i915_pm_rpm@module-reload.html
* igt@i915_selftest@live_sanitycheck:
- fi-skl-lmem: [PASS][7] -> [INCOMPLETE][8] ([i915#198])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/fi-skl-lmem/igt@i915_selftest@live_sanitycheck.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/fi-skl-lmem/igt@i915_selftest@live_sanitycheck.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s3:
- fi-icl-u2: [FAIL][9] ([fdo#103375]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/fi-icl-u2/igt@gem_exec_suspend@basic-s3.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/fi-icl-u2/igt@gem_exec_suspend@basic-s3.html
* igt@gem_exec_suspend@basic-s4-devices:
- fi-icl-u2: [FAIL][11] ([fdo#111550]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/fi-icl-u2/igt@gem_exec_suspend@basic-s4-devices.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/fi-icl-u2/igt@gem_exec_suspend@basic-s4-devices.html
* igt@i915_module_load@reload-with-fault-injection:
- fi-skl-6700k2: [INCOMPLETE][13] ([i915#671]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/fi-skl-6700k2/igt@i915_module_load@reload-with-fault-injection.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/fi-skl-6700k2/igt@i915_module_load@reload-with-fault-injection.html
#### Warnings ####
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-icl-u2: [FAIL][15] ([fdo#103375]) -> [DMESG-WARN][16] ([IGT#4] / [i915#263])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
[IGT#4]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/4
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#111550]: https://bugs.freedesktop.org/show_bug.cgi?id=111550
[i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
[i915#263]: https://gitlab.freedesktop.org/drm/intel/issues/263
[i915#505]: https://gitlab.freedesktop.org/drm/intel/issues/505
[i915#671]: https://gitlab.freedesktop.org/drm/intel/issues/671
[i915#879]: https://gitlab.freedesktop.org/drm/intel/issues/879
[i915#889]: https://gitlab.freedesktop.org/drm/intel/issues/889
Participating hosts (46 -> 41)
------------------------------
Additional (3): fi-hsw-peppy fi-byt-n2820 fi-ivb-3770
Missing (8): fi-ehl-1 fi-byt-squawks fi-bsw-cyan fi-snb-2520m fi-kbl-7500u fi-ctg-p8600 fi-kbl-8809g fi-byt-clapper
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_5359 -> IGTPW_3912
CI-20190529: 20190529
CI_DRM_7714: b633f28f2de80cdb861d6c1c3b4df6fd2d53239f @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_3912: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/index.html
IGT_5359: 28451bcec2245dcc1fd0eb1d4c76335b2b4f97a5 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
== Testlist changes ==
+igt@i915_pm_rc6_residency@rc6-perf
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/index.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH i-g-t] test/i915_pm_rc6_residency: Check we enter RC6 when mostly idle
2020-01-09 22:23 ` [igt-dev] " Chris Wilson
@ 2020-01-10 16:16 ` Imre Deak
-1 siblings, 0 replies; 9+ messages in thread
From: Imre Deak @ 2020-01-10 16:16 UTC (permalink / raw)
To: Chris Wilson; +Cc: igt-dev, intel-gfx
On Thu, Jan 09, 2020 at 10:23:00PM +0000, Chris Wilson wrote:
> Long ago, we would only approach runtime-suspend if the GPU had been
> idle (no userspace submissions) for a second or two. However, since
> disabling automatic HW RC6 such a relaxed approach to runtime-suspend
> caused us to never enter RC6 on the desktop and consume vast quantities
> of power. Surmise this behaviour by setting up a background load that is
> only active for ~1% of the time (so equivalent to a compositor that is
> updating the clock every 50ms or so) and verify that we do continue to
> enter RC6 between the GPU pulses.
>
> References: https://gitlab.freedesktop.org/drm/intel/issues/614
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Imre Deak <imre.deak@intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
> tests/Makefile.am | 1 +
> tests/i915/i915_pm_rc6_residency.c | 174 +++++++++++++++++++++++++++--
> tests/meson.build | 9 +-
> 3 files changed, 173 insertions(+), 11 deletions(-)
>
> diff --git a/tests/Makefile.am b/tests/Makefile.am
> index 9a320bc23..fc3052475 100644
> --- a/tests/Makefile.am
> +++ b/tests/Makefile.am
> @@ -122,6 +122,7 @@ gem_threaded_access_tiled_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
> gem_threaded_access_tiled_LDADD = $(LDADD) -lpthread
> gem_tiled_swapping_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
> gem_tiled_swapping_LDADD = $(LDADD) -lpthread
> +i915_pm_rc6_residency_LDADD = $(LDADD) $(top_builddir)/lib/libigt_perf.la
> prime_self_import_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
> prime_self_import_LDADD = $(LDADD) -lpthread
> gem_userptr_blits_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
> diff --git a/tests/i915/i915_pm_rc6_residency.c b/tests/i915/i915_pm_rc6_residency.c
> index 1b39c870e..a5bcb084b 100644
> --- a/tests/i915/i915_pm_rc6_residency.c
> +++ b/tests/i915/i915_pm_rc6_residency.c
> @@ -25,8 +25,6 @@
> *
> */
>
> -#include "igt.h"
> -#include "igt_sysfs.h"
> #include <stdio.h>
> #include <stdlib.h>
> #include <string.h>
> @@ -34,6 +32,9 @@
> #include <errno.h>
> #include <time.h>
>
> +#include "igt.h"
> +#include "igt_perf.h"
> +#include "igt_sysfs.h"
>
> #define SLEEP_DURATION 3 /* in seconds */
>
> @@ -195,31 +196,180 @@ static bool wait_for_rc6(void)
> return false;
> }
>
> +static uint64_t __pmu_read_single(int fd, uint64_t *ts)
> +{
> + uint64_t data[2];
> +
> + igt_assert_eq(read(fd, data, sizeof(data)), sizeof(data));
> +
> + if (ts)
> + *ts = data[1];
> +
> + return data[0];
> +}
> +
> +static uint64_t pmu_read_single(int fd)
> +{
> + return __pmu_read_single(fd, NULL);
> +}
> +
> +#define __assert_within_epsilon(x, ref, tol_up, tol_down) \
> + igt_assert_f((double)(x) <= (1.0 + (tol_up)) * (double)(ref) && \
> + (double)(x) >= (1.0 - (tol_down)) * (double)(ref), \
> + "'%s' != '%s' (%f not within +%.1f%%/-%.1f%% tolerance of %f)\n",\
> + #x, #ref, (double)(x), \
> + (tol_up) * 100.0, (tol_down) * 100.0, \
> + (double)(ref))
> +
> +#define assert_within_epsilon(x, ref, tolerance) \
> + __assert_within_epsilon(x, ref, tolerance, tolerance)
> +
> +static bool __pmu_wait_for_rc6(int fd)
> +{
> + struct timespec tv = {};
> + uint64_t start, now;
> +
> + /* First wait for roughly an RC6 Evaluation Interval */
> + usleep(160 * 1000);
> +
> + /* Then poll for RC6 to start ticking */
> + now = pmu_read_single(fd);
> + do {
> + start = now;
> + usleep(5000);
> + now = pmu_read_single(fd);
> + if (now - start > 1e6)
> + return true;
> + } while (!igt_seconds_elapsed(&tv));
> +
> + return false;
> +}
> +
> +static unsigned int measured_usleep(unsigned int usec)
> +{
> + struct timespec ts = { };
> + unsigned int slept;
> +
> + slept = igt_nsec_elapsed(&ts);
> + igt_assert(slept == 0);
> + do {
> + usleep(usec - slept);
> + slept = igt_nsec_elapsed(&ts) / 1000;
> + } while (slept < usec);
> +
> + return igt_nsec_elapsed(&ts);
> +}
> +
> +static uint32_t batch_create(int fd)
> +{
> + const uint32_t bbe = MI_BATCH_BUFFER_END;
> + uint32_t handle;
> +
> + handle = gem_create(fd, 4096);
> + gem_write(fd, handle, 0, &bbe, sizeof(bbe));
> +
> + return handle;
> +}
> +
> +static int open_pmu(int i915, uint64_t config)
> +{
> + int fd;
> +
> + fd = perf_i915_open(config);
> + igt_skip_on(fd < 0 && errno == ENODEV);
> + igt_assert(fd >= 0);
> +
> + return fd;
> +}
> +
> +static void rc6_perf(int i915)
> +{
> + const int64_t duration_ns = 2e9;
> + uint64_t idle, prev, ts[2];
> + unsigned long slept, cycles;
> + unsigned long *done;
> + int fd;
> +
> + fd = open_pmu(i915, I915_PMU_RC6_RESIDENCY);
> + igt_require(__pmu_wait_for_rc6(fd));
> +
> + /* While idle check full RC6. */
> + prev = __pmu_read_single(fd, &ts[0]);
> + slept = measured_usleep(duration_ns / 1000);
> + idle = __pmu_read_single(fd, &ts[1]);
> + igt_debug("slept=%lu perf=%"PRIu64"\n", slept, ts[1] - ts[0]);
> + assert_within_epsilon(idle - prev, ts[1] - ts[0], 5);
> +
> + /* Setup up a very light load */
> + done = mmap(0, 4096, PROT_WRITE, MAP_SHARED | MAP_ANON, -1, 0);
> + igt_fork(child, 1) {
> + struct drm_i915_gem_exec_object2 obj = {
> + .handle = batch_create(i915),
> + };
> + struct drm_i915_gem_execbuffer2 execbuf = {
> + .buffers_ptr = to_user_pointer(&obj),
> + .buffer_count = 1,
> + };
> +
> + do {
> + struct timespec tv = {};
> +
> + igt_seconds_elapsed(&tv);
> +
> + gem_execbuf(i915, &execbuf);
> + gem_sync(i915, obj.handle);
> + done[1]++;
> +
> + usleep(igt_seconds_elapsed(&tv) / 10); /* => 1% busy */
igt_nsec_elapsed()?
Not too familiar with the perf interface but I assume event[0] read is
the RC6 residency, while event[1] is the duration while the event was
enabled (so the duration since the event file was opened?). Looks ok:
Reviewed-by: Imre Deak <imre.deak@intel.com>
> + } while (!*done);
> + }
> +
> + /* While very nearly idle (idle to within tolerance), except full RC6 */
> + cycles = -done[1];
> + prev = __pmu_read_single(fd, &ts[0]);
> + slept = measured_usleep(duration_ns / 1000);
> + idle = __pmu_read_single(fd, &ts[1]);
> + cycles += done[1];
> + igt_debug("slept=%lu perf=%"PRIu64", cycles=%lu\n",
> + slept, ts[1] - ts[0], cycles);
> + igt_assert(cycles > 0);
> + assert_within_epsilon(idle - prev, ts[1] - ts[0], 5);
> +
> + close(fd);
> +
> + *done = 1;
> + igt_waitchildren();
> +}
> +
> igt_main
> {
> unsigned int rc6_enabled = 0;
> unsigned int devid = 0;
> + int i915 = -1;
>
> /* Use drm_open_driver to verify device existence */
> igt_fixture {
> - int fd;
> -
> - fd = drm_open_driver(DRIVER_INTEL);
> - devid = intel_get_drm_devid(fd);
> - sysfs = igt_sysfs_open(fd);
> + i915 = drm_open_driver(DRIVER_INTEL);
> + devid = intel_get_drm_devid(i915);
> + sysfs = igt_sysfs_open(i915);
>
> igt_require(has_rc6_residency("rc6"));
>
> /* Make sure rc6 counters are running */
> - igt_drop_caches_set(fd, DROP_IDLE);
> + igt_drop_caches_set(i915, DROP_IDLE);
> igt_require(wait_for_rc6());
>
> - close(fd);
> -
> rc6_enabled = get_rc6_enabled_mask();
> igt_require(rc6_enabled & RC6_ENABLED);
> }
>
> + igt_subtest("rc6-perf") {
> + igt_require_gem(i915);
> + gem_quiescent_gpu(i915);
> +
> + rc6_perf(i915);
> + }
> +
> igt_subtest("rc6-accuracy") {
> struct residencies res;
>
> @@ -235,4 +385,8 @@ igt_main
> measure_residencies(devid, rc6_enabled, &res);
> residency_accuracy(res.media_rc6, res.duration, "media_rc6");
> }
> +
> + igt_fixture
> + close(i915);
> +
> }
> diff --git a/tests/meson.build b/tests/meson.build
> index 570de5459..a79d22ba1 100644
> --- a/tests/meson.build
> +++ b/tests/meson.build
> @@ -232,7 +232,6 @@ i915_progs = [
> 'i915_module_load',
> 'i915_pm_backlight',
> 'i915_pm_lpsp',
> - 'i915_pm_rc6_residency',
> 'i915_pm_rpm',
> 'i915_pm_dc',
> 'i915_pm_rps',
> @@ -336,6 +335,14 @@ test_executables += executable('gem_mmap_offset',
> install : true)
> test_list += 'gem_mmap_offset'
>
> +test_executables += executable('i915_pm_rc6_residency',
> + join_paths('i915', 'i915_pm_rc6_residency.c'),
> + dependencies : test_deps + [ lib_igt_perf ],
> + install_dir : libexecdir,
> + install_rpath : libexecdir_rpathdir,
> + install : true)
> +test_list += 'i915_pm_rc6_residency'
> +
> test_executables += executable('perf_pmu', 'perf_pmu.c',
> dependencies : test_deps + [ lib_igt_perf ],
> install_dir : libexecdir,
> --
> 2.25.0.rc2
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] test/i915_pm_rc6_residency: Check we enter RC6 when mostly idle
@ 2020-01-10 16:16 ` Imre Deak
0 siblings, 0 replies; 9+ messages in thread
From: Imre Deak @ 2020-01-10 16:16 UTC (permalink / raw)
To: Chris Wilson; +Cc: igt-dev, intel-gfx, Tvrtko Ursulin
On Thu, Jan 09, 2020 at 10:23:00PM +0000, Chris Wilson wrote:
> Long ago, we would only approach runtime-suspend if the GPU had been
> idle (no userspace submissions) for a second or two. However, since
> disabling automatic HW RC6 such a relaxed approach to runtime-suspend
> caused us to never enter RC6 on the desktop and consume vast quantities
> of power. Surmise this behaviour by setting up a background load that is
> only active for ~1% of the time (so equivalent to a compositor that is
> updating the clock every 50ms or so) and verify that we do continue to
> enter RC6 between the GPU pulses.
>
> References: https://gitlab.freedesktop.org/drm/intel/issues/614
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Imre Deak <imre.deak@intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
> tests/Makefile.am | 1 +
> tests/i915/i915_pm_rc6_residency.c | 174 +++++++++++++++++++++++++++--
> tests/meson.build | 9 +-
> 3 files changed, 173 insertions(+), 11 deletions(-)
>
> diff --git a/tests/Makefile.am b/tests/Makefile.am
> index 9a320bc23..fc3052475 100644
> --- a/tests/Makefile.am
> +++ b/tests/Makefile.am
> @@ -122,6 +122,7 @@ gem_threaded_access_tiled_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
> gem_threaded_access_tiled_LDADD = $(LDADD) -lpthread
> gem_tiled_swapping_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
> gem_tiled_swapping_LDADD = $(LDADD) -lpthread
> +i915_pm_rc6_residency_LDADD = $(LDADD) $(top_builddir)/lib/libigt_perf.la
> prime_self_import_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
> prime_self_import_LDADD = $(LDADD) -lpthread
> gem_userptr_blits_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
> diff --git a/tests/i915/i915_pm_rc6_residency.c b/tests/i915/i915_pm_rc6_residency.c
> index 1b39c870e..a5bcb084b 100644
> --- a/tests/i915/i915_pm_rc6_residency.c
> +++ b/tests/i915/i915_pm_rc6_residency.c
> @@ -25,8 +25,6 @@
> *
> */
>
> -#include "igt.h"
> -#include "igt_sysfs.h"
> #include <stdio.h>
> #include <stdlib.h>
> #include <string.h>
> @@ -34,6 +32,9 @@
> #include <errno.h>
> #include <time.h>
>
> +#include "igt.h"
> +#include "igt_perf.h"
> +#include "igt_sysfs.h"
>
> #define SLEEP_DURATION 3 /* in seconds */
>
> @@ -195,31 +196,180 @@ static bool wait_for_rc6(void)
> return false;
> }
>
> +static uint64_t __pmu_read_single(int fd, uint64_t *ts)
> +{
> + uint64_t data[2];
> +
> + igt_assert_eq(read(fd, data, sizeof(data)), sizeof(data));
> +
> + if (ts)
> + *ts = data[1];
> +
> + return data[0];
> +}
> +
> +static uint64_t pmu_read_single(int fd)
> +{
> + return __pmu_read_single(fd, NULL);
> +}
> +
> +#define __assert_within_epsilon(x, ref, tol_up, tol_down) \
> + igt_assert_f((double)(x) <= (1.0 + (tol_up)) * (double)(ref) && \
> + (double)(x) >= (1.0 - (tol_down)) * (double)(ref), \
> + "'%s' != '%s' (%f not within +%.1f%%/-%.1f%% tolerance of %f)\n",\
> + #x, #ref, (double)(x), \
> + (tol_up) * 100.0, (tol_down) * 100.0, \
> + (double)(ref))
> +
> +#define assert_within_epsilon(x, ref, tolerance) \
> + __assert_within_epsilon(x, ref, tolerance, tolerance)
> +
> +static bool __pmu_wait_for_rc6(int fd)
> +{
> + struct timespec tv = {};
> + uint64_t start, now;
> +
> + /* First wait for roughly an RC6 Evaluation Interval */
> + usleep(160 * 1000);
> +
> + /* Then poll for RC6 to start ticking */
> + now = pmu_read_single(fd);
> + do {
> + start = now;
> + usleep(5000);
> + now = pmu_read_single(fd);
> + if (now - start > 1e6)
> + return true;
> + } while (!igt_seconds_elapsed(&tv));
> +
> + return false;
> +}
> +
> +static unsigned int measured_usleep(unsigned int usec)
> +{
> + struct timespec ts = { };
> + unsigned int slept;
> +
> + slept = igt_nsec_elapsed(&ts);
> + igt_assert(slept == 0);
> + do {
> + usleep(usec - slept);
> + slept = igt_nsec_elapsed(&ts) / 1000;
> + } while (slept < usec);
> +
> + return igt_nsec_elapsed(&ts);
> +}
> +
> +static uint32_t batch_create(int fd)
> +{
> + const uint32_t bbe = MI_BATCH_BUFFER_END;
> + uint32_t handle;
> +
> + handle = gem_create(fd, 4096);
> + gem_write(fd, handle, 0, &bbe, sizeof(bbe));
> +
> + return handle;
> +}
> +
> +static int open_pmu(int i915, uint64_t config)
> +{
> + int fd;
> +
> + fd = perf_i915_open(config);
> + igt_skip_on(fd < 0 && errno == ENODEV);
> + igt_assert(fd >= 0);
> +
> + return fd;
> +}
> +
> +static void rc6_perf(int i915)
> +{
> + const int64_t duration_ns = 2e9;
> + uint64_t idle, prev, ts[2];
> + unsigned long slept, cycles;
> + unsigned long *done;
> + int fd;
> +
> + fd = open_pmu(i915, I915_PMU_RC6_RESIDENCY);
> + igt_require(__pmu_wait_for_rc6(fd));
> +
> + /* While idle check full RC6. */
> + prev = __pmu_read_single(fd, &ts[0]);
> + slept = measured_usleep(duration_ns / 1000);
> + idle = __pmu_read_single(fd, &ts[1]);
> + igt_debug("slept=%lu perf=%"PRIu64"\n", slept, ts[1] - ts[0]);
> + assert_within_epsilon(idle - prev, ts[1] - ts[0], 5);
> +
> + /* Setup up a very light load */
> + done = mmap(0, 4096, PROT_WRITE, MAP_SHARED | MAP_ANON, -1, 0);
> + igt_fork(child, 1) {
> + struct drm_i915_gem_exec_object2 obj = {
> + .handle = batch_create(i915),
> + };
> + struct drm_i915_gem_execbuffer2 execbuf = {
> + .buffers_ptr = to_user_pointer(&obj),
> + .buffer_count = 1,
> + };
> +
> + do {
> + struct timespec tv = {};
> +
> + igt_seconds_elapsed(&tv);
> +
> + gem_execbuf(i915, &execbuf);
> + gem_sync(i915, obj.handle);
> + done[1]++;
> +
> + usleep(igt_seconds_elapsed(&tv) / 10); /* => 1% busy */
igt_nsec_elapsed()?
Not too familiar with the perf interface but I assume event[0] read is
the RC6 residency, while event[1] is the duration while the event was
enabled (so the duration since the event file was opened?). Looks ok:
Reviewed-by: Imre Deak <imre.deak@intel.com>
> + } while (!*done);
> + }
> +
> + /* While very nearly idle (idle to within tolerance), except full RC6 */
> + cycles = -done[1];
> + prev = __pmu_read_single(fd, &ts[0]);
> + slept = measured_usleep(duration_ns / 1000);
> + idle = __pmu_read_single(fd, &ts[1]);
> + cycles += done[1];
> + igt_debug("slept=%lu perf=%"PRIu64", cycles=%lu\n",
> + slept, ts[1] - ts[0], cycles);
> + igt_assert(cycles > 0);
> + assert_within_epsilon(idle - prev, ts[1] - ts[0], 5);
> +
> + close(fd);
> +
> + *done = 1;
> + igt_waitchildren();
> +}
> +
> igt_main
> {
> unsigned int rc6_enabled = 0;
> unsigned int devid = 0;
> + int i915 = -1;
>
> /* Use drm_open_driver to verify device existence */
> igt_fixture {
> - int fd;
> -
> - fd = drm_open_driver(DRIVER_INTEL);
> - devid = intel_get_drm_devid(fd);
> - sysfs = igt_sysfs_open(fd);
> + i915 = drm_open_driver(DRIVER_INTEL);
> + devid = intel_get_drm_devid(i915);
> + sysfs = igt_sysfs_open(i915);
>
> igt_require(has_rc6_residency("rc6"));
>
> /* Make sure rc6 counters are running */
> - igt_drop_caches_set(fd, DROP_IDLE);
> + igt_drop_caches_set(i915, DROP_IDLE);
> igt_require(wait_for_rc6());
>
> - close(fd);
> -
> rc6_enabled = get_rc6_enabled_mask();
> igt_require(rc6_enabled & RC6_ENABLED);
> }
>
> + igt_subtest("rc6-perf") {
> + igt_require_gem(i915);
> + gem_quiescent_gpu(i915);
> +
> + rc6_perf(i915);
> + }
> +
> igt_subtest("rc6-accuracy") {
> struct residencies res;
>
> @@ -235,4 +385,8 @@ igt_main
> measure_residencies(devid, rc6_enabled, &res);
> residency_accuracy(res.media_rc6, res.duration, "media_rc6");
> }
> +
> + igt_fixture
> + close(i915);
> +
> }
> diff --git a/tests/meson.build b/tests/meson.build
> index 570de5459..a79d22ba1 100644
> --- a/tests/meson.build
> +++ b/tests/meson.build
> @@ -232,7 +232,6 @@ i915_progs = [
> 'i915_module_load',
> 'i915_pm_backlight',
> 'i915_pm_lpsp',
> - 'i915_pm_rc6_residency',
> 'i915_pm_rpm',
> 'i915_pm_dc',
> 'i915_pm_rps',
> @@ -336,6 +335,14 @@ test_executables += executable('gem_mmap_offset',
> install : true)
> test_list += 'gem_mmap_offset'
>
> +test_executables += executable('i915_pm_rc6_residency',
> + join_paths('i915', 'i915_pm_rc6_residency.c'),
> + dependencies : test_deps + [ lib_igt_perf ],
> + install_dir : libexecdir,
> + install_rpath : libexecdir_rpathdir,
> + install : true)
> +test_list += 'i915_pm_rc6_residency'
> +
> test_executables += executable('perf_pmu', 'perf_pmu.c',
> dependencies : test_deps + [ lib_igt_perf ],
> install_dir : libexecdir,
> --
> 2.25.0.rc2
>
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH i-g-t] test/i915_pm_rc6_residency: Check we enter RC6 when mostly idle
2020-01-10 16:16 ` [igt-dev] " Imre Deak
@ 2020-01-10 16:26 ` Chris Wilson
-1 siblings, 0 replies; 9+ messages in thread
From: Chris Wilson @ 2020-01-10 16:26 UTC (permalink / raw)
To: Imre Deak; +Cc: igt-dev, intel-gfx
Quoting Imre Deak (2020-01-10 16:16:27)
> On Thu, Jan 09, 2020 at 10:23:00PM +0000, Chris Wilson wrote:
> > Long ago, we would only approach runtime-suspend if the GPU had been
> > idle (no userspace submissions) for a second or two. However, since
> > disabling automatic HW RC6 such a relaxed approach to runtime-suspend
> > caused us to never enter RC6 on the desktop and consume vast quantities
> > of power. Surmise this behaviour by setting up a background load that is
> > only active for ~1% of the time (so equivalent to a compositor that is
> > updating the clock every 50ms or so) and verify that we do continue to
> > enter RC6 between the GPU pulses.
> >
> > References: https://gitlab.freedesktop.org/drm/intel/issues/614
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Imre Deak <imre.deak@intel.com>
> > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> > ---
> > tests/Makefile.am | 1 +
> > tests/i915/i915_pm_rc6_residency.c | 174 +++++++++++++++++++++++++++--
> > tests/meson.build | 9 +-
> > 3 files changed, 173 insertions(+), 11 deletions(-)
> >
> > diff --git a/tests/Makefile.am b/tests/Makefile.am
> > index 9a320bc23..fc3052475 100644
> > --- a/tests/Makefile.am
> > +++ b/tests/Makefile.am
> > @@ -122,6 +122,7 @@ gem_threaded_access_tiled_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
> > gem_threaded_access_tiled_LDADD = $(LDADD) -lpthread
> > gem_tiled_swapping_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
> > gem_tiled_swapping_LDADD = $(LDADD) -lpthread
> > +i915_pm_rc6_residency_LDADD = $(LDADD) $(top_builddir)/lib/libigt_perf.la
> > prime_self_import_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
> > prime_self_import_LDADD = $(LDADD) -lpthread
> > gem_userptr_blits_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
> > diff --git a/tests/i915/i915_pm_rc6_residency.c b/tests/i915/i915_pm_rc6_residency.c
> > index 1b39c870e..a5bcb084b 100644
> > --- a/tests/i915/i915_pm_rc6_residency.c
> > +++ b/tests/i915/i915_pm_rc6_residency.c
> > @@ -25,8 +25,6 @@
> > *
> > */
> >
> > -#include "igt.h"
> > -#include "igt_sysfs.h"
> > #include <stdio.h>
> > #include <stdlib.h>
> > #include <string.h>
> > @@ -34,6 +32,9 @@
> > #include <errno.h>
> > #include <time.h>
> >
> > +#include "igt.h"
> > +#include "igt_perf.h"
> > +#include "igt_sysfs.h"
> >
> > #define SLEEP_DURATION 3 /* in seconds */
> >
> > @@ -195,31 +196,180 @@ static bool wait_for_rc6(void)
> > return false;
> > }
> >
> > +static uint64_t __pmu_read_single(int fd, uint64_t *ts)
> > +{
> > + uint64_t data[2];
> > +
> > + igt_assert_eq(read(fd, data, sizeof(data)), sizeof(data));
> > +
> > + if (ts)
> > + *ts = data[1];
> > +
> > + return data[0];
> > +}
> > +
> > +static uint64_t pmu_read_single(int fd)
> > +{
> > + return __pmu_read_single(fd, NULL);
> > +}
> > +
> > +#define __assert_within_epsilon(x, ref, tol_up, tol_down) \
> > + igt_assert_f((double)(x) <= (1.0 + (tol_up)) * (double)(ref) && \
> > + (double)(x) >= (1.0 - (tol_down)) * (double)(ref), \
> > + "'%s' != '%s' (%f not within +%.1f%%/-%.1f%% tolerance of %f)\n",\
> > + #x, #ref, (double)(x), \
> > + (tol_up) * 100.0, (tol_down) * 100.0, \
> > + (double)(ref))
> > +
> > +#define assert_within_epsilon(x, ref, tolerance) \
> > + __assert_within_epsilon(x, ref, tolerance, tolerance)
> > +
> > +static bool __pmu_wait_for_rc6(int fd)
> > +{
> > + struct timespec tv = {};
> > + uint64_t start, now;
> > +
> > + /* First wait for roughly an RC6 Evaluation Interval */
> > + usleep(160 * 1000);
> > +
> > + /* Then poll for RC6 to start ticking */
> > + now = pmu_read_single(fd);
> > + do {
> > + start = now;
> > + usleep(5000);
> > + now = pmu_read_single(fd);
> > + if (now - start > 1e6)
> > + return true;
> > + } while (!igt_seconds_elapsed(&tv));
> > +
> > + return false;
> > +}
> > +
> > +static unsigned int measured_usleep(unsigned int usec)
> > +{
> > + struct timespec ts = { };
> > + unsigned int slept;
> > +
> > + slept = igt_nsec_elapsed(&ts);
> > + igt_assert(slept == 0);
> > + do {
> > + usleep(usec - slept);
> > + slept = igt_nsec_elapsed(&ts) / 1000;
> > + } while (slept < usec);
> > +
> > + return igt_nsec_elapsed(&ts);
> > +}
> > +
> > +static uint32_t batch_create(int fd)
> > +{
> > + const uint32_t bbe = MI_BATCH_BUFFER_END;
> > + uint32_t handle;
> > +
> > + handle = gem_create(fd, 4096);
> > + gem_write(fd, handle, 0, &bbe, sizeof(bbe));
> > +
> > + return handle;
> > +}
> > +
> > +static int open_pmu(int i915, uint64_t config)
> > +{
> > + int fd;
> > +
> > + fd = perf_i915_open(config);
> > + igt_skip_on(fd < 0 && errno == ENODEV);
> > + igt_assert(fd >= 0);
> > +
> > + return fd;
> > +}
> > +
> > +static void rc6_perf(int i915)
> > +{
> > + const int64_t duration_ns = 2e9;
> > + uint64_t idle, prev, ts[2];
> > + unsigned long slept, cycles;
> > + unsigned long *done;
> > + int fd;
> > +
> > + fd = open_pmu(i915, I915_PMU_RC6_RESIDENCY);
> > + igt_require(__pmu_wait_for_rc6(fd));
> > +
> > + /* While idle check full RC6. */
> > + prev = __pmu_read_single(fd, &ts[0]);
> > + slept = measured_usleep(duration_ns / 1000);
> > + idle = __pmu_read_single(fd, &ts[1]);
> > + igt_debug("slept=%lu perf=%"PRIu64"\n", slept, ts[1] - ts[0]);
> > + assert_within_epsilon(idle - prev, ts[1] - ts[0], 5);
> > +
> > + /* Setup up a very light load */
> > + done = mmap(0, 4096, PROT_WRITE, MAP_SHARED | MAP_ANON, -1, 0);
> > + igt_fork(child, 1) {
> > + struct drm_i915_gem_exec_object2 obj = {
> > + .handle = batch_create(i915),
> > + };
> > + struct drm_i915_gem_execbuffer2 execbuf = {
> > + .buffers_ptr = to_user_pointer(&obj),
> > + .buffer_count = 1,
> > + };
> > +
> > + do {
> > + struct timespec tv = {};
> > +
> > + igt_seconds_elapsed(&tv);
> > +
> > + gem_execbuf(i915, &execbuf);
> > + gem_sync(i915, obj.handle);
> > + done[1]++;
> > +
> > + usleep(igt_seconds_elapsed(&tv) / 10); /* => 1% busy */
>
> igt_nsec_elapsed()?
That's what I thought I wrote. How bizarre!
> Not too familiar with the perf interface but I assume event[0] read is
> the RC6 residency, while event[1] is the duration while the event was
> enabled (so the duration since the event file was opened?). Looks ok:
Yup, event[1] is the timestamp, as measured from the start of perf_open.
We use PERF_FORMAT_TOTAL_TIME_ENABLED in perf_i915_open().
> Reviewed-by: Imre Deak <imre.deak@intel.com>
Thanks,
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] test/i915_pm_rc6_residency: Check we enter RC6 when mostly idle
@ 2020-01-10 16:26 ` Chris Wilson
0 siblings, 0 replies; 9+ messages in thread
From: Chris Wilson @ 2020-01-10 16:26 UTC (permalink / raw)
To: Imre Deak; +Cc: igt-dev, intel-gfx, Tvrtko Ursulin
Quoting Imre Deak (2020-01-10 16:16:27)
> On Thu, Jan 09, 2020 at 10:23:00PM +0000, Chris Wilson wrote:
> > Long ago, we would only approach runtime-suspend if the GPU had been
> > idle (no userspace submissions) for a second or two. However, since
> > disabling automatic HW RC6 such a relaxed approach to runtime-suspend
> > caused us to never enter RC6 on the desktop and consume vast quantities
> > of power. Surmise this behaviour by setting up a background load that is
> > only active for ~1% of the time (so equivalent to a compositor that is
> > updating the clock every 50ms or so) and verify that we do continue to
> > enter RC6 between the GPU pulses.
> >
> > References: https://gitlab.freedesktop.org/drm/intel/issues/614
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Imre Deak <imre.deak@intel.com>
> > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> > ---
> > tests/Makefile.am | 1 +
> > tests/i915/i915_pm_rc6_residency.c | 174 +++++++++++++++++++++++++++--
> > tests/meson.build | 9 +-
> > 3 files changed, 173 insertions(+), 11 deletions(-)
> >
> > diff --git a/tests/Makefile.am b/tests/Makefile.am
> > index 9a320bc23..fc3052475 100644
> > --- a/tests/Makefile.am
> > +++ b/tests/Makefile.am
> > @@ -122,6 +122,7 @@ gem_threaded_access_tiled_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
> > gem_threaded_access_tiled_LDADD = $(LDADD) -lpthread
> > gem_tiled_swapping_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
> > gem_tiled_swapping_LDADD = $(LDADD) -lpthread
> > +i915_pm_rc6_residency_LDADD = $(LDADD) $(top_builddir)/lib/libigt_perf.la
> > prime_self_import_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
> > prime_self_import_LDADD = $(LDADD) -lpthread
> > gem_userptr_blits_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
> > diff --git a/tests/i915/i915_pm_rc6_residency.c b/tests/i915/i915_pm_rc6_residency.c
> > index 1b39c870e..a5bcb084b 100644
> > --- a/tests/i915/i915_pm_rc6_residency.c
> > +++ b/tests/i915/i915_pm_rc6_residency.c
> > @@ -25,8 +25,6 @@
> > *
> > */
> >
> > -#include "igt.h"
> > -#include "igt_sysfs.h"
> > #include <stdio.h>
> > #include <stdlib.h>
> > #include <string.h>
> > @@ -34,6 +32,9 @@
> > #include <errno.h>
> > #include <time.h>
> >
> > +#include "igt.h"
> > +#include "igt_perf.h"
> > +#include "igt_sysfs.h"
> >
> > #define SLEEP_DURATION 3 /* in seconds */
> >
> > @@ -195,31 +196,180 @@ static bool wait_for_rc6(void)
> > return false;
> > }
> >
> > +static uint64_t __pmu_read_single(int fd, uint64_t *ts)
> > +{
> > + uint64_t data[2];
> > +
> > + igt_assert_eq(read(fd, data, sizeof(data)), sizeof(data));
> > +
> > + if (ts)
> > + *ts = data[1];
> > +
> > + return data[0];
> > +}
> > +
> > +static uint64_t pmu_read_single(int fd)
> > +{
> > + return __pmu_read_single(fd, NULL);
> > +}
> > +
> > +#define __assert_within_epsilon(x, ref, tol_up, tol_down) \
> > + igt_assert_f((double)(x) <= (1.0 + (tol_up)) * (double)(ref) && \
> > + (double)(x) >= (1.0 - (tol_down)) * (double)(ref), \
> > + "'%s' != '%s' (%f not within +%.1f%%/-%.1f%% tolerance of %f)\n",\
> > + #x, #ref, (double)(x), \
> > + (tol_up) * 100.0, (tol_down) * 100.0, \
> > + (double)(ref))
> > +
> > +#define assert_within_epsilon(x, ref, tolerance) \
> > + __assert_within_epsilon(x, ref, tolerance, tolerance)
> > +
> > +static bool __pmu_wait_for_rc6(int fd)
> > +{
> > + struct timespec tv = {};
> > + uint64_t start, now;
> > +
> > + /* First wait for roughly an RC6 Evaluation Interval */
> > + usleep(160 * 1000);
> > +
> > + /* Then poll for RC6 to start ticking */
> > + now = pmu_read_single(fd);
> > + do {
> > + start = now;
> > + usleep(5000);
> > + now = pmu_read_single(fd);
> > + if (now - start > 1e6)
> > + return true;
> > + } while (!igt_seconds_elapsed(&tv));
> > +
> > + return false;
> > +}
> > +
> > +static unsigned int measured_usleep(unsigned int usec)
> > +{
> > + struct timespec ts = { };
> > + unsigned int slept;
> > +
> > + slept = igt_nsec_elapsed(&ts);
> > + igt_assert(slept == 0);
> > + do {
> > + usleep(usec - slept);
> > + slept = igt_nsec_elapsed(&ts) / 1000;
> > + } while (slept < usec);
> > +
> > + return igt_nsec_elapsed(&ts);
> > +}
> > +
> > +static uint32_t batch_create(int fd)
> > +{
> > + const uint32_t bbe = MI_BATCH_BUFFER_END;
> > + uint32_t handle;
> > +
> > + handle = gem_create(fd, 4096);
> > + gem_write(fd, handle, 0, &bbe, sizeof(bbe));
> > +
> > + return handle;
> > +}
> > +
> > +static int open_pmu(int i915, uint64_t config)
> > +{
> > + int fd;
> > +
> > + fd = perf_i915_open(config);
> > + igt_skip_on(fd < 0 && errno == ENODEV);
> > + igt_assert(fd >= 0);
> > +
> > + return fd;
> > +}
> > +
> > +static void rc6_perf(int i915)
> > +{
> > + const int64_t duration_ns = 2e9;
> > + uint64_t idle, prev, ts[2];
> > + unsigned long slept, cycles;
> > + unsigned long *done;
> > + int fd;
> > +
> > + fd = open_pmu(i915, I915_PMU_RC6_RESIDENCY);
> > + igt_require(__pmu_wait_for_rc6(fd));
> > +
> > + /* While idle check full RC6. */
> > + prev = __pmu_read_single(fd, &ts[0]);
> > + slept = measured_usleep(duration_ns / 1000);
> > + idle = __pmu_read_single(fd, &ts[1]);
> > + igt_debug("slept=%lu perf=%"PRIu64"\n", slept, ts[1] - ts[0]);
> > + assert_within_epsilon(idle - prev, ts[1] - ts[0], 5);
> > +
> > + /* Setup up a very light load */
> > + done = mmap(0, 4096, PROT_WRITE, MAP_SHARED | MAP_ANON, -1, 0);
> > + igt_fork(child, 1) {
> > + struct drm_i915_gem_exec_object2 obj = {
> > + .handle = batch_create(i915),
> > + };
> > + struct drm_i915_gem_execbuffer2 execbuf = {
> > + .buffers_ptr = to_user_pointer(&obj),
> > + .buffer_count = 1,
> > + };
> > +
> > + do {
> > + struct timespec tv = {};
> > +
> > + igt_seconds_elapsed(&tv);
> > +
> > + gem_execbuf(i915, &execbuf);
> > + gem_sync(i915, obj.handle);
> > + done[1]++;
> > +
> > + usleep(igt_seconds_elapsed(&tv) / 10); /* => 1% busy */
>
> igt_nsec_elapsed()?
That's what I thought I wrote. How bizarre!
> Not too familiar with the perf interface but I assume event[0] read is
> the RC6 residency, while event[1] is the duration while the event was
> enabled (so the duration since the event file was opened?). Looks ok:
Yup, event[1] is the timestamp, as measured from the start of perf_open.
We use PERF_FORMAT_TOTAL_TIME_ENABLED in perf_i915_open().
> Reviewed-by: Imre Deak <imre.deak@intel.com>
Thanks,
-Chris
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 9+ messages in thread
* [igt-dev] ✗ Fi.CI.IGT: failure for test/i915_pm_rc6_residency: Check we enter RC6 when mostly idle
2020-01-09 22:23 ` [igt-dev] " Chris Wilson
` (3 preceding siblings ...)
(?)
@ 2020-01-10 20:05 ` Patchwork
-1 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2020-01-10 20:05 UTC (permalink / raw)
To: Chris Wilson; +Cc: igt-dev
== Series Details ==
Series: test/i915_pm_rc6_residency: Check we enter RC6 when mostly idle
URL : https://patchwork.freedesktop.org/series/71855/
State : failure
== Summary ==
CI Bug Log - changes from IGT_5359_full -> IGTPW_3912_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with IGTPW_3912_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_3912_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_3912_full:
### IGT changes ###
#### Possible regressions ####
* {igt@i915_pm_rc6_residency@rc6-perf} (NEW):
- shard-iclb: NOTRUN -> [FAIL][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-iclb2/igt@i915_pm_rc6_residency@rc6-perf.html
* igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
- shard-tglb: [PASS][2] -> [INCOMPLETE][3]
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-tglb7/igt@kms_ccs@pipe-a-crc-sprite-planes-basic.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-tglb4/igt@kms_ccs@pipe-a-crc-sprite-planes-basic.html
New tests
---------
New tests have been introduced between IGT_5359_full and IGTPW_3912_full:
### New IGT tests (1) ###
* igt@i915_pm_rc6_residency@rc6-perf:
- Statuses : 1 fail(s) 4 pass(s)
- Exec time: [4.17, 4.19] s
Known issues
------------
Here are the changes found in IGTPW_3912_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_persistence@vcs1-queued:
- shard-iclb: [PASS][4] -> [SKIP][5] ([fdo#109276] / [fdo#112080]) +2 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-iclb2/igt@gem_ctx_persistence@vcs1-queued.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-iclb5/igt@gem_ctx_persistence@vcs1-queued.html
* igt@gem_ctx_shared@q-smoketest-bsd2:
- shard-iclb: [PASS][6] -> [SKIP][7] ([fdo#109276]) +13 similar issues
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-iclb4/igt@gem_ctx_shared@q-smoketest-bsd2.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-iclb7/igt@gem_ctx_shared@q-smoketest-bsd2.html
* igt@gem_exec_create@basic:
- shard-tglb: [PASS][8] -> [INCOMPLETE][9] ([fdo#111736] / [i915#472])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-tglb7/igt@gem_exec_create@basic.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-tglb4/igt@gem_exec_create@basic.html
* igt@gem_exec_create@madvise:
- shard-tglb: [PASS][10] -> [INCOMPLETE][11] ([CI#80] / [i915#472]) +1 similar issue
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-tglb4/igt@gem_exec_create@madvise.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-tglb3/igt@gem_exec_create@madvise.html
* igt@gem_exec_schedule@preempt-queue-blt:
- shard-tglb: [PASS][12] -> [INCOMPLETE][13] ([fdo#111677] / [i915#472])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-tglb1/igt@gem_exec_schedule@preempt-queue-blt.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-tglb3/igt@gem_exec_schedule@preempt-queue-blt.html
* igt@gem_exec_schedule@preempt-queue-contexts-chain-blt:
- shard-tglb: [PASS][14] -> [INCOMPLETE][15] ([fdo#111606] / [fdo#111677] / [i915#472])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-tglb1/igt@gem_exec_schedule@preempt-queue-contexts-chain-blt.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-tglb6/igt@gem_exec_schedule@preempt-queue-contexts-chain-blt.html
* igt@gem_exec_schedule@reorder-wide-bsd:
- shard-iclb: [PASS][16] -> [SKIP][17] ([fdo#112146]) +4 similar issues
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-iclb8/igt@gem_exec_schedule@reorder-wide-bsd.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-iclb4/igt@gem_exec_schedule@reorder-wide-bsd.html
* igt@gem_pipe_control_store_loop@reused-buffer:
- shard-tglb: [PASS][18] -> [INCOMPLETE][19] ([i915#707] / [i915#796])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-tglb4/igt@gem_pipe_control_store_loop@reused-buffer.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-tglb6/igt@gem_pipe_control_store_loop@reused-buffer.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-glk: [PASS][20] -> [FAIL][21] ([i915#644])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-glk8/igt@gem_ppgtt@flink-and-close-vma-leak.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-glk7/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@gem_softpin@noreloc-s3:
- shard-apl: [PASS][22] -> [DMESG-WARN][23] ([i915#180]) +1 similar issue
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-apl8/igt@gem_softpin@noreloc-s3.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-apl4/igt@gem_softpin@noreloc-s3.html
- shard-kbl: [PASS][24] -> [DMESG-WARN][25] ([i915#180]) +1 similar issue
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-kbl1/igt@gem_softpin@noreloc-s3.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-kbl7/igt@gem_softpin@noreloc-s3.html
* igt@gem_sync@basic-store-all:
- shard-tglb: [PASS][26] -> [INCOMPLETE][27] ([i915#472])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-tglb5/igt@gem_sync@basic-store-all.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-tglb5/igt@gem_sync@basic-store-all.html
* igt@gem_tiled_blits@interruptible:
- shard-hsw: [PASS][28] -> [FAIL][29] ([i915#818])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-hsw5/igt@gem_tiled_blits@interruptible.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-hsw2/igt@gem_tiled_blits@interruptible.html
* igt@i915_pm_rps@reset:
- shard-iclb: [PASS][30] -> [FAIL][31] ([i915#413])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-iclb8/igt@i915_pm_rps@reset.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-iclb5/igt@i915_pm_rps@reset.html
* igt@kms_cursor_crc@pipe-c-cursor-suspend:
- shard-kbl: [PASS][32] -> [INCOMPLETE][33] ([fdo#103665])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-kbl1/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-kbl4/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
* igt@kms_flip@plain-flip-ts-check-interruptible:
- shard-glk: [PASS][34] -> [FAIL][35] ([i915#34])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-glk6/igt@kms_flip@plain-flip-ts-check-interruptible.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-glk9/igt@kms_flip@plain-flip-ts-check-interruptible.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite:
- shard-apl: [PASS][36] -> [FAIL][37] ([i915#49])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-apl7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-apl6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite.html
- shard-kbl: [PASS][38] -> [FAIL][39] ([i915#49])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-kbl3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt:
- shard-snb: [PASS][40] -> [DMESG-WARN][41] ([i915#478])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-snb5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-snb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw:
- shard-tglb: [PASS][42] -> [FAIL][43] ([i915#49]) +1 similar issue
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-tglb1/igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-tglb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw.html
* igt@kms_psr@psr2_cursor_blt:
- shard-iclb: [PASS][44] -> [SKIP][45] ([fdo#109441]) +1 similar issue
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-iclb6/igt@kms_psr@psr2_cursor_blt.html
* igt@kms_setmode@basic:
- shard-apl: [PASS][46] -> [FAIL][47] ([i915#31])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-apl6/igt@kms_setmode@basic.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-apl1/igt@kms_setmode@basic.html
* igt@perf_pmu@busy-no-semaphores-vcs1:
- shard-iclb: [PASS][48] -> [SKIP][49] ([fdo#112080]) +8 similar issues
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-iclb2/igt@perf_pmu@busy-no-semaphores-vcs1.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-iclb3/igt@perf_pmu@busy-no-semaphores-vcs1.html
#### Possible fixes ####
* igt@gem_ctx_isolation@vcs1-clean:
- shard-iclb: [SKIP][50] ([fdo#109276] / [fdo#112080]) -> [PASS][51] +2 similar issues
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-iclb6/igt@gem_ctx_isolation@vcs1-clean.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-iclb2/igt@gem_ctx_isolation@vcs1-clean.html
* igt@gem_eio@kms:
- shard-snb: [DMESG-FAIL][52] ([i915#436]) -> [PASS][53]
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-snb1/igt@gem_eio@kms.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-snb6/igt@gem_eio@kms.html
* igt@gem_exec_create@forked:
- shard-tglb: [INCOMPLETE][54] ([CI#80] / [fdo#108838] / [i915#472]) -> [PASS][55]
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-tglb4/igt@gem_exec_create@forked.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-tglb2/igt@gem_exec_create@forked.html
* igt@gem_exec_gttfill@basic:
- shard-tglb: [INCOMPLETE][56] ([fdo#111593] / [i915#472]) -> [PASS][57] +1 similar issue
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-tglb3/igt@gem_exec_gttfill@basic.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-tglb7/igt@gem_exec_gttfill@basic.html
* igt@gem_exec_parallel@vcs1-fds:
- shard-iclb: [SKIP][58] ([fdo#112080]) -> [PASS][59] +9 similar issues
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-iclb5/igt@gem_exec_parallel@vcs1-fds.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-iclb1/igt@gem_exec_parallel@vcs1-fds.html
* igt@gem_exec_schedule@pi-distinct-iova-bsd:
- shard-iclb: [SKIP][60] ([i915#677]) -> [PASS][61] +1 similar issue
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-iclb4/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-iclb3/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
* igt@gem_exec_schedule@preempt-bsd:
- shard-iclb: [SKIP][62] ([fdo#112146]) -> [PASS][63] +5 similar issues
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-iclb2/igt@gem_exec_schedule@preempt-bsd.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-iclb3/igt@gem_exec_schedule@preempt-bsd.html
* igt@gem_exec_schedule@preempt-queue-contexts-bsd2:
- shard-tglb: [INCOMPLETE][64] ([fdo#111606] / [fdo#111677] / [i915#472]) -> [PASS][65]
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-tglb6/igt@gem_exec_schedule@preempt-queue-contexts-bsd2.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-tglb5/igt@gem_exec_schedule@preempt-queue-contexts-bsd2.html
* igt@gem_exec_suspend@basic-s0:
- shard-tglb: [INCOMPLETE][66] ([i915#472]) -> [PASS][67]
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-tglb3/igt@gem_exec_suspend@basic-s0.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-tglb1/igt@gem_exec_suspend@basic-s0.html
* igt@gem_exec_suspend@basic-s3:
- shard-kbl: [DMESG-WARN][68] ([i915#180]) -> [PASS][69] +1 similar issue
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-kbl3/igt@gem_exec_suspend@basic-s3.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-kbl3/igt@gem_exec_suspend@basic-s3.html
* igt@gem_persistent_relocs@forked-interruptible-thrashing:
- shard-kbl: [FAIL][70] ([i915#520]) -> [PASS][71]
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-kbl4/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-kbl1/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-apl: [FAIL][72] ([i915#644]) -> [PASS][73]
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-apl8/igt@gem_ppgtt@flink-and-close-vma-leak.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-apl1/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@gem_sync@basic-each:
- shard-tglb: [INCOMPLETE][74] ([i915#472] / [i915#707]) -> [PASS][75]
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-tglb7/igt@gem_sync@basic-each.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-tglb1/igt@gem_sync@basic-each.html
* igt@gem_userptr_blits@dmabuf-sync:
- shard-snb: [DMESG-WARN][76] ([fdo#111870]) -> [PASS][77] +1 similar issue
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-snb4/igt@gem_userptr_blits@dmabuf-sync.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-snb2/igt@gem_userptr_blits@dmabuf-sync.html
* igt@i915_pm_dc@dc5-dpms:
- shard-iclb: [FAIL][78] ([i915#447]) -> [PASS][79]
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-iclb3/igt@i915_pm_dc@dc5-dpms.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-iclb8/igt@i915_pm_dc@dc5-dpms.html
* igt@kms_cursor_crc@pipe-c-cursor-256x85-sliding:
- shard-tglb: [DMESG-WARN][80] ([i915#402]) -> [PASS][81] +13 similar issues
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-tglb4/igt@kms_cursor_crc@pipe-c-cursor-256x85-sliding.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-tglb2/igt@kms_cursor_crc@pipe-c-cursor-256x85-sliding.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-apl: [DMESG-WARN][82] ([i915#180]) -> [PASS][83] +3 similar issues
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-apl4/igt@kms_flip@flip-vs-suspend-interruptible.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-apl2/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt:
- shard-tglb: [FAIL][84] ([i915#49]) -> [PASS][85]
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-tglb5/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-tglb7/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-wc:
- shard-tglb: [DMESG-FAIL][86] ([i915#402]) -> [PASS][87] +2 similar issues
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-tglb4/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-wc.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-tglb7/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-wc.html
* igt@kms_psr2_su@page_flip:
- shard-iclb: [SKIP][88] ([fdo#109642] / [fdo#111068]) -> [PASS][89]
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-iclb8/igt@kms_psr2_su@page_flip.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-iclb2/igt@kms_psr2_su@page_flip.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-iclb: [SKIP][90] ([fdo#109441]) -> [PASS][91] +1 similar issue
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-iclb7/igt@kms_psr@psr2_sprite_plane_move.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
* igt@prime_busy@hang-bsd2:
- shard-iclb: [SKIP][92] ([fdo#109276]) -> [PASS][93] +20 similar issues
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-iclb3/igt@prime_busy@hang-bsd2.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-iclb4/igt@prime_busy@hang-bsd2.html
#### Warnings ####
* igt@gem_userptr_blits@sync-unmap-cycles:
- shard-snb: [DMESG-WARN][94] ([fdo#111870]) -> [DMESG-WARN][95] ([fdo#110789] / [fdo#111870]) +1 similar issue
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-snb4/igt@gem_userptr_blits@sync-unmap-cycles.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-snb6/igt@gem_userptr_blits@sync-unmap-cycles.html
* igt@i915_pm_dc@dc6-dpms:
- shard-tglb: [FAIL][96] ([i915#454]) -> [SKIP][97] ([i915#468])
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-tglb4/igt@i915_pm_dc@dc6-dpms.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-tglb3/igt@i915_pm_dc@dc6-dpms.html
* igt@kms_color@pipe-d-ctm-0-25:
- shard-tglb: [DMESG-WARN][98] ([i915#402]) -> [FAIL][99] ([i915#315])
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5359/shard-tglb4/igt@kms_color@pipe-d-ctm-0-25.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/shard-tglb5/igt@kms_color@pipe-d-ctm-0-25.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[CI#80]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/80
[fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
[fdo#108838]: https://bugs.freedesktop.org/show_bug.cgi?id=108838
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110789]: https://bugs.freedesktop.org/show_bug.cgi?id=110789
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111593]: https://bugs.freedesktop.org/show_bug.cgi?id=111593
[fdo#111606]: https://bugs.freedesktop.org/show_bug.cgi?id=111606
[fdo#111677]: https://bugs.freedesktop.org/show_bug.cgi?id=111677
[fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736
[fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
[fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
[fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
[i915#315]: https://gitlab.freedesktop.org/drm/intel/issues/315
[i915#34]: https://gitlab.freedesktop.org/drm/intel/issues/34
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#413]: https://gitlab.freedesktop.org/drm/intel/issues/413
[i915#436]: https://gitlab.freedesktop.org/drm/intel/issues/436
[i915#447]: https://gitlab.freedesktop.org/drm/intel/issues/447
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#468]: https://gitlab.freedesktop.org/drm/intel/issues/468
[i915#472]: https://gitlab.freedesktop.org/drm/intel/issues/472
[i915#478]: https://gitlab.freedesktop.org/drm/intel/issues/478
[i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
[i915#520]: https://gitlab.freedesktop.org/drm/intel/issues/520
[i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
[i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
[i915#707]: https://gitlab.freedesktop.org/drm/intel/issues/707
[i915#796]: https://gitlab.freedesktop.org/drm/intel/issues/796
[i915#818]: https://gitlab.freedesktop.org/drm/intel/issues/818
Participating hosts (8 -> 8)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_5359 -> IGTPW_3912
CI-20190529: 20190529
CI_DRM_7714: b633f28f2de80cdb861d6c1c3b4df6fd2d53239f @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_3912: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/index.html
IGT_5359: 28451bcec2245dcc1fd0eb1d4c76335b2b4f97a5 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3912/index.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2020-01-10 20:05 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-01-09 22:23 [Intel-gfx] [PATCH i-g-t] test/i915_pm_rc6_residency: Check we enter RC6 when mostly idle Chris Wilson
2020-01-09 22:23 ` [igt-dev] " Chris Wilson
2020-01-09 22:41 ` [igt-dev] ✗ GitLab.Pipeline: failure for " Patchwork
2020-01-09 22:51 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
2020-01-10 16:16 ` [Intel-gfx] [PATCH i-g-t] " Imre Deak
2020-01-10 16:16 ` [igt-dev] " Imre Deak
2020-01-10 16:26 ` [Intel-gfx] " Chris Wilson
2020-01-10 16:26 ` [igt-dev] " Chris Wilson
2020-01-10 20:05 ` [igt-dev] ✗ Fi.CI.IGT: failure for " Patchwork
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