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* [igt-dev] [PATCH i-g-t] Distinguish particular engines during calculating nop calibration.
@ 2020-01-16 13:55 Anna Karas
  2020-01-16 15:06 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork
                   ` (10 more replies)
  0 siblings, 11 replies; 22+ messages in thread
From: Anna Karas @ 2020-01-16 13:55 UTC (permalink / raw)
  To: igt-dev

Extend handling -n parameter by accepting multiple values of per
engine nop calibration. Add raw numbers handling to set default
calibration values. Print copyable and pastable string with
calibrations. Allow to switch between calculating in parallel
or doing it sequentially.

Accepted input values:
-n 123456
All calibrations will be set to 123456.

-n ENG=value,ENG2=value2,value3
i.e.
-n RCS=123456,BCS=345678,999999
RCS engine's value is set to 123456, BCS engine's value is set to
345678, 999999 is copied to rest of engines. All engines must be set;
you can either provide values for each of the engines, or you can set
specific values and provide a default value for the others.

-n value,ENG1=value1,ENG2=value2
First, value is copied to all engines, then value1 overrides ENG1, and
finally value2 overrides ENG2.

New output follows the pattern:
Nop calibrations for 1000us delay is: <eng1>=<v1>,<eng2>=<v2>,...
So you can easily copy-paste it to the next invocation.

Switching between calculation modes:
Run program with -T parameter to calculate calibrations in parallel.
The calculations are performed sequentially by default.

Signed-off-by: Anna Karas <anna.karas@intel.com>
---
 benchmarks/gem_wsim.c | 251 ++++++++++++++++++++++++++++++++++--------
 1 file changed, 207 insertions(+), 44 deletions(-)

diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c
index 9156fdc9..faac01b0 100644
--- a/benchmarks/gem_wsim.c
+++ b/benchmarks/gem_wsim.c
@@ -23,6 +23,7 @@
  */
 
 #include <unistd.h>
+#include <stdbool.h>
 #include <stdlib.h>
 #include <stdint.h>
 #include <stdio.h>
@@ -55,6 +56,7 @@
 #include "i915/gem_mman.h"
 
 #include "ewma.h"
+#include "i915/gem_engine_topology.h"
 
 enum intel_engine_id {
 	DEFAULT,
@@ -240,7 +242,8 @@ struct workload
 
 struct intel_mmio_data mmio_data;
 static const unsigned int nop_calibration_us = 1000;
-static unsigned long nop_calibration;
+static bool has_nop_calibration = false;
+static bool sequential = true;
 
 static unsigned int master_prng;
 
@@ -281,6 +284,54 @@ static const char *ring_str_map[NUM_ENGINES] = {
 	[VECS] = "VECS",
 };
 
+/* stores calibrations for particular engines */
+static unsigned long engine_calib_map[NUM_ENGINES];
+
+static enum intel_engine_id
+ci_to_engine_id(int class, int instance)
+{
+	static const struct {
+		int class;
+		int instance;
+		unsigned int id;
+	} map[] = {
+		{ I915_ENGINE_CLASS_RENDER, 0, RCS },
+		{ I915_ENGINE_CLASS_COPY, 0, BCS },
+		{ I915_ENGINE_CLASS_VIDEO, 0, VCS1 },
+		{ I915_ENGINE_CLASS_VIDEO, 1, VCS2 },
+		{ I915_ENGINE_CLASS_VIDEO, 2, VCS2 }, /* FIXME/ICL */
+		{ I915_ENGINE_CLASS_VIDEO_ENHANCE, 0, VECS },
+	};
+
+	unsigned int i;
+
+	for (i = 0; i < ARRAY_SIZE(map); i++) {
+		if (class == map[i].class && instance == map[i].instance) 
+			return map[i].id;
+	}
+	return -1;
+}
+
+static void 
+apply_unset_calibrations(unsigned long raw_number)
+{
+	for (int i = 0; i < NUM_ENGINES; i++) 
+		engine_calib_map[i] += engine_calib_map[i] ? 0 : raw_number;
+
+	has_nop_calibration = true;
+}
+
+static void 
+print_engines_calibrations(void) 
+{
+	printf("Nop calibrations for %uus delay is: ", nop_calibration_us);
+
+	for (int i = 0; i < NUM_ENGINES; i++) {
+		printf("%s%s=%lu", i > 0 ? "," : "", ring_str_map[i], engine_calib_map[i]);
+	}
+	printf("\n");
+}
+
 static int
 parse_dependencies(unsigned int nr_steps, struct w_step *w, char *_desc)
 {
@@ -1082,17 +1133,17 @@ static unsigned int get_duration(struct workload *wrk, struct w_step *w)
 		       (dur->max + 1 - dur->min);
 }
 
-static unsigned long get_bb_sz(unsigned int duration)
+static unsigned long get_bb_sz(unsigned int duration, enum intel_engine_id engine)
 {
-	return ALIGN(duration * nop_calibration * sizeof(uint32_t) /
-		     nop_calibration_us, sizeof(uint32_t));
+	return ALIGN(duration * engine_calib_map[engine] * sizeof(uint32_t) /
+		nop_calibration_us, sizeof(uint32_t));
 }
 
 static void
 init_bb(struct w_step *w, unsigned int flags)
 {
 	const unsigned int arb_period =
-			get_bb_sz(w->preempt_us) / sizeof(uint32_t);
+			get_bb_sz(w->preempt_us, w->engine) / sizeof(uint32_t);
 	const unsigned int mmap_len = ALIGN(w->bb_sz, 4096);
 	unsigned int i;
 	uint32_t *ptr;
@@ -1319,10 +1370,11 @@ alloc_step_batch(struct workload *wrk, struct w_step *w, unsigned int flags)
 
 	if (w->unbound_duration)
 		/* nops + MI_ARB_CHK + MI_BATCH_BUFFER_START */
-		w->bb_sz = max(PAGE_SIZE, get_bb_sz(w->preempt_us)) +
+		w->bb_sz = max(PAGE_SIZE, get_bb_sz(w->preempt_us, w->engine)) +
 			   (1 + 3) * sizeof(uint32_t);
 	else
-		w->bb_sz = get_bb_sz(w->duration.max);
+		w->bb_sz = get_bb_sz(w->duration.max, w->engine);
+
 	w->bb_handle = w->obj[j].handle = gem_create(fd, w->bb_sz + (w->unbound_duration ? 4096 : 0));
 	init_bb(w, flags);
 	w->obj[j].relocation_count = terminate_bb(w, flags);
@@ -2622,7 +2674,7 @@ do_eb(struct workload *wrk, struct w_step *w, enum intel_engine_id engine,
 	w->eb.batch_start_offset =
 		w->unbound_duration ?
 		0 :
-		ALIGN(w->bb_sz - get_bb_sz(get_duration(wrk, w)),
+		ALIGN(w->bb_sz - get_bb_sz(get_duration(wrk, w), w->engine),
 		      2 * sizeof(uint32_t));
 
 	for (i = 0; i < w->fence_deps.nr; i++) {
@@ -2899,15 +2951,18 @@ static void fini_workload(struct workload *wrk)
 	free(wrk);
 }
 
-static unsigned long calibrate_nop(unsigned int tolerance_pct)
+static unsigned long calibrate_nop(unsigned int tolerance_pct, struct intel_execution_engine2 *engine)
 {
 	const uint32_t bbe = 0xa << 23;
 	unsigned int loops = 17;
 	unsigned int usecs = nop_calibration_us;
 	struct drm_i915_gem_exec_object2 obj = {};
-	struct drm_i915_gem_execbuffer2 eb =
-		{ .buffer_count = 1, .buffers_ptr = (uintptr_t)&obj};
-	long size, last_size;
+	struct drm_i915_gem_execbuffer2 eb = { 
+		.buffer_count = 1, 
+		.buffers_ptr = (uintptr_t)&obj,
+		.flags = engine->flags
+	};
+	unsigned long size, last_size;
 	struct timespec t_0, t_end;
 
 	clock_gettime(CLOCK_MONOTONIC, &t_0);
@@ -2939,6 +2994,77 @@ static unsigned long calibrate_nop(unsigned int tolerance_pct)
 	return size / sizeof(uint32_t);
 }
 
+static void 
+calibrate_sequentially(void) 
+{
+	struct intel_execution_engine2 *engine;
+	enum intel_engine_id eng_id;
+
+	__for_each_physical_engine(fd, engine) {
+		eng_id = ci_to_engine_id(engine->class, engine->instance);
+		igt_assert(eng_id >= 0);
+		engine_calib_map[eng_id] = calibrate_nop(fd, engine);
+	}
+}
+
+struct thread_data {
+	struct intel_execution_engine2 *eng;
+	pthread_t thr;
+	unsigned long calib;
+};
+
+static void *
+engine_calibration_thread(void *data) 
+{
+	struct thread_data *thr_d = (struct thread_data *) data;
+
+	thr_d->calib = calibrate_nop(fd, thr_d->eng);
+	return NULL;
+}
+
+static void 
+calibrate_in_parallel(void) 
+{
+	struct thread_data *thr_d = malloc(NUM_ENGINES * sizeof(*thr_d));
+	struct intel_execution_engine2 *engine;
+	enum intel_engine_id id;
+	int ret;
+
+	__for_each_physical_engine(fd, engine) {
+		id = ci_to_engine_id(engine->class, engine->instance);
+		thr_d[id].eng = engine;
+		ret = pthread_create(&thr_d[id].thr, NULL, engine_calibration_thread, &thr_d[id]);
+		igt_assert_eq(ret, 0);
+	}
+
+	__for_each_physical_engine(fd, engine) {
+		id = ci_to_engine_id(engine->class, engine->instance);
+		igt_assert(id >= 0);
+
+		ret = pthread_join(thr_d[id].thr, NULL);
+		igt_assert_eq(ret, 0);
+		engine_calib_map[id] = thr_d[id].calib;
+	}
+
+	free(thr_d);
+}
+
+static void 
+calibrate_engines(void) 
+{
+	if (sequential) 
+		calibrate_sequentially();
+	else 
+		calibrate_in_parallel();
+
+	has_nop_calibration = true;
+
+	if (verbose > 1) 
+		print_engines_calibrations();
+
+}
+
+
 static void print_help(void)
 {
 	unsigned int i;
@@ -2951,27 +3077,30 @@ static void print_help(void)
 "be provided when running the simulation in subsequent invocations.\n"
 "\n"
 "Options:\n"
-"  -h              This text.\n"
-"  -q              Be quiet - do not output anything to stdout.\n"
-"  -n <n>          Nop calibration value.\n"
-"  -t <n>          Nop calibration tolerance percentage.\n"
-"                  Use when there is a difficulty obtaining calibration with the\n"
-"                  default settings.\n"
-"  -I <n>          Initial randomness seed.\n"
-"  -p <n>          Context priority to use for the following workload on the\n"
-"                  command line.\n"
-"  -w <desc|path>  Filename or a workload descriptor.\n"
-"                  Can be given multiple times.\n"
-"  -W <desc|path>  Filename or a master workload descriptor.\n"
-"                  Only one master workload can be optinally specified in which\n"
-"                  case all other workloads become background ones and run as\n"
-"                  long as the master.\n"
-"  -a <desc|path>  Append a workload to all other workloads.\n"
-"  -r <n>          How many times to emit the workload.\n"
-"  -c <n>          Fork N clients emitting the workload simultaneously.\n"
-"  -x              Swap VCS1 and VCS2 engines in every other client.\n"
-"  -b <n>          Load balancing to use.\n"
-"                  Available load balancers are:"
+"  -h                This text.\n"
+"  -q                Be quiet - do not output anything to stdout.\n"
+"  -n <n |           Nop calibration value - single value is set to all engines\n"
+"  e1=v1,e2=v2,n...> without specified value; you can also specify calibrations for\n"
+"                    particular engines.\n"
+"  -t <n>            Nop calibration tolerance percentage.\n"
+"  -T                Disable sequential calibration and perform calibration in parallel.\n"
+"                    Use when there is a difficulty obtaining calibration with the\n"
+"                    default settings.\n"
+"  -I <n>            Initial randomness seed.\n"
+"  -p <n>            Context priority to use for the following workload on the\n"
+"                    command line.\n"
+"  -w <desc|path>    Filename or a workload descriptor.\n"
+"                    Can be given multiple times.\n"
+"  -W <desc|path>    Filename or a master workload descriptor.\n"
+"                    Only one master workload can be optinally specified in which\n"
+"                    case all other workloads become background ones and run as\n"
+"                    long as the master.\n"
+"  -a <desc|path>    Append a workload to all other workloads.\n"
+"  -r <n>            How many times to emit the workload.\n"
+"  -c <n>            Fork N clients emitting the workload simultaneously.\n"
+"  -x                Swap VCS1 and VCS2 engines in every other client.\n"
+"  -b <n>            Load balancing to use.\n"
+"                    Available load balancers are:"
 	);
 
 	for (i = 0; i < ARRAY_SIZE(all_balancers); i++) {
@@ -3117,6 +3246,9 @@ int main(int argc, char **argv)
 	int prio = 0;
 	double t;
 	int i, c;
+	char *subopts, *value;
+	enum intel_engine_id res;
+	int raw_number = 0;
 
 	/*
 	 * Open the device via the low-level API so we can do the GPU quiesce
@@ -3134,7 +3266,7 @@ int main(int argc, char **argv)
 	master_prng = time(NULL);
 
 	while ((c = getopt(argc, argv,
-			   "hqv2RsSHxGdc:n:r:w:W:a:t:b:p:I:")) != -1) {
+			   "Thqv2RsSHxGdc:n:r:w:W:a:t:b:p:I:")) != -1) {
 		switch (c) {
 		case 'W':
 			if (master_workload >= 0) {
@@ -3163,8 +3295,41 @@ int main(int argc, char **argv)
 		case 't':
 			tolerance_pct = strtol(optarg, NULL, 0);
 			break;
+		case 'T':
+			sequential = false;
+			break;
+
 		case 'n':
-			nop_calibration = strtol(optarg, NULL, 0);
+			subopts = optarg;
+			while (*subopts != '\0') {
+				res = getsubopt(&subopts, (char **)ring_str_map, &value);
+				switch (res) {
+				case RCS ... VECS:
+					engine_calib_map[res] = atol(value);
+					has_nop_calibration = true;
+					break;
+				default:
+					/* raw number was given - two cases: */
+
+					/* raw number is already set  */
+					if (raw_number) {
+						wsim_err("Default engine calibration provided more than once.\n");
+						goto err;
+					}
+
+					/* raw number has been set for the first time */
+					raw_number = atol(value);
+
+					if (value) {
+						apply_unset_calibrations(raw_number);
+					} else {
+						/* not engine=value pair, not raw number, so it's just an error */
+						wsim_err("Unknown engine name: %s/\n", value);
+						goto err;
+					}
+					break;
+				}
+			}
 			break;
 		case 'r':
 			repeat = strtol(optarg, NULL, 0);
@@ -3242,14 +3407,13 @@ int main(int argc, char **argv)
 		goto err;
 	}
 
-	if (!nop_calibration) {
-		if (verbose > 1)
-			printf("Calibrating nop delay with %u%% tolerance...\n",
+	if (!has_nop_calibration) {
+		if (verbose > 1) {
+			printf("Calibrating nop delays with %u%% tolerance...\n",
 				tolerance_pct);
-		nop_calibration = calibrate_nop(tolerance_pct);
-		if (verbose)
-			printf("Nop calibration for %uus delay is %lu.\n",
-			       nop_calibration_us, nop_calibration);
+		}
+
+		calibrate_engines();
 
 		goto out;
 	}
@@ -3309,8 +3473,7 @@ int main(int argc, char **argv)
 
 	if (verbose > 1) {
 		printf("Random seed is %u.\n", master_prng);
-		printf("Using %lu nop calibration for %uus delay.\n",
-		       nop_calibration, nop_calibration_us);
+		print_engines_calibrations();
 		printf("%u client%s.\n", clients, clients > 1 ? "s" : "");
 		if (flags & SWAPVCS)
 			printf("Swapping VCS rings between clients.\n");
-- 
2.19.0

_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply related	[flat|nested] 22+ messages in thread

* [igt-dev] ✓ Fi.CI.BAT: success for Distinguish particular engines during calculating nop calibration.
  2020-01-16 13:55 [igt-dev] [PATCH i-g-t] Distinguish particular engines during calculating nop calibration Anna Karas
@ 2020-01-16 15:06 ` Patchwork
  2020-01-16 17:38 ` [igt-dev] [PATCH i-g-t] " Tvrtko Ursulin
                   ` (9 subsequent siblings)
  10 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2020-01-16 15:06 UTC (permalink / raw)
  To: Anna Karas; +Cc: igt-dev

== Series Details ==

Series: Distinguish particular engines during calculating nop calibration.
URL   : https://patchwork.freedesktop.org/series/72113/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7754 -> IGTPW_3928
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_3928:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_flip@basic-flip-vs-dpms:
    - {fi-kbl-7560u}:     NOTRUN -> [FAIL][1] +5 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/fi-kbl-7560u/igt@kms_flip@basic-flip-vs-dpms.html

  
Known issues
------------

  Here are the changes found in IGTPW_3928 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_module_load@reload-with-fault-injection:
    - fi-skl-6770hq:      [PASS][2] -> [INCOMPLETE][3] ([i915#671])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/fi-skl-6770hq/igt@i915_module_load@reload-with-fault-injection.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/fi-skl-6770hq/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_selftest@live_blt:
    - fi-hsw-4770:        [PASS][4] -> [DMESG-FAIL][5] ([i915#553] / [i915#725])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/fi-hsw-4770/igt@i915_selftest@live_blt.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/fi-hsw-4770/igt@i915_selftest@live_blt.html

  * igt@i915_selftest@live_execlists:
    - fi-kbl-soraka:      [PASS][6] -> [DMESG-FAIL][7] ([i915#656])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/fi-kbl-soraka/igt@i915_selftest@live_execlists.html

  
#### Possible fixes ####

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][8] ([fdo#111096] / [i915#323]) -> [PASS][9]
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
  [i915#323]: https://gitlab.freedesktop.org/drm/intel/issues/323
  [i915#553]: https://gitlab.freedesktop.org/drm/intel/issues/553
  [i915#656]: https://gitlab.freedesktop.org/drm/intel/issues/656
  [i915#671]: https://gitlab.freedesktop.org/drm/intel/issues/671
  [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725


Participating hosts (48 -> 45)
------------------------------

  Additional (3): fi-kbl-7560u fi-byt-n2820 fi-snb-2520m 
  Missing    (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-tgl-y fi-byt-clapper 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5370 -> IGTPW_3928

  CI-20190529: 20190529
  CI_DRM_7754: 4db14301dfa813d24cd2ad46552af83d493c5d12 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3928: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/index.html
  IGT_5370: a98fb02cc2816a48eec374392d9b6941abb6af2c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/index.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [igt-dev] [PATCH i-g-t] Distinguish particular engines during calculating nop calibration.
  2020-01-16 13:55 [igt-dev] [PATCH i-g-t] Distinguish particular engines during calculating nop calibration Anna Karas
  2020-01-16 15:06 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork
@ 2020-01-16 17:38 ` Tvrtko Ursulin
  2020-01-19  8:28 ` [igt-dev] ✓ Fi.CI.IGT: success for " Patchwork
                   ` (8 subsequent siblings)
  10 siblings, 0 replies; 22+ messages in thread
From: Tvrtko Ursulin @ 2020-01-16 17:38 UTC (permalink / raw)
  To: Anna Karas, igt-dev


On 16/01/2020 13:55, Anna Karas wrote:
> Extend handling -n parameter by accepting multiple values of per
> engine nop calibration. Add raw numbers handling to set default
> calibration values. Print copyable and pastable string with
> calibrations. Allow to switch between calculating in parallel
> or doing it sequentially.
> 
> Accepted input values:
> -n 123456
> All calibrations will be set to 123456.
> 
> -n ENG=value,ENG2=value2,value3
> i.e.
> -n RCS=123456,BCS=345678,999999
> RCS engine's value is set to 123456, BCS engine's value is set to
> 345678, 999999 is copied to rest of engines. All engines must be set;
> you can either provide values for each of the engines, or you can set
> specific values and provide a default value for the others.
> 
> -n value,ENG1=value1,ENG2=value2
> First, value is copied to all engines, then value1 overrides ENG1, and
> finally value2 overrides ENG2.
> 
> New output follows the pattern:
> Nop calibrations for 1000us delay is: <eng1>=<v1>,<eng2>=<v2>,...
> So you can easily copy-paste it to the next invocation.
> 
> Switching between calculation modes:
> Run program with -T parameter to calculate calibrations in parallel.
> The calculations are performed sequentially by default.

Put "gem_wsim:" prefix in patch title and fix this please:

$ git am ...
Applying: Distinguish particular engines during calculating nop calibration.
.git/rebase-apply/patch:61: trailing whitespace.
                 if (class == map[i].class && instance == map[i].instance)
.git/rebase-apply/patch:67: trailing whitespace.
static void
.git/rebase-apply/patch:70: trailing whitespace.
         for (int i = 0; i < NUM_ENGINES; i++)
.git/rebase-apply/patch:76: trailing whitespace.
static void
.git/rebase-apply/patch:77: trailing whitespace.
print_engines_calibrations(void)
warning: squelched 12 whitespace errors
warning: 17 lines add whitespace errors.

Then when printing out calibrations:

Nop calibrations for 1000us delay is: 
DEFAULT=0,RCS=813060,BCS=381189,VCS=0,VCS1=846222,VCS2=846409,VECS=890365

Please skip DEFAULT and VCS since those have special meaning in 
gem_wsim. It will be bit ugly but it will do for now. At some later 
point I need to refactor how tool think about engines in a bit smarter way.

Also please reject DEFAULT and VCS in the string passed to -n.

> 
> Signed-off-by: Anna Karas <anna.karas@intel.com>
> ---
>   benchmarks/gem_wsim.c | 251 ++++++++++++++++++++++++++++++++++--------
>   1 file changed, 207 insertions(+), 44 deletions(-)
> 
> diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c
> index 9156fdc9..faac01b0 100644
> --- a/benchmarks/gem_wsim.c
> +++ b/benchmarks/gem_wsim.c
> @@ -23,6 +23,7 @@
>    */
>   
>   #include <unistd.h>
> +#include <stdbool.h>
>   #include <stdlib.h>
>   #include <stdint.h>
>   #include <stdio.h>
> @@ -55,6 +56,7 @@
>   #include "i915/gem_mman.h"
>   
>   #include "ewma.h"
> +#include "i915/gem_engine_topology.h"
>   
>   enum intel_engine_id {
>   	DEFAULT,
> @@ -240,7 +242,8 @@ struct workload
>   
>   struct intel_mmio_data mmio_data;
>   static const unsigned int nop_calibration_us = 1000;
> -static unsigned long nop_calibration;
> +static bool has_nop_calibration = false;
> +static bool sequential = true;
>   
>   static unsigned int master_prng;
>   
> @@ -281,6 +284,54 @@ static const char *ring_str_map[NUM_ENGINES] = {
>   	[VECS] = "VECS",
>   };
>   
> +/* stores calibrations for particular engines */
> +static unsigned long engine_calib_map[NUM_ENGINES];
> +
> +static enum intel_engine_id
> +ci_to_engine_id(int class, int instance)
> +{
> +	static const struct {
> +		int class;
> +		int instance;
> +		unsigned int id;
> +	} map[] = {
> +		{ I915_ENGINE_CLASS_RENDER, 0, RCS },
> +		{ I915_ENGINE_CLASS_COPY, 0, BCS },
> +		{ I915_ENGINE_CLASS_VIDEO, 0, VCS1 },
> +		{ I915_ENGINE_CLASS_VIDEO, 1, VCS2 },
> +		{ I915_ENGINE_CLASS_VIDEO, 2, VCS2 }, /* FIXME/ICL */
> +		{ I915_ENGINE_CLASS_VIDEO_ENHANCE, 0, VECS },
> +	};
> +
> +	unsigned int i;
> +
> +	for (i = 0; i < ARRAY_SIZE(map); i++) {
> +		if (class == map[i].class && instance == map[i].instance)
> +			return map[i].id;
> +	}
> +	return -1;
> +}
> +
> +static void
> +apply_unset_calibrations(unsigned long raw_number)
> +{
> +	for (int i = 0; i < NUM_ENGINES; i++)
> +		engine_calib_map[i] += engine_calib_map[i] ? 0 : raw_number;
> +
> +	has_nop_calibration = true;
> +}
> +
> +static void
> +print_engines_calibrations(void)
> +{
> +	printf("Nop calibrations for %uus delay is: ", nop_calibration_us);
> +
> +	for (int i = 0; i < NUM_ENGINES; i++) {
> +		printf("%s%s=%lu", i > 0 ? "," : "", ring_str_map[i], engine_calib_map[i]);
> +	}
> +	printf("\n");
> +}
> +
>   static int
>   parse_dependencies(unsigned int nr_steps, struct w_step *w, char *_desc)
>   {
> @@ -1082,17 +1133,17 @@ static unsigned int get_duration(struct workload *wrk, struct w_step *w)
>   		       (dur->max + 1 - dur->min);
>   }
>   
> -static unsigned long get_bb_sz(unsigned int duration)
> +static unsigned long get_bb_sz(unsigned int duration, enum intel_engine_id engine)
>   {
> -	return ALIGN(duration * nop_calibration * sizeof(uint32_t) /
> -		     nop_calibration_us, sizeof(uint32_t));
> +	return ALIGN(duration * engine_calib_map[engine] * sizeof(uint32_t) /
> +		nop_calibration_us, sizeof(uint32_t));
>   }
>   
>   static void
>   init_bb(struct w_step *w, unsigned int flags)
>   {
>   	const unsigned int arb_period =
> -			get_bb_sz(w->preempt_us) / sizeof(uint32_t);
> +			get_bb_sz(w->preempt_us, w->engine) / sizeof(uint32_t);
>   	const unsigned int mmap_len = ALIGN(w->bb_sz, 4096);
>   	unsigned int i;
>   	uint32_t *ptr;
> @@ -1319,10 +1370,11 @@ alloc_step_batch(struct workload *wrk, struct w_step *w, unsigned int flags)
>   
>   	if (w->unbound_duration)
>   		/* nops + MI_ARB_CHK + MI_BATCH_BUFFER_START */
> -		w->bb_sz = max(PAGE_SIZE, get_bb_sz(w->preempt_us)) +
> +		w->bb_sz = max(PAGE_SIZE, get_bb_sz(w->preempt_us, w->engine)) +
>   			   (1 + 3) * sizeof(uint32_t);
>   	else
> -		w->bb_sz = get_bb_sz(w->duration.max);
> +		w->bb_sz = get_bb_sz(w->duration.max, w->engine);
> +
>   	w->bb_handle = w->obj[j].handle = gem_create(fd, w->bb_sz + (w->unbound_duration ? 4096 : 0));
>   	init_bb(w, flags);
>   	w->obj[j].relocation_count = terminate_bb(w, flags);
> @@ -2622,7 +2674,7 @@ do_eb(struct workload *wrk, struct w_step *w, enum intel_engine_id engine,
>   	w->eb.batch_start_offset =
>   		w->unbound_duration ?
>   		0 :
> -		ALIGN(w->bb_sz - get_bb_sz(get_duration(wrk, w)),
> +		ALIGN(w->bb_sz - get_bb_sz(get_duration(wrk, w), w->engine),
>   		      2 * sizeof(uint32_t));
>   
>   	for (i = 0; i < w->fence_deps.nr; i++) {
> @@ -2899,15 +2951,18 @@ static void fini_workload(struct workload *wrk)
>   	free(wrk);
>   }
>   
> -static unsigned long calibrate_nop(unsigned int tolerance_pct)
> +static unsigned long calibrate_nop(unsigned int tolerance_pct, struct intel_execution_engine2 *engine)
>   {
>   	const uint32_t bbe = 0xa << 23;
>   	unsigned int loops = 17;
>   	unsigned int usecs = nop_calibration_us;
>   	struct drm_i915_gem_exec_object2 obj = {};
> -	struct drm_i915_gem_execbuffer2 eb =
> -		{ .buffer_count = 1, .buffers_ptr = (uintptr_t)&obj};
> -	long size, last_size;
> +	struct drm_i915_gem_execbuffer2 eb = {
> +		.buffer_count = 1,
> +		.buffers_ptr = (uintptr_t)&obj,
> +		.flags = engine->flags
> +	};
> +	unsigned long size, last_size;
>   	struct timespec t_0, t_end;
>   
>   	clock_gettime(CLOCK_MONOTONIC, &t_0);
> @@ -2939,6 +2994,77 @@ static unsigned long calibrate_nop(unsigned int tolerance_pct)
>   	return size / sizeof(uint32_t);
>   }
>   
> +static void
> +calibrate_sequentially(void)
> +{
> +	struct intel_execution_engine2 *engine;
> +	enum intel_engine_id eng_id;
> +
> +	__for_each_physical_engine(fd, engine) {
> +		eng_id = ci_to_engine_id(engine->class, engine->instance);
> +		igt_assert(eng_id >= 0);
> +		engine_calib_map[eng_id] = calibrate_nop(fd, engine);
> +	}
> +}
> +
> +struct thread_data {
> +	struct intel_execution_engine2 *eng;
> +	pthread_t thr;
> +	unsigned long calib;
> +};
> +
> +static void *
> +engine_calibration_thread(void *data)
> +{
> +	struct thread_data *thr_d = (struct thread_data *) data;
> +
> +	thr_d->calib = calibrate_nop(fd, thr_d->eng);
> +	return NULL;
> +}
> +
> +static void
> +calibrate_in_parallel(void)
> +{
> +	struct thread_data *thr_d = malloc(NUM_ENGINES * sizeof(*thr_d));
> +	struct intel_execution_engine2 *engine;
> +	enum intel_engine_id id;
> +	int ret;
> +
> +	__for_each_physical_engine(fd, engine) {
> +		id = ci_to_engine_id(engine->class, engine->instance);
> +		thr_d[id].eng = engine;
> +		ret = pthread_create(&thr_d[id].thr, NULL, engine_calibration_thread, &thr_d[id]);
> +		igt_assert_eq(ret, 0);
> +	}
> +
> +	__for_each_physical_engine(fd, engine) {
> +		id = ci_to_engine_id(engine->class, engine->instance);
> +		igt_assert(id >= 0);
> +
> +		ret = pthread_join(thr_d[id].thr, NULL);
> +		igt_assert_eq(ret, 0);
> +		engine_calib_map[id] = thr_d[id].calib;
> +	}
> +
> +	free(thr_d);
> +}
> +
> +static void
> +calibrate_engines(void)
> +{
> +	if (sequential)
> +		calibrate_sequentially();
> +	else
> +		calibrate_in_parallel();
> +
> +	has_nop_calibration = true;
> +
> +	if (verbose > 1)
> +		print_engines_calibrations();
> +
> +}
> +
> +
>   static void print_help(void)
>   {
>   	unsigned int i;
> @@ -2951,27 +3077,30 @@ static void print_help(void)
>   "be provided when running the simulation in subsequent invocations.\n"
>   "\n"
>   "Options:\n"
> -"  -h              This text.\n"
> -"  -q              Be quiet - do not output anything to stdout.\n"
> -"  -n <n>          Nop calibration value.\n"
> -"  -t <n>          Nop calibration tolerance percentage.\n"
> -"                  Use when there is a difficulty obtaining calibration with the\n"
> -"                  default settings.\n"
> -"  -I <n>          Initial randomness seed.\n"
> -"  -p <n>          Context priority to use for the following workload on the\n"
> -"                  command line.\n"
> -"  -w <desc|path>  Filename or a workload descriptor.\n"
> -"                  Can be given multiple times.\n"
> -"  -W <desc|path>  Filename or a master workload descriptor.\n"
> -"                  Only one master workload can be optinally specified in which\n"
> -"                  case all other workloads become background ones and run as\n"
> -"                  long as the master.\n"
> -"  -a <desc|path>  Append a workload to all other workloads.\n"
> -"  -r <n>          How many times to emit the workload.\n"
> -"  -c <n>          Fork N clients emitting the workload simultaneously.\n"
> -"  -x              Swap VCS1 and VCS2 engines in every other client.\n"
> -"  -b <n>          Load balancing to use.\n"
> -"                  Available load balancers are:"
> +"  -h                This text.\n"
> +"  -q                Be quiet - do not output anything to stdout.\n"
> +"  -n <n |           Nop calibration value - single value is set to all engines\n"
> +"  e1=v1,e2=v2,n...> without specified value; you can also specify calibrations for\n"
> +"                    particular engines.\n"
> +"  -t <n>            Nop calibration tolerance percentage.\n"
> +"  -T                Disable sequential calibration and perform calibration in parallel.\n"
> +"                    Use when there is a difficulty obtaining calibration with the\n"
> +"                    default settings.\n"
> +"  -I <n>            Initial randomness seed.\n"
> +"  -p <n>            Context priority to use for the following workload on the\n"
> +"                    command line.\n"
> +"  -w <desc|path>    Filename or a workload descriptor.\n"
> +"                    Can be given multiple times.\n"
> +"  -W <desc|path>    Filename or a master workload descriptor.\n"
> +"                    Only one master workload can be optinally specified in which\n"
> +"                    case all other workloads become background ones and run as\n"
> +"                    long as the master.\n"
> +"  -a <desc|path>    Append a workload to all other workloads.\n"
> +"  -r <n>            How many times to emit the workload.\n"
> +"  -c <n>            Fork N clients emitting the workload simultaneously.\n"
> +"  -x                Swap VCS1 and VCS2 engines in every other client.\n"
> +"  -b <n>            Load balancing to use.\n"
> +"                    Available load balancers are:"

You need to re-align the second part of the help text as well. Run the 
tool with -h to check.

>   	);
>   
>   	for (i = 0; i < ARRAY_SIZE(all_balancers); i++) {
> @@ -3117,6 +3246,9 @@ int main(int argc, char **argv)
>   	int prio = 0;
>   	double t;
>   	int i, c;
> +	char *subopts, *value;
> +	enum intel_engine_id res;
> +	int raw_number = 0;
>   
>   	/*
>   	 * Open the device via the low-level API so we can do the GPU quiesce
> @@ -3134,7 +3266,7 @@ int main(int argc, char **argv)
>   	master_prng = time(NULL);
>   
>   	while ((c = getopt(argc, argv,
> -			   "hqv2RsSHxGdc:n:r:w:W:a:t:b:p:I:")) != -1) {
> +			   "Thqv2RsSHxGdc:n:r:w:W:a:t:b:p:I:")) != -1) {
>   		switch (c) {
>   		case 'W':
>   			if (master_workload >= 0) {
> @@ -3163,8 +3295,41 @@ int main(int argc, char **argv)
>   		case 't':
>   			tolerance_pct = strtol(optarg, NULL, 0);
>   			break;
> +		case 'T':
> +			sequential = false;
> +			break;
> +
>   		case 'n':
> -			nop_calibration = strtol(optarg, NULL, 0);
> +			subopts = optarg;
> +			while (*subopts != '\0') {
> +				res = getsubopt(&subopts, (char **)ring_str_map, &value);
> +				switch (res) {
> +				case RCS ... VECS:
> +					engine_calib_map[res] = atol(value);
> +					has_nop_calibration = true;
> +					break;
> +				default:
> +					/* raw number was given - two cases: */
> +
> +					/* raw number is already set  */
> +					if (raw_number) {
> +						wsim_err("Default engine calibration provided more than once.\n");
> +						goto err;
> +					}
> +
> +					/* raw number has been set for the first time */
> +					raw_number = atol(value);
> +
> +					if (value) {
> +						apply_unset_calibrations(raw_number);
> +					} else {
> +						/* not engine=value pair, not raw number, so it's just an error */
> +						wsim_err("Unknown engine name: %s/\n", value);
> +						goto err;
> +					}

I was able to pass "-n 10,XYZ=10" and did not get the "Unknown engine 
name" error. Please check what's happening with that.

> +					break;
> +				}
> +			}
>   			break;
>   		case 'r':
>   			repeat = strtol(optarg, NULL, 0);
> @@ -3242,14 +3407,13 @@ int main(int argc, char **argv)
>   		goto err;
>   	}
>   
> -	if (!nop_calibration) {
> -		if (verbose > 1)
> -			printf("Calibrating nop delay with %u%% tolerance...\n",
> +	if (!has_nop_calibration) {
> +		if (verbose > 1) {
> +			printf("Calibrating nop delays with %u%% tolerance...\n",
>   				tolerance_pct);
> -		nop_calibration = calibrate_nop(tolerance_pct);
> -		if (verbose)
> -			printf("Nop calibration for %uus delay is %lu.\n",
> -			       nop_calibration_us, nop_calibration);
> +		}
> +
> +		calibrate_engines();
>   
>   		goto out;
>   	}
> @@ -3309,8 +3473,7 @@ int main(int argc, char **argv)
>   
>   	if (verbose > 1) {
>   		printf("Random seed is %u.\n", master_prng);
> -		printf("Using %lu nop calibration for %uus delay.\n",
> -		       nop_calibration, nop_calibration_us);
> +		print_engines_calibrations();
>   		printf("%u client%s.\n", clients, clients > 1 ? "s" : "");
>   		if (flags & SWAPVCS)
>   			printf("Swapping VCS rings between clients.\n");
> 

Almost there. :)

Regards,

Tvrtko
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 22+ messages in thread

* [igt-dev] ✓ Fi.CI.IGT: success for Distinguish particular engines during calculating nop calibration.
  2020-01-16 13:55 [igt-dev] [PATCH i-g-t] Distinguish particular engines during calculating nop calibration Anna Karas
  2020-01-16 15:06 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork
  2020-01-16 17:38 ` [igt-dev] [PATCH i-g-t] " Tvrtko Ursulin
@ 2020-01-19  8:28 ` Patchwork
  2020-01-21 15:04 ` [igt-dev] [PATCH i-g-t] " Anna Karas
                   ` (7 subsequent siblings)
  10 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2020-01-19  8:28 UTC (permalink / raw)
  To: Anna Karas; +Cc: igt-dev

== Series Details ==

Series: Distinguish particular engines during calculating nop calibration.
URL   : https://patchwork.freedesktop.org/series/72113/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7754_full -> IGTPW_3928_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/index.html

Known issues
------------

  Here are the changes found in IGTPW_3928_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_busy@busy-vcs1:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([fdo#112080]) +11 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-iclb1/igt@gem_busy@busy-vcs1.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-iclb5/igt@gem_busy@busy-vcs1.html

  * igt@gem_ctx_isolation@vcs1-clean:
    - shard-iclb:         [PASS][3] -> [SKIP][4] ([fdo#109276] / [fdo#112080]) +1 similar issue
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-iclb4/igt@gem_ctx_isolation@vcs1-clean.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-iclb5/igt@gem_ctx_isolation@vcs1-clean.html

  * igt@gem_ctx_shared@q-smoketest-bsd1:
    - shard-tglb:         [PASS][5] -> [INCOMPLETE][6] ([fdo#111735] / [i915#472])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-tglb8/igt@gem_ctx_shared@q-smoketest-bsd1.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-tglb4/igt@gem_ctx_shared@q-smoketest-bsd1.html

  * igt@gem_eio@kms:
    - shard-tglb:         [PASS][7] -> [INCOMPLETE][8] ([i915#472] / [i915#476])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-tglb8/igt@gem_eio@kms.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-tglb6/igt@gem_eio@kms.html

  * igt@gem_eio@reset-stress:
    - shard-tglb:         [PASS][9] -> [INCOMPLETE][10] ([i915#470] / [i915#472]) +2 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-tglb8/igt@gem_eio@reset-stress.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-tglb1/igt@gem_eio@reset-stress.html

  * igt@gem_exec_schedule@pi-shared-iova-bsd:
    - shard-iclb:         [PASS][11] -> [SKIP][12] ([i915#677])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-iclb8/igt@gem_exec_schedule@pi-shared-iova-bsd.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-iclb1/igt@gem_exec_schedule@pi-shared-iova-bsd.html

  * igt@gem_exec_schedule@preemptive-hang-bsd:
    - shard-iclb:         [PASS][13] -> [SKIP][14] ([fdo#112146]) +5 similar issues
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-iclb8/igt@gem_exec_schedule@preemptive-hang-bsd.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-iclb1/igt@gem_exec_schedule@preemptive-hang-bsd.html

  * igt@gem_exec_suspend@basic-s4-devices:
    - shard-tglb:         [PASS][15] -> [INCOMPLETE][16] ([i915#460] / [i915#472])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-tglb1/igt@gem_exec_suspend@basic-s4-devices.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-tglb3/igt@gem_exec_suspend@basic-s4-devices.html

  * igt@gem_persistent_relocs@forked-faulting-reloc-thrashing:
    - shard-glk:          [PASS][17] -> [INCOMPLETE][18] ([i915#530] / [i915#58] / [k.org#198133])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-glk1/igt@gem_persistent_relocs@forked-faulting-reloc-thrashing.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-glk9/igt@gem_persistent_relocs@forked-faulting-reloc-thrashing.html

  * igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing:
    - shard-apl:          [PASS][19] -> [TIMEOUT][20] ([fdo#112271] / [i915#530])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-apl4/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-apl1/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html

  * igt@gem_persistent_relocs@forked-interruptible-thrashing:
    - shard-snb:          [PASS][21] -> [FAIL][22] ([i915#520])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-snb6/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-snb1/igt@gem_persistent_relocs@forked-interruptible-thrashing.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
    - shard-glk:          [PASS][23] -> [FAIL][24] ([i915#644])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-glk9/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-glk3/igt@gem_ppgtt@flink-and-close-vma-leak.html

  * igt@gem_sync@basic-each:
    - shard-tglb:         [PASS][25] -> [INCOMPLETE][26] ([i915#472] / [i915#707])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-tglb1/igt@gem_sync@basic-each.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-tglb4/igt@gem_sync@basic-each.html

  * igt@gen9_exec_parse@allowed-all:
    - shard-kbl:          [PASS][27] -> [DMESG-WARN][28] ([i915#716])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-kbl7/igt@gen9_exec_parse@allowed-all.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-kbl6/igt@gen9_exec_parse@allowed-all.html

  * igt@i915_pm_rps@reset:
    - shard-iclb:         [PASS][29] -> [FAIL][30] ([i915#413])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-iclb1/igt@i915_pm_rps@reset.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-iclb1/igt@i915_pm_rps@reset.html

  * igt@i915_suspend@forcewake:
    - shard-kbl:          [PASS][31] -> [DMESG-WARN][32] ([i915#180]) +4 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-kbl1/igt@i915_suspend@forcewake.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-kbl7/igt@i915_suspend@forcewake.html

  * igt@kms_big_fb@x-tiled-addfb:
    - shard-kbl:          [PASS][33] -> [DMESG-WARN][34] ([i915#56] / [i915#62] / [i915#92]) +2 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-kbl2/igt@kms_big_fb@x-tiled-addfb.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-kbl1/igt@kms_big_fb@x-tiled-addfb.html

  * igt@kms_cursor_crc@pipe-b-cursor-suspend:
    - shard-kbl:          [PASS][35] -> [DMESG-FAIL][36] ([i915#54] / [i915#56] / [i915#62])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-kbl2/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-kbl1/igt@kms_cursor_crc@pipe-b-cursor-suspend.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-apl:          [PASS][37] -> [DMESG-WARN][38] ([i915#180]) +1 similar issue
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-apl3/igt@kms_flip@flip-vs-suspend-interruptible.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-apl6/igt@kms_flip@flip-vs-suspend-interruptible.html
    - shard-hsw:          [PASS][39] -> [INCOMPLETE][40] ([i915#61])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-hsw2/igt@kms_flip@flip-vs-suspend-interruptible.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-hsw5/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-1p-rte:
    - shard-kbl:          [PASS][41] -> [DMESG-WARN][42] ([i915#56] / [i915#62])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-1p-rte.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-1p-rte.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite:
    - shard-tglb:         [PASS][43] -> [FAIL][44] ([i915#49])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-tglb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-tglb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html

  * igt@kms_plane_lowres@pipe-c-tiling-none:
    - shard-hsw:          [PASS][45] -> [DMESG-WARN][46] ([i915#44])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-hsw2/igt@kms_plane_lowres@pipe-c-tiling-none.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-hsw5/igt@kms_plane_lowres@pipe-c-tiling-none.html

  * igt@kms_psr@psr2_sprite_plane_move:
    - shard-iclb:         [PASS][47] -> [SKIP][48] ([fdo#109441]) +1 similar issue
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-iclb5/igt@kms_psr@psr2_sprite_plane_move.html

  * igt@prime_mmap_coherency@ioctl-errors:
    - shard-hsw:          [PASS][49] -> [FAIL][50] ([i915#831])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-hsw5/igt@prime_mmap_coherency@ioctl-errors.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-hsw2/igt@prime_mmap_coherency@ioctl-errors.html

  * igt@prime_vgem@fence-wait-bsd2:
    - shard-iclb:         [PASS][51] -> [SKIP][52] ([fdo#109276]) +19 similar issues
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-iclb1/igt@prime_vgem@fence-wait-bsd2.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-iclb5/igt@prime_vgem@fence-wait-bsd2.html

  
#### Possible fixes ####

  * igt@gem_ctx_persistence@vcs1-mixed-process:
    - shard-iclb:         [SKIP][53] ([fdo#109276] / [fdo#112080]) -> [PASS][54] +2 similar issues
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-iclb5/igt@gem_ctx_persistence@vcs1-mixed-process.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-iclb4/igt@gem_ctx_persistence@vcs1-mixed-process.html

  * igt@gem_ctx_shared@exec-single-timeline-bsd:
    - shard-iclb:         [SKIP][55] ([fdo#110841]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-iclb1/igt@gem_ctx_shared@exec-single-timeline-bsd.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-iclb5/igt@gem_ctx_shared@exec-single-timeline-bsd.html

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [SKIP][57] ([fdo#110854]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-iclb5/igt@gem_exec_balancer@smoke.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-iclb2/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_create@madvise:
    - shard-tglb:         [INCOMPLETE][59] ([i915#472]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-tglb1/igt@gem_exec_create@madvise.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-tglb8/igt@gem_exec_create@madvise.html

  * igt@gem_exec_schedule@preempt-queue-bsd:
    - shard-iclb:         [SKIP][61] ([fdo#112146]) -> [PASS][62] +4 similar issues
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-iclb2/igt@gem_exec_schedule@preempt-queue-bsd.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-iclb6/igt@gem_exec_schedule@preempt-queue-bsd.html

  * igt@gem_exec_schedule@preempt-queue-contexts-bsd1:
    - shard-iclb:         [SKIP][63] ([fdo#109276]) -> [PASS][64] +16 similar issues
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-iclb6/igt@gem_exec_schedule@preempt-queue-contexts-bsd1.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-iclb1/igt@gem_exec_schedule@preempt-queue-contexts-bsd1.html

  * igt@gem_exec_schedule@smoketest-all:
    - shard-tglb:         [INCOMPLETE][65] ([i915#463] / [i915#472]) -> [PASS][66]
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-tglb4/igt@gem_exec_schedule@smoketest-all.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-tglb1/igt@gem_exec_schedule@smoketest-all.html

  * igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive:
    - shard-tglb:         [TIMEOUT][67] ([fdo#112271] / [i915#530]) -> [PASS][68]
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-tglb7/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-tglb6/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html

  * igt@gem_persistent_relocs@forked-faulting-reloc-thrashing:
    - shard-hsw:          [INCOMPLETE][69] ([i915#530] / [i915#61]) -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-hsw4/igt@gem_persistent_relocs@forked-faulting-reloc-thrashing.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-hsw2/igt@gem_persistent_relocs@forked-faulting-reloc-thrashing.html

  * igt@gem_persistent_relocs@forked-interruptible-thrashing:
    - shard-apl:          [TIMEOUT][71] ([fdo#112271] / [i915#530]) -> [PASS][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-apl6/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-apl3/igt@gem_persistent_relocs@forked-interruptible-thrashing.html

  * igt@gem_persistent_relocs@forked-thrashing:
    - shard-kbl:          [INCOMPLETE][73] ([fdo#103665] / [i915#530]) -> [PASS][74]
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-kbl1/igt@gem_persistent_relocs@forked-thrashing.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-kbl4/igt@gem_persistent_relocs@forked-thrashing.html

  * igt@gem_userptr_blits@map-fixed-invalidate-busy-gup:
    - shard-snb:          [DMESG-WARN][75] ([fdo#110789] / [fdo#111870] / [i915#478]) -> [PASS][76]
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-snb4/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-snb4/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html

  * igt@i915_selftest@live_gt_timelines:
    - shard-tglb:         [INCOMPLETE][77] ([i915#455] / [i915#472]) -> [PASS][78]
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-tglb3/igt@i915_selftest@live_gt_timelines.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-tglb3/igt@i915_selftest@live_gt_timelines.html

  * igt@i915_suspend@debugfs-reader:
    - shard-iclb:         [DMESG-WARN][79] ([fdo#111764]) -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-iclb6/igt@i915_suspend@debugfs-reader.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-iclb2/igt@i915_suspend@debugfs-reader.html
    - shard-snb:          [DMESG-WARN][81] ([i915#42]) -> [PASS][82]
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-snb5/igt@i915_suspend@debugfs-reader.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-snb2/igt@i915_suspend@debugfs-reader.html

  * igt@kms_cursor_crc@pipe-a-cursor-256x85-sliding:
    - shard-kbl:          [FAIL][83] ([i915#54]) -> [PASS][84]
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-256x85-sliding.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-kbl7/igt@kms_cursor_crc@pipe-a-cursor-256x85-sliding.html
    - shard-apl:          [FAIL][85] ([i915#54]) -> [PASS][86]
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-apl4/igt@kms_cursor_crc@pipe-a-cursor-256x85-sliding.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-apl8/igt@kms_cursor_crc@pipe-a-cursor-256x85-sliding.html

  * igt@kms_cursor_crc@pipe-b-cursor-suspend:
    - shard-apl:          [DMESG-WARN][87] ([i915#180]) -> [PASS][88] +2 similar issues
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-apl2/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-apl8/igt@kms_cursor_crc@pipe-b-cursor-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite:
    - shard-tglb:         [FAIL][89] ([i915#49]) -> [PASS][90] +2 similar issues
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-tglb6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-tglb7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - shard-kbl:          [DMESG-WARN][91] ([i915#180]) -> [PASS][92]
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-kbl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-kbl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  * igt@kms_psr@psr2_primary_mmap_cpu:
    - shard-iclb:         [SKIP][93] ([fdo#109441]) -> [PASS][94] +3 similar issues
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-iclb5/igt@kms_psr@psr2_primary_mmap_cpu.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html

  * igt@kms_universal_plane@universal-plane-pipe-b-functional:
    - shard-apl:          [FAIL][95] ([i915#331]) -> [PASS][96]
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-apl7/igt@kms_universal_plane@universal-plane-pipe-b-functional.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-apl8/igt@kms_universal_plane@universal-plane-pipe-b-functional.html
    - shard-kbl:          [FAIL][97] ([i915#331]) -> [PASS][98]
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-kbl1/igt@kms_universal_plane@universal-plane-pipe-b-functional.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-kbl6/igt@kms_universal_plane@universal-plane-pipe-b-functional.html

  * igt@perf_pmu@busy-no-semaphores-vcs1:
    - shard-iclb:         [SKIP][99] ([fdo#112080]) -> [PASS][100] +5 similar issues
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-iclb5/igt@perf_pmu@busy-no-semaphores-vcs1.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-iclb4/igt@perf_pmu@busy-no-semaphores-vcs1.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv-switch:
    - shard-iclb:         [SKIP][101] ([fdo#109276] / [fdo#112080]) -> [FAIL][102] ([IGT#28])
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-iclb5/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-iclb1/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html

  * igt@gem_eio@kms:
    - shard-snb:          [INCOMPLETE][103] ([i915#82]) -> [DMESG-WARN][104] ([i915#443] / [i915#444])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-snb6/igt@gem_eio@kms.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-snb6/igt@gem_eio@kms.html

  * igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy:
    - shard-snb:          [DMESG-WARN][105] ([fdo#111870] / [i915#478]) -> [DMESG-WARN][106] ([fdo#110789] / [fdo#111870] / [i915#478]) +1 similar issue
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-snb2/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-snb6/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html

  * igt@gem_userptr_blits@sync-unmap-after-close:
    - shard-snb:          [DMESG-WARN][107] ([fdo#110789] / [fdo#111870] / [i915#478]) -> [DMESG-WARN][108] ([fdo#111870] / [i915#478])
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-snb5/igt@gem_userptr_blits@sync-unmap-after-close.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-snb4/igt@gem_userptr_blits@sync-unmap-after-close.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-tglb:         [SKIP][109] ([i915#468]) -> [FAIL][110] ([i915#454])
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-tglb6/igt@i915_pm_dc@dc6-psr.html
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-tglb4/igt@i915_pm_dc@dc6-psr.html

  * igt@kms_dp_dsc@basic-dsc-enable-edp:
    - shard-iclb:         [SKIP][111] ([fdo#109349]) -> [DMESG-WARN][112] ([fdo#107724])
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-iclb6/igt@kms_dp_dsc@basic-dsc-enable-edp.html
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-kbl:          [DMESG-WARN][113] ([i915#180] / [i915#391]) -> [DMESG-WARN][114] ([i915#180])
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-kbl7/igt@kms_flip@flip-vs-suspend-interruptible.html
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-kbl2/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@runner@aborted:
    - shard-kbl:          [FAIL][115] ([fdo#109383]) -> [FAIL][116] ([i915#716])
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7754/shard-kbl7/igt@runner@aborted.html
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/shard-kbl6/igt@runner@aborted.html

  
  [IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
  [fdo#109383]: https://bugs.freedesktop.org/show_bug.cgi?id=109383
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#110789]: https://bugs.freedesktop.org/show_bug.cgi?id=110789
  [fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841
  [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
  [fdo#111735]: https://bugs.freedesktop.org/show_bug.cgi?id=111735
  [fdo#111764]: https://bugs.freedesktop.org/show_bug.cgi?id=111764
  [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
  [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#331]: https://gitlab.freedesktop.org/drm/intel/issues/331
  [i915#391]: https://gitlab.freedesktop.org/drm/intel/issues/391
  [i915#413]: https://gitlab.freedesktop.org/drm/intel/issues/413
  [i915#42]: https://gitlab.freedesktop.org/drm/intel/issues/42
  [i915#44]: https://gitlab.freedesktop.org/drm/intel/issues/44
  [i915#443]: https://gitlab.freedesktop.org/drm/intel/issues/443
  [i915#444]: https://gitlab.freedesktop.org/drm/intel/issues/444
  [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
  [i915#455]: https://gitlab.freedesktop.org/drm/intel/issues/455
  [i915#460]: https://gitlab.freedesktop.org/drm/intel/issues/460
  [i915#463]: https://gitlab.freedesktop.org/drm/intel/issues/463
  [i915#468]: https://gitlab.freedesktop.org/drm/intel/issues/468
  [i915#470]: https://gitlab.freedesktop.org/drm/intel/issues/470
  [i915#472]: https://gitlab.freedesktop.org/drm/intel/issues/472
  [i915#476]: https://gitlab.freedesktop.org/drm/intel/issues/476
  [i915#478]: https://gitlab.freedesktop.org/drm/intel/issues/478
  [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
  [i915#520]: https://gitlab.freedesktop.org/drm/intel/issues/520
  [i915#530]: https://gitlab.freedesktop.org/drm/intel/issues/530
  [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
  [i915#56]: https://gitlab.freedesktop.org/drm/intel/issues/56
  [i915#58]: https://gitlab.freedesktop.org/drm/intel/issues/58
  [i915#61]: https://gitlab.freedesktop.org/drm/intel/issues/61
  [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
  [i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
  [i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
  [i915#707]: https://gitlab.freedesktop.org/drm/intel/issues/707
  [i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
  [i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82
  [i915#831]: https://gitlab.freedesktop.org/drm/intel/issues/831
  [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
  [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133


Participating hosts (10 -> 8)
------------------------------

  Missing    (2): pig-skl-6260u pig-glk-j5005 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5370 -> IGTPW_3928
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_7754: 4db14301dfa813d24cd2ad46552af83d493c5d12 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3928: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/index.html
  IGT_5370: a98fb02cc2816a48eec374392d9b6941abb6af2c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3928/index.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 22+ messages in thread

* [igt-dev] [PATCH i-g-t] Distinguish particular engines during calculating nop calibration
  2020-01-16 13:55 [igt-dev] [PATCH i-g-t] Distinguish particular engines during calculating nop calibration Anna Karas
                   ` (2 preceding siblings ...)
  2020-01-19  8:28 ` [igt-dev] ✓ Fi.CI.IGT: success for " Patchwork
@ 2020-01-21 15:04 ` Anna Karas
  2020-01-21 15:53   ` Chris Wilson
  2020-01-21 16:02   ` Tvrtko Ursulin
  2020-01-21 16:00 ` [igt-dev] ✓ Fi.CI.BAT: success for Distinguish particular engines during calculating nop calibration. (rev2) Patchwork
                   ` (6 subsequent siblings)
  10 siblings, 2 replies; 22+ messages in thread
From: Anna Karas @ 2020-01-21 15:04 UTC (permalink / raw)
  To: igt-dev

Extend handling -n parameter by accepting multiple values of per
engine nop calibration. Add raw numbers handling to set default
calibration values. Print copyable and pastable string with
calibrations. Allow to switch between calculating in parallel
or doing it sequentially.

Accepted input values:
-n 123456
All calibrations will be set to 123456.

-n ENG=value,ENG2=value2,value3
i.e.
-n RCS=123456,BCS=345678,999999
RCS engine's value is set to 123456, BCS engine's value is set to
345678, 999999 is copied to rest of engines. All engines must be set;
you can either provide values for each of the engines, or you can set
specific values and provide a default value for the others.

-n value,ENG1=value1,ENG2=value2
First, value is copied to all engines, then value1 overrides ENG1, and
finally value2 overrides ENG2.

New output follows the pattern:
Nop calibrations for 1000us delay is: <eng1>=<v1>,<eng2>=<v2>,...
So you can easily copy-paste it to the next invocation.

Switching between calculation modes:
Run program with -T parameter to calculate calibrations in parallel.
The calculations are performed sequentially by default.

v2: Get rid of trailing whitespaces. Skip DEFAULT and VCS engines
when printing out calibrations. Reject them in the string passed
to -n. Re-align rest of help text. Fix accepting unknown engines.

Signed-off-by: Anna Karas <anna.karas@intel.com>
---
 benchmarks/gem_wsim.c | 293 +++++++++++++++++++++++++++++++++---------
 1 file changed, 235 insertions(+), 58 deletions(-)

diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c
index 9156fdc9..ae5d5670 100644
--- a/benchmarks/gem_wsim.c
+++ b/benchmarks/gem_wsim.c
@@ -23,6 +23,7 @@
  */
 
 #include <unistd.h>
+#include <stdbool.h>
 #include <stdlib.h>
 #include <stdint.h>
 #include <stdio.h>
@@ -55,6 +56,7 @@
 #include "i915/gem_mman.h"
 
 #include "ewma.h"
+#include "i915/gem_engine_topology.h"
 
 enum intel_engine_id {
 	DEFAULT,
@@ -240,7 +242,8 @@ struct workload
 
 struct intel_mmio_data mmio_data;
 static const unsigned int nop_calibration_us = 1000;
-static unsigned long nop_calibration;
+static bool has_nop_calibration = false;
+static bool sequential = true;
 
 static unsigned int master_prng;
 
@@ -281,6 +284,55 @@ static const char *ring_str_map[NUM_ENGINES] = {
 	[VECS] = "VECS",
 };
 
+/* stores calibrations for particular engines */
+static unsigned long engine_calib_map[NUM_ENGINES];
+
+static enum intel_engine_id
+ci_to_engine_id(int class, int instance)
+{
+	static const struct {
+		int class;
+		int instance;
+		unsigned int id;
+	} map[] = {
+		{ I915_ENGINE_CLASS_RENDER, 0, RCS },
+		{ I915_ENGINE_CLASS_COPY, 0, BCS },
+		{ I915_ENGINE_CLASS_VIDEO, 0, VCS1 },
+		{ I915_ENGINE_CLASS_VIDEO, 1, VCS2 },
+		{ I915_ENGINE_CLASS_VIDEO, 2, VCS2 }, /* FIXME/ICL */
+		{ I915_ENGINE_CLASS_VIDEO_ENHANCE, 0, VECS },
+	};
+
+	unsigned int i;
+
+	for (i = 0; i < ARRAY_SIZE(map); i++) {
+		if (class == map[i].class && instance == map[i].instance)
+			return map[i].id;
+	}
+	return -1;
+}
+
+static void
+apply_unset_calibrations(unsigned long raw_number)
+{
+	for (int i = 0; i < NUM_ENGINES; i++)
+		engine_calib_map[i] += engine_calib_map[i] ? 0 : raw_number;
+
+	has_nop_calibration = true;
+}
+
+static void
+print_engines_calibrations(void)
+{
+	printf("Nop calibrations for %uus delay is: ", nop_calibration_us);
+
+	/* skip DEFAULT and VCS engines */
+	for (int i = 1; i < NUM_ENGINES; i++) {
+		if (i != 3) printf("%s%s=%lu", i - 1 > 0 ? "," : "", ring_str_map[i], engine_calib_map[i]);
+	}
+	printf("\n");
+}
+
 static int
 parse_dependencies(unsigned int nr_steps, struct w_step *w, char *_desc)
 {
@@ -1082,17 +1134,17 @@ static unsigned int get_duration(struct workload *wrk, struct w_step *w)
 		       (dur->max + 1 - dur->min);
 }
 
-static unsigned long get_bb_sz(unsigned int duration)
+static unsigned long get_bb_sz(unsigned int duration, enum intel_engine_id engine)
 {
-	return ALIGN(duration * nop_calibration * sizeof(uint32_t) /
-		     nop_calibration_us, sizeof(uint32_t));
+	return ALIGN(duration * engine_calib_map[engine] * sizeof(uint32_t) /
+		nop_calibration_us, sizeof(uint32_t));
 }
 
 static void
 init_bb(struct w_step *w, unsigned int flags)
 {
 	const unsigned int arb_period =
-			get_bb_sz(w->preempt_us) / sizeof(uint32_t);
+			get_bb_sz(w->preempt_us, w->engine) / sizeof(uint32_t);
 	const unsigned int mmap_len = ALIGN(w->bb_sz, 4096);
 	unsigned int i;
 	uint32_t *ptr;
@@ -1319,10 +1371,11 @@ alloc_step_batch(struct workload *wrk, struct w_step *w, unsigned int flags)
 
 	if (w->unbound_duration)
 		/* nops + MI_ARB_CHK + MI_BATCH_BUFFER_START */
-		w->bb_sz = max(PAGE_SIZE, get_bb_sz(w->preempt_us)) +
+		w->bb_sz = max(PAGE_SIZE, get_bb_sz(w->preempt_us, w->engine)) +
 			   (1 + 3) * sizeof(uint32_t);
 	else
-		w->bb_sz = get_bb_sz(w->duration.max);
+		w->bb_sz = get_bb_sz(w->duration.max, w->engine);
+
 	w->bb_handle = w->obj[j].handle = gem_create(fd, w->bb_sz + (w->unbound_duration ? 4096 : 0));
 	init_bb(w, flags);
 	w->obj[j].relocation_count = terminate_bb(w, flags);
@@ -2622,7 +2675,7 @@ do_eb(struct workload *wrk, struct w_step *w, enum intel_engine_id engine,
 	w->eb.batch_start_offset =
 		w->unbound_duration ?
 		0 :
-		ALIGN(w->bb_sz - get_bb_sz(get_duration(wrk, w)),
+		ALIGN(w->bb_sz - get_bb_sz(get_duration(wrk, w), w->engine),
 		      2 * sizeof(uint32_t));
 
 	for (i = 0; i < w->fence_deps.nr; i++) {
@@ -2899,15 +2952,18 @@ static void fini_workload(struct workload *wrk)
 	free(wrk);
 }
 
-static unsigned long calibrate_nop(unsigned int tolerance_pct)
+static unsigned long calibrate_nop(unsigned int tolerance_pct, struct intel_execution_engine2 *engine)
 {
 	const uint32_t bbe = 0xa << 23;
 	unsigned int loops = 17;
 	unsigned int usecs = nop_calibration_us;
 	struct drm_i915_gem_exec_object2 obj = {};
-	struct drm_i915_gem_execbuffer2 eb =
-		{ .buffer_count = 1, .buffers_ptr = (uintptr_t)&obj};
-	long size, last_size;
+	struct drm_i915_gem_execbuffer2 eb = {
+		.buffer_count = 1,
+		.buffers_ptr = (uintptr_t)&obj,
+		.flags = engine->flags
+	};
+	unsigned long size, last_size;
 	struct timespec t_0, t_end;
 
 	clock_gettime(CLOCK_MONOTONIC, &t_0);
@@ -2939,6 +2995,77 @@ static unsigned long calibrate_nop(unsigned int tolerance_pct)
 	return size / sizeof(uint32_t);
 }
 
+static void
+calibrate_sequentially(void)
+{
+	struct intel_execution_engine2 *engine;
+	enum intel_engine_id eng_id;
+
+	__for_each_physical_engine(fd, engine) {
+		eng_id = ci_to_engine_id(engine->class, engine->instance);
+		igt_assert(eng_id >= 0);
+		engine_calib_map[eng_id] = calibrate_nop(fd, engine);
+	}
+}
+
+struct thread_data {
+	struct intel_execution_engine2 *eng;
+	pthread_t thr;
+	unsigned long calib;
+};
+
+static void *
+engine_calibration_thread(void *data)
+{
+	struct thread_data *thr_d = (struct thread_data *) data;
+
+	thr_d->calib = calibrate_nop(fd, thr_d->eng);
+	return NULL;
+}
+
+static void
+calibrate_in_parallel(void)
+{
+	struct thread_data *thr_d = malloc(NUM_ENGINES * sizeof(*thr_d));
+	struct intel_execution_engine2 *engine;
+	enum intel_engine_id id;
+	int ret;
+
+	__for_each_physical_engine(fd, engine) {
+		id = ci_to_engine_id(engine->class, engine->instance);
+		thr_d[id].eng = engine;
+		ret = pthread_create(&thr_d[id].thr, NULL, engine_calibration_thread, &thr_d[id]);
+		igt_assert_eq(ret, 0);
+	}
+
+	__for_each_physical_engine(fd, engine) {
+		id = ci_to_engine_id(engine->class, engine->instance);
+		igt_assert(id >= 0);
+
+		ret = pthread_join(thr_d[id].thr, NULL);
+		igt_assert_eq(ret, 0);
+		engine_calib_map[id] = thr_d[id].calib;
+	}
+
+	free(thr_d);
+}
+
+static void
+calibrate_engines(void)
+{
+	if (sequential)
+		calibrate_sequentially();
+	else
+		calibrate_in_parallel();
+
+	has_nop_calibration = true;
+
+	if (verbose > 1)
+		print_engines_calibrations();
+
+}
+
+
 static void print_help(void)
 {
 	unsigned int i;
@@ -2951,50 +3078,53 @@ static void print_help(void)
 "be provided when running the simulation in subsequent invocations.\n"
 "\n"
 "Options:\n"
-"  -h              This text.\n"
-"  -q              Be quiet - do not output anything to stdout.\n"
-"  -n <n>          Nop calibration value.\n"
-"  -t <n>          Nop calibration tolerance percentage.\n"
-"                  Use when there is a difficulty obtaining calibration with the\n"
-"                  default settings.\n"
-"  -I <n>          Initial randomness seed.\n"
-"  -p <n>          Context priority to use for the following workload on the\n"
-"                  command line.\n"
-"  -w <desc|path>  Filename or a workload descriptor.\n"
-"                  Can be given multiple times.\n"
-"  -W <desc|path>  Filename or a master workload descriptor.\n"
-"                  Only one master workload can be optinally specified in which\n"
-"                  case all other workloads become background ones and run as\n"
-"                  long as the master.\n"
-"  -a <desc|path>  Append a workload to all other workloads.\n"
-"  -r <n>          How many times to emit the workload.\n"
-"  -c <n>          Fork N clients emitting the workload simultaneously.\n"
-"  -x              Swap VCS1 and VCS2 engines in every other client.\n"
-"  -b <n>          Load balancing to use.\n"
-"                  Available load balancers are:"
+"  -h                This text.\n"
+"  -q                Be quiet - do not output anything to stdout.\n"
+"  -n <n |           Nop calibration value - single value is set to all engines\n"
+"  e1=v1,e2=v2,n...> without specified value; you can also specify calibrations for\n"
+"                    particular engines.\n"
+"  -t <n>            Nop calibration tolerance percentage.\n"
+"  -T                Disable sequential calibration and perform calibration in parallel.\n"
+"                    Use when there is a difficulty obtaining calibration with the\n"
+"                    default settings.\n"
+"  -I <n>            Initial randomness seed.\n"
+"  -p <n>            Context priority to use for the following workload on the\n"
+"                    command line.\n"
+"  -w <desc|path>    Filename or a workload descriptor.\n"
+"                    Can be given multiple times.\n"
+"  -W <desc|path>    Filename or a master workload descriptor.\n"
+"                    Only one master workload can be optinally specified in which\n"
+"                    case all other workloads become background ones and run as\n"
+"                    long as the master.\n"
+"  -a <desc|path>    Append a workload to all other workloads.\n"
+"  -r <n>            How many times to emit the workload.\n"
+"  -c <n>            Fork N clients emitting the workload simultaneously.\n"
+"  -x                Swap VCS1 and VCS2 engines in every other client.\n"
+"  -b <n>            Load balancing to use.\n"
+"                    Available load balancers are:"
 	);
 
 	for (i = 0; i < ARRAY_SIZE(all_balancers); i++) {
 		igt_assert(all_balancers[i].desc);
 		printf(
-"                     %s (%u): %s\n",
+"                       %s (%u): %s\n",
 		       all_balancers[i].name, all_balancers[i].id,
 		       all_balancers[i].desc);
 	}
 	puts(
-"                  Balancers can be specified either as names or as their id\n"
-"                  number as listed above.\n"
-"  -2              Remap VCS2 to BCS.\n"
-"  -R              Round-robin initial VCS assignment per client.\n"
-"  -H              Send heartbeat on synchronisation points with seqno based\n"
-"                  balancers. Gives better engine busyness view in some cases.\n"
-"  -s              Turn on small SSEU config for the next workload on the\n"
-"                  command line. Subsequent -s switches it off.\n"
-"  -S              Synchronize the sequence of random batch durations between\n"
-"                  clients.\n"
-"  -G              Global load balancing - a single load balancer will be shared\n"
-"                  between all clients and there will be a single seqno domain.\n"
-"  -d              Sync between data dependencies in userspace."
+"                     Balancers can be specified either as names or as their id\n"
+"                     number as listed above.\n"
+"  -2                 Remap VCS2 to BCS.\n"
+"  -R                 Round-robin initial VCS assignment per client.\n"
+"  -H                 Send heartbeat on synchronisation points with seqno based\n"
+"                     balancers. Gives better engine busyness view in some cases.\n"
+"  -s                 Turn on small SSEU config for the next workload on the\n"
+"                     command line. Subsequent -s switches it off.\n"
+"  -S                 Synchronize the sequence of random batch durations between\n"
+"                     clients.\n"
+"  -G                 Global load balancing - a single load balancer will be shared\n"
+"                     between all clients and there will be a single seqno domain.\n"
+"  -d                 Sync between data dependencies in userspace."
 	);
 }
 
@@ -3117,6 +3247,10 @@ int main(int argc, char **argv)
 	int prio = 0;
 	double t;
 	int i, c;
+	char *subopts, *value;
+	enum intel_engine_id eng;
+	int raw_number = 0;
+	long calib_val;
 
 	/*
 	 * Open the device via the low-level API so we can do the GPU quiesce
@@ -3134,7 +3268,7 @@ int main(int argc, char **argv)
 	master_prng = time(NULL);
 
 	while ((c = getopt(argc, argv,
-			   "hqv2RsSHxGdc:n:r:w:W:a:t:b:p:I:")) != -1) {
+			   "Thqv2RsSHxGdc:n:r:w:W:a:t:b:p:I:")) != -1) {
 		switch (c) {
 		case 'W':
 			if (master_workload >= 0) {
@@ -3163,8 +3297,53 @@ int main(int argc, char **argv)
 		case 't':
 			tolerance_pct = strtol(optarg, NULL, 0);
 			break;
+		case 'T':
+			sequential = false;
+			break;
+
 		case 'n':
-			nop_calibration = strtol(optarg, NULL, 0);
+			subopts = optarg;
+			while (*subopts != '\0') {
+				eng = getsubopt(&subopts, (char **)ring_str_map, &value);
+				if (!value) {
+					wsim_err("No calibration value for engine has been provided.\n");
+					goto err;
+				}
+
+				calib_val = atol(value);
+
+				if (!calib_val) {
+					wsim_err("An unsupported engine has been provided.\n");
+					goto err;
+				}
+
+				switch (eng) {
+				/* skip DEFAULT and VCS engines */
+				case DEFAULT:
+				case VCS:
+					wsim_err("An unsupported engine has been provided.\n");
+					goto err;
+				case RCS:
+				case BCS:
+				case VCS1 ... VECS:
+					engine_calib_map[eng] = calib_val;
+					has_nop_calibration = true;
+					break;
+				default:
+					/* raw number was given - two cases:
+					 * raw number is already set */
+					if (raw_number) {
+						wsim_err("Default engine calibration provided more than once.\n");
+						goto err;
+					}
+					else if (!raw_number) {
+						/* raw number has been set for the first time */
+						raw_number = calib_val;
+						apply_unset_calibrations(raw_number);
+					}
+					break;
+				}
+			}
 			break;
 		case 'r':
 			repeat = strtol(optarg, NULL, 0);
@@ -3242,14 +3421,13 @@ int main(int argc, char **argv)
 		goto err;
 	}
 
-	if (!nop_calibration) {
-		if (verbose > 1)
-			printf("Calibrating nop delay with %u%% tolerance...\n",
+	if (!has_nop_calibration) {
+		if (verbose > 1) {
+			printf("Calibrating nop delays with %u%% tolerance...\n",
 				tolerance_pct);
-		nop_calibration = calibrate_nop(tolerance_pct);
-		if (verbose)
-			printf("Nop calibration for %uus delay is %lu.\n",
-			       nop_calibration_us, nop_calibration);
+		}
+
+		calibrate_engines();
 
 		goto out;
 	}
@@ -3309,8 +3487,7 @@ int main(int argc, char **argv)
 
 	if (verbose > 1) {
 		printf("Random seed is %u.\n", master_prng);
-		printf("Using %lu nop calibration for %uus delay.\n",
-		       nop_calibration, nop_calibration_us);
+		print_engines_calibrations();
 		printf("%u client%s.\n", clients, clients > 1 ? "s" : "");
 		if (flags & SWAPVCS)
 			printf("Swapping VCS rings between clients.\n");
-- 
2.19.0

_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply related	[flat|nested] 22+ messages in thread

* Re: [igt-dev] [PATCH i-g-t] Distinguish particular engines during calculating nop calibration
  2020-01-21 15:04 ` [igt-dev] [PATCH i-g-t] " Anna Karas
@ 2020-01-21 15:53   ` Chris Wilson
  2020-01-23 14:45     ` Tvrtko Ursulin
  2020-01-21 16:02   ` Tvrtko Ursulin
  1 sibling, 1 reply; 22+ messages in thread
From: Chris Wilson @ 2020-01-21 15:53 UTC (permalink / raw)
  To: Anna Karas, igt-dev

Quoting Anna Karas (2020-01-21 15:04:00)
> @@ -3242,14 +3421,13 @@ int main(int argc, char **argv)
>                 goto err;
>         }
>  
> -       if (!nop_calibration) {
> -               if (verbose > 1)
> -                       printf("Calibrating nop delay with %u%% tolerance...\n",
> +       if (!has_nop_calibration) {
> +               if (verbose > 1) {
> +                       printf("Calibrating nop delays with %u%% tolerance...\n",
>                                 tolerance_pct);
> -               nop_calibration = calibrate_nop(tolerance_pct);
> -               if (verbose)
> -                       printf("Nop calibration for %uus delay is %lu.\n",
> -                              nop_calibration_us, nop_calibration);
> +               }
> +
> +               calibrate_engines();
>  
>                 goto out;
>         }
> @@ -3309,8 +3487,7 @@ int main(int argc, char **argv)
>  
>         if (verbose > 1) {

Hmm, could this be
if (verbose > 1 || !has_nop_calibration)
so that a plain run of gem_wsim shows the calibration results?

>                 printf("Random seed is %u.\n", master_prng);
> -               printf("Using %lu nop calibration for %uus delay.\n",
> -                      nop_calibration, nop_calibration_us);
> +               print_engines_calibrations();
>                 printf("%u client%s.\n", clients, clients > 1 ? "s" : "");
>                 if (flags & SWAPVCS)
>                         printf("Swapping VCS rings between clients.\n");
> -- 
> 2.19.0
> 
> _______________________________________________
> igt-dev mailing list
> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
> 
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 22+ messages in thread

* [igt-dev] ✓ Fi.CI.BAT: success for Distinguish particular engines during calculating nop calibration. (rev2)
  2020-01-16 13:55 [igt-dev] [PATCH i-g-t] Distinguish particular engines during calculating nop calibration Anna Karas
                   ` (3 preceding siblings ...)
  2020-01-21 15:04 ` [igt-dev] [PATCH i-g-t] " Anna Karas
@ 2020-01-21 16:00 ` Patchwork
  2020-01-22 18:10 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
                   ` (5 subsequent siblings)
  10 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2020-01-21 16:00 UTC (permalink / raw)
  To: Anna Karas; +Cc: igt-dev

== Series Details ==

Series: Distinguish particular engines during calculating nop calibration. (rev2)
URL   : https://patchwork.freedesktop.org/series/72113/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7783 -> IGTPW_3961
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/index.html

Known issues
------------

  Here are the changes found in IGTPW_3961 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_close_race@basic-threads:
    - fi-byt-j1900:       [PASS][1] -> [TIMEOUT][2] ([fdo#112271] / [i915#816])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-byt-j1900/igt@gem_close_race@basic-threads.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-byt-j1900/igt@gem_close_race@basic-threads.html

  * igt@i915_pm_rpm@module-reload:
    - fi-skl-6600u:       [PASS][3] -> [DMESG-WARN][4] ([i915#889]) +23 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-skl-6600u/igt@i915_pm_rpm@module-reload.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-skl-6600u/igt@i915_pm_rpm@module-reload.html

  * igt@i915_selftest@live_blt:
    - fi-hsw-4770r:       [PASS][5] -> [DMESG-FAIL][6] ([i915#563])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-hsw-4770r/igt@i915_selftest@live_blt.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-hsw-4770r/igt@i915_selftest@live_blt.html

  * igt@i915_selftest@live_gt_lrc:
    - fi-skl-6600u:       [PASS][7] -> [DMESG-FAIL][8] ([i915#889]) +7 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-skl-6600u/igt@i915_selftest@live_gt_lrc.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-skl-6600u/igt@i915_selftest@live_gt_lrc.html

  * igt@kms_chamelium@dp-crc-fast:
    - fi-cml-u2:          [PASS][9] -> [FAIL][10] ([i915#262])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-cml-u2/igt@kms_chamelium@dp-crc-fast.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-cml-u2/igt@kms_chamelium@dp-crc-fast.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-icl-u2:          [PASS][11] -> [FAIL][12] ([i915#217])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html

  
#### Possible fixes ####

  * igt@i915_module_load@reload-with-fault-injection:
    - fi-cfl-8700k:       [DMESG-WARN][13] ([i915#889]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-cfl-8700k/igt@i915_module_load@reload-with-fault-injection.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-cfl-8700k/igt@i915_module_load@reload-with-fault-injection.html
    - fi-skl-6700k2:      [INCOMPLETE][15] ([i915#671]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-skl-6700k2/igt@i915_module_load@reload-with-fault-injection.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-skl-6700k2/igt@i915_module_load@reload-with-fault-injection.html
    - fi-kbl-x1275:       [DMESG-WARN][17] ([i915#889]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-kbl-x1275/igt@i915_module_load@reload-with-fault-injection.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-kbl-x1275/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pm_rpm@module-reload:
    - fi-kbl-x1275:       [INCOMPLETE][19] ([i915#151]) -> [PASS][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html

  
#### Warnings ####

  * igt@gem_exec_parallel@contexts:
    - fi-byt-n2820:       [INCOMPLETE][21] ([i915#45] / [i915#999]) -> [TIMEOUT][22] ([fdo#112271])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-byt-n2820/igt@gem_exec_parallel@contexts.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-byt-n2820/igt@gem_exec_parallel@contexts.html

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-bxt-dsi:         [SKIP][23] ([fdo#109271]) -> [SKIP][24] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-bxt-dsi/igt@kms_chamelium@common-hpd-after-suspend.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-bxt-dsi/igt@kms_chamelium@common-hpd-after-suspend.html
    - fi-hsw-4770:        [SKIP][25] ([fdo#109271]) -> [SKIP][26] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-hsw-4770/igt@kms_chamelium@common-hpd-after-suspend.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-hsw-4770/igt@kms_chamelium@common-hpd-after-suspend.html
    - fi-kbl-soraka:      [SKIP][27] ([fdo#109271]) -> [SKIP][28] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-kbl-soraka/igt@kms_chamelium@common-hpd-after-suspend.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-kbl-soraka/igt@kms_chamelium@common-hpd-after-suspend.html
    - fi-whl-u:           [SKIP][29] ([fdo#109271]) -> [SKIP][30] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-whl-u/igt@kms_chamelium@common-hpd-after-suspend.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-whl-u/igt@kms_chamelium@common-hpd-after-suspend.html
    - fi-pnv-d510:        [SKIP][31] ([fdo#109271]) -> [SKIP][32] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-pnv-d510/igt@kms_chamelium@common-hpd-after-suspend.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-pnv-d510/igt@kms_chamelium@common-hpd-after-suspend.html

  * igt@kms_chamelium@dp-crc-fast:
    - fi-icl-dsi:         [SKIP][33] ([fdo#109284]) -> [SKIP][34] ([fdo#109284] / [fdo#111827]) +8 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-icl-dsi/igt@kms_chamelium@dp-crc-fast.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-icl-dsi/igt@kms_chamelium@dp-crc-fast.html
    - fi-skl-guc:         [SKIP][35] ([fdo#109271]) -> [SKIP][36] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-skl-guc/igt@kms_chamelium@dp-crc-fast.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-skl-guc/igt@kms_chamelium@dp-crc-fast.html
    - fi-bwr-2160:        [SKIP][37] ([fdo#109271]) -> [SKIP][38] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-bwr-2160/igt@kms_chamelium@dp-crc-fast.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-bwr-2160/igt@kms_chamelium@dp-crc-fast.html
    - fi-icl-y:           [SKIP][39] ([fdo#109284]) -> [SKIP][40] ([fdo#109284] / [fdo#111827]) +8 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-icl-y/igt@kms_chamelium@dp-crc-fast.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-icl-y/igt@kms_chamelium@dp-crc-fast.html

  * igt@kms_chamelium@dp-edid-read:
    - fi-cfl-guc:         [SKIP][41] ([fdo#109271]) -> [SKIP][42] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-cfl-guc/igt@kms_chamelium@dp-edid-read.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-cfl-guc/igt@kms_chamelium@dp-edid-read.html
    - fi-icl-guc:         [SKIP][43] ([fdo#109284]) -> [SKIP][44] ([fdo#109284] / [fdo#111827]) +8 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-icl-guc/igt@kms_chamelium@dp-edid-read.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-icl-guc/igt@kms_chamelium@dp-edid-read.html
    - fi-elk-e7500:       [SKIP][45] ([fdo#109271]) -> [SKIP][46] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-elk-e7500/igt@kms_chamelium@dp-edid-read.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-elk-e7500/igt@kms_chamelium@dp-edid-read.html

  * igt@kms_chamelium@dp-hpd-fast:
    - fi-ilk-650:         [SKIP][47] ([fdo#109271]) -> [SKIP][48] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-ilk-650/igt@kms_chamelium@dp-hpd-fast.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-ilk-650/igt@kms_chamelium@dp-hpd-fast.html
    - fi-ivb-3770:        [SKIP][49] ([fdo#109271]) -> [SKIP][50] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-ivb-3770/igt@kms_chamelium@dp-hpd-fast.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-ivb-3770/igt@kms_chamelium@dp-hpd-fast.html

  * igt@kms_chamelium@hdmi-crc-fast:
    - fi-skl-lmem:        [SKIP][51] ([fdo#109271]) -> [SKIP][52] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-skl-lmem/igt@kms_chamelium@hdmi-crc-fast.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-skl-lmem/igt@kms_chamelium@hdmi-crc-fast.html
    - fi-kbl-x1275:       [SKIP][53] ([fdo#109271]) -> [SKIP][54] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-kbl-x1275/igt@kms_chamelium@hdmi-crc-fast.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-kbl-x1275/igt@kms_chamelium@hdmi-crc-fast.html
    - fi-icl-u3:          [SKIP][55] ([fdo#109284]) -> [SKIP][56] ([fdo#109284] / [fdo#111827]) +8 similar issues
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-icl-u3/igt@kms_chamelium@hdmi-crc-fast.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-icl-u3/igt@kms_chamelium@hdmi-crc-fast.html

  * igt@kms_chamelium@hdmi-edid-read:
    - fi-hsw-peppy:       [SKIP][57] ([fdo#109271]) -> [SKIP][58] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-hsw-peppy/igt@kms_chamelium@hdmi-edid-read.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-hsw-peppy/igt@kms_chamelium@hdmi-edid-read.html
    - fi-blb-e6850:       [SKIP][59] ([fdo#109271]) -> [SKIP][60] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-blb-e6850/igt@kms_chamelium@hdmi-edid-read.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-blb-e6850/igt@kms_chamelium@hdmi-edid-read.html
    - fi-kbl-8809g:       [SKIP][61] ([fdo#109271]) -> [SKIP][62] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-kbl-8809g/igt@kms_chamelium@hdmi-edid-read.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-kbl-8809g/igt@kms_chamelium@hdmi-edid-read.html
    - fi-kbl-r:           [SKIP][63] ([fdo#109271]) -> [SKIP][64] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-kbl-r/igt@kms_chamelium@hdmi-edid-read.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-kbl-r/igt@kms_chamelium@hdmi-edid-read.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-apl-guc:         [SKIP][65] ([fdo#109271]) -> [SKIP][66] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-apl-guc/igt@kms_chamelium@hdmi-hpd-fast.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-apl-guc/igt@kms_chamelium@hdmi-hpd-fast.html
    - fi-snb-2520m:       [SKIP][67] ([fdo#109271]) -> [SKIP][68] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-snb-2520m/igt@kms_chamelium@hdmi-hpd-fast.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-snb-2520m/igt@kms_chamelium@hdmi-hpd-fast.html

  * igt@kms_chamelium@vga-edid-read:
    - fi-cfl-8700k:       [SKIP][69] ([fdo#109271]) -> [SKIP][70] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-cfl-8700k/igt@kms_chamelium@vga-edid-read.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-cfl-8700k/igt@kms_chamelium@vga-edid-read.html
    - fi-hsw-4770r:       [SKIP][71] ([fdo#109271]) -> [SKIP][72] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-hsw-4770r/igt@kms_chamelium@vga-edid-read.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-hsw-4770r/igt@kms_chamelium@vga-edid-read.html
    - fi-icl-u2:          [SKIP][73] ([fdo#109309]) -> [FAIL][74] ([i915#217])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-icl-u2/igt@kms_chamelium@vga-edid-read.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-icl-u2/igt@kms_chamelium@vga-edid-read.html
    - fi-skl-6600u:       [SKIP][75] ([fdo#109271]) -> [SKIP][76] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-skl-6600u/igt@kms_chamelium@vga-edid-read.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-skl-6600u/igt@kms_chamelium@vga-edid-read.html

  * igt@kms_chamelium@vga-hpd-fast:
    - fi-kbl-guc:         [SKIP][77] ([fdo#109271]) -> [SKIP][78] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-kbl-guc/igt@kms_chamelium@vga-hpd-fast.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/fi-kbl-guc/igt@kms_chamelium@vga-hpd-fast.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
  [i915#151]: https://gitlab.freedesktop.org/drm/intel/issues/151
  [i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217
  [i915#262]: https://gitlab.freedesktop.org/drm/intel/issues/262
  [i915#45]: https://gitlab.freedesktop.org/drm/intel/issues/45
  [i915#472]: https://gitlab.freedesktop.org/drm/intel/issues/472
  [i915#563]: https://gitlab.freedesktop.org/drm/intel/issues/563
  [i915#647]: https://gitlab.freedesktop.org/drm/intel/issues/647
  [i915#671]: https://gitlab.freedesktop.org/drm/intel/issues/671
  [i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816
  [i915#889]: https://gitlab.freedesktop.org/drm/intel/issues/889
  [i915#937]: https://gitlab.freedesktop.org/drm/intel/issues/937
  [i915#999]: https://gitlab.freedesktop.org/drm/intel/issues/999


Participating hosts (44 -> 41)
------------------------------

  Additional (4): fi-bsw-kefka fi-kbl-7560u fi-glk-dsi fi-gdg-551 
  Missing    (7): fi-ilk-m540 fi-bdw-5557u fi-byt-squawks fi-bsw-cyan fi-kbl-7500u fi-ctg-p8600 fi-byt-clapper 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5376 -> IGTPW_3961

  CI-20190529: 20190529
  CI_DRM_7783: 3ee976286895f0bd54388efc16b12f62c624ff19 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3961: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/index.html
  IGT_5376: 5cf58d947a02379d2885d6dd4f8bb487cfc3eed2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/index.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [igt-dev] [PATCH i-g-t] Distinguish particular engines during calculating nop calibration
  2020-01-21 15:04 ` [igt-dev] [PATCH i-g-t] " Anna Karas
  2020-01-21 15:53   ` Chris Wilson
@ 2020-01-21 16:02   ` Tvrtko Ursulin
  2020-01-24 11:18     ` [igt-dev] [PATCH i-g-t] gem_wsim: " Anna Karas
  1 sibling, 1 reply; 22+ messages in thread
From: Tvrtko Ursulin @ 2020-01-21 16:02 UTC (permalink / raw)
  To: Anna Karas, igt-dev


On 21/01/2020 15:04, Anna Karas wrote:
> Extend handling -n parameter by accepting multiple values of per
> engine nop calibration. Add raw numbers handling to set default
> calibration values. Print copyable and pastable string with
> calibrations. Allow to switch between calculating in parallel
> or doing it sequentially.
> 
> Accepted input values:
> -n 123456
> All calibrations will be set to 123456.
> 
> -n ENG=value,ENG2=value2,value3
> i.e.
> -n RCS=123456,BCS=345678,999999
> RCS engine's value is set to 123456, BCS engine's value is set to
> 345678, 999999 is copied to rest of engines. All engines must be set;
> you can either provide values for each of the engines, or you can set
> specific values and provide a default value for the others.
> 
> -n value,ENG1=value1,ENG2=value2
> First, value is copied to all engines, then value1 overrides ENG1, and
> finally value2 overrides ENG2.
> 
> New output follows the pattern:
> Nop calibrations for 1000us delay is: <eng1>=<v1>,<eng2>=<v2>,...
> So you can easily copy-paste it to the next invocation.
> 
> Switching between calculation modes:
> Run program with -T parameter to calculate calibrations in parallel.
> The calculations are performed sequentially by default.
> 
> v2: Get rid of trailing whitespaces. Skip DEFAULT and VCS engines
> when printing out calibrations. Reject them in the string passed
> to -n. Re-align rest of help text. Fix accepting unknown engines.
> 
> Signed-off-by: Anna Karas <anna.karas@intel.com>
> ---
>   benchmarks/gem_wsim.c | 293 +++++++++++++++++++++++++++++++++---------
>   1 file changed, 235 insertions(+), 58 deletions(-)
> 
> diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c
> index 9156fdc9..ae5d5670 100644
> --- a/benchmarks/gem_wsim.c
> +++ b/benchmarks/gem_wsim.c
> @@ -23,6 +23,7 @@
>    */
>   
>   #include <unistd.h>
> +#include <stdbool.h>
>   #include <stdlib.h>
>   #include <stdint.h>
>   #include <stdio.h>
> @@ -55,6 +56,7 @@
>   #include "i915/gem_mman.h"
>   
>   #include "ewma.h"
> +#include "i915/gem_engine_topology.h"
>   
>   enum intel_engine_id {
>   	DEFAULT,
> @@ -240,7 +242,8 @@ struct workload
>   
>   struct intel_mmio_data mmio_data;
>   static const unsigned int nop_calibration_us = 1000;
> -static unsigned long nop_calibration;
> +static bool has_nop_calibration = false;
> +static bool sequential = true;
>   
>   static unsigned int master_prng;
>   
> @@ -281,6 +284,55 @@ static const char *ring_str_map[NUM_ENGINES] = {
>   	[VECS] = "VECS",
>   };
>   
> +/* stores calibrations for particular engines */
> +static unsigned long engine_calib_map[NUM_ENGINES];
> +
> +static enum intel_engine_id
> +ci_to_engine_id(int class, int instance)
> +{
> +	static const struct {
> +		int class;
> +		int instance;
> +		unsigned int id;
> +	} map[] = {
> +		{ I915_ENGINE_CLASS_RENDER, 0, RCS },
> +		{ I915_ENGINE_CLASS_COPY, 0, BCS },
> +		{ I915_ENGINE_CLASS_VIDEO, 0, VCS1 },
> +		{ I915_ENGINE_CLASS_VIDEO, 1, VCS2 },
> +		{ I915_ENGINE_CLASS_VIDEO, 2, VCS2 }, /* FIXME/ICL */
> +		{ I915_ENGINE_CLASS_VIDEO_ENHANCE, 0, VECS },
> +	};
> +
> +	unsigned int i;
> +
> +	for (i = 0; i < ARRAY_SIZE(map); i++) {
> +		if (class == map[i].class && instance == map[i].instance)
> +			return map[i].id;
> +	}
> +	return -1;
> +}
> +
> +static void
> +apply_unset_calibrations(unsigned long raw_number)
> +{
> +	for (int i = 0; i < NUM_ENGINES; i++)
> +		engine_calib_map[i] += engine_calib_map[i] ? 0 : raw_number;
> +
> +	has_nop_calibration = true;
> +}
> +
> +static void
> +print_engines_calibrations(void)
> +{
> +	printf("Nop calibrations for %uus delay is: ", nop_calibration_us);
> +
> +	/* skip DEFAULT and VCS engines */
> +	for (int i = 1; i < NUM_ENGINES; i++) {
> +		if (i != 3) printf("%s%s=%lu", i - 1 > 0 ? "," : "", ring_str_map[i], engine_calib_map[i]);

Please use symbolic names and also do not assume the order of the enums (DEFAULT is zero or not).

And also we never use this coding style, body of the conditional should go to line following the conditional.

> +	}
> +	printf("\n");
> +}
> +
>   static int
>   parse_dependencies(unsigned int nr_steps, struct w_step *w, char *_desc)
>   {
> @@ -1082,17 +1134,17 @@ static unsigned int get_duration(struct workload *wrk, struct w_step *w)
>   		       (dur->max + 1 - dur->min);
>   }
>   
> -static unsigned long get_bb_sz(unsigned int duration)
> +static unsigned long get_bb_sz(unsigned int duration, enum intel_engine_id engine)
>   {
> -	return ALIGN(duration * nop_calibration * sizeof(uint32_t) /
> -		     nop_calibration_us, sizeof(uint32_t));
> +	return ALIGN(duration * engine_calib_map[engine] * sizeof(uint32_t) /
> +		nop_calibration_us, sizeof(uint32_t));
>   }
>   
>   static void
>   init_bb(struct w_step *w, unsigned int flags)
>   {
>   	const unsigned int arb_period =
> -			get_bb_sz(w->preempt_us) / sizeof(uint32_t);
> +			get_bb_sz(w->preempt_us, w->engine) / sizeof(uint32_t);
>   	const unsigned int mmap_len = ALIGN(w->bb_sz, 4096);
>   	unsigned int i;
>   	uint32_t *ptr;
> @@ -1319,10 +1371,11 @@ alloc_step_batch(struct workload *wrk, struct w_step *w, unsigned int flags)
>   
>   	if (w->unbound_duration)
>   		/* nops + MI_ARB_CHK + MI_BATCH_BUFFER_START */
> -		w->bb_sz = max(PAGE_SIZE, get_bb_sz(w->preempt_us)) +
> +		w->bb_sz = max(PAGE_SIZE, get_bb_sz(w->preempt_us, w->engine)) +
>   			   (1 + 3) * sizeof(uint32_t);
>   	else
> -		w->bb_sz = get_bb_sz(w->duration.max);
> +		w->bb_sz = get_bb_sz(w->duration.max, w->engine);
> +
>   	w->bb_handle = w->obj[j].handle = gem_create(fd, w->bb_sz + (w->unbound_duration ? 4096 : 0));
>   	init_bb(w, flags);
>   	w->obj[j].relocation_count = terminate_bb(w, flags);
> @@ -2622,7 +2675,7 @@ do_eb(struct workload *wrk, struct w_step *w, enum intel_engine_id engine,
>   	w->eb.batch_start_offset =
>   		w->unbound_duration ?
>   		0 :
> -		ALIGN(w->bb_sz - get_bb_sz(get_duration(wrk, w)),
> +		ALIGN(w->bb_sz - get_bb_sz(get_duration(wrk, w), w->engine),
>   		      2 * sizeof(uint32_t));
>   
>   	for (i = 0; i < w->fence_deps.nr; i++) {
> @@ -2899,15 +2952,18 @@ static void fini_workload(struct workload *wrk)
>   	free(wrk);
>   }
>   
> -static unsigned long calibrate_nop(unsigned int tolerance_pct)
> +static unsigned long calibrate_nop(unsigned int tolerance_pct, struct intel_execution_engine2 *engine)
>   {
>   	const uint32_t bbe = 0xa << 23;
>   	unsigned int loops = 17;
>   	unsigned int usecs = nop_calibration_us;
>   	struct drm_i915_gem_exec_object2 obj = {};
> -	struct drm_i915_gem_execbuffer2 eb =
> -		{ .buffer_count = 1, .buffers_ptr = (uintptr_t)&obj};
> -	long size, last_size;
> +	struct drm_i915_gem_execbuffer2 eb = {
> +		.buffer_count = 1,
> +		.buffers_ptr = (uintptr_t)&obj,
> +		.flags = engine->flags
> +	};
> +	unsigned long size, last_size;
>   	struct timespec t_0, t_end;
>   
>   	clock_gettime(CLOCK_MONOTONIC, &t_0);
> @@ -2939,6 +2995,77 @@ static unsigned long calibrate_nop(unsigned int tolerance_pct)
>   	return size / sizeof(uint32_t);
>   }
>   
> +static void
> +calibrate_sequentially(void)
> +{
> +	struct intel_execution_engine2 *engine;
> +	enum intel_engine_id eng_id;
> +
> +	__for_each_physical_engine(fd, engine) {
> +		eng_id = ci_to_engine_id(engine->class, engine->instance);
> +		igt_assert(eng_id >= 0);
> +		engine_calib_map[eng_id] = calibrate_nop(fd, engine);
> +	}
> +}
> +
> +struct thread_data {
> +	struct intel_execution_engine2 *eng;
> +	pthread_t thr;
> +	unsigned long calib;
> +};
> +
> +static void *
> +engine_calibration_thread(void *data)
> +{
> +	struct thread_data *thr_d = (struct thread_data *) data;
> +
> +	thr_d->calib = calibrate_nop(fd, thr_d->eng);
> +	return NULL;
> +}
> +
> +static void
> +calibrate_in_parallel(void)
> +{
> +	struct thread_data *thr_d = malloc(NUM_ENGINES * sizeof(*thr_d));
> +	struct intel_execution_engine2 *engine;
> +	enum intel_engine_id id;
> +	int ret;
> +
> +	__for_each_physical_engine(fd, engine) {
> +		id = ci_to_engine_id(engine->class, engine->instance);
> +		thr_d[id].eng = engine;
> +		ret = pthread_create(&thr_d[id].thr, NULL, engine_calibration_thread, &thr_d[id]);
> +		igt_assert_eq(ret, 0);
> +	}
> +
> +	__for_each_physical_engine(fd, engine) {
> +		id = ci_to_engine_id(engine->class, engine->instance);
> +		igt_assert(id >= 0);
> +
> +		ret = pthread_join(thr_d[id].thr, NULL);
> +		igt_assert_eq(ret, 0);
> +		engine_calib_map[id] = thr_d[id].calib;
> +	}
> +
> +	free(thr_d);
> +}
> +
> +static void
> +calibrate_engines(void)
> +{
> +	if (sequential)
> +		calibrate_sequentially();
> +	else
> +		calibrate_in_parallel();
> +
> +	has_nop_calibration = true;
> +
> +	if (verbose > 1)
> +		print_engines_calibrations();
> +
> +}
> +
> +
>   static void print_help(void)
>   {
>   	unsigned int i;
> @@ -2951,50 +3078,53 @@ static void print_help(void)
>   "be provided when running the simulation in subsequent invocations.\n"
>   "\n"
>   "Options:\n"
> -"  -h              This text.\n"
> -"  -q              Be quiet - do not output anything to stdout.\n"
> -"  -n <n>          Nop calibration value.\n"
> -"  -t <n>          Nop calibration tolerance percentage.\n"
> -"                  Use when there is a difficulty obtaining calibration with the\n"
> -"                  default settings.\n"
> -"  -I <n>          Initial randomness seed.\n"
> -"  -p <n>          Context priority to use for the following workload on the\n"
> -"                  command line.\n"
> -"  -w <desc|path>  Filename or a workload descriptor.\n"
> -"                  Can be given multiple times.\n"
> -"  -W <desc|path>  Filename or a master workload descriptor.\n"
> -"                  Only one master workload can be optinally specified in which\n"
> -"                  case all other workloads become background ones and run as\n"
> -"                  long as the master.\n"
> -"  -a <desc|path>  Append a workload to all other workloads.\n"
> -"  -r <n>          How many times to emit the workload.\n"
> -"  -c <n>          Fork N clients emitting the workload simultaneously.\n"
> -"  -x              Swap VCS1 and VCS2 engines in every other client.\n"
> -"  -b <n>          Load balancing to use.\n"
> -"                  Available load balancers are:"
> +"  -h                This text.\n"
> +"  -q                Be quiet - do not output anything to stdout.\n"
> +"  -n <n |           Nop calibration value - single value is set to all engines\n"
> +"  e1=v1,e2=v2,n...> without specified value; you can also specify calibrations for\n"
> +"                    particular engines.\n"
> +"  -t <n>            Nop calibration tolerance percentage.\n"
> +"  -T                Disable sequential calibration and perform calibration in parallel.\n"
> +"                    Use when there is a difficulty obtaining calibration with the\n"
> +"                    default settings.\n"
> +"  -I <n>            Initial randomness seed.\n"
> +"  -p <n>            Context priority to use for the following workload on the\n"
> +"                    command line.\n"
> +"  -w <desc|path>    Filename or a workload descriptor.\n"
> +"                    Can be given multiple times.\n"
> +"  -W <desc|path>    Filename or a master workload descriptor.\n"
> +"                    Only one master workload can be optinally specified in which\n"
> +"                    case all other workloads become background ones and run as\n"
> +"                    long as the master.\n"
> +"  -a <desc|path>    Append a workload to all other workloads.\n"
> +"  -r <n>            How many times to emit the workload.\n"
> +"  -c <n>            Fork N clients emitting the workload simultaneously.\n"
> +"  -x                Swap VCS1 and VCS2 engines in every other client.\n"
> +"  -b <n>            Load balancing to use.\n"
> +"                    Available load balancers are:"
>   	);
>   
>   	for (i = 0; i < ARRAY_SIZE(all_balancers); i++) {
>   		igt_assert(all_balancers[i].desc);
>   		printf(
> -"                     %s (%u): %s\n",
> +"                       %s (%u): %s\n",
>   		       all_balancers[i].name, all_balancers[i].id,
>   		       all_balancers[i].desc);
>   	}
>   	puts(
> -"                  Balancers can be specified either as names or as their id\n"
> -"                  number as listed above.\n"
> -"  -2              Remap VCS2 to BCS.\n"
> -"  -R              Round-robin initial VCS assignment per client.\n"
> -"  -H              Send heartbeat on synchronisation points with seqno based\n"
> -"                  balancers. Gives better engine busyness view in some cases.\n"
> -"  -s              Turn on small SSEU config for the next workload on the\n"
> -"                  command line. Subsequent -s switches it off.\n"
> -"  -S              Synchronize the sequence of random batch durations between\n"
> -"                  clients.\n"
> -"  -G              Global load balancing - a single load balancer will be shared\n"
> -"                  between all clients and there will be a single seqno domain.\n"
> -"  -d              Sync between data dependencies in userspace."
> +"                     Balancers can be specified either as names or as their id\n"
> +"                     number as listed above.\n"
> +"  -2                 Remap VCS2 to BCS.\n"
> +"  -R                 Round-robin initial VCS assignment per client.\n"
> +"  -H                 Send heartbeat on synchronisation points with seqno based\n"
> +"                     balancers. Gives better engine busyness view in some cases.\n"
> +"  -s                 Turn on small SSEU config for the next workload on the\n"
> +"                     command line. Subsequent -s switches it off.\n"
> +"  -S                 Synchronize the sequence of random batch durations between\n"
> +"                     clients.\n"
> +"  -G                 Global load balancing - a single load balancer will be shared\n"
> +"                     between all clients and there will be a single seqno domain.\n"
> +"  -d                 Sync between data dependencies in userspace."
>   	);
>   }
>   
> @@ -3117,6 +3247,10 @@ int main(int argc, char **argv)
>   	int prio = 0;
>   	double t;
>   	int i, c;
> +	char *subopts, *value;
> +	enum intel_engine_id eng;
> +	int raw_number = 0;
> +	long calib_val;
>   
>   	/*
>   	 * Open the device via the low-level API so we can do the GPU quiesce
> @@ -3134,7 +3268,7 @@ int main(int argc, char **argv)
>   	master_prng = time(NULL);
>   
>   	while ((c = getopt(argc, argv,
> -			   "hqv2RsSHxGdc:n:r:w:W:a:t:b:p:I:")) != -1) {
> +			   "Thqv2RsSHxGdc:n:r:w:W:a:t:b:p:I:")) != -1) {
>   		switch (c) {
>   		case 'W':
>   			if (master_workload >= 0) {
> @@ -3163,8 +3297,53 @@ int main(int argc, char **argv)
>   		case 't':
>   			tolerance_pct = strtol(optarg, NULL, 0);
>   			break;
> +		case 'T':
> +			sequential = false;
> +			break;
> +
>   		case 'n':
> -			nop_calibration = strtol(optarg, NULL, 0);
> +			subopts = optarg;
> +			while (*subopts != '\0') {
> +				eng = getsubopt(&subopts, (char **)ring_str_map, &value);
> +				if (!value) {
> +					wsim_err("No calibration value for engine has been provided.\n");
> +					goto err;
> +				}
> +
> +				calib_val = atol(value);

I tried a negative value and it was silently accepted. 

> +
> +				if (!calib_val) {
> +					wsim_err("An unsupported engine has been provided.\n");

Hm how is this unsupported engine?

-n RCS=0 triggers this for instance.

What are all input combinations where this can be hit?

> +					goto err;
> +				}
> +
> +				switch (eng) {
> +				/* skip DEFAULT and VCS engines */
> +				case DEFAULT:
> +				case VCS:
> +					wsim_err("An unsupported engine has been provided.\n");
> +					goto err;
> +				case RCS:
> +				case BCS:
> +				case VCS1 ... VECS:

Using the range also implies order of the enum. I think it is better to list them all individually. Or would it be better to use if-else instead of a switch here?

...

Actually try squashing the below into your patch and please do test it to check if I haven't missed something:

diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c
index ae5d5670de0d..52a617183e49 100644
--- a/benchmarks/gem_wsim.c
+++ b/benchmarks/gem_wsim.c
@@ -3248,9 +3248,9 @@ int main(int argc, char **argv)
 	double t;
 	int i, c;
 	char *subopts, *value;
-	enum intel_engine_id eng;
 	int raw_number = 0;
 	long calib_val;
+	int eng;
 
 	/*
 	 * Open the device via the low-level API so we can do the GPU quiesce
@@ -3304,44 +3304,43 @@ int main(int argc, char **argv)
 		case 'n':
 			subopts = optarg;
 			while (*subopts != '\0') {
-				eng = getsubopt(&subopts, (char **)ring_str_map, &value);
-				if (!value) {
-					wsim_err("No calibration value for engine has been provided.\n");
-					goto err;
-				}
+				eng = getsubopt(&subopts, (char **)ring_str_map,
+						&value);
 
 				calib_val = atol(value);
 
-				if (!calib_val) {
-					wsim_err("An unsupported engine has been provided.\n");
+				if (calib_val < 0) {
+					wsim_err("Invalid negative calibration!\n");
 					goto err;
 				}
 
-				switch (eng) {
-				/* skip DEFAULT and VCS engines */
-				case DEFAULT:
-				case VCS:
-					wsim_err("An unsupported engine has been provided.\n");
+				if (eng < 0 && !calib_val) {
+					wsim_err("Invalid calibration or engine '%s'!\n",
+						 value);
 					goto err;
-				case RCS:
-				case BCS:
-				case VCS1 ... VECS:
-					engine_calib_map[eng] = calib_val;
-					has_nop_calibration = true;
-					break;
-				default:
-					/* raw number was given - two cases:
-					 * raw number is already set */
+				} else if (eng < 0) {
 					if (raw_number) {
-						wsim_err("Default engine calibration provided more than once.\n");
+						wsim_err("Default engine calibration provided more than once!\n");
 						goto err;
 					}
-					else if (!raw_number) {
-						/* raw number has been set for the first time */
-						raw_number = calib_val;
-						apply_unset_calibrations(raw_number);
+					raw_number = calib_val;
+					apply_unset_calibrations(raw_number);
+				} else if (eng == DEFAULT || eng == VCS) {
+					wsim_err("'%s' not allowed in engine calibrations!\n",
+						 ring_str_map[eng]);
+					goto err;
+				} else {
+					if (!calib_val) {
+						wsim_err("Invalid zero calibration!\n");
+						goto err;
+					} else if (engine_calib_map[eng]) {
+						wsim_err("Invalid repeated calibration of %s!\n",
+							ring_str_map[eng]);
+						goto err;
+					} else {
+						engine_calib_map[eng] = calib_val;
+						has_nop_calibration = true;
 					}
-					break;
 				}
 			}
 			break;
@@ -3430,6 +3429,22 @@ int main(int argc, char **argv)
 		calibrate_engines();
 
 		goto out;
+	} else {
+		bool missing = false;
+
+		for (i = 0; i < NUM_ENGINES; i++) {
+			if (i == DEFAULT || i == VCS)
+				continue;
+
+			if (!engine_calib_map[i]) {
+				wsim_err("Missing calibration for '%s'!\n",
+					 ring_str_map[i]);
+				missing = true;
+			}
+		}
+
+		if (missing)
+			goto err;
 	}
 
 	if (!nr_w_args) {

Regards,

Tvrtko

> +					engine_calib_map[eng] = calib_val;
> +					has_nop_calibration = true;
> +					break;
> +				default:
> +					/* raw number was given - two cases:
> +					 * raw number is already set */
> +					if (raw_number) {
> +						wsim_err("Default engine calibration provided more than once.\n");
> +						goto err;
> +					}
> +					else if (!raw_number) {

"} else if (...) {" is our coding style.

> +						/* raw number has been set for the first time */
> +						raw_number = calib_val;
> +						apply_unset_calibrations(raw_number);
> +					}
> +					break;
> +				}
> +			}
>   			break;
>   		case 'r':
>   			repeat = strtol(optarg, NULL, 0);
> @@ -3242,14 +3421,13 @@ int main(int argc, char **argv)
>   		goto err;
>   	}
>   
> -	if (!nop_calibration) {
> -		if (verbose > 1)
> -			printf("Calibrating nop delay with %u%% tolerance...\n",
> +	if (!has_nop_calibration) {
> +		if (verbose > 1) {
> +			printf("Calibrating nop delays with %u%% tolerance...\n",
>   				tolerance_pct);
> -		nop_calibration = calibrate_nop(tolerance_pct);
> -		if (verbose)
> -			printf("Nop calibration for %uus delay is %lu.\n",
> -			       nop_calibration_us, nop_calibration);
> +		}
> +
> +		calibrate_engines();
>   
>   		goto out;
>   	}
> @@ -3309,8 +3487,7 @@ int main(int argc, char **argv)
>   
>   	if (verbose > 1) {
>   		printf("Random seed is %u.\n", master_prng);
> -		printf("Using %lu nop calibration for %uus delay.\n",
> -		       nop_calibration, nop_calibration_us);
> +		print_engines_calibrations();
>   		printf("%u client%s.\n", clients, clients > 1 ? "s" : "");
>   		if (flags & SWAPVCS)
>   			printf("Swapping VCS rings between clients.\n");
> 
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply related	[flat|nested] 22+ messages in thread

* [igt-dev] ✗ Fi.CI.IGT: failure for Distinguish particular engines during calculating nop calibration. (rev2)
  2020-01-16 13:55 [igt-dev] [PATCH i-g-t] Distinguish particular engines during calculating nop calibration Anna Karas
                   ` (4 preceding siblings ...)
  2020-01-21 16:00 ` [igt-dev] ✓ Fi.CI.BAT: success for Distinguish particular engines during calculating nop calibration. (rev2) Patchwork
@ 2020-01-22 18:10 ` Patchwork
  2020-01-23 18:13 ` [igt-dev] ✓ Fi.CI.IGT: success " Patchwork
                   ` (4 subsequent siblings)
  10 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2020-01-22 18:10 UTC (permalink / raw)
  To: Tvrtko Ursulin; +Cc: igt-dev

== Series Details ==

Series: Distinguish particular engines during calculating nop calibration. (rev2)
URL   : https://patchwork.freedesktop.org/series/72113/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_7783_full -> IGTPW_3961_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_3961_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_3961_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_3961_full:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_atomic_transition@5x-modeset-transitions:
    - shard-tglb:         NOTRUN -> [SKIP][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-tglb6/igt@kms_atomic_transition@5x-modeset-transitions.html

  
#### Warnings ####

  * igt@kms_atomic_transition@5x-modeset-transitions-nonblocking-fencing:
    - shard-tglb:         [SKIP][2] ([fdo#112021]) -> [SKIP][3] +2 similar issues
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-tglb2/igt@kms_atomic_transition@5x-modeset-transitions-nonblocking-fencing.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-tglb1/igt@kms_atomic_transition@5x-modeset-transitions-nonblocking-fencing.html

  
Known issues
------------

  Here are the changes found in IGTPW_3961_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_busy@busy-vcs1:
    - shard-iclb:         [PASS][4] -> [SKIP][5] ([fdo#112080]) +15 similar issues
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb2/igt@gem_busy@busy-vcs1.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb6/igt@gem_busy@busy-vcs1.html

  * igt@gem_ctx_isolation@vcs1-dirty-create:
    - shard-iclb:         [PASS][6] -> [SKIP][7] ([fdo#109276] / [fdo#112080]) +3 similar issues
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb4/igt@gem_ctx_isolation@vcs1-dirty-create.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb8/igt@gem_ctx_isolation@vcs1-dirty-create.html

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [PASS][8] -> [SKIP][9] ([fdo#110854])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb4/igt@gem_exec_balancer@smoke.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb8/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_create@forked:
    - shard-glk:          [PASS][10] -> [TIMEOUT][11] ([fdo#112271] / [i915#940])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-glk3/igt@gem_exec_create@forked.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-glk9/igt@gem_exec_create@forked.html

  * igt@gem_exec_schedule@independent-bsd2:
    - shard-iclb:         [PASS][12] -> [SKIP][13] ([fdo#109276]) +16 similar issues
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb1/igt@gem_exec_schedule@independent-bsd2.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb8/igt@gem_exec_schedule@independent-bsd2.html

  * igt@gem_exec_schedule@preempt-self-bsd:
    - shard-iclb:         [PASS][14] -> [SKIP][15] ([fdo#112146]) +4 similar issues
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb8/igt@gem_exec_schedule@preempt-self-bsd.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb1/igt@gem_exec_schedule@preempt-self-bsd.html

  * igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive:
    - shard-hsw:          [PASS][16] -> [INCOMPLETE][17] ([i915#530] / [i915#61])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-hsw7/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-hsw7/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html

  * igt@gem_tiled_blits@interruptible:
    - shard-hsw:          [PASS][18] -> [FAIL][19] ([i915#818])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-hsw6/igt@gem_tiled_blits@interruptible.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-hsw2/igt@gem_tiled_blits@interruptible.html

  * igt@kms_flip@2x-flip-vs-suspend:
    - shard-hsw:          [PASS][20] -> [INCOMPLETE][21] ([i915#61])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-hsw2/igt@kms_flip@2x-flip-vs-suspend.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-hsw5/igt@kms_flip@2x-flip-vs-suspend.html

  * igt@kms_flip@2x-modeset-vs-vblank-race:
    - shard-hsw:          [PASS][22] -> [DMESG-WARN][23] ([i915#44])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-hsw7/igt@kms_flip@2x-modeset-vs-vblank-race.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-hsw5/igt@kms_flip@2x-modeset-vs-vblank-race.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-apl:          [PASS][24] -> [DMESG-WARN][25] ([i915#180]) +2 similar issues
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-apl2/igt@kms_flip@flip-vs-suspend-interruptible.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-apl6/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-kbl:          [PASS][26] -> [DMESG-WARN][27] ([i915#180]) +2 similar issues
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-kbl6/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-pgflip-blt:
    - shard-tglb:         [PASS][28] -> [FAIL][29] ([i915#49]) +2 similar issues
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-tglb8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-pgflip-blt.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-pgflip-blt.html

  * igt@kms_psr2_su@page_flip:
    - shard-iclb:         [PASS][30] -> [SKIP][31] ([fdo#109642] / [fdo#111068])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb2/igt@kms_psr2_su@page_flip.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb4/igt@kms_psr2_su@page_flip.html

  * igt@kms_psr@psr2_sprite_render:
    - shard-iclb:         [PASS][32] -> [SKIP][33] ([fdo#109441]) +1 similar issue
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb2/igt@kms_psr@psr2_sprite_render.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb8/igt@kms_psr@psr2_sprite_render.html

  
#### Possible fixes ####

  * igt@gem_ctx_persistence@vcs1-mixed:
    - shard-iclb:         [SKIP][34] ([fdo#109276] / [fdo#112080]) -> [PASS][35] +3 similar issues
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb7/igt@gem_ctx_persistence@vcs1-mixed.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb4/igt@gem_ctx_persistence@vcs1-mixed.html

  * igt@gem_exec_schedule@pi-common-bsd:
    - shard-iclb:         [SKIP][36] ([i915#677]) -> [PASS][37]
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb1/igt@gem_exec_schedule@pi-common-bsd.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb7/igt@gem_exec_schedule@pi-common-bsd.html

  * igt@gem_exec_schedule@preempt-other-chain-bsd:
    - shard-iclb:         [SKIP][38] ([fdo#112146]) -> [PASS][39] +4 similar issues
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb4/igt@gem_exec_schedule@preempt-other-chain-bsd.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb6/igt@gem_exec_schedule@preempt-other-chain-bsd.html

  * igt@gem_exec_schedule@smoketest-all:
    - shard-tglb:         [INCOMPLETE][40] ([i915#463] / [i915#472]) -> [PASS][41]
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-tglb1/igt@gem_exec_schedule@smoketest-all.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-tglb1/igt@gem_exec_schedule@smoketest-all.html

  * igt@gem_exec_suspend@basic-s3:
    - shard-kbl:          [DMESG-WARN][42] ([i915#180]) -> [PASS][43] +7 similar issues
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-kbl4/igt@gem_exec_suspend@basic-s3.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-kbl1/igt@gem_exec_suspend@basic-s3.html

  * igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive:
    - shard-apl:          [TIMEOUT][44] ([fdo#112271] / [i915#530]) -> [PASS][45]
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-apl3/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-apl1/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive.html
    - shard-hsw:          [TIMEOUT][46] ([fdo#112271] / [i915#530]) -> [PASS][47] +1 similar issue
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-hsw1/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-hsw1/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive.html

  * igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing:
    - shard-apl:          [TIMEOUT][48] ([fdo#112271]) -> [PASS][49]
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-apl7/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-apl2/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
    - shard-tglb:         [TIMEOUT][50] ([fdo#112126] / [fdo#112271]) -> [PASS][51]
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-tglb1/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-tglb7/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html

  * igt@gem_persistent_relocs@forked-interruptible-thrash-inactive:
    - shard-tglb:         [TIMEOUT][52] ([fdo#112126] / [fdo#112271] / [i915#530]) -> [PASS][53]
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-tglb5/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-tglb2/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html

  * igt@gem_persistent_relocs@forked-interruptible-thrashing:
    - shard-glk:          [TIMEOUT][54] ([fdo#112271]) -> [PASS][55]
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-glk2/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-glk2/igt@gem_persistent_relocs@forked-interruptible-thrashing.html

  * igt@gem_pipe_control_store_loop@reused-buffer:
    - shard-hsw:          [FAIL][56] ([i915#874]) -> [PASS][57]
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-hsw4/igt@gem_pipe_control_store_loop@reused-buffer.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-hsw4/igt@gem_pipe_control_store_loop@reused-buffer.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-iclb:         [FAIL][58] ([i915#454]) -> [PASS][59]
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb2/igt@i915_pm_dc@dc6-psr.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb4/igt@i915_pm_dc@dc6-psr.html

  * igt@i915_selftest@mock_requests:
    - shard-tglb:         [INCOMPLETE][60] ([i915#472]) -> [PASS][61] +1 similar issue
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-tglb7/igt@i915_selftest@mock_requests.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-tglb7/igt@i915_selftest@mock_requests.html
    - shard-hsw:          [INCOMPLETE][62] ([i915#61]) -> [PASS][63]
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-hsw1/igt@i915_selftest@mock_requests.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-hsw5/igt@i915_selftest@mock_requests.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-apl:          [DMESG-WARN][64] ([i915#180]) -> [PASS][65]
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-apl8/igt@kms_flip@flip-vs-suspend.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-apl2/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-render:
    - shard-tglb:         [FAIL][66] ([i915#49]) -> [PASS][67]
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-render.html
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-tglb4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-render.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         [SKIP][68] ([fdo#109642] / [fdo#111068]) -> [PASS][69]
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb1/igt@kms_psr2_su@frontbuffer.html
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb2/igt@kms_psr2_su@frontbuffer.html

  * igt@kms_psr@psr2_cursor_render:
    - shard-iclb:         [SKIP][70] ([fdo#109441]) -> [PASS][71] +2 similar issues
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb6/igt@kms_psr@psr2_cursor_render.html
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb2/igt@kms_psr@psr2_cursor_render.html

  * igt@perf_pmu@busy-check-all-vcs1:
    - shard-iclb:         [SKIP][72] ([fdo#112080]) -> [PASS][73] +11 similar issues
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb3/igt@perf_pmu@busy-check-all-vcs1.html
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb1/igt@perf_pmu@busy-check-all-vcs1.html

  * igt@prime_vgem@fence-wait-bsd2:
    - shard-iclb:         [SKIP][74] ([fdo#109276]) -> [PASS][75] +10 similar issues
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb6/igt@prime_vgem@fence-wait-bsd2.html
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb1/igt@prime_vgem@fence-wait-bsd2.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv-switch:
    - shard-iclb:         [FAIL][76] ([IGT#28]) -> [SKIP][77] ([fdo#109276] / [fdo#112080])
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb4/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb8/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html

  * igt@gem_userptr_blits@sync-unmap:
    - shard-snb:          [DMESG-WARN][78] ([fdo#110789] / [fdo#111870] / [i915#478]) -> [DMESG-WARN][79] ([fdo#111870] / [i915#478])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-snb4/igt@gem_userptr_blits@sync-unmap.html
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-snb1/igt@gem_userptr_blits@sync-unmap.html

  * igt@kms_atomic_transition@4x-modeset-transitions-nonblocking-fencing:
    - shard-tglb:         [SKIP][80] ([fdo#112041]) -> [SKIP][81] ([fdo#112022] / [fdo#112041]) +3 similar issues
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-tglb8/igt@kms_atomic_transition@4x-modeset-transitions-nonblocking-fencing.html
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-tglb3/igt@kms_atomic_transition@4x-modeset-transitions-nonblocking-fencing.html

  * igt@kms_atomic_transition@6x-modeset-transitions-nonblocking:
    - shard-tglb:         [SKIP][82] ([fdo#112016] / [fdo#112021]) -> [SKIP][83] ([fdo#112016]) +3 similar issues
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-tglb8/igt@kms_atomic_transition@6x-modeset-transitions-nonblocking.html
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-tglb4/igt@kms_atomic_transition@6x-modeset-transitions-nonblocking.html

  * igt@kms_dp_dsc@basic-dsc-enable-edp:
    - shard-iclb:         [DMESG-WARN][84] ([fdo#107724]) -> [SKIP][85] ([fdo#109349])
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb4/igt@kms_dp_dsc@basic-dsc-enable-edp.html

  * igt@runner@aborted:
    - shard-glk:          [FAIL][86] ([k.org#202321]) -> [FAIL][87] ([i915#940] / [k.org#202321])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-glk2/igt@runner@aborted.html
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-glk9/igt@runner@aborted.html

  
  [IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110789]: https://bugs.freedesktop.org/show_bug.cgi?id=110789
  [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
  [fdo#112016]: https://bugs.freedesktop.org/show_bug.cgi?id=112016
  [fdo#112021]: https://bugs.freedesktop.org/show_bug.cgi?id=112021
  [fdo#112022]: https://bugs.freedesktop.org/show_bug.cgi?id=112022
  [fdo#112041]: https://bugs.freedesktop.org/show_bug.cgi?id=112041
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112126]: https://bugs.freedesktop.org/show_bug.cgi?id=112126
  [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
  [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#44]: https://gitlab.freedesktop.org/drm/intel/issues/44
  [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
  [i915#463]: https://gitlab.freedesktop.org/drm/intel/issues/463
  [i915#472]: https://gitlab.freedesktop.org/drm/intel/issues/472
  [i915#478]: https://gitlab.freedesktop.org/drm/intel/issues/478
  [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
  [i915#530]: https://gitlab.freedesktop.org/drm/intel/issues/530
  [i915#61]: https://gitlab.freedesktop.org/drm/intel/issues/61
  [i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
  [i915#818]: https://gitlab.freedesktop.org/drm/intel/issues/818
  [i915#874]: https://gitlab.freedesktop.org/drm/intel/issues/874
  [i915#940]: https://gitlab.freedesktop.org/drm/intel/issues/940
  [k.org#202321]: https://bugzilla.kernel.org/show_bug.cgi?id=202321


Participating hosts (10 -> 8)
------------------------------

  Missing    (2): pig-skl-6260u pig-glk-j5005 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5376 -> IGTPW_3961
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_7783: 3ee976286895f0bd54388efc16b12f62c624ff19 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3961: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/index.html
  IGT_5376: 5cf58d947a02379d2885d6dd4f8bb487cfc3eed2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/index.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [igt-dev] [PATCH i-g-t] Distinguish particular engines during calculating nop calibration
  2020-01-21 15:53   ` Chris Wilson
@ 2020-01-23 14:45     ` Tvrtko Ursulin
  0 siblings, 0 replies; 22+ messages in thread
From: Tvrtko Ursulin @ 2020-01-23 14:45 UTC (permalink / raw)
  To: Chris Wilson, Anna Karas, igt-dev


On 21/01/2020 15:53, Chris Wilson wrote:
> Quoting Anna Karas (2020-01-21 15:04:00)
>> @@ -3242,14 +3421,13 @@ int main(int argc, char **argv)
>>                  goto err;
>>          }
>>   
>> -       if (!nop_calibration) {
>> -               if (verbose > 1)
>> -                       printf("Calibrating nop delay with %u%% tolerance...\n",
>> +       if (!has_nop_calibration) {
>> +               if (verbose > 1) {
>> +                       printf("Calibrating nop delays with %u%% tolerance...\n",
>>                                  tolerance_pct);
>> -               nop_calibration = calibrate_nop(tolerance_pct);
>> -               if (verbose)
>> -                       printf("Nop calibration for %uus delay is %lu.\n",
>> -                              nop_calibration_us, nop_calibration);
>> +               }
>> +
>> +               calibrate_engines();
>>   
>>                  goto out;
>>          }
>> @@ -3309,8 +3487,7 @@ int main(int argc, char **argv)
>>   
>>          if (verbose > 1) {
> 
> Hmm, could this be
> if (verbose > 1 || !has_nop_calibration)
> so that a plain run of gem_wsim shows the calibration results?

verbose = 1 is default and currently shows the calibration value.

-q on the command line sets verbose = 0 and then it doesn't.

-v does verbose++.

If with plain run you mean gem_wsim without any arguments it should show 
the calibration. I think that means the check in calibrate_engines() 
needs to be changed to:

+	if (verbose)
+		print_engines_calibrations();

Yes good catch, I missed this. Probably also best to leave 
print_engines_calibrations() (and lose double plural?) outside of 
calibrate_engines().

Regards,

Tvrtko

>>                  printf("Random seed is %u.\n", master_prng);
>> -               printf("Using %lu nop calibration for %uus delay.\n",
>> -                      nop_calibration, nop_calibration_us);
>> +               print_engines_calibrations();
>>                  printf("%u client%s.\n", clients, clients > 1 ? "s" : "");
>>                  if (flags & SWAPVCS)
>>                          printf("Swapping VCS rings between clients.\n");
>> -- 
>> 2.19.0
>>
>> _______________________________________________
>> igt-dev mailing list
>> igt-dev@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/igt-dev
>>
> _______________________________________________
> igt-dev mailing list
> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
> 
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 22+ messages in thread

* [igt-dev] ✓ Fi.CI.IGT: success for Distinguish particular engines during calculating nop calibration. (rev2)
  2020-01-16 13:55 [igt-dev] [PATCH i-g-t] Distinguish particular engines during calculating nop calibration Anna Karas
                   ` (5 preceding siblings ...)
  2020-01-22 18:10 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
@ 2020-01-23 18:13 ` Patchwork
  2020-01-24 12:03 ` [igt-dev] ✓ Fi.CI.BAT: success for Distinguish particular engines during calculating nop calibration. (rev4) Patchwork
                   ` (3 subsequent siblings)
  10 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2020-01-23 18:13 UTC (permalink / raw)
  To: Tvrtko Ursulin; +Cc: igt-dev

== Series Details ==

Series: Distinguish particular engines during calculating nop calibration. (rev2)
URL   : https://patchwork.freedesktop.org/series/72113/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7783_full -> IGTPW_3961_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/index.html

Known issues
------------

  Here are the changes found in IGTPW_3961_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_busy@busy-vcs1:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([fdo#112080]) +15 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb2/igt@gem_busy@busy-vcs1.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb6/igt@gem_busy@busy-vcs1.html

  * igt@gem_ctx_isolation@vcs1-dirty-create:
    - shard-iclb:         [PASS][3] -> [SKIP][4] ([fdo#109276] / [fdo#112080]) +3 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb4/igt@gem_ctx_isolation@vcs1-dirty-create.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb8/igt@gem_ctx_isolation@vcs1-dirty-create.html

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [PASS][5] -> [SKIP][6] ([fdo#110854])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb4/igt@gem_exec_balancer@smoke.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb8/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_create@forked:
    - shard-glk:          [PASS][7] -> [TIMEOUT][8] ([fdo#112271] / [i915#940])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-glk3/igt@gem_exec_create@forked.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-glk9/igt@gem_exec_create@forked.html

  * igt@gem_exec_schedule@independent-bsd2:
    - shard-iclb:         [PASS][9] -> [SKIP][10] ([fdo#109276]) +16 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb1/igt@gem_exec_schedule@independent-bsd2.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb8/igt@gem_exec_schedule@independent-bsd2.html

  * igt@gem_exec_schedule@preempt-self-bsd:
    - shard-iclb:         [PASS][11] -> [SKIP][12] ([fdo#112146]) +4 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb8/igt@gem_exec_schedule@preempt-self-bsd.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb1/igt@gem_exec_schedule@preempt-self-bsd.html

  * igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive:
    - shard-hsw:          [PASS][13] -> [INCOMPLETE][14] ([i915#530] / [i915#61])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-hsw7/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-hsw7/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html

  * igt@gem_tiled_blits@interruptible:
    - shard-hsw:          [PASS][15] -> [FAIL][16] ([i915#818])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-hsw6/igt@gem_tiled_blits@interruptible.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-hsw2/igt@gem_tiled_blits@interruptible.html

  * igt@kms_flip@2x-flip-vs-suspend:
    - shard-hsw:          [PASS][17] -> [INCOMPLETE][18] ([i915#61])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-hsw2/igt@kms_flip@2x-flip-vs-suspend.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-hsw5/igt@kms_flip@2x-flip-vs-suspend.html

  * igt@kms_flip@2x-modeset-vs-vblank-race:
    - shard-hsw:          [PASS][19] -> [DMESG-WARN][20] ([i915#44])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-hsw7/igt@kms_flip@2x-modeset-vs-vblank-race.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-hsw5/igt@kms_flip@2x-modeset-vs-vblank-race.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-apl:          [PASS][21] -> [DMESG-WARN][22] ([i915#180]) +2 similar issues
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-apl2/igt@kms_flip@flip-vs-suspend-interruptible.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-apl6/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-kbl:          [PASS][23] -> [DMESG-WARN][24] ([i915#180]) +2 similar issues
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-kbl6/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-pgflip-blt:
    - shard-tglb:         [PASS][25] -> [FAIL][26] ([i915#49]) +2 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-tglb8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-pgflip-blt.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-pgflip-blt.html

  * igt@kms_psr2_su@page_flip:
    - shard-iclb:         [PASS][27] -> [SKIP][28] ([fdo#109642] / [fdo#111068])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb2/igt@kms_psr2_su@page_flip.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb4/igt@kms_psr2_su@page_flip.html

  * igt@kms_psr@psr2_sprite_render:
    - shard-iclb:         [PASS][29] -> [SKIP][30] ([fdo#109441]) +1 similar issue
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb2/igt@kms_psr@psr2_sprite_render.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb8/igt@kms_psr@psr2_sprite_render.html

  
#### Possible fixes ####

  * igt@gem_ctx_persistence@vcs1-mixed:
    - shard-iclb:         [SKIP][31] ([fdo#109276] / [fdo#112080]) -> [PASS][32] +3 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb7/igt@gem_ctx_persistence@vcs1-mixed.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb4/igt@gem_ctx_persistence@vcs1-mixed.html

  * igt@gem_exec_schedule@pi-common-bsd:
    - shard-iclb:         [SKIP][33] ([i915#677]) -> [PASS][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb1/igt@gem_exec_schedule@pi-common-bsd.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb7/igt@gem_exec_schedule@pi-common-bsd.html

  * igt@gem_exec_schedule@preempt-other-chain-bsd:
    - shard-iclb:         [SKIP][35] ([fdo#112146]) -> [PASS][36] +4 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb4/igt@gem_exec_schedule@preempt-other-chain-bsd.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb6/igt@gem_exec_schedule@preempt-other-chain-bsd.html

  * igt@gem_exec_schedule@smoketest-all:
    - shard-tglb:         [INCOMPLETE][37] ([i915#463] / [i915#472]) -> [PASS][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-tglb1/igt@gem_exec_schedule@smoketest-all.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-tglb1/igt@gem_exec_schedule@smoketest-all.html

  * igt@gem_exec_suspend@basic-s3:
    - shard-kbl:          [DMESG-WARN][39] ([i915#180]) -> [PASS][40] +7 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-kbl4/igt@gem_exec_suspend@basic-s3.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-kbl1/igt@gem_exec_suspend@basic-s3.html

  * igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive:
    - shard-apl:          [TIMEOUT][41] ([fdo#112271] / [i915#530]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-apl3/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-apl1/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive.html
    - shard-hsw:          [TIMEOUT][43] ([fdo#112271] / [i915#530]) -> [PASS][44] +1 similar issue
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-hsw1/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-hsw1/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive.html

  * igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing:
    - shard-apl:          [TIMEOUT][45] ([fdo#112271]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-apl7/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-apl2/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
    - shard-tglb:         [TIMEOUT][47] ([fdo#112126] / [fdo#112271]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-tglb1/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-tglb7/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html

  * igt@gem_persistent_relocs@forked-interruptible-thrash-inactive:
    - shard-tglb:         [TIMEOUT][49] ([fdo#112126] / [fdo#112271] / [i915#530]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-tglb5/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-tglb2/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html

  * igt@gem_persistent_relocs@forked-interruptible-thrashing:
    - shard-glk:          [TIMEOUT][51] ([fdo#112271]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-glk2/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-glk2/igt@gem_persistent_relocs@forked-interruptible-thrashing.html

  * igt@gem_pipe_control_store_loop@reused-buffer:
    - shard-hsw:          [FAIL][53] ([i915#874]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-hsw4/igt@gem_pipe_control_store_loop@reused-buffer.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-hsw4/igt@gem_pipe_control_store_loop@reused-buffer.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-iclb:         [FAIL][55] ([i915#454]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb2/igt@i915_pm_dc@dc6-psr.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb4/igt@i915_pm_dc@dc6-psr.html

  * igt@i915_selftest@mock_requests:
    - shard-tglb:         [INCOMPLETE][57] ([i915#472]) -> [PASS][58] +1 similar issue
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-tglb7/igt@i915_selftest@mock_requests.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-tglb7/igt@i915_selftest@mock_requests.html
    - shard-hsw:          [INCOMPLETE][59] ([i915#61]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-hsw1/igt@i915_selftest@mock_requests.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-hsw5/igt@i915_selftest@mock_requests.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-apl:          [DMESG-WARN][61] ([i915#180]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-apl8/igt@kms_flip@flip-vs-suspend.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-apl2/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-render:
    - shard-tglb:         [FAIL][63] ([i915#49]) -> [PASS][64]
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-render.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-tglb4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-render.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         [SKIP][65] ([fdo#109642] / [fdo#111068]) -> [PASS][66]
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb1/igt@kms_psr2_su@frontbuffer.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb2/igt@kms_psr2_su@frontbuffer.html

  * igt@kms_psr@psr2_cursor_render:
    - shard-iclb:         [SKIP][67] ([fdo#109441]) -> [PASS][68] +2 similar issues
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb6/igt@kms_psr@psr2_cursor_render.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb2/igt@kms_psr@psr2_cursor_render.html

  * igt@perf_pmu@busy-check-all-vcs1:
    - shard-iclb:         [SKIP][69] ([fdo#112080]) -> [PASS][70] +11 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb3/igt@perf_pmu@busy-check-all-vcs1.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb1/igt@perf_pmu@busy-check-all-vcs1.html

  * igt@prime_vgem@fence-wait-bsd2:
    - shard-iclb:         [SKIP][71] ([fdo#109276]) -> [PASS][72] +10 similar issues
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb6/igt@prime_vgem@fence-wait-bsd2.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb1/igt@prime_vgem@fence-wait-bsd2.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv-switch:
    - shard-iclb:         [FAIL][73] ([IGT#28]) -> [SKIP][74] ([fdo#109276] / [fdo#112080])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb4/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb8/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html

  * igt@gem_userptr_blits@sync-unmap:
    - shard-snb:          [DMESG-WARN][75] ([fdo#110789] / [fdo#111870] / [i915#478]) -> [DMESG-WARN][76] ([fdo#111870] / [i915#478])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-snb4/igt@gem_userptr_blits@sync-unmap.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-snb1/igt@gem_userptr_blits@sync-unmap.html

  * igt@kms_atomic_transition@4x-modeset-transitions-nonblocking-fencing:
    - shard-tglb:         [SKIP][77] ([fdo#112041]) -> [SKIP][78] ([fdo#112022] / [fdo#112041]) +3 similar issues
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-tglb8/igt@kms_atomic_transition@4x-modeset-transitions-nonblocking-fencing.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-tglb3/igt@kms_atomic_transition@4x-modeset-transitions-nonblocking-fencing.html

  * igt@kms_atomic_transition@5x-modeset-transitions-nonblocking-fencing:
    - shard-tglb:         [SKIP][79] ([fdo#112021]) -> [SKIP][80] ([fdo#112025]) +2 similar issues
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-tglb2/igt@kms_atomic_transition@5x-modeset-transitions-nonblocking-fencing.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-tglb1/igt@kms_atomic_transition@5x-modeset-transitions-nonblocking-fencing.html

  * igt@kms_atomic_transition@6x-modeset-transitions-nonblocking:
    - shard-tglb:         [SKIP][81] ([fdo#112016] / [fdo#112021]) -> [SKIP][82] ([fdo#112016]) +3 similar issues
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-tglb8/igt@kms_atomic_transition@6x-modeset-transitions-nonblocking.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-tglb4/igt@kms_atomic_transition@6x-modeset-transitions-nonblocking.html

  * igt@kms_dp_dsc@basic-dsc-enable-edp:
    - shard-iclb:         [DMESG-WARN][83] ([fdo#107724]) -> [SKIP][84] ([fdo#109349])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-iclb4/igt@kms_dp_dsc@basic-dsc-enable-edp.html

  * igt@runner@aborted:
    - shard-glk:          [FAIL][85] ([k.org#202321]) -> [FAIL][86] ([i915#940] / [k.org#202321])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-glk2/igt@runner@aborted.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/shard-glk9/igt@runner@aborted.html

  
  [IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110789]: https://bugs.freedesktop.org/show_bug.cgi?id=110789
  [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
  [fdo#112016]: https://bugs.freedesktop.org/show_bug.cgi?id=112016
  [fdo#112021]: https://bugs.freedesktop.org/show_bug.cgi?id=112021
  [fdo#112022]: https://bugs.freedesktop.org/show_bug.cgi?id=112022
  [fdo#112025]: https://bugs.freedesktop.org/show_bug.cgi?id=112025
  [fdo#112041]: https://bugs.freedesktop.org/show_bug.cgi?id=112041
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112126]: https://bugs.freedesktop.org/show_bug.cgi?id=112126
  [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
  [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#44]: https://gitlab.freedesktop.org/drm/intel/issues/44
  [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
  [i915#463]: https://gitlab.freedesktop.org/drm/intel/issues/463
  [i915#472]: https://gitlab.freedesktop.org/drm/intel/issues/472
  [i915#478]: https://gitlab.freedesktop.org/drm/intel/issues/478
  [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
  [i915#530]: https://gitlab.freedesktop.org/drm/intel/issues/530
  [i915#61]: https://gitlab.freedesktop.org/drm/intel/issues/61
  [i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
  [i915#818]: https://gitlab.freedesktop.org/drm/intel/issues/818
  [i915#874]: https://gitlab.freedesktop.org/drm/intel/issues/874
  [i915#940]: https://gitlab.freedesktop.org/drm/intel/issues/940
  [k.org#202321]: https://bugzilla.kernel.org/show_bug.cgi?id=202321


Participating hosts (10 -> 8)
------------------------------

  Missing    (2): pig-skl-6260u pig-glk-j5005 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5376 -> IGTPW_3961
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_7783: 3ee976286895f0bd54388efc16b12f62c624ff19 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3961: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/index.html
  IGT_5376: 5cf58d947a02379d2885d6dd4f8bb487cfc3eed2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3961/index.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 22+ messages in thread

* [igt-dev] [PATCH i-g-t] gem_wsim: Distinguish particular engines during calculating nop calibration.
  2020-01-21 16:02   ` Tvrtko Ursulin
@ 2020-01-24 11:18     ` Anna Karas
  2020-01-24 11:35       ` Tvrtko Ursulin
                         ` (2 more replies)
  0 siblings, 3 replies; 22+ messages in thread
From: Anna Karas @ 2020-01-24 11:18 UTC (permalink / raw)
  To: igt-dev; +Cc: Tvrtko Ursulin

Extend handling -n parameter by accepting multiple values of per
engine nop calibration. Add raw numbers handling to set default
calibration values. Print copyable and pastable string with
calibrations. Allow to switch between calculating in parallel
or doing it sequentially.

Accepted input values:
-n 123456
All calibrations will be set to 123456.

-n ENG=value,ENG2=value2,value3
i.e.
-n RCS=123456,BCS=345678,999999
RCS engine's value is set to 123456, BCS engine's value is set to
345678, 999999 is copied to rest of engines. All engines must be set;
you can either provide values for each of the engines, or you can set
specific values and provide a default value for the others.

-n value,ENG1=value1,ENG2=value2
First, value is copied to all engines, then value1 overrides ENG1, and
finally value2 overrides ENG2.

New output follows the pattern:
Nop calibrations for 1000us delay is: <eng1>=<v1>,<eng2>=<v2>,...
So you can easily copy-paste it to the next invocation.

Switching between calculation modes:
Run program with -T parameter to calculate calibrations in parallel.
The calculations are performed sequentially by default.

v2: Get rid of trailing whitespaces. Skip DEFAULT and VCS engines
when printing out calibrations. Reject them in the string passed
to -n. Re-align rest of help text. Fix accepting unknown engines.

v3: Consider all cases of arguments
for -n (Tvrtko).

-n 10 (raw number)
-n RCS (engine without calib)
-n AA (neither the engine nor the number)
-n RCS=500 (valid eng=val pair)
-n RCS=AA (calib is not a number)
-n XYZ=10 (engine is not an engine)
-n XYZ=AA (combo)

v4: Print calculated values (Chris). Do not make any assumptions
about the order of the engines (Tvrtko).

Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Anna Karas <anna.karas@intel.com>
---
 benchmarks/gem_wsim.c | 317 ++++++++++++++++++++++++++++++++++--------
 1 file changed, 259 insertions(+), 58 deletions(-)

diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c
index 9156fdc9..d3451f63 100644
--- a/benchmarks/gem_wsim.c
+++ b/benchmarks/gem_wsim.c
@@ -23,6 +23,7 @@
  */
 
 #include <unistd.h>
+#include <stdbool.h>
 #include <stdlib.h>
 #include <stdint.h>
 #include <stdio.h>
@@ -55,6 +56,7 @@
 #include "i915/gem_mman.h"
 
 #include "ewma.h"
+#include "i915/gem_engine_topology.h"
 
 enum intel_engine_id {
 	DEFAULT,
@@ -240,7 +242,8 @@ struct workload
 
 struct intel_mmio_data mmio_data;
 static const unsigned int nop_calibration_us = 1000;
-static unsigned long nop_calibration;
+static bool has_nop_calibration = false;
+static bool sequential = true;
 
 static unsigned int master_prng;
 
@@ -281,6 +284,61 @@ static const char *ring_str_map[NUM_ENGINES] = {
 	[VECS] = "VECS",
 };
 
+/* stores calibrations for particular engines */
+static unsigned long engine_calib_map[NUM_ENGINES];
+
+static enum intel_engine_id
+ci_to_engine_id(int class, int instance)
+{
+	static const struct {
+		int class;
+		int instance;
+		unsigned int id;
+	} map[] = {
+		{ I915_ENGINE_CLASS_RENDER, 0, RCS },
+		{ I915_ENGINE_CLASS_COPY, 0, BCS },
+		{ I915_ENGINE_CLASS_VIDEO, 0, VCS1 },
+		{ I915_ENGINE_CLASS_VIDEO, 1, VCS2 },
+		{ I915_ENGINE_CLASS_VIDEO, 2, VCS2 }, /* FIXME/ICL */
+		{ I915_ENGINE_CLASS_VIDEO_ENHANCE, 0, VECS },
+	};
+
+	unsigned int i;
+
+	for (i = 0; i < ARRAY_SIZE(map); i++) {
+		if (class == map[i].class && instance == map[i].instance)
+			return map[i].id;
+	}
+	return -1;
+}
+
+static void
+apply_unset_calibrations(unsigned long raw_number)
+{
+	for (int i = 0; i < NUM_ENGINES; i++)
+		engine_calib_map[i] += engine_calib_map[i] ? 0 : raw_number;
+}
+
+static void
+print_engine_calibrations(void)
+{
+	bool first_entry = true;
+
+	printf("Nop calibrations for %uus delay is: ", nop_calibration_us);
+	for (int i = 0; i < NUM_ENGINES; i++) {
+		/* skip DEFAULT and VCS engines */
+		if (i != DEFAULT && i != VCS) {
+			if (first_entry) {
+				printf("%s=%lu", ring_str_map[i], engine_calib_map[i]);
+				first_entry = false;
+			} else {
+				printf(",%s=%lu", ring_str_map[i], engine_calib_map[i]);
+			}
+		}
+	}
+	printf("\n");
+}
+
 static int
 parse_dependencies(unsigned int nr_steps, struct w_step *w, char *_desc)
 {
@@ -1082,17 +1140,17 @@ static unsigned int get_duration(struct workload *wrk, struct w_step *w)
 		       (dur->max + 1 - dur->min);
 }
 
-static unsigned long get_bb_sz(unsigned int duration)
+static unsigned long get_bb_sz(unsigned int duration, enum intel_engine_id engine)
 {
-	return ALIGN(duration * nop_calibration * sizeof(uint32_t) /
-		     nop_calibration_us, sizeof(uint32_t));
+	return ALIGN(duration * engine_calib_map[engine] * sizeof(uint32_t) /
+		nop_calibration_us, sizeof(uint32_t));
 }
 
 static void
 init_bb(struct w_step *w, unsigned int flags)
 {
 	const unsigned int arb_period =
-			get_bb_sz(w->preempt_us) / sizeof(uint32_t);
+			get_bb_sz(w->preempt_us, w->engine) / sizeof(uint32_t);
 	const unsigned int mmap_len = ALIGN(w->bb_sz, 4096);
 	unsigned int i;
 	uint32_t *ptr;
@@ -1319,10 +1377,11 @@ alloc_step_batch(struct workload *wrk, struct w_step *w, unsigned int flags)
 
 	if (w->unbound_duration)
 		/* nops + MI_ARB_CHK + MI_BATCH_BUFFER_START */
-		w->bb_sz = max(PAGE_SIZE, get_bb_sz(w->preempt_us)) +
+		w->bb_sz = max(PAGE_SIZE, get_bb_sz(w->preempt_us, w->engine)) +
 			   (1 + 3) * sizeof(uint32_t);
 	else
-		w->bb_sz = get_bb_sz(w->duration.max);
+		w->bb_sz = get_bb_sz(w->duration.max, w->engine);
+
 	w->bb_handle = w->obj[j].handle = gem_create(fd, w->bb_sz + (w->unbound_duration ? 4096 : 0));
 	init_bb(w, flags);
 	w->obj[j].relocation_count = terminate_bb(w, flags);
@@ -2622,7 +2681,7 @@ do_eb(struct workload *wrk, struct w_step *w, enum intel_engine_id engine,
 	w->eb.batch_start_offset =
 		w->unbound_duration ?
 		0 :
-		ALIGN(w->bb_sz - get_bb_sz(get_duration(wrk, w)),
+		ALIGN(w->bb_sz - get_bb_sz(get_duration(wrk, w), w->engine),
 		      2 * sizeof(uint32_t));
 
 	for (i = 0; i < w->fence_deps.nr; i++) {
@@ -2899,15 +2958,18 @@ static void fini_workload(struct workload *wrk)
 	free(wrk);
 }
 
-static unsigned long calibrate_nop(unsigned int tolerance_pct)
+static unsigned long calibrate_nop(unsigned int tolerance_pct, struct intel_execution_engine2 *engine)
 {
 	const uint32_t bbe = 0xa << 23;
 	unsigned int loops = 17;
 	unsigned int usecs = nop_calibration_us;
 	struct drm_i915_gem_exec_object2 obj = {};
-	struct drm_i915_gem_execbuffer2 eb =
-		{ .buffer_count = 1, .buffers_ptr = (uintptr_t)&obj};
-	long size, last_size;
+	struct drm_i915_gem_execbuffer2 eb = {
+		.buffer_count = 1,
+		.buffers_ptr = (uintptr_t)&obj,
+		.flags = engine->flags
+	};
+	unsigned long size, last_size;
 	struct timespec t_0, t_end;
 
 	clock_gettime(CLOCK_MONOTONIC, &t_0);
@@ -2939,6 +3001,70 @@ static unsigned long calibrate_nop(unsigned int tolerance_pct)
 	return size / sizeof(uint32_t);
 }
 
+static void
+calibrate_sequentially(void)
+{
+	struct intel_execution_engine2 *engine;
+	enum intel_engine_id eng_id;
+
+	__for_each_physical_engine(fd, engine) {
+		eng_id = ci_to_engine_id(engine->class, engine->instance);
+		igt_assert(eng_id >= 0);
+		engine_calib_map[eng_id] = calibrate_nop(fd, engine);
+	}
+}
+
+struct thread_data {
+	struct intel_execution_engine2 *eng;
+	pthread_t thr;
+	unsigned long calib;
+};
+
+static void *
+engine_calibration_thread(void *data)
+{
+	struct thread_data *thr_d = (struct thread_data *) data;
+
+	thr_d->calib = calibrate_nop(fd, thr_d->eng);
+	return NULL;
+}
+
+static void
+calibrate_in_parallel(void)
+{
+	struct thread_data *thr_d = malloc(NUM_ENGINES * sizeof(*thr_d));
+	struct intel_execution_engine2 *engine;
+	enum intel_engine_id id;
+	int ret;
+
+	__for_each_physical_engine(fd, engine) {
+		id = ci_to_engine_id(engine->class, engine->instance);
+		thr_d[id].eng = engine;
+		ret = pthread_create(&thr_d[id].thr, NULL, engine_calibration_thread, &thr_d[id]);
+		igt_assert_eq(ret, 0);
+	}
+
+	__for_each_physical_engine(fd, engine) {
+		id = ci_to_engine_id(engine->class, engine->instance);
+		igt_assert(id >= 0);
+
+		ret = pthread_join(thr_d[id].thr, NULL);
+		igt_assert_eq(ret, 0);
+		engine_calib_map[id] = thr_d[id].calib;
+	}
+
+	free(thr_d);
+}
+
+static void
+calibrate_engines(void)
+{
+	if (sequential)
+		calibrate_sequentially();
+	else
+		calibrate_in_parallel();
+}
+
 static void print_help(void)
 {
 	unsigned int i;
@@ -2951,50 +3077,53 @@ static void print_help(void)
 "be provided when running the simulation in subsequent invocations.\n"
 "\n"
 "Options:\n"
-"  -h              This text.\n"
-"  -q              Be quiet - do not output anything to stdout.\n"
-"  -n <n>          Nop calibration value.\n"
-"  -t <n>          Nop calibration tolerance percentage.\n"
-"                  Use when there is a difficulty obtaining calibration with the\n"
-"                  default settings.\n"
-"  -I <n>          Initial randomness seed.\n"
-"  -p <n>          Context priority to use for the following workload on the\n"
-"                  command line.\n"
-"  -w <desc|path>  Filename or a workload descriptor.\n"
-"                  Can be given multiple times.\n"
-"  -W <desc|path>  Filename or a master workload descriptor.\n"
-"                  Only one master workload can be optinally specified in which\n"
-"                  case all other workloads become background ones and run as\n"
-"                  long as the master.\n"
-"  -a <desc|path>  Append a workload to all other workloads.\n"
-"  -r <n>          How many times to emit the workload.\n"
-"  -c <n>          Fork N clients emitting the workload simultaneously.\n"
-"  -x              Swap VCS1 and VCS2 engines in every other client.\n"
-"  -b <n>          Load balancing to use.\n"
-"                  Available load balancers are:"
+"  -h                This text.\n"
+"  -q                Be quiet - do not output anything to stdout.\n"
+"  -n <n |           Nop calibration value - single value is set to all engines\n"
+"  e1=v1,e2=v2,n...> without specified value; you can also specify calibrations for\n"
+"                    particular engines.\n"
+"  -t <n>            Nop calibration tolerance percentage.\n"
+"  -T                Disable sequential calibration and perform calibration in parallel.\n"
+"                    Use when there is a difficulty obtaining calibration with the\n"
+"                    default settings.\n"
+"  -I <n>            Initial randomness seed.\n"
+"  -p <n>            Context priority to use for the following workload on the\n"
+"                    command line.\n"
+"  -w <desc|path>    Filename or a workload descriptor.\n"
+"                    Can be given multiple times.\n"
+"  -W <desc|path>    Filename or a master workload descriptor.\n"
+"                    Only one master workload can be optinally specified in which\n"
+"                    case all other workloads become background ones and run as\n"
+"                    long as the master.\n"
+"  -a <desc|path>    Append a workload to all other workloads.\n"
+"  -r <n>            How many times to emit the workload.\n"
+"  -c <n>            Fork N clients emitting the workload simultaneously.\n"
+"  -x                Swap VCS1 and VCS2 engines in every other client.\n"
+"  -b <n>            Load balancing to use.\n"
+"                    Available load balancers are:"
 	);
 
 	for (i = 0; i < ARRAY_SIZE(all_balancers); i++) {
 		igt_assert(all_balancers[i].desc);
 		printf(
-"                     %s (%u): %s\n",
+"                       %s (%u): %s\n",
 		       all_balancers[i].name, all_balancers[i].id,
 		       all_balancers[i].desc);
 	}
 	puts(
-"                  Balancers can be specified either as names or as their id\n"
-"                  number as listed above.\n"
-"  -2              Remap VCS2 to BCS.\n"
-"  -R              Round-robin initial VCS assignment per client.\n"
-"  -H              Send heartbeat on synchronisation points with seqno based\n"
-"                  balancers. Gives better engine busyness view in some cases.\n"
-"  -s              Turn on small SSEU config for the next workload on the\n"
-"                  command line. Subsequent -s switches it off.\n"
-"  -S              Synchronize the sequence of random batch durations between\n"
-"                  clients.\n"
-"  -G              Global load balancing - a single load balancer will be shared\n"
-"                  between all clients and there will be a single seqno domain.\n"
-"  -d              Sync between data dependencies in userspace."
+"                     Balancers can be specified either as names or as their id\n"
+"                     number as listed above.\n"
+"  -2                 Remap VCS2 to BCS.\n"
+"  -R                 Round-robin initial VCS assignment per client.\n"
+"  -H                 Send heartbeat on synchronisation points with seqno based\n"
+"                     balancers. Gives better engine busyness view in some cases.\n"
+"  -s                 Turn on small SSEU config for the next workload on the\n"
+"                     command line. Subsequent -s switches it off.\n"
+"  -S                 Synchronize the sequence of random batch durations between\n"
+"                     clients.\n"
+"  -G                 Global load balancing - a single load balancer will be shared\n"
+"                     between all clients and there will be a single seqno domain.\n"
+"  -d                 Sync between data dependencies in userspace."
 	);
 }
 
@@ -3117,6 +3246,10 @@ int main(int argc, char **argv)
 	int prio = 0;
 	double t;
 	int i, c;
+	char *subopts, *value;
+	int raw_number = 0;
+	long calib_val;
+	int eng;
 
 	/*
 	 * Open the device via the low-level API so we can do the GPU quiesce
@@ -3134,7 +3267,7 @@ int main(int argc, char **argv)
 	master_prng = time(NULL);
 
 	while ((c = getopt(argc, argv,
-			   "hqv2RsSHxGdc:n:r:w:W:a:t:b:p:I:")) != -1) {
+			   "Thqv2RsSHxGdc:n:r:w:W:a:t:b:p:I:")) != -1) {
 		switch (c) {
 		case 'W':
 			if (master_workload >= 0) {
@@ -3163,8 +3296,62 @@ int main(int argc, char **argv)
 		case 't':
 			tolerance_pct = strtol(optarg, NULL, 0);
 			break;
+		case 'T':
+			sequential = false;
+			break;
+
 		case 'n':
-			nop_calibration = strtol(optarg, NULL, 0);
+			subopts = optarg;
+			while (*subopts != '\0') {
+				eng = getsubopt(&subopts, (char **)ring_str_map, &value);
+				if (!value) {
+					/* only engine name was given */
+					wsim_err("Missing calibration value for '%s'!\n",
+						ring_str_map[eng]);
+					goto err;
+				}
+
+				calib_val = atol(value);
+
+				if (eng >= 0 && eng < NUM_ENGINES) {
+				/* engine name with some value were given */
+
+					if (eng == DEFAULT || eng == VCS) {
+						wsim_err("'%s' not allowed in engine calibrations!\n",
+							ring_str_map[eng]);
+						goto err;
+					} else if (calib_val <= 0) {
+						wsim_err("Invalid calibration for engine '%s' - value "
+						"is either non-positive or is not a number!\n",
+							ring_str_map[eng]);
+						goto err;
+					} else if (engine_calib_map[eng]) {
+						wsim_err("Invalid repeated calibration of '%s'!\n",
+							ring_str_map[eng]);
+						goto err;
+					} else {
+						engine_calib_map[eng] = calib_val;
+						has_nop_calibration = true;
+					}
+				} else {
+					/* raw number was given */
+
+					if (!calib_val) {
+						wsim_err("Invalid engine or zero calibration!\n");
+						goto err;
+					} else if (calib_val < 0) {
+						wsim_err("Invalid negative calibration!\n");
+						goto err;
+					} else if (raw_number) {
+						wsim_err("Default engine calibration provided more than once!\n");
+						goto err;
+					} else {
+						raw_number = calib_val;
+						apply_unset_calibrations(raw_number);
+						has_nop_calibration = true;
+					}
+				}
+			}
 			break;
 		case 'r':
 			repeat = strtol(optarg, NULL, 0);
@@ -3242,16 +3429,31 @@ int main(int argc, char **argv)
 		goto err;
 	}
 
-	if (!nop_calibration) {
-		if (verbose > 1)
-			printf("Calibrating nop delay with %u%% tolerance...\n",
+	if (!has_nop_calibration) {
+		if (verbose > 1) {
+			printf("Calibrating nop delays with %u%% tolerance...\n",
 				tolerance_pct);
-		nop_calibration = calibrate_nop(tolerance_pct);
-		if (verbose)
-			printf("Nop calibration for %uus delay is %lu.\n",
-			       nop_calibration_us, nop_calibration);
+		}
 
+		calibrate_engines();
+		print_engine_calibrations();
 		goto out;
+	} else {
+		bool missing = false;
+
+		for (i = 0; i < NUM_ENGINES; i++) {
+			if (i == DEFAULT || i == VCS)
+				continue;
+
+			if (!engine_calib_map[i]) {
+				wsim_err("Missing calibration for '%s'!\n",
+					 ring_str_map[i]);
+				missing = true;
+			}
+		}
+
+		if (missing)
+			goto err;
 	}
 
 	if (!nr_w_args) {
@@ -3309,8 +3511,7 @@ int main(int argc, char **argv)
 
 	if (verbose > 1) {
 		printf("Random seed is %u.\n", master_prng);
-		printf("Using %lu nop calibration for %uus delay.\n",
-		       nop_calibration, nop_calibration_us);
+		print_engine_calibrations();
 		printf("%u client%s.\n", clients, clients > 1 ? "s" : "");
 		if (flags & SWAPVCS)
 			printf("Swapping VCS rings between clients.\n");
-- 
2.19.0

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^ permalink raw reply related	[flat|nested] 22+ messages in thread

* Re: [igt-dev] [PATCH i-g-t] gem_wsim: Distinguish particular engines during calculating nop calibration.
  2020-01-24 11:18     ` [igt-dev] [PATCH i-g-t] gem_wsim: " Anna Karas
@ 2020-01-24 11:35       ` Tvrtko Ursulin
  2020-01-24 11:41         ` Chris Wilson
  2020-01-24 12:05       ` Chris Wilson
  2020-01-24 13:54       ` Anna Karas
  2 siblings, 1 reply; 22+ messages in thread
From: Tvrtko Ursulin @ 2020-01-24 11:35 UTC (permalink / raw)
  To: Anna Karas, igt-dev; +Cc: Tvrtko Ursulin


On 24/01/2020 11:18, Anna Karas wrote:
> Extend handling -n parameter by accepting multiple values of per
> engine nop calibration. Add raw numbers handling to set default
> calibration values. Print copyable and pastable string with
> calibrations. Allow to switch between calculating in parallel
> or doing it sequentially.
> 
> Accepted input values:
> -n 123456
> All calibrations will be set to 123456.
> 
> -n ENG=value,ENG2=value2,value3
> i.e.
> -n RCS=123456,BCS=345678,999999
> RCS engine's value is set to 123456, BCS engine's value is set to
> 345678, 999999 is copied to rest of engines. All engines must be set;
> you can either provide values for each of the engines, or you can set
> specific values and provide a default value for the others.
> 
> -n value,ENG1=value1,ENG2=value2
> First, value is copied to all engines, then value1 overrides ENG1, and
> finally value2 overrides ENG2.
> 
> New output follows the pattern:
> Nop calibrations for 1000us delay is: <eng1>=<v1>,<eng2>=<v2>,...
> So you can easily copy-paste it to the next invocation.
> 
> Switching between calculation modes:
> Run program with -T parameter to calculate calibrations in parallel.
> The calculations are performed sequentially by default.
> 
> v2: Get rid of trailing whitespaces. Skip DEFAULT and VCS engines
> when printing out calibrations. Reject them in the string passed
> to -n. Re-align rest of help text. Fix accepting unknown engines.
> 
> v3: Consider all cases of arguments
> for -n (Tvrtko).
> 
> -n 10 (raw number)
> -n RCS (engine without calib)
> -n AA (neither the engine nor the number)
> -n RCS=500 (valid eng=val pair)
> -n RCS=AA (calib is not a number)
> -n XYZ=10 (engine is not an engine)
> -n XYZ=AA (combo)
> 
> v4: Print calculated values (Chris). Do not make any assumptions
> about the order of the engines (Tvrtko).

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Interesting, or maybe entirely expected, observation is that parallel 
calibration gives different values. I think more engines slower they get 
in parallel because of memory bandwith? Probably. That's why suggested 
default is sequential. Although in practice is depends a lot on the 
workload to be executed what matches the reality better. Calibrating for 
the workload sounded a step too far. In theory could be doable using 
Chris' wsim to theoretical throughput parser. Along the lines probably. 
But definitely to complicated for now.

Regards,

Tvrtko

> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Anna Karas <anna.karas@intel.com>
> ---
>   benchmarks/gem_wsim.c | 317 ++++++++++++++++++++++++++++++++++--------
>   1 file changed, 259 insertions(+), 58 deletions(-)
> 
> diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c
> index 9156fdc9..d3451f63 100644
> --- a/benchmarks/gem_wsim.c
> +++ b/benchmarks/gem_wsim.c
> @@ -23,6 +23,7 @@
>    */
>   
>   #include <unistd.h>
> +#include <stdbool.h>
>   #include <stdlib.h>
>   #include <stdint.h>
>   #include <stdio.h>
> @@ -55,6 +56,7 @@
>   #include "i915/gem_mman.h"
>   
>   #include "ewma.h"
> +#include "i915/gem_engine_topology.h"
>   
>   enum intel_engine_id {
>   	DEFAULT,
> @@ -240,7 +242,8 @@ struct workload
>   
>   struct intel_mmio_data mmio_data;
>   static const unsigned int nop_calibration_us = 1000;
> -static unsigned long nop_calibration;
> +static bool has_nop_calibration = false;
> +static bool sequential = true;
>   
>   static unsigned int master_prng;
>   
> @@ -281,6 +284,61 @@ static const char *ring_str_map[NUM_ENGINES] = {
>   	[VECS] = "VECS",
>   };
>   
> +/* stores calibrations for particular engines */
> +static unsigned long engine_calib_map[NUM_ENGINES];
> +
> +static enum intel_engine_id
> +ci_to_engine_id(int class, int instance)
> +{
> +	static const struct {
> +		int class;
> +		int instance;
> +		unsigned int id;
> +	} map[] = {
> +		{ I915_ENGINE_CLASS_RENDER, 0, RCS },
> +		{ I915_ENGINE_CLASS_COPY, 0, BCS },
> +		{ I915_ENGINE_CLASS_VIDEO, 0, VCS1 },
> +		{ I915_ENGINE_CLASS_VIDEO, 1, VCS2 },
> +		{ I915_ENGINE_CLASS_VIDEO, 2, VCS2 }, /* FIXME/ICL */
> +		{ I915_ENGINE_CLASS_VIDEO_ENHANCE, 0, VECS },
> +	};
> +
> +	unsigned int i;
> +
> +	for (i = 0; i < ARRAY_SIZE(map); i++) {
> +		if (class == map[i].class && instance == map[i].instance)
> +			return map[i].id;
> +	}
> +	return -1;
> +}
> +
> +static void
> +apply_unset_calibrations(unsigned long raw_number)
> +{
> +	for (int i = 0; i < NUM_ENGINES; i++)
> +		engine_calib_map[i] += engine_calib_map[i] ? 0 : raw_number;
> +}
> +
> +static void
> +print_engine_calibrations(void)
> +{
> +	bool first_entry = true;
> +
> +	printf("Nop calibrations for %uus delay is: ", nop_calibration_us);
> +	for (int i = 0; i < NUM_ENGINES; i++) {
> +		/* skip DEFAULT and VCS engines */
> +		if (i != DEFAULT && i != VCS) {
> +			if (first_entry) {
> +				printf("%s=%lu", ring_str_map[i], engine_calib_map[i]);
> +				first_entry = false;
> +			} else {
> +				printf(",%s=%lu", ring_str_map[i], engine_calib_map[i]);
> +			}
> +		}
> +	}
> +	printf("\n");
> +}
> +
>   static int
>   parse_dependencies(unsigned int nr_steps, struct w_step *w, char *_desc)
>   {
> @@ -1082,17 +1140,17 @@ static unsigned int get_duration(struct workload *wrk, struct w_step *w)
>   		       (dur->max + 1 - dur->min);
>   }
>   
> -static unsigned long get_bb_sz(unsigned int duration)
> +static unsigned long get_bb_sz(unsigned int duration, enum intel_engine_id engine)
>   {
> -	return ALIGN(duration * nop_calibration * sizeof(uint32_t) /
> -		     nop_calibration_us, sizeof(uint32_t));
> +	return ALIGN(duration * engine_calib_map[engine] * sizeof(uint32_t) /
> +		nop_calibration_us, sizeof(uint32_t));
>   }
>   
>   static void
>   init_bb(struct w_step *w, unsigned int flags)
>   {
>   	const unsigned int arb_period =
> -			get_bb_sz(w->preempt_us) / sizeof(uint32_t);
> +			get_bb_sz(w->preempt_us, w->engine) / sizeof(uint32_t);
>   	const unsigned int mmap_len = ALIGN(w->bb_sz, 4096);
>   	unsigned int i;
>   	uint32_t *ptr;
> @@ -1319,10 +1377,11 @@ alloc_step_batch(struct workload *wrk, struct w_step *w, unsigned int flags)
>   
>   	if (w->unbound_duration)
>   		/* nops + MI_ARB_CHK + MI_BATCH_BUFFER_START */
> -		w->bb_sz = max(PAGE_SIZE, get_bb_sz(w->preempt_us)) +
> +		w->bb_sz = max(PAGE_SIZE, get_bb_sz(w->preempt_us, w->engine)) +
>   			   (1 + 3) * sizeof(uint32_t);
>   	else
> -		w->bb_sz = get_bb_sz(w->duration.max);
> +		w->bb_sz = get_bb_sz(w->duration.max, w->engine);
> +
>   	w->bb_handle = w->obj[j].handle = gem_create(fd, w->bb_sz + (w->unbound_duration ? 4096 : 0));
>   	init_bb(w, flags);
>   	w->obj[j].relocation_count = terminate_bb(w, flags);
> @@ -2622,7 +2681,7 @@ do_eb(struct workload *wrk, struct w_step *w, enum intel_engine_id engine,
>   	w->eb.batch_start_offset =
>   		w->unbound_duration ?
>   		0 :
> -		ALIGN(w->bb_sz - get_bb_sz(get_duration(wrk, w)),
> +		ALIGN(w->bb_sz - get_bb_sz(get_duration(wrk, w), w->engine),
>   		      2 * sizeof(uint32_t));
>   
>   	for (i = 0; i < w->fence_deps.nr; i++) {
> @@ -2899,15 +2958,18 @@ static void fini_workload(struct workload *wrk)
>   	free(wrk);
>   }
>   
> -static unsigned long calibrate_nop(unsigned int tolerance_pct)
> +static unsigned long calibrate_nop(unsigned int tolerance_pct, struct intel_execution_engine2 *engine)
>   {
>   	const uint32_t bbe = 0xa << 23;
>   	unsigned int loops = 17;
>   	unsigned int usecs = nop_calibration_us;
>   	struct drm_i915_gem_exec_object2 obj = {};
> -	struct drm_i915_gem_execbuffer2 eb =
> -		{ .buffer_count = 1, .buffers_ptr = (uintptr_t)&obj};
> -	long size, last_size;
> +	struct drm_i915_gem_execbuffer2 eb = {
> +		.buffer_count = 1,
> +		.buffers_ptr = (uintptr_t)&obj,
> +		.flags = engine->flags
> +	};
> +	unsigned long size, last_size;
>   	struct timespec t_0, t_end;
>   
>   	clock_gettime(CLOCK_MONOTONIC, &t_0);
> @@ -2939,6 +3001,70 @@ static unsigned long calibrate_nop(unsigned int tolerance_pct)
>   	return size / sizeof(uint32_t);
>   }
>   
> +static void
> +calibrate_sequentially(void)
> +{
> +	struct intel_execution_engine2 *engine;
> +	enum intel_engine_id eng_id;
> +
> +	__for_each_physical_engine(fd, engine) {
> +		eng_id = ci_to_engine_id(engine->class, engine->instance);
> +		igt_assert(eng_id >= 0);
> +		engine_calib_map[eng_id] = calibrate_nop(fd, engine);
> +	}
> +}
> +
> +struct thread_data {
> +	struct intel_execution_engine2 *eng;
> +	pthread_t thr;
> +	unsigned long calib;
> +};
> +
> +static void *
> +engine_calibration_thread(void *data)
> +{
> +	struct thread_data *thr_d = (struct thread_data *) data;
> +
> +	thr_d->calib = calibrate_nop(fd, thr_d->eng);
> +	return NULL;
> +}
> +
> +static void
> +calibrate_in_parallel(void)
> +{
> +	struct thread_data *thr_d = malloc(NUM_ENGINES * sizeof(*thr_d));
> +	struct intel_execution_engine2 *engine;
> +	enum intel_engine_id id;
> +	int ret;
> +
> +	__for_each_physical_engine(fd, engine) {
> +		id = ci_to_engine_id(engine->class, engine->instance);
> +		thr_d[id].eng = engine;
> +		ret = pthread_create(&thr_d[id].thr, NULL, engine_calibration_thread, &thr_d[id]);
> +		igt_assert_eq(ret, 0);
> +	}
> +
> +	__for_each_physical_engine(fd, engine) {
> +		id = ci_to_engine_id(engine->class, engine->instance);
> +		igt_assert(id >= 0);
> +
> +		ret = pthread_join(thr_d[id].thr, NULL);
> +		igt_assert_eq(ret, 0);
> +		engine_calib_map[id] = thr_d[id].calib;
> +	}
> +
> +	free(thr_d);
> +}
> +
> +static void
> +calibrate_engines(void)
> +{
> +	if (sequential)
> +		calibrate_sequentially();
> +	else
> +		calibrate_in_parallel();
> +}
> +
>   static void print_help(void)
>   {
>   	unsigned int i;
> @@ -2951,50 +3077,53 @@ static void print_help(void)
>   "be provided when running the simulation in subsequent invocations.\n"
>   "\n"
>   "Options:\n"
> -"  -h              This text.\n"
> -"  -q              Be quiet - do not output anything to stdout.\n"
> -"  -n <n>          Nop calibration value.\n"
> -"  -t <n>          Nop calibration tolerance percentage.\n"
> -"                  Use when there is a difficulty obtaining calibration with the\n"
> -"                  default settings.\n"
> -"  -I <n>          Initial randomness seed.\n"
> -"  -p <n>          Context priority to use for the following workload on the\n"
> -"                  command line.\n"
> -"  -w <desc|path>  Filename or a workload descriptor.\n"
> -"                  Can be given multiple times.\n"
> -"  -W <desc|path>  Filename or a master workload descriptor.\n"
> -"                  Only one master workload can be optinally specified in which\n"
> -"                  case all other workloads become background ones and run as\n"
> -"                  long as the master.\n"
> -"  -a <desc|path>  Append a workload to all other workloads.\n"
> -"  -r <n>          How many times to emit the workload.\n"
> -"  -c <n>          Fork N clients emitting the workload simultaneously.\n"
> -"  -x              Swap VCS1 and VCS2 engines in every other client.\n"
> -"  -b <n>          Load balancing to use.\n"
> -"                  Available load balancers are:"
> +"  -h                This text.\n"
> +"  -q                Be quiet - do not output anything to stdout.\n"
> +"  -n <n |           Nop calibration value - single value is set to all engines\n"
> +"  e1=v1,e2=v2,n...> without specified value; you can also specify calibrations for\n"
> +"                    particular engines.\n"
> +"  -t <n>            Nop calibration tolerance percentage.\n"
> +"  -T                Disable sequential calibration and perform calibration in parallel.\n"
> +"                    Use when there is a difficulty obtaining calibration with the\n"
> +"                    default settings.\n"
> +"  -I <n>            Initial randomness seed.\n"
> +"  -p <n>            Context priority to use for the following workload on the\n"
> +"                    command line.\n"
> +"  -w <desc|path>    Filename or a workload descriptor.\n"
> +"                    Can be given multiple times.\n"
> +"  -W <desc|path>    Filename or a master workload descriptor.\n"
> +"                    Only one master workload can be optinally specified in which\n"
> +"                    case all other workloads become background ones and run as\n"
> +"                    long as the master.\n"
> +"  -a <desc|path>    Append a workload to all other workloads.\n"
> +"  -r <n>            How many times to emit the workload.\n"
> +"  -c <n>            Fork N clients emitting the workload simultaneously.\n"
> +"  -x                Swap VCS1 and VCS2 engines in every other client.\n"
> +"  -b <n>            Load balancing to use.\n"
> +"                    Available load balancers are:"
>   	);
>   
>   	for (i = 0; i < ARRAY_SIZE(all_balancers); i++) {
>   		igt_assert(all_balancers[i].desc);
>   		printf(
> -"                     %s (%u): %s\n",
> +"                       %s (%u): %s\n",
>   		       all_balancers[i].name, all_balancers[i].id,
>   		       all_balancers[i].desc);
>   	}
>   	puts(
> -"                  Balancers can be specified either as names or as their id\n"
> -"                  number as listed above.\n"
> -"  -2              Remap VCS2 to BCS.\n"
> -"  -R              Round-robin initial VCS assignment per client.\n"
> -"  -H              Send heartbeat on synchronisation points with seqno based\n"
> -"                  balancers. Gives better engine busyness view in some cases.\n"
> -"  -s              Turn on small SSEU config for the next workload on the\n"
> -"                  command line. Subsequent -s switches it off.\n"
> -"  -S              Synchronize the sequence of random batch durations between\n"
> -"                  clients.\n"
> -"  -G              Global load balancing - a single load balancer will be shared\n"
> -"                  between all clients and there will be a single seqno domain.\n"
> -"  -d              Sync between data dependencies in userspace."
> +"                     Balancers can be specified either as names or as their id\n"
> +"                     number as listed above.\n"
> +"  -2                 Remap VCS2 to BCS.\n"
> +"  -R                 Round-robin initial VCS assignment per client.\n"
> +"  -H                 Send heartbeat on synchronisation points with seqno based\n"
> +"                     balancers. Gives better engine busyness view in some cases.\n"
> +"  -s                 Turn on small SSEU config for the next workload on the\n"
> +"                     command line. Subsequent -s switches it off.\n"
> +"  -S                 Synchronize the sequence of random batch durations between\n"
> +"                     clients.\n"
> +"  -G                 Global load balancing - a single load balancer will be shared\n"
> +"                     between all clients and there will be a single seqno domain.\n"
> +"  -d                 Sync between data dependencies in userspace."
>   	);
>   }
>   
> @@ -3117,6 +3246,10 @@ int main(int argc, char **argv)
>   	int prio = 0;
>   	double t;
>   	int i, c;
> +	char *subopts, *value;
> +	int raw_number = 0;
> +	long calib_val;
> +	int eng;
>   
>   	/*
>   	 * Open the device via the low-level API so we can do the GPU quiesce
> @@ -3134,7 +3267,7 @@ int main(int argc, char **argv)
>   	master_prng = time(NULL);
>   
>   	while ((c = getopt(argc, argv,
> -			   "hqv2RsSHxGdc:n:r:w:W:a:t:b:p:I:")) != -1) {
> +			   "Thqv2RsSHxGdc:n:r:w:W:a:t:b:p:I:")) != -1) {
>   		switch (c) {
>   		case 'W':
>   			if (master_workload >= 0) {
> @@ -3163,8 +3296,62 @@ int main(int argc, char **argv)
>   		case 't':
>   			tolerance_pct = strtol(optarg, NULL, 0);
>   			break;
> +		case 'T':
> +			sequential = false;
> +			break;
> +
>   		case 'n':
> -			nop_calibration = strtol(optarg, NULL, 0);
> +			subopts = optarg;
> +			while (*subopts != '\0') {
> +				eng = getsubopt(&subopts, (char **)ring_str_map, &value);
> +				if (!value) {
> +					/* only engine name was given */
> +					wsim_err("Missing calibration value for '%s'!\n",
> +						ring_str_map[eng]);
> +					goto err;
> +				}
> +
> +				calib_val = atol(value);
> +
> +				if (eng >= 0 && eng < NUM_ENGINES) {
> +				/* engine name with some value were given */
> +
> +					if (eng == DEFAULT || eng == VCS) {
> +						wsim_err("'%s' not allowed in engine calibrations!\n",
> +							ring_str_map[eng]);
> +						goto err;
> +					} else if (calib_val <= 0) {
> +						wsim_err("Invalid calibration for engine '%s' - value "
> +						"is either non-positive or is not a number!\n",
> +							ring_str_map[eng]);
> +						goto err;
> +					} else if (engine_calib_map[eng]) {
> +						wsim_err("Invalid repeated calibration of '%s'!\n",
> +							ring_str_map[eng]);
> +						goto err;
> +					} else {
> +						engine_calib_map[eng] = calib_val;
> +						has_nop_calibration = true;
> +					}
> +				} else {
> +					/* raw number was given */
> +
> +					if (!calib_val) {
> +						wsim_err("Invalid engine or zero calibration!\n");
> +						goto err;
> +					} else if (calib_val < 0) {
> +						wsim_err("Invalid negative calibration!\n");
> +						goto err;
> +					} else if (raw_number) {
> +						wsim_err("Default engine calibration provided more than once!\n");
> +						goto err;
> +					} else {
> +						raw_number = calib_val;
> +						apply_unset_calibrations(raw_number);
> +						has_nop_calibration = true;
> +					}
> +				}
> +			}
>   			break;
>   		case 'r':
>   			repeat = strtol(optarg, NULL, 0);
> @@ -3242,16 +3429,31 @@ int main(int argc, char **argv)
>   		goto err;
>   	}
>   
> -	if (!nop_calibration) {
> -		if (verbose > 1)
> -			printf("Calibrating nop delay with %u%% tolerance...\n",
> +	if (!has_nop_calibration) {
> +		if (verbose > 1) {
> +			printf("Calibrating nop delays with %u%% tolerance...\n",
>   				tolerance_pct);
> -		nop_calibration = calibrate_nop(tolerance_pct);
> -		if (verbose)
> -			printf("Nop calibration for %uus delay is %lu.\n",
> -			       nop_calibration_us, nop_calibration);
> +		}
>   
> +		calibrate_engines();
> +		print_engine_calibrations();
>   		goto out;
> +	} else {
> +		bool missing = false;
> +
> +		for (i = 0; i < NUM_ENGINES; i++) {
> +			if (i == DEFAULT || i == VCS)
> +				continue;
> +
> +			if (!engine_calib_map[i]) {
> +				wsim_err("Missing calibration for '%s'!\n",
> +					 ring_str_map[i]);
> +				missing = true;
> +			}
> +		}
> +
> +		if (missing)
> +			goto err;
>   	}
>   
>   	if (!nr_w_args) {
> @@ -3309,8 +3511,7 @@ int main(int argc, char **argv)
>   
>   	if (verbose > 1) {
>   		printf("Random seed is %u.\n", master_prng);
> -		printf("Using %lu nop calibration for %uus delay.\n",
> -		       nop_calibration, nop_calibration_us);
> +		print_engine_calibrations();
>   		printf("%u client%s.\n", clients, clients > 1 ? "s" : "");
>   		if (flags & SWAPVCS)
>   			printf("Swapping VCS rings between clients.\n");
> 
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [igt-dev] [PATCH i-g-t] gem_wsim: Distinguish particular engines during calculating nop calibration.
  2020-01-24 11:35       ` Tvrtko Ursulin
@ 2020-01-24 11:41         ` Chris Wilson
  2020-01-24 11:45           ` Tvrtko Ursulin
  0 siblings, 1 reply; 22+ messages in thread
From: Chris Wilson @ 2020-01-24 11:41 UTC (permalink / raw)
  To: Anna Karas, Tvrtko Ursulin, igt-dev; +Cc: Tvrtko Ursulin

Quoting Tvrtko Ursulin (2020-01-24 11:35:35)
> 
> On 24/01/2020 11:18, Anna Karas wrote:
> > Extend handling -n parameter by accepting multiple values of per
> > engine nop calibration. Add raw numbers handling to set default
> > calibration values. Print copyable and pastable string with
> > calibrations. Allow to switch between calculating in parallel
> > or doing it sequentially.
> > 
> > Accepted input values:
> > -n 123456
> > All calibrations will be set to 123456.
> > 
> > -n ENG=value,ENG2=value2,value3
> > i.e.
> > -n RCS=123456,BCS=345678,999999
> > RCS engine's value is set to 123456, BCS engine's value is set to
> > 345678, 999999 is copied to rest of engines. All engines must be set;
> > you can either provide values for each of the engines, or you can set
> > specific values and provide a default value for the others.
> > 
> > -n value,ENG1=value1,ENG2=value2
> > First, value is copied to all engines, then value1 overrides ENG1, and
> > finally value2 overrides ENG2.
> > 
> > New output follows the pattern:
> > Nop calibrations for 1000us delay is: <eng1>=<v1>,<eng2>=<v2>,...
> > So you can easily copy-paste it to the next invocation.
> > 
> > Switching between calculation modes:
> > Run program with -T parameter to calculate calibrations in parallel.
> > The calculations are performed sequentially by default.
> > 
> > v2: Get rid of trailing whitespaces. Skip DEFAULT and VCS engines
> > when printing out calibrations. Reject them in the string passed
> > to -n. Re-align rest of help text. Fix accepting unknown engines.
> > 
> > v3: Consider all cases of arguments
> > for -n (Tvrtko).
> > 
> > -n 10 (raw number)
> > -n RCS (engine without calib)
> > -n AA (neither the engine nor the number)
> > -n RCS=500 (valid eng=val pair)
> > -n RCS=AA (calib is not a number)
> > -n XYZ=10 (engine is not an engine)
> > -n XYZ=AA (combo)
> > 
> > v4: Print calculated values (Chris). Do not make any assumptions
> > about the order of the engines (Tvrtko).
> 
> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> 
> Interesting, or maybe entirely expected, observation is that parallel 
> calibration gives different values. I think more engines slower they get 
> in parallel because of memory bandwith? Probably. That's why suggested 
> default is sequential. Although in practice is depends a lot on the 
> workload to be executed what matches the reality better. Calibrating for 
> the workload sounded a step too far. In theory could be doable using 
> Chris' wsim to theoretical throughput parser. Along the lines probably. 
> But definitely to complicated for now.

I haven't checked but have you accounted for the overhead in submission
serialisation? Finite memory bandwidth is definitely plausible.

If we can put a timing MI_MATH loop inside 128bytes, there's a chance we
could benefit from the tiny CS prefetch and avoid having N engines all
competing for finite CS throughput.
-Chris
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^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [igt-dev] [PATCH i-g-t] gem_wsim: Distinguish particular engines during calculating nop calibration.
  2020-01-24 11:41         ` Chris Wilson
@ 2020-01-24 11:45           ` Tvrtko Ursulin
  2020-01-24 11:51             ` Chris Wilson
  0 siblings, 1 reply; 22+ messages in thread
From: Tvrtko Ursulin @ 2020-01-24 11:45 UTC (permalink / raw)
  To: Chris Wilson, Anna Karas, igt-dev; +Cc: Tvrtko Ursulin


On 24/01/2020 11:41, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2020-01-24 11:35:35)
>>
>> On 24/01/2020 11:18, Anna Karas wrote:
>>> Extend handling -n parameter by accepting multiple values of per
>>> engine nop calibration. Add raw numbers handling to set default
>>> calibration values. Print copyable and pastable string with
>>> calibrations. Allow to switch between calculating in parallel
>>> or doing it sequentially.
>>>
>>> Accepted input values:
>>> -n 123456
>>> All calibrations will be set to 123456.
>>>
>>> -n ENG=value,ENG2=value2,value3
>>> i.e.
>>> -n RCS=123456,BCS=345678,999999
>>> RCS engine's value is set to 123456, BCS engine's value is set to
>>> 345678, 999999 is copied to rest of engines. All engines must be set;
>>> you can either provide values for each of the engines, or you can set
>>> specific values and provide a default value for the others.
>>>
>>> -n value,ENG1=value1,ENG2=value2
>>> First, value is copied to all engines, then value1 overrides ENG1, and
>>> finally value2 overrides ENG2.
>>>
>>> New output follows the pattern:
>>> Nop calibrations for 1000us delay is: <eng1>=<v1>,<eng2>=<v2>,...
>>> So you can easily copy-paste it to the next invocation.
>>>
>>> Switching between calculation modes:
>>> Run program with -T parameter to calculate calibrations in parallel.
>>> The calculations are performed sequentially by default.
>>>
>>> v2: Get rid of trailing whitespaces. Skip DEFAULT and VCS engines
>>> when printing out calibrations. Reject them in the string passed
>>> to -n. Re-align rest of help text. Fix accepting unknown engines.
>>>
>>> v3: Consider all cases of arguments
>>> for -n (Tvrtko).
>>>
>>> -n 10 (raw number)
>>> -n RCS (engine without calib)
>>> -n AA (neither the engine nor the number)
>>> -n RCS=500 (valid eng=val pair)
>>> -n RCS=AA (calib is not a number)
>>> -n XYZ=10 (engine is not an engine)
>>> -n XYZ=AA (combo)
>>>
>>> v4: Print calculated values (Chris). Do not make any assumptions
>>> about the order of the engines (Tvrtko).
>>
>> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>
>> Interesting, or maybe entirely expected, observation is that parallel
>> calibration gives different values. I think more engines slower they get
>> in parallel because of memory bandwith? Probably. That's why suggested
>> default is sequential. Although in practice is depends a lot on the
>> workload to be executed what matches the reality better. Calibrating for
>> the workload sounded a step too far. In theory could be doable using
>> Chris' wsim to theoretical throughput parser. Along the lines probably.
>> But definitely to complicated for now.
> 
> I haven't checked but have you accounted for the overhead in submission
> serialisation? Finite memory bandwidth is definitely plausible.
> 
> If we can put a timing MI_MATH loop inside 128bytes, there's a chance we
> could benefit from the tiny CS prefetch and avoid having N engines all
> competing for finite CS throughput.

For calibration and workload execution? Sounds intriguing. Max batch 
length would be limited by u32 CS timestamp cycles? Assuming you would 
do some sort of counting along those lines.. Possibly that limit would 
be long enough for any practical usage, I haven't tried to remember what 
it is. But anyway, okay to merge this and leave future improvements for 
the future?

Regards,

Tvrtko


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^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [igt-dev] [PATCH i-g-t] gem_wsim: Distinguish particular engines during calculating nop calibration.
  2020-01-24 11:45           ` Tvrtko Ursulin
@ 2020-01-24 11:51             ` Chris Wilson
  0 siblings, 0 replies; 22+ messages in thread
From: Chris Wilson @ 2020-01-24 11:51 UTC (permalink / raw)
  To: Anna Karas, Tvrtko Ursulin, igt-dev; +Cc: Tvrtko Ursulin

Quoting Tvrtko Ursulin (2020-01-24 11:45:49)
> 
> On 24/01/2020 11:41, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2020-01-24 11:35:35)
> >>
> >> On 24/01/2020 11:18, Anna Karas wrote:
> >>> Extend handling -n parameter by accepting multiple values of per
> >>> engine nop calibration. Add raw numbers handling to set default
> >>> calibration values. Print copyable and pastable string with
> >>> calibrations. Allow to switch between calculating in parallel
> >>> or doing it sequentially.
> >>>
> >>> Accepted input values:
> >>> -n 123456
> >>> All calibrations will be set to 123456.
> >>>
> >>> -n ENG=value,ENG2=value2,value3
> >>> i.e.
> >>> -n RCS=123456,BCS=345678,999999
> >>> RCS engine's value is set to 123456, BCS engine's value is set to
> >>> 345678, 999999 is copied to rest of engines. All engines must be set;
> >>> you can either provide values for each of the engines, or you can set
> >>> specific values and provide a default value for the others.
> >>>
> >>> -n value,ENG1=value1,ENG2=value2
> >>> First, value is copied to all engines, then value1 overrides ENG1, and
> >>> finally value2 overrides ENG2.
> >>>
> >>> New output follows the pattern:
> >>> Nop calibrations for 1000us delay is: <eng1>=<v1>,<eng2>=<v2>,...
> >>> So you can easily copy-paste it to the next invocation.
> >>>
> >>> Switching between calculation modes:
> >>> Run program with -T parameter to calculate calibrations in parallel.
> >>> The calculations are performed sequentially by default.
> >>>
> >>> v2: Get rid of trailing whitespaces. Skip DEFAULT and VCS engines
> >>> when printing out calibrations. Reject them in the string passed
> >>> to -n. Re-align rest of help text. Fix accepting unknown engines.
> >>>
> >>> v3: Consider all cases of arguments
> >>> for -n (Tvrtko).
> >>>
> >>> -n 10 (raw number)
> >>> -n RCS (engine without calib)
> >>> -n AA (neither the engine nor the number)
> >>> -n RCS=500 (valid eng=val pair)
> >>> -n RCS=AA (calib is not a number)
> >>> -n XYZ=10 (engine is not an engine)
> >>> -n XYZ=AA (combo)
> >>>
> >>> v4: Print calculated values (Chris). Do not make any assumptions
> >>> about the order of the engines (Tvrtko).
> >>
> >> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> >>
> >> Interesting, or maybe entirely expected, observation is that parallel
> >> calibration gives different values. I think more engines slower they get
> >> in parallel because of memory bandwith? Probably. That's why suggested
> >> default is sequential. Although in practice is depends a lot on the
> >> workload to be executed what matches the reality better. Calibrating for
> >> the workload sounded a step too far. In theory could be doable using
> >> Chris' wsim to theoretical throughput parser. Along the lines probably.
> >> But definitely to complicated for now.
> > 
> > I haven't checked but have you accounted for the overhead in submission
> > serialisation? Finite memory bandwidth is definitely plausible.
> > 
> > If we can put a timing MI_MATH loop inside 128bytes, there's a chance we
> > could benefit from the tiny CS prefetch and avoid having N engines all
> > competing for finite CS throughput.
> 
> For calibration and workload execution? Sounds intriguing. Max batch 
> length would be limited by u32 CS timestamp cycles? Assuming you would 
> do some sort of counting along those lines.. Possibly that limit would 
> be long enough for any practical usage, I haven't tried to remember what 
> it is. But anyway, okay to merge this and leave future improvements for 
> the future?

Definitely... The MI_MATH loop is still in its conceptual stage. I've
got about as far as thinking it'll need a chained batch (or at least 2
phases) the first to prime the CS_GPR with the parameters to the timing
loop, and the second being the actual loop itself which could be common
to all.

Ballpark was that we could do 300s with the loop with approx .1us
accuracy, that should cover the current .wsim? Above that a pure MI_NOOP
batch would be huge, so probably not viable :)
-Chris
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igt-dev@lists.freedesktop.org
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^ permalink raw reply	[flat|nested] 22+ messages in thread

* [igt-dev] ✓ Fi.CI.BAT: success for Distinguish particular engines during calculating nop calibration. (rev4)
  2020-01-16 13:55 [igt-dev] [PATCH i-g-t] Distinguish particular engines during calculating nop calibration Anna Karas
                   ` (6 preceding siblings ...)
  2020-01-23 18:13 ` [igt-dev] ✓ Fi.CI.IGT: success " Patchwork
@ 2020-01-24 12:03 ` Patchwork
  2020-01-24 14:27 ` [igt-dev] ✓ Fi.CI.BAT: success for Distinguish particular engines during calculating nop calibration. (rev5) Patchwork
                   ` (2 subsequent siblings)
  10 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2020-01-24 12:03 UTC (permalink / raw)
  To: Anna Karas; +Cc: igt-dev

== Series Details ==

Series: Distinguish particular engines during calculating nop calibration. (rev4)
URL   : https://patchwork.freedesktop.org/series/72113/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7808 -> IGTPW_3987
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/index.html

Known issues
------------

  Here are the changes found in IGTPW_3987 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_module_load@reload-with-fault-injection:
    - fi-skl-6700k2:      [PASS][1] -> [INCOMPLETE][2] ([i915#671])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/fi-skl-6700k2/igt@i915_module_load@reload-with-fault-injection.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/fi-skl-6700k2/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pm_rpm@module-reload:
    - fi-skl-6600u:       [PASS][3] -> [DMESG-WARN][4] ([i915#889]) +23 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/fi-skl-6600u/igt@i915_pm_rpm@module-reload.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/fi-skl-6600u/igt@i915_pm_rpm@module-reload.html

  * igt@i915_selftest@live_gt_heartbeat:
    - fi-bsw-kefka:       [PASS][5] -> [DMESG-FAIL][6] ([i915#541])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/fi-bsw-kefka/igt@i915_selftest@live_gt_heartbeat.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/fi-bsw-kefka/igt@i915_selftest@live_gt_heartbeat.html

  * igt@i915_selftest@live_gt_lrc:
    - fi-skl-6600u:       [PASS][7] -> [DMESG-FAIL][8] ([i915#889]) +7 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/fi-skl-6600u/igt@i915_selftest@live_gt_lrc.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/fi-skl-6600u/igt@i915_selftest@live_gt_lrc.html

  * igt@kms_addfb_basic@bad-pitch-63:
    - fi-tgl-y:           [PASS][9] -> [DMESG-WARN][10] ([CI#94] / [i915#402])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/fi-tgl-y/igt@kms_addfb_basic@bad-pitch-63.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/fi-tgl-y/igt@kms_addfb_basic@bad-pitch-63.html

  
#### Possible fixes ####

  * igt@gem_exec_parallel@fds:
    - fi-byt-n2820:       [TIMEOUT][11] ([fdo#112271]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/fi-byt-n2820/igt@gem_exec_parallel@fds.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/fi-byt-n2820/igt@gem_exec_parallel@fds.html

  * igt@gem_exec_suspend@basic-s0:
    - fi-cml-s:           [FAIL][13] ([fdo#103375]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/fi-cml-s/igt@gem_exec_suspend@basic-s0.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/fi-cml-s/igt@gem_exec_suspend@basic-s0.html

  * igt@i915_module_load@reload-with-fault-injection:
    - fi-skl-lmem:        [DMESG-WARN][15] ([i915#889]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/fi-skl-lmem/igt@i915_module_load@reload-with-fault-injection.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/fi-skl-lmem/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_selftest@live_blt:
    - fi-hsw-4770r:       [DMESG-FAIL][17] ([i915#725]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/fi-hsw-4770r/igt@i915_selftest@live_blt.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/fi-hsw-4770r/igt@i915_selftest@live_blt.html

  * igt@i915_selftest@live_gem_contexts:
    - fi-cfl-8700k:       [INCOMPLETE][19] ([i915#424]) -> [PASS][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/fi-cfl-8700k/igt@i915_selftest@live_gem_contexts.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/fi-cfl-8700k/igt@i915_selftest@live_gem_contexts.html

  * igt@i915_selftest@live_gtt:
    - fi-icl-dsi:         [TIMEOUT][21] ([fdo#112271]) -> [PASS][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/fi-icl-dsi/igt@i915_selftest@live_gtt.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/fi-icl-dsi/igt@i915_selftest@live_gtt.html

  * igt@prime_vgem@basic-busy-default:
    - fi-tgl-y:           [DMESG-WARN][23] ([CI#94] / [i915#402]) -> [PASS][24]
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/fi-tgl-y/igt@prime_vgem@basic-busy-default.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/fi-tgl-y/igt@prime_vgem@basic-busy-default.html

  
  [CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94
  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
  [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
  [i915#424]: https://gitlab.freedesktop.org/drm/intel/issues/424
  [i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541
  [i915#671]: https://gitlab.freedesktop.org/drm/intel/issues/671
  [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
  [i915#889]: https://gitlab.freedesktop.org/drm/intel/issues/889


Participating hosts (52 -> 45)
------------------------------

  Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5382 -> IGTPW_3987

  CI-20190529: 20190529
  CI_DRM_7808: 2c0cac4ed28a1f343c5a7c5c3a1c2edb382ab4dd @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3987: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/index.html
  IGT_5382: 8dbe5ce61baa2d563d4dd7c56a018bb1e1077467 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/index.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [igt-dev] [PATCH i-g-t] gem_wsim: Distinguish particular engines during calculating nop calibration.
  2020-01-24 11:18     ` [igt-dev] [PATCH i-g-t] gem_wsim: " Anna Karas
  2020-01-24 11:35       ` Tvrtko Ursulin
@ 2020-01-24 12:05       ` Chris Wilson
  2020-01-24 13:54       ` Anna Karas
  2 siblings, 0 replies; 22+ messages in thread
From: Chris Wilson @ 2020-01-24 12:05 UTC (permalink / raw)
  To: Anna Karas, igt-dev; +Cc: Tvrtko Ursulin

Quoting Anna Karas (2020-01-24 11:18:22)
> +       if (!has_nop_calibration) {
> +               if (verbose > 1) {
> +                       printf("Calibrating nop delays with %u%% tolerance...\n",
>                                 tolerance_pct);
> -               nop_calibration = calibrate_nop(tolerance_pct);
> -               if (verbose)
> -                       printf("Nop calibration for %uus delay is %lu.\n",
> -                              nop_calibration_us, nop_calibration);
> +               }
>  
> +               calibrate_engines();
> +               print_engine_calibrations();

One trivial fixup,
	if (verbose)
		print_engine_calibrations();
to match earlier behaviour to suppress the output with -s
-Chris
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 22+ messages in thread

* [igt-dev] [PATCH i-g-t] gem_wsim: Distinguish particular engines during calculating nop calibration.
  2020-01-24 11:18     ` [igt-dev] [PATCH i-g-t] gem_wsim: " Anna Karas
  2020-01-24 11:35       ` Tvrtko Ursulin
  2020-01-24 12:05       ` Chris Wilson
@ 2020-01-24 13:54       ` Anna Karas
  2 siblings, 0 replies; 22+ messages in thread
From: Anna Karas @ 2020-01-24 13:54 UTC (permalink / raw)
  To: igt-dev; +Cc: Tvrtko Ursulin

Extend handling -n parameter by accepting multiple values of per
engine nop calibration. Add raw numbers handling to set default
calibration values. Print copyable and pastable string with
calibrations. Allow to switch between calculating in parallel
or doing it sequentially.

Accepted input values:
-n 123456
All calibrations will be set to 123456.

-n ENG=value,ENG2=value2,value3
i.e.
-n RCS=123456,BCS=345678,999999
RCS engine's value is set to 123456, BCS engine's value is set to
345678, 999999 is copied to rest of engines. All engines must be set;
you can either provide values for each of the engines, or you can set
specific values and provide a default value for the others.

-n value,ENG1=value1,ENG2=value2
First, value is copied to all engines, then value1 overrides ENG1, and
finally value2 overrides ENG2.

New output follows the pattern:
Nop calibrations for 1000us delay is: <eng1>=<v1>,<eng2>=<v2>,...
So you can easily copy-paste it to the next invocation.

Switching between calculation modes:
Run program with -T parameter to calculate calibrations in parallel.
The calculations are performed sequentially by default.

v2: Get rid of trailing whitespaces. Skip DEFAULT and VCS engines
when printing out calibrations. Reject them in the string passed
to -n. Re-align rest of help text. Fix accepting unknown engines.

v3: Consider all cases of arguments
for -n (Tvrtko).

-n 10 (raw number)
-n RCS (engine without calib)
-n AA (neither the engine nor the number)
-n RCS=500 (valid eng=val pair)
-n RCS=AA (calib is not a number)
-n XYZ=10 (engine is not an engine)
-n XYZ=AA (combo)

v4: Print calculated values (Chris). Do not make any assumptions
about the order of the engines (Tvrtko).

v5: Suppress the output with -q (Chris).

Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Anna Karas <anna.karas@intel.com>
---
 benchmarks/gem_wsim.c | 319 ++++++++++++++++++++++++++++++++++--------
 1 file changed, 261 insertions(+), 58 deletions(-)

diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c
index 9156fdc9..887e82cf 100644
--- a/benchmarks/gem_wsim.c
+++ b/benchmarks/gem_wsim.c
@@ -23,6 +23,7 @@
  */
 
 #include <unistd.h>
+#include <stdbool.h>
 #include <stdlib.h>
 #include <stdint.h>
 #include <stdio.h>
@@ -55,6 +56,7 @@
 #include "i915/gem_mman.h"
 
 #include "ewma.h"
+#include "i915/gem_engine_topology.h"
 
 enum intel_engine_id {
 	DEFAULT,
@@ -240,7 +242,8 @@ struct workload
 
 struct intel_mmio_data mmio_data;
 static const unsigned int nop_calibration_us = 1000;
-static unsigned long nop_calibration;
+static bool has_nop_calibration = false;
+static bool sequential = true;
 
 static unsigned int master_prng;
 
@@ -281,6 +284,61 @@ static const char *ring_str_map[NUM_ENGINES] = {
 	[VECS] = "VECS",
 };
 
+/* stores calibrations for particular engines */
+static unsigned long engine_calib_map[NUM_ENGINES];
+
+static enum intel_engine_id
+ci_to_engine_id(int class, int instance)
+{
+	static const struct {
+		int class;
+		int instance;
+		unsigned int id;
+	} map[] = {
+		{ I915_ENGINE_CLASS_RENDER, 0, RCS },
+		{ I915_ENGINE_CLASS_COPY, 0, BCS },
+		{ I915_ENGINE_CLASS_VIDEO, 0, VCS1 },
+		{ I915_ENGINE_CLASS_VIDEO, 1, VCS2 },
+		{ I915_ENGINE_CLASS_VIDEO, 2, VCS2 }, /* FIXME/ICL */
+		{ I915_ENGINE_CLASS_VIDEO_ENHANCE, 0, VECS },
+	};
+
+	unsigned int i;
+
+	for (i = 0; i < ARRAY_SIZE(map); i++) {
+		if (class == map[i].class && instance == map[i].instance)
+			return map[i].id;
+	}
+	return -1;
+}
+
+static void
+apply_unset_calibrations(unsigned long raw_number)
+{
+	for (int i = 0; i < NUM_ENGINES; i++)
+		engine_calib_map[i] += engine_calib_map[i] ? 0 : raw_number;
+}
+
+static void
+print_engine_calibrations(void)
+{
+	bool first_entry = true;
+
+	printf("Nop calibrations for %uus delay is: ", nop_calibration_us);
+	for (int i = 0; i < NUM_ENGINES; i++) {
+		/* skip DEFAULT and VCS engines */
+		if (i != DEFAULT && i != VCS) {
+			if (first_entry) {
+				printf("%s=%lu", ring_str_map[i], engine_calib_map[i]);
+				first_entry = false;
+			} else {
+				printf(",%s=%lu", ring_str_map[i], engine_calib_map[i]);
+			}
+		}
+	}
+	printf("\n");
+}
+
 static int
 parse_dependencies(unsigned int nr_steps, struct w_step *w, char *_desc)
 {
@@ -1082,17 +1140,17 @@ static unsigned int get_duration(struct workload *wrk, struct w_step *w)
 		       (dur->max + 1 - dur->min);
 }
 
-static unsigned long get_bb_sz(unsigned int duration)
+static unsigned long get_bb_sz(unsigned int duration, enum intel_engine_id engine)
 {
-	return ALIGN(duration * nop_calibration * sizeof(uint32_t) /
-		     nop_calibration_us, sizeof(uint32_t));
+	return ALIGN(duration * engine_calib_map[engine] * sizeof(uint32_t) /
+		nop_calibration_us, sizeof(uint32_t));
 }
 
 static void
 init_bb(struct w_step *w, unsigned int flags)
 {
 	const unsigned int arb_period =
-			get_bb_sz(w->preempt_us) / sizeof(uint32_t);
+			get_bb_sz(w->preempt_us, w->engine) / sizeof(uint32_t);
 	const unsigned int mmap_len = ALIGN(w->bb_sz, 4096);
 	unsigned int i;
 	uint32_t *ptr;
@@ -1319,10 +1377,11 @@ alloc_step_batch(struct workload *wrk, struct w_step *w, unsigned int flags)
 
 	if (w->unbound_duration)
 		/* nops + MI_ARB_CHK + MI_BATCH_BUFFER_START */
-		w->bb_sz = max(PAGE_SIZE, get_bb_sz(w->preempt_us)) +
+		w->bb_sz = max(PAGE_SIZE, get_bb_sz(w->preempt_us, w->engine)) +
 			   (1 + 3) * sizeof(uint32_t);
 	else
-		w->bb_sz = get_bb_sz(w->duration.max);
+		w->bb_sz = get_bb_sz(w->duration.max, w->engine);
+
 	w->bb_handle = w->obj[j].handle = gem_create(fd, w->bb_sz + (w->unbound_duration ? 4096 : 0));
 	init_bb(w, flags);
 	w->obj[j].relocation_count = terminate_bb(w, flags);
@@ -2622,7 +2681,7 @@ do_eb(struct workload *wrk, struct w_step *w, enum intel_engine_id engine,
 	w->eb.batch_start_offset =
 		w->unbound_duration ?
 		0 :
-		ALIGN(w->bb_sz - get_bb_sz(get_duration(wrk, w)),
+		ALIGN(w->bb_sz - get_bb_sz(get_duration(wrk, w), w->engine),
 		      2 * sizeof(uint32_t));
 
 	for (i = 0; i < w->fence_deps.nr; i++) {
@@ -2899,15 +2958,18 @@ static void fini_workload(struct workload *wrk)
 	free(wrk);
 }
 
-static unsigned long calibrate_nop(unsigned int tolerance_pct)
+static unsigned long calibrate_nop(unsigned int tolerance_pct, struct intel_execution_engine2 *engine)
 {
 	const uint32_t bbe = 0xa << 23;
 	unsigned int loops = 17;
 	unsigned int usecs = nop_calibration_us;
 	struct drm_i915_gem_exec_object2 obj = {};
-	struct drm_i915_gem_execbuffer2 eb =
-		{ .buffer_count = 1, .buffers_ptr = (uintptr_t)&obj};
-	long size, last_size;
+	struct drm_i915_gem_execbuffer2 eb = {
+		.buffer_count = 1,
+		.buffers_ptr = (uintptr_t)&obj,
+		.flags = engine->flags
+	};
+	unsigned long size, last_size;
 	struct timespec t_0, t_end;
 
 	clock_gettime(CLOCK_MONOTONIC, &t_0);
@@ -2939,6 +3001,70 @@ static unsigned long calibrate_nop(unsigned int tolerance_pct)
 	return size / sizeof(uint32_t);
 }
 
+static void
+calibrate_sequentially(void)
+{
+	struct intel_execution_engine2 *engine;
+	enum intel_engine_id eng_id;
+
+	__for_each_physical_engine(fd, engine) {
+		eng_id = ci_to_engine_id(engine->class, engine->instance);
+		igt_assert(eng_id >= 0);
+		engine_calib_map[eng_id] = calibrate_nop(fd, engine);
+	}
+}
+
+struct thread_data {
+	struct intel_execution_engine2 *eng;
+	pthread_t thr;
+	unsigned long calib;
+};
+
+static void *
+engine_calibration_thread(void *data)
+{
+	struct thread_data *thr_d = (struct thread_data *) data;
+
+	thr_d->calib = calibrate_nop(fd, thr_d->eng);
+	return NULL;
+}
+
+static void
+calibrate_in_parallel(void)
+{
+	struct thread_data *thr_d = malloc(NUM_ENGINES * sizeof(*thr_d));
+	struct intel_execution_engine2 *engine;
+	enum intel_engine_id id;
+	int ret;
+
+	__for_each_physical_engine(fd, engine) {
+		id = ci_to_engine_id(engine->class, engine->instance);
+		thr_d[id].eng = engine;
+		ret = pthread_create(&thr_d[id].thr, NULL, engine_calibration_thread, &thr_d[id]);
+		igt_assert_eq(ret, 0);
+	}
+
+	__for_each_physical_engine(fd, engine) {
+		id = ci_to_engine_id(engine->class, engine->instance);
+		igt_assert(id >= 0);
+
+		ret = pthread_join(thr_d[id].thr, NULL);
+		igt_assert_eq(ret, 0);
+		engine_calib_map[id] = thr_d[id].calib;
+	}
+
+	free(thr_d);
+}
+
+static void
+calibrate_engines(void)
+{
+	if (sequential)
+		calibrate_sequentially();
+	else
+		calibrate_in_parallel();
+}
+
 static void print_help(void)
 {
 	unsigned int i;
@@ -2951,50 +3077,53 @@ static void print_help(void)
 "be provided when running the simulation in subsequent invocations.\n"
 "\n"
 "Options:\n"
-"  -h              This text.\n"
-"  -q              Be quiet - do not output anything to stdout.\n"
-"  -n <n>          Nop calibration value.\n"
-"  -t <n>          Nop calibration tolerance percentage.\n"
-"                  Use when there is a difficulty obtaining calibration with the\n"
-"                  default settings.\n"
-"  -I <n>          Initial randomness seed.\n"
-"  -p <n>          Context priority to use for the following workload on the\n"
-"                  command line.\n"
-"  -w <desc|path>  Filename or a workload descriptor.\n"
-"                  Can be given multiple times.\n"
-"  -W <desc|path>  Filename or a master workload descriptor.\n"
-"                  Only one master workload can be optinally specified in which\n"
-"                  case all other workloads become background ones and run as\n"
-"                  long as the master.\n"
-"  -a <desc|path>  Append a workload to all other workloads.\n"
-"  -r <n>          How many times to emit the workload.\n"
-"  -c <n>          Fork N clients emitting the workload simultaneously.\n"
-"  -x              Swap VCS1 and VCS2 engines in every other client.\n"
-"  -b <n>          Load balancing to use.\n"
-"                  Available load balancers are:"
+"  -h                This text.\n"
+"  -q                Be quiet - do not output anything to stdout.\n"
+"  -n <n |           Nop calibration value - single value is set to all engines\n"
+"  e1=v1,e2=v2,n...> without specified value; you can also specify calibrations for\n"
+"                    particular engines.\n"
+"  -t <n>            Nop calibration tolerance percentage.\n"
+"  -T                Disable sequential calibration and perform calibration in parallel.\n"
+"                    Use when there is a difficulty obtaining calibration with the\n"
+"                    default settings.\n"
+"  -I <n>            Initial randomness seed.\n"
+"  -p <n>            Context priority to use for the following workload on the\n"
+"                    command line.\n"
+"  -w <desc|path>    Filename or a workload descriptor.\n"
+"                    Can be given multiple times.\n"
+"  -W <desc|path>    Filename or a master workload descriptor.\n"
+"                    Only one master workload can be optinally specified in which\n"
+"                    case all other workloads become background ones and run as\n"
+"                    long as the master.\n"
+"  -a <desc|path>    Append a workload to all other workloads.\n"
+"  -r <n>            How many times to emit the workload.\n"
+"  -c <n>            Fork N clients emitting the workload simultaneously.\n"
+"  -x                Swap VCS1 and VCS2 engines in every other client.\n"
+"  -b <n>            Load balancing to use.\n"
+"                    Available load balancers are:"
 	);
 
 	for (i = 0; i < ARRAY_SIZE(all_balancers); i++) {
 		igt_assert(all_balancers[i].desc);
 		printf(
-"                     %s (%u): %s\n",
+"                       %s (%u): %s\n",
 		       all_balancers[i].name, all_balancers[i].id,
 		       all_balancers[i].desc);
 	}
 	puts(
-"                  Balancers can be specified either as names or as their id\n"
-"                  number as listed above.\n"
-"  -2              Remap VCS2 to BCS.\n"
-"  -R              Round-robin initial VCS assignment per client.\n"
-"  -H              Send heartbeat on synchronisation points with seqno based\n"
-"                  balancers. Gives better engine busyness view in some cases.\n"
-"  -s              Turn on small SSEU config for the next workload on the\n"
-"                  command line. Subsequent -s switches it off.\n"
-"  -S              Synchronize the sequence of random batch durations between\n"
-"                  clients.\n"
-"  -G              Global load balancing - a single load balancer will be shared\n"
-"                  between all clients and there will be a single seqno domain.\n"
-"  -d              Sync between data dependencies in userspace."
+"                     Balancers can be specified either as names or as their id\n"
+"                     number as listed above.\n"
+"  -2                 Remap VCS2 to BCS.\n"
+"  -R                 Round-robin initial VCS assignment per client.\n"
+"  -H                 Send heartbeat on synchronisation points with seqno based\n"
+"                     balancers. Gives better engine busyness view in some cases.\n"
+"  -s                 Turn on small SSEU config for the next workload on the\n"
+"                     command line. Subsequent -s switches it off.\n"
+"  -S                 Synchronize the sequence of random batch durations between\n"
+"                     clients.\n"
+"  -G                 Global load balancing - a single load balancer will be shared\n"
+"                     between all clients and there will be a single seqno domain.\n"
+"  -d                 Sync between data dependencies in userspace."
 	);
 }
 
@@ -3117,6 +3246,10 @@ int main(int argc, char **argv)
 	int prio = 0;
 	double t;
 	int i, c;
+	char *subopts, *value;
+	int raw_number = 0;
+	long calib_val;
+	int eng;
 
 	/*
 	 * Open the device via the low-level API so we can do the GPU quiesce
@@ -3134,7 +3267,7 @@ int main(int argc, char **argv)
 	master_prng = time(NULL);
 
 	while ((c = getopt(argc, argv,
-			   "hqv2RsSHxGdc:n:r:w:W:a:t:b:p:I:")) != -1) {
+			   "Thqv2RsSHxGdc:n:r:w:W:a:t:b:p:I:")) != -1) {
 		switch (c) {
 		case 'W':
 			if (master_workload >= 0) {
@@ -3163,8 +3296,62 @@ int main(int argc, char **argv)
 		case 't':
 			tolerance_pct = strtol(optarg, NULL, 0);
 			break;
+		case 'T':
+			sequential = false;
+			break;
+
 		case 'n':
-			nop_calibration = strtol(optarg, NULL, 0);
+			subopts = optarg;
+			while (*subopts != '\0') {
+				eng = getsubopt(&subopts, (char **)ring_str_map, &value);
+				if (!value) {
+					/* only engine name was given */
+					wsim_err("Missing calibration value for '%s'!\n",
+						ring_str_map[eng]);
+					goto err;
+				}
+
+				calib_val = atol(value);
+
+				if (eng >= 0 && eng < NUM_ENGINES) {
+				/* engine name with some value were given */
+
+					if (eng == DEFAULT || eng == VCS) {
+						wsim_err("'%s' not allowed in engine calibrations!\n",
+							ring_str_map[eng]);
+						goto err;
+					} else if (calib_val <= 0) {
+						wsim_err("Invalid calibration for engine '%s' - value "
+						"is either non-positive or is not a number!\n",
+							ring_str_map[eng]);
+						goto err;
+					} else if (engine_calib_map[eng]) {
+						wsim_err("Invalid repeated calibration of '%s'!\n",
+							ring_str_map[eng]);
+						goto err;
+					} else {
+						engine_calib_map[eng] = calib_val;
+						has_nop_calibration = true;
+					}
+				} else {
+					/* raw number was given */
+
+					if (!calib_val) {
+						wsim_err("Invalid engine or zero calibration!\n");
+						goto err;
+					} else if (calib_val < 0) {
+						wsim_err("Invalid negative calibration!\n");
+						goto err;
+					} else if (raw_number) {
+						wsim_err("Default engine calibration provided more than once!\n");
+						goto err;
+					} else {
+						raw_number = calib_val;
+						apply_unset_calibrations(raw_number);
+						has_nop_calibration = true;
+					}
+				}
+			}
 			break;
 		case 'r':
 			repeat = strtol(optarg, NULL, 0);
@@ -3242,16 +3429,33 @@ int main(int argc, char **argv)
 		goto err;
 	}
 
-	if (!nop_calibration) {
-		if (verbose > 1)
-			printf("Calibrating nop delay with %u%% tolerance...\n",
+	if (!has_nop_calibration) {
+		if (verbose > 1) {
+			printf("Calibrating nop delays with %u%% tolerance...\n",
 				tolerance_pct);
-		nop_calibration = calibrate_nop(tolerance_pct);
-		if (verbose)
-			printf("Nop calibration for %uus delay is %lu.\n",
-			       nop_calibration_us, nop_calibration);
+		}
 
+		calibrate_engines();
+
+		if (verbose)
+			print_engine_calibrations();
 		goto out;
+	} else {
+		bool missing = false;
+
+		for (i = 0; i < NUM_ENGINES; i++) {
+			if (i == DEFAULT || i == VCS)
+				continue;
+
+			if (!engine_calib_map[i]) {
+				wsim_err("Missing calibration for '%s'!\n",
+					 ring_str_map[i]);
+				missing = true;
+			}
+		}
+
+		if (missing)
+			goto err;
 	}
 
 	if (!nr_w_args) {
@@ -3309,8 +3513,7 @@ int main(int argc, char **argv)
 
 	if (verbose > 1) {
 		printf("Random seed is %u.\n", master_prng);
-		printf("Using %lu nop calibration for %uus delay.\n",
-		       nop_calibration, nop_calibration_us);
+		print_engine_calibrations();
 		printf("%u client%s.\n", clients, clients > 1 ? "s" : "");
 		if (flags & SWAPVCS)
 			printf("Swapping VCS rings between clients.\n");
-- 
2.19.0

_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply related	[flat|nested] 22+ messages in thread

* [igt-dev] ✓ Fi.CI.BAT: success for Distinguish particular engines during calculating nop calibration. (rev5)
  2020-01-16 13:55 [igt-dev] [PATCH i-g-t] Distinguish particular engines during calculating nop calibration Anna Karas
                   ` (7 preceding siblings ...)
  2020-01-24 12:03 ` [igt-dev] ✓ Fi.CI.BAT: success for Distinguish particular engines during calculating nop calibration. (rev4) Patchwork
@ 2020-01-24 14:27 ` Patchwork
  2020-01-26 14:06 ` [igt-dev] ✓ Fi.CI.IGT: success for Distinguish particular engines during calculating nop calibration. (rev4) Patchwork
  2020-01-26 17:40 ` [igt-dev] ✓ Fi.CI.IGT: success for Distinguish particular engines during calculating nop calibration. (rev5) Patchwork
  10 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2020-01-24 14:27 UTC (permalink / raw)
  To: Anna Karas; +Cc: igt-dev

== Series Details ==

Series: Distinguish particular engines during calculating nop calibration. (rev5)
URL   : https://patchwork.freedesktop.org/series/72113/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7809 -> IGTPW_3989
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/index.html

Known issues
------------

  Here are the changes found in IGTPW_3989 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_close_race@basic-threads:
    - fi-byt-n2820:       [PASS][1] -> [INCOMPLETE][2] ([i915#45])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/fi-byt-n2820/igt@gem_close_race@basic-threads.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/fi-byt-n2820/igt@gem_close_race@basic-threads.html

  * igt@gem_exec_suspend@basic-s4-devices:
    - fi-tgl-y:           [PASS][3] -> [FAIL][4] ([CI#94])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/fi-tgl-y/igt@gem_exec_suspend@basic-s4-devices.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/fi-tgl-y/igt@gem_exec_suspend@basic-s4-devices.html

  * igt@vgem_basic@debugfs:
    - fi-tgl-y:           [PASS][5] -> [DMESG-WARN][6] ([CI#94] / [i915#402]) +1 similar issue
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/fi-tgl-y/igt@vgem_basic@debugfs.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/fi-tgl-y/igt@vgem_basic@debugfs.html

  
#### Possible fixes ####

  * igt@gem_exec_parallel@contexts:
    - fi-byt-j1900:       [TIMEOUT][7] ([fdo#112271]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/fi-byt-j1900/igt@gem_exec_parallel@contexts.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/fi-byt-j1900/igt@gem_exec_parallel@contexts.html

  * igt@gem_exec_parallel@fds:
    - fi-byt-j1900:       [INCOMPLETE][9] ([i915#45]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/fi-byt-j1900/igt@gem_exec_parallel@fds.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/fi-byt-j1900/igt@gem_exec_parallel@fds.html

  * igt@i915_getparams_basic@basic-eu-total:
    - fi-tgl-y:           [DMESG-WARN][11] ([CI#94] / [i915#402]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/fi-tgl-y/igt@i915_getparams_basic@basic-eu-total.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/fi-tgl-y/igt@i915_getparams_basic@basic-eu-total.html

  * igt@i915_module_load@reload-with-fault-injection:
    - fi-kbl-7500u:       [INCOMPLETE][13] ([i915#879]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/fi-kbl-7500u/igt@i915_module_load@reload-with-fault-injection.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/fi-kbl-7500u/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pm_rpm@module-reload:
    - fi-kbl-x1275:       [DMESG-WARN][15] ([i915#889]) -> [PASS][16] +1 similar issue
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html

  * igt@i915_selftest@live_blt:
    - fi-hsw-4770r:       [DMESG-FAIL][17] ([i915#725]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/fi-hsw-4770r/igt@i915_selftest@live_blt.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/fi-hsw-4770r/igt@i915_selftest@live_blt.html

  * igt@i915_selftest@live_gem_contexts:
    - fi-skl-lmem:        [INCOMPLETE][19] ([i915#424]) -> [PASS][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/fi-skl-lmem/igt@i915_selftest@live_gem_contexts.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/fi-skl-lmem/igt@i915_selftest@live_gem_contexts.html

  * igt@i915_selftest@live_sanitycheck:
    - fi-kbl-x1275:       [INCOMPLETE][21] -> [PASS][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/fi-kbl-x1275/igt@i915_selftest@live_sanitycheck.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/fi-kbl-x1275/igt@i915_selftest@live_sanitycheck.html

  * igt@kms_chamelium@hdmi-crc-fast:
    - fi-skl-6700k2:      [FAIL][23] ([i915#410]) -> [PASS][24] +3 similar issues
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/fi-skl-6700k2/igt@kms_chamelium@hdmi-crc-fast.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/fi-skl-6700k2/igt@kms_chamelium@hdmi-crc-fast.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][25] ([fdo#111096] / [i915#323]) -> [PASS][26]
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  
#### Warnings ####

  * igt@kms_chamelium@dp-hpd-fast:
    - fi-skl-6700k2:      [FAIL][27] ([i915#410]) -> [SKIP][28] ([fdo#109271]) +4 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/fi-skl-6700k2/igt@kms_chamelium@dp-hpd-fast.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/fi-skl-6700k2/igt@kms_chamelium@dp-hpd-fast.html

  
  [CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
  [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
  [i915#323]: https://gitlab.freedesktop.org/drm/intel/issues/323
  [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
  [i915#410]: https://gitlab.freedesktop.org/drm/intel/issues/410
  [i915#424]: https://gitlab.freedesktop.org/drm/intel/issues/424
  [i915#45]: https://gitlab.freedesktop.org/drm/intel/issues/45
  [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
  [i915#879]: https://gitlab.freedesktop.org/drm/intel/issues/879
  [i915#889]: https://gitlab.freedesktop.org/drm/intel/issues/889


Participating hosts (51 -> 44)
------------------------------

  Missing    (7): fi-hsw-4200u fi-skl-guc fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5382 -> IGTPW_3989

  CI-20190529: 20190529
  CI_DRM_7809: 861f608ce6e3c1a1ad320a5d18055601cff36e45 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3989: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/index.html
  IGT_5382: 8dbe5ce61baa2d563d4dd7c56a018bb1e1077467 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/index.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 22+ messages in thread

* [igt-dev] ✓ Fi.CI.IGT: success for Distinguish particular engines during calculating nop calibration. (rev4)
  2020-01-16 13:55 [igt-dev] [PATCH i-g-t] Distinguish particular engines during calculating nop calibration Anna Karas
                   ` (8 preceding siblings ...)
  2020-01-24 14:27 ` [igt-dev] ✓ Fi.CI.BAT: success for Distinguish particular engines during calculating nop calibration. (rev5) Patchwork
@ 2020-01-26 14:06 ` Patchwork
  2020-01-26 17:40 ` [igt-dev] ✓ Fi.CI.IGT: success for Distinguish particular engines during calculating nop calibration. (rev5) Patchwork
  10 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2020-01-26 14:06 UTC (permalink / raw)
  To: Anna Karas; +Cc: igt-dev

== Series Details ==

Series: Distinguish particular engines during calculating nop calibration. (rev4)
URL   : https://patchwork.freedesktop.org/series/72113/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7808_full -> IGTPW_3987_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/index.html

Known issues
------------

  Here are the changes found in IGTPW_3987_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_isolation@vcs1-dirty-create:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([fdo#109276] / [fdo#112080]) +2 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-iclb1/igt@gem_ctx_isolation@vcs1-dirty-create.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-iclb7/igt@gem_ctx_isolation@vcs1-dirty-create.html

  * igt@gem_exec_schedule@pi-distinct-iova-bsd:
    - shard-iclb:         [PASS][3] -> [SKIP][4] ([i915#677])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-iclb8/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-iclb1/igt@gem_exec_schedule@pi-distinct-iova-bsd.html

  * igt@gem_exec_schedule@preempt-other-chain-bsd:
    - shard-iclb:         [PASS][5] -> [SKIP][6] ([fdo#112146]) +3 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-iclb3/igt@gem_exec_schedule@preempt-other-chain-bsd.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-iclb1/igt@gem_exec_schedule@preempt-other-chain-bsd.html

  * igt@gem_exec_suspend@basic-s0:
    - shard-iclb:         [PASS][7] -> [INCOMPLETE][8] ([i915#140]) +1 similar issue
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-iclb4/igt@gem_exec_suspend@basic-s0.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-iclb4/igt@gem_exec_suspend@basic-s0.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
    - shard-apl:          [PASS][9] -> [FAIL][10] ([i915#644])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-apl2/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-apl7/igt@gem_ppgtt@flink-and-close-vma-leak.html

  * igt@gem_userptr_blits@sync-unmap:
    - shard-snb:          [PASS][11] -> [DMESG-WARN][12] ([fdo#111870] / [i915#478]) +2 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-snb6/igt@gem_userptr_blits@sync-unmap.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-snb5/igt@gem_userptr_blits@sync-unmap.html

  * igt@i915_suspend@fence-restore-tiled2untiled:
    - shard-apl:          [PASS][13] -> [DMESG-WARN][14] ([i915#180]) +1 similar issue
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-apl1/igt@i915_suspend@fence-restore-tiled2untiled.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-apl1/igt@i915_suspend@fence-restore-tiled2untiled.html

  * igt@kms_frontbuffer_tracking@fbc-stridechange:
    - shard-tglb:         [PASS][15] -> [FAIL][16] ([i915#49]) +3 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-tglb8/igt@kms_frontbuffer_tracking@fbc-stridechange.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-tglb4/igt@kms_frontbuffer_tracking@fbc-stridechange.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - shard-kbl:          [PASS][17] -> [DMESG-WARN][18] ([i915#180]) +1 similar issue
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-kbl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-kbl6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  * igt@kms_psr@psr2_primary_page_flip:
    - shard-iclb:         [PASS][19] -> [SKIP][20] ([fdo#109441]) +3 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-iclb4/igt@kms_psr@psr2_primary_page_flip.html

  * igt@kms_universal_plane@universal-plane-pipe-c-functional:
    - shard-kbl:          [PASS][21] -> [FAIL][22] ([i915#331])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-kbl6/igt@kms_universal_plane@universal-plane-pipe-c-functional.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-kbl2/igt@kms_universal_plane@universal-plane-pipe-c-functional.html
    - shard-apl:          [PASS][23] -> [FAIL][24] ([i915#331])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-apl3/igt@kms_universal_plane@universal-plane-pipe-c-functional.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-apl4/igt@kms_universal_plane@universal-plane-pipe-c-functional.html

  * igt@perf_pmu@busy-no-semaphores-vcs1:
    - shard-iclb:         [PASS][25] -> [SKIP][26] ([fdo#112080]) +12 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-iclb1/igt@perf_pmu@busy-no-semaphores-vcs1.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-iclb5/igt@perf_pmu@busy-no-semaphores-vcs1.html

  * igt@prime_vgem@fence-wait-bsd2:
    - shard-iclb:         [PASS][27] -> [SKIP][28] ([fdo#109276]) +16 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-iclb1/igt@prime_vgem@fence-wait-bsd2.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-iclb3/igt@prime_vgem@fence-wait-bsd2.html

  
#### Possible fixes ####

  * igt@gem_busy@busy-vcs1:
    - shard-iclb:         [SKIP][29] ([fdo#112080]) -> [PASS][30] +10 similar issues
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-iclb7/igt@gem_busy@busy-vcs1.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-iclb1/igt@gem_busy@busy-vcs1.html

  * igt@gem_ctx_persistence@vcs1-queued:
    - shard-iclb:         [SKIP][31] ([fdo#109276] / [fdo#112080]) -> [PASS][32] +1 similar issue
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-iclb3/igt@gem_ctx_persistence@vcs1-queued.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-iclb2/igt@gem_ctx_persistence@vcs1-queued.html

  * igt@gem_ctx_shared@exec-single-timeline-bsd:
    - shard-iclb:         [SKIP][33] ([fdo#110841]) -> [PASS][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-iclb4/igt@gem_ctx_shared@exec-single-timeline-bsd.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-iclb6/igt@gem_ctx_shared@exec-single-timeline-bsd.html

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [SKIP][35] ([fdo#110854]) -> [PASS][36]
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-iclb8/igt@gem_exec_balancer@smoke.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-iclb1/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_schedule@pi-shared-iova-bsd:
    - shard-iclb:         [SKIP][37] ([i915#677]) -> [PASS][38] +1 similar issue
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-iclb2/igt@gem_exec_schedule@pi-shared-iova-bsd.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-iclb6/igt@gem_exec_schedule@pi-shared-iova-bsd.html

  * igt@gem_exec_schedule@preempt-bsd:
    - shard-iclb:         [SKIP][39] ([fdo#112146]) -> [PASS][40] +3 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-iclb1/igt@gem_exec_schedule@preempt-bsd.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-iclb3/igt@gem_exec_schedule@preempt-bsd.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
    - shard-glk:          [FAIL][41] ([i915#644]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-glk6/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-glk7/igt@gem_ppgtt@flink-and-close-vma-leak.html

  * igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy:
    - shard-snb:          [DMESG-WARN][43] ([fdo#111870] / [i915#478]) -> [PASS][44]
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-snb5/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-snb5/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html

  * igt@gem_workarounds@suspend-resume:
    - shard-apl:          [DMESG-WARN][45] ([i915#180]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-apl6/igt@gem_workarounds@suspend-resume.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-apl2/igt@gem_workarounds@suspend-resume.html

  * igt@i915_pm_rps@waitboost:
    - shard-tglb:         [FAIL][47] ([i915#413]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-tglb2/igt@i915_pm_rps@waitboost.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-tglb5/igt@i915_pm_rps@waitboost.html

  * igt@i915_selftest@mock_requests:
    - shard-glk:          [INCOMPLETE][49] ([i915#58] / [k.org#198133]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-glk7/igt@i915_selftest@mock_requests.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-glk1/igt@i915_selftest@mock_requests.html
    - shard-kbl:          [INCOMPLETE][51] ([fdo#103665]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-kbl4/igt@i915_selftest@mock_requests.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-kbl6/igt@i915_selftest@mock_requests.html
    - shard-hsw:          [INCOMPLETE][53] ([i915#61]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-hsw7/igt@i915_selftest@mock_requests.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-hsw6/igt@i915_selftest@mock_requests.html

  * igt@kms_cursor_crc@pipe-a-cursor-suspend:
    - shard-kbl:          [DMESG-WARN][55] ([i915#180]) -> [PASS][56] +3 similar issues
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-kbl1/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy:
    - shard-hsw:          [FAIL][57] ([i915#96]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-hsw8/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-hsw6/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html

  * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic:
    - shard-glk:          [FAIL][59] ([i915#72]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-glk5/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-glk3/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-wc:
    - shard-snb:          [DMESG-WARN][61] ([i915#478]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-snb6/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-wc.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-snb4/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-render:
    - shard-tglb:         [FAIL][63] ([i915#49]) -> [PASS][64] +5 similar issues
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-tglb8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-render.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-tglb1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-render.html

  * igt@kms_psr@psr2_cursor_blt:
    - shard-iclb:         [SKIP][65] ([fdo#109441]) -> [PASS][66] +2 similar issues
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-iclb5/igt@kms_psr@psr2_cursor_blt.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html

  * igt@kms_setmode@basic:
    - shard-apl:          [FAIL][67] ([i915#31]) -> [PASS][68]
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-apl4/igt@kms_setmode@basic.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-apl1/igt@kms_setmode@basic.html

  * igt@prime_busy@after-bsd2:
    - shard-iclb:         [SKIP][69] ([fdo#109276]) -> [PASS][70] +15 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-iclb6/igt@prime_busy@after-bsd2.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-iclb1/igt@prime_busy@after-bsd2.html

  
#### Warnings ####

  * igt@gem_eio@kms:
    - shard-snb:          [DMESG-WARN][71] ([i915#444]) -> [INCOMPLETE][72] ([i915#82])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-snb5/igt@gem_eio@kms.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-snb5/igt@gem_eio@kms.html

  * igt@gem_tiled_blits@interruptible:
    - shard-hsw:          [FAIL][73] ([i915#818]) -> [FAIL][74] ([i915#694])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-hsw6/igt@gem_tiled_blits@interruptible.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-hsw7/igt@gem_tiled_blits@interruptible.html

  * igt@gem_tiled_blits@normal:
    - shard-hsw:          [FAIL][75] ([i915#694]) -> [FAIL][76] ([i915#818])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-hsw7/igt@gem_tiled_blits@normal.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-hsw2/igt@gem_tiled_blits@normal.html

  * igt@gem_userptr_blits@map-fixed-invalidate-busy-gup:
    - shard-snb:          [DMESG-WARN][77] ([fdo#110789] / [fdo#111870] / [i915#478]) -> [DMESG-WARN][78] ([fdo#111870] / [i915#478])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-snb2/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-snb1/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html

  * igt@gem_userptr_blits@sync-unmap-cycles:
    - shard-snb:          [DMESG-WARN][79] ([fdo#111870] / [i915#478]) -> [DMESG-WARN][80] ([fdo#110789] / [fdo#111870] / [i915#478])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7808/shard-snb6/igt@gem_userptr_blits@sync-unmap-cycles.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/shard-snb1/igt@gem_userptr_blits@sync-unmap-cycles.html

  
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#110789]: https://bugs.freedesktop.org/show_bug.cgi?id=110789
  [fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841
  [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
  [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
  [i915#140]: https://gitlab.freedesktop.org/drm/intel/issues/140
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
  [i915#331]: https://gitlab.freedesktop.org/drm/intel/issues/331
  [i915#413]: https://gitlab.freedesktop.org/drm/intel/issues/413
  [i915#444]: https://gitlab.freedesktop.org/drm/intel/issues/444
  [i915#478]: https://gitlab.freedesktop.org/drm/intel/issues/478
  [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
  [i915#58]: https://gitlab.freedesktop.org/drm/intel/issues/58
  [i915#61]: https://gitlab.freedesktop.org/drm/intel/issues/61
  [i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
  [i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
  [i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
  [i915#72]: https://gitlab.freedesktop.org/drm/intel/issues/72
  [i915#818]: https://gitlab.freedesktop.org/drm/intel/issues/818
  [i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82
  [i915#96]: https://gitlab.freedesktop.org/drm/intel/issues/96
  [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133


Participating hosts (10 -> 8)
------------------------------

  Missing    (2): pig-skl-6260u pig-glk-j5005 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5382 -> IGTPW_3987
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_7808: 2c0cac4ed28a1f343c5a7c5c3a1c2edb382ab4dd @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3987: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/index.html
  IGT_5382: 8dbe5ce61baa2d563d4dd7c56a018bb1e1077467 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3987/index.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 22+ messages in thread

* [igt-dev] ✓ Fi.CI.IGT: success for Distinguish particular engines during calculating nop calibration. (rev5)
  2020-01-16 13:55 [igt-dev] [PATCH i-g-t] Distinguish particular engines during calculating nop calibration Anna Karas
                   ` (9 preceding siblings ...)
  2020-01-26 14:06 ` [igt-dev] ✓ Fi.CI.IGT: success for Distinguish particular engines during calculating nop calibration. (rev4) Patchwork
@ 2020-01-26 17:40 ` Patchwork
  10 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2020-01-26 17:40 UTC (permalink / raw)
  To: Anna Karas; +Cc: igt-dev

== Series Details ==

Series: Distinguish particular engines during calculating nop calibration. (rev5)
URL   : https://patchwork.freedesktop.org/series/72113/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7809_full -> IGTPW_3989_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/index.html

Known issues
------------

  Here are the changes found in IGTPW_3989_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_isolation@rcs0-s3:
    - shard-kbl:          [PASS][1] -> [DMESG-WARN][2] ([i915#180]) +6 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-kbl2/igt@gem_ctx_isolation@rcs0-s3.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-kbl3/igt@gem_ctx_isolation@rcs0-s3.html

  * igt@gem_ctx_persistence@vcs1-mixed-process:
    - shard-iclb:         [PASS][3] -> [SKIP][4] ([fdo#109276] / [fdo#112080]) +2 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-iclb2/igt@gem_ctx_persistence@vcs1-mixed-process.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-iclb6/igt@gem_ctx_persistence@vcs1-mixed-process.html

  * igt@gem_exec_parallel@rcs0-fds:
    - shard-hsw:          [PASS][5] -> [INCOMPLETE][6] ([i915#61])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-hsw1/igt@gem_exec_parallel@rcs0-fds.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-hsw6/igt@gem_exec_parallel@rcs0-fds.html

  * igt@gem_exec_schedule@out-order-bsd2:
    - shard-iclb:         [PASS][7] -> [SKIP][8] ([fdo#109276]) +16 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-iclb4/igt@gem_exec_schedule@out-order-bsd2.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-iclb5/igt@gem_exec_schedule@out-order-bsd2.html

  * igt@gem_exec_schedule@pi-distinct-iova-bsd:
    - shard-iclb:         [PASS][9] -> [SKIP][10] ([i915#677]) +2 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-iclb7/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-iclb1/igt@gem_exec_schedule@pi-distinct-iova-bsd.html

  * igt@gem_exec_schedule@preempt-other-chain-bsd:
    - shard-iclb:         [PASS][11] -> [SKIP][12] ([fdo#112146]) +6 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-iclb8/igt@gem_exec_schedule@preempt-other-chain-bsd.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-iclb1/igt@gem_exec_schedule@preempt-other-chain-bsd.html

  * igt@gem_userptr_blits@sync-unmap:
    - shard-snb:          [PASS][13] -> [DMESG-WARN][14] ([fdo#111870] / [i915#478]) +2 similar issues
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-snb5/igt@gem_userptr_blits@sync-unmap.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-snb1/igt@gem_userptr_blits@sync-unmap.html

  * igt@i915_selftest@mock_requests:
    - shard-snb:          [PASS][15] -> [INCOMPLETE][16] ([i915#82])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-snb6/igt@i915_selftest@mock_requests.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-snb2/igt@i915_selftest@mock_requests.html
    - shard-apl:          [PASS][17] -> [INCOMPLETE][18] ([fdo#103927])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-apl6/igt@i915_selftest@mock_requests.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-apl3/igt@i915_selftest@mock_requests.html

  * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
    - shard-glk:          [PASS][19] -> [FAIL][20] ([i915#72])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-glk1/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-glk9/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-pgflip-blt:
    - shard-tglb:         [PASS][21] -> [FAIL][22] ([i915#49]) +3 similar issues
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-tglb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-pgflip-blt.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-tglb7/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-pgflip-blt.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
    - shard-iclb:         [PASS][23] -> [INCOMPLETE][24] ([i915#140] / [i915#250])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-iclb8/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-iclb2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
    - shard-apl:          [PASS][25] -> [DMESG-WARN][26] ([i915#180]) +1 similar issue
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-apl8/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html

  * igt@kms_plane_multiple@atomic-pipe-b-tiling-x:
    - shard-snb:          [PASS][27] -> [DMESG-WARN][28] ([i915#478])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-snb4/igt@kms_plane_multiple@atomic-pipe-b-tiling-x.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-snb2/igt@kms_plane_multiple@atomic-pipe-b-tiling-x.html

  * igt@kms_psr@psr2_cursor_blt:
    - shard-iclb:         [PASS][29] -> [SKIP][30] ([fdo#109441]) +2 similar issues
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-iclb3/igt@kms_psr@psr2_cursor_blt.html

  * igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend:
    - shard-kbl:          [PASS][31] -> [INCOMPLETE][32] ([fdo#103665]) +1 similar issue
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-kbl3/igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-kbl1/igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend.html

  * igt@perf_pmu@busy-vcs1:
    - shard-iclb:         [PASS][33] -> [SKIP][34] ([fdo#112080]) +11 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-iclb2/igt@perf_pmu@busy-vcs1.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-iclb6/igt@perf_pmu@busy-vcs1.html

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@vcs1-clean:
    - shard-iclb:         [SKIP][35] ([fdo#109276] / [fdo#112080]) -> [PASS][36] +2 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-iclb5/igt@gem_ctx_isolation@vcs1-clean.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-iclb1/igt@gem_ctx_isolation@vcs1-clean.html

  * igt@gem_ctx_persistence@vecs0-mixed-process:
    - shard-glk:          [FAIL][37] ([i915#679]) -> [PASS][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-glk4/igt@gem_ctx_persistence@vecs0-mixed-process.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-glk8/igt@gem_ctx_persistence@vecs0-mixed-process.html

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [SKIP][39] ([fdo#110854]) -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-iclb7/igt@gem_exec_balancer@smoke.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-iclb4/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_flush@basic-batch-kernel-default-cmd:
    - shard-glk:          [INCOMPLETE][41] ([i915#58] / [k.org#198133]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-glk9/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-glk7/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html

  * igt@gem_exec_schedule@in-order-bsd:
    - shard-iclb:         [SKIP][43] ([fdo#112146]) -> [PASS][44] +4 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-iclb1/igt@gem_exec_schedule@in-order-bsd.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-iclb5/igt@gem_exec_schedule@in-order-bsd.html

  * igt@gem_exec_schedule@independent-bsd2:
    - shard-iclb:         [SKIP][45] ([fdo#109276]) -> [PASS][46] +14 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-iclb6/igt@gem_exec_schedule@independent-bsd2.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-iclb2/igt@gem_exec_schedule@independent-bsd2.html

  * igt@gem_userptr_blits@map-fixed-invalidate-busy-gup:
    - shard-snb:          [DMESG-WARN][47] ([fdo#110789] / [fdo#111870] / [i915#478]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-snb6/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-snb5/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html

  * igt@gem_userptr_blits@sync-unmap-after-close:
    - shard-snb:          [DMESG-WARN][49] ([fdo#111870] / [i915#478]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-snb1/igt@gem_userptr_blits@sync-unmap-after-close.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-snb2/igt@gem_userptr_blits@sync-unmap-after-close.html

  * igt@gem_workarounds@suspend-resume-fd:
    - shard-kbl:          [DMESG-WARN][51] ([i915#180]) -> [PASS][52] +5 similar issues
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-kbl4/igt@gem_workarounds@suspend-resume-fd.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-kbl6/igt@gem_workarounds@suspend-resume-fd.html

  * igt@gen7_exec_parse@basic-offset:
    - shard-hsw:          [FAIL][53] ([i915#694]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-hsw1/igt@gen7_exec_parse@basic-offset.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-hsw7/igt@gen7_exec_parse@basic-offset.html

  * igt@i915_pm_rps@waitboost:
    - shard-iclb:         [FAIL][55] ([i915#413]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-iclb3/igt@i915_pm_rps@waitboost.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-iclb5/igt@i915_pm_rps@waitboost.html

  * igt@i915_selftest@mock_requests:
    - shard-tglb:         [INCOMPLETE][57] ([i915#472]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-tglb7/igt@i915_selftest@mock_requests.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-tglb3/igt@i915_selftest@mock_requests.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-glk:          [FAIL][59] ([i915#79]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-glk2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-glk6/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-apl:          [DMESG-WARN][61] ([i915#180]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-apl8/igt@kms_flip@flip-vs-suspend.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-apl3/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-wc:
    - shard-snb:          [DMESG-WARN][63] ([i915#478]) -> [PASS][64]
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-snb5/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-wc.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-snb1/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw:
    - shard-tglb:         [FAIL][65] ([i915#49]) -> [PASS][66] +6 similar issues
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-tglb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-tglb4/igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw.html

  * igt@kms_psr@psr2_cursor_render:
    - shard-iclb:         [SKIP][67] ([fdo#109441]) -> [PASS][68] +3 similar issues
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-iclb1/igt@kms_psr@psr2_cursor_render.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-iclb2/igt@kms_psr@psr2_cursor_render.html

  * igt@perf@oa-exponents:
    - shard-glk:          [FAIL][69] ([i915#84]) -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-glk8/igt@perf@oa-exponents.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-glk6/igt@perf@oa-exponents.html

  * igt@perf_pmu@busy-no-semaphores-vcs1:
    - shard-iclb:         [SKIP][71] ([fdo#112080]) -> [PASS][72] +10 similar issues
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-iclb6/igt@perf_pmu@busy-no-semaphores-vcs1.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-iclb1/igt@perf_pmu@busy-no-semaphores-vcs1.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv-switch:
    - shard-iclb:         [FAIL][73] ([IGT#28]) -> [SKIP][74] ([fdo#109276] / [fdo#112080])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-iclb2/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-iclb8/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html

  * igt@gem_tiled_blits@interruptible:
    - shard-hsw:          [FAIL][75] ([i915#818]) -> [FAIL][76] ([i915#694])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-hsw2/igt@gem_tiled_blits@interruptible.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-hsw1/igt@gem_tiled_blits@interruptible.html

  * igt@gem_tiled_blits@normal:
    - shard-hsw:          [FAIL][77] ([i915#694]) -> [FAIL][78] ([i915#818])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-hsw7/igt@gem_tiled_blits@normal.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-hsw2/igt@gem_tiled_blits@normal.html

  * igt@gen7_exec_parse@basic-allocation:
    - shard-hsw:          [FAIL][79] ([i915#694]) -> [INCOMPLETE][80] ([i915#61])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-hsw5/igt@gen7_exec_parse@basic-allocation.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-hsw7/igt@gen7_exec_parse@basic-allocation.html

  * igt@i915_pm_rpm@pm-caching:
    - shard-snb:          [SKIP][81] ([fdo#109271]) -> [INCOMPLETE][82] ([i915#82])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-snb1/igt@i915_pm_rpm@pm-caching.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-snb1/igt@i915_pm_rpm@pm-caching.html

  * igt@i915_selftest@live_blt:
    - shard-hsw:          [DMESG-FAIL][83] ([i915#563]) -> [DMESG-FAIL][84] ([i915#553] / [i915#725])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-hsw2/igt@i915_selftest@live_blt.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-hsw1/igt@i915_selftest@live_blt.html

  * igt@kms_dp_dsc@basic-dsc-enable-edp:
    - shard-iclb:         [DMESG-WARN][85] ([fdo#107724]) -> [SKIP][86] ([fdo#109349])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7809/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/shard-iclb4/igt@kms_dp_dsc@basic-dsc-enable-edp.html

  
  [IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#110789]: https://bugs.freedesktop.org/show_bug.cgi?id=110789
  [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
  [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
  [i915#140]: https://gitlab.freedesktop.org/drm/intel/issues/140
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#250]: https://gitlab.freedesktop.org/drm/intel/issues/250
  [i915#413]: https://gitlab.freedesktop.org/drm/intel/issues/413
  [i915#472]: https://gitlab.freedesktop.org/drm/intel/issues/472
  [i915#478]: https://gitlab.freedesktop.org/drm/intel/issues/478
  [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
  [i915#553]: https://gitlab.freedesktop.org/drm/intel/issues/553
  [i915#563]: https://gitlab.freedesktop.org/drm/intel/issues/563
  [i915#58]: https://gitlab.freedesktop.org/drm/intel/issues/58
  [i915#61]: https://gitlab.freedesktop.org/drm/intel/issues/61
  [i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
  [i915#679]: https://gitlab.freedesktop.org/drm/intel/issues/679
  [i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
  [i915#72]: https://gitlab.freedesktop.org/drm/intel/issues/72
  [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
  [i915#818]: https://gitlab.freedesktop.org/drm/intel/issues/818
  [i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82
  [i915#84]: https://gitlab.freedesktop.org/drm/intel/issues/84
  [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133


Participating hosts (10 -> 8)
------------------------------

  Missing    (2): pig-skl-6260u pig-glk-j5005 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5382 -> IGTPW_3989
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_7809: 861f608ce6e3c1a1ad320a5d18055601cff36e45 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3989: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/index.html
  IGT_5382: 8dbe5ce61baa2d563d4dd7c56a018bb1e1077467 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3989/index.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 22+ messages in thread

end of thread, other threads:[~2020-01-26 17:40 UTC | newest]

Thread overview: 22+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-01-16 13:55 [igt-dev] [PATCH i-g-t] Distinguish particular engines during calculating nop calibration Anna Karas
2020-01-16 15:06 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork
2020-01-16 17:38 ` [igt-dev] [PATCH i-g-t] " Tvrtko Ursulin
2020-01-19  8:28 ` [igt-dev] ✓ Fi.CI.IGT: success for " Patchwork
2020-01-21 15:04 ` [igt-dev] [PATCH i-g-t] " Anna Karas
2020-01-21 15:53   ` Chris Wilson
2020-01-23 14:45     ` Tvrtko Ursulin
2020-01-21 16:02   ` Tvrtko Ursulin
2020-01-24 11:18     ` [igt-dev] [PATCH i-g-t] gem_wsim: " Anna Karas
2020-01-24 11:35       ` Tvrtko Ursulin
2020-01-24 11:41         ` Chris Wilson
2020-01-24 11:45           ` Tvrtko Ursulin
2020-01-24 11:51             ` Chris Wilson
2020-01-24 12:05       ` Chris Wilson
2020-01-24 13:54       ` Anna Karas
2020-01-21 16:00 ` [igt-dev] ✓ Fi.CI.BAT: success for Distinguish particular engines during calculating nop calibration. (rev2) Patchwork
2020-01-22 18:10 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
2020-01-23 18:13 ` [igt-dev] ✓ Fi.CI.IGT: success " Patchwork
2020-01-24 12:03 ` [igt-dev] ✓ Fi.CI.BAT: success for Distinguish particular engines during calculating nop calibration. (rev4) Patchwork
2020-01-24 14:27 ` [igt-dev] ✓ Fi.CI.BAT: success for Distinguish particular engines during calculating nop calibration. (rev5) Patchwork
2020-01-26 14:06 ` [igt-dev] ✓ Fi.CI.IGT: success for Distinguish particular engines during calculating nop calibration. (rev4) Patchwork
2020-01-26 17:40 ` [igt-dev] ✓ Fi.CI.IGT: success for Distinguish particular engines during calculating nop calibration. (rev5) Patchwork

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