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* [tip: x86/urgent] x86/CPU/AMD: Ensure clearing of SME/SEV features is maintained
@ 2020-01-16 19:21 tip-bot2 for Tom Lendacky
  0 siblings, 0 replies; 2+ messages in thread
From: tip-bot2 for Tom Lendacky @ 2020-01-16 19:21 UTC (permalink / raw)
  To: linux-tip-commits; +Cc: Tom Lendacky, Borislav Petkov, x86, LKML

The following commit has been merged into the x86/urgent branch of tip:

Commit-ID:     c575dc89440e838ba27dff1a36b599dbbc8a0c18
Gitweb:        https://git.kernel.org/tip/c575dc89440e838ba27dff1a36b599dbbc8a0c18
Author:        Tom Lendacky <thomas.lendacky@amd.com>
AuthorDate:    Wed, 15 Jan 2020 16:05:16 -06:00
Committer:     Borislav Petkov <bp@suse.de>
CommitterDate: Thu, 16 Jan 2020 20:17:53 +01:00

x86/CPU/AMD: Ensure clearing of SME/SEV features is maintained

If the SME and SEV features are present via CPUID, but memory encryption
support is not enabled (MSR 0xC001_0010[23]), the feature flags are cleared
using clear_cpu_cap(). However, if get_cpu_cap() is later called, these
feature flags will be reset back to present, which is not desired.

Change from using clear_cpu_cap() to setup_clear_cpu_cap() so that the
clearing of the flags is maintained.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/226de90a703c3c0be5a49565047905ac4e94e8f3.1579125915.git.thomas.lendacky@amd.com
---
 arch/x86/kernel/cpu/amd.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 90f75e5..62c3027 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -615,9 +615,9 @@ static void early_detect_mem_encrypt(struct cpuinfo_x86 *c)
 		return;
 
 clear_all:
-		clear_cpu_cap(c, X86_FEATURE_SME);
+		setup_clear_cpu_cap(X86_FEATURE_SME);
 clear_sev:
-		clear_cpu_cap(c, X86_FEATURE_SEV);
+		setup_clear_cpu_cap(X86_FEATURE_SEV);
 	}
 }
 

^ permalink raw reply related	[flat|nested] 2+ messages in thread

* [tip: x86/urgent] x86/CPU/AMD: Ensure clearing of SME/SEV features is maintained
@ 2020-01-16 19:26 tip-bot2 for Tom Lendacky
  0 siblings, 0 replies; 2+ messages in thread
From: tip-bot2 for Tom Lendacky @ 2020-01-16 19:26 UTC (permalink / raw)
  To: linux-tip-commits; +Cc: Tom Lendacky, Borislav Petkov, stable, x86, LKML

The following commit has been merged into the x86/urgent branch of tip:

Commit-ID:     a006483b2f97af685f0e60f3a547c9ad4c9b9e94
Gitweb:        https://git.kernel.org/tip/a006483b2f97af685f0e60f3a547c9ad4c9b9e94
Author:        Tom Lendacky <thomas.lendacky@amd.com>
AuthorDate:    Wed, 15 Jan 2020 16:05:16 -06:00
Committer:     Borislav Petkov <bp@suse.de>
CommitterDate: Thu, 16 Jan 2020 20:23:20 +01:00

x86/CPU/AMD: Ensure clearing of SME/SEV features is maintained

If the SME and SEV features are present via CPUID, but memory encryption
support is not enabled (MSR 0xC001_0010[23]), the feature flags are cleared
using clear_cpu_cap(). However, if get_cpu_cap() is later called, these
feature flags will be reset back to present, which is not desired.

Change from using clear_cpu_cap() to setup_clear_cpu_cap() so that the
clearing of the flags is maintained.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: <stable@vger.kernel.org> # 4.16.x-
Link: https://lkml.kernel.org/r/226de90a703c3c0be5a49565047905ac4e94e8f3.1579125915.git.thomas.lendacky@amd.com
---
 arch/x86/kernel/cpu/amd.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 90f75e5..62c3027 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -615,9 +615,9 @@ static void early_detect_mem_encrypt(struct cpuinfo_x86 *c)
 		return;
 
 clear_all:
-		clear_cpu_cap(c, X86_FEATURE_SME);
+		setup_clear_cpu_cap(X86_FEATURE_SME);
 clear_sev:
-		clear_cpu_cap(c, X86_FEATURE_SEV);
+		setup_clear_cpu_cap(X86_FEATURE_SEV);
 	}
 }
 

^ permalink raw reply related	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2020-01-16 19:27 UTC | newest]

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2020-01-16 19:21 [tip: x86/urgent] x86/CPU/AMD: Ensure clearing of SME/SEV features is maintained tip-bot2 for Tom Lendacky
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