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* [Intel-gfx] [PATCH 1/3] drm/i915: move pipe, pch and vblank enable to encoders on DDI platforms
@ 2020-01-28 16:28 Jani Nikula
  2020-01-28 16:28 ` [Intel-gfx] [PATCH 2/3] drm/i915/dsi: Enable dsi transcoder as part of encoder->enable Jani Nikula
                   ` (4 more replies)
  0 siblings, 5 replies; 8+ messages in thread
From: Jani Nikula @ 2020-01-28 16:28 UTC (permalink / raw)
  To: intel-gfx; +Cc: Jani Nikula

To allow better flexibility for encoder specific code, push
intel_enable_pipe(), lpt_pch_enable() and intel_crtc_vblank_on() down to
the encoders from hsw_crtc_enable().

There's slight duplication, but also more clarity with the reduced
conditional statements.

Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/icl_dsi.c       | 10 ++++++++++
 drivers/gpu/drm/i915/display/intel_crt.c     |  6 ++++++
 drivers/gpu/drm/i915/display/intel_ddi.c     |  6 ++++++
 drivers/gpu/drm/i915/display/intel_display.c | 16 +++-------------
 drivers/gpu/drm/i915/display/intel_display.h |  3 +++
 drivers/gpu/drm/i915/display/vlv_dsi.c       | 11 +++++++++++
 6 files changed, 39 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 1186a5df057e..006a29115b02 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1110,6 +1110,15 @@ static void gen11_dsi_pre_enable(struct intel_encoder *encoder,
 	intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_BACKLIGHT_ON);
 }
 
+static void gen11_dsi_enable(struct intel_encoder *encoder,
+			     const struct intel_crtc_state *crtc_state,
+			     const struct drm_connector_state *conn_state)
+{
+	WARN_ON(crtc_state->has_pch_encoder);
+
+	intel_crtc_vblank_on(crtc_state);
+}
+
 static void gen11_dsi_disable_transcoder(struct intel_encoder *encoder)
 {
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
@@ -1727,6 +1736,7 @@ void icl_dsi_init(struct drm_i915_private *dev_priv)
 
 	encoder->pre_pll_enable = gen11_dsi_pre_pll_enable;
 	encoder->pre_enable = gen11_dsi_pre_enable;
+	encoder->enable = gen11_dsi_enable;
 	encoder->disable = gen11_dsi_disable;
 	encoder->post_disable = gen11_dsi_post_disable;
 	encoder->port = port;
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
index d250ddde0296..de3f9d1d927e 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -301,6 +301,12 @@ static void hsw_enable_crt(struct intel_encoder *encoder,
 
 	WARN_ON(!crtc_state->has_pch_encoder);
 
+	intel_enable_pipe(crtc_state);
+
+	lpt_pch_enable(crtc_state);
+
+	intel_crtc_vblank_on(crtc_state);
+
 	intel_crt_set_dpms(encoder, crtc_state, DRM_MODE_DPMS_ON);
 
 	intel_wait_for_vblank(dev_priv, pipe);
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index b1100950dd0d..5febd3a911fe 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3979,6 +3979,12 @@ static void intel_enable_ddi(struct intel_encoder *encoder,
 			     const struct intel_crtc_state *crtc_state,
 			     const struct drm_connector_state *conn_state)
 {
+	WARN_ON(crtc_state->has_pch_encoder);
+
+	intel_enable_pipe(crtc_state);
+
+	intel_crtc_vblank_on(crtc_state);
+
 	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
 		intel_enable_ddi_hdmi(encoder, crtc_state, conn_state);
 	else
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 7f94d5ca4207..0b7112a29966 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1811,7 +1811,7 @@ static u32 intel_crtc_max_vblank_count(const struct intel_crtc_state *crtc_state
 		return 0; /* Gen2 doesn't have a hardware frame counter */
 }
 
-static void intel_crtc_vblank_on(const struct intel_crtc_state *crtc_state)
+void intel_crtc_vblank_on(const struct intel_crtc_state *crtc_state)
 {
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 
@@ -1829,7 +1829,7 @@ void intel_crtc_vblank_off(const struct intel_crtc_state *crtc_state)
 	assert_vblank_disabled(&crtc->base);
 }
 
-static void intel_enable_pipe(const struct intel_crtc_state *new_crtc_state)
+void intel_enable_pipe(const struct intel_crtc_state *new_crtc_state)
 {
 	struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -5849,8 +5849,7 @@ static void ilk_pch_enable(const struct intel_atomic_state *state,
 	ilk_enable_pch_transcoder(crtc_state);
 }
 
-static void lpt_pch_enable(const struct intel_atomic_state *state,
-			   const struct intel_crtc_state *crtc_state)
+void lpt_pch_enable(const struct intel_crtc_state *crtc_state)
 {
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -7021,15 +7020,6 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
 	if (INTEL_GEN(dev_priv) >= 11)
 		icl_pipe_mbus_enable(crtc);
 
-	/* XXX: Do the pipe assertions at the right place for BXT DSI. */
-	if (!transcoder_is_dsi(cpu_transcoder))
-		intel_enable_pipe(new_crtc_state);
-
-	if (new_crtc_state->has_pch_encoder)
-		lpt_pch_enable(state, new_crtc_state);
-
-	intel_crtc_vblank_on(new_crtc_state);
-
 	intel_encoders_enable(state, crtc);
 
 	if (psl_clkgate_wa) {
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 028aab728514..6805e29002ee 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -486,6 +486,7 @@ enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port);
 bool is_trans_port_sync_mode(const struct intel_crtc_state *state);
 
 void intel_plane_destroy(struct drm_plane *plane);
+void intel_enable_pipe(const struct intel_crtc_state *new_crtc_state);
 void intel_disable_pipe(const struct intel_crtc_state *old_crtc_state);
 void i830_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe);
 void i830_disable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe);
@@ -495,6 +496,7 @@ int vlv_get_cck_clock(struct drm_i915_private *dev_priv,
 		      const char *name, u32 reg, int ref_freq);
 int vlv_get_cck_clock_hpll(struct drm_i915_private *dev_priv,
 			   const char *name, u32 reg);
+void lpt_pch_enable(const struct intel_crtc_state *crtc_state);
 void lpt_disable_pch_transcoder(struct drm_i915_private *dev_priv);
 void lpt_disable_iclkip(struct drm_i915_private *dev_priv);
 void intel_init_display_hooks(struct drm_i915_private *dev_priv);
@@ -520,6 +522,7 @@ enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv,
 int intel_get_pipe_from_crtc_id_ioctl(struct drm_device *dev, void *data,
 				      struct drm_file *file_priv);
 u32 intel_crtc_get_vblank_counter(struct intel_crtc *crtc);
+void intel_crtc_vblank_on(const struct intel_crtc_state *crtc_state);
 void intel_crtc_vblank_off(const struct intel_crtc_state *crtc_state);
 
 int ilk_get_lanes_required(int target_clock, int link_bw, int bpp);
diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c
index a101a4513c65..1ff935cb082a 100644
--- a/drivers/gpu/drm/i915/display/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
@@ -850,6 +850,15 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder,
 	intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_BACKLIGHT_ON);
 }
 
+static void bxt_dsi_enable(struct intel_encoder *encoder,
+			   const struct intel_crtc_state *crtc_state,
+			   const struct drm_connector_state *conn_state)
+{
+	WARN_ON(crtc_state->has_pch_encoder);
+
+	intel_crtc_vblank_on(crtc_state);
+}
+
 /*
  * DSI port disable has to be done after pipe and plane disable, so we do it in
  * the post_disable hook.
@@ -1863,6 +1872,8 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)
 
 	intel_encoder->compute_config = intel_dsi_compute_config;
 	intel_encoder->pre_enable = intel_dsi_pre_enable;
+	if (IS_GEN9_LP(dev_priv))
+		intel_encoder->enable = bxt_dsi_enable;
 	intel_encoder->disable = intel_dsi_disable;
 	intel_encoder->post_disable = intel_dsi_post_disable;
 	intel_encoder->get_hw_state = intel_dsi_get_hw_state;
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [Intel-gfx] [PATCH 2/3] drm/i915/dsi: Enable dsi transcoder as part of encoder->enable
  2020-01-28 16:28 [Intel-gfx] [PATCH 1/3] drm/i915: move pipe, pch and vblank enable to encoders on DDI platforms Jani Nikula
@ 2020-01-28 16:28 ` Jani Nikula
  2020-01-28 16:28 ` [Intel-gfx] [PATCH 3/3] drm/i915: move intel_dp_set_m_n() to encoder for DDI platforms Jani Nikula
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 8+ messages in thread
From: Jani Nikula @ 2020-01-28 16:28 UTC (permalink / raw)
  To: intel-gfx; +Cc: Jani Nikula

From: Vandita Kulkarni <vandita.kulkarni@intel.com>

Enable the dsi transcoder, panel and backlight as part of
encoder->enable and not encoder->pre_enable. We need to have pipe src
size, among other things, set before enabling the transcoder, to avoid
FIFO underruns and possibly other issues.

v2 by Jani:
- Rebase on the crtc enable sequence update

Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/icl_dsi.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 006a29115b02..3138fe90c492 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1086,8 +1086,6 @@ static void gen11_dsi_pre_enable(struct intel_encoder *encoder,
 				 const struct intel_crtc_state *pipe_config,
 				 const struct drm_connector_state *conn_state)
 {
-	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
-
 	/* step3b */
 	gen11_dsi_map_pll(encoder, pipe_config);
 
@@ -1101,21 +1099,23 @@ static void gen11_dsi_pre_enable(struct intel_encoder *encoder,
 
 	/* step6c: configure transcoder timings */
 	gen11_dsi_set_transcoder_timings(encoder, pipe_config);
-
-	/* step6d: enable dsi transcoder */
-	gen11_dsi_enable_transcoder(encoder);
-
-	/* step7: enable backlight */
-	intel_panel_enable_backlight(pipe_config, conn_state);
-	intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_BACKLIGHT_ON);
 }
 
 static void gen11_dsi_enable(struct intel_encoder *encoder,
 			     const struct intel_crtc_state *crtc_state,
 			     const struct drm_connector_state *conn_state)
 {
+	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
+
 	WARN_ON(crtc_state->has_pch_encoder);
 
+	/* step6d: enable dsi transcoder */
+	gen11_dsi_enable_transcoder(encoder);
+
+	/* step7: enable backlight */
+	intel_panel_enable_backlight(crtc_state, conn_state);
+	intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_BACKLIGHT_ON);
+
 	intel_crtc_vblank_on(crtc_state);
 }
 
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [Intel-gfx] [PATCH 3/3] drm/i915: move intel_dp_set_m_n() to encoder for DDI platforms
  2020-01-28 16:28 [Intel-gfx] [PATCH 1/3] drm/i915: move pipe, pch and vblank enable to encoders on DDI platforms Jani Nikula
  2020-01-28 16:28 ` [Intel-gfx] [PATCH 2/3] drm/i915/dsi: Enable dsi transcoder as part of encoder->enable Jani Nikula
@ 2020-01-28 16:28 ` Jani Nikula
  2020-01-31  8:43   ` Kulkarni, Vandita
  2020-01-29  0:26 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: move pipe, pch and vblank enable to encoders on " Patchwork
                   ` (2 subsequent siblings)
  4 siblings, 1 reply; 8+ messages in thread
From: Jani Nikula @ 2020-01-28 16:28 UTC (permalink / raw)
  To: intel-gfx; +Cc: Jani Nikula

intel_dp_set_m_n() has a clear place in the DDI DP specific pre-enable
hook.

Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c     | 2 ++
 drivers/gpu/drm/i915/display/intel_display.c | 3 ---
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 5febd3a911fe..2a773ab7ace9 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3573,6 +3573,8 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
 	 */
 	if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST))
 		intel_ddi_set_dp_msa(crtc_state, conn_state);
+
+	intel_dp_set_m_n(crtc_state, M1_N1);
 }
 
 static void intel_ddi_pre_enable_hdmi(struct intel_encoder *encoder,
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 0b7112a29966..a5f6d501c133 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -6957,9 +6957,6 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
 
 	intel_encoders_pre_enable(state, crtc);
 
-	if (intel_crtc_has_dp_encoder(new_crtc_state))
-		intel_dp_set_m_n(new_crtc_state, M1_N1);
-
 	if (!transcoder_is_dsi(cpu_transcoder))
 		intel_set_pipe_timings(new_crtc_state);
 
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: move pipe, pch and vblank enable to encoders on DDI platforms
  2020-01-28 16:28 [Intel-gfx] [PATCH 1/3] drm/i915: move pipe, pch and vblank enable to encoders on DDI platforms Jani Nikula
  2020-01-28 16:28 ` [Intel-gfx] [PATCH 2/3] drm/i915/dsi: Enable dsi transcoder as part of encoder->enable Jani Nikula
  2020-01-28 16:28 ` [Intel-gfx] [PATCH 3/3] drm/i915: move intel_dp_set_m_n() to encoder for DDI platforms Jani Nikula
@ 2020-01-29  0:26 ` Patchwork
  2020-01-29  8:14 ` [Intel-gfx] [PATCH 1/3] " Kulkarni, Vandita
  2020-01-30 20:33 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] " Patchwork
  4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2020-01-29  0:26 UTC (permalink / raw)
  To: Jani Nikula; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/3] drm/i915: move pipe, pch and vblank enable to encoders on DDI platforms
URL   : https://patchwork.freedesktop.org/series/72678/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7833 -> Patchwork_16302
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/index.html

Known issues
------------

  Here are the changes found in Patchwork_16302 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live_requests:
    - fi-icl-dsi:         [PASS][1] -> [INCOMPLETE][2] ([fdo#109644] / [fdo#110464] / [i915#140])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/fi-icl-dsi/igt@i915_selftest@live_requests.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/fi-icl-dsi/igt@i915_selftest@live_requests.html

  
#### Possible fixes ####

  * igt@gem_close_race@basic-threads:
    - fi-hsw-peppy:       [INCOMPLETE][3] ([i915#816]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/fi-hsw-peppy/igt@gem_close_race@basic-threads.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/fi-hsw-peppy/igt@gem_close_race@basic-threads.html

  * igt@gem_exec_suspend@basic-s3:
    - fi-icl-u2:          [FAIL][5] ([fdo#103375]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/fi-icl-u2/igt@gem_exec_suspend@basic-s3.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/fi-icl-u2/igt@gem_exec_suspend@basic-s3.html

  * igt@gem_exec_suspend@basic-s4-devices:
    - fi-icl-u2:          [FAIL][7] ([fdo#111550]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/fi-icl-u2/igt@gem_exec_suspend@basic-s4-devices.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/fi-icl-u2/igt@gem_exec_suspend@basic-s4-devices.html

  * igt@i915_selftest@live_blt:
    - fi-hsw-4770r:       [DMESG-FAIL][9] ([i915#563]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/fi-hsw-4770r/igt@i915_selftest@live_blt.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/fi-hsw-4770r/igt@i915_selftest@live_blt.html

  * igt@i915_selftest@live_gem_contexts:
    - fi-icl-guc:         [INCOMPLETE][11] ([i915#140]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/fi-icl-guc/igt@i915_selftest@live_gem_contexts.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/fi-icl-guc/igt@i915_selftest@live_gem_contexts.html

  * igt@kms_flip@basic-flip-vs-dpms:
    - fi-icl-dsi:         [DMESG-WARN][13] ([fdo#107724]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/fi-icl-dsi/igt@kms_flip@basic-flip-vs-dpms.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/fi-icl-dsi/igt@kms_flip@basic-flip-vs-dpms.html

  
#### Warnings ####

  * igt@gem_exec_parallel@contexts:
    - fi-byt-n2820:       [TIMEOUT][15] ([fdo#112271]) -> [FAIL][16] ([i915#694])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/fi-byt-n2820/igt@gem_exec_parallel@contexts.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/fi-byt-n2820/igt@gem_exec_parallel@contexts.html

  * igt@i915_pm_rpm@basic-rte:
    - fi-kbl-guc:         [FAIL][17] ([i915#579]) -> [SKIP][18] ([fdo#109271])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/fi-kbl-guc/igt@i915_pm_rpm@basic-rte.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/fi-kbl-guc/igt@i915_pm_rpm@basic-rte.html

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-icl-u2:          [FAIL][19] ([fdo#103375]) -> [DMESG-WARN][20] ([IGT#4] / [i915#263])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html

  
  [IGT#4]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/4
  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109644]: https://bugs.freedesktop.org/show_bug.cgi?id=109644
  [fdo#110464]: https://bugs.freedesktop.org/show_bug.cgi?id=110464
  [fdo#111550]: https://bugs.freedesktop.org/show_bug.cgi?id=111550
  [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
  [i915#140]: https://gitlab.freedesktop.org/drm/intel/issues/140
  [i915#263]: https://gitlab.freedesktop.org/drm/intel/issues/263
  [i915#563]: https://gitlab.freedesktop.org/drm/intel/issues/563
  [i915#579]: https://gitlab.freedesktop.org/drm/intel/issues/579
  [i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
  [i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816


Participating hosts (50 -> 38)
------------------------------

  Additional (1): fi-snb-2520m 
  Missing    (13): fi-ilk-m540 fi-bdw-samus fi-bdw-5557u fi-skl-guc fi-byt-squawks fi-bsw-cyan fi-kbl-7500u fi-ctg-p8600 fi-skl-lmem fi-kbl-7560u fi-byt-clapper fi-skl-6600u fi-snb-2600 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7833 -> Patchwork_16302

  CI-20190529: 20190529
  CI_DRM_7833: 8210f0f999e2d396a8611e0cabc2f6c6a52468de @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5394: 991fd07bcd7add7a5beca2c95b72a994e62fbb75 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_16302: 99145d289b105e6b63e4870c6ac3f3e6599c2d20 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

99145d289b10 drm/i915: move intel_dp_set_m_n() to encoder for DDI platforms
a1edb0906f47 drm/i915/dsi: Enable dsi transcoder as part of encoder->enable
9c511100cc42 drm/i915: move pipe, pch and vblank enable to encoders on DDI platforms

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [Intel-gfx] [PATCH 1/3] drm/i915: move pipe, pch and vblank enable to encoders on DDI platforms
  2020-01-28 16:28 [Intel-gfx] [PATCH 1/3] drm/i915: move pipe, pch and vblank enable to encoders on DDI platforms Jani Nikula
                   ` (2 preceding siblings ...)
  2020-01-29  0:26 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: move pipe, pch and vblank enable to encoders on " Patchwork
@ 2020-01-29  8:14 ` Kulkarni, Vandita
  2020-01-31  8:58   ` Jani Nikula
  2020-01-30 20:33 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] " Patchwork
  4 siblings, 1 reply; 8+ messages in thread
From: Kulkarni, Vandita @ 2020-01-29  8:14 UTC (permalink / raw)
  To: Nikula, Jani, intel-gfx; +Cc: Nikula, Jani

> -----Original Message-----
> From: Jani Nikula <jani.nikula@intel.com>
> Sent: Tuesday, January 28, 2020 9:59 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>; Kulkarni, Vandita
> <vandita.kulkarni@intel.com>; Ville Syrjala <ville.syrjala@linux.intel.com>
> Subject: [PATCH 1/3] drm/i915: move pipe, pch and vblank enable to encoders
> on DDI platforms
> 
> To allow better flexibility for encoder specific code, push intel_enable_pipe(),
> lpt_pch_enable() and intel_crtc_vblank_on() down to the encoders from
> hsw_crtc_enable().
> 
> There's slight duplication, but also more clarity with the reduced conditional
> statements.
> 
> Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Looks good to me.
Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com>

Thanks,
Vandita
> ---
>  drivers/gpu/drm/i915/display/icl_dsi.c       | 10 ++++++++++
>  drivers/gpu/drm/i915/display/intel_crt.c     |  6 ++++++
>  drivers/gpu/drm/i915/display/intel_ddi.c     |  6 ++++++
>  drivers/gpu/drm/i915/display/intel_display.c | 16 +++-------------
> drivers/gpu/drm/i915/display/intel_display.h |  3 +++
>  drivers/gpu/drm/i915/display/vlv_dsi.c       | 11 +++++++++++
>  6 files changed, 39 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
> b/drivers/gpu/drm/i915/display/icl_dsi.c
> index 1186a5df057e..006a29115b02 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -1110,6 +1110,15 @@ static void gen11_dsi_pre_enable(struct
> intel_encoder *encoder,
>  	intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_BACKLIGHT_ON);  }
> 
> +static void gen11_dsi_enable(struct intel_encoder *encoder,
> +			     const struct intel_crtc_state *crtc_state,
> +			     const struct drm_connector_state *conn_state) {
> +	WARN_ON(crtc_state->has_pch_encoder);
> +
> +	intel_crtc_vblank_on(crtc_state);
> +}
> +
>  static void gen11_dsi_disable_transcoder(struct intel_encoder *encoder)  {
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); @@
> -1727,6 +1736,7 @@ void icl_dsi_init(struct drm_i915_private *dev_priv)
> 
>  	encoder->pre_pll_enable = gen11_dsi_pre_pll_enable;
>  	encoder->pre_enable = gen11_dsi_pre_enable;
> +	encoder->enable = gen11_dsi_enable;
>  	encoder->disable = gen11_dsi_disable;
>  	encoder->post_disable = gen11_dsi_post_disable;
>  	encoder->port = port;
> diff --git a/drivers/gpu/drm/i915/display/intel_crt.c
> b/drivers/gpu/drm/i915/display/intel_crt.c
> index d250ddde0296..de3f9d1d927e 100644
> --- a/drivers/gpu/drm/i915/display/intel_crt.c
> +++ b/drivers/gpu/drm/i915/display/intel_crt.c
> @@ -301,6 +301,12 @@ static void hsw_enable_crt(struct intel_encoder
> *encoder,
> 
>  	WARN_ON(!crtc_state->has_pch_encoder);
> 
> +	intel_enable_pipe(crtc_state);
> +
> +	lpt_pch_enable(crtc_state);
> +
> +	intel_crtc_vblank_on(crtc_state);
> +
>  	intel_crt_set_dpms(encoder, crtc_state, DRM_MODE_DPMS_ON);
> 
>  	intel_wait_for_vblank(dev_priv, pipe); diff --git
> a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index b1100950dd0d..5febd3a911fe 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3979,6 +3979,12 @@ static void intel_enable_ddi(struct intel_encoder
> *encoder,
>  			     const struct intel_crtc_state *crtc_state,
>  			     const struct drm_connector_state *conn_state)  {
> +	WARN_ON(crtc_state->has_pch_encoder);
> +
> +	intel_enable_pipe(crtc_state);
> +
> +	intel_crtc_vblank_on(crtc_state);
> +
>  	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
>  		intel_enable_ddi_hdmi(encoder, crtc_state, conn_state);
>  	else
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 7f94d5ca4207..0b7112a29966 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -1811,7 +1811,7 @@ static u32 intel_crtc_max_vblank_count(const struct
> intel_crtc_state *crtc_state
>  		return 0; /* Gen2 doesn't have a hardware frame counter */  }
> 
> -static void intel_crtc_vblank_on(const struct intel_crtc_state *crtc_state)
> +void intel_crtc_vblank_on(const struct intel_crtc_state *crtc_state)
>  {
>  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> 
> @@ -1829,7 +1829,7 @@ void intel_crtc_vblank_off(const struct
> intel_crtc_state *crtc_state)
>  	assert_vblank_disabled(&crtc->base);
>  }
> 
> -static void intel_enable_pipe(const struct intel_crtc_state *new_crtc_state)
> +void intel_enable_pipe(const struct intel_crtc_state *new_crtc_state)
>  {
>  	struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); @@ -
> 5849,8 +5849,7 @@ static void ilk_pch_enable(const struct intel_atomic_state
> *state,
>  	ilk_enable_pch_transcoder(crtc_state);
>  }
> 
> -static void lpt_pch_enable(const struct intel_atomic_state *state,
> -			   const struct intel_crtc_state *crtc_state)
> +void lpt_pch_enable(const struct intel_crtc_state *crtc_state)
>  {
>  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); @@ -
> 7021,15 +7020,6 @@ static void hsw_crtc_enable(struct intel_atomic_state
> *state,
>  	if (INTEL_GEN(dev_priv) >= 11)
>  		icl_pipe_mbus_enable(crtc);
> 
> -	/* XXX: Do the pipe assertions at the right place for BXT DSI. */
> -	if (!transcoder_is_dsi(cpu_transcoder))
> -		intel_enable_pipe(new_crtc_state);
> -
> -	if (new_crtc_state->has_pch_encoder)
> -		lpt_pch_enable(state, new_crtc_state);
> -
> -	intel_crtc_vblank_on(new_crtc_state);
> -
>  	intel_encoders_enable(state, crtc);
> 
>  	if (psl_clkgate_wa) {
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> b/drivers/gpu/drm/i915/display/intel_display.h
> index 028aab728514..6805e29002ee 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -486,6 +486,7 @@ enum phy intel_port_to_phy(struct drm_i915_private
> *i915, enum port port);  bool is_trans_port_sync_mode(const struct
> intel_crtc_state *state);
> 
>  void intel_plane_destroy(struct drm_plane *plane);
> +void intel_enable_pipe(const struct intel_crtc_state *new_crtc_state);
>  void intel_disable_pipe(const struct intel_crtc_state *old_crtc_state);  void
> i830_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe);  void
> i830_disable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe); @@ -
> 495,6 +496,7 @@ int vlv_get_cck_clock(struct drm_i915_private *dev_priv,
>  		      const char *name, u32 reg, int ref_freq);  int
> vlv_get_cck_clock_hpll(struct drm_i915_private *dev_priv,
>  			   const char *name, u32 reg);
> +void lpt_pch_enable(const struct intel_crtc_state *crtc_state);
>  void lpt_disable_pch_transcoder(struct drm_i915_private *dev_priv);  void
> lpt_disable_iclkip(struct drm_i915_private *dev_priv);  void
> intel_init_display_hooks(struct drm_i915_private *dev_priv); @@ -520,6
> +522,7 @@ enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv,
> int intel_get_pipe_from_crtc_id_ioctl(struct drm_device *dev, void *data,
>  				      struct drm_file *file_priv);
>  u32 intel_crtc_get_vblank_counter(struct intel_crtc *crtc);
> +void intel_crtc_vblank_on(const struct intel_crtc_state *crtc_state);
>  void intel_crtc_vblank_off(const struct intel_crtc_state *crtc_state);
> 
>  int ilk_get_lanes_required(int target_clock, int link_bw, int bpp); diff --git
> a/drivers/gpu/drm/i915/display/vlv_dsi.c
> b/drivers/gpu/drm/i915/display/vlv_dsi.c
> index a101a4513c65..1ff935cb082a 100644
> --- a/drivers/gpu/drm/i915/display/vlv_dsi.c
> +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
> @@ -850,6 +850,15 @@ static void intel_dsi_pre_enable(struct intel_encoder
> *encoder,
>  	intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_BACKLIGHT_ON);  }
> 
> +static void bxt_dsi_enable(struct intel_encoder *encoder,
> +			   const struct intel_crtc_state *crtc_state,
> +			   const struct drm_connector_state *conn_state) {
> +	WARN_ON(crtc_state->has_pch_encoder);
> +
> +	intel_crtc_vblank_on(crtc_state);
> +}
> +
>  /*
>   * DSI port disable has to be done after pipe and plane disable, so we do it in
>   * the post_disable hook.
> @@ -1863,6 +1872,8 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)
> 
>  	intel_encoder->compute_config = intel_dsi_compute_config;
>  	intel_encoder->pre_enable = intel_dsi_pre_enable;
> +	if (IS_GEN9_LP(dev_priv))
> +		intel_encoder->enable = bxt_dsi_enable;
>  	intel_encoder->disable = intel_dsi_disable;
>  	intel_encoder->post_disable = intel_dsi_post_disable;
>  	intel_encoder->get_hw_state = intel_dsi_get_hw_state;
> --
> 2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread

* [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915: move pipe, pch and vblank enable to encoders on DDI platforms
  2020-01-28 16:28 [Intel-gfx] [PATCH 1/3] drm/i915: move pipe, pch and vblank enable to encoders on DDI platforms Jani Nikula
                   ` (3 preceding siblings ...)
  2020-01-29  8:14 ` [Intel-gfx] [PATCH 1/3] " Kulkarni, Vandita
@ 2020-01-30 20:33 ` Patchwork
  4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2020-01-30 20:33 UTC (permalink / raw)
  To: Jani Nikula; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/3] drm/i915: move pipe, pch and vblank enable to encoders on DDI platforms
URL   : https://patchwork.freedesktop.org/series/72678/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7833_full -> Patchwork_16302_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_16302_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_persistence@vcs1-mixed-process:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([fdo#109276] / [fdo#112080]) +2 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-iclb1/igt@gem_ctx_persistence@vcs1-mixed-process.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-iclb5/igt@gem_ctx_persistence@vcs1-mixed-process.html

  * igt@gem_ctx_shared@q-independent-default:
    - shard-glk:          [PASS][3] -> [FAIL][4] ([i915#935])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-glk8/igt@gem_ctx_shared@q-independent-default.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-glk3/igt@gem_ctx_shared@q-independent-default.html

  * igt@gem_exec_parallel@vcs1-fds:
    - shard-iclb:         [PASS][5] -> [SKIP][6] ([fdo#112080]) +9 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-iclb1/igt@gem_exec_parallel@vcs1-fds.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-iclb5/igt@gem_exec_parallel@vcs1-fds.html

  * igt@gem_exec_schedule@preempt-contexts-bsd2:
    - shard-iclb:         [PASS][7] -> [SKIP][8] ([fdo#109276]) +16 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-iclb1/igt@gem_exec_schedule@preempt-contexts-bsd2.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-iclb5/igt@gem_exec_schedule@preempt-contexts-bsd2.html

  * igt@gem_exec_schedule@preempt-queue-contexts-blt:
    - shard-glk:          [PASS][9] -> [FAIL][10] ([fdo#112118]) +1 similar issue
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-glk8/igt@gem_exec_schedule@preempt-queue-contexts-blt.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-glk3/igt@gem_exec_schedule@preempt-queue-contexts-blt.html

  * igt@gem_exec_schedule@reorder-wide-bsd:
    - shard-iclb:         [PASS][11] -> [SKIP][12] ([fdo#112146]) +2 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-iclb6/igt@gem_exec_schedule@reorder-wide-bsd.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-iclb2/igt@gem_exec_schedule@reorder-wide-bsd.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
    - shard-glk:          [PASS][13] -> [FAIL][14] ([i915#644])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-glk4/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-glk8/igt@gem_ppgtt@flink-and-close-vma-leak.html

  * igt@gem_softpin@noreloc-s3:
    - shard-apl:          [PASS][15] -> [DMESG-WARN][16] ([i915#180]) +1 similar issue
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-apl8/igt@gem_softpin@noreloc-s3.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-apl1/igt@gem_softpin@noreloc-s3.html

  * igt@gem_tiled_blits@interruptible:
    - shard-hsw:          [PASS][17] -> [FAIL][18] ([i915#818])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-hsw8/igt@gem_tiled_blits@interruptible.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-hsw2/igt@gem_tiled_blits@interruptible.html

  * igt@i915_pm_rps@reset:
    - shard-iclb:         [PASS][19] -> [FAIL][20] ([i915#413]) +1 similar issue
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-iclb5/igt@i915_pm_rps@reset.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-iclb8/igt@i915_pm_rps@reset.html

  * igt@kms_color@pipe-a-ctm-0-5:
    - shard-skl:          [PASS][21] -> [DMESG-WARN][22] ([i915#109])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-skl1/igt@kms_color@pipe-a-ctm-0-5.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-skl1/igt@kms_color@pipe-a-ctm-0-5.html

  * igt@kms_cursor_crc@pipe-c-cursor-64x64-offscreen:
    - shard-skl:          [PASS][23] -> [FAIL][24] ([i915#54])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-skl10/igt@kms_cursor_crc@pipe-c-cursor-64x64-offscreen.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-skl7/igt@kms_cursor_crc@pipe-c-cursor-64x64-offscreen.html

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-skl:          [PASS][25] -> [FAIL][26] ([i915#79]) +1 similar issue
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-skl6/igt@kms_flip@flip-vs-expired-vblank.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-skl6/igt@kms_flip@flip-vs-expired-vblank.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-kbl:          [PASS][27] -> [DMESG-WARN][28] ([i915#180]) +2 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-kbl6/igt@kms_flip@flip-vs-suspend.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-kbl4/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-skl:          [PASS][29] -> [INCOMPLETE][30] ([i915#221])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-skl6/igt@kms_flip@flip-vs-suspend-interruptible.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-skl6/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
    - shard-skl:          [PASS][31] -> [FAIL][32] ([fdo#108145])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-skl6/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-skl6/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html

  * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
    - shard-skl:          [PASS][33] -> [FAIL][34] ([fdo#108145] / [i915#265])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-skl6/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         [PASS][35] -> [SKIP][36] ([fdo#109642] / [fdo#111068])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-iclb7/igt@kms_psr2_su@frontbuffer.html

  * igt@kms_psr@no_drrs:
    - shard-iclb:         [PASS][37] -> [FAIL][38] ([i915#173])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-iclb4/igt@kms_psr@no_drrs.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-iclb1/igt@kms_psr@no_drrs.html

  * igt@kms_psr@psr2_sprite_render:
    - shard-iclb:         [PASS][39] -> [SKIP][40] ([fdo#109441]) +1 similar issue
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-iclb2/igt@kms_psr@psr2_sprite_render.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-iclb1/igt@kms_psr@psr2_sprite_render.html

  * igt@kms_vblank@pipe-a-wait-busy-hang:
    - shard-glk:          [PASS][41] -> [SKIP][42] ([fdo#109271])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-glk8/igt@kms_vblank@pipe-a-wait-busy-hang.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-glk3/igt@kms_vblank@pipe-a-wait-busy-hang.html

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@vcs1-clean:
    - shard-iclb:         [SKIP][43] ([fdo#109276] / [fdo#112080]) -> [PASS][44] +1 similar issue
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-iclb3/igt@gem_ctx_isolation@vcs1-clean.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-iclb4/igt@gem_ctx_isolation@vcs1-clean.html

  * {igt@gem_ctx_persistence@hostile}:
    - shard-iclb:         [FAIL][45] ([i915#1081]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-iclb4/igt@gem_ctx_persistence@hostile.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-iclb5/igt@gem_ctx_persistence@hostile.html

  * igt@gem_ctx_persistence@vcs0-queued:
    - shard-tglb:         [INCOMPLETE][47] ([i915#472]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-tglb6/igt@gem_ctx_persistence@vcs0-queued.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-tglb8/igt@gem_ctx_persistence@vcs0-queued.html

  * igt@gem_ctx_shared@q-promotion-vebox:
    - shard-kbl:          [FAIL][49] ([fdo#112118]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-kbl6/igt@gem_ctx_shared@q-promotion-vebox.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-kbl4/igt@gem_ctx_shared@q-promotion-vebox.html

  * igt@gem_exec_schedule@pi-userfault-bsd:
    - shard-iclb:         [SKIP][51] ([i915#677]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-iclb2/igt@gem_exec_schedule@pi-userfault-bsd.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-iclb5/igt@gem_exec_schedule@pi-userfault-bsd.html

  * igt@gem_exec_schedule@pi-userfault-bsd2:
    - shard-iclb:         [SKIP][53] ([fdo#109276]) -> [PASS][54] +12 similar issues
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-iclb6/igt@gem_exec_schedule@pi-userfault-bsd2.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-iclb2/igt@gem_exec_schedule@pi-userfault-bsd2.html

  * igt@gem_exec_schedule@preemptive-hang-bsd:
    - shard-iclb:         [SKIP][55] ([fdo#112146]) -> [PASS][56] +5 similar issues
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-iclb1/igt@gem_exec_schedule@preemptive-hang-bsd.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-iclb3/igt@gem_exec_schedule@preemptive-hang-bsd.html

  * igt@gem_partial_pwrite_pread@writes-after-reads:
    - shard-hsw:          [FAIL][57] ([i915#694]) -> [PASS][58] +1 similar issue
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-hsw2/igt@gem_partial_pwrite_pread@writes-after-reads.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-hsw8/igt@gem_partial_pwrite_pread@writes-after-reads.html

  * igt@gem_softpin@noreloc-s3:
    - shard-skl:          [INCOMPLETE][59] ([i915#69]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-skl5/igt@gem_softpin@noreloc-s3.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-skl9/igt@gem_softpin@noreloc-s3.html

  * igt@kms_color@pipe-a-ctm-0-75:
    - shard-skl:          [DMESG-WARN][61] ([i915#109]) -> [PASS][62] +1 similar issue
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-skl7/igt@kms_color@pipe-a-ctm-0-75.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-skl4/igt@kms_color@pipe-a-ctm-0-75.html

  * igt@kms_cursor_legacy@flip-vs-cursor-varying-size:
    - shard-tglb:         [FAIL][63] ([IGT#5]) -> [PASS][64]
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-tglb3/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-tglb3/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html
    - shard-skl:          [FAIL][65] ([IGT#5] / [i915#697]) -> [PASS][66]
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-skl4/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-skl7/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-glk:          [FAIL][67] ([i915#79]) -> [PASS][68] +1 similar issue
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-glk9/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-glk4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-panning-vs-hang-interruptible:
    - shard-iclb:         [SKIP][69] ([i915#1082]) -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-iclb4/igt@kms_flip@flip-vs-panning-vs-hang-interruptible.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-iclb5/igt@kms_flip@flip-vs-panning-vs-hang-interruptible.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu:
    - shard-tglb:         [SKIP][71] ([i915#668]) -> [PASS][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-tglb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-tglb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
    - shard-apl:          [DMESG-WARN][73] ([i915#180]) -> [PASS][74] +2 similar issues
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [FAIL][75] ([fdo#108145] / [i915#265]) -> [PASS][76]
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-skl5/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_psr@psr2_cursor_plane_onoff:
    - shard-iclb:         [SKIP][77] ([fdo#109441]) -> [PASS][78] +1 similar issue
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-iclb3/igt@kms_psr@psr2_cursor_plane_onoff.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-iclb2/igt@kms_psr@psr2_cursor_plane_onoff.html

  * igt@kms_setmode@basic:
    - shard-hsw:          [FAIL][79] ([i915#31]) -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-hsw8/igt@kms_setmode@basic.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-hsw5/igt@kms_setmode@basic.html

  * igt@kms_vblank@pipe-a-ts-continuation-suspend:
    - shard-kbl:          [DMESG-WARN][81] ([i915#180]) -> [PASS][82] +7 similar issues
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-kbl7/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-kbl2/igt@kms_vblank@pipe-a-ts-continuation-suspend.html

  * igt@perf_pmu@init-busy-vcs1:
    - shard-iclb:         [SKIP][83] ([fdo#112080]) -> [PASS][84] +8 similar issues
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-iclb3/igt@perf_pmu@init-busy-vcs1.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-iclb4/igt@perf_pmu@init-busy-vcs1.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv:
    - shard-iclb:         [FAIL][85] ([IGT#28]) -> [SKIP][86] ([fdo#109276] / [fdo#112080]) +1 similar issue
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-iclb1/igt@gem_ctx_isolation@vcs1-nonpriv.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-iclb3/igt@gem_ctx_isolation@vcs1-nonpriv.html

  * igt@gem_eio@in-flight-contexts-10ms:
    - shard-snb:          [INCOMPLETE][87] ([i915#82]) -> [TIMEOUT][88] ([fdo#111518] / [fdo#112271] / [i915#1084])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-snb6/igt@gem_eio@in-flight-contexts-10ms.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-snb6/igt@gem_eio@in-flight-contexts-10ms.html

  * igt@gem_eio@in-flight-contexts-1us:
    - shard-glk:          [TIMEOUT][89] ([fdo#112271]) -> [INCOMPLETE][90] ([CI#80] / [i915#58] / [k.org#198133])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-glk5/igt@gem_eio@in-flight-contexts-1us.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-glk9/igt@gem_eio@in-flight-contexts-1us.html

  * igt@gem_eio@kms:
    - shard-skl:          [INCOMPLETE][91] ([i915#198]) -> [INCOMPLETE][92] ([CI#80] / [i915#198])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-skl1/igt@gem_eio@kms.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-skl10/igt@gem_eio@kms.html

  * igt@i915_pm_dc@dc6-dpms:
    - shard-tglb:         [SKIP][93] ([i915#468]) -> [FAIL][94] ([i915#454])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-tglb2/igt@i915_pm_dc@dc6-dpms.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-tglb7/igt@i915_pm_dc@dc6-dpms.html

  * igt@i915_pm_rpm@fences-dpms:
    - shard-snb:          [SKIP][95] ([fdo#109271]) -> [INCOMPLETE][96] ([i915#82])
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-snb1/igt@i915_pm_rpm@fences-dpms.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-snb5/igt@i915_pm_rpm@fences-dpms.html

  * igt@perf@gen12-mi-rpc:
    - shard-tglb:         [TIMEOUT][97] ([fdo#112271] / [i915#472]) -> [TIMEOUT][98] ([fdo#112271] / [i915#1085] / [i915#472])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/shard-tglb6/igt@perf@gen12-mi-rpc.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/shard-tglb7/igt@perf@gen12-mi-rpc.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [CI#80]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/80
  [IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28
  [IGT#5]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/5
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111518]: https://bugs.freedesktop.org/show_bug.cgi?id=111518
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112118]: https://bugs.freedesktop.org/show_bug.cgi?id=112118
  [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
  [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
  [i915#1074]: https://gitlab.freedesktop.org/drm/intel/issues/1074
  [i915#1081]: https://gitlab.freedesktop.org/drm/intel/issues/1081
  [i915#1082]: https://gitlab.freedesktop.org/drm/intel/issues/1082
  [i915#1084]: https://gitlab.freedesktop.org/drm/intel/issues/1084
  [i915#1085]: https://gitlab.freedesktop.org/drm/intel/issues/1085
  [i915#109]: https://gitlab.freedesktop.org/drm/intel/issues/109
  [i915#173]: https://gitlab.freedesktop.org/drm/intel/issues/173
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
  [i915#221]: https://gitlab.freedesktop.org/drm/intel/issues/221
  [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
  [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
  [i915#413]: https://gitlab.freedesktop.org/drm/intel/issues/413
  [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
  [i915#468]: https://gitlab.freedesktop.org/drm/intel/issues/468
  [i915#472]: https://gitlab.freedesktop.org/drm/intel/issues/472
  [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
  [i915#58]: https://gitlab.freedesktop.org/drm/intel/issues/58
  [i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
  [i915#668]: https://gitlab.freedesktop.org/drm/intel/issues/668
  [i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
  [i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
  [i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
  [i915#697]: https://gitlab.freedesktop.org/drm/intel/issues/697
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
  [i915#818]: https://gitlab.freedesktop.org/drm/intel/issues/818
  [i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82
  [i915#935]: https://gitlab.freedesktop.org/drm/intel/issues/935
  [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133


Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7833 -> Patchwork_16302

  CI-20190529: 20190529
  CI_DRM_7833: 8210f0f999e2d396a8611e0cabc2f6c6a52468de @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5394: 991fd07bcd7add7a5beca2c95b72a994e62fbb75 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_16302: 99145d289b105e6b63e4870c6ac3f3e6599c2d20 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16302/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [Intel-gfx] [PATCH 3/3] drm/i915: move intel_dp_set_m_n() to encoder for DDI platforms
  2020-01-28 16:28 ` [Intel-gfx] [PATCH 3/3] drm/i915: move intel_dp_set_m_n() to encoder for DDI platforms Jani Nikula
@ 2020-01-31  8:43   ` Kulkarni, Vandita
  0 siblings, 0 replies; 8+ messages in thread
From: Kulkarni, Vandita @ 2020-01-31  8:43 UTC (permalink / raw)
  To: Nikula, Jani, intel-gfx; +Cc: Nikula, Jani

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani
> Nikula
> Sent: Tuesday, January 28, 2020 9:59 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>
> Subject: [Intel-gfx] [PATCH 3/3] drm/i915: move intel_dp_set_m_n() to encoder
> for DDI platforms
> 
> intel_dp_set_m_n() has a clear place in the DDI DP specific pre-enable hook.
> 
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Looks good to me.
Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com>

-Regards,
  Vandita

> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c     | 2 ++
>  drivers/gpu/drm/i915/display/intel_display.c | 3 ---
>  2 files changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 5febd3a911fe..2a773ab7ace9 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3573,6 +3573,8 @@ static void intel_ddi_pre_enable_dp(struct
> intel_encoder *encoder,
>  	 */
>  	if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST))
>  		intel_ddi_set_dp_msa(crtc_state, conn_state);
> +
> +	intel_dp_set_m_n(crtc_state, M1_N1);
>  }
> 
>  static void intel_ddi_pre_enable_hdmi(struct intel_encoder *encoder, diff --git
> a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 0b7112a29966..a5f6d501c133 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -6957,9 +6957,6 @@ static void hsw_crtc_enable(struct
> intel_atomic_state *state,
> 
>  	intel_encoders_pre_enable(state, crtc);
> 
> -	if (intel_crtc_has_dp_encoder(new_crtc_state))
> -		intel_dp_set_m_n(new_crtc_state, M1_N1);
> -
>  	if (!transcoder_is_dsi(cpu_transcoder))
>  		intel_set_pipe_timings(new_crtc_state);
> 
> --
> 2.20.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [Intel-gfx] [PATCH 1/3] drm/i915: move pipe, pch and vblank enable to encoders on DDI platforms
  2020-01-29  8:14 ` [Intel-gfx] [PATCH 1/3] " Kulkarni, Vandita
@ 2020-01-31  8:58   ` Jani Nikula
  0 siblings, 0 replies; 8+ messages in thread
From: Jani Nikula @ 2020-01-31  8:58 UTC (permalink / raw)
  To: Kulkarni, Vandita, intel-gfx

On Wed, 29 Jan 2020, "Kulkarni, Vandita" <vandita.kulkarni@intel.com> wrote:
>> -----Original Message-----
>> From: Jani Nikula <jani.nikula@intel.com>
>> Sent: Tuesday, January 28, 2020 9:59 PM
>> To: intel-gfx@lists.freedesktop.org
>> Cc: Nikula, Jani <jani.nikula@intel.com>; Kulkarni, Vandita
>> <vandita.kulkarni@intel.com>; Ville Syrjala <ville.syrjala@linux.intel.com>
>> Subject: [PATCH 1/3] drm/i915: move pipe, pch and vblank enable to encoders
>> on DDI platforms
>> 
>> To allow better flexibility for encoder specific code, push intel_enable_pipe(),
>> lpt_pch_enable() and intel_crtc_vblank_on() down to the encoders from
>> hsw_crtc_enable().
>> 
>> There's slight duplication, but also more clarity with the reduced conditional
>> statements.
>> 
>> Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
>> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>
> Looks good to me.
> Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com>

Pushed the series to dinq, thanks for the patch and review.

BR,
Jani.

>
> Thanks,
> Vandita
>> ---
>>  drivers/gpu/drm/i915/display/icl_dsi.c       | 10 ++++++++++
>>  drivers/gpu/drm/i915/display/intel_crt.c     |  6 ++++++
>>  drivers/gpu/drm/i915/display/intel_ddi.c     |  6 ++++++
>>  drivers/gpu/drm/i915/display/intel_display.c | 16 +++-------------
>> drivers/gpu/drm/i915/display/intel_display.h |  3 +++
>>  drivers/gpu/drm/i915/display/vlv_dsi.c       | 11 +++++++++++
>>  6 files changed, 39 insertions(+), 13 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
>> b/drivers/gpu/drm/i915/display/icl_dsi.c
>> index 1186a5df057e..006a29115b02 100644
>> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
>> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
>> @@ -1110,6 +1110,15 @@ static void gen11_dsi_pre_enable(struct
>> intel_encoder *encoder,
>>  	intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_BACKLIGHT_ON);  }
>> 
>> +static void gen11_dsi_enable(struct intel_encoder *encoder,
>> +			     const struct intel_crtc_state *crtc_state,
>> +			     const struct drm_connector_state *conn_state) {
>> +	WARN_ON(crtc_state->has_pch_encoder);
>> +
>> +	intel_crtc_vblank_on(crtc_state);
>> +}
>> +
>>  static void gen11_dsi_disable_transcoder(struct intel_encoder *encoder)  {
>>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); @@
>> -1727,6 +1736,7 @@ void icl_dsi_init(struct drm_i915_private *dev_priv)
>> 
>>  	encoder->pre_pll_enable = gen11_dsi_pre_pll_enable;
>>  	encoder->pre_enable = gen11_dsi_pre_enable;
>> +	encoder->enable = gen11_dsi_enable;
>>  	encoder->disable = gen11_dsi_disable;
>>  	encoder->post_disable = gen11_dsi_post_disable;
>>  	encoder->port = port;
>> diff --git a/drivers/gpu/drm/i915/display/intel_crt.c
>> b/drivers/gpu/drm/i915/display/intel_crt.c
>> index d250ddde0296..de3f9d1d927e 100644
>> --- a/drivers/gpu/drm/i915/display/intel_crt.c
>> +++ b/drivers/gpu/drm/i915/display/intel_crt.c
>> @@ -301,6 +301,12 @@ static void hsw_enable_crt(struct intel_encoder
>> *encoder,
>> 
>>  	WARN_ON(!crtc_state->has_pch_encoder);
>> 
>> +	intel_enable_pipe(crtc_state);
>> +
>> +	lpt_pch_enable(crtc_state);
>> +
>> +	intel_crtc_vblank_on(crtc_state);
>> +
>>  	intel_crt_set_dpms(encoder, crtc_state, DRM_MODE_DPMS_ON);
>> 
>>  	intel_wait_for_vblank(dev_priv, pipe); diff --git
>> a/drivers/gpu/drm/i915/display/intel_ddi.c
>> b/drivers/gpu/drm/i915/display/intel_ddi.c
>> index b1100950dd0d..5febd3a911fe 100644
>> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
>> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
>> @@ -3979,6 +3979,12 @@ static void intel_enable_ddi(struct intel_encoder
>> *encoder,
>>  			     const struct intel_crtc_state *crtc_state,
>>  			     const struct drm_connector_state *conn_state)  {
>> +	WARN_ON(crtc_state->has_pch_encoder);
>> +
>> +	intel_enable_pipe(crtc_state);
>> +
>> +	intel_crtc_vblank_on(crtc_state);
>> +
>>  	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
>>  		intel_enable_ddi_hdmi(encoder, crtc_state, conn_state);
>>  	else
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
>> b/drivers/gpu/drm/i915/display/intel_display.c
>> index 7f94d5ca4207..0b7112a29966 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>> @@ -1811,7 +1811,7 @@ static u32 intel_crtc_max_vblank_count(const struct
>> intel_crtc_state *crtc_state
>>  		return 0; /* Gen2 doesn't have a hardware frame counter */  }
>> 
>> -static void intel_crtc_vblank_on(const struct intel_crtc_state *crtc_state)
>> +void intel_crtc_vblank_on(const struct intel_crtc_state *crtc_state)
>>  {
>>  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>> 
>> @@ -1829,7 +1829,7 @@ void intel_crtc_vblank_off(const struct
>> intel_crtc_state *crtc_state)
>>  	assert_vblank_disabled(&crtc->base);
>>  }
>> 
>> -static void intel_enable_pipe(const struct intel_crtc_state *new_crtc_state)
>> +void intel_enable_pipe(const struct intel_crtc_state *new_crtc_state)
>>  {
>>  	struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
>>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); @@ -
>> 5849,8 +5849,7 @@ static void ilk_pch_enable(const struct intel_atomic_state
>> *state,
>>  	ilk_enable_pch_transcoder(crtc_state);
>>  }
>> 
>> -static void lpt_pch_enable(const struct intel_atomic_state *state,
>> -			   const struct intel_crtc_state *crtc_state)
>> +void lpt_pch_enable(const struct intel_crtc_state *crtc_state)
>>  {
>>  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); @@ -
>> 7021,15 +7020,6 @@ static void hsw_crtc_enable(struct intel_atomic_state
>> *state,
>>  	if (INTEL_GEN(dev_priv) >= 11)
>>  		icl_pipe_mbus_enable(crtc);
>> 
>> -	/* XXX: Do the pipe assertions at the right place for BXT DSI. */
>> -	if (!transcoder_is_dsi(cpu_transcoder))
>> -		intel_enable_pipe(new_crtc_state);
>> -
>> -	if (new_crtc_state->has_pch_encoder)
>> -		lpt_pch_enable(state, new_crtc_state);
>> -
>> -	intel_crtc_vblank_on(new_crtc_state);
>> -
>>  	intel_encoders_enable(state, crtc);
>> 
>>  	if (psl_clkgate_wa) {
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.h
>> b/drivers/gpu/drm/i915/display/intel_display.h
>> index 028aab728514..6805e29002ee 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display.h
>> @@ -486,6 +486,7 @@ enum phy intel_port_to_phy(struct drm_i915_private
>> *i915, enum port port);  bool is_trans_port_sync_mode(const struct
>> intel_crtc_state *state);
>> 
>>  void intel_plane_destroy(struct drm_plane *plane);
>> +void intel_enable_pipe(const struct intel_crtc_state *new_crtc_state);
>>  void intel_disable_pipe(const struct intel_crtc_state *old_crtc_state);  void
>> i830_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe);  void
>> i830_disable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe); @@ -
>> 495,6 +496,7 @@ int vlv_get_cck_clock(struct drm_i915_private *dev_priv,
>>  		      const char *name, u32 reg, int ref_freq);  int
>> vlv_get_cck_clock_hpll(struct drm_i915_private *dev_priv,
>>  			   const char *name, u32 reg);
>> +void lpt_pch_enable(const struct intel_crtc_state *crtc_state);
>>  void lpt_disable_pch_transcoder(struct drm_i915_private *dev_priv);  void
>> lpt_disable_iclkip(struct drm_i915_private *dev_priv);  void
>> intel_init_display_hooks(struct drm_i915_private *dev_priv); @@ -520,6
>> +522,7 @@ enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv,
>> int intel_get_pipe_from_crtc_id_ioctl(struct drm_device *dev, void *data,
>>  				      struct drm_file *file_priv);
>>  u32 intel_crtc_get_vblank_counter(struct intel_crtc *crtc);
>> +void intel_crtc_vblank_on(const struct intel_crtc_state *crtc_state);
>>  void intel_crtc_vblank_off(const struct intel_crtc_state *crtc_state);
>> 
>>  int ilk_get_lanes_required(int target_clock, int link_bw, int bpp); diff --git
>> a/drivers/gpu/drm/i915/display/vlv_dsi.c
>> b/drivers/gpu/drm/i915/display/vlv_dsi.c
>> index a101a4513c65..1ff935cb082a 100644
>> --- a/drivers/gpu/drm/i915/display/vlv_dsi.c
>> +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
>> @@ -850,6 +850,15 @@ static void intel_dsi_pre_enable(struct intel_encoder
>> *encoder,
>>  	intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_BACKLIGHT_ON);  }
>> 
>> +static void bxt_dsi_enable(struct intel_encoder *encoder,
>> +			   const struct intel_crtc_state *crtc_state,
>> +			   const struct drm_connector_state *conn_state) {
>> +	WARN_ON(crtc_state->has_pch_encoder);
>> +
>> +	intel_crtc_vblank_on(crtc_state);
>> +}
>> +
>>  /*
>>   * DSI port disable has to be done after pipe and plane disable, so we do it in
>>   * the post_disable hook.
>> @@ -1863,6 +1872,8 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)
>> 
>>  	intel_encoder->compute_config = intel_dsi_compute_config;
>>  	intel_encoder->pre_enable = intel_dsi_pre_enable;
>> +	if (IS_GEN9_LP(dev_priv))
>> +		intel_encoder->enable = bxt_dsi_enable;
>>  	intel_encoder->disable = intel_dsi_disable;
>>  	intel_encoder->post_disable = intel_dsi_post_disable;
>>  	intel_encoder->get_hw_state = intel_dsi_get_hw_state;
>> --
>> 2.20.1
>

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2020-01-31  8:58 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-01-28 16:28 [Intel-gfx] [PATCH 1/3] drm/i915: move pipe, pch and vblank enable to encoders on DDI platforms Jani Nikula
2020-01-28 16:28 ` [Intel-gfx] [PATCH 2/3] drm/i915/dsi: Enable dsi transcoder as part of encoder->enable Jani Nikula
2020-01-28 16:28 ` [Intel-gfx] [PATCH 3/3] drm/i915: move intel_dp_set_m_n() to encoder for DDI platforms Jani Nikula
2020-01-31  8:43   ` Kulkarni, Vandita
2020-01-29  0:26 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: move pipe, pch and vblank enable to encoders on " Patchwork
2020-01-29  8:14 ` [Intel-gfx] [PATCH 1/3] " Kulkarni, Vandita
2020-01-31  8:58   ` Jani Nikula
2020-01-30 20:33 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] " Patchwork

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