From: peng.fan@nxp.com
To: shawnguo@kernel.org, s.hauer@pengutronix.de, sboyd@kernel.org,
abel.vesa@nxp.com, aisheng.dong@nxp.com, leonard.crestez@nxp.com
Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com,
ping.bai@nxp.com, Anson.Huang@nxp.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
Peng Fan <peng.fan@nxp.com>
Subject: [PATCH 6/7] ARM: imx: imx7ulp: support HSRUN mode
Date: Tue, 4 Feb 2020 21:34:36 +0800 [thread overview]
Message-ID: <1580823277-13644-7-git-send-email-peng.fan@nxp.com> (raw)
In-Reply-To: <1580823277-13644-1-git-send-email-peng.fan@nxp.com>
From: Peng Fan <peng.fan@nxp.com>
Configure pmprot to let ARM core could run into HSRUN mode.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
arch/arm/mach-imx/pm-imx7ulp.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-imx/pm-imx7ulp.c b/arch/arm/mach-imx/pm-imx7ulp.c
index 7b2f7387e662..dc2bc6f2cadd 100644
--- a/arch/arm/mach-imx/pm-imx7ulp.c
+++ b/arch/arm/mach-imx/pm-imx7ulp.c
@@ -11,6 +11,7 @@
#include "common.h"
+#define SMC_PMPROT 0x8
#define SMC_PMCTRL 0x10
#define BP_PMCTRL_PSTOPO 16
#define PSTOPO_PSTOP3 0x3
@@ -25,6 +26,8 @@
#define BM_PMCTRL_RUNM (3 << BP_PMCTRL_RUNM)
#define BM_PMCTRL_STOPM (7 << BP_PMCTRL_STOPM)
+#define BM_PMPROT_AHSRUN BIT(7)
+
static void __iomem *smc1_base;
int imx7ulp_set_lpm(enum ulp_cpu_pwr_mode mode)
@@ -51,6 +54,7 @@ int imx7ulp_set_lpm(enum ulp_cpu_pwr_mode mode)
return -EINVAL;
}
+ writel_relaxed(BM_PMPROT_AHSRUN, smc1_base + SMC_PMPROT);
writel_relaxed(val, smc1_base + SMC_PMCTRL);
return 0;
--
2.16.4
WARNING: multiple messages have this Message-ID (diff)
From: peng.fan@nxp.com
To: shawnguo@kernel.org, s.hauer@pengutronix.de, sboyd@kernel.org,
abel.vesa@nxp.com, aisheng.dong@nxp.com, leonard.crestez@nxp.com
Cc: Peng Fan <peng.fan@nxp.com>,
ping.bai@nxp.com, Anson.Huang@nxp.com,
linux-kernel@vger.kernel.org, linux-imx@nxp.com,
kernel@pengutronix.de, festevam@gmail.com,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: [PATCH 6/7] ARM: imx: imx7ulp: support HSRUN mode
Date: Tue, 4 Feb 2020 21:34:36 +0800 [thread overview]
Message-ID: <1580823277-13644-7-git-send-email-peng.fan@nxp.com> (raw)
In-Reply-To: <1580823277-13644-1-git-send-email-peng.fan@nxp.com>
From: Peng Fan <peng.fan@nxp.com>
Configure pmprot to let ARM core could run into HSRUN mode.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
arch/arm/mach-imx/pm-imx7ulp.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-imx/pm-imx7ulp.c b/arch/arm/mach-imx/pm-imx7ulp.c
index 7b2f7387e662..dc2bc6f2cadd 100644
--- a/arch/arm/mach-imx/pm-imx7ulp.c
+++ b/arch/arm/mach-imx/pm-imx7ulp.c
@@ -11,6 +11,7 @@
#include "common.h"
+#define SMC_PMPROT 0x8
#define SMC_PMCTRL 0x10
#define BP_PMCTRL_PSTOPO 16
#define PSTOPO_PSTOP3 0x3
@@ -25,6 +26,8 @@
#define BM_PMCTRL_RUNM (3 << BP_PMCTRL_RUNM)
#define BM_PMCTRL_STOPM (7 << BP_PMCTRL_STOPM)
+#define BM_PMPROT_AHSRUN BIT(7)
+
static void __iomem *smc1_base;
int imx7ulp_set_lpm(enum ulp_cpu_pwr_mode mode)
@@ -51,6 +54,7 @@ int imx7ulp_set_lpm(enum ulp_cpu_pwr_mode mode)
return -EINVAL;
}
+ writel_relaxed(BM_PMPROT_AHSRUN, smc1_base + SMC_PMPROT);
writel_relaxed(val, smc1_base + SMC_PMCTRL);
return 0;
--
2.16.4
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next prev parent reply other threads:[~2020-02-04 13:41 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-04 13:34 [PATCH 0/7] ARM: imx: imx7ulp: add cpufreq support peng.fan
2020-02-04 13:34 ` peng.fan
2020-02-04 13:34 ` [PATCH 1/7] clk: imx: Fix division by zero warning on pfdv2 peng.fan
2020-02-04 13:34 ` peng.fan
2020-02-04 13:34 ` [PATCH 2/7] clk: imx: pfdv2: switch to use determine_rate peng.fan
2020-02-04 13:34 ` peng.fan
2020-02-04 13:34 ` [PATCH 3/7] clk: imx: pfdv2: determine best parent rate peng.fan
2020-02-04 13:34 ` peng.fan
2020-02-04 13:34 ` [PATCH 4/7] clk: imx: add imx_hw_clk_cpuv2 for i.MX7ULP peng.fan
2020-02-04 13:34 ` peng.fan
2020-02-10 22:38 ` Stephen Boyd
2020-02-10 22:38 ` Stephen Boyd
2020-02-11 1:24 ` Peng Fan
2020-02-11 1:24 ` Peng Fan
2020-02-04 13:34 ` [PATCH 5/7] clk: imx: imx7ulp: add IMX7ULP_CLK_ARM_FREQ clk peng.fan
2020-02-04 13:34 ` peng.fan
2020-02-04 13:34 ` peng.fan [this message]
2020-02-04 13:34 ` [PATCH 6/7] ARM: imx: imx7ulp: support HSRUN mode peng.fan
2020-02-04 13:50 ` Fabio Estevam
2020-02-04 13:50 ` Fabio Estevam
2020-02-05 2:59 ` Peng Fan
2020-02-05 2:59 ` Peng Fan
2020-02-04 13:34 ` [PATCH 7/7] ARM: imx: imx7ulp: create cpufreq device peng.fan
2020-02-04 13:34 ` peng.fan
2020-02-04 13:45 ` [PATCH 0/7] ARM: imx: imx7ulp: add cpufreq support Fabio Estevam
2020-02-04 13:45 ` Fabio Estevam
2020-02-05 3:07 ` Peng Fan
2020-02-05 3:07 ` Peng Fan
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