* [Intel-gfx] [PATCH v6 0/3] Add basic selftests for rc6
@ 2020-02-06 14:03 Andi Shyti
2020-02-06 14:04 ` [Intel-gfx] [PATCH v6 1/3] drm/i915/selftests: add busy " Andi Shyti
` (4 more replies)
0 siblings, 5 replies; 6+ messages in thread
From: Andi Shyti @ 2020-02-06 14:03 UTC (permalink / raw)
To: Intel GFX
From: Andi Shyti <andi.shyti@intel.com>
Hi,
unfortunately rc6 is still a mysterious system and not all tests
provide the expected results.
I split the three tests in three different patches in order to
have more flexibility in picking them.
Thanks Chris and Mika for the reviews,
Andi
Changelog:
* v5 -> v6:
- the tests are split in three different patches, nothing
else.
* v4 -> v5:
- added changes in v4 which I forgot to include
- a small renaming and refactoring suggested by Mika to
make clear the purpose of the test function. Now it's
called "is_rc6_active" in a question format (and I
believe Chris won't like my creativity) and it returns
true if rc6 is active and false otherwise. Thanks, Mika!
- fixed a couple of typos.
- dropped the live_rc6_basic test.
* v3 -> v4:
- just a small refactoring where test_rc6 becomes a
measure function while another test_rc6 checks the
return value from the measure.
* v2 -> v3:
- rebased on top of the latest drm-tip
- fixed exiting order in rc6_basic to avoid exiting
without releasing the pm reference
* v1 -> v2:
- some changes from Chris.
Andi Shyti (3):
drm/i915/selftests: add busy selftests for rc6
drm/i915/selftests: add threshold selftests for rc6
drm/i915/selftests: add basic on/off selftests for rc6
drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 3 +
drivers/gpu/drm/i915/gt/selftest_rc6.c | 216 +++++++++++++++++++++++
drivers/gpu/drm/i915/gt/selftest_rc6.h | 3 +
3 files changed, 222 insertions(+)
--
2.25.0
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^ permalink raw reply [flat|nested] 6+ messages in thread* [Intel-gfx] [PATCH v6 1/3] drm/i915/selftests: add busy selftests for rc6 2020-02-06 14:03 [Intel-gfx] [PATCH v6 0/3] Add basic selftests for rc6 Andi Shyti @ 2020-02-06 14:04 ` Andi Shyti 2020-02-06 14:04 ` [Intel-gfx] [PATCH v6 2/3] drm/i915/selftests: add threshold " Andi Shyti ` (3 subsequent siblings) 4 siblings, 0 replies; 6+ messages in thread From: Andi Shyti @ 2020-02-06 14:04 UTC (permalink / raw) To: Intel GFX From: Andi Shyti <andi.shyti@intel.com> live_rc6_busy keeps the gpu busy and then goes in idle; checks that we don't fall in rc6 when busy and that we do fall in rc6 when idling. The test is added as subtest of the bigger live_late_gt_pm selftest. The basic rc6 functionality is tested by checking the reference counter within the evaluation interval. Signed-off-by: Andi Shyti <andi.shyti@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 1 + drivers/gpu/drm/i915/gt/selftest_rc6.c | 112 +++++++++++++++++++++++ drivers/gpu/drm/i915/gt/selftest_rc6.h | 1 + 3 files changed, 114 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/selftest_gt_pm.c b/drivers/gpu/drm/i915/gt/selftest_gt_pm.c index 09ff8e4f88af..40562f5208ea 100644 --- a/drivers/gpu/drm/i915/gt/selftest_gt_pm.c +++ b/drivers/gpu/drm/i915/gt/selftest_gt_pm.c @@ -51,6 +51,7 @@ static int live_gt_resume(void *arg) int intel_gt_pm_live_selftests(struct drm_i915_private *i915) { static const struct i915_subtest tests[] = { + SUBTEST(live_rc6_busy), SUBTEST(live_rc6_manual), SUBTEST(live_gt_resume), }; diff --git a/drivers/gpu/drm/i915/gt/selftest_rc6.c b/drivers/gpu/drm/i915/gt/selftest_rc6.c index 5f7e2dcf5686..270e8d24036d 100644 --- a/drivers/gpu/drm/i915/gt/selftest_rc6.c +++ b/drivers/gpu/drm/i915/gt/selftest_rc6.c @@ -11,6 +11,7 @@ #include "selftest_rc6.h" #include "selftests/i915_random.h" +#include "selftests/igt_spinner.h" int live_rc6_manual(void *arg) { @@ -202,3 +203,114 @@ int live_rc6_ctx_wa(void *arg) kfree(engines); return err; } + +static u32 measure_rc6(struct intel_uncore *uncore, u32 interval) +{ + u32 ec1, ec2; + + ec1 = intel_uncore_read(uncore, GEN6_GT_GFX_RC6); + + /* + * It's not important to precisely wait the interval time. + * I'll wait at least twice the time in order to be sure + * that the counting happens in the reference counter. + */ + msleep(interval); + + ec2 = intel_uncore_read(uncore, GEN6_GT_GFX_RC6); + + pr_info("interval:%x [%dms], threshold:%x, rc6:%x\n", + intel_uncore_read(uncore, GEN6_RC_EVALUATION_INTERVAL), + interval, + intel_uncore_read(uncore, GEN6_RC6_THRESHOLD), + ec2 - ec1); + + /* paranoia? ec2 is always supposed to be bigger */ + return (ec2 >= ec1) ? ec2 - ec1 : 0; +} + +static bool is_rc6_active(struct intel_rc6 *rc6) +{ + struct intel_uncore *uncore = rc6_to_uncore(rc6); + intel_wakeref_t wakeref; + u32 interval; + + wakeref = intel_runtime_pm_get(uncore->rpm); + + interval = intel_uncore_read(uncore, GEN6_RC_EVALUATION_INTERVAL); + + /* + * the interval is stored in steps of 1.28us + */ + interval = div_u64(mul_u32_u32(interval, 128), + 100 * 1000); /* => milliseconds */ + + intel_runtime_pm_put(uncore->rpm, wakeref); + + return !!measure_rc6(uncore, 2 * interval); +} + +int live_rc6_busy(void *arg) +{ + struct intel_gt *gt = arg; + struct intel_rc6 *rc6 = >->rc6; + struct intel_engine_cs *engine; + struct igt_spinner spin; + intel_wakeref_t wakeref; + enum intel_engine_id id; + int err; + + if (!rc6->supported) + return 0; + + err = igt_spinner_init(&spin, gt); + if (err) + return err; + + wakeref = intel_runtime_pm_get(gt->uncore->rpm); + for_each_engine(engine, gt, id) { + struct i915_request *rq; + + rq = igt_spinner_create_request(&spin, + engine->kernel_context, + MI_NOOP); + if (IS_ERR(rq)) { + err = PTR_ERR(rq); + break; + } + + i915_request_get(rq); + i915_request_add(rq); + + igt_wait_for_spinner(&spin, rq); /* it's enough waiting */ + + /* gpu is busy, we shouldn't be in rc6 */ + if (is_rc6_active(rc6)) { + pr_err("%s: never busy enough for having a nap\n", + engine->name); + err = -EINVAL; + } + + igt_spinner_end(&spin); + if (i915_request_wait(rq, 0, HZ / 5) < 0) + err = -ETIME; + i915_request_put(rq); + if (err) + break; + + intel_gt_wait_for_idle(gt, HZ / 5); + intel_gt_pm_wait_for_idle(gt); + + /* gpu is idle, we should be in rc6 */ + if (!is_rc6_active(rc6)) { + pr_err("%s is idle but doesn't go in rc6\n", + engine->name); + err = -EINVAL; + break; + } + } + intel_runtime_pm_put(gt->uncore->rpm, wakeref); + + igt_spinner_fini(&spin); + return err; +} diff --git a/drivers/gpu/drm/i915/gt/selftest_rc6.h b/drivers/gpu/drm/i915/gt/selftest_rc6.h index 762fd442d7b2..75e05a8a1fda 100644 --- a/drivers/gpu/drm/i915/gt/selftest_rc6.h +++ b/drivers/gpu/drm/i915/gt/selftest_rc6.h @@ -7,6 +7,7 @@ #ifndef SELFTEST_RC6_H #define SELFTEST_RC6_H +int live_rc6_busy(void *arg); int live_rc6_ctx_wa(void *arg); int live_rc6_manual(void *arg); -- 2.25.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Intel-gfx] [PATCH v6 2/3] drm/i915/selftests: add threshold selftests for rc6 2020-02-06 14:03 [Intel-gfx] [PATCH v6 0/3] Add basic selftests for rc6 Andi Shyti 2020-02-06 14:04 ` [Intel-gfx] [PATCH v6 1/3] drm/i915/selftests: add busy " Andi Shyti @ 2020-02-06 14:04 ` Andi Shyti 2020-02-06 14:04 ` [Intel-gfx] [PATCH v6 3/3] drm/i915/selftests: add basic on/off " Andi Shyti ` (2 subsequent siblings) 4 siblings, 0 replies; 6+ messages in thread From: Andi Shyti @ 2020-02-06 14:04 UTC (permalink / raw) To: Intel GFX From: Andi Shyti <andi.shyti@intel.com> rc6 should not work when the evaluation interval is less than the threshold and should work otherwise. live_rc6_threshold tests such behavior The test is added as subtest of the bigger live_late_gt_pm selftest. Signed-off-by: Andi Shyti <andi.shyti@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 1 + drivers/gpu/drm/i915/gt/selftest_rc6.c | 67 ++++++++++++++++++++++++ drivers/gpu/drm/i915/gt/selftest_rc6.h | 1 + 3 files changed, 69 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/selftest_gt_pm.c b/drivers/gpu/drm/i915/gt/selftest_gt_pm.c index 40562f5208ea..d39a21a047de 100644 --- a/drivers/gpu/drm/i915/gt/selftest_gt_pm.c +++ b/drivers/gpu/drm/i915/gt/selftest_gt_pm.c @@ -53,6 +53,7 @@ int intel_gt_pm_live_selftests(struct drm_i915_private *i915) static const struct i915_subtest tests[] = { SUBTEST(live_rc6_busy), SUBTEST(live_rc6_manual), + SUBTEST(live_rc6_threshold), SUBTEST(live_gt_resume), }; diff --git a/drivers/gpu/drm/i915/gt/selftest_rc6.c b/drivers/gpu/drm/i915/gt/selftest_rc6.c index 270e8d24036d..7b5d476a8ad1 100644 --- a/drivers/gpu/drm/i915/gt/selftest_rc6.c +++ b/drivers/gpu/drm/i915/gt/selftest_rc6.c @@ -250,6 +250,73 @@ static bool is_rc6_active(struct intel_rc6 *rc6) return !!measure_rc6(uncore, 2 * interval); } +int live_rc6_threshold(void *arg) +{ + struct intel_gt *gt = arg; + struct intel_uncore *uncore = gt->uncore; + struct intel_rc6 *rc6 = >->rc6; + intel_wakeref_t wakeref; + u32 threshold, interval; + u32 t_orig, i_orig; + int err = 0; + + if (!rc6->manual) /* No interfering PCU! */ + return 0; + + wakeref = intel_runtime_pm_get(uncore->rpm); + + __intel_rc6_disable(rc6); /* stop before adjusting thresholds */ + + t_orig = intel_uncore_read(uncore, GEN6_RC6_THRESHOLD); + i_orig = intel_uncore_read(uncore, GEN6_RC_EVALUATION_INTERVAL); + + /* + * set the threshold to 50ms + * + * 50ms * 1000 = 50000us + * 50000 / (1.28 * 100) / 100 (we don't have floating point) + */ + threshold = 50 * 1000 / 128 * 100; + intel_uncore_write(uncore, GEN6_RC6_THRESHOLD, threshold); + + /* set interval indicatively to half the threshold */ + interval = threshold / 2; + intel_uncore_write(uncore, GEN6_RC_EVALUATION_INTERVAL, interval); + + intel_rc6_unpark(rc6); + + /* interval < threshold */ + if (is_rc6_active(rc6)) { + pr_err("i915 mismatch: rc6 with interval < threshold\n"); + err = -EINVAL; + } + + __intel_rc6_disable(rc6); + + /* set interval indicatively to twice the threshold */ + interval = threshold * 2; + intel_uncore_write(uncore, GEN6_RC_EVALUATION_INTERVAL, interval); + + intel_rc6_unpark(rc6); + + /* interval > threshold */ + if (!is_rc6_active(rc6)) { + pr_err("i915 mismatch: not in rc6 with interval > threshold\n"); + err = -EINVAL; + } + + __intel_rc6_disable(rc6); + + intel_uncore_write(uncore, GEN6_RC6_THRESHOLD, t_orig); + intel_uncore_write(uncore, GEN6_RC_EVALUATION_INTERVAL, i_orig); + + intel_rc6_park(rc6); + + intel_runtime_pm_put(uncore->rpm, wakeref); + + return err; +} + int live_rc6_busy(void *arg) { struct intel_gt *gt = arg; diff --git a/drivers/gpu/drm/i915/gt/selftest_rc6.h b/drivers/gpu/drm/i915/gt/selftest_rc6.h index 75e05a8a1fda..312894423dc2 100644 --- a/drivers/gpu/drm/i915/gt/selftest_rc6.h +++ b/drivers/gpu/drm/i915/gt/selftest_rc6.h @@ -10,5 +10,6 @@ int live_rc6_busy(void *arg); int live_rc6_ctx_wa(void *arg); int live_rc6_manual(void *arg); +int live_rc6_threshold(void *arg); #endif /* SELFTEST_RC6_H */ -- 2.25.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Intel-gfx] [PATCH v6 3/3] drm/i915/selftests: add basic on/off selftests for rc6 2020-02-06 14:03 [Intel-gfx] [PATCH v6 0/3] Add basic selftests for rc6 Andi Shyti 2020-02-06 14:04 ` [Intel-gfx] [PATCH v6 1/3] drm/i915/selftests: add busy " Andi Shyti 2020-02-06 14:04 ` [Intel-gfx] [PATCH v6 2/3] drm/i915/selftests: add threshold " Andi Shyti @ 2020-02-06 14:04 ` Andi Shyti 2020-02-06 14:14 ` [Intel-gfx] [PATCH v6 0/3] Add basic " Chris Wilson 2020-02-06 15:54 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork 4 siblings, 0 replies; 6+ messages in thread From: Andi Shyti @ 2020-02-06 14:04 UTC (permalink / raw) To: Intel GFX From: Andi Shyti <andi.shyti@intel.com> live_rc6_basic simply checks if rc6 works when it's enabled or stops when it's disabled. The test is added as subtest of the bigger live_late_gt_pm selftest. Signed-off-by: Andi Shyti <andi.shyti@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 1 + drivers/gpu/drm/i915/gt/selftest_rc6.c | 37 ++++++++++++++++++++++++ drivers/gpu/drm/i915/gt/selftest_rc6.h | 1 + 3 files changed, 39 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/selftest_gt_pm.c b/drivers/gpu/drm/i915/gt/selftest_gt_pm.c index d39a21a047de..2bbdc9235b45 100644 --- a/drivers/gpu/drm/i915/gt/selftest_gt_pm.c +++ b/drivers/gpu/drm/i915/gt/selftest_gt_pm.c @@ -51,6 +51,7 @@ static int live_gt_resume(void *arg) int intel_gt_pm_live_selftests(struct drm_i915_private *i915) { static const struct i915_subtest tests[] = { + SUBTEST(live_rc6_basic), SUBTEST(live_rc6_busy), SUBTEST(live_rc6_manual), SUBTEST(live_rc6_threshold), diff --git a/drivers/gpu/drm/i915/gt/selftest_rc6.c b/drivers/gpu/drm/i915/gt/selftest_rc6.c index 7b5d476a8ad1..9e84b860b70a 100644 --- a/drivers/gpu/drm/i915/gt/selftest_rc6.c +++ b/drivers/gpu/drm/i915/gt/selftest_rc6.c @@ -250,6 +250,43 @@ static bool is_rc6_active(struct intel_rc6 *rc6) return !!measure_rc6(uncore, 2 * interval); } +int live_rc6_basic(void *arg) +{ + struct intel_gt *gt = arg; + struct intel_rc6 *rc6 = >->rc6; + intel_wakeref_t wakeref; + int i, err = 0; + + if (!rc6->supported) + return 0; + + wakeref = intel_runtime_pm_get(gt->uncore->rpm); + + /* + * the two loops test rc6 both in case it's enabled + * and in the case it's disabled. It restores the prvious + * status + */ + for (i = 0; i < 2; i++) { + if (rc6->enabled ^ is_rc6_active(rc6)) { + err = -EINVAL; + + /* restore before leaving */ + if (!i) + goto exit; + } + + if (rc6->enabled) + intel_rc6_disable(>->rc6); + else + intel_rc6_enable(>->rc6); + } + +exit: + intel_runtime_pm_put(gt->uncore->rpm, wakeref); + return err; +} + int live_rc6_threshold(void *arg) { struct intel_gt *gt = arg; diff --git a/drivers/gpu/drm/i915/gt/selftest_rc6.h b/drivers/gpu/drm/i915/gt/selftest_rc6.h index 312894423dc2..38183f3558f3 100644 --- a/drivers/gpu/drm/i915/gt/selftest_rc6.h +++ b/drivers/gpu/drm/i915/gt/selftest_rc6.h @@ -7,6 +7,7 @@ #ifndef SELFTEST_RC6_H #define SELFTEST_RC6_H +int live_rc6_basic(void *arg); int live_rc6_busy(void *arg); int live_rc6_ctx_wa(void *arg); int live_rc6_manual(void *arg); -- 2.25.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [Intel-gfx] [PATCH v6 0/3] Add basic selftests for rc6 2020-02-06 14:03 [Intel-gfx] [PATCH v6 0/3] Add basic selftests for rc6 Andi Shyti ` (2 preceding siblings ...) 2020-02-06 14:04 ` [Intel-gfx] [PATCH v6 3/3] drm/i915/selftests: add basic on/off " Andi Shyti @ 2020-02-06 14:14 ` Chris Wilson 2020-02-06 15:54 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork 4 siblings, 0 replies; 6+ messages in thread From: Chris Wilson @ 2020-02-06 14:14 UTC (permalink / raw) To: Andi Shyti, Intel GFX Hmm, intel-gfx@ has taken exception to the last couple of sends. Odd. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for Add basic selftests for rc6 2020-02-06 14:03 [Intel-gfx] [PATCH v6 0/3] Add basic selftests for rc6 Andi Shyti ` (3 preceding siblings ...) 2020-02-06 14:14 ` [Intel-gfx] [PATCH v6 0/3] Add basic " Chris Wilson @ 2020-02-06 15:54 ` Patchwork 4 siblings, 0 replies; 6+ messages in thread From: Patchwork @ 2020-02-06 15:54 UTC (permalink / raw) To: Andi Shyti; +Cc: intel-gfx == Series Details == Series: Add basic selftests for rc6 URL : https://patchwork.freedesktop.org/series/73095/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7876 -> Patchwork_16459 ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with Patchwork_16459 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_16459, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/index.html Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_16459: ### IGT changes ### #### Possible regressions #### * igt@i915_selftest@live_gt_pm: - fi-cfl-8700k: [PASS][1] -> [DMESG-FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7876/fi-cfl-8700k/igt@i915_selftest@live_gt_pm.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/fi-cfl-8700k/igt@i915_selftest@live_gt_pm.html - fi-icl-u2: [PASS][3] -> [DMESG-FAIL][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7876/fi-icl-u2/igt@i915_selftest@live_gt_pm.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/fi-icl-u2/igt@i915_selftest@live_gt_pm.html - fi-cfl-8109u: [PASS][5] -> [DMESG-FAIL][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7876/fi-cfl-8109u/igt@i915_selftest@live_gt_pm.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/fi-cfl-8109u/igt@i915_selftest@live_gt_pm.html - fi-bsw-nick: [PASS][7] -> [DMESG-FAIL][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7876/fi-bsw-nick/igt@i915_selftest@live_gt_pm.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/fi-bsw-nick/igt@i915_selftest@live_gt_pm.html - fi-kbl-x1275: [PASS][9] -> [DMESG-FAIL][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7876/fi-kbl-x1275/igt@i915_selftest@live_gt_pm.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/fi-kbl-x1275/igt@i915_selftest@live_gt_pm.html - fi-kbl-guc: [PASS][11] -> [DMESG-FAIL][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7876/fi-kbl-guc/igt@i915_selftest@live_gt_pm.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/fi-kbl-guc/igt@i915_selftest@live_gt_pm.html - fi-skl-guc: [PASS][13] -> [DMESG-FAIL][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7876/fi-skl-guc/igt@i915_selftest@live_gt_pm.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/fi-skl-guc/igt@i915_selftest@live_gt_pm.html - fi-bdw-5557u: [PASS][15] -> [DMESG-FAIL][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7876/fi-bdw-5557u/igt@i915_selftest@live_gt_pm.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/fi-bdw-5557u/igt@i915_selftest@live_gt_pm.html - fi-snb-2600: NOTRUN -> [DMESG-FAIL][17] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/fi-snb-2600/igt@i915_selftest@live_gt_pm.html - fi-byt-n2820: [PASS][18] -> [DMESG-FAIL][19] [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7876/fi-byt-n2820/igt@i915_selftest@live_gt_pm.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/fi-byt-n2820/igt@i915_selftest@live_gt_pm.html - fi-skl-6700k2: NOTRUN -> [DMESG-FAIL][20] [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/fi-skl-6700k2/igt@i915_selftest@live_gt_pm.html - fi-skl-lmem: NOTRUN -> [DMESG-FAIL][21] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/fi-skl-lmem/igt@i915_selftest@live_gt_pm.html - fi-whl-u: [PASS][22] -> [DMESG-FAIL][23] [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7876/fi-whl-u/igt@i915_selftest@live_gt_pm.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/fi-whl-u/igt@i915_selftest@live_gt_pm.html - fi-skl-6770hq: [PASS][24] -> [DMESG-FAIL][25] [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7876/fi-skl-6770hq/igt@i915_selftest@live_gt_pm.html [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/fi-skl-6770hq/igt@i915_selftest@live_gt_pm.html - fi-cfl-guc: [PASS][26] -> [DMESG-FAIL][27] [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7876/fi-cfl-guc/igt@i915_selftest@live_gt_pm.html [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/fi-cfl-guc/igt@i915_selftest@live_gt_pm.html - fi-bxt-dsi: [PASS][28] -> [DMESG-FAIL][29] [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7876/fi-bxt-dsi/igt@i915_selftest@live_gt_pm.html [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/fi-bxt-dsi/igt@i915_selftest@live_gt_pm.html - fi-skl-6600u: NOTRUN -> [DMESG-FAIL][30] [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/fi-skl-6600u/igt@i915_selftest@live_gt_pm.html - fi-cml-u2: [PASS][31] -> [DMESG-FAIL][32] [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7876/fi-cml-u2/igt@i915_selftest@live_gt_pm.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/fi-cml-u2/igt@i915_selftest@live_gt_pm.html - fi-apl-guc: [PASS][33] -> [DMESG-FAIL][34] [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7876/fi-apl-guc/igt@i915_selftest@live_gt_pm.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/fi-apl-guc/igt@i915_selftest@live_gt_pm.html - fi-kbl-8809g: [PASS][35] -> [DMESG-FAIL][36] [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7876/fi-kbl-8809g/igt@i915_selftest@live_gt_pm.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/fi-kbl-8809g/igt@i915_selftest@live_gt_pm.html - fi-snb-2520m: NOTRUN -> [DMESG-FAIL][37] [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/fi-snb-2520m/igt@i915_selftest@live_gt_pm.html #### Suppressed #### The following results come from untrusted machines, tests, or statuses. They do not affect the overall result. * igt@i915_selftest@live_gt_pm: - {fi-ehl-1}: [DMESG-FAIL][38] ([i915#801]) -> [DMESG-FAIL][39] [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7876/fi-ehl-1/igt@i915_selftest@live_gt_pm.html [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/fi-ehl-1/igt@i915_selftest@live_gt_pm.html Known issues ------------ Here are the changes found in Patchwork_16459 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_close_race@basic-threads: - fi-byt-j1900: [PASS][40] -> [INCOMPLETE][41] ([i915#45]) [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7876/fi-byt-j1900/igt@gem_close_race@basic-threads.html [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/fi-byt-j1900/igt@gem_close_race@basic-threads.html * igt@i915_selftest@live_gem_contexts: - fi-byt-n2820: [PASS][42] -> [DMESG-FAIL][43] ([i915#1052]) [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7876/fi-byt-n2820/igt@i915_selftest@live_gem_contexts.html [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/fi-byt-n2820/igt@i915_selftest@live_gem_contexts.html #### Possible fixes #### * igt@i915_selftest@live_blt: - fi-bsw-nick: [INCOMPLETE][44] ([i915#392]) -> [PASS][45] [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7876/fi-bsw-nick/igt@i915_selftest@live_blt.html [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/fi-bsw-nick/igt@i915_selftest@live_blt.html #### Warnings #### * igt@gem_exec_parallel@contexts: - fi-byt-n2820: [FAIL][46] ([i915#694]) -> [TIMEOUT][47] ([fdo#112271]) [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7876/fi-byt-n2820/igt@gem_exec_parallel@contexts.html [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/fi-byt-n2820/igt@gem_exec_parallel@contexts.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271 [i915#1052]: https://gitlab.freedesktop.org/drm/intel/issues/1052 [i915#392]: https://gitlab.freedesktop.org/drm/intel/issues/392 [i915#45]: https://gitlab.freedesktop.org/drm/intel/issues/45 [i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694 [i915#801]: https://gitlab.freedesktop.org/drm/intel/issues/801 Participating hosts (41 -> 40) ------------------------------ Additional (8): fi-snb-2520m fi-gdg-551 fi-ivb-3770 fi-skl-6700k2 fi-skl-lmem fi-blb-e6850 fi-skl-6600u fi-snb-2600 Missing (9): fi-bsw-n3050 fi-hsw-peppy fi-glk-dsi fi-byt-squawks fi-kbl-7500u fi-bsw-kefka fi-byt-clapper fi-bdw-samus fi-kbl-r Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_7876 -> Patchwork_16459 CI-20190529: 20190529 CI_DRM_7876: 6ac39d9964f464065511d439afcf4da065ff96db @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5421: 40946e61f9c47e23fdf1fff8090fadee8a4d7d3b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_16459: 195fefa771276e3c80b3281a2a584dba77439042 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 195fefa77127 drm/i915/selftests: add basic on/off selftests for rc6 d1e55e82a439 drm/i915/selftests: add threshold selftests for rc6 d608976339e3 drm/i915/selftests: add busy selftests for rc6 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16459/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2020-02-06 15:54 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2020-02-06 14:03 [Intel-gfx] [PATCH v6 0/3] Add basic selftests for rc6 Andi Shyti 2020-02-06 14:04 ` [Intel-gfx] [PATCH v6 1/3] drm/i915/selftests: add busy " Andi Shyti 2020-02-06 14:04 ` [Intel-gfx] [PATCH v6 2/3] drm/i915/selftests: add threshold " Andi Shyti 2020-02-06 14:04 ` [Intel-gfx] [PATCH v6 3/3] drm/i915/selftests: add basic on/off " Andi Shyti 2020-02-06 14:14 ` [Intel-gfx] [PATCH v6 0/3] Add basic " Chris Wilson 2020-02-06 15:54 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
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