* [Intel-gfx] [PATCH 1/2] drm/i915: Disable tesselation clock gating on tgl A0
@ 2020-02-07 15:51 Mika Kuoppala
2020-02-07 15:51 ` [Intel-gfx] [PATCH 2/2] drm/i915: Implement Wa_1607090982 Mika Kuoppala
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Mika Kuoppala @ 2020-02-07 15:51 UTC (permalink / raw)
To: intel-gfx
Disable TEDOP clock gating flow by programming 0x20A0[19] = 1
References: HSDES#1407928979
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 +++++
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 61106129287f..4bbea781c142 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1352,6 +1352,11 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
wa_write_or(wal,
GEN7_SARCHKMD,
GEN7_DISABLE_SAMPLER_PREFETCH);
+
+ /* Wa_1407928979:tgl */
+ wa_write_or(wal,
+ GEN7_FF_THREAD_MODE,
+ GEN12_FF_TESSELATION_DOP_GATE_DISABLE);
}
if (IS_GEN(i915, 11)) {
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index dc206723f25e..b62029a10ed6 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3165,6 +3165,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
#define GEN7_FF_THREAD_MODE _MMIO(0x20a0)
#define GEN7_FF_SCHED_MASK 0x0077070
#define GEN8_FF_DS_REF_CNT_FFME (1 << 19)
+#define GEN12_FF_TESSELATION_DOP_GATE_DISABLE BIT(19)
#define GEN7_FF_TS_SCHED_HS1 (0x5 << 16)
#define GEN7_FF_TS_SCHED_HS0 (0x3 << 16)
#define GEN7_FF_TS_SCHED_LOAD_BALANCE (0x1 << 16)
--
2.17.1
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^ permalink raw reply related [flat|nested] 5+ messages in thread
* [Intel-gfx] [PATCH 2/2] drm/i915: Implement Wa_1607090982
2020-02-07 15:51 [Intel-gfx] [PATCH 1/2] drm/i915: Disable tesselation clock gating on tgl A0 Mika Kuoppala
@ 2020-02-07 15:51 ` Mika Kuoppala
2020-02-07 15:59 ` Chris Wilson
2020-02-07 16:00 ` [Intel-gfx] [PATCH 1/2] drm/i915: Disable tesselation clock gating on tgl A0 Chris Wilson
2020-02-07 20:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
2 siblings, 1 reply; 5+ messages in thread
From: Mika Kuoppala @ 2020-02-07 15:51 UTC (permalink / raw)
To: intel-gfx
SIMD16 with Src0 scalar might conflict between Src1/Src2 and cause
GRF read issue. Workaround this issue by setting bit 14 in 0xe4f4
which will disable early read/src swap of Src0.
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 +++
drivers/gpu/drm/i915/i915_reg.h | 2 ++
2 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 4bbea781c142..62b43f538a56 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -598,6 +598,9 @@ static void tgl_ctx_workarounds_init(struct intel_engine_cs *engine,
wa_add(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val,
IS_TGL_REVID(engine->i915, TGL_REVID_A0, TGL_REVID_A0) ? 0 :
FF_MODE2_TDS_TIMER_MASK);
+
+ /* Wa_1606931601:tgl */
+ WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2, GEN12_DISABLE_EARLY_READ);
}
static void
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index b62029a10ed6..590eff9f03d5 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9148,6 +9148,8 @@ enum {
#define DISABLE_EARLY_EOT (1 << 1)
#define GEN7_ROW_CHICKEN2 _MMIO(0xe4f4)
+#define GEN12_DISABLE_EARLY_READ BIT(14)
+
#define GEN7_ROW_CHICKEN2_GT2 _MMIO(0xf4f4)
#define DOP_CLOCK_GATING_DISABLE (1 << 0)
#define PUSH_CONSTANT_DEREF_DISABLE (1 << 8)
--
2.17.1
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^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915: Implement Wa_1607090982
2020-02-07 15:51 ` [Intel-gfx] [PATCH 2/2] drm/i915: Implement Wa_1607090982 Mika Kuoppala
@ 2020-02-07 15:59 ` Chris Wilson
0 siblings, 0 replies; 5+ messages in thread
From: Chris Wilson @ 2020-02-07 15:59 UTC (permalink / raw)
To: Mika Kuoppala, intel-gfx
Quoting Mika Kuoppala (2020-02-07 15:51:38)
> SIMD16 with Src0 scalar might conflict between Src1/Src2 and cause
> GRF read issue. Workaround this issue by setting bit 14 in 0xe4f4
> which will disable early read/src swap of Src0.
>
> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Found!
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915: Disable tesselation clock gating on tgl A0
2020-02-07 15:51 [Intel-gfx] [PATCH 1/2] drm/i915: Disable tesselation clock gating on tgl A0 Mika Kuoppala
2020-02-07 15:51 ` [Intel-gfx] [PATCH 2/2] drm/i915: Implement Wa_1607090982 Mika Kuoppala
@ 2020-02-07 16:00 ` Chris Wilson
2020-02-07 20:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
2 siblings, 0 replies; 5+ messages in thread
From: Chris Wilson @ 2020-02-07 16:00 UTC (permalink / raw)
To: Mika Kuoppala, intel-gfx
Quoting Mika Kuoppala (2020-02-07 15:51:37)
> Disable TEDOP clock gating flow by programming 0x20A0[19] = 1
>
> References: HSDES#1407928979
> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Disable tesselation clock gating on tgl A0
2020-02-07 15:51 [Intel-gfx] [PATCH 1/2] drm/i915: Disable tesselation clock gating on tgl A0 Mika Kuoppala
2020-02-07 15:51 ` [Intel-gfx] [PATCH 2/2] drm/i915: Implement Wa_1607090982 Mika Kuoppala
2020-02-07 16:00 ` [Intel-gfx] [PATCH 1/2] drm/i915: Disable tesselation clock gating on tgl A0 Chris Wilson
@ 2020-02-07 20:23 ` Patchwork
2 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2020-02-07 20:23 UTC (permalink / raw)
To: Mika Kuoppala; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Disable tesselation clock gating on tgl A0
URL : https://patchwork.freedesktop.org/series/73160/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7887 -> Patchwork_16486
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16486/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_16486:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_selftest@live_workarounds:
- {fi-tgl-u}: [PASS][1] -> [DMESG-FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7887/fi-tgl-u/igt@i915_selftest@live_workarounds.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16486/fi-tgl-u/igt@i915_selftest@live_workarounds.html
- {fi-tgl-dsi}: [PASS][3] -> [DMESG-FAIL][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7887/fi-tgl-dsi/igt@i915_selftest@live_workarounds.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16486/fi-tgl-dsi/igt@i915_selftest@live_workarounds.html
Known issues
------------
Here are the changes found in Patchwork_16486 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live_blt:
- fi-bsw-nick: [PASS][5] -> [INCOMPLETE][6] ([i915#392])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7887/fi-bsw-nick/igt@i915_selftest@live_blt.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16486/fi-bsw-nick/igt@i915_selftest@live_blt.html
- fi-hsw-4770r: [PASS][7] -> [DMESG-FAIL][8] ([i915#553] / [i915#725])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7887/fi-hsw-4770r/igt@i915_selftest@live_blt.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16486/fi-hsw-4770r/igt@i915_selftest@live_blt.html
- fi-hsw-4770: [PASS][9] -> [DMESG-FAIL][10] ([i915#553] / [i915#725])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7887/fi-hsw-4770/igt@i915_selftest@live_blt.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16486/fi-hsw-4770/igt@i915_selftest@live_blt.html
* igt@kms_flip@basic-flip-vs-dpms:
- fi-skl-6770hq: [PASS][11] -> [SKIP][12] ([fdo#109271]) +23 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7887/fi-skl-6770hq/igt@kms_flip@basic-flip-vs-dpms.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16486/fi-skl-6770hq/igt@kms_flip@basic-flip-vs-dpms.html
#### Possible fixes ####
* igt@gem_close_race@basic-threads:
- fi-byt-j1900: [INCOMPLETE][13] ([i915#45]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7887/fi-byt-j1900/igt@gem_close_race@basic-threads.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16486/fi-byt-j1900/igt@gem_close_race@basic-threads.html
* igt@i915_selftest@live_blt:
- fi-ivb-3770: [DMESG-FAIL][15] ([i915#725]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7887/fi-ivb-3770/igt@i915_selftest@live_blt.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16486/fi-ivb-3770/igt@i915_selftest@live_blt.html
* igt@i915_selftest@live_execlists:
- fi-icl-y: [DMESG-FAIL][17] ([fdo#108569]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7887/fi-icl-y/igt@i915_selftest@live_execlists.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16486/fi-icl-y/igt@i915_selftest@live_execlists.html
* igt@i915_selftest@live_gem_contexts:
- fi-cfl-8700k: [DMESG-FAIL][19] ([i915#623]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7887/fi-cfl-8700k/igt@i915_selftest@live_gem_contexts.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16486/fi-cfl-8700k/igt@i915_selftest@live_gem_contexts.html
- fi-byt-n2820: [DMESG-FAIL][21] ([i915#1052]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7887/fi-byt-n2820/igt@i915_selftest@live_gem_contexts.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16486/fi-byt-n2820/igt@i915_selftest@live_gem_contexts.html
* igt@i915_selftest@live_gtt:
- fi-icl-guc: [TIMEOUT][23] ([fdo#112271]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7887/fi-icl-guc/igt@i915_selftest@live_gtt.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16486/fi-icl-guc/igt@i915_selftest@live_gtt.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][25] ([fdo#111096] / [i915#323]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7887/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16486/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
#### Warnings ####
* igt@gem_exec_parallel@contexts:
- fi-byt-n2820: [TIMEOUT][27] ([fdo#112271]) -> [FAIL][28] ([i915#694])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7887/fi-byt-n2820/igt@gem_exec_parallel@contexts.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16486/fi-byt-n2820/igt@gem_exec_parallel@contexts.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- fi-skl-6770hq: [INCOMPLETE][29] ([i915#69]) -> [SKIP][30] ([fdo#109271])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7887/fi-skl-6770hq/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16486/fi-skl-6770hq/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
[fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
[i915#1052]: https://gitlab.freedesktop.org/drm/intel/issues/1052
[i915#323]: https://gitlab.freedesktop.org/drm/intel/issues/323
[i915#392]: https://gitlab.freedesktop.org/drm/intel/issues/392
[i915#45]: https://gitlab.freedesktop.org/drm/intel/issues/45
[i915#553]: https://gitlab.freedesktop.org/drm/intel/issues/553
[i915#623]: https://gitlab.freedesktop.org/drm/intel/issues/623
[i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
[i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
[i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
Participating hosts (48 -> 46)
------------------------------
Additional (5): fi-bdw-5557u fi-gdg-551 fi-skl-lmem fi-blb-e6850 fi-skl-6600u
Missing (7): fi-hsw-4200u fi-bsw-cyan fi-bwr-2160 fi-ctg-p8600 fi-kbl-7560u fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7887 -> Patchwork_16486
CI-20190529: 20190529
CI_DRM_7887: b147ed9753265260d6380604de01c3d646a323cd @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5425: ad4542ef1adbaa1227bc9ba9e24bb0e0f6dd408d @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16486: bded428c4781e97fc479aa5fcfb28e3582845b27 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
bded428c4781 drm/i915: Implement Wa_1607090982
9b1a0794fc5e drm/i915: Disable tesselation clock gating on tgl A0
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16486/index.html
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end of thread, other threads:[~2020-02-07 20:23 UTC | newest]
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-- links below jump to the message on this page --
2020-02-07 15:51 [Intel-gfx] [PATCH 1/2] drm/i915: Disable tesselation clock gating on tgl A0 Mika Kuoppala
2020-02-07 15:51 ` [Intel-gfx] [PATCH 2/2] drm/i915: Implement Wa_1607090982 Mika Kuoppala
2020-02-07 15:59 ` Chris Wilson
2020-02-07 16:00 ` [Intel-gfx] [PATCH 1/2] drm/i915: Disable tesselation clock gating on tgl A0 Chris Wilson
2020-02-07 20:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
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