* [Intel-gfx] [PATCH 1/2] drm/i915: Flush execution tasklets before checking request status
@ 2020-02-05 9:54 Chris Wilson
2020-02-05 9:54 ` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Yield the timeslice if caught waiting on a user semaphore Chris Wilson
` (3 more replies)
0 siblings, 4 replies; 6+ messages in thread
From: Chris Wilson @ 2020-02-05 9:54 UTC (permalink / raw)
To: intel-gfx
Rather than flushing the submission tasklets just before we sleep, flush
before we check the request status. Ideally this gives us a moment to
process the tasklets after sleeping just before we timeout.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_request.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index f56b046a32de..5c2bb0b9478b 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -1564,6 +1564,7 @@ long i915_request_wait(struct i915_request *rq,
goto out;
for (;;) {
+ intel_engine_flush_submission(rq->engine);
set_current_state(state);
if (i915_request_completed(rq)) {
@@ -1581,7 +1582,6 @@ long i915_request_wait(struct i915_request *rq,
break;
}
- intel_engine_flush_submission(rq->engine);
timeout = io_schedule_timeout(timeout);
}
__set_current_state(TASK_RUNNING);
--
2.25.0
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^ permalink raw reply related [flat|nested] 6+ messages in thread* [Intel-gfx] [PATCH 2/2] drm/i915/gt: Yield the timeslice if caught waiting on a user semaphore 2020-02-05 9:54 [Intel-gfx] [PATCH 1/2] drm/i915: Flush execution tasklets before checking request status Chris Wilson @ 2020-02-05 9:54 ` Chris Wilson 2020-02-05 14:04 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Flush execution tasklets before checking request status Patchwork ` (2 subsequent siblings) 3 siblings, 0 replies; 6+ messages in thread From: Chris Wilson @ 2020-02-05 9:54 UTC (permalink / raw) To: intel-gfx If we find ourselves waiting on a MI_SEMAPHORE_WAIT, either within the user batch or in our own preamble, the engine raises a GT_WAIT_ON_SEMAPHORE interrupt. We can unmask that interrupt and so respond to a semaphore wait by yielding the timeslice, if we have another context to yield to! The only real complication is that the interrupt is only generated for the start of the semaphore wait, and is asynchronous to our process_csb() -- that is, we may not have registered the timeslice before we see the interrupt. To ensure we don't miss a potential semaphore blocking forward progress (e.g. selftests/live_timeslice_preempt) we mark the interrupt and apply it to the next timeslice regardless of whether it was active at the time. v2: We use semaphores in preempt-to-busy, within the timeslicing implementation itself! Ergo, when we do insert a preemption due to an expired timeslice, the new context may start with the missed semaphore flagged by the retired context and be yielded, ad infinitum. To avoid this, read the context id at the time of the semaphore interrupt and only yield if that context is still active. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> --- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 6 +++ drivers/gpu/drm/i915/gt/intel_engine_types.h | 9 +++++ drivers/gpu/drm/i915/gt/intel_gt_irq.c | 13 ++++++- drivers/gpu/drm/i915/gt/intel_lrc.c | 40 +++++++++++++++++--- drivers/gpu/drm/i915/i915_reg.h | 1 + 5 files changed, 61 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c index b1c7b1ed6149..ef2f4ce1a86d 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c @@ -1297,6 +1297,12 @@ static void intel_engine_print_registers(struct intel_engine_cs *engine, if (engine->id == RENDER_CLASS && IS_GEN_RANGE(dev_priv, 4, 7)) drm_printf(m, "\tCCID: 0x%08x\n", ENGINE_READ(engine, CCID)); + if (HAS_EXECLISTS(dev_priv)) { + drm_printf(m, "\tEL_STAT_HI: 0x%08x\n", + ENGINE_READ(engine, RING_EXECLIST_STATUS_HI)); + drm_printf(m, "\tEL_STAT_LO: 0x%08x\n", + ENGINE_READ(engine, RING_EXECLIST_STATUS_LO)); + } drm_printf(m, "\tRING_START: 0x%08x\n", ENGINE_READ(engine, RING_START)); drm_printf(m, "\tRING_HEAD: 0x%08x\n", diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h index 45e36d963ea7..8eb7365b4230 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_types.h +++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h @@ -157,6 +157,15 @@ struct intel_engine_execlists { */ struct i915_priolist default_priolist; + /** + * @yield: CCID at the time of the last semaphore-wait interrupt. + * + * Instead of leaving a semaphore busy-spinning on an engine, we would + * like to switch to another ready context, i.e. yielding the semaphore + * timeslice. + */ + u32 yield; + /** * @error_interrupt: CS Master EIR * diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c index f0e7fd95165a..875bd0392ffc 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c +++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c @@ -39,6 +39,13 @@ cs_irq_handler(struct intel_engine_cs *engine, u32 iir) } } + if (iir & GT_WAIT_SEMAPHORE_INTERRUPT) { + WRITE_ONCE(engine->execlists.yield, + ENGINE_READ_FW(engine, RING_EXECLIST_STATUS_HI)); + if (del_timer(&engine->execlists.timer)) + tasklet = true; + } + if (iir & GT_CONTEXT_SWITCH_INTERRUPT) tasklet = true; @@ -228,7 +235,8 @@ void gen11_gt_irq_postinstall(struct intel_gt *gt) const u32 irqs = GT_CS_MASTER_ERROR_INTERRUPT | GT_RENDER_USER_INTERRUPT | - GT_CONTEXT_SWITCH_INTERRUPT; + GT_CONTEXT_SWITCH_INTERRUPT | + GT_WAIT_SEMAPHORE_INTERRUPT; struct intel_uncore *uncore = gt->uncore; const u32 dmask = irqs << 16 | irqs; const u32 smask = irqs << 16; @@ -366,7 +374,8 @@ void gen8_gt_irq_postinstall(struct intel_gt *gt) const u32 irqs = GT_CS_MASTER_ERROR_INTERRUPT | GT_RENDER_USER_INTERRUPT | - GT_CONTEXT_SWITCH_INTERRUPT; + GT_CONTEXT_SWITCH_INTERRUPT | + GT_WAIT_SEMAPHORE_INTERRUPT; const u32 gt_interrupts[] = { irqs << GEN8_RCS_IRQ_SHIFT | irqs << GEN8_BCS_IRQ_SHIFT, irqs << GEN8_VCS0_IRQ_SHIFT | irqs << GEN8_VCS1_IRQ_SHIFT, diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c index c196fb90c59f..dd21066d6987 100644 --- a/drivers/gpu/drm/i915/gt/intel_lrc.c +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c @@ -1671,7 +1671,8 @@ static void defer_active(struct intel_engine_cs *engine) } static bool -need_timeslice(struct intel_engine_cs *engine, const struct i915_request *rq) +need_timeslice(const struct intel_engine_cs *engine, + const struct i915_request *rq) { int hint; @@ -1687,6 +1688,31 @@ need_timeslice(struct intel_engine_cs *engine, const struct i915_request *rq) return hint >= effective_prio(rq); } +static bool +timeslice_yield(const struct intel_engine_execlists *el, + const struct i915_request *rq) +{ + /* + * Once bitten, forever smitten! + * + * If the active context ever busy-waited on a semaphore, + * it will be treated as a hog until the end of its timeslice. + * The HW only sends an interrupt on the first miss, and we + * do know if that semaphore has been signaled, or even if it + * is now stuck on another semaphore. Play safe, yield if it + * might be stuck -- it will be given a fresh timeslice in + * the near future. + */ + return upper_32_bits(rq->context->lrc_desc) == READ_ONCE(el->yield); +} + +static bool +timeslice_expired(const struct intel_engine_execlists *el, + const struct i915_request *rq) +{ + return timer_expired(&el->timer) || timeslice_yield(el, rq); +} + static int switch_prio(struct intel_engine_cs *engine, const struct i915_request *rq) { @@ -1702,8 +1728,7 @@ timeslice(const struct intel_engine_cs *engine) return READ_ONCE(engine->props.timeslice_duration_ms); } -static unsigned long -active_timeslice(const struct intel_engine_cs *engine) +static unsigned long active_timeslice(const struct intel_engine_cs *engine) { const struct i915_request *rq = *engine->execlists.active; @@ -1854,13 +1879,14 @@ static void execlists_dequeue(struct intel_engine_cs *engine) last->context->lrc_desc |= CTX_DESC_FORCE_RESTORE; last = NULL; } else if (need_timeslice(engine, last) && - timer_expired(&engine->execlists.timer)) { + timeslice_expired(execlists, last)) { ENGINE_TRACE(engine, - "expired last=%llx:%lld, prio=%d, hint=%d\n", + "expired last=%llx:%lld, prio=%d, hint=%d, yield?=%s\n", last->fence.context, last->fence.seqno, last->sched.attr.priority, - execlists->queue_priority_hint); + execlists->queue_priority_hint, + yesno(timeslice_yield(execlists, last))); ring_set_paused(engine, 1); defer_active(engine); @@ -2120,6 +2146,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine) } clear_ports(port + 1, last_port - port); + WRITE_ONCE(execlists->yield, -1); execlists_submit_ports(engine); set_preempt_timeout(engine); } else { @@ -4342,6 +4369,7 @@ logical_ring_default_irqs(struct intel_engine_cs *engine) engine->irq_enable_mask = GT_RENDER_USER_INTERRUPT << shift; engine->irq_keep_mask = GT_CONTEXT_SWITCH_INTERRUPT << shift; engine->irq_keep_mask |= GT_CS_MASTER_ERROR_INTERRUPT << shift; + engine->irq_keep_mask |= GT_WAIT_SEMAPHORE_INTERRUPT << shift; } static void rcs_submission_override(struct intel_engine_cs *engine) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 0bd431f6a011..900f34675e39 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -3090,6 +3090,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) #define GT_BSD_CS_ERROR_INTERRUPT (1 << 15) #define GT_BSD_USER_INTERRUPT (1 << 12) #define GT_RENDER_L3_PARITY_ERROR_INTERRUPT_S1 (1 << 11) /* hsw+; rsvd on snb, ivb, vlv */ +#define GT_WAIT_SEMAPHORE_INTERRUPT REG_BIT(11) /* bdw+ */ #define GT_CONTEXT_SWITCH_INTERRUPT (1 << 8) #define GT_RENDER_L3_PARITY_ERROR_INTERRUPT (1 << 5) /* !snb */ #define GT_RENDER_PIPECTL_NOTIFY_INTERRUPT (1 << 4) -- 2.25.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Flush execution tasklets before checking request status 2020-02-05 9:54 [Intel-gfx] [PATCH 1/2] drm/i915: Flush execution tasklets before checking request status Chris Wilson 2020-02-05 9:54 ` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Yield the timeslice if caught waiting on a user semaphore Chris Wilson @ 2020-02-05 14:04 ` Patchwork 2020-02-05 14:42 ` [Intel-gfx] [PATCH 1/2] " Mika Kuoppala 2020-02-07 23:36 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] " Patchwork 3 siblings, 0 replies; 6+ messages in thread From: Patchwork @ 2020-02-05 14:04 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx == Series Details == Series: series starting with [1/2] drm/i915: Flush execution tasklets before checking request status URL : https://patchwork.freedesktop.org/series/73013/ State : success == Summary == CI Bug Log - changes from CI_DRM_7869 -> Patchwork_16430 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/index.html Known issues ------------ Here are the changes found in Patchwork_16430 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_close_race@basic-threads: - fi-byt-j1900: [PASS][1] -> [INCOMPLETE][2] ([i915#45]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/fi-byt-j1900/igt@gem_close_race@basic-threads.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/fi-byt-j1900/igt@gem_close_race@basic-threads.html * igt@i915_selftest@live_execlists: - fi-icl-y: [PASS][3] -> [DMESG-FAIL][4] ([fdo#108569]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/fi-icl-y/igt@i915_selftest@live_execlists.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/fi-icl-y/igt@i915_selftest@live_execlists.html * igt@i915_selftest@live_gtt: - fi-hsw-4770: [PASS][5] -> [TIMEOUT][6] ([fdo#112271]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/fi-hsw-4770/igt@i915_selftest@live_gtt.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/fi-hsw-4770/igt@i915_selftest@live_gtt.html * igt@kms_addfb_basic@addfb25-x-tiled: - fi-tgl-y: [PASS][7] -> [DMESG-WARN][8] ([CI#94] / [i915#402]) +1 similar issue [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/fi-tgl-y/igt@kms_addfb_basic@addfb25-x-tiled.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/fi-tgl-y/igt@kms_addfb_basic@addfb25-x-tiled.html #### Possible fixes #### * igt@gem_exec_parallel@fds: - fi-icl-u3: [INCOMPLETE][9] -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/fi-icl-u3/igt@gem_exec_parallel@fds.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/fi-icl-u3/igt@gem_exec_parallel@fds.html * igt@i915_getparams_basic@basic-subslice-total: - fi-tgl-y: [DMESG-WARN][11] ([CI#94] / [i915#402]) -> [PASS][12] +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/fi-tgl-y/igt@i915_getparams_basic@basic-subslice-total.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/fi-tgl-y/igt@i915_getparams_basic@basic-subslice-total.html * igt@i915_module_load@reload: - fi-skl-6770hq: [DMESG-WARN][13] ([i915#92]) -> [PASS][14] +2 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/fi-skl-6770hq/igt@i915_module_load@reload.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/fi-skl-6770hq/igt@i915_module_load@reload.html * igt@i915_selftest@live_blt: - fi-bsw-nick: [INCOMPLETE][15] ([i915#392]) -> [PASS][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/fi-bsw-nick/igt@i915_selftest@live_blt.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/fi-bsw-nick/igt@i915_selftest@live_blt.html - fi-ivb-3770: [DMESG-FAIL][17] ([i915#725]) -> [PASS][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/fi-ivb-3770/igt@i915_selftest@live_blt.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/fi-ivb-3770/igt@i915_selftest@live_blt.html - fi-hsw-4770: [DMESG-FAIL][19] ([i915#553]) -> [PASS][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/fi-hsw-4770/igt@i915_selftest@live_blt.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/fi-hsw-4770/igt@i915_selftest@live_blt.html * igt@kms_chamelium@hdmi-crc-fast: - fi-kbl-7500u: [FAIL][21] ([fdo#109635] / [i915#217]) -> [PASS][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/fi-kbl-7500u/igt@kms_chamelium@hdmi-crc-fast.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/fi-kbl-7500u/igt@kms_chamelium@hdmi-crc-fast.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [FAIL][23] ([fdo#111096] / [i915#323]) -> [PASS][24] [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html * igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence: - fi-skl-6770hq: [SKIP][25] ([fdo#109271]) -> [PASS][26] +4 similar issues [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/fi-skl-6770hq/igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/fi-skl-6770hq/igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence.html * igt@kms_pipe_crc_basic@read-crc-pipe-c: - fi-skl-6770hq: [DMESG-WARN][27] ([i915#106] / [i915#188]) -> [PASS][28] [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/fi-skl-6770hq/igt@kms_pipe_crc_basic@read-crc-pipe-c.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/fi-skl-6770hq/igt@kms_pipe_crc_basic@read-crc-pipe-c.html [CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94 [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109635]: https://bugs.freedesktop.org/show_bug.cgi?id=109635 [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096 [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271 [i915#106]: https://gitlab.freedesktop.org/drm/intel/issues/106 [i915#188]: https://gitlab.freedesktop.org/drm/intel/issues/188 [i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217 [i915#323]: https://gitlab.freedesktop.org/drm/intel/issues/323 [i915#392]: https://gitlab.freedesktop.org/drm/intel/issues/392 [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402 [i915#45]: https://gitlab.freedesktop.org/drm/intel/issues/45 [i915#553]: https://gitlab.freedesktop.org/drm/intel/issues/553 [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725 [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92 Participating hosts (49 -> 45) ------------------------------ Additional (3): fi-kbl-7560u fi-gdg-551 fi-snb-2520m Missing (7): fi-bdw-5557u fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-kbl-8809g fi-byt-clapper fi-bdw-samus Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_7869 -> Patchwork_16430 CI-20190529: 20190529 CI_DRM_7869: db0579be255412f38a450c3c577f8d10f1195034 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5419: 44913a91e77434b03001bb9ea53216cd03c476e6 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_16430: a63da6be20f6df886621e1d44e42db73b7a1e1f0 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == a63da6be20f6 drm/i915/gt: Yield the timeslice if caught waiting on a user semaphore ae0d79fa11f9 drm/i915: Flush execution tasklets before checking request status == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915: Flush execution tasklets before checking request status 2020-02-05 9:54 [Intel-gfx] [PATCH 1/2] drm/i915: Flush execution tasklets before checking request status Chris Wilson 2020-02-05 9:54 ` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Yield the timeslice if caught waiting on a user semaphore Chris Wilson 2020-02-05 14:04 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Flush execution tasklets before checking request status Patchwork @ 2020-02-05 14:42 ` Mika Kuoppala 2020-02-05 15:36 ` Chris Wilson 2020-02-07 23:36 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] " Patchwork 3 siblings, 1 reply; 6+ messages in thread From: Mika Kuoppala @ 2020-02-05 14:42 UTC (permalink / raw) To: Chris Wilson, intel-gfx Chris Wilson <chris@chris-wilson.co.uk> writes: > Rather than flushing the submission tasklets just before we sleep, flush > before we check the request status. Ideally this gives us a moment to > process the tasklets after sleeping just before we timeout. Makes sense to check the possibly most recent state. Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > --- > drivers/gpu/drm/i915/i915_request.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c > index f56b046a32de..5c2bb0b9478b 100644 > --- a/drivers/gpu/drm/i915/i915_request.c > +++ b/drivers/gpu/drm/i915/i915_request.c > @@ -1564,6 +1564,7 @@ long i915_request_wait(struct i915_request *rq, > goto out; > > for (;;) { > + intel_engine_flush_submission(rq->engine); > set_current_state(state); > > if (i915_request_completed(rq)) { > @@ -1581,7 +1582,6 @@ long i915_request_wait(struct i915_request *rq, > break; > } > > - intel_engine_flush_submission(rq->engine); > timeout = io_schedule_timeout(timeout); > } > __set_current_state(TASK_RUNNING); > -- > 2.25.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915: Flush execution tasklets before checking request status 2020-02-05 14:42 ` [Intel-gfx] [PATCH 1/2] " Mika Kuoppala @ 2020-02-05 15:36 ` Chris Wilson 0 siblings, 0 replies; 6+ messages in thread From: Chris Wilson @ 2020-02-05 15:36 UTC (permalink / raw) To: Mika Kuoppala, intel-gfx Quoting Mika Kuoppala (2020-02-05 14:42:16) > Chris Wilson <chris@chris-wilson.co.uk> writes: > > > Rather than flushing the submission tasklets just before we sleep, flush > > before we check the request status. Ideally this gives us a moment to > > process the tasklets after sleeping just before we timeout. > > Makes sense to check the possibly most recent state. > > Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> I suppose I should mention a small counter argument is that by kicking ksoftirqd before checking completed, we may add a small amount of latency to the ready client. A compromise is to kick before timeout? -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Flush execution tasklets before checking request status 2020-02-05 9:54 [Intel-gfx] [PATCH 1/2] drm/i915: Flush execution tasklets before checking request status Chris Wilson ` (2 preceding siblings ...) 2020-02-05 14:42 ` [Intel-gfx] [PATCH 1/2] " Mika Kuoppala @ 2020-02-07 23:36 ` Patchwork 3 siblings, 0 replies; 6+ messages in thread From: Patchwork @ 2020-02-07 23:36 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx == Series Details == Series: series starting with [1/2] drm/i915: Flush execution tasklets before checking request status URL : https://patchwork.freedesktop.org/series/73013/ State : success == Summary == CI Bug Log - changes from CI_DRM_7869_full -> Patchwork_16430_full ==================================================== Summary ------- **SUCCESS** No regressions found. Known issues ------------ Here are the changes found in Patchwork_16430_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_ctx_exec@basic-nohangcheck: - shard-glk: [PASS][1] -> [INCOMPLETE][2] ([i915#58] / [k.org#198133]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-glk1/igt@gem_ctx_exec@basic-nohangcheck.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-glk3/igt@gem_ctx_exec@basic-nohangcheck.html - shard-skl: [PASS][3] -> [INCOMPLETE][4] ([i915#667]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-skl4/igt@gem_ctx_exec@basic-nohangcheck.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-skl3/igt@gem_ctx_exec@basic-nohangcheck.html * igt@gem_eio@in-flight-suspend: - shard-apl: [PASS][5] -> [DMESG-WARN][6] ([i915#180]) +2 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-apl3/igt@gem_eio@in-flight-suspend.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-apl1/igt@gem_eio@in-flight-suspend.html * igt@gem_exec_balancer@smoke: - shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#110854]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-iclb4/igt@gem_exec_balancer@smoke.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-iclb6/igt@gem_exec_balancer@smoke.html * igt@gem_exec_schedule@deep-bsd: - shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#112146]) +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-iclb5/igt@gem_exec_schedule@deep-bsd.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-iclb4/igt@gem_exec_schedule@deep-bsd.html * igt@gem_exec_schedule@fifo-bsd1: - shard-iclb: [PASS][11] -> [SKIP][12] ([fdo#109276]) +16 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-iclb2/igt@gem_exec_schedule@fifo-bsd1.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-iclb8/igt@gem_exec_schedule@fifo-bsd1.html * igt@gem_exec_schedule@pi-common-bsd: - shard-iclb: [PASS][13] -> [SKIP][14] ([i915#677]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-iclb8/igt@gem_exec_schedule@pi-common-bsd.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-iclb4/igt@gem_exec_schedule@pi-common-bsd.html * igt@gem_softpin@noreloc-s3: - shard-kbl: [PASS][15] -> [DMESG-WARN][16] ([i915#180]) +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-kbl3/igt@gem_softpin@noreloc-s3.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-kbl4/igt@gem_softpin@noreloc-s3.html * igt@i915_pm_dc@dc6-dpms: - shard-iclb: [PASS][17] -> [FAIL][18] ([i915#454]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-iclb2/igt@i915_pm_dc@dc6-dpms.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html * igt@kms_cursor_legacy@long-nonblocking-modeset-vs-cursor-atomic: - shard-skl: [PASS][19] -> [DMESG-WARN][20] ([i915#88]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-skl9/igt@kms_cursor_legacy@long-nonblocking-modeset-vs-cursor-atomic.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-skl8/igt@kms_cursor_legacy@long-nonblocking-modeset-vs-cursor-atomic.html * igt@kms_flip@2x-flip-vs-expired-vblank: - shard-glk: [PASS][21] -> [FAIL][22] ([i915#79]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-glk8/igt@kms_flip@2x-flip-vs-expired-vblank.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-glk6/igt@kms_flip@2x-flip-vs-expired-vblank.html * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: - shard-skl: [PASS][23] -> [FAIL][24] ([fdo#108145]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-skl3/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html * igt@kms_plane_lowres@pipe-a-tiling-x: - shard-glk: [PASS][25] -> [FAIL][26] ([i915#899]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-glk9/igt@kms_plane_lowres@pipe-a-tiling-x.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-glk1/igt@kms_plane_lowres@pipe-a-tiling-x.html * igt@kms_psr@no_drrs: - shard-iclb: [PASS][27] -> [FAIL][28] ([i915#173]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-iclb2/igt@kms_psr@no_drrs.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-iclb1/igt@kms_psr@no_drrs.html * igt@kms_psr@psr2_cursor_render: - shard-iclb: [PASS][29] -> [SKIP][30] ([fdo#109441]) +2 similar issues [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-iclb2/igt@kms_psr@psr2_cursor_render.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-iclb3/igt@kms_psr@psr2_cursor_render.html * igt@perf_pmu@init-busy-vcs1: - shard-iclb: [PASS][31] -> [SKIP][32] ([fdo#112080]) +13 similar issues [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-iclb2/igt@perf_pmu@init-busy-vcs1.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-iclb8/igt@perf_pmu@init-busy-vcs1.html #### Possible fixes #### * igt@gem_ctx_exec@basic-nohangcheck: - shard-iclb: [INCOMPLETE][33] -> [PASS][34] [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-iclb2/igt@gem_ctx_exec@basic-nohangcheck.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-iclb2/igt@gem_ctx_exec@basic-nohangcheck.html - shard-apl: [INCOMPLETE][35] ([fdo#103927]) -> [PASS][36] [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-apl6/igt@gem_ctx_exec@basic-nohangcheck.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-apl6/igt@gem_ctx_exec@basic-nohangcheck.html * igt@gem_exec_parallel@vcs1: - shard-iclb: [SKIP][37] ([fdo#112080]) -> [PASS][38] +5 similar issues [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-iclb5/igt@gem_exec_parallel@vcs1.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-iclb1/igt@gem_exec_parallel@vcs1.html * igt@gem_exec_schedule@pi-userfault-bsd: - shard-iclb: [SKIP][39] ([i915#677]) -> [PASS][40] [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-iclb2/igt@gem_exec_schedule@pi-userfault-bsd.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-iclb3/igt@gem_exec_schedule@pi-userfault-bsd.html * igt@gem_exec_schedule@reorder-wide-bsd: - shard-iclb: [SKIP][41] ([fdo#112146]) -> [PASS][42] +8 similar issues [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-iclb1/igt@gem_exec_schedule@reorder-wide-bsd.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-iclb3/igt@gem_exec_schedule@reorder-wide-bsd.html * igt@gem_partial_pwrite_pread@write: - shard-hsw: [FAIL][43] ([i915#694]) -> [PASS][44] +1 similar issue [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-hsw7/igt@gem_partial_pwrite_pread@write.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-hsw8/igt@gem_partial_pwrite_pread@write.html * igt@i915_pm_rps@reset: - shard-apl: [FAIL][45] ([i915#39]) -> [PASS][46] [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-apl1/igt@i915_pm_rps@reset.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-apl3/igt@i915_pm_rps@reset.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-apl: [DMESG-WARN][47] ([i915#180]) -> [PASS][48] [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-apl8/igt@kms_flip@flip-vs-suspend-interruptible.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-apl7/igt@kms_flip@flip-vs-suspend-interruptible.html * igt@kms_frontbuffer_tracking@fbc-suspend: - shard-kbl: [DMESG-WARN][49] ([i915#180]) -> [PASS][50] +5 similar issues [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-suspend.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-suspend.html * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: - shard-skl: [FAIL][51] ([fdo#108145] / [i915#265]) -> [PASS][52] [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-skl9/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html * igt@kms_psr@psr2_primary_page_flip: - shard-iclb: [SKIP][53] ([fdo#109441]) -> [PASS][54] +2 similar issues [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-iclb1/igt@kms_psr@psr2_primary_page_flip.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html * igt@perf_pmu@cpu-hotplug: - shard-hsw: [INCOMPLETE][55] ([i915#61]) -> [PASS][56] [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-hsw4/igt@perf_pmu@cpu-hotplug.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-hsw8/igt@perf_pmu@cpu-hotplug.html * igt@prime_vgem@fence-wait-bsd2: - shard-iclb: [SKIP][57] ([fdo#109276]) -> [PASS][58] +17 similar issues [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7869/shard-iclb5/igt@prime_vgem@fence-wait-bsd2.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/shard-iclb1/igt@prime_vgem@fence-wait-bsd2.html [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854 [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080 [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146 [i915#173]: https://gitlab.freedesktop.org/drm/intel/issues/173 [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265 [i915#39]: https://gitlab.freedesktop.org/drm/intel/issues/39 [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454 [i915#58]: https://gitlab.freedesktop.org/drm/intel/issues/58 [i915#61]: https://gitlab.freedesktop.org/drm/intel/issues/61 [i915#667]: https://gitlab.freedesktop.org/drm/intel/issues/667 [i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677 [i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694 [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79 [i915#88]: https://gitlab.freedesktop.org/drm/intel/issues/88 [i915#899]: https://gitlab.freedesktop.org/drm/intel/issues/899 [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133 Participating hosts (10 -> 10) ------------------------------ No changes in participating hosts Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_7869 -> Patchwork_16430 CI-20190529: 20190529 CI_DRM_7869: db0579be255412f38a450c3c577f8d10f1195034 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5419: 44913a91e77434b03001bb9ea53216cd03c476e6 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_16430: a63da6be20f6df886621e1d44e42db73b7a1e1f0 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16430/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2020-02-07 23:36 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2020-02-05 9:54 [Intel-gfx] [PATCH 1/2] drm/i915: Flush execution tasklets before checking request status Chris Wilson 2020-02-05 9:54 ` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Yield the timeslice if caught waiting on a user semaphore Chris Wilson 2020-02-05 14:04 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Flush execution tasklets before checking request status Patchwork 2020-02-05 14:42 ` [Intel-gfx] [PATCH 1/2] " Mika Kuoppala 2020-02-05 15:36 ` Chris Wilson 2020-02-07 23:36 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] " Patchwork
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