* [PATCH v4 18/20] mips: mtmips: add SPL support
@ 2020-02-12 7:49 Weijie Gao
2020-02-12 7:55 ` Stefan Roese
0 siblings, 1 reply; 4+ messages in thread
From: Weijie Gao @ 2020-02-12 7:49 UTC (permalink / raw)
To: u-boot
This patch adds SPL support for mtmips platform. The lowlevel architecture
is split into SPL and the rest parts are built into a memory loadable
u-boot image. Optional SPL_DM and OF_CONTROL are also supported.
The increment of size is very small (< 10 KiB) if SPL_DM and OF_CONTROL are
not enabled and the memory bootable u-boot (u-boot.img) is generated
automatically so there is not need to add a separate config for it.
A lzma compressed payload (u-boot-lzma.img) is also generated and it will
be combined with u-boot-spl.bin to form the unified ROM bootable binary
u-boot-mtmips.bin.
A spl loader is added to support uncompress the payload.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
Changes since v3: rename output file to u-boot-mips.bin
---
Makefile | 9 ++++
arch/mips/Kconfig | 3 ++
arch/mips/dts/mt7628-u-boot.dtsi | 56 +++++++++++++++++++++
arch/mips/dts/mt7628a.dtsi | 2 +-
arch/mips/mach-mtmips/Kconfig | 23 +++++++++
arch/mips/mach-mtmips/Makefile | 1 +
arch/mips/mach-mtmips/include/mach/serial.h | 13 +++++
arch/mips/mach-mtmips/mt7628/Makefile | 1 +
arch/mips/mach-mtmips/mt7628/serial.c | 34 +++++++++++++
arch/mips/mach-mtmips/spl.c | 44 ++++++++++++++++
10 files changed, 185 insertions(+), 1 deletion(-)
create mode 100644 arch/mips/dts/mt7628-u-boot.dtsi
create mode 100644 arch/mips/mach-mtmips/include/mach/serial.h
create mode 100644 arch/mips/mach-mtmips/mt7628/serial.c
create mode 100644 arch/mips/mach-mtmips/spl.c
diff --git a/Makefile b/Makefile
index 8aed5bbca4..f80d4d27a5 100644
--- a/Makefile
+++ b/Makefile
@@ -897,6 +897,7 @@ ALL-$(CONFIG_OF_SEPARATE) += u-boot-dtb-tegra.bin
endif
ALL-$(CONFIG_ARCH_MEDIATEK) += u-boot-mtk.bin
+ALL-$(CONFIG_ARCH_MTMIPS) += u-boot-mips.bin
# Add optional build target if defined in board/cpu/soc headers
ifneq ($(CONFIG_BUILD_TARGET),)
@@ -1692,6 +1693,14 @@ u-boot-mtk.bin: u-boot.bin FORCE
$(call if_changed,mkimage)
endif
+ifeq ($(CONFIG_SPL),y)
+u-boot-mips.bin: u-boot.dtb u-boot-lzma.img spl/u-boot-spl.bin FORCE
+ $(call if_changed,binman)
+else
+u-boot-mips.bin: u-boot.bin FORCE
+ $(call if_changed,copy)
+endif
+
ARCH_POSTLINK := $(wildcard $(srctree)/arch/$(ARCH)/Makefile.postlink)
# Rule to link u-boot
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 7b9d0072eb..4c1eea1ccc 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -98,6 +98,9 @@ config ARCH_MTMIPS
select SUPPORTS_CPU_MIPS32_R2
select SUPPORTS_LITTLE_ENDIAN
select SYSRESET
+ select SUPPORT_SPL
+ select SPL_LZMA
+ select BINMAN
config ARCH_JZ47XX
bool "Support Ingenic JZ47xx"
diff --git a/arch/mips/dts/mt7628-u-boot.dtsi b/arch/mips/dts/mt7628-u-boot.dtsi
new file mode 100644
index 0000000000..9149187762
--- /dev/null
+++ b/arch/mips/dts/mt7628-u-boot.dtsi
@@ -0,0 +1,56 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 MediaTek Inc.
+ *
+ * Author: Weijie Gao <weijie.gao@mediatek.com>
+ */
+
+/ {
+ binman {
+ filename = "u-boot-mips.bin";
+ pad-byte = <0xff>;
+
+#ifdef CONFIG_SPL
+ u-boot-spl {
+ };
+
+ u-boot-lzma-img {
+ };
+#else
+ u-boot {
+ };
+#endif
+ };
+};
+
+&palmbus {
+ u-boot,dm-pre-reloc;
+};
+
+&reboot {
+ u-boot,dm-pre-reloc;
+};
+
+&clkctrl {
+ u-boot,dm-pre-reloc;
+};
+
+&rstctrl {
+ u-boot,dm-pre-reloc;
+};
+
+&pinctrl {
+ u-boot,dm-pre-reloc;
+};
+
+&uart0 {
+ u-boot,dm-pre-reloc;
+};
+
+&uart1 {
+ u-boot,dm-pre-reloc;
+};
+
+&uart2 {
+ u-boot,dm-pre-reloc;
+};
diff --git a/arch/mips/dts/mt7628a.dtsi b/arch/mips/dts/mt7628a.dtsi
index 2200135a77..6baa63add3 100644
--- a/arch/mips/dts/mt7628a.dtsi
+++ b/arch/mips/dts/mt7628a.dtsi
@@ -33,7 +33,7 @@
#clock-cells = <0>;
};
- palmbus at 10000000 {
+ palmbus: palmbus at 10000000 {
compatible = "palmbus", "simple-bus";
reg = <0x10000000 0x200000>;
ranges = <0x0 0x10000000 0x1FFFFF>;
diff --git a/arch/mips/mach-mtmips/Kconfig b/arch/mips/mach-mtmips/Kconfig
index 3f25de8b85..493fe0b21d 100644
--- a/arch/mips/mach-mtmips/Kconfig
+++ b/arch/mips/mach-mtmips/Kconfig
@@ -20,8 +20,15 @@ config SYS_ICACHE_LINE_SIZE
default 32
config SYS_TEXT_BASE
+ default 0x9c000000 if !SPL
+ default 0x80200000 if SPL
+
+config SPL_TEXT_BASE
default 0x9c000000
+config SPL_LOADER_SUPPORT
+ default y
+
choice
prompt "MediaTek MIPS SoC select"
@@ -34,6 +41,14 @@ config SOC_MT7628
select PINCTRL_MT7628
select MTK_SERIAL
select SYSRESET_RESETCTL
+ select SPL_SEPARATE_BSS if SPL
+ select SPL_INIT_STACK_WITHOUT_MALLOC_F if SPL
+ select SPL_OF_CONTROL if SPL_DM
+ select SPL_SIMPLE_BUS if SPL_DM
+ select SPL_DM_SERIAL if SPL_DM
+ select SPL_CLK if SPL_DM && SPL_SERIAL_SUPPORT
+ select SPL_SYSRESET if SPL_DM
+ select SPL_OF_LIBFDT if SPL_OF_CONTROL
help
This supports MediaTek MT7628/MT7688.
@@ -88,6 +103,14 @@ endchoice
config SUPPORTS_BOOT_RAM
bool
+config SPL_UART2_SPIS_PINMUX
+ bool "Use alternative pinmux for UART2 in SPL stage"
+ depends on SPL_SERIAL_SUPPORT
+ default n
+ help
+ Select this if the UART2 of your board is connected to GPIO 16/17
+ (shared with SPIS) rather than the usual GPIO 20/21.
+
source "board/gardena/smart-gateway-mt7688/Kconfig"
source "board/seeed/linkit-smart-7688/Kconfig"
diff --git a/arch/mips/mach-mtmips/Makefile b/arch/mips/mach-mtmips/Makefile
index 72f0369030..a7e6a66304 100644
--- a/arch/mips/mach-mtmips/Makefile
+++ b/arch/mips/mach-mtmips/Makefile
@@ -3,5 +3,6 @@
obj-y += cpu.o
obj-y += ddr_init.o
obj-y += ddr_cal.o
+obj-$(CONFIG_SPL_BUILD) += spl.o
obj-$(CONFIG_SOC_MT7628) += mt7628/
diff --git a/arch/mips/mach-mtmips/include/mach/serial.h b/arch/mips/mach-mtmips/include/mach/serial.h
new file mode 100644
index 0000000000..bfa246b428
--- /dev/null
+++ b/arch/mips/mach-mtmips/include/mach/serial.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2020 MediaTek Inc.
+ *
+ * Author: Weijie Gao <weijie.gao@mediatek.com>
+ */
+
+#ifndef _MTMIPS_SERIAL_H_
+#define _MTMIPS_SERIAL_H_
+
+void mtmips_spl_serial_init(void);
+
+#endif /* _MTMIPS_SERIAL_H_ */
diff --git a/arch/mips/mach-mtmips/mt7628/Makefile b/arch/mips/mach-mtmips/mt7628/Makefile
index db62e90d77..7e139d5adf 100644
--- a/arch/mips/mach-mtmips/mt7628/Makefile
+++ b/arch/mips/mach-mtmips/mt7628/Makefile
@@ -3,3 +3,4 @@
obj-y += lowlevel_init.o
obj-y += init.o
obj-y += ddr.o
+obj-$(CONFIG_SPL_BUILD) += serial.o
diff --git a/arch/mips/mach-mtmips/mt7628/serial.c b/arch/mips/mach-mtmips/mt7628/serial.c
new file mode 100644
index 0000000000..a7d324792d
--- /dev/null
+++ b/arch/mips/mach-mtmips/mt7628/serial.c
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 MediaTek Inc.
+ *
+ * Author: Weijie Gao <weijie.gao@mediatek.com>
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include "mt7628.h"
+
+void mtmips_spl_serial_init(void)
+{
+#ifdef CONFIG_SPL_SERIAL_SUPPORT
+ void __iomem *base = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE);
+
+#if CONFIG_CONS_INDEX == 1
+ clrbits_32(base + SYSCTL_GPIO_MODE1_REG, UART0_MODE_M);
+#elif CONFIG_CONS_INDEX == 2
+ clrbits_32(base + SYSCTL_GPIO_MODE1_REG, UART1_MODE_M);
+#elif CONFIG_CONS_INDEX == 3
+ setbits_32(base + SYSCTL_AGPIO_CFG_REG, EPHY_GPIO_AIO_EN_M);
+#ifdef CONFIG_SPL_UART2_SPIS_PINMUX
+ setbits_32(base + SYSCTL_GPIO_MODE1_REG, SPIS_MODE_M);
+ clrsetbits_32(base + SYSCTL_GPIO_MODE1_REG, UART2_MODE_M,
+ 1 << UART2_MODE_S);
+#else
+ clrbits_32(base + SYSCTL_GPIO_MODE1_REG, UART2_MODE_M);
+ clrsetbits_32(base + SYSCTL_GPIO_MODE1_REG, SPIS_MODE_M,
+ 1 << SPIS_MODE_S);
+#endif /* CONFIG_SPL_UART2_SPIS_PINMUX */
+#endif /* CONFIG_CONS_INDEX */
+#endif /* CONFIG_SPL_SERIAL_SUPPORT */
+}
diff --git a/arch/mips/mach-mtmips/spl.c b/arch/mips/mach-mtmips/spl.c
new file mode 100644
index 0000000000..2a24af70c3
--- /dev/null
+++ b/arch/mips/mach-mtmips/spl.c
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
+ *
+ * Author: Weijie Gao <weijie.gao@mediatek.com>
+ */
+
+#include <common.h>
+#include <fdt.h>
+#include <spl.h>
+#include <asm/sections.h>
+#include <linux/sizes.h>
+#include <mach/serial.h>
+
+void __noreturn board_init_f(ulong dummy)
+{
+ spl_init();
+
+#ifdef CONFIG_SPL_SERIAL_SUPPORT
+ /*
+ * mtmips_spl_serial_init() is useful if debug uart is enabled,
+ * or DM based serial is not enabled.
+ */
+ mtmips_spl_serial_init();
+ preloader_console_init();
+#endif
+
+ board_init_r(NULL, 0);
+}
+
+void board_boot_order(u32 *spl_boot_list)
+{
+ spl_boot_list[0] = BOOT_DEVICE_NOR;
+}
+
+unsigned long spl_nor_get_uboot_base(void)
+{
+ void *uboot_base = __image_copy_end;
+
+ if (fdt_magic(uboot_base) == FDT_MAGIC)
+ return (unsigned long)uboot_base + fdt_totalsize(uboot_base);
+
+ return (unsigned long)uboot_base;
+}
--
2.17.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH v4 18/20] mips: mtmips: add SPL support
2020-02-12 7:49 [PATCH v4 18/20] mips: mtmips: add SPL support Weijie Gao
@ 2020-02-12 7:55 ` Stefan Roese
2020-02-12 8:15 ` Weijie Gao
0 siblings, 1 reply; 4+ messages in thread
From: Stefan Roese @ 2020-02-12 7:55 UTC (permalink / raw)
To: u-boot
Hi Weijie,
On 12.02.20 08:49, Weijie Gao wrote:
> This patch adds SPL support for mtmips platform. The lowlevel architecture
> is split into SPL and the rest parts are built into a memory loadable
> u-boot image. Optional SPL_DM and OF_CONTROL are also supported.
>
> The increment of size is very small (< 10 KiB) if SPL_DM and OF_CONTROL are
> not enabled and the memory bootable u-boot (u-boot.img) is generated
> automatically so there is not need to add a separate config for it.
>
> A lzma compressed payload (u-boot-lzma.img) is also generated and it will
> be combined with u-boot-spl.bin to form the unified ROM bootable binary
> u-boot-mtmips.bin.
>
> A spl loader is added to support uncompress the payload.
>
> Reviewed-by: Stefan Roese <sr@denx.de>
> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
> ---
> Changes since v3: rename output file to u-boot-mips.bin
Hmm, why did you change it this way? Did you read my comment about this
combined image name from yesterday? I would really prefer to use the
already repsent and know image name "u-boot-with-spl.bin", which is used
by many other platforms already as a combined image with SPL + U-Boot
proper.
Is there a reason why we should not use this generic image name instead
of this newly created one?
Thanks,
Stefan
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH v4 18/20] mips: mtmips: add SPL support
2020-02-12 7:55 ` Stefan Roese
@ 2020-02-12 8:15 ` Weijie Gao
2020-02-12 9:07 ` Stefan Roese
0 siblings, 1 reply; 4+ messages in thread
From: Weijie Gao @ 2020-02-12 8:15 UTC (permalink / raw)
To: u-boot
On Wed, 2020-02-12 at 08:55 +0100, Stefan Roese wrote:
> Hi Weijie,
>
> On 12.02.20 08:49, Weijie Gao wrote:
> > This patch adds SPL support for mtmips platform. The lowlevel architecture
> > is split into SPL and the rest parts are built into a memory loadable
> > u-boot image. Optional SPL_DM and OF_CONTROL are also supported.
> >
> > The increment of size is very small (< 10 KiB) if SPL_DM and OF_CONTROL are
> > not enabled and the memory bootable u-boot (u-boot.img) is generated
> > automatically so there is not need to add a separate config for it.
> >
> > A lzma compressed payload (u-boot-lzma.img) is also generated and it will
> > be combined with u-boot-spl.bin to form the unified ROM bootable binary
> > u-boot-mtmips.bin.
> >
> > A spl loader is added to support uncompress the payload.
> >
> > Reviewed-by: Stefan Roese <sr@denx.de>
> > Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
> > ---
> > Changes since v3: rename output file to u-boot-mips.bin
>
> Hmm, why did you change it this way? Did you read my comment about this
> combined image name from yesterday? I would really prefer to use the
> already repsent and know image name "u-boot-with-spl.bin", which is used
> by many other platforms already as a combined image with SPL + U-Boot
> proper.
>
> Is there a reason why we should not use this generic image name instead
> of this newly created one?
I forgot there is already no padding between spl and u-boot payload, and
u-boot-with-spl.bin is ok to replace u-boot-mtmips.bin.
I didn't choose u-boot-with-spl.bin for the previous patches because spl
needs padding, and Simon Glass suggested to use binman[1].
Since padding is no longer needed, I will send the next patch series
using u-boot-with-spl.bin.
[1] https://patchwork.ozlabs.org/patch/982872/
>
> Thanks,
> Stefan
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH v4 18/20] mips: mtmips: add SPL support
2020-02-12 8:15 ` Weijie Gao
@ 2020-02-12 9:07 ` Stefan Roese
0 siblings, 0 replies; 4+ messages in thread
From: Stefan Roese @ 2020-02-12 9:07 UTC (permalink / raw)
To: u-boot
On 12.02.20 09:15, Weijie Gao wrote:
> On Wed, 2020-02-12 at 08:55 +0100, Stefan Roese wrote:
>> Hi Weijie,
>>
>> On 12.02.20 08:49, Weijie Gao wrote:
>>> This patch adds SPL support for mtmips platform. The lowlevel architecture
>>> is split into SPL and the rest parts are built into a memory loadable
>>> u-boot image. Optional SPL_DM and OF_CONTROL are also supported.
>>>
>>> The increment of size is very small (< 10 KiB) if SPL_DM and OF_CONTROL are
>>> not enabled and the memory bootable u-boot (u-boot.img) is generated
>>> automatically so there is not need to add a separate config for it.
>>>
>>> A lzma compressed payload (u-boot-lzma.img) is also generated and it will
>>> be combined with u-boot-spl.bin to form the unified ROM bootable binary
>>> u-boot-mtmips.bin.
>>>
>>> A spl loader is added to support uncompress the payload.
>>>
>>> Reviewed-by: Stefan Roese <sr@denx.de>
>>> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
>>> ---
>>> Changes since v3: rename output file to u-boot-mips.bin
>>
>> Hmm, why did you change it this way? Did you read my comment about this
>> combined image name from yesterday? I would really prefer to use the
>> already repsent and know image name "u-boot-with-spl.bin", which is used
>> by many other platforms already as a combined image with SPL + U-Boot
>> proper.
>>
>> Is there a reason why we should not use this generic image name instead
>> of this newly created one?
>
> I forgot there is already no padding between spl and u-boot payload, and
> u-boot-with-spl.bin is ok to replace u-boot-mtmips.bin.
>
> I didn't choose u-boot-with-spl.bin for the previous patches because spl
> needs padding, and Simon Glass suggested to use binman[1].
>
> Since padding is no longer needed, I will send the next patch series
> using u-boot-with-spl.bin.
If its just this change, then a follow-up patch should be enough to not
"spam" the list too much. If you need to send a v5, then sure, please
fold this change into this patch there.
Thanks,
Stefan
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2020-02-12 9:07 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-02-12 7:49 [PATCH v4 18/20] mips: mtmips: add SPL support Weijie Gao
2020-02-12 7:55 ` Stefan Roese
2020-02-12 8:15 ` Weijie Gao
2020-02-12 9:07 ` Stefan Roese
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