* [Intel-gfx] [PATCH] drm/i915/selftests: Verify LRC isolation
@ 2020-02-22 11:27 Chris Wilson
2020-02-22 11:39 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Verify LRC isolation (rev3) Patchwork
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Chris Wilson @ 2020-02-22 11:27 UTC (permalink / raw)
To: intel-gfx
Record the LRC registers before/after a preemption event to ensure that
the first context sees nothing from the second client; at least in the
normal per-context register state.
References: https://gitlab.freedesktop.org/drm/intel/issues/1233
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/gt/selftest_lrc.c | 545 +++++++++++++++++++++++++
1 file changed, 545 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index febd608c23a7..64e57d8e4d25 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -4748,6 +4748,550 @@ static int live_lrc_timestamp(void *arg)
return 0;
}
+static struct i915_vma *
+create_user_vma(struct i915_address_space *vm, unsigned long size)
+{
+ struct drm_i915_gem_object *obj;
+ struct i915_vma *vma;
+ int err;
+
+ obj = i915_gem_object_create_internal(vm->i915, size);
+ if (IS_ERR(obj))
+ return ERR_CAST(obj);
+
+ vma = i915_vma_instance(obj, vm, NULL);
+ if (IS_ERR(vma)) {
+ i915_gem_object_put(obj);
+ return vma;
+ }
+
+ err = i915_vma_pin(vma, 0, 0, PIN_USER);
+ if (err) {
+ i915_gem_object_put(obj);
+ return ERR_PTR(err);
+ }
+
+ return vma;
+}
+
+static struct i915_vma *
+store_context(struct intel_context *ce, struct i915_vma *scratch)
+{
+ struct i915_vma *batch;
+ u32 dw, x, *cs, *hw;
+
+ batch = create_user_vma(ce->vm, SZ_64K);
+ if (IS_ERR(batch))
+ return ERR_CAST(batch);
+
+ cs = i915_gem_object_pin_map(batch->obj, I915_MAP_WC);
+ if (IS_ERR(cs)) {
+ i915_vma_put(batch);
+ return ERR_CAST(cs);
+ }
+
+ x = 0;
+ dw = 0;
+ hw = ce->engine->pinned_default_state;
+ hw += LRC_STATE_PN * PAGE_SIZE / sizeof(*hw);
+ do {
+ u32 lri = hw[dw];
+
+ if (lri == 0) {
+ dw++;
+ continue;
+ }
+
+ if ((lri & GENMASK(31, 23)) != MI_INSTR(0x22, 0)) {
+ lri &= 0x7f;
+ dw += lri + 2;
+ continue;
+ }
+
+ lri &= 0x7f;
+ lri++;
+ dw++;
+
+ while (lri) {
+ *cs++ = MI_STORE_REGISTER_MEM_GEN8;
+ *cs++ = hw[dw];
+ *cs++ = lower_32_bits(scratch->node.start + x);
+ *cs++ = upper_32_bits(scratch->node.start + x);
+
+ dw += 2;
+ lri -= 2;
+ x += 4;
+ }
+ } while (dw < PAGE_SIZE / sizeof(u32) &&
+ (hw[dw] & ~BIT(0)) != MI_BATCH_BUFFER_END);
+
+ *cs++ = MI_BATCH_BUFFER_END;
+
+ i915_gem_object_flush_map(batch->obj);
+ i915_gem_object_unpin_map(batch->obj);
+
+ return batch;
+}
+
+static int move_to_active(struct i915_request *rq,
+ struct i915_vma *vma,
+ unsigned int flags)
+{
+ int err;
+
+ i915_vma_lock(vma);
+ err = i915_request_await_object(rq, vma->obj, flags);
+ if (!err)
+ err = i915_vma_move_to_active(vma, rq, flags);
+ i915_vma_unlock(vma);
+
+ return err;
+}
+
+static struct i915_request *
+record_registers(struct intel_context *ce,
+ struct i915_vma *before,
+ struct i915_vma *after,
+ u32 *sema)
+{
+ struct i915_vma *b_before, *b_after;
+ struct i915_request *rq;
+ u32 *cs;
+ int err;
+
+ b_before = store_context(ce, before);
+ if (IS_ERR(b_before))
+ return ERR_CAST(b_before);
+
+ b_after = store_context(ce, after);
+ if (IS_ERR(b_after)) {
+ err = PTR_ERR(b_after);
+ goto err_before;
+ }
+
+ rq = intel_context_create_request(ce);
+ if (IS_ERR(rq))
+ goto err_after;
+
+ err = move_to_active(rq, before, EXEC_OBJECT_WRITE);
+ if (err)
+ goto err_rq;
+
+ err = move_to_active(rq, b_before, 0);
+ if (err)
+ goto err_rq;
+
+ err = move_to_active(rq, after, EXEC_OBJECT_WRITE);
+ if (err)
+ goto err_rq;
+
+ err = move_to_active(rq, b_after, 0);
+ if (err)
+ goto err_rq;
+
+ cs = intel_ring_begin(rq, 14);
+ if (IS_ERR(cs)) {
+ err = PTR_ERR(cs);
+ goto err_rq;
+ }
+
+ *cs++ = MI_ARB_ON_OFF | MI_ARB_DISABLE;
+ *cs++ = MI_BATCH_BUFFER_START_GEN8 | BIT(8);
+ *cs++ = lower_32_bits(b_before->node.start);
+ *cs++ = upper_32_bits(b_before->node.start);
+
+ *cs++ = MI_ARB_ON_OFF | MI_ARB_ENABLE;
+ *cs++ = MI_SEMAPHORE_WAIT |
+ MI_SEMAPHORE_GLOBAL_GTT |
+ MI_SEMAPHORE_POLL |
+ MI_SEMAPHORE_SAD_NEQ_SDD;
+ *cs++ = 0;
+ *cs++ = i915_ggtt_offset(ce->engine->status_page.vma) +
+ offset_in_page(sema);
+ *cs++ = 0;
+ *cs++ = MI_NOOP;
+
+ *cs++ = MI_ARB_ON_OFF | MI_ARB_DISABLE;
+ *cs++ = MI_BATCH_BUFFER_START_GEN8 | BIT(8);
+ *cs++ = lower_32_bits(b_after->node.start);
+ *cs++ = upper_32_bits(b_after->node.start);
+
+ intel_ring_advance(rq, cs);
+
+ WRITE_ONCE(*sema, 0);
+ i915_request_get(rq);
+ i915_request_add(rq);
+err_after:
+ i915_vma_put(b_after);
+err_before:
+ i915_vma_put(b_before);
+ return rq;
+
+err_rq:
+ i915_request_add(rq);
+ rq = ERR_PTR(err);
+ goto err_after;
+}
+
+static struct i915_vma *load_context(struct intel_context *ce, u32 poison)
+{
+ struct i915_vma *batch;
+ u32 dw, *cs, *hw;
+
+ batch = create_user_vma(ce->vm, SZ_64K);
+ if (IS_ERR(batch))
+ return ERR_CAST(batch);
+
+ cs = i915_gem_object_pin_map(batch->obj, I915_MAP_WC);
+ if (IS_ERR(cs)) {
+ i915_vma_put(batch);
+ return ERR_CAST(cs);
+ }
+
+ dw = 0;
+ hw = ce->engine->pinned_default_state;
+ hw += LRC_STATE_PN * PAGE_SIZE / sizeof(*hw);
+ do {
+ u32 lri = hw[dw];
+
+ if (lri == 0) {
+ dw++;
+ continue;
+ }
+
+ if ((lri & GENMASK(31, 23)) != MI_INSTR(0x22, 0)) {
+ lri &= 0x7f;
+ dw += lri + 2;
+ continue;
+ }
+
+ lri &= 0x7f;
+ lri++;
+ dw++;
+
+ lri /= 2;
+ *cs++ = MI_LOAD_REGISTER_IMM(lri);
+ while (lri--) {
+ *cs++ = hw[dw];
+ *cs++ = poison;
+ dw += 2;
+ }
+ } while (dw < PAGE_SIZE / sizeof(u32) &&
+ (hw[dw] & ~BIT(0)) != MI_BATCH_BUFFER_END);
+
+ *cs++ = MI_BATCH_BUFFER_END;
+
+ i915_gem_object_flush_map(batch->obj);
+ i915_gem_object_unpin_map(batch->obj);
+
+ return batch;
+}
+
+static int poison_registers(struct intel_context *ce, u32 poison, u32 *sema)
+{
+ struct i915_request *rq;
+ struct i915_vma *batch;
+ u32 *cs;
+ int err;
+
+ batch = load_context(ce, poison);
+ if (IS_ERR(batch))
+ return PTR_ERR(batch);
+
+ rq = intel_context_create_request(ce);
+ if (IS_ERR(rq)) {
+ err = PTR_ERR(rq);
+ goto err_batch;
+ }
+
+ err = move_to_active(rq, batch, 0);
+ if (err)
+ goto err_rq;
+
+ cs = intel_ring_begin(rq, 8);
+ if (IS_ERR(cs)) {
+ err = PTR_ERR(cs);
+ goto err_rq;
+ }
+
+ *cs++ = MI_ARB_ON_OFF | MI_ARB_DISABLE;
+ *cs++ = MI_BATCH_BUFFER_START_GEN8 | BIT(8);
+ *cs++ = lower_32_bits(batch->node.start);
+ *cs++ = upper_32_bits(batch->node.start);
+
+ *cs++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT;
+ *cs++ = i915_ggtt_offset(ce->engine->status_page.vma) +
+ offset_in_page(sema);
+ *cs++ = 0;
+ *cs++ = 1;
+
+ intel_ring_advance(rq, cs);
+
+ rq->sched.attr.priority = I915_PRIORITY_BARRIER;
+err_rq:
+ i915_request_add(rq);
+err_batch:
+ i915_vma_put(batch);
+ return err;
+}
+
+static bool is_moving(u32 a, u32 b)
+{
+ return a != b;
+}
+
+static int compare_isolation(struct intel_engine_cs *engine,
+ struct i915_vma *ref[2],
+ struct i915_vma *result[2],
+ struct intel_context *ce,
+ u32 poison)
+{
+ u32 x, dw, *hw, *lrc;
+ u32 *A[2], *B[2];
+ int err = 0;
+
+ A[0] = i915_gem_object_pin_map(ref[0]->obj, I915_MAP_WC);
+ if (IS_ERR(A[0]))
+ return PTR_ERR(A[0]);
+
+ A[1] = i915_gem_object_pin_map(ref[1]->obj, I915_MAP_WC);
+ if (IS_ERR(A[1])) {
+ err = PTR_ERR(A[1]);
+ goto err_A0;
+ }
+
+ B[0] = i915_gem_object_pin_map(result[0]->obj, I915_MAP_WC);
+ if (IS_ERR(B[0])) {
+ err = PTR_ERR(B[0]);
+ goto err_A1;
+ }
+
+ B[1] = i915_gem_object_pin_map(result[1]->obj, I915_MAP_WC);
+ if (IS_ERR(B[1])) {
+ err = PTR_ERR(B[1]);
+ goto err_B0;
+ }
+
+ lrc = i915_gem_object_pin_map(ce->state->obj,
+ i915_coherent_map_type(engine->i915));
+ if (IS_ERR(lrc)) {
+ err = PTR_ERR(lrc);
+ goto err_B1;
+ }
+ lrc += LRC_STATE_PN * PAGE_SIZE / sizeof(*hw);
+
+ x = 0;
+ dw = 0;
+ hw = engine->pinned_default_state;
+ hw += LRC_STATE_PN * PAGE_SIZE / sizeof(*hw);
+ do {
+ u32 lri = hw[dw];
+
+ if (lri == 0) {
+ dw++;
+ continue;
+ }
+
+ if ((lri & GENMASK(31, 23)) != MI_INSTR(0x22, 0)) {
+ lri &= 0x7f;
+ dw += lri + 2;
+ continue;
+ }
+
+ lri &= 0x7f;
+ lri++;
+ dw++;
+
+ while (lri) {
+ if (!is_moving(A[0][x], A[1][x]) &&
+ (A[0][x] != B[0][x] || A[1][x] != B[1][x])) {
+ switch (hw[dw] & 4095) {
+ case 0x30: /* RING_HEAD */
+ case 0x34: /* RING_TAIL */
+ break;
+
+ default:
+ pr_err("%s[%d]: Mismatch for register %4x, default %08x, reference %08x, result (%08x, %08x), poison %08x, context %08x\n",
+ engine->name, x,
+ hw[dw], hw[dw + 1],
+ A[0][x], B[0][x], B[1][x],
+ poison, lrc[dw + 1]);
+ err = -EINVAL;
+ break;
+ }
+ }
+ dw += 2;
+ lri -= 2;
+ x++;
+ }
+ } while (dw < PAGE_SIZE / sizeof(u32) &&
+ (hw[dw] & ~BIT(0)) != MI_BATCH_BUFFER_END);
+
+ i915_gem_object_unpin_map(ce->state->obj);
+err_B1:
+ i915_gem_object_unpin_map(result[1]->obj);
+err_B0:
+ i915_gem_object_unpin_map(result[0]->obj);
+err_A1:
+ i915_gem_object_unpin_map(ref[1]->obj);
+err_A0:
+ i915_gem_object_unpin_map(ref[0]->obj);
+ return err;
+}
+
+static int __lrc_isolation(struct intel_engine_cs *engine, u32 poison)
+{
+ u32 *sema = memset32(engine->status_page.addr + 1000, 0, 1);
+ struct i915_vma *ref[2], *result[2];
+ struct intel_context *A, *B;
+ struct i915_request *rq;
+ int err;
+
+ A = intel_context_create(engine);
+ if (IS_ERR(A))
+ return PTR_ERR(A);
+
+ B = intel_context_create(engine);
+ if (IS_ERR(B)) {
+ err = PTR_ERR(B);
+ goto err_A;
+ }
+
+ ref[0] = create_user_vma(A->vm, SZ_64K);
+ if (IS_ERR(ref[0])) {
+ err = PTR_ERR(ref[0]);
+ goto err_B;
+ }
+
+ ref[1] = create_user_vma(A->vm, SZ_64K);
+ if (IS_ERR(ref[1])) {
+ err = PTR_ERR(ref[1]);
+ goto err_ref0;
+ }
+
+ rq = record_registers(A, ref[0], ref[1], sema);
+ if (IS_ERR(rq)) {
+ err = PTR_ERR(rq);
+ goto err_ref1;
+ }
+
+ WRITE_ONCE(*sema, 1);
+ wmb();
+
+ if (i915_request_wait(rq, 0, HZ / 2) < 0) {
+ i915_request_put(rq);
+ err = -ETIME;
+ goto err_ref1;
+ }
+ i915_request_put(rq);
+
+ result[0] = create_user_vma(A->vm, SZ_64K);
+ if (IS_ERR(result[0])) {
+ err = PTR_ERR(result[0]);
+ goto err_ref1;
+ }
+
+ result[1] = create_user_vma(A->vm, SZ_64K);
+ if (IS_ERR(result[1])) {
+ err = PTR_ERR(result[1]);
+ goto err_result0;
+ }
+
+ rq = record_registers(A, result[0], result[1], sema);
+ if (IS_ERR(rq)) {
+ err = PTR_ERR(rq);
+ goto err_result1;
+ }
+
+ err = poison_registers(B, poison, sema);
+ if (err) {
+ WRITE_ONCE(*sema, -1);
+ i915_request_put(rq);
+ goto err_result1;
+ }
+
+ if (i915_request_wait(rq, 0, HZ / 2) < 0) {
+ i915_request_put(rq);
+ err = -ETIME;
+ goto err_result1;
+ }
+ i915_request_put(rq);
+
+ err = compare_isolation(engine, ref, result, A, poison);
+
+err_result1:
+ i915_vma_put(result[1]);
+err_result0:
+ i915_vma_put(result[0]);
+err_ref1:
+ i915_vma_put(ref[1]);
+err_ref0:
+ i915_vma_put(ref[0]);
+err_B:
+ intel_context_put(B);
+err_A:
+ intel_context_put(A);
+ return err;
+}
+
+static bool skip_isolation(const struct intel_engine_cs *engine)
+{
+ if (engine->class == COPY_ENGINE_CLASS && INTEL_GEN(engine->i915) == 9)
+ return true;
+
+ if (engine->class == RENDER_CLASS && INTEL_GEN(engine->i915) == 11)
+ return true;
+
+ return false;
+}
+
+static int live_lrc_isolation(void *arg)
+{
+ struct intel_gt *gt = arg;
+ struct intel_engine_cs *engine;
+ enum intel_engine_id id;
+ const u32 poison[] = {
+ STACK_MAGIC,
+ 0x3a3a3a3a,
+ 0xc5c5c5c5,
+ 0xffffffff,
+ };
+
+ /*
+ * Our goal is try and verify that per-context state cannot be
+ * tampered with by another non-privileged client.
+ *
+ * We take the list of context registers from the LRI in the default
+ * context image and attempt to modify that list from a remote context.
+ */
+
+ for_each_engine(engine, gt, id) {
+ int err = 0;
+ int i;
+
+ /* Just don't even ask */
+ if (!IS_ENABLED(CONFIG_DRM_I915_SELFTEST_BROKEN) &&
+ skip_isolation(engine))
+ continue;
+
+ intel_engine_pm_get(engine);
+ if (engine->pinned_default_state) {
+ for (i = 0; i < ARRAY_SIZE(poison); i++) {
+ err = __lrc_isolation(engine, poison[i]);
+ if (err)
+ break;
+ }
+ }
+ if (igt_flush_test(gt->i915))
+ err = -EIO;
+ intel_engine_pm_put(engine);
+ if (err)
+ return err;
+ }
+
+ return 0;
+}
+
static int __live_pphwsp_runtime(struct intel_engine_cs *engine)
{
struct intel_context *ce;
@@ -4845,6 +5389,7 @@ int intel_lrc_live_selftests(struct drm_i915_private *i915)
SUBTEST(live_lrc_fixed),
SUBTEST(live_lrc_state),
SUBTEST(live_lrc_gpr),
+ SUBTEST(live_lrc_isolation),
SUBTEST(live_lrc_timestamp),
SUBTEST(live_pphwsp_runtime),
};
--
2.25.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Verify LRC isolation (rev3)
2020-02-22 11:27 [Intel-gfx] [PATCH] drm/i915/selftests: Verify LRC isolation Chris Wilson
@ 2020-02-22 11:39 ` Patchwork
2020-02-22 12:30 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-02-24 21:42 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2020-02-22 11:39 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Verify LRC isolation (rev3)
URL : https://patchwork.freedesktop.org/series/73788/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
794ca4c5268b drm/i915/selftests: Verify LRC isolation
-:123: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#123: FILE: drivers/gpu/drm/i915/gt/selftest_lrc.c:4853:
+record_registers(struct intel_context *ce,
+ struct i915_vma *before,
-:449: WARNING:MEMORY_BARRIER: memory barrier without comment
#449: FILE: drivers/gpu/drm/i915/gt/selftest_lrc.c:5179:
+ wmb();
total: 0 errors, 1 warnings, 1 checks, 557 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Verify LRC isolation (rev3)
2020-02-22 11:27 [Intel-gfx] [PATCH] drm/i915/selftests: Verify LRC isolation Chris Wilson
2020-02-22 11:39 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Verify LRC isolation (rev3) Patchwork
@ 2020-02-22 12:30 ` Patchwork
2020-02-24 21:42 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2020-02-22 12:30 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Verify LRC isolation (rev3)
URL : https://patchwork.freedesktop.org/series/73788/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7985 -> Patchwork_16676
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_16676:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_selftest@live_gt_lrc:
- {fi-tgl-u}: [DMESG-FAIL][1] ([i915#1233]) -> [DMESG-FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/fi-tgl-u/igt@i915_selftest@live_gt_lrc.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/fi-tgl-u/igt@i915_selftest@live_gt_lrc.html
Known issues
------------
Here are the changes found in Patchwork_16676 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_close_race@basic-threads:
- fi-hsw-peppy: [PASS][3] -> [INCOMPLETE][4] ([i915#694] / [i915#816])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/fi-hsw-peppy/igt@gem_close_race@basic-threads.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/fi-hsw-peppy/igt@gem_close_race@basic-threads.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-cml-u2: [PASS][5] -> [FAIL][6] ([i915#217])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/fi-cml-u2/igt@kms_chamelium@common-hpd-after-suspend.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/fi-cml-u2/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-icl-u2: [PASS][7] -> [FAIL][8] ([i915#217])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@prime_self_import@basic-llseek-bad:
- fi-tgl-y: [PASS][9] -> [DMESG-WARN][10] ([CI#94] / [i915#402]) +1 similar issue
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/fi-tgl-y/igt@prime_self_import@basic-llseek-bad.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/fi-tgl-y/igt@prime_self_import@basic-llseek-bad.html
#### Possible fixes ####
* igt@gem_close_race@basic-threads:
- fi-byt-n2820: [INCOMPLETE][11] ([i915#45]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/fi-byt-n2820/igt@gem_close_race@basic-threads.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/fi-byt-n2820/igt@gem_close_race@basic-threads.html
* igt@gem_exec_suspend@basic-s4-devices:
- fi-tgl-y: [FAIL][13] ([CI#94]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/fi-tgl-y/igt@gem_exec_suspend@basic-s4-devices.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/fi-tgl-y/igt@gem_exec_suspend@basic-s4-devices.html
* igt@i915_selftest@live_gt_heartbeat:
- fi-kbl-x1275: [DMESG-FAIL][15] ([fdo#112406]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/fi-kbl-x1275/igt@i915_selftest@live_gt_heartbeat.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/fi-kbl-x1275/igt@i915_selftest@live_gt_heartbeat.html
* igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling:
- fi-tgl-y: [DMESG-WARN][17] ([CI#94] / [i915#402]) -> [PASS][18] +1 similar issue
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/fi-tgl-y/igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/fi-tgl-y/igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][19] ([fdo#111096] / [i915#323]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
#### Warnings ####
* igt@gem_close_race@basic-threads:
- fi-byt-j1900: [TIMEOUT][21] ([fdo#112271] / [i915#1084] / [i915#816]) -> [INCOMPLETE][22] ([i915#45])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/fi-byt-j1900/igt@gem_close_race@basic-threads.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/fi-byt-j1900/igt@gem_close_race@basic-threads.html
* igt@i915_selftest@live_gt_lrc:
- fi-tgl-y: [DMESG-FAIL][23] ([CI#94] / [i915#1233]) -> [DMESG-FAIL][24] ([CI#94])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/fi-tgl-y/igt@i915_selftest@live_gt_lrc.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/fi-tgl-y/igt@i915_selftest@live_gt_lrc.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
[fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
[fdo#112406]: https://bugs.freedesktop.org/show_bug.cgi?id=112406
[i915#1084]: https://gitlab.freedesktop.org/drm/intel/issues/1084
[i915#1233]: https://gitlab.freedesktop.org/drm/intel/issues/1233
[i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217
[i915#323]: https://gitlab.freedesktop.org/drm/intel/issues/323
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#45]: https://gitlab.freedesktop.org/drm/intel/issues/45
[i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
[i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816
Participating hosts (51 -> 45)
------------------------------
Additional (1): fi-kbl-7560u
Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7985 -> Patchwork_16676
CI-20190529: 20190529
CI_DRM_7985: 127a4d2a1876607f644a73372ee37c4de6c8891e @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5458: 5f7e4ae6a91ed2c104593b8abd5b71a6cc96fc10 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16676: 794ca4c5268bfcad2d93392401da0ee843f86b53 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
794ca4c5268b drm/i915/selftests: Verify LRC isolation
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/selftests: Verify LRC isolation (rev3)
2020-02-22 11:27 [Intel-gfx] [PATCH] drm/i915/selftests: Verify LRC isolation Chris Wilson
2020-02-22 11:39 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Verify LRC isolation (rev3) Patchwork
2020-02-22 12:30 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2020-02-24 21:42 ` Patchwork
2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2020-02-24 21:42 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Verify LRC isolation (rev3)
URL : https://patchwork.freedesktop.org/series/73788/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7985_full -> Patchwork_16676_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_16676_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_16676_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_16676_full:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live_gt_lrc:
- shard-tglb: [PASS][1] -> [DMESG-FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-tglb3/igt@i915_selftest@live_gt_lrc.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-tglb2/igt@i915_selftest@live_gt_lrc.html
Known issues
------------
Here are the changes found in Patchwork_16676_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_balancer@hang:
- shard-tglb: [PASS][3] -> [FAIL][4] ([i915#1277])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-tglb3/igt@gem_exec_balancer@hang.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-tglb3/igt@gem_exec_balancer@hang.html
* igt@gem_exec_reuse@baggage:
- shard-apl: [PASS][5] -> [TIMEOUT][6] ([fdo#112271])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-apl8/igt@gem_exec_reuse@baggage.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-apl8/igt@gem_exec_reuse@baggage.html
* igt@gem_exec_schedule@preempt-queue-chain-bsd:
- shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#112146]) +1 similar issue
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-iclb8/igt@gem_exec_schedule@preempt-queue-chain-bsd.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-iclb1/igt@gem_exec_schedule@preempt-queue-chain-bsd.html
* igt@gem_partial_pwrite_pread@writes-after-reads:
- shard-hsw: [PASS][9] -> [FAIL][10] ([i915#694])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-hsw2/igt@gem_partial_pwrite_pread@writes-after-reads.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-hsw2/igt@gem_partial_pwrite_pread@writes-after-reads.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-kbl: [PASS][11] -> [FAIL][12] ([i915#644])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-kbl6/igt@gem_ppgtt@flink-and-close-vma-leak.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-kbl7/igt@gem_ppgtt@flink-and-close-vma-leak.html
- shard-hsw: [PASS][13] -> [FAIL][14] ([i915#644])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-hsw7/igt@gem_ppgtt@flink-and-close-vma-leak.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-hsw2/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-kbl: [PASS][15] -> [DMESG-WARN][16] ([i915#180]) +2 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-kbl1/igt@i915_suspend@fence-restore-tiled2untiled.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-kbl7/igt@i915_suspend@fence-restore-tiled2untiled.html
* igt@kms_cursor_edge_walk@pipe-b-128x128-right-edge:
- shard-kbl: [PASS][17] -> [DMESG-WARN][18] ([i915#56])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-kbl1/igt@kms_cursor_edge_walk@pipe-b-128x128-right-edge.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-kbl1/igt@kms_cursor_edge_walk@pipe-b-128x128-right-edge.html
* igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
- shard-hsw: [PASS][19] -> [FAIL][20] ([i915#96])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-hsw1/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-hsw6/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
* igt@kms_flip@flip-vs-rmfb:
- shard-apl: [PASS][21] -> [DMESG-WARN][22] ([i915#1297])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-apl3/igt@kms_flip@flip-vs-rmfb.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-apl1/igt@kms_flip@flip-vs-rmfb.html
* igt@kms_flip@plain-flip-ts-check-interruptible:
- shard-kbl: [PASS][23] -> [INCOMPLETE][24] ([fdo#103665])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-kbl4/igt@kms_flip@plain-flip-ts-check-interruptible.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-kbl4/igt@kms_flip@plain-flip-ts-check-interruptible.html
* igt@kms_frontbuffer_tracking@fbcpsr-slowdraw:
- shard-tglb: [PASS][25] -> [SKIP][26] ([i915#668]) +2 similar issues
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-tglb5/igt@kms_frontbuffer_tracking@fbcpsr-slowdraw.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-slowdraw.html
* igt@kms_plane_lowres@pipe-a-tiling-y:
- shard-glk: [PASS][27] -> [FAIL][28] ([i915#899])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-glk1/igt@kms_plane_lowres@pipe-a-tiling-y.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-glk5/igt@kms_plane_lowres@pipe-a-tiling-y.html
* igt@kms_psr@psr2_sprite_plane_onoff:
- shard-iclb: [PASS][29] -> [SKIP][30] ([fdo#109441])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-iclb2/igt@kms_psr@psr2_sprite_plane_onoff.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-iclb1/igt@kms_psr@psr2_sprite_plane_onoff.html
* igt@kms_setmode@basic:
- shard-apl: [PASS][31] -> [FAIL][32] ([i915#31])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-apl7/igt@kms_setmode@basic.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-apl3/igt@kms_setmode@basic.html
- shard-hsw: [PASS][33] -> [FAIL][34] ([i915#31])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-hsw4/igt@kms_setmode@basic.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-hsw5/igt@kms_setmode@basic.html
* igt@kms_vblank@pipe-a-ts-continuation-suspend:
- shard-apl: [PASS][35] -> [DMESG-WARN][36] ([i915#180]) +1 similar issue
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-apl7/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-apl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
* igt@perf_pmu@init-busy-vcs1:
- shard-iclb: [PASS][37] -> [SKIP][38] ([fdo#112080]) +1 similar issue
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-iclb1/igt@perf_pmu@init-busy-vcs1.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-iclb8/igt@perf_pmu@init-busy-vcs1.html
* igt@prime_mmap_coherency@read:
- shard-hsw: [PASS][39] -> [FAIL][40] ([i915#914])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-hsw8/igt@prime_mmap_coherency@read.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-hsw1/igt@prime_mmap_coherency@read.html
* igt@prime_vgem@fence-wait-bsd2:
- shard-iclb: [PASS][41] -> [SKIP][42] ([fdo#109276]) +6 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-iclb4/igt@prime_vgem@fence-wait-bsd2.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-iclb8/igt@prime_vgem@fence-wait-bsd2.html
* igt@sw_sync@sync_multi_producer_single_consumer:
- shard-hsw: [PASS][43] -> [TIMEOUT][44] ([fdo#112271])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-hsw7/igt@sw_sync@sync_multi_producer_single_consumer.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-hsw4/igt@sw_sync@sync_multi_producer_single_consumer.html
#### Possible fixes ####
* igt@gem_caching@read-writes:
- shard-hsw: [FAIL][45] ([i915#694]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-hsw6/igt@gem_caching@read-writes.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-hsw4/igt@gem_caching@read-writes.html
* {igt@gem_ctx_persistence@engines-mixed-process@vcs0}:
- shard-apl: [FAIL][47] ([i915#679]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-apl4/igt@gem_ctx_persistence@engines-mixed-process@vcs0.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-apl3/igt@gem_ctx_persistence@engines-mixed-process@vcs0.html
* {igt@gem_ctx_persistence@engines-mixed-process@vecs0}:
- shard-apl: [INCOMPLETE][49] ([fdo#103927] / [i915#1197] / [i915#1239]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-apl4/igt@gem_ctx_persistence@engines-mixed-process@vecs0.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-apl3/igt@gem_ctx_persistence@engines-mixed-process@vecs0.html
* {igt@gem_exec_schedule@implicit-read-write-bsd}:
- shard-iclb: [SKIP][51] ([i915#677]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-iclb1/igt@gem_exec_schedule@implicit-read-write-bsd.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-iclb8/igt@gem_exec_schedule@implicit-read-write-bsd.html
* {igt@gem_exec_schedule@implicit-write-read-bsd1}:
- shard-iclb: [SKIP][53] ([fdo#109276] / [i915#677]) -> [PASS][54] +2 similar issues
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-iclb5/igt@gem_exec_schedule@implicit-write-read-bsd1.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-iclb4/igt@gem_exec_schedule@implicit-write-read-bsd1.html
* igt@gem_exec_schedule@independent-bsd:
- shard-iclb: [SKIP][55] ([fdo#112146]) -> [PASS][56] +2 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-iclb1/igt@gem_exec_schedule@independent-bsd.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-iclb7/igt@gem_exec_schedule@independent-bsd.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-apl: [FAIL][57] ([i915#644]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-apl3/igt@gem_ppgtt@flink-and-close-vma-leak.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-apl6/igt@gem_ppgtt@flink-and-close-vma-leak.html
- shard-tglb: [FAIL][59] ([i915#644]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-tglb6/igt@gem_ppgtt@flink-and-close-vma-leak.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-tglb5/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@kms_cursor_crc@pipe-b-cursor-256x256-random:
- shard-skl: [FAIL][61] ([i915#54]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-skl8/igt@kms_cursor_crc@pipe-b-cursor-256x256-random.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-skl7/igt@kms_cursor_crc@pipe-b-cursor-256x256-random.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-skl: [INCOMPLETE][63] ([i915#69]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-skl8/igt@kms_fbcon_fbt@psr-suspend.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-skl5/igt@kms_fbcon_fbt@psr-suspend.html
* igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible:
- shard-hsw: [INCOMPLETE][65] ([CI#80] / [i915#61]) -> [PASS][66]
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-hsw1/igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-hsw6/igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible.html
* igt@kms_flip@flip-vs-suspend:
- shard-skl: [INCOMPLETE][67] ([i915#221]) -> [PASS][68]
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-skl7/igt@kms_flip@flip-vs-suspend.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-skl8/igt@kms_flip@flip-vs-suspend.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
- shard-apl: [DMESG-WARN][69] ([i915#180]) -> [PASS][70] +1 similar issue
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-apl7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
- shard-skl: [FAIL][71] ([fdo#108145]) -> [PASS][72] +1 similar issue
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
* igt@kms_psr@psr2_cursor_blt:
- shard-iclb: [SKIP][73] ([fdo#109441]) -> [PASS][74]
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-iclb1/igt@kms_psr@psr2_cursor_blt.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html
* igt@kms_setmode@basic:
- shard-kbl: [FAIL][75] ([i915#31]) -> [PASS][76]
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-kbl7/igt@kms_setmode@basic.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-kbl2/igt@kms_setmode@basic.html
* igt@kms_vblank@pipe-a-ts-continuation-suspend:
- shard-kbl: [DMESG-WARN][77] ([i915#180]) -> [PASS][78] +4 similar issues
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-kbl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-kbl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
* igt@perf_pmu@busy-accuracy-98-vcs1:
- shard-iclb: [SKIP][79] ([fdo#112080]) -> [PASS][80] +7 similar issues
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-iclb6/igt@perf_pmu@busy-accuracy-98-vcs1.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-iclb2/igt@perf_pmu@busy-accuracy-98-vcs1.html
* igt@prime_busy@hang-bsd2:
- shard-iclb: [SKIP][81] ([fdo#109276]) -> [PASS][82] +11 similar issues
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-iclb6/igt@prime_busy@hang-bsd2.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-iclb2/igt@prime_busy@hang-bsd2.html
#### Warnings ####
* igt@gem_ctx_isolation@vcs1-nonpriv-switch:
- shard-iclb: [SKIP][83] ([fdo#112080]) -> [FAIL][84] ([IGT#28])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-iclb7/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-iclb1/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
* igt@i915_pm_rpm@legacy-planes-dpms:
- shard-snb: [SKIP][85] ([fdo#109271]) -> [INCOMPLETE][86] ([i915#82])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7985/shard-snb6/igt@i915_pm_rpm@legacy-planes-dpms.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/shard-snb1/igt@i915_pm_rpm@legacy-planes-dpms.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[CI#80]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/80
[IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28
[fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
[fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
[fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
[i915#1197]: https://gitlab.freedesktop.org/drm/intel/issues/1197
[i915#1239]: https://gitlab.freedesktop.org/drm/intel/issues/1239
[i915#1277]: https://gitlab.freedesktop.org/drm/intel/issues/1277
[i915#1297]: https://gitlab.freedesktop.org/drm/intel/issues/1297
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#221]: https://gitlab.freedesktop.org/drm/intel/issues/221
[i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
[i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
[i915#56]: https://gitlab.freedesktop.org/drm/intel/issues/56
[i915#61]: https://gitlab.freedesktop.org/drm/intel/issues/61
[i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
[i915#668]: https://gitlab.freedesktop.org/drm/intel/issues/668
[i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
[i915#679]: https://gitlab.freedesktop.org/drm/intel/issues/679
[i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
[i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
[i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82
[i915#899]: https://gitlab.freedesktop.org/drm/intel/issues/899
[i915#914]: https://gitlab.freedesktop.org/drm/intel/issues/914
[i915#96]: https://gitlab.freedesktop.org/drm/intel/issues/96
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7985 -> Patchwork_16676
CI-20190529: 20190529
CI_DRM_7985: 127a4d2a1876607f644a73372ee37c4de6c8891e @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5458: 5f7e4ae6a91ed2c104593b8abd5b71a6cc96fc10 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16676: 794ca4c5268bfcad2d93392401da0ee843f86b53 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16676/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2020-02-24 21:42 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-02-22 11:27 [Intel-gfx] [PATCH] drm/i915/selftests: Verify LRC isolation Chris Wilson
2020-02-22 11:39 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Verify LRC isolation (rev3) Patchwork
2020-02-22 12:30 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-02-24 21:42 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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