[Intel-gfx][PATCH 00/10] drm/i915: Introduce i915 based i915_MISSING_CASE macro and us it in i915

[Intel-gfx][PATCH 00/10] drm/i915: Introduce i915 based i915_MISSING_CASE macro and us it in i915

[Pankaj Bharadiya]

Existing MISSING_CASE macro uses WARN call to dump the stack trace.

Now that we have struct drm_device based drm_WARN, introduce struct
drm_i915_private based i915_MISSING_CASE macro which uses drm_WARN so
that device specific information will also get printed in backtrace.

Also, automatically convert the MISSING_CASE with i915 specific
i915_MISSING_CASE  variant using coccinelle semantic patch scripts.

i915_MISSING_CASE macro should be preferred over MISSING_CASE,
wherever possible.

Pankaj Bharadiya (10):
  drm/i915: Add i915 device based MISSING_CASE macro
  drm/i915/display/cdclk: Make MISSING_CASE backtrace i915 specific
  drm/i915/display/ddi: Make MISSING_CASE backtrace i915 specific
  drm/i915/display/display: Make MISSING_CASE backtrace i915 specific
  drm/i915/dp: Make MISSING_CASE backtrace i915 specific
  drm/i915/display/hdmi: Make MISSING_CASE backtrace i915 specific
  drm/i915/display: Make MISSING_CASE backtrace i915 specific
  drm/i915/gem: Make MISSING_CASE backtrace i915 specific
  drm/i915/gt: Make MISSING_CASE backtrace i915 specific
  drm/i915: Make MISSING_CASE backtrace i915 specific

 drivers/gpu/drm/i915/display/icl_dsi.c        |  8 +++--
 drivers/gpu/drm/i915/display/intel_bios.c     |  4 +--
 drivers/gpu/drm/i915/display/intel_bw.c       |  6 ++--
 drivers/gpu/drm/i915/display/intel_cdclk.c    | 19 +++++++-----
 .../gpu/drm/i915/display/intel_combo_phy.c    |  6 ++--
 drivers/gpu/drm/i915/display/intel_ddi.c      | 19 ++++++------
 drivers/gpu/drm/i915/display/intel_display.c  | 29 ++++++++++---------
 drivers/gpu/drm/i915/display/intel_dp.c       | 28 +++++++++---------
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 10 +++----
 drivers/gpu/drm/i915/display/intel_hdmi.c     | 12 ++++----
 drivers/gpu/drm/i915/display/intel_hotplug.c  |  2 +-
 drivers/gpu/drm/i915/display/intel_sprite.c   |  4 +--
 drivers/gpu/drm/i915/display/intel_tc.c       |  2 +-
 drivers/gpu/drm/i915/gem/i915_gem_stolen.c    | 17 +++++++----
 drivers/gpu/drm/i915/gt/intel_workarounds.c   |  6 ++--
 drivers/gpu/drm/i915/i915_debugfs.c           |  3 +-
 drivers/gpu/drm/i915/i915_drv.c               |  2 +-
 drivers/gpu/drm/i915/i915_gem_fence_reg.c     |  2 +-
 drivers/gpu/drm/i915/i915_gpu_error.c         |  2 +-
 drivers/gpu/drm/i915/i915_utils.h             |  4 +++
 drivers/gpu/drm/i915/intel_device_info.c      | 13 +++++----
 drivers/gpu/drm/i915/intel_pm.c               | 10 +++----
 22 files changed, 113 insertions(+), 95 deletions(-)

-- 
2.23.0

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[Intel-gfx] [PATCH 00/10] drm/i915: Introduce i915 based i915_MISSING_CASE macro and us it in i915

[Pankaj Bharadiya]

Existing MISSING_CASE macro uses WARN call to dump the stack trace.

Now that we have struct drm_device based drm_WARN, introduce struct
drm_i915_private based i915_MISSING_CASE macro which uses drm_WARN so
that device specific information will also get printed in backtrace.

Also, automatically convert the MISSING_CASE with i915 specific
i915_MISSING_CASE  variant using coccinelle semantic patch scripts.

i915_MISSING_CASE macro should be preferred over MISSING_CASE,
wherever possible.

Pankaj Bharadiya (10):
  drm/i915: Add i915 device based MISSING_CASE macro
  drm/i915/display/cdclk: Make MISSING_CASE backtrace i915 specific
  drm/i915/display/ddi: Make MISSING_CASE backtrace i915 specific
  drm/i915/display/display: Make MISSING_CASE backtrace i915 specific
  drm/i915/dp: Make MISSING_CASE backtrace i915 specific
  drm/i915/display/hdmi: Make MISSING_CASE backtrace i915 specific
  drm/i915/display: Make MISSING_CASE backtrace i915 specific
  drm/i915/gem: Make MISSING_CASE backtrace i915 specific
  drm/i915/gt: Make MISSING_CASE backtrace i915 specific
  drm/i915: Make MISSING_CASE backtrace i915 specific

 drivers/gpu/drm/i915/display/icl_dsi.c        |  8 +++--
 drivers/gpu/drm/i915/display/intel_bios.c     |  4 +--
 drivers/gpu/drm/i915/display/intel_bw.c       |  6 ++--
 drivers/gpu/drm/i915/display/intel_cdclk.c    | 19 +++++++-----
 .../gpu/drm/i915/display/intel_combo_phy.c    |  6 ++--
 drivers/gpu/drm/i915/display/intel_ddi.c      | 19 ++++++------
 drivers/gpu/drm/i915/display/intel_display.c  | 29 ++++++++++---------
 drivers/gpu/drm/i915/display/intel_dp.c       | 28 +++++++++---------
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 10 +++----
 drivers/gpu/drm/i915/display/intel_hdmi.c     | 12 ++++----
 drivers/gpu/drm/i915/display/intel_hotplug.c  |  2 +-
 drivers/gpu/drm/i915/display/intel_sprite.c   |  4 +--
 drivers/gpu/drm/i915/display/intel_tc.c       |  2 +-
 drivers/gpu/drm/i915/gem/i915_gem_stolen.c    | 17 +++++++----
 drivers/gpu/drm/i915/gt/intel_workarounds.c   |  6 ++--
 drivers/gpu/drm/i915/i915_debugfs.c           |  3 +-
 drivers/gpu/drm/i915/i915_drv.c               |  2 +-
 drivers/gpu/drm/i915/i915_gem_fence_reg.c     |  2 +-
 drivers/gpu/drm/i915/i915_gpu_error.c         |  2 +-
 drivers/gpu/drm/i915/i915_utils.h             |  4 +++
 drivers/gpu/drm/i915/intel_device_info.c      | 13 +++++----
 drivers/gpu/drm/i915/intel_pm.c               | 10 +++----
 22 files changed, 113 insertions(+), 95 deletions(-)

-- 
2.23.0

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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx][PATCH 01/10] drm/i915: Add i915 device based MISSING_CASE macro

[Pankaj Bharadiya]

Now that we have struct drm_device based drm_WARN, introduce struct
drm_i915_private based i915_MISSING_CASE macro which uses drm_WARN so
that device specific information will also get printed in backtrace.

i915_MISSING_CASE macro should be preferred over MISSING_CASE,
wherever possible.

Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
---
 drivers/gpu/drm/i915/i915_utils.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_utils.h b/drivers/gpu/drm/i915/i915_utils.h
index b0ade76bec90..f8db1eb9c1cc 100644
--- a/drivers/gpu/drm/i915/i915_utils.h
+++ b/drivers/gpu/drm/i915/i915_utils.h
@@ -52,6 +52,10 @@ struct timer_list;
 #define MISSING_CASE(x) WARN(1, "Missing case (%s == %ld)\n", \
 			     __stringify(x), (long)(x))
 
+#define i915_MISSING_CASE(i915, x) drm_WARN(&(i915)->drm, 1, \
+					    "Missing case (%s == %ld)\n", \
+					    __stringify(x), (long)(x))
+
 void __printf(3, 4)
 __i915_printk(struct drm_i915_private *dev_priv, const char *level,
 	      const char *fmt, ...);
-- 
2.23.0

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dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

[Intel-gfx] [PATCH 01/10] drm/i915: Add i915 device based MISSING_CASE macro

[Pankaj Bharadiya]

Now that we have struct drm_device based drm_WARN, introduce struct
drm_i915_private based i915_MISSING_CASE macro which uses drm_WARN so
that device specific information will also get printed in backtrace.

i915_MISSING_CASE macro should be preferred over MISSING_CASE,
wherever possible.

Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
---
 drivers/gpu/drm/i915/i915_utils.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_utils.h b/drivers/gpu/drm/i915/i915_utils.h
index b0ade76bec90..f8db1eb9c1cc 100644
--- a/drivers/gpu/drm/i915/i915_utils.h
+++ b/drivers/gpu/drm/i915/i915_utils.h
@@ -52,6 +52,10 @@ struct timer_list;
 #define MISSING_CASE(x) WARN(1, "Missing case (%s == %ld)\n", \
 			     __stringify(x), (long)(x))
 
+#define i915_MISSING_CASE(i915, x) drm_WARN(&(i915)->drm, 1, \
+					    "Missing case (%s == %ld)\n", \
+					    __stringify(x), (long)(x))
+
 void __printf(3, 4)
 __i915_printk(struct drm_i915_private *dev_priv, const char *level,
 	      const char *fmt, ...);
-- 
2.23.0

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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx][PATCH 02/10] drm/i915/display/cdclk: Make MISSING_CASE backtrace i915 specific

[Pankaj Bharadiya]

i915_MISSING_CASE macro includes the device information in the
backtrace, so we know what device the warnings originate from.

Covert MISSING_CASE calls with i915 specific i915_MISSING_CASE variant
in functions where drm_i915_private struct pointer is readily
available.

The conversion was done automatically with below coccinelle semantic
patch.

@rule1@
identifier func, T;
@@
func(...) {
...
struct drm_i915_private *T = ...;
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>
}

@rule2@
identifier func, T;
@@
func(struct drm_i915_private *T,...) {
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>

}

Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cdclk.c | 19 +++++++++++--------
 1 file changed, 11 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 0741d643455b..50d7415d0c4c 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -545,7 +545,7 @@ static void vlv_set_cdclk(struct drm_i915_private *dev_priv,
 	case 200000:
 		break;
 	default:
-		MISSING_CASE(cdclk);
+		i915_MISSING_CASE(dev_priv, cdclk);
 		return;
 	}
 
@@ -633,7 +633,7 @@ static void chv_set_cdclk(struct drm_i915_private *dev_priv,
 	case 200000:
 		break;
 	default:
-		MISSING_CASE(cdclk);
+		i915_MISSING_CASE(dev_priv, cdclk);
 		return;
 	}
 
@@ -762,7 +762,7 @@ static void bdw_set_cdclk(struct drm_i915_private *dev_priv,
 
 	switch (cdclk) {
 	default:
-		MISSING_CASE(cdclk);
+		i915_MISSING_CASE(dev_priv, cdclk);
 		/* fall through */
 	case 337500:
 		val |= LCPLL_CLK_FREQ_337_5_BDW;
@@ -868,7 +868,8 @@ static void skl_dpll0_update(struct drm_i915_private *dev_priv,
 		cdclk_config->vco = 8640000;
 		break;
 	default:
-		MISSING_CASE(val & DPLL_CTRL1_LINK_RATE_MASK(SKL_DPLL0));
+		i915_MISSING_CASE(dev_priv,
+				  val & DPLL_CTRL1_LINK_RATE_MASK(SKL_DPLL0));
 		break;
 	}
 }
@@ -902,7 +903,8 @@ static void skl_get_cdclk(struct drm_i915_private *dev_priv,
 			cdclk_config->cdclk = 617143;
 			break;
 		default:
-			MISSING_CASE(cdctl & CDCLK_FREQ_SEL_MASK);
+			i915_MISSING_CASE(dev_priv,
+					  cdctl & CDCLK_FREQ_SEL_MASK);
 			break;
 		}
 	} else {
@@ -920,7 +922,8 @@ static void skl_get_cdclk(struct drm_i915_private *dev_priv,
 			cdclk_config->cdclk = 675000;
 			break;
 		default:
-			MISSING_CASE(cdctl & CDCLK_FREQ_SEL_MASK);
+			i915_MISSING_CASE(dev_priv,
+					  cdctl & CDCLK_FREQ_SEL_MASK);
 			break;
 		}
 	}
@@ -1329,7 +1332,7 @@ static void icl_readout_refclk(struct drm_i915_private *dev_priv,
 
 	switch (dssm) {
 	default:
-		MISSING_CASE(dssm);
+		i915_MISSING_CASE(dev_priv, dssm);
 		/* fall through */
 	case ICL_DSSM_CDCLK_PLL_REFCLK_24MHz:
 		cdclk_config->ref = 24000;
@@ -1419,7 +1422,7 @@ static void bxt_get_cdclk(struct drm_i915_private *dev_priv,
 		div = 8;
 		break;
 	default:
-		MISSING_CASE(divider);
+		i915_MISSING_CASE(dev_priv, divider);
 		return;
 	}
 
-- 
2.23.0

_______________________________________________
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[Intel-gfx] [PATCH 02/10] drm/i915/display/cdclk: Make MISSING_CASE backtrace i915 specific

[Pankaj Bharadiya]

i915_MISSING_CASE macro includes the device information in the
backtrace, so we know what device the warnings originate from.

Covert MISSING_CASE calls with i915 specific i915_MISSING_CASE variant
in functions where drm_i915_private struct pointer is readily
available.

The conversion was done automatically with below coccinelle semantic
patch.

@rule1@
identifier func, T;
@@
func(...) {
...
struct drm_i915_private *T = ...;
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>
}

@rule2@
identifier func, T;
@@
func(struct drm_i915_private *T,...) {
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>

}

Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cdclk.c | 19 +++++++++++--------
 1 file changed, 11 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 0741d643455b..50d7415d0c4c 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -545,7 +545,7 @@ static void vlv_set_cdclk(struct drm_i915_private *dev_priv,
 	case 200000:
 		break;
 	default:
-		MISSING_CASE(cdclk);
+		i915_MISSING_CASE(dev_priv, cdclk);
 		return;
 	}
 
@@ -633,7 +633,7 @@ static void chv_set_cdclk(struct drm_i915_private *dev_priv,
 	case 200000:
 		break;
 	default:
-		MISSING_CASE(cdclk);
+		i915_MISSING_CASE(dev_priv, cdclk);
 		return;
 	}
 
@@ -762,7 +762,7 @@ static void bdw_set_cdclk(struct drm_i915_private *dev_priv,
 
 	switch (cdclk) {
 	default:
-		MISSING_CASE(cdclk);
+		i915_MISSING_CASE(dev_priv, cdclk);
 		/* fall through */
 	case 337500:
 		val |= LCPLL_CLK_FREQ_337_5_BDW;
@@ -868,7 +868,8 @@ static void skl_dpll0_update(struct drm_i915_private *dev_priv,
 		cdclk_config->vco = 8640000;
 		break;
 	default:
-		MISSING_CASE(val & DPLL_CTRL1_LINK_RATE_MASK(SKL_DPLL0));
+		i915_MISSING_CASE(dev_priv,
+				  val & DPLL_CTRL1_LINK_RATE_MASK(SKL_DPLL0));
 		break;
 	}
 }
@@ -902,7 +903,8 @@ static void skl_get_cdclk(struct drm_i915_private *dev_priv,
 			cdclk_config->cdclk = 617143;
 			break;
 		default:
-			MISSING_CASE(cdctl & CDCLK_FREQ_SEL_MASK);
+			i915_MISSING_CASE(dev_priv,
+					  cdctl & CDCLK_FREQ_SEL_MASK);
 			break;
 		}
 	} else {
@@ -920,7 +922,8 @@ static void skl_get_cdclk(struct drm_i915_private *dev_priv,
 			cdclk_config->cdclk = 675000;
 			break;
 		default:
-			MISSING_CASE(cdctl & CDCLK_FREQ_SEL_MASK);
+			i915_MISSING_CASE(dev_priv,
+					  cdctl & CDCLK_FREQ_SEL_MASK);
 			break;
 		}
 	}
@@ -1329,7 +1332,7 @@ static void icl_readout_refclk(struct drm_i915_private *dev_priv,
 
 	switch (dssm) {
 	default:
-		MISSING_CASE(dssm);
+		i915_MISSING_CASE(dev_priv, dssm);
 		/* fall through */
 	case ICL_DSSM_CDCLK_PLL_REFCLK_24MHz:
 		cdclk_config->ref = 24000;
@@ -1419,7 +1422,7 @@ static void bxt_get_cdclk(struct drm_i915_private *dev_priv,
 		div = 8;
 		break;
 	default:
-		MISSING_CASE(divider);
+		i915_MISSING_CASE(dev_priv, divider);
 		return;
 	}
 
-- 
2.23.0

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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx][PATCH 03/10] drm/i915/display/ddi: Make MISSING_CASE backtrace i915 specific

[Pankaj Bharadiya]

i915_MISSING_CASE macro includes the device information in the
backtrace, so we know what device the warnings originate from.

Covert MISSING_CASE calls with i915 specific i915_MISSING_CASE variant
in functions where drm_i915_private struct pointer is readily
available.

The conversion was done automatically with below coccinelle semantic
patch.

@rule1@
identifier func, T;
@@
func(...) {
...
struct drm_i915_private *T = ...;
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>
}

@rule2@
identifier func, T;
@@
func(struct drm_i915_private *T,...) {
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>

}

Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 19 ++++++++++---------
 1 file changed, 10 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 9f7d1d7189ae..e060c5e2fbb1 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -873,7 +873,7 @@ cnl_get_buf_trans_hdmi(struct drm_i915_private *dev_priv, int *n_entries)
 		return cnl_ddi_translations_hdmi_1_05V;
 	} else {
 		*n_entries = 1; /* shut up gcc */
-		MISSING_CASE(voltage);
+		i915_MISSING_CASE(dev_priv, voltage);
 	}
 	return NULL;
 }
@@ -894,7 +894,7 @@ cnl_get_buf_trans_dp(struct drm_i915_private *dev_priv, int *n_entries)
 		return cnl_ddi_translations_dp_1_05V;
 	} else {
 		*n_entries = 1; /* shut up gcc */
-		MISSING_CASE(voltage);
+		i915_MISSING_CASE(dev_priv, voltage);
 	}
 	return NULL;
 }
@@ -916,7 +916,7 @@ cnl_get_buf_trans_edp(struct drm_i915_private *dev_priv, int *n_entries)
 			return cnl_ddi_translations_edp_1_05V;
 		} else {
 			*n_entries = 1; /* shut up gcc */
-			MISSING_CASE(voltage);
+			i915_MISSING_CASE(dev_priv, voltage);
 		}
 		return NULL;
 	} else {
@@ -1360,7 +1360,7 @@ static int hsw_ddi_calc_wrpll_link(struct drm_i915_private *dev_priv,
 		refclk = 2700;
 		break;
 	default:
-		MISSING_CASE(wrpll);
+		i915_MISSING_CASE(dev_priv, wrpll);
 		return 0;
 	}
 
@@ -1500,7 +1500,7 @@ static int icl_calc_tbt_pll_link(struct drm_i915_private *dev_priv,
 	case DDI_CLK_SEL_TBT_810:
 		return 810000;
 	default:
-		MISSING_CASE(val);
+		i915_MISSING_CASE(dev_priv, val);
 		return 0;
 	}
 }
@@ -1553,7 +1553,7 @@ static int icl_calc_mg_pll_link(struct drm_i915_private *dev_priv,
 		div1 = 7;
 		break;
 	default:
-		MISSING_CASE(pll_state->mg_clktop2_hsclkctl);
+		i915_MISSING_CASE(dev_priv, pll_state->mg_clktop2_hsclkctl);
 		return 0;
 	}
 
@@ -1841,7 +1841,7 @@ void intel_ddi_set_dp_msa(const struct intel_crtc_state *crtc_state,
 		temp |= DP_MSA_MISC_12_BPC;
 		break;
 	default:
-		MISSING_CASE(crtc_state->pipe_bpp);
+		i915_MISSING_CASE(dev_priv, crtc_state->pipe_bpp);
 		break;
 	}
 
@@ -2156,7 +2156,8 @@ static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder,
 
 		switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
 		default:
-			MISSING_CASE(tmp & TRANS_DDI_EDP_INPUT_MASK);
+			i915_MISSING_CASE(dev_priv,
+					  tmp & TRANS_DDI_EDP_INPUT_MASK);
 			/* fallthrough */
 		case TRANS_DDI_EDP_INPUT_A_ON:
 		case TRANS_DDI_EDP_INPUT_A_ONOFF:
@@ -3334,7 +3335,7 @@ icl_program_mg_dp_mode(struct intel_digital_port *intel_dig_port,
 		}
 		break;
 	default:
-		MISSING_CASE(pin_assignment);
+		i915_MISSING_CASE(dev_priv, pin_assignment);
 	}
 
 	if (INTEL_GEN(dev_priv) >= 12) {
-- 
2.23.0

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[Intel-gfx] [PATCH 03/10] drm/i915/display/ddi: Make MISSING_CASE backtrace i915 specific

[Pankaj Bharadiya]

i915_MISSING_CASE macro includes the device information in the
backtrace, so we know what device the warnings originate from.

Covert MISSING_CASE calls with i915 specific i915_MISSING_CASE variant
in functions where drm_i915_private struct pointer is readily
available.

The conversion was done automatically with below coccinelle semantic
patch.

@rule1@
identifier func, T;
@@
func(...) {
...
struct drm_i915_private *T = ...;
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>
}

@rule2@
identifier func, T;
@@
func(struct drm_i915_private *T,...) {
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>

}

Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 19 ++++++++++---------
 1 file changed, 10 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 9f7d1d7189ae..e060c5e2fbb1 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -873,7 +873,7 @@ cnl_get_buf_trans_hdmi(struct drm_i915_private *dev_priv, int *n_entries)
 		return cnl_ddi_translations_hdmi_1_05V;
 	} else {
 		*n_entries = 1; /* shut up gcc */
-		MISSING_CASE(voltage);
+		i915_MISSING_CASE(dev_priv, voltage);
 	}
 	return NULL;
 }
@@ -894,7 +894,7 @@ cnl_get_buf_trans_dp(struct drm_i915_private *dev_priv, int *n_entries)
 		return cnl_ddi_translations_dp_1_05V;
 	} else {
 		*n_entries = 1; /* shut up gcc */
-		MISSING_CASE(voltage);
+		i915_MISSING_CASE(dev_priv, voltage);
 	}
 	return NULL;
 }
@@ -916,7 +916,7 @@ cnl_get_buf_trans_edp(struct drm_i915_private *dev_priv, int *n_entries)
 			return cnl_ddi_translations_edp_1_05V;
 		} else {
 			*n_entries = 1; /* shut up gcc */
-			MISSING_CASE(voltage);
+			i915_MISSING_CASE(dev_priv, voltage);
 		}
 		return NULL;
 	} else {
@@ -1360,7 +1360,7 @@ static int hsw_ddi_calc_wrpll_link(struct drm_i915_private *dev_priv,
 		refclk = 2700;
 		break;
 	default:
-		MISSING_CASE(wrpll);
+		i915_MISSING_CASE(dev_priv, wrpll);
 		return 0;
 	}
 
@@ -1500,7 +1500,7 @@ static int icl_calc_tbt_pll_link(struct drm_i915_private *dev_priv,
 	case DDI_CLK_SEL_TBT_810:
 		return 810000;
 	default:
-		MISSING_CASE(val);
+		i915_MISSING_CASE(dev_priv, val);
 		return 0;
 	}
 }
@@ -1553,7 +1553,7 @@ static int icl_calc_mg_pll_link(struct drm_i915_private *dev_priv,
 		div1 = 7;
 		break;
 	default:
-		MISSING_CASE(pll_state->mg_clktop2_hsclkctl);
+		i915_MISSING_CASE(dev_priv, pll_state->mg_clktop2_hsclkctl);
 		return 0;
 	}
 
@@ -1841,7 +1841,7 @@ void intel_ddi_set_dp_msa(const struct intel_crtc_state *crtc_state,
 		temp |= DP_MSA_MISC_12_BPC;
 		break;
 	default:
-		MISSING_CASE(crtc_state->pipe_bpp);
+		i915_MISSING_CASE(dev_priv, crtc_state->pipe_bpp);
 		break;
 	}
 
@@ -2156,7 +2156,8 @@ static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder,
 
 		switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
 		default:
-			MISSING_CASE(tmp & TRANS_DDI_EDP_INPUT_MASK);
+			i915_MISSING_CASE(dev_priv,
+					  tmp & TRANS_DDI_EDP_INPUT_MASK);
 			/* fallthrough */
 		case TRANS_DDI_EDP_INPUT_A_ON:
 		case TRANS_DDI_EDP_INPUT_A_ONOFF:
@@ -3334,7 +3335,7 @@ icl_program_mg_dp_mode(struct intel_digital_port *intel_dig_port,
 		}
 		break;
 	default:
-		MISSING_CASE(pin_assignment);
+		i915_MISSING_CASE(dev_priv, pin_assignment);
 	}
 
 	if (INTEL_GEN(dev_priv) >= 12) {
-- 
2.23.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx][PATCH 04/10] drm/i915/display/display: Make MISSING_CASE backtrace i915 specific

[Pankaj Bharadiya]

i915_MISSING_CASE macro includes the device information in the
backtrace, so we know what device the warnings originate from.

Covert MISSING_CASE calls with i915 specific i915_MISSING_CASE variant
in functions where drm_i915_private struct pointer is readily
available.

The conversion was done automatically with below coccinelle semantic
patch.

@rule1@
identifier func, T;
@@
func(...) {
...
struct drm_i915_private *T = ...;
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>
}

@rule2@
identifier func, T;
@@
func(struct drm_i915_private *T,...) {
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>

}

Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 29 ++++++++++----------
 1 file changed, 15 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 3031e64ee518..b532e62128e8 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1229,7 +1229,7 @@ void assert_panel_unlocked(struct drm_i915_private *dev_priv, enum pipe pipe)
 			intel_dp_port_enabled(dev_priv, PCH_DP_D, PORT_D, &panel_pipe);
 			break;
 		default:
-			MISSING_CASE(port_sel);
+			i915_MISSING_CASE(dev_priv, port_sel);
 			break;
 		}
 	} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
@@ -2051,12 +2051,12 @@ intel_tile_width_bytes(const struct drm_framebuffer *fb, int color_plane)
 		case 16:
 			return 256;
 		default:
-			MISSING_CASE(cpp);
+			i915_MISSING_CASE(dev_priv, cpp);
 			return cpp;
 		}
 		break;
 	default:
-		MISSING_CASE(fb->modifier);
+		i915_MISSING_CASE(dev_priv, fb->modifier);
 		return cpp;
 	}
 }
@@ -2194,7 +2194,7 @@ static unsigned int intel_surf_alignment(const struct drm_framebuffer *fb,
 	case I915_FORMAT_MOD_Yf_TILED:
 		return 1 * 1024 * 1024;
 	default:
-		MISSING_CASE(fb->modifier);
+		i915_MISSING_CASE(dev_priv, fb->modifier);
 		return 0;
 	}
 }
@@ -3433,7 +3433,7 @@ initial_plane_vma(struct drm_i915_private *i915,
 			plane_config->tiling;
 		break;
 	default:
-		MISSING_CASE(plane_config->tiling);
+		i915_MISSING_CASE(i915, plane_config->tiling);
 		goto err_obj;
 	}
 
@@ -4225,7 +4225,7 @@ static u32 i9xx_plane_ctl(const struct intel_crtc_state *crtc_state,
 		dspcntr |= DISPPLANE_RGBX161616;
 		break;
 	default:
-		MISSING_CASE(fb->format->format);
+		i915_MISSING_CASE(dev_priv, fb->format->format);
 		return 0;
 	}
 
@@ -7307,7 +7307,7 @@ intel_aux_power_domain(struct intel_digital_port *dig_port)
 		case AUX_CH_G:
 			return POWER_DOMAIN_AUX_G_TBT;
 		default:
-			MISSING_CASE(dig_port->aux_ch);
+			i915_MISSING_CASE(dev_priv, dig_port->aux_ch);
 			return POWER_DOMAIN_AUX_C_TBT;
 		}
 	}
@@ -7328,7 +7328,7 @@ intel_aux_power_domain(struct intel_digital_port *dig_port)
 	case AUX_CH_G:
 		return POWER_DOMAIN_AUX_G;
 	default:
-		MISSING_CASE(dig_port->aux_ch);
+		i915_MISSING_CASE(dev_priv, dig_port->aux_ch);
 		return POWER_DOMAIN_AUX_A;
 	}
 }
@@ -10109,7 +10109,7 @@ static void bdw_set_pipemisc(const struct intel_crtc_state *crtc_state)
 		val |= PIPEMISC_DITHER_12_BPC;
 		break;
 	default:
-		MISSING_CASE(crtc_state->pipe_bpp);
+		i915_MISSING_CASE(dev_priv, crtc_state->pipe_bpp);
 		break;
 	}
 
@@ -10149,7 +10149,7 @@ int bdw_get_pipemisc_bpp(struct intel_crtc *crtc)
 	case PIPEMISC_DITHER_12_BPC:
 		return 36;
 	default:
-		MISSING_CASE(tmp);
+		i915_MISSING_CASE(dev_priv, tmp);
 		return 0;
 	}
 }
@@ -10519,7 +10519,7 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
 			fb->modifier = I915_FORMAT_MOD_Yf_TILED;
 		break;
 	default:
-		MISSING_CASE(tiling);
+		i915_MISSING_CASE(dev_priv, tiling);
 		goto error;
 	}
 
@@ -10861,7 +10861,7 @@ static void hsw_get_ddi_pll(struct drm_i915_private *dev_priv, enum port port,
 		id = DPLL_ID_LCPLL_2700;
 		break;
 	default:
-		MISSING_CASE(ddi_pll_sel);
+		i915_MISSING_CASE(dev_priv, ddi_pll_sel);
 		/* fall through */
 	case PORT_CLK_SEL_NONE:
 		return;
@@ -11622,7 +11622,8 @@ static u32 i9xx_cursor_ctl(const struct intel_crtc_state *crtc_state,
 		cntl |= MCURSOR_MODE_256_ARGB_AX;
 		break;
 	default:
-		MISSING_CASE(drm_rect_width(&plane_state->uapi.dst));
+		i915_MISSING_CASE(dev_priv,
+				  drm_rect_width(&plane_state->uapi.dst));
 		return 0;
 	}
 
@@ -12601,7 +12602,7 @@ static int icl_check_nv12_planes(struct intel_crtc_state *crtc_state)
 			else if (linked->id == PLANE_SPRITE4)
 				plane_state->cus_ctl |= PLANE_CUS_PLANE_6;
 			else
-				MISSING_CASE(linked->id);
+				i915_MISSING_CASE(dev_priv, linked->id);
 		}
 	}
 
-- 
2.23.0

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

[Intel-gfx] [PATCH 04/10] drm/i915/display/display: Make MISSING_CASE backtrace i915 specific

[Pankaj Bharadiya]

i915_MISSING_CASE macro includes the device information in the
backtrace, so we know what device the warnings originate from.

Covert MISSING_CASE calls with i915 specific i915_MISSING_CASE variant
in functions where drm_i915_private struct pointer is readily
available.

The conversion was done automatically with below coccinelle semantic
patch.

@rule1@
identifier func, T;
@@
func(...) {
...
struct drm_i915_private *T = ...;
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>
}

@rule2@
identifier func, T;
@@
func(struct drm_i915_private *T,...) {
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>

}

Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 29 ++++++++++----------
 1 file changed, 15 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 3031e64ee518..b532e62128e8 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1229,7 +1229,7 @@ void assert_panel_unlocked(struct drm_i915_private *dev_priv, enum pipe pipe)
 			intel_dp_port_enabled(dev_priv, PCH_DP_D, PORT_D, &panel_pipe);
 			break;
 		default:
-			MISSING_CASE(port_sel);
+			i915_MISSING_CASE(dev_priv, port_sel);
 			break;
 		}
 	} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
@@ -2051,12 +2051,12 @@ intel_tile_width_bytes(const struct drm_framebuffer *fb, int color_plane)
 		case 16:
 			return 256;
 		default:
-			MISSING_CASE(cpp);
+			i915_MISSING_CASE(dev_priv, cpp);
 			return cpp;
 		}
 		break;
 	default:
-		MISSING_CASE(fb->modifier);
+		i915_MISSING_CASE(dev_priv, fb->modifier);
 		return cpp;
 	}
 }
@@ -2194,7 +2194,7 @@ static unsigned int intel_surf_alignment(const struct drm_framebuffer *fb,
 	case I915_FORMAT_MOD_Yf_TILED:
 		return 1 * 1024 * 1024;
 	default:
-		MISSING_CASE(fb->modifier);
+		i915_MISSING_CASE(dev_priv, fb->modifier);
 		return 0;
 	}
 }
@@ -3433,7 +3433,7 @@ initial_plane_vma(struct drm_i915_private *i915,
 			plane_config->tiling;
 		break;
 	default:
-		MISSING_CASE(plane_config->tiling);
+		i915_MISSING_CASE(i915, plane_config->tiling);
 		goto err_obj;
 	}
 
@@ -4225,7 +4225,7 @@ static u32 i9xx_plane_ctl(const struct intel_crtc_state *crtc_state,
 		dspcntr |= DISPPLANE_RGBX161616;
 		break;
 	default:
-		MISSING_CASE(fb->format->format);
+		i915_MISSING_CASE(dev_priv, fb->format->format);
 		return 0;
 	}
 
@@ -7307,7 +7307,7 @@ intel_aux_power_domain(struct intel_digital_port *dig_port)
 		case AUX_CH_G:
 			return POWER_DOMAIN_AUX_G_TBT;
 		default:
-			MISSING_CASE(dig_port->aux_ch);
+			i915_MISSING_CASE(dev_priv, dig_port->aux_ch);
 			return POWER_DOMAIN_AUX_C_TBT;
 		}
 	}
@@ -7328,7 +7328,7 @@ intel_aux_power_domain(struct intel_digital_port *dig_port)
 	case AUX_CH_G:
 		return POWER_DOMAIN_AUX_G;
 	default:
-		MISSING_CASE(dig_port->aux_ch);
+		i915_MISSING_CASE(dev_priv, dig_port->aux_ch);
 		return POWER_DOMAIN_AUX_A;
 	}
 }
@@ -10109,7 +10109,7 @@ static void bdw_set_pipemisc(const struct intel_crtc_state *crtc_state)
 		val |= PIPEMISC_DITHER_12_BPC;
 		break;
 	default:
-		MISSING_CASE(crtc_state->pipe_bpp);
+		i915_MISSING_CASE(dev_priv, crtc_state->pipe_bpp);
 		break;
 	}
 
@@ -10149,7 +10149,7 @@ int bdw_get_pipemisc_bpp(struct intel_crtc *crtc)
 	case PIPEMISC_DITHER_12_BPC:
 		return 36;
 	default:
-		MISSING_CASE(tmp);
+		i915_MISSING_CASE(dev_priv, tmp);
 		return 0;
 	}
 }
@@ -10519,7 +10519,7 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
 			fb->modifier = I915_FORMAT_MOD_Yf_TILED;
 		break;
 	default:
-		MISSING_CASE(tiling);
+		i915_MISSING_CASE(dev_priv, tiling);
 		goto error;
 	}
 
@@ -10861,7 +10861,7 @@ static void hsw_get_ddi_pll(struct drm_i915_private *dev_priv, enum port port,
 		id = DPLL_ID_LCPLL_2700;
 		break;
 	default:
-		MISSING_CASE(ddi_pll_sel);
+		i915_MISSING_CASE(dev_priv, ddi_pll_sel);
 		/* fall through */
 	case PORT_CLK_SEL_NONE:
 		return;
@@ -11622,7 +11622,8 @@ static u32 i9xx_cursor_ctl(const struct intel_crtc_state *crtc_state,
 		cntl |= MCURSOR_MODE_256_ARGB_AX;
 		break;
 	default:
-		MISSING_CASE(drm_rect_width(&plane_state->uapi.dst));
+		i915_MISSING_CASE(dev_priv,
+				  drm_rect_width(&plane_state->uapi.dst));
 		return 0;
 	}
 
@@ -12601,7 +12602,7 @@ static int icl_check_nv12_planes(struct intel_crtc_state *crtc_state)
 			else if (linked->id == PLANE_SPRITE4)
 				plane_state->cus_ctl |= PLANE_CUS_PLANE_6;
 			else
-				MISSING_CASE(linked->id);
+				i915_MISSING_CASE(dev_priv, linked->id);
 		}
 	}
 
-- 
2.23.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx][PATCH 05/10] drm/i915/dp: Make MISSING_CASE backtrace i915 specific

[Pankaj Bharadiya]

i915_MISSING_CASE macro includes the device information in the
backtrace, so we know what device the warnings originate from.

Covert MISSING_CASE calls with i915 specific i915_MISSING_CASE variant
in functions where drm_i915_private struct pointer is readily
available.

The conversion was done automatically with below coccinelle semantic
patch.

@rule1@
identifier func, T;
@@
func(...) {
...
struct drm_i915_private *T = ...;
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>
}

@rule2@
identifier func, T;
@@
func(struct drm_i915_private *T,...) {
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>

}

Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 28 ++++++++++++-------------
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 0a5a9197f8f5..68e4faf5ff96 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1619,7 +1619,7 @@ static i915_reg_t g4x_aux_ctl_reg(struct intel_dp *intel_dp)
 	case AUX_CH_D:
 		return DP_AUX_CH_CTL(aux_ch);
 	default:
-		MISSING_CASE(aux_ch);
+		i915_MISSING_CASE(dev_priv, aux_ch);
 		return DP_AUX_CH_CTL(AUX_CH_B);
 	}
 }
@@ -1636,7 +1636,7 @@ static i915_reg_t g4x_aux_data_reg(struct intel_dp *intel_dp, int index)
 	case AUX_CH_D:
 		return DP_AUX_CH_DATA(aux_ch, index);
 	default:
-		MISSING_CASE(aux_ch);
+		i915_MISSING_CASE(dev_priv, aux_ch);
 		return DP_AUX_CH_DATA(AUX_CH_B, index);
 	}
 }
@@ -1655,7 +1655,7 @@ static i915_reg_t ilk_aux_ctl_reg(struct intel_dp *intel_dp)
 	case AUX_CH_D:
 		return PCH_DP_AUX_CH_CTL(aux_ch);
 	default:
-		MISSING_CASE(aux_ch);
+		i915_MISSING_CASE(dev_priv, aux_ch);
 		return DP_AUX_CH_CTL(AUX_CH_A);
 	}
 }
@@ -1674,7 +1674,7 @@ static i915_reg_t ilk_aux_data_reg(struct intel_dp *intel_dp, int index)
 	case AUX_CH_D:
 		return PCH_DP_AUX_CH_DATA(aux_ch, index);
 	default:
-		MISSING_CASE(aux_ch);
+		i915_MISSING_CASE(dev_priv, aux_ch);
 		return DP_AUX_CH_DATA(AUX_CH_A, index);
 	}
 }
@@ -1695,7 +1695,7 @@ static i915_reg_t skl_aux_ctl_reg(struct intel_dp *intel_dp)
 	case AUX_CH_G:
 		return DP_AUX_CH_CTL(aux_ch);
 	default:
-		MISSING_CASE(aux_ch);
+		i915_MISSING_CASE(dev_priv, aux_ch);
 		return DP_AUX_CH_CTL(AUX_CH_A);
 	}
 }
@@ -1716,7 +1716,7 @@ static i915_reg_t skl_aux_data_reg(struct intel_dp *intel_dp, int index)
 	case AUX_CH_G:
 		return DP_AUX_CH_DATA(aux_ch, index);
 	default:
-		MISSING_CASE(aux_ch);
+		i915_MISSING_CASE(dev_priv, aux_ch);
 		return DP_AUX_CH_DATA(AUX_CH_A, index);
 	}
 }
@@ -5417,7 +5417,7 @@ static bool ibx_digital_port_connected(struct intel_encoder *encoder)
 		bit = SDE_PORTD_HOTPLUG;
 		break;
 	default:
-		MISSING_CASE(encoder->hpd_pin);
+		i915_MISSING_CASE(dev_priv, encoder->hpd_pin);
 		return false;
 	}
 
@@ -5440,7 +5440,7 @@ static bool cpt_digital_port_connected(struct intel_encoder *encoder)
 		bit = SDE_PORTD_HOTPLUG_CPT;
 		break;
 	default:
-		MISSING_CASE(encoder->hpd_pin);
+		i915_MISSING_CASE(dev_priv, encoder->hpd_pin);
 		return false;
 	}
 
@@ -5482,7 +5482,7 @@ static bool g4x_digital_port_connected(struct intel_encoder *encoder)
 		bit = PORTD_HOTPLUG_LIVE_STATUS_G4X;
 		break;
 	default:
-		MISSING_CASE(encoder->hpd_pin);
+		i915_MISSING_CASE(dev_priv, encoder->hpd_pin);
 		return false;
 	}
 
@@ -5505,7 +5505,7 @@ static bool gm45_digital_port_connected(struct intel_encoder *encoder)
 		bit = PORTD_HOTPLUG_LIVE_STATUS_GM45;
 		break;
 	default:
-		MISSING_CASE(encoder->hpd_pin);
+		i915_MISSING_CASE(dev_priv, encoder->hpd_pin);
 		return false;
 	}
 
@@ -5568,7 +5568,7 @@ static bool bxt_digital_port_connected(struct intel_encoder *encoder)
 		bit = BXT_DE_PORT_HP_DDIC;
 		break;
 	default:
-		MISSING_CASE(encoder->hpd_pin);
+		i915_MISSING_CASE(dev_priv, encoder->hpd_pin);
 		return false;
 	}
 
@@ -5595,7 +5595,7 @@ static bool icp_digital_port_connected(struct intel_encoder *encoder)
 	else if (intel_phy_is_tc(dev_priv, phy))
 		return intel_tc_port_connected(dig_port);
 	else
-		MISSING_CASE(encoder->hpd_pin);
+		i915_MISSING_CASE(dev_priv, encoder->hpd_pin);
 
 	return false;
 }
@@ -5637,7 +5637,7 @@ static bool __intel_digital_port_connected(struct intel_encoder *encoder)
 	else if (IS_GEN(dev_priv, 5))
 		return ilk_digital_port_connected(encoder);
 
-	MISSING_CASE(INTEL_GEN(dev_priv));
+	i915_MISSING_CASE(dev_priv, INTEL_GEN(dev_priv));
 	return false;
 }
 
@@ -7090,7 +7090,7 @@ intel_dp_init_panel_power_sequencer_registers(struct intel_dp *intel_dp,
 			port_sel = PANEL_PORT_SELECT_DPD;
 			break;
 		default:
-			MISSING_CASE(port);
+			i915_MISSING_CASE(dev_priv, port);
 			break;
 		}
 	}
-- 
2.23.0

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

[Intel-gfx] [PATCH 05/10] drm/i915/dp: Make MISSING_CASE backtrace i915 specific

[Pankaj Bharadiya]

i915_MISSING_CASE macro includes the device information in the
backtrace, so we know what device the warnings originate from.

Covert MISSING_CASE calls with i915 specific i915_MISSING_CASE variant
in functions where drm_i915_private struct pointer is readily
available.

The conversion was done automatically with below coccinelle semantic
patch.

@rule1@
identifier func, T;
@@
func(...) {
...
struct drm_i915_private *T = ...;
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>
}

@rule2@
identifier func, T;
@@
func(struct drm_i915_private *T,...) {
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>

}

Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 28 ++++++++++++-------------
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 0a5a9197f8f5..68e4faf5ff96 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1619,7 +1619,7 @@ static i915_reg_t g4x_aux_ctl_reg(struct intel_dp *intel_dp)
 	case AUX_CH_D:
 		return DP_AUX_CH_CTL(aux_ch);
 	default:
-		MISSING_CASE(aux_ch);
+		i915_MISSING_CASE(dev_priv, aux_ch);
 		return DP_AUX_CH_CTL(AUX_CH_B);
 	}
 }
@@ -1636,7 +1636,7 @@ static i915_reg_t g4x_aux_data_reg(struct intel_dp *intel_dp, int index)
 	case AUX_CH_D:
 		return DP_AUX_CH_DATA(aux_ch, index);
 	default:
-		MISSING_CASE(aux_ch);
+		i915_MISSING_CASE(dev_priv, aux_ch);
 		return DP_AUX_CH_DATA(AUX_CH_B, index);
 	}
 }
@@ -1655,7 +1655,7 @@ static i915_reg_t ilk_aux_ctl_reg(struct intel_dp *intel_dp)
 	case AUX_CH_D:
 		return PCH_DP_AUX_CH_CTL(aux_ch);
 	default:
-		MISSING_CASE(aux_ch);
+		i915_MISSING_CASE(dev_priv, aux_ch);
 		return DP_AUX_CH_CTL(AUX_CH_A);
 	}
 }
@@ -1674,7 +1674,7 @@ static i915_reg_t ilk_aux_data_reg(struct intel_dp *intel_dp, int index)
 	case AUX_CH_D:
 		return PCH_DP_AUX_CH_DATA(aux_ch, index);
 	default:
-		MISSING_CASE(aux_ch);
+		i915_MISSING_CASE(dev_priv, aux_ch);
 		return DP_AUX_CH_DATA(AUX_CH_A, index);
 	}
 }
@@ -1695,7 +1695,7 @@ static i915_reg_t skl_aux_ctl_reg(struct intel_dp *intel_dp)
 	case AUX_CH_G:
 		return DP_AUX_CH_CTL(aux_ch);
 	default:
-		MISSING_CASE(aux_ch);
+		i915_MISSING_CASE(dev_priv, aux_ch);
 		return DP_AUX_CH_CTL(AUX_CH_A);
 	}
 }
@@ -1716,7 +1716,7 @@ static i915_reg_t skl_aux_data_reg(struct intel_dp *intel_dp, int index)
 	case AUX_CH_G:
 		return DP_AUX_CH_DATA(aux_ch, index);
 	default:
-		MISSING_CASE(aux_ch);
+		i915_MISSING_CASE(dev_priv, aux_ch);
 		return DP_AUX_CH_DATA(AUX_CH_A, index);
 	}
 }
@@ -5417,7 +5417,7 @@ static bool ibx_digital_port_connected(struct intel_encoder *encoder)
 		bit = SDE_PORTD_HOTPLUG;
 		break;
 	default:
-		MISSING_CASE(encoder->hpd_pin);
+		i915_MISSING_CASE(dev_priv, encoder->hpd_pin);
 		return false;
 	}
 
@@ -5440,7 +5440,7 @@ static bool cpt_digital_port_connected(struct intel_encoder *encoder)
 		bit = SDE_PORTD_HOTPLUG_CPT;
 		break;
 	default:
-		MISSING_CASE(encoder->hpd_pin);
+		i915_MISSING_CASE(dev_priv, encoder->hpd_pin);
 		return false;
 	}
 
@@ -5482,7 +5482,7 @@ static bool g4x_digital_port_connected(struct intel_encoder *encoder)
 		bit = PORTD_HOTPLUG_LIVE_STATUS_G4X;
 		break;
 	default:
-		MISSING_CASE(encoder->hpd_pin);
+		i915_MISSING_CASE(dev_priv, encoder->hpd_pin);
 		return false;
 	}
 
@@ -5505,7 +5505,7 @@ static bool gm45_digital_port_connected(struct intel_encoder *encoder)
 		bit = PORTD_HOTPLUG_LIVE_STATUS_GM45;
 		break;
 	default:
-		MISSING_CASE(encoder->hpd_pin);
+		i915_MISSING_CASE(dev_priv, encoder->hpd_pin);
 		return false;
 	}
 
@@ -5568,7 +5568,7 @@ static bool bxt_digital_port_connected(struct intel_encoder *encoder)
 		bit = BXT_DE_PORT_HP_DDIC;
 		break;
 	default:
-		MISSING_CASE(encoder->hpd_pin);
+		i915_MISSING_CASE(dev_priv, encoder->hpd_pin);
 		return false;
 	}
 
@@ -5595,7 +5595,7 @@ static bool icp_digital_port_connected(struct intel_encoder *encoder)
 	else if (intel_phy_is_tc(dev_priv, phy))
 		return intel_tc_port_connected(dig_port);
 	else
-		MISSING_CASE(encoder->hpd_pin);
+		i915_MISSING_CASE(dev_priv, encoder->hpd_pin);
 
 	return false;
 }
@@ -5637,7 +5637,7 @@ static bool __intel_digital_port_connected(struct intel_encoder *encoder)
 	else if (IS_GEN(dev_priv, 5))
 		return ilk_digital_port_connected(encoder);
 
-	MISSING_CASE(INTEL_GEN(dev_priv));
+	i915_MISSING_CASE(dev_priv, INTEL_GEN(dev_priv));
 	return false;
 }
 
@@ -7090,7 +7090,7 @@ intel_dp_init_panel_power_sequencer_registers(struct intel_dp *intel_dp,
 			port_sel = PANEL_PORT_SELECT_DPD;
 			break;
 		default:
-			MISSING_CASE(port);
+			i915_MISSING_CASE(dev_priv, port);
 			break;
 		}
 	}
-- 
2.23.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx][PATCH 06/10] drm/i915/display/hdmi: Make MISSING_CASE backtrace i915 specific

[Pankaj Bharadiya]

i915_MISSING_CASE macro includes the device information in the
backtrace, so we know what device the warnings originate from.

Covert MISSING_CASE calls with i915 specific i915_MISSING_CASE variant
in functions where drm_i915_private struct pointer is readily
available.

The conversion was done automatically with below coccinelle semantic
patch.

@rule1@
identifier func, T;
@@
func(...) {
...
struct drm_i915_private *T = ...;
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>
}

@rule2@
identifier func, T;
@@
func(struct drm_i915_private *T,...) {
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>

}

Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdmi.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index bdbb5ce3fa81..59148134a97b 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -188,7 +188,7 @@ hsw_dip_data_reg(struct drm_i915_private *dev_priv,
 	case HDMI_INFOFRAME_TYPE_DRM:
 		return GLK_TVIDEO_DIP_DRM_DATA(cpu_transcoder, i);
 	default:
-		MISSING_CASE(type);
+		i915_MISSING_CASE(dev_priv, type);
 		return INVALID_MMIO_REG;
 	}
 }
@@ -2952,7 +2952,7 @@ static u8 chv_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port)
 		ddc_pin = GMBUS_PIN_DPD_CHV;
 		break;
 	default:
-		MISSING_CASE(port);
+		i915_MISSING_CASE(dev_priv, port);
 		ddc_pin = GMBUS_PIN_DPB;
 		break;
 	}
@@ -2971,7 +2971,7 @@ static u8 bxt_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port)
 		ddc_pin = GMBUS_PIN_2_BXT;
 		break;
 	default:
-		MISSING_CASE(port);
+		i915_MISSING_CASE(dev_priv, port);
 		ddc_pin = GMBUS_PIN_1_BXT;
 		break;
 	}
@@ -2997,7 +2997,7 @@ static u8 cnp_port_to_ddc_pin(struct drm_i915_private *dev_priv,
 		ddc_pin = GMBUS_PIN_3_BXT;
 		break;
 	default:
-		MISSING_CASE(port);
+		i915_MISSING_CASE(dev_priv, port);
 		ddc_pin = GMBUS_PIN_1_BXT;
 		break;
 	}
@@ -3033,7 +3033,7 @@ static u8 mcc_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port)
 		ddc_pin = GMBUS_PIN_9_TC1_ICP;
 		break;
 	default:
-		MISSING_CASE(phy);
+		i915_MISSING_CASE(dev_priv, phy);
 		ddc_pin = GMBUS_PIN_1_BXT;
 		break;
 	}
@@ -3056,7 +3056,7 @@ static u8 g4x_port_to_ddc_pin(struct drm_i915_private *dev_priv,
 		ddc_pin = GMBUS_PIN_DPD;
 		break;
 	default:
-		MISSING_CASE(port);
+		i915_MISSING_CASE(dev_priv, port);
 		ddc_pin = GMBUS_PIN_DPB;
 		break;
 	}
-- 
2.23.0

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

[Intel-gfx] [PATCH 06/10] drm/i915/display/hdmi: Make MISSING_CASE backtrace i915 specific

[Pankaj Bharadiya]

i915_MISSING_CASE macro includes the device information in the
backtrace, so we know what device the warnings originate from.

Covert MISSING_CASE calls with i915 specific i915_MISSING_CASE variant
in functions where drm_i915_private struct pointer is readily
available.

The conversion was done automatically with below coccinelle semantic
patch.

@rule1@
identifier func, T;
@@
func(...) {
...
struct drm_i915_private *T = ...;
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>
}

@rule2@
identifier func, T;
@@
func(struct drm_i915_private *T,...) {
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>

}

Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdmi.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index bdbb5ce3fa81..59148134a97b 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -188,7 +188,7 @@ hsw_dip_data_reg(struct drm_i915_private *dev_priv,
 	case HDMI_INFOFRAME_TYPE_DRM:
 		return GLK_TVIDEO_DIP_DRM_DATA(cpu_transcoder, i);
 	default:
-		MISSING_CASE(type);
+		i915_MISSING_CASE(dev_priv, type);
 		return INVALID_MMIO_REG;
 	}
 }
@@ -2952,7 +2952,7 @@ static u8 chv_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port)
 		ddc_pin = GMBUS_PIN_DPD_CHV;
 		break;
 	default:
-		MISSING_CASE(port);
+		i915_MISSING_CASE(dev_priv, port);
 		ddc_pin = GMBUS_PIN_DPB;
 		break;
 	}
@@ -2971,7 +2971,7 @@ static u8 bxt_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port)
 		ddc_pin = GMBUS_PIN_2_BXT;
 		break;
 	default:
-		MISSING_CASE(port);
+		i915_MISSING_CASE(dev_priv, port);
 		ddc_pin = GMBUS_PIN_1_BXT;
 		break;
 	}
@@ -2997,7 +2997,7 @@ static u8 cnp_port_to_ddc_pin(struct drm_i915_private *dev_priv,
 		ddc_pin = GMBUS_PIN_3_BXT;
 		break;
 	default:
-		MISSING_CASE(port);
+		i915_MISSING_CASE(dev_priv, port);
 		ddc_pin = GMBUS_PIN_1_BXT;
 		break;
 	}
@@ -3033,7 +3033,7 @@ static u8 mcc_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port)
 		ddc_pin = GMBUS_PIN_9_TC1_ICP;
 		break;
 	default:
-		MISSING_CASE(phy);
+		i915_MISSING_CASE(dev_priv, phy);
 		ddc_pin = GMBUS_PIN_1_BXT;
 		break;
 	}
@@ -3056,7 +3056,7 @@ static u8 g4x_port_to_ddc_pin(struct drm_i915_private *dev_priv,
 		ddc_pin = GMBUS_PIN_DPD;
 		break;
 	default:
-		MISSING_CASE(port);
+		i915_MISSING_CASE(dev_priv, port);
 		ddc_pin = GMBUS_PIN_DPB;
 		break;
 	}
-- 
2.23.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx][PATCH 07/10] drm/i915/display: Make MISSING_CASE backtrace i915 specific

[Pankaj Bharadiya]

i915_MISSING_CASE macro includes the device information in the
backtrace, so we know what device the warnings originate from.

Covert MISSING_CASE calls with i915 specific i915_MISSING_CASE variant
in functions where drm_i915_private struct pointer is readily
available.

The conversion was done automatically with below coccinelle semantic
patch.

@rule1@
identifier func, T;
@@
func(...) {
...
struct drm_i915_private *T = ...;
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>
}

@rule2@
identifier func, T;
@@
func(struct drm_i915_private *T,...) {
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>

}

Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
---
 drivers/gpu/drm/i915/display/icl_dsi.c         |  8 +++++---
 drivers/gpu/drm/i915/display/intel_bios.c      |  4 ++--
 drivers/gpu/drm/i915/display/intel_bw.c        |  6 +++---
 drivers/gpu/drm/i915/display/intel_combo_phy.c |  6 +++---
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c  | 10 +++++-----
 drivers/gpu/drm/i915/display/intel_hotplug.c   |  2 +-
 drivers/gpu/drm/i915/display/intel_sprite.c    |  4 ++--
 drivers/gpu/drm/i915/display/intel_tc.c        |  2 +-
 8 files changed, 22 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index d842e280699d..66af45885a83 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -708,7 +708,8 @@ gen11_dsi_configure_transcoder(struct intel_encoder *encoder,
 		} else {
 			switch (intel_dsi->pixel_format) {
 			default:
-				MISSING_CASE(intel_dsi->pixel_format);
+				i915_MISSING_CASE(dev_priv,
+						  intel_dsi->pixel_format);
 				/* fallthrough */
 			case MIPI_DSI_FMT_RGB565:
 				tmp |= PIX_FMT_RGB565;
@@ -735,7 +736,8 @@ gen11_dsi_configure_transcoder(struct intel_encoder *encoder,
 			tmp &= ~OP_MODE_MASK;
 			switch (intel_dsi->video_mode_format) {
 			default:
-				MISSING_CASE(intel_dsi->video_mode_format);
+				i915_MISSING_CASE(dev_priv,
+						  intel_dsi->video_mode_format);
 				/* fallthrough */
 			case VIDEO_MODE_NON_BURST_WITH_SYNC_EVENTS:
 				tmp |= VIDEO_MODE_SYNC_EVENT;
@@ -776,7 +778,7 @@ gen11_dsi_configure_transcoder(struct intel_encoder *encoder,
 		tmp &= ~TRANS_DDI_EDP_INPUT_MASK;
 		switch (pipe) {
 		default:
-			MISSING_CASE(pipe);
+			i915_MISSING_CASE(dev_priv, pipe);
 			/* fallthrough */
 		case PIPE_A:
 			tmp |= TRANS_DDI_EDP_INPUT_A_ON;
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 2049cf5b54f3..3737b0d1741d 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1742,7 +1742,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv,
 
 		switch (child->hdmi_max_data_rate) {
 		default:
-			MISSING_CASE(child->hdmi_max_data_rate);
+			i915_MISSING_CASE(dev_priv, child->hdmi_max_data_rate);
 			/* fall through */
 		case HDMI_MAX_DATA_RATE_PLATFORM:
 			max_tmds_clock = 0;
@@ -2619,7 +2619,7 @@ enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv,
 		aux_ch = AUX_CH_G;
 		break;
 	default:
-		MISSING_CASE(info->alternate_aux_channel);
+		i915_MISSING_CASE(dev_priv, info->alternate_aux_channel);
 		aux_ch = AUX_CH_A;
 		break;
 	}
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 58b264bc318d..5bd120919175 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -50,7 +50,7 @@ static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv,
 			qi->dram_type = INTEL_DRAM_LPDDR3;
 			break;
 		default:
-			MISSING_CASE(val & 0xf);
+			i915_MISSING_CASE(dev_priv, val & 0xf);
 			break;
 		}
 	} else if (IS_GEN(dev_priv, 11)) {
@@ -68,11 +68,11 @@ static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv,
 			qi->dram_type = INTEL_DRAM_LPDDR4;
 			break;
 		default:
-			MISSING_CASE(val & 0xf);
+			i915_MISSING_CASE(dev_priv, val & 0xf);
 			break;
 		}
 	} else {
-		MISSING_CASE(INTEL_GEN(dev_priv));
+		i915_MISSING_CASE(dev_priv, INTEL_GEN(dev_priv));
 		qi->dram_type = INTEL_DRAM_LPDDR3; /* Conservative default */
 	}
 
diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy.c b/drivers/gpu/drm/i915/display/intel_combo_phy.c
index 9ff05ec12115..590fb3637381 100644
--- a/drivers/gpu/drm/i915/display/intel_combo_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_combo_phy.c
@@ -51,7 +51,7 @@ cnl_get_procmon_ref_values(struct drm_i915_private *dev_priv, enum phy phy)
 	val = intel_de_read(dev_priv, ICL_PORT_COMP_DW3(phy));
 	switch (val & (PROCESS_INFO_MASK | VOLTAGE_INFO_MASK)) {
 	default:
-		MISSING_CASE(val);
+		i915_MISSING_CASE(dev_priv, val);
 		/* fall through */
 	case VOLTAGE_INFO_0_85V | PROCESS_INFO_DOT_0:
 		procmon = &cnl_procmon_values[PROCMON_0_85V_DOT_0];
@@ -272,7 +272,7 @@ void intel_combo_phy_power_up_lanes(struct drm_i915_private *dev_priv,
 			lane_mask = PWR_DOWN_LN_3;
 			break;
 		default:
-			MISSING_CASE(lane_count);
+			i915_MISSING_CASE(dev_priv, lane_count);
 			/* fall-through */
 		case 4:
 			lane_mask = PWR_UP_ALL_LANES;
@@ -289,7 +289,7 @@ void intel_combo_phy_power_up_lanes(struct drm_i915_private *dev_priv,
 						    PWR_DOWN_LN_3_2;
 			break;
 		default:
-			MISSING_CASE(lane_count);
+			i915_MISSING_CASE(dev_priv, lane_count);
 			/* fall-through */
 		case 4:
 			lane_mask = PWR_UP_ALL_LANES;
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index e5bfe5245276..72a54b90dba2 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -2591,7 +2591,7 @@ static bool icl_calc_dp_combo_pll(struct intel_crtc_state *crtc_state,
 		}
 	}
 
-	MISSING_CASE(clock);
+	i915_MISSING_CASE(dev_priv, clock);
 	return false;
 }
 
@@ -2603,7 +2603,7 @@ static bool icl_calc_tbt_pll(struct intel_crtc_state *crtc_state,
 	if (INTEL_GEN(dev_priv) >= 12) {
 		switch (dev_priv->cdclk.hw.ref) {
 		default:
-			MISSING_CASE(dev_priv->cdclk.hw.ref);
+			i915_MISSING_CASE(dev_priv, dev_priv->cdclk.hw.ref);
 			/* fall-through */
 		case 19200:
 		case 38400:
@@ -2616,7 +2616,7 @@ static bool icl_calc_tbt_pll(struct intel_crtc_state *crtc_state,
 	} else {
 		switch (dev_priv->cdclk.hw.ref) {
 		default:
-			MISSING_CASE(dev_priv->cdclk.hw.ref);
+			i915_MISSING_CASE(dev_priv, dev_priv->cdclk.hw.ref);
 			/* fall-through */
 		case 19200:
 		case 38400:
@@ -2827,7 +2827,7 @@ static bool icl_calc_mg_pll_state(struct intel_crtc_state *crtc_state,
 		iref_pulse_w = 1;
 		break;
 	default:
-		MISSING_CASE(refclk_khz);
+		i915_MISSING_CASE(dev_priv, refclk_khz);
 		return false;
 	}
 
@@ -3123,7 +3123,7 @@ static bool icl_get_dplls(struct intel_atomic_state *state,
 	else if (intel_phy_is_tc(dev_priv, phy))
 		return icl_get_tc_phy_dplls(state, crtc, encoder);
 
-	MISSING_CASE(phy);
+	i915_MISSING_CASE(dev_priv, phy);
 
 	return false;
 }
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
index 8af0ae61e1bb..c0718b02cb1d 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
@@ -111,7 +111,7 @@ enum hpd_pin intel_hpd_pin_default(struct drm_i915_private *dev_priv,
 	case PORT_I:
 		return HPD_PORT_I;
 	default:
-		MISSING_CASE(port);
+		i915_MISSING_CASE(dev_priv, port);
 		return HPD_NONE;
 	}
 }
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 7abeefe8dce5..2a05c70ad958 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -1395,7 +1395,7 @@ static u32 ivb_sprite_ctl(const struct intel_crtc_state *crtc_state,
 		sprctl |= SPRITE_FORMAT_YUV422 | SPRITE_YUV_ORDER_VYUY;
 		break;
 	default:
-		MISSING_CASE(fb->format->format);
+		i915_MISSING_CASE(dev_priv, fb->format->format);
 		return 0;
 	}
 
@@ -1706,7 +1706,7 @@ static u32 g4x_sprite_ctl(const struct intel_crtc_state *crtc_state,
 		dvscntr |= DVS_FORMAT_YUV422 | DVS_YUV_ORDER_VYUY;
 		break;
 	default:
-		MISSING_CASE(fb->format->format);
+		i915_MISSING_CASE(dev_priv, fb->format->format);
 		return 0;
 	}
 
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 9b850c11aa78..560b0c2fe62a 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -142,7 +142,7 @@ void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
 		val |= DFLEXDPMLE1_DPMLETC_ML3_0(dig_port->tc_phy_fia_idx);
 		break;
 	default:
-		MISSING_CASE(required_lanes);
+		i915_MISSING_CASE(i915, required_lanes);
 	}
 
 	intel_uncore_write(uncore,
-- 
2.23.0

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

[Intel-gfx] [PATCH 07/10] drm/i915/display: Make MISSING_CASE backtrace i915 specific

[Pankaj Bharadiya]

i915_MISSING_CASE macro includes the device information in the
backtrace, so we know what device the warnings originate from.

Covert MISSING_CASE calls with i915 specific i915_MISSING_CASE variant
in functions where drm_i915_private struct pointer is readily
available.

The conversion was done automatically with below coccinelle semantic
patch.

@rule1@
identifier func, T;
@@
func(...) {
...
struct drm_i915_private *T = ...;
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>
}

@rule2@
identifier func, T;
@@
func(struct drm_i915_private *T,...) {
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>

}

Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
---
 drivers/gpu/drm/i915/display/icl_dsi.c         |  8 +++++---
 drivers/gpu/drm/i915/display/intel_bios.c      |  4 ++--
 drivers/gpu/drm/i915/display/intel_bw.c        |  6 +++---
 drivers/gpu/drm/i915/display/intel_combo_phy.c |  6 +++---
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c  | 10 +++++-----
 drivers/gpu/drm/i915/display/intel_hotplug.c   |  2 +-
 drivers/gpu/drm/i915/display/intel_sprite.c    |  4 ++--
 drivers/gpu/drm/i915/display/intel_tc.c        |  2 +-
 8 files changed, 22 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index d842e280699d..66af45885a83 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -708,7 +708,8 @@ gen11_dsi_configure_transcoder(struct intel_encoder *encoder,
 		} else {
 			switch (intel_dsi->pixel_format) {
 			default:
-				MISSING_CASE(intel_dsi->pixel_format);
+				i915_MISSING_CASE(dev_priv,
+						  intel_dsi->pixel_format);
 				/* fallthrough */
 			case MIPI_DSI_FMT_RGB565:
 				tmp |= PIX_FMT_RGB565;
@@ -735,7 +736,8 @@ gen11_dsi_configure_transcoder(struct intel_encoder *encoder,
 			tmp &= ~OP_MODE_MASK;
 			switch (intel_dsi->video_mode_format) {
 			default:
-				MISSING_CASE(intel_dsi->video_mode_format);
+				i915_MISSING_CASE(dev_priv,
+						  intel_dsi->video_mode_format);
 				/* fallthrough */
 			case VIDEO_MODE_NON_BURST_WITH_SYNC_EVENTS:
 				tmp |= VIDEO_MODE_SYNC_EVENT;
@@ -776,7 +778,7 @@ gen11_dsi_configure_transcoder(struct intel_encoder *encoder,
 		tmp &= ~TRANS_DDI_EDP_INPUT_MASK;
 		switch (pipe) {
 		default:
-			MISSING_CASE(pipe);
+			i915_MISSING_CASE(dev_priv, pipe);
 			/* fallthrough */
 		case PIPE_A:
 			tmp |= TRANS_DDI_EDP_INPUT_A_ON;
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 2049cf5b54f3..3737b0d1741d 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1742,7 +1742,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv,
 
 		switch (child->hdmi_max_data_rate) {
 		default:
-			MISSING_CASE(child->hdmi_max_data_rate);
+			i915_MISSING_CASE(dev_priv, child->hdmi_max_data_rate);
 			/* fall through */
 		case HDMI_MAX_DATA_RATE_PLATFORM:
 			max_tmds_clock = 0;
@@ -2619,7 +2619,7 @@ enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv,
 		aux_ch = AUX_CH_G;
 		break;
 	default:
-		MISSING_CASE(info->alternate_aux_channel);
+		i915_MISSING_CASE(dev_priv, info->alternate_aux_channel);
 		aux_ch = AUX_CH_A;
 		break;
 	}
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 58b264bc318d..5bd120919175 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -50,7 +50,7 @@ static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv,
 			qi->dram_type = INTEL_DRAM_LPDDR3;
 			break;
 		default:
-			MISSING_CASE(val & 0xf);
+			i915_MISSING_CASE(dev_priv, val & 0xf);
 			break;
 		}
 	} else if (IS_GEN(dev_priv, 11)) {
@@ -68,11 +68,11 @@ static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv,
 			qi->dram_type = INTEL_DRAM_LPDDR4;
 			break;
 		default:
-			MISSING_CASE(val & 0xf);
+			i915_MISSING_CASE(dev_priv, val & 0xf);
 			break;
 		}
 	} else {
-		MISSING_CASE(INTEL_GEN(dev_priv));
+		i915_MISSING_CASE(dev_priv, INTEL_GEN(dev_priv));
 		qi->dram_type = INTEL_DRAM_LPDDR3; /* Conservative default */
 	}
 
diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy.c b/drivers/gpu/drm/i915/display/intel_combo_phy.c
index 9ff05ec12115..590fb3637381 100644
--- a/drivers/gpu/drm/i915/display/intel_combo_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_combo_phy.c
@@ -51,7 +51,7 @@ cnl_get_procmon_ref_values(struct drm_i915_private *dev_priv, enum phy phy)
 	val = intel_de_read(dev_priv, ICL_PORT_COMP_DW3(phy));
 	switch (val & (PROCESS_INFO_MASK | VOLTAGE_INFO_MASK)) {
 	default:
-		MISSING_CASE(val);
+		i915_MISSING_CASE(dev_priv, val);
 		/* fall through */
 	case VOLTAGE_INFO_0_85V | PROCESS_INFO_DOT_0:
 		procmon = &cnl_procmon_values[PROCMON_0_85V_DOT_0];
@@ -272,7 +272,7 @@ void intel_combo_phy_power_up_lanes(struct drm_i915_private *dev_priv,
 			lane_mask = PWR_DOWN_LN_3;
 			break;
 		default:
-			MISSING_CASE(lane_count);
+			i915_MISSING_CASE(dev_priv, lane_count);
 			/* fall-through */
 		case 4:
 			lane_mask = PWR_UP_ALL_LANES;
@@ -289,7 +289,7 @@ void intel_combo_phy_power_up_lanes(struct drm_i915_private *dev_priv,
 						    PWR_DOWN_LN_3_2;
 			break;
 		default:
-			MISSING_CASE(lane_count);
+			i915_MISSING_CASE(dev_priv, lane_count);
 			/* fall-through */
 		case 4:
 			lane_mask = PWR_UP_ALL_LANES;
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index e5bfe5245276..72a54b90dba2 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -2591,7 +2591,7 @@ static bool icl_calc_dp_combo_pll(struct intel_crtc_state *crtc_state,
 		}
 	}
 
-	MISSING_CASE(clock);
+	i915_MISSING_CASE(dev_priv, clock);
 	return false;
 }
 
@@ -2603,7 +2603,7 @@ static bool icl_calc_tbt_pll(struct intel_crtc_state *crtc_state,
 	if (INTEL_GEN(dev_priv) >= 12) {
 		switch (dev_priv->cdclk.hw.ref) {
 		default:
-			MISSING_CASE(dev_priv->cdclk.hw.ref);
+			i915_MISSING_CASE(dev_priv, dev_priv->cdclk.hw.ref);
 			/* fall-through */
 		case 19200:
 		case 38400:
@@ -2616,7 +2616,7 @@ static bool icl_calc_tbt_pll(struct intel_crtc_state *crtc_state,
 	} else {
 		switch (dev_priv->cdclk.hw.ref) {
 		default:
-			MISSING_CASE(dev_priv->cdclk.hw.ref);
+			i915_MISSING_CASE(dev_priv, dev_priv->cdclk.hw.ref);
 			/* fall-through */
 		case 19200:
 		case 38400:
@@ -2827,7 +2827,7 @@ static bool icl_calc_mg_pll_state(struct intel_crtc_state *crtc_state,
 		iref_pulse_w = 1;
 		break;
 	default:
-		MISSING_CASE(refclk_khz);
+		i915_MISSING_CASE(dev_priv, refclk_khz);
 		return false;
 	}
 
@@ -3123,7 +3123,7 @@ static bool icl_get_dplls(struct intel_atomic_state *state,
 	else if (intel_phy_is_tc(dev_priv, phy))
 		return icl_get_tc_phy_dplls(state, crtc, encoder);
 
-	MISSING_CASE(phy);
+	i915_MISSING_CASE(dev_priv, phy);
 
 	return false;
 }
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
index 8af0ae61e1bb..c0718b02cb1d 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
@@ -111,7 +111,7 @@ enum hpd_pin intel_hpd_pin_default(struct drm_i915_private *dev_priv,
 	case PORT_I:
 		return HPD_PORT_I;
 	default:
-		MISSING_CASE(port);
+		i915_MISSING_CASE(dev_priv, port);
 		return HPD_NONE;
 	}
 }
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 7abeefe8dce5..2a05c70ad958 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -1395,7 +1395,7 @@ static u32 ivb_sprite_ctl(const struct intel_crtc_state *crtc_state,
 		sprctl |= SPRITE_FORMAT_YUV422 | SPRITE_YUV_ORDER_VYUY;
 		break;
 	default:
-		MISSING_CASE(fb->format->format);
+		i915_MISSING_CASE(dev_priv, fb->format->format);
 		return 0;
 	}
 
@@ -1706,7 +1706,7 @@ static u32 g4x_sprite_ctl(const struct intel_crtc_state *crtc_state,
 		dvscntr |= DVS_FORMAT_YUV422 | DVS_YUV_ORDER_VYUY;
 		break;
 	default:
-		MISSING_CASE(fb->format->format);
+		i915_MISSING_CASE(dev_priv, fb->format->format);
 		return 0;
 	}
 
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 9b850c11aa78..560b0c2fe62a 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -142,7 +142,7 @@ void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
 		val |= DFLEXDPMLE1_DPMLETC_ML3_0(dig_port->tc_phy_fia_idx);
 		break;
 	default:
-		MISSING_CASE(required_lanes);
+		i915_MISSING_CASE(i915, required_lanes);
 	}
 
 	intel_uncore_write(uncore,
-- 
2.23.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx][PATCH 08/10] drm/i915/gem: Make MISSING_CASE backtrace i915 specific

[Pankaj Bharadiya]

i915_MISSING_CASE macro includes the device information in the
backtrace, so we know what device the warnings originate from.

Covert MISSING_CASE calls with i915 specific i915_MISSING_CASE variant
in functions where drm_i915_private struct pointer is readily
available.

The conversion was done automatically with below coccinelle semantic
patch.

@rule1@
identifier func, T;
@@
func(...) {
...
struct drm_i915_private *T = ...;
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>
}

@rule2@
identifier func, T;
@@
func(struct drm_i915_private *T,...) {
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>

}

Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 17 +++++++++++------
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
index 491cfbaaa330..58757f529841 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
@@ -228,7 +228,8 @@ static void gen6_get_stolen_reserved(struct drm_i915_private *i915,
 		break;
 	default:
 		*size = 1024 * 1024;
-		MISSING_CASE(reg_val & GEN6_STOLEN_RESERVED_SIZE_MASK);
+		i915_MISSING_CASE(i915,
+				  reg_val & GEN6_STOLEN_RESERVED_SIZE_MASK);
 	}
 }
 
@@ -247,7 +248,8 @@ static void vlv_get_stolen_reserved(struct drm_i915_private *i915,
 
 	switch (reg_val & GEN7_STOLEN_RESERVED_SIZE_MASK) {
 	default:
-		MISSING_CASE(reg_val & GEN7_STOLEN_RESERVED_SIZE_MASK);
+		i915_MISSING_CASE(i915,
+				  reg_val & GEN7_STOLEN_RESERVED_SIZE_MASK);
 		/* fall through */
 	case GEN7_STOLEN_RESERVED_1M:
 		*size = 1024 * 1024;
@@ -284,7 +286,8 @@ static void gen7_get_stolen_reserved(struct drm_i915_private *i915,
 		break;
 	default:
 		*size = 1024 * 1024;
-		MISSING_CASE(reg_val & GEN7_STOLEN_RESERVED_SIZE_MASK);
+		i915_MISSING_CASE(i915,
+				  reg_val & GEN7_STOLEN_RESERVED_SIZE_MASK);
 	}
 }
 
@@ -317,7 +320,8 @@ static void chv_get_stolen_reserved(struct drm_i915_private *i915,
 		break;
 	default:
 		*size = 8 * 1024 * 1024;
-		MISSING_CASE(reg_val & GEN8_STOLEN_RESERVED_SIZE_MASK);
+		i915_MISSING_CASE(i915,
+				  reg_val & GEN8_STOLEN_RESERVED_SIZE_MASK);
 	}
 }
 
@@ -367,7 +371,8 @@ static void icl_get_stolen_reserved(struct drm_i915_private *i915,
 		break;
 	default:
 		*size = 8 * 1024 * 1024;
-		MISSING_CASE(reg_val & GEN8_STOLEN_RESERVED_SIZE_MASK);
+		i915_MISSING_CASE(i915,
+				  reg_val & GEN8_STOLEN_RESERVED_SIZE_MASK);
 	}
 }
 
@@ -443,7 +448,7 @@ static int i915_gem_init_stolen(struct drm_i915_private *i915)
 						&reserved_base, &reserved_size);
 		break;
 	default:
-		MISSING_CASE(INTEL_GEN(i915));
+		i915_MISSING_CASE(i915, INTEL_GEN(i915));
 		/* fall-through */
 	case 11:
 	case 12:
-- 
2.23.0

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

[Intel-gfx] [PATCH 08/10] drm/i915/gem: Make MISSING_CASE backtrace i915 specific

[Pankaj Bharadiya]

i915_MISSING_CASE macro includes the device information in the
backtrace, so we know what device the warnings originate from.

Covert MISSING_CASE calls with i915 specific i915_MISSING_CASE variant
in functions where drm_i915_private struct pointer is readily
available.

The conversion was done automatically with below coccinelle semantic
patch.

@rule1@
identifier func, T;
@@
func(...) {
...
struct drm_i915_private *T = ...;
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>
}

@rule2@
identifier func, T;
@@
func(struct drm_i915_private *T,...) {
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>

}

Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 17 +++++++++++------
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
index 491cfbaaa330..58757f529841 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
@@ -228,7 +228,8 @@ static void gen6_get_stolen_reserved(struct drm_i915_private *i915,
 		break;
 	default:
 		*size = 1024 * 1024;
-		MISSING_CASE(reg_val & GEN6_STOLEN_RESERVED_SIZE_MASK);
+		i915_MISSING_CASE(i915,
+				  reg_val & GEN6_STOLEN_RESERVED_SIZE_MASK);
 	}
 }
 
@@ -247,7 +248,8 @@ static void vlv_get_stolen_reserved(struct drm_i915_private *i915,
 
 	switch (reg_val & GEN7_STOLEN_RESERVED_SIZE_MASK) {
 	default:
-		MISSING_CASE(reg_val & GEN7_STOLEN_RESERVED_SIZE_MASK);
+		i915_MISSING_CASE(i915,
+				  reg_val & GEN7_STOLEN_RESERVED_SIZE_MASK);
 		/* fall through */
 	case GEN7_STOLEN_RESERVED_1M:
 		*size = 1024 * 1024;
@@ -284,7 +286,8 @@ static void gen7_get_stolen_reserved(struct drm_i915_private *i915,
 		break;
 	default:
 		*size = 1024 * 1024;
-		MISSING_CASE(reg_val & GEN7_STOLEN_RESERVED_SIZE_MASK);
+		i915_MISSING_CASE(i915,
+				  reg_val & GEN7_STOLEN_RESERVED_SIZE_MASK);
 	}
 }
 
@@ -317,7 +320,8 @@ static void chv_get_stolen_reserved(struct drm_i915_private *i915,
 		break;
 	default:
 		*size = 8 * 1024 * 1024;
-		MISSING_CASE(reg_val & GEN8_STOLEN_RESERVED_SIZE_MASK);
+		i915_MISSING_CASE(i915,
+				  reg_val & GEN8_STOLEN_RESERVED_SIZE_MASK);
 	}
 }
 
@@ -367,7 +371,8 @@ static void icl_get_stolen_reserved(struct drm_i915_private *i915,
 		break;
 	default:
 		*size = 8 * 1024 * 1024;
-		MISSING_CASE(reg_val & GEN8_STOLEN_RESERVED_SIZE_MASK);
+		i915_MISSING_CASE(i915,
+				  reg_val & GEN8_STOLEN_RESERVED_SIZE_MASK);
 	}
 }
 
@@ -443,7 +448,7 @@ static int i915_gem_init_stolen(struct drm_i915_private *i915)
 						&reserved_base, &reserved_size);
 		break;
 	default:
-		MISSING_CASE(INTEL_GEN(i915));
+		i915_MISSING_CASE(i915, INTEL_GEN(i915));
 		/* fall-through */
 	case 11:
 	case 12:
-- 
2.23.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx][PATCH 09/10] drm/i915/gt: Make MISSING_CASE backtrace i915 specific

[Pankaj Bharadiya]

i915_MISSING_CASE macro includes the device information in the
backtrace, so we know what device the warnings originate from.

Covert MISSING_CASE calls with i915 specific i915_MISSING_CASE variant
in functions where drm_i915_private struct pointer is readily
available.

The conversion was done automatically with below coccinelle semantic
patch.

@rule1@
identifier func, T;
@@
func(...) {
...
struct drm_i915_private *T = ...;
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>
}

@rule2@
identifier func, T;
@@
func(struct drm_i915_private *T,...) {
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>

}

Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 887e0dc701f7..8a80a132f0fe 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -635,7 +635,7 @@ __intel_engine_init_ctx_wa(struct intel_engine_cs *engine,
 	else if (INTEL_GEN(i915) < 8)
 		return;
 	else
-		MISSING_CASE(INTEL_GEN(i915));
+		i915_MISSING_CASE(i915, INTEL_GEN(i915));
 
 	wa_init_finish(wal);
 }
@@ -965,7 +965,7 @@ gt_init_workarounds(struct drm_i915_private *i915, struct i915_wa_list *wal)
 	else if (INTEL_GEN(i915) <= 8)
 		return;
 	else
-		MISSING_CASE(INTEL_GEN(i915));
+		i915_MISSING_CASE(i915, INTEL_GEN(i915));
 }
 
 void intel_gt_init_workarounds(struct drm_i915_private *i915)
@@ -1296,7 +1296,7 @@ void intel_engine_init_whitelist(struct intel_engine_cs *engine)
 	else if (INTEL_GEN(i915) <= 8)
 		return;
 	else
-		MISSING_CASE(INTEL_GEN(i915));
+		i915_MISSING_CASE(i915, INTEL_GEN(i915));
 
 	wa_init_finish(w);
 }
-- 
2.23.0

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

[Intel-gfx] [PATCH 09/10] drm/i915/gt: Make MISSING_CASE backtrace i915 specific

[Pankaj Bharadiya]

i915_MISSING_CASE macro includes the device information in the
backtrace, so we know what device the warnings originate from.

Covert MISSING_CASE calls with i915 specific i915_MISSING_CASE variant
in functions where drm_i915_private struct pointer is readily
available.

The conversion was done automatically with below coccinelle semantic
patch.

@rule1@
identifier func, T;
@@
func(...) {
...
struct drm_i915_private *T = ...;
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>
}

@rule2@
identifier func, T;
@@
func(struct drm_i915_private *T,...) {
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>

}

Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 887e0dc701f7..8a80a132f0fe 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -635,7 +635,7 @@ __intel_engine_init_ctx_wa(struct intel_engine_cs *engine,
 	else if (INTEL_GEN(i915) < 8)
 		return;
 	else
-		MISSING_CASE(INTEL_GEN(i915));
+		i915_MISSING_CASE(i915, INTEL_GEN(i915));
 
 	wa_init_finish(wal);
 }
@@ -965,7 +965,7 @@ gt_init_workarounds(struct drm_i915_private *i915, struct i915_wa_list *wal)
 	else if (INTEL_GEN(i915) <= 8)
 		return;
 	else
-		MISSING_CASE(INTEL_GEN(i915));
+		i915_MISSING_CASE(i915, INTEL_GEN(i915));
 }
 
 void intel_gt_init_workarounds(struct drm_i915_private *i915)
@@ -1296,7 +1296,7 @@ void intel_engine_init_whitelist(struct intel_engine_cs *engine)
 	else if (INTEL_GEN(i915) <= 8)
 		return;
 	else
-		MISSING_CASE(INTEL_GEN(i915));
+		i915_MISSING_CASE(i915, INTEL_GEN(i915));
 
 	wa_init_finish(w);
 }
-- 
2.23.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx][PATCH 10/10] drm/i915: Make MISSING_CASE backtrace i915 specific

[Pankaj Bharadiya]

i915_MISSING_CASE macro includes the device information in the
backtrace, so we know what device the warnings originate from.

Covert MISSING_CASE calls with i915 specific i915_MISSING_CASE variant
in functions where drm_i915_private struct pointer is readily
available.

The conversion was done automatically with below coccinelle semantic
patch.

@rule1@
identifier func, T;
@@
func(...) {
...
struct drm_i915_private *T = ...;
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>
}

@rule2@
identifier func, T;
@@
func(struct drm_i915_private *T,...) {
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>

}

Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c       |  3 ++-
 drivers/gpu/drm/i915/i915_drv.c           |  2 +-
 drivers/gpu/drm/i915/i915_gem_fence_reg.c |  2 +-
 drivers/gpu/drm/i915/i915_gpu_error.c     |  2 +-
 drivers/gpu/drm/i915/intel_device_info.c  | 13 +++++++------
 drivers/gpu/drm/i915/intel_pm.c           | 10 +++++-----
 6 files changed, 17 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 8f2525e4ce0f..fa2cbee62a3b 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -192,7 +192,8 @@ i915_debugfs_describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
 				break;
 
 			default:
-				MISSING_CASE(vma->ggtt_view.type);
+				i915_MISSING_CASE(dev_priv,
+						  vma->ggtt_view.type);
 				break;
 			}
 		}
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index dba5fe1391e8..fe328fcc4267 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -784,7 +784,7 @@ skl_get_dram_type(struct drm_i915_private *dev_priv)
 	case SKL_DRAM_DDR_TYPE_LPDDR4:
 		return INTEL_DRAM_LPDDR4;
 	default:
-		MISSING_CASE(val);
+		i915_MISSING_CASE(dev_priv, val);
 		return INTEL_DRAM_UNKNOWN;
 	}
 }
diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
index 049cd3785347..8a417085265d 100644
--- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
+++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
@@ -908,5 +908,5 @@ void intel_gt_init_swizzling(struct intel_gt *gt)
 				   GAMTARBMODE,
 				   _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_BDW));
 	else
-		MISSING_CASE(INTEL_GEN(i915));
+		i915_MISSING_CASE(i915, INTEL_GEN(i915));
 }
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 2a4cd0ba5464..9bdc9835a318 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -1150,7 +1150,7 @@ static void engine_record_registers(struct intel_engine_coredump *ee)
 		if (IS_GEN(i915, 7)) {
 			switch (engine->id) {
 			default:
-				MISSING_CASE(engine->id);
+				i915_MISSING_CASE(i915, engine->id);
 				/* fall through */
 			case RCS0:
 				mmio = RENDER_HWS_PGA_GEN7;
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 8e99ad097830..5e2f32d6643a 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -615,7 +615,7 @@ static void hsw_sseu_info_init(struct drm_i915_private *dev_priv)
 	 */
 	switch (INTEL_INFO(dev_priv)->gt) {
 	default:
-		MISSING_CASE(INTEL_INFO(dev_priv)->gt);
+		i915_MISSING_CASE(dev_priv, INTEL_INFO(dev_priv)->gt);
 		/* fall through */
 	case 1:
 		sseu->slice_mask = BIT(0);
@@ -634,8 +634,8 @@ static void hsw_sseu_info_init(struct drm_i915_private *dev_priv)
 	fuse1 = I915_READ(HSW_PAVP_FUSE1);
 	switch ((fuse1 & HSW_F1_EU_DIS_MASK) >> HSW_F1_EU_DIS_SHIFT) {
 	default:
-		MISSING_CASE((fuse1 & HSW_F1_EU_DIS_MASK) >>
-			     HSW_F1_EU_DIS_SHIFT);
+		i915_MISSING_CASE(dev_priv, (fuse1 & HSW_F1_EU_DIS_MASK) >>
+				  HSW_F1_EU_DIS_SHIFT);
 		/* fall through */
 	case HSW_F1_EU_DIS_10EUS:
 		sseu->eu_per_subslice = 10;
@@ -701,7 +701,7 @@ static u32 gen10_get_crystal_clock_freq(struct drm_i915_private *dev_priv,
 	case GEN9_RPM_CONFIG0_CRYSTAL_CLOCK_FREQ_24_MHZ:
 		return f24_mhz;
 	default:
-		MISSING_CASE(crystal_clock);
+		i915_MISSING_CASE(dev_priv, crystal_clock);
 		return 0;
 	}
 }
@@ -727,7 +727,7 @@ static u32 gen11_get_crystal_clock_freq(struct drm_i915_private *dev_priv,
 	case GEN11_RPM_CONFIG0_CRYSTAL_CLOCK_FREQ_25_MHZ:
 		return f25_mhz;
 	default:
-		MISSING_CASE(crystal_clock);
+		i915_MISSING_CASE(dev_priv, crystal_clock);
 		return 0;
 	}
 }
@@ -805,7 +805,8 @@ static u32 read_timestamp_frequency(struct drm_i915_private *dev_priv)
 		return freq;
 	}
 
-	MISSING_CASE("Unknown gen, unable to read command streamer timestamp frequency\n");
+	i915_MISSING_CASE(dev_priv,
+			  "Unknown gen, unable to read command streamer timestamp frequency\n");
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 22aa205793e5..f3fa012ef98a 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -491,7 +491,7 @@ static void vlv_get_fifo_size(struct intel_crtc_state *crtc_state)
 		sprite1_start = VLV_FIFO_START(dsparb3, dsparb2, 8, 20);
 		break;
 	default:
-		MISSING_CASE(pipe);
+		i915_MISSING_CASE(dev_priv, pipe);
 		return;
 	}
 
@@ -2922,7 +2922,7 @@ static void intel_read_wm_latency(struct drm_i915_private *dev_priv,
 		wm[1] = (mltr >> MLTR_WM1_SHIFT) & ILK_SRLT_MASK;
 		wm[2] = (mltr >> MLTR_WM2_SHIFT) & ILK_SRLT_MASK;
 	} else {
-		MISSING_CASE(INTEL_DEVID(dev_priv));
+		i915_MISSING_CASE(dev_priv, INTEL_DEVID(dev_priv));
 	}
 }
 
@@ -3657,7 +3657,7 @@ skl_setup_sagv_block_time(struct drm_i915_private *dev_priv)
 		dev_priv->sagv_block_time_us = 30;
 		return;
 	} else {
-		MISSING_CASE(INTEL_GEN(dev_priv));
+		i915_MISSING_CASE(dev_priv, INTEL_GEN(dev_priv));
 	}
 
 	/* Default to an unusable block time */
@@ -4905,7 +4905,7 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
 			wp->y_min_scanlines = 4;
 			break;
 		default:
-			MISSING_CASE(wp->cpp);
+			i915_MISSING_CASE(dev_priv, wp->cpp);
 			return -EINVAL;
 		}
 	} else {
@@ -7420,7 +7420,7 @@ void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv)
 	else if (IS_GEN(dev_priv, 2))
 		dev_priv->display.init_clock_gating = i830_init_clock_gating;
 	else {
-		MISSING_CASE(INTEL_DEVID(dev_priv));
+		i915_MISSING_CASE(dev_priv, INTEL_DEVID(dev_priv));
 		dev_priv->display.init_clock_gating = nop_init_clock_gating;
 	}
 }
-- 
2.23.0

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

[Intel-gfx] [PATCH 10/10] drm/i915: Make MISSING_CASE backtrace i915 specific

[Pankaj Bharadiya]

i915_MISSING_CASE macro includes the device information in the
backtrace, so we know what device the warnings originate from.

Covert MISSING_CASE calls with i915 specific i915_MISSING_CASE variant
in functions where drm_i915_private struct pointer is readily
available.

The conversion was done automatically with below coccinelle semantic
patch.

@rule1@
identifier func, T;
@@
func(...) {
...
struct drm_i915_private *T = ...;
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>
}

@rule2@
identifier func, T;
@@
func(struct drm_i915_private *T,...) {
<...
-MISSING_CASE(
+i915_MISSING_CASE(T,
...)
...>

}

Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c       |  3 ++-
 drivers/gpu/drm/i915/i915_drv.c           |  2 +-
 drivers/gpu/drm/i915/i915_gem_fence_reg.c |  2 +-
 drivers/gpu/drm/i915/i915_gpu_error.c     |  2 +-
 drivers/gpu/drm/i915/intel_device_info.c  | 13 +++++++------
 drivers/gpu/drm/i915/intel_pm.c           | 10 +++++-----
 6 files changed, 17 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 8f2525e4ce0f..fa2cbee62a3b 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -192,7 +192,8 @@ i915_debugfs_describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
 				break;
 
 			default:
-				MISSING_CASE(vma->ggtt_view.type);
+				i915_MISSING_CASE(dev_priv,
+						  vma->ggtt_view.type);
 				break;
 			}
 		}
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index dba5fe1391e8..fe328fcc4267 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -784,7 +784,7 @@ skl_get_dram_type(struct drm_i915_private *dev_priv)
 	case SKL_DRAM_DDR_TYPE_LPDDR4:
 		return INTEL_DRAM_LPDDR4;
 	default:
-		MISSING_CASE(val);
+		i915_MISSING_CASE(dev_priv, val);
 		return INTEL_DRAM_UNKNOWN;
 	}
 }
diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
index 049cd3785347..8a417085265d 100644
--- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
+++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
@@ -908,5 +908,5 @@ void intel_gt_init_swizzling(struct intel_gt *gt)
 				   GAMTARBMODE,
 				   _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_BDW));
 	else
-		MISSING_CASE(INTEL_GEN(i915));
+		i915_MISSING_CASE(i915, INTEL_GEN(i915));
 }
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 2a4cd0ba5464..9bdc9835a318 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -1150,7 +1150,7 @@ static void engine_record_registers(struct intel_engine_coredump *ee)
 		if (IS_GEN(i915, 7)) {
 			switch (engine->id) {
 			default:
-				MISSING_CASE(engine->id);
+				i915_MISSING_CASE(i915, engine->id);
 				/* fall through */
 			case RCS0:
 				mmio = RENDER_HWS_PGA_GEN7;
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 8e99ad097830..5e2f32d6643a 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -615,7 +615,7 @@ static void hsw_sseu_info_init(struct drm_i915_private *dev_priv)
 	 */
 	switch (INTEL_INFO(dev_priv)->gt) {
 	default:
-		MISSING_CASE(INTEL_INFO(dev_priv)->gt);
+		i915_MISSING_CASE(dev_priv, INTEL_INFO(dev_priv)->gt);
 		/* fall through */
 	case 1:
 		sseu->slice_mask = BIT(0);
@@ -634,8 +634,8 @@ static void hsw_sseu_info_init(struct drm_i915_private *dev_priv)
 	fuse1 = I915_READ(HSW_PAVP_FUSE1);
 	switch ((fuse1 & HSW_F1_EU_DIS_MASK) >> HSW_F1_EU_DIS_SHIFT) {
 	default:
-		MISSING_CASE((fuse1 & HSW_F1_EU_DIS_MASK) >>
-			     HSW_F1_EU_DIS_SHIFT);
+		i915_MISSING_CASE(dev_priv, (fuse1 & HSW_F1_EU_DIS_MASK) >>
+				  HSW_F1_EU_DIS_SHIFT);
 		/* fall through */
 	case HSW_F1_EU_DIS_10EUS:
 		sseu->eu_per_subslice = 10;
@@ -701,7 +701,7 @@ static u32 gen10_get_crystal_clock_freq(struct drm_i915_private *dev_priv,
 	case GEN9_RPM_CONFIG0_CRYSTAL_CLOCK_FREQ_24_MHZ:
 		return f24_mhz;
 	default:
-		MISSING_CASE(crystal_clock);
+		i915_MISSING_CASE(dev_priv, crystal_clock);
 		return 0;
 	}
 }
@@ -727,7 +727,7 @@ static u32 gen11_get_crystal_clock_freq(struct drm_i915_private *dev_priv,
 	case GEN11_RPM_CONFIG0_CRYSTAL_CLOCK_FREQ_25_MHZ:
 		return f25_mhz;
 	default:
-		MISSING_CASE(crystal_clock);
+		i915_MISSING_CASE(dev_priv, crystal_clock);
 		return 0;
 	}
 }
@@ -805,7 +805,8 @@ static u32 read_timestamp_frequency(struct drm_i915_private *dev_priv)
 		return freq;
 	}
 
-	MISSING_CASE("Unknown gen, unable to read command streamer timestamp frequency\n");
+	i915_MISSING_CASE(dev_priv,
+			  "Unknown gen, unable to read command streamer timestamp frequency\n");
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 22aa205793e5..f3fa012ef98a 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -491,7 +491,7 @@ static void vlv_get_fifo_size(struct intel_crtc_state *crtc_state)
 		sprite1_start = VLV_FIFO_START(dsparb3, dsparb2, 8, 20);
 		break;
 	default:
-		MISSING_CASE(pipe);
+		i915_MISSING_CASE(dev_priv, pipe);
 		return;
 	}
 
@@ -2922,7 +2922,7 @@ static void intel_read_wm_latency(struct drm_i915_private *dev_priv,
 		wm[1] = (mltr >> MLTR_WM1_SHIFT) & ILK_SRLT_MASK;
 		wm[2] = (mltr >> MLTR_WM2_SHIFT) & ILK_SRLT_MASK;
 	} else {
-		MISSING_CASE(INTEL_DEVID(dev_priv));
+		i915_MISSING_CASE(dev_priv, INTEL_DEVID(dev_priv));
 	}
 }
 
@@ -3657,7 +3657,7 @@ skl_setup_sagv_block_time(struct drm_i915_private *dev_priv)
 		dev_priv->sagv_block_time_us = 30;
 		return;
 	} else {
-		MISSING_CASE(INTEL_GEN(dev_priv));
+		i915_MISSING_CASE(dev_priv, INTEL_GEN(dev_priv));
 	}
 
 	/* Default to an unusable block time */
@@ -4905,7 +4905,7 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
 			wp->y_min_scanlines = 4;
 			break;
 		default:
-			MISSING_CASE(wp->cpp);
+			i915_MISSING_CASE(dev_priv, wp->cpp);
 			return -EINVAL;
 		}
 	} else {
@@ -7420,7 +7420,7 @@ void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv)
 	else if (IS_GEN(dev_priv, 2))
 		dev_priv->display.init_clock_gating = i830_init_clock_gating;
 	else {
-		MISSING_CASE(INTEL_DEVID(dev_priv));
+		i915_MISSING_CASE(dev_priv, INTEL_DEVID(dev_priv));
 		dev_priv->display.init_clock_gating = nop_init_clock_gating;
 	}
 }
-- 
2.23.0

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Re: [Intel-gfx][PATCH 01/10] drm/i915: Add i915 device based MISSING_CASE macro

[Chris Wilson]

Quoting Pankaj Bharadiya (2020-02-25 13:47:00)
> Now that we have struct drm_device based drm_WARN, introduce struct
> drm_i915_private based i915_MISSING_CASE macro which uses drm_WARN so
> that device specific information will also get printed in backtrace.
> 
> i915_MISSING_CASE macro should be preferred over MISSING_CASE,
> wherever possible.

Whatever for? MISSING_CASE() itself should be a complete picture for the
forgotten code.
-Chris
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Re: [Intel-gfx] [PATCH 01/10] drm/i915: Add i915 device based MISSING_CASE macro

[Chris Wilson]

Quoting Pankaj Bharadiya (2020-02-25 13:47:00)
> Now that we have struct drm_device based drm_WARN, introduce struct
> drm_i915_private based i915_MISSING_CASE macro which uses drm_WARN so
> that device specific information will also get printed in backtrace.
> 
> i915_MISSING_CASE macro should be preferred over MISSING_CASE,
> wherever possible.

Whatever for? MISSING_CASE() itself should be a complete picture for the
forgotten code.
-Chris
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Introduce i915 based i915_MISSING_CASE macro and us it in i915

[Patchwork]

== Series Details ==

Series: drm/i915: Introduce i915 based i915_MISSING_CASE macro and us it in i915
URL   : https://patchwork.freedesktop.org/series/73908/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
f04e32590e91 drm/i915: Add i915 device based MISSING_CASE macro
-:23: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'x' - possible side-effects?
#23: FILE: drivers/gpu/drm/i915/i915_utils.h:55:
+#define i915_MISSING_CASE(i915, x) drm_WARN(&(i915)->drm, 1, \
+					    "Missing case (%s == %ld)\n", \
+					    __stringify(x), (long)(x))

total: 0 errors, 0 warnings, 1 checks, 10 lines checked
cc9141f3850c drm/i915/display/cdclk: Make MISSING_CASE backtrace i915 specific
ec2632eb9e18 drm/i915/display/ddi: Make MISSING_CASE backtrace i915 specific
f8315a3a078d drm/i915/display/display: Make MISSING_CASE backtrace i915 specific
fa563d2d4620 drm/i915/dp: Make MISSING_CASE backtrace i915 specific
f634ed71f53a drm/i915/display/hdmi: Make MISSING_CASE backtrace i915 specific
8de10f450920 drm/i915/display: Make MISSING_CASE backtrace i915 specific
a04daf106db7 drm/i915/gem: Make MISSING_CASE backtrace i915 specific
cda06a3fe764 drm/i915/gt: Make MISSING_CASE backtrace i915 specific
4908d4bfc3d8 drm/i915: Make MISSING_CASE backtrace i915 specific

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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Introduce i915 based i915_MISSING_CASE macro and us it in i915

[Patchwork]

== Series Details ==

Series: drm/i915: Introduce i915 based i915_MISSING_CASE macro and us it in i915
URL   : https://patchwork.freedesktop.org/series/73908/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_8008 -> Patchwork_16705
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/index.html

Known issues
------------

  Here are the changes found in Patchwork_16705 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_flink_basic@bad-open:
    - fi-tgl-y:           [PASS][1] -> [DMESG-WARN][2] ([CI#94] / [i915#402])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/fi-tgl-y/igt@gem_flink_basic@bad-open.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/fi-tgl-y/igt@gem_flink_basic@bad-open.html

  * igt@i915_selftest@live_gt_pm:
    - fi-skl-6770hq:      [PASS][3] -> [DMESG-FAIL][4] ([i915#801])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/fi-skl-6770hq/igt@i915_selftest@live_gt_pm.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/fi-skl-6770hq/igt@i915_selftest@live_gt_pm.html

  
#### Possible fixes ####

  * igt@i915_selftest@live_execlists:
    - fi-icl-y:           [DMESG-FAIL][5] ([fdo#108569]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/fi-icl-y/igt@i915_selftest@live_execlists.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/fi-icl-y/igt@i915_selftest@live_execlists.html

  * igt@i915_selftest@live_gt_lrc:
    - {fi-tgl-u}:         [DMESG-FAIL][7] ([i915#1233]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/fi-tgl-u/igt@i915_selftest@live_gt_lrc.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/fi-tgl-u/igt@i915_selftest@live_gt_lrc.html

  * igt@kms_addfb_basic@bad-pitch-0:
    - fi-tgl-y:           [DMESG-WARN][9] ([CI#94] / [i915#402]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/fi-tgl-y/igt@kms_addfb_basic@bad-pitch-0.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/fi-tgl-y/igt@kms_addfb_basic@bad-pitch-0.html

  * igt@kms_pipe_crc_basic@read-crc-pipe-b:
    - fi-skl-6770hq:      [DMESG-WARN][11] ([i915#106]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/fi-skl-6770hq/igt@kms_pipe_crc_basic@read-crc-pipe-b.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/fi-skl-6770hq/igt@kms_pipe_crc_basic@read-crc-pipe-b.html

  
#### Warnings ####

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][13] ([fdo#111407]) -> [FAIL][14] ([fdo#111096] / [i915#323])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  * igt@kms_pipe_crc_basic@read-crc-pipe-c:
    - fi-skl-6770hq:      [SKIP][15] ([fdo#109271]) -> [DMESG-WARN][16] ([i915#106])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/fi-skl-6770hq/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/fi-skl-6770hq/igt@kms_pipe_crc_basic@read-crc-pipe-c.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
  [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
  [i915#106]: https://gitlab.freedesktop.org/drm/intel/issues/106
  [i915#1233]: https://gitlab.freedesktop.org/drm/intel/issues/1233
  [i915#323]: https://gitlab.freedesktop.org/drm/intel/issues/323
  [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
  [i915#801]: https://gitlab.freedesktop.org/drm/intel/issues/801


Participating hosts (52 -> 39)
------------------------------

  Additional (1): fi-byt-n2820 
  Missing    (14): fi-ilk-m540 fi-bdw-samus fi-tgl-dsi fi-hsw-4200u fi-hsw-peppy fi-byt-squawks fi-bsw-cyan fi-bwr-2160 fi-ilk-650 fi-ctg-p8600 fi-gdg-551 fi-blb-e6850 fi-byt-clapper fi-skl-6600u 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_8008 -> Patchwork_16705

  CI-20190529: 20190529
  CI_DRM_8008: 13b6e2575f2c05722679bc1c9d0b97c13bde49a1 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5469: 4f875016eb1ebc211b8aadb280ae16c7e6cdc8ba @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_16705: 4908d4bfc3d886cfd24f39666f00e0187fa6050a @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

4908d4bfc3d8 drm/i915: Make MISSING_CASE backtrace i915 specific
cda06a3fe764 drm/i915/gt: Make MISSING_CASE backtrace i915 specific
a04daf106db7 drm/i915/gem: Make MISSING_CASE backtrace i915 specific
8de10f450920 drm/i915/display: Make MISSING_CASE backtrace i915 specific
f634ed71f53a drm/i915/display/hdmi: Make MISSING_CASE backtrace i915 specific
fa563d2d4620 drm/i915/dp: Make MISSING_CASE backtrace i915 specific
f8315a3a078d drm/i915/display/display: Make MISSING_CASE backtrace i915 specific
ec2632eb9e18 drm/i915/display/ddi: Make MISSING_CASE backtrace i915 specific
cc9141f3850c drm/i915/display/cdclk: Make MISSING_CASE backtrace i915 specific
f04e32590e91 drm/i915: Add i915 device based MISSING_CASE macro

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/index.html
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RE: [Intel-gfx][PATCH 01/10] drm/i915: Add i915 device based MISSING_CASE macro

[Laxminarayan Bharadiya, Pankaj]

Hi Chris,

> -----Original Message-----
> From: Chris Wilson <chris@chris-wilson.co.uk>
> Sent: 25 February 2020 19:32
> To: David Airlie <airlied@linux.ie>; Joonas Lahtinen
> <joonas.lahtinen@linux.intel.com>; Laxminarayan Bharadiya, Pankaj
> <pankaj.laxminarayan.bharadiya@intel.com>; Vivi, Rodrigo
> <rodrigo.vivi@intel.com>; daniel@ffwll.ch; dri-devel@lists.freedesktop.org;
> intel-gfx@lists.freedesktop.org; jani.nikula@linux.intel.com
> Cc: Laxminarayan Bharadiya, Pankaj
> <pankaj.laxminarayan.bharadiya@intel.com>
> Subject: Re: [Intel-gfx][PATCH 01/10] drm/i915: Add i915 device based
> MISSING_CASE macro
> 
> Quoting Pankaj Bharadiya (2020-02-25 13:47:00)
> > Now that we have struct drm_device based drm_WARN, introduce struct
> > drm_i915_private based i915_MISSING_CASE macro which uses
> drm_WARN so
> > that device specific information will also get printed in backtrace.
> >
> > i915_MISSING_CASE macro should be preferred over MISSING_CASE,
> > wherever possible.
> 
> Whatever for? MISSING_CASE() itself should be a complete picture for the
> forgotten code.

Are you saying, no need to have a new device specific macro?

We want convert all the calls of WARN* with device specific drm_WARN* 
in i915, hence I introduced new i915_MISSING_CASE macro.

Jani, Will you please share your opinion on this?

Thanks,
Pankaj

> -Chris
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Re: [Intel-gfx] [PATCH 01/10] drm/i915: Add i915 device based MISSING_CASE macro

[Laxminarayan Bharadiya, Pankaj]

Hi Chris,

> -----Original Message-----
> From: Chris Wilson <chris@chris-wilson.co.uk>
> Sent: 25 February 2020 19:32
> To: David Airlie <airlied@linux.ie>; Joonas Lahtinen
> <joonas.lahtinen@linux.intel.com>; Laxminarayan Bharadiya, Pankaj
> <pankaj.laxminarayan.bharadiya@intel.com>; Vivi, Rodrigo
> <rodrigo.vivi@intel.com>; daniel@ffwll.ch; dri-devel@lists.freedesktop.org;
> intel-gfx@lists.freedesktop.org; jani.nikula@linux.intel.com
> Cc: Laxminarayan Bharadiya, Pankaj
> <pankaj.laxminarayan.bharadiya@intel.com>
> Subject: Re: [Intel-gfx][PATCH 01/10] drm/i915: Add i915 device based
> MISSING_CASE macro
> 
> Quoting Pankaj Bharadiya (2020-02-25 13:47:00)
> > Now that we have struct drm_device based drm_WARN, introduce struct
> > drm_i915_private based i915_MISSING_CASE macro which uses
> drm_WARN so
> > that device specific information will also get printed in backtrace.
> >
> > i915_MISSING_CASE macro should be preferred over MISSING_CASE,
> > wherever possible.
> 
> Whatever for? MISSING_CASE() itself should be a complete picture for the
> forgotten code.

Are you saying, no need to have a new device specific macro?

We want convert all the calls of WARN* with device specific drm_WARN* 
in i915, hence I introduced new i915_MISSING_CASE macro.

Jani, Will you please share your opinion on this?

Thanks,
Pankaj

> -Chris
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[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Introduce i915 based i915_MISSING_CASE macro and us it in i915

[Patchwork]

== Series Details ==

Series: drm/i915: Introduce i915 based i915_MISSING_CASE macro and us it in i915
URL   : https://patchwork.freedesktop.org/series/73908/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_8008_full -> Patchwork_16705_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_16705_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_16705_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_16705_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_tiled_fence_blits@normal:
    - shard-apl:          NOTRUN -> [TIMEOUT][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-apl8/igt@gem_tiled_fence_blits@normal.html

  * igt@sw_sync@sync_multi_producer_single_consumer:
    - shard-skl:          [PASS][2] -> [TIMEOUT][3]
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-skl8/igt@sw_sync@sync_multi_producer_single_consumer.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-skl7/igt@sw_sync@sync_multi_producer_single_consumer.html
    - shard-tglb:         [PASS][4] -> [TIMEOUT][5]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-tglb2/igt@sw_sync@sync_multi_producer_single_consumer.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-tglb1/igt@sw_sync@sync_multi_producer_single_consumer.html
    - shard-snb:          [PASS][6] -> [TIMEOUT][7]
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-snb5/igt@sw_sync@sync_multi_producer_single_consumer.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-snb5/igt@sw_sync@sync_multi_producer_single_consumer.html
    - shard-iclb:         [PASS][8] -> [TIMEOUT][9]
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-iclb1/igt@sw_sync@sync_multi_producer_single_consumer.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-iclb6/igt@sw_sync@sync_multi_producer_single_consumer.html

  
Known issues
------------

  Here are the changes found in Patchwork_16705_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_shared@exec-single-timeline-bsd:
    - shard-iclb:         [PASS][10] -> [SKIP][11] ([fdo#110841])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-iclb5/igt@gem_ctx_shared@exec-single-timeline-bsd.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-iclb2/igt@gem_ctx_shared@exec-single-timeline-bsd.html

  * igt@gem_exec_balancer@hang:
    - shard-tglb:         [PASS][12] -> [FAIL][13] ([i915#1277])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-tglb2/igt@gem_exec_balancer@hang.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-tglb1/igt@gem_exec_balancer@hang.html

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [PASS][14] -> [SKIP][15] ([fdo#110854])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-iclb4/igt@gem_exec_balancer@smoke.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-iclb8/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_parallel@vcs1-fds:
    - shard-iclb:         [PASS][16] -> [SKIP][17] ([fdo#112080]) +12 similar issues
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-iclb4/igt@gem_exec_parallel@vcs1-fds.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-iclb7/igt@gem_exec_parallel@vcs1-fds.html

  * igt@gem_exec_schedule@pi-shared-iova-bsd:
    - shard-iclb:         [PASS][18] -> [SKIP][19] ([i915#677])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-iclb7/igt@gem_exec_schedule@pi-shared-iova-bsd.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-iclb2/igt@gem_exec_schedule@pi-shared-iova-bsd.html

  * igt@gem_exec_schedule@reorder-wide-bsd:
    - shard-iclb:         [PASS][20] -> [SKIP][21] ([fdo#112146]) +4 similar issues
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-iclb6/igt@gem_exec_schedule@reorder-wide-bsd.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-iclb4/igt@gem_exec_schedule@reorder-wide-bsd.html

  * igt@i915_pm_dc@dc5-dpms:
    - shard-iclb:         [PASS][22] -> [FAIL][23] ([i915#447])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-iclb7/igt@i915_pm_dc@dc5-dpms.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-iclb3/igt@i915_pm_dc@dc5-dpms.html

  * igt@i915_selftest@live_gt_lrc:
    - shard-tglb:         [PASS][24] -> [DMESG-FAIL][25] ([i915#1233])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-tglb7/igt@i915_selftest@live_gt_lrc.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-tglb6/igt@i915_selftest@live_gt_lrc.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-skl:          [PASS][26] -> [INCOMPLETE][27] ([i915#221])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-skl3/igt@kms_flip@flip-vs-suspend-interruptible.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-skl2/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc:
    - shard-glk:          [PASS][28] -> [FAIL][29] ([i915#49])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-glk4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-glk8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-kbl:          [PASS][30] -> [DMESG-WARN][31] ([i915#180]) +5 similar issues
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-kbl3/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
    - shard-apl:          [PASS][32] -> [DMESG-WARN][33] ([i915#180]) +2 similar issues
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-apl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html

  * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
    - shard-skl:          [PASS][34] -> [FAIL][35] ([fdo#108145])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-skl6/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-skl3/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [PASS][36] -> [FAIL][37] ([fdo#108145] / [i915#265])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-skl3/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_plane_lowres@pipe-a-tiling-y:
    - shard-glk:          [PASS][38] -> [FAIL][39] ([i915#899])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-glk3/igt@kms_plane_lowres@pipe-a-tiling-y.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-glk9/igt@kms_plane_lowres@pipe-a-tiling-y.html

  * igt@kms_psr@psr2_primary_mmap_cpu:
    - shard-iclb:         [PASS][40] -> [SKIP][41] ([fdo#109441]) +1 similar issue
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-iclb4/igt@kms_psr@psr2_primary_mmap_cpu.html

  * igt@prime_busy@hang-bsd2:
    - shard-iclb:         [PASS][42] -> [SKIP][43] ([fdo#109276]) +21 similar issues
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-iclb4/igt@prime_busy@hang-bsd2.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-iclb5/igt@prime_busy@hang-bsd2.html

  
#### Possible fixes ####

  * igt@gem_exec_balancer@hang:
    - shard-iclb:         [FAIL][44] ([i915#1277]) -> [PASS][45]
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-iclb1/igt@gem_exec_balancer@hang.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-iclb6/igt@gem_exec_balancer@hang.html

  * {igt@gem_exec_schedule@implicit-write-read-bsd2}:
    - shard-iclb:         [SKIP][46] ([fdo#109276] / [i915#677]) -> [PASS][47]
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-iclb7/igt@gem_exec_schedule@implicit-write-read-bsd2.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-iclb2/igt@gem_exec_schedule@implicit-write-read-bsd2.html

  * igt@gem_exec_schedule@pi-distinct-iova-bsd:
    - shard-iclb:         [SKIP][48] ([i915#677]) -> [PASS][49] +3 similar issues
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-iclb1/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-iclb6/igt@gem_exec_schedule@pi-distinct-iova-bsd.html

  * igt@gem_exec_schedule@preemptive-hang-bsd:
    - shard-iclb:         [SKIP][50] ([fdo#112146]) -> [PASS][51] +7 similar issues
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-iclb4/igt@gem_exec_schedule@preemptive-hang-bsd.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-iclb7/igt@gem_exec_schedule@preemptive-hang-bsd.html

  * {igt@gem_exec_whisper@basic-contexts-forked}:
    - shard-apl:          [INCOMPLETE][52] ([fdo#103927]) -> [PASS][53]
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-apl7/igt@gem_exec_whisper@basic-contexts-forked.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-apl8/igt@gem_exec_whisper@basic-contexts-forked.html

  * igt@kms_cursor_crc@pipe-a-cursor-64x64-sliding:
    - shard-skl:          [FAIL][54] ([i915#54]) -> [PASS][55]
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-skl6/igt@kms_cursor_crc@pipe-a-cursor-64x64-sliding.html
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-skl9/igt@kms_cursor_crc@pipe-a-cursor-64x64-sliding.html

  * igt@kms_cursor_crc@pipe-c-cursor-suspend:
    - shard-kbl:          [DMESG-WARN][56] ([i915#180]) -> [PASS][57] +4 similar issues
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-kbl7/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-kbl3/igt@kms_cursor_crc@pipe-c-cursor-suspend.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-skl:          [FAIL][58] ([IGT#5]) -> [PASS][59]
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-skl3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-skl6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-snb:          [DMESG-WARN][60] ([i915#42]) -> [PASS][61]
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-snb4/igt@kms_flip@flip-vs-suspend.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-snb2/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-apl:          [DMESG-WARN][62] ([i915#180]) -> [PASS][63] +2 similar issues
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-apl2/igt@kms_flip@flip-vs-suspend-interruptible.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-apl2/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a:
    - shard-skl:          [FAIL][64] ([i915#53]) -> [PASS][65]
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-skl2/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-skl1/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
    - shard-skl:          [INCOMPLETE][66] ([i915#69]) -> [PASS][67] +1 similar issue
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-skl5/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-skl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html

  * igt@kms_psr@psr2_cursor_render:
    - shard-iclb:         [SKIP][68] ([fdo#109441]) -> [PASS][69] +2 similar issues
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-iclb7/igt@kms_psr@psr2_cursor_render.html
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-iclb2/igt@kms_psr@psr2_cursor_render.html

  * igt@kms_setmode@basic:
    - shard-apl:          [FAIL][70] ([i915#31]) -> [PASS][71]
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-apl1/igt@kms_setmode@basic.html
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-apl6/igt@kms_setmode@basic.html
    - shard-kbl:          [FAIL][72] ([i915#31]) -> [PASS][73]
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-kbl1/igt@kms_setmode@basic.html
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-kbl2/igt@kms_setmode@basic.html

  * igt@perf_pmu@busy-vcs1:
    - shard-iclb:         [SKIP][74] ([fdo#112080]) -> [PASS][75] +17 similar issues
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-iclb7/igt@perf_pmu@busy-vcs1.html
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-iclb1/igt@perf_pmu@busy-vcs1.html

  * igt@prime_vgem@fence-wait-bsd2:
    - shard-iclb:         [SKIP][76] ([fdo#109276]) -> [PASS][77] +18 similar issues
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-iclb3/igt@prime_vgem@fence-wait-bsd2.html
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-iclb1/igt@prime_vgem@fence-wait-bsd2.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv:
    - shard-iclb:         [FAIL][78] ([IGT#28]) -> [SKIP][79] ([fdo#112080]) +1 similar issue
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-iclb4/igt@gem_ctx_isolation@vcs1-nonpriv.html
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-iclb5/igt@gem_ctx_isolation@vcs1-nonpriv.html

  * igt@i915_pm_rpm@universal-planes:
    - shard-snb:          [SKIP][80] ([fdo#109271]) -> [INCOMPLETE][81] ([i915#82])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8008/shard-snb2/igt@i915_pm_rpm@universal-planes.html
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/shard-snb2/igt@i915_pm_rpm@universal-planes.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28
  [IGT#5]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/5
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841
  [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
  [i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
  [i915#1233]: https://gitlab.freedesktop.org/drm/intel/issues/1233
  [i915#1277]: https://gitlab.freedesktop.org/drm/intel/issues/1277
  [i915#1291]: https://gitlab.freedesktop.org/drm/intel/issues/1291
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#221]: https://gitlab.freedesktop.org/drm/intel/issues/221
  [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
  [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
  [i915#42]: https://gitlab.freedesktop.org/drm/intel/issues/42
  [i915#447]: https://gitlab.freedesktop.org/drm/intel/issues/447
  [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
  [i915#53]: https://gitlab.freedesktop.org/drm/intel/issues/53
  [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
  [i915#58]: https://gitlab.freedesktop.org/drm/intel/issues/58
  [i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
  [i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
  [i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82
  [i915#899]: https://gitlab.freedesktop.org/drm/intel/issues/899
  [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133


Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_8008 -> Patchwork_16705

  CI-20190529: 20190529
  CI_DRM_8008: 13b6e2575f2c05722679bc1c9d0b97c13bde49a1 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5469: 4f875016eb1ebc211b8aadb280ae16c7e6cdc8ba @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_16705: 4908d4bfc3d886cfd24f39666f00e0187fa6050a @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16705/index.html
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RE: [Intel-gfx][PATCH 01/10] drm/i915: Add i915 device based MISSING_CASE macro

[Jani Nikula]

On Thu, 27 Feb 2020, "Laxminarayan Bharadiya, Pankaj"	<pankaj.laxminarayan.bharadiya@intel.com> wrote:
> Hi Chris,
>
>> -----Original Message-----
>> From: Chris Wilson <chris@chris-wilson.co.uk>
>> Sent: 25 February 2020 19:32
>> To: David Airlie <airlied@linux.ie>; Joonas Lahtinen
>> <joonas.lahtinen@linux.intel.com>; Laxminarayan Bharadiya, Pankaj
>> <pankaj.laxminarayan.bharadiya@intel.com>; Vivi, Rodrigo
>> <rodrigo.vivi@intel.com>; daniel@ffwll.ch; dri-devel@lists.freedesktop.org;
>> intel-gfx@lists.freedesktop.org; jani.nikula@linux.intel.com
>> Cc: Laxminarayan Bharadiya, Pankaj
>> <pankaj.laxminarayan.bharadiya@intel.com>
>> Subject: Re: [Intel-gfx][PATCH 01/10] drm/i915: Add i915 device based
>> MISSING_CASE macro
>> 
>> Quoting Pankaj Bharadiya (2020-02-25 13:47:00)
>> > Now that we have struct drm_device based drm_WARN, introduce struct
>> > drm_i915_private based i915_MISSING_CASE macro which uses
>> drm_WARN so
>> > that device specific information will also get printed in backtrace.
>> >
>> > i915_MISSING_CASE macro should be preferred over MISSING_CASE,
>> > wherever possible.
>> 
>> Whatever for? MISSING_CASE() itself should be a complete picture for the
>> forgotten code.
>
> Are you saying, no need to have a new device specific macro?
>
> We want convert all the calls of WARN* with device specific drm_WARN* 
> in i915, hence I introduced new i915_MISSING_CASE macro.
>
> Jani, Will you please share your opinion on this?

In general, many or most WARNs are device specific, and the device
information is useful. However MISSING_CASE is about the *code*. That
was the intent anyway. Perhaps there are cases where the device
information might be useful, but for most cases probably not.

BR,
Jani.


-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [Intel-gfx] [PATCH 01/10] drm/i915: Add i915 device based MISSING_CASE macro

[Jani Nikula]

On Thu, 27 Feb 2020, "Laxminarayan Bharadiya, Pankaj"	<pankaj.laxminarayan.bharadiya@intel.com> wrote:
> Hi Chris,
>
>> -----Original Message-----
>> From: Chris Wilson <chris@chris-wilson.co.uk>
>> Sent: 25 February 2020 19:32
>> To: David Airlie <airlied@linux.ie>; Joonas Lahtinen
>> <joonas.lahtinen@linux.intel.com>; Laxminarayan Bharadiya, Pankaj
>> <pankaj.laxminarayan.bharadiya@intel.com>; Vivi, Rodrigo
>> <rodrigo.vivi@intel.com>; daniel@ffwll.ch; dri-devel@lists.freedesktop.org;
>> intel-gfx@lists.freedesktop.org; jani.nikula@linux.intel.com
>> Cc: Laxminarayan Bharadiya, Pankaj
>> <pankaj.laxminarayan.bharadiya@intel.com>
>> Subject: Re: [Intel-gfx][PATCH 01/10] drm/i915: Add i915 device based
>> MISSING_CASE macro
>> 
>> Quoting Pankaj Bharadiya (2020-02-25 13:47:00)
>> > Now that we have struct drm_device based drm_WARN, introduce struct
>> > drm_i915_private based i915_MISSING_CASE macro which uses
>> drm_WARN so
>> > that device specific information will also get printed in backtrace.
>> >
>> > i915_MISSING_CASE macro should be preferred over MISSING_CASE,
>> > wherever possible.
>> 
>> Whatever for? MISSING_CASE() itself should be a complete picture for the
>> forgotten code.
>
> Are you saying, no need to have a new device specific macro?
>
> We want convert all the calls of WARN* with device specific drm_WARN* 
> in i915, hence I introduced new i915_MISSING_CASE macro.
>
> Jani, Will you please share your opinion on this?

In general, many or most WARNs are device specific, and the device
information is useful. However MISSING_CASE is about the *code*. That
was the intent anyway. Perhaps there are cases where the device
information might be useful, but for most cases probably not.

BR,
Jani.


-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

RE: [Intel-gfx][PATCH 01/10] drm/i915: Add i915 device based MISSING_CASE macro

[Laxminarayan Bharadiya, Pankaj]

> -----Original Message-----
> From: Jani Nikula <jani.nikula@linux.intel.com>
> Sent: 27 February 2020 14:00
> To: Laxminarayan Bharadiya, Pankaj
> <pankaj.laxminarayan.bharadiya@intel.com>; Chris Wilson <chris@chris-
> wilson.co.uk>
> Cc: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org; David Airlie
> <airlied@linux.ie>; Joonas Lahtinen <joonas.lahtinen@linux.intel.com>; Vivi,
> Rodrigo <rodrigo.vivi@intel.com>; daniel@ffwll.ch
> Subject: RE: [Intel-gfx][PATCH 01/10] drm/i915: Add i915 device based
> MISSING_CASE macro
> 
> On Thu, 27 Feb 2020, "Laxminarayan Bharadiya, Pankaj"
> 	<pankaj.laxminarayan.bharadiya@intel.com> wrote:
> > Hi Chris,
> >
> >> -----Original Message-----
> >> From: Chris Wilson <chris@chris-wilson.co.uk>
> >> Sent: 25 February 2020 19:32
> >> To: David Airlie <airlied@linux.ie>; Joonas Lahtinen
> >> <joonas.lahtinen@linux.intel.com>; Laxminarayan Bharadiya, Pankaj
> >> <pankaj.laxminarayan.bharadiya@intel.com>; Vivi, Rodrigo
> >> <rodrigo.vivi@intel.com>; daniel@ffwll.ch;
> >> dri-devel@lists.freedesktop.org; intel-gfx@lists.freedesktop.org;
> >> jani.nikula@linux.intel.com
> >> Cc: Laxminarayan Bharadiya, Pankaj
> >> <pankaj.laxminarayan.bharadiya@intel.com>
> >> Subject: Re: [Intel-gfx][PATCH 01/10] drm/i915: Add i915 device based
> >> MISSING_CASE macro
> >>
> >> Quoting Pankaj Bharadiya (2020-02-25 13:47:00)
> >> > Now that we have struct drm_device based drm_WARN, introduce struct
> >> > drm_i915_private based i915_MISSING_CASE macro which uses
> >> drm_WARN so
> >> > that device specific information will also get printed in backtrace.
> >> >
> >> > i915_MISSING_CASE macro should be preferred over MISSING_CASE,
> >> > wherever possible.
> >>
> >> Whatever for? MISSING_CASE() itself should be a complete picture for
> >> the forgotten code.
> >
> > Are you saying, no need to have a new device specific macro?
> >
> > We want convert all the calls of WARN* with device specific drm_WARN*
> > in i915, hence I introduced new i915_MISSING_CASE macro.
> >
> > Jani, Will you please share your opinion on this?
> 
> In general, many or most WARNs are device specific, and the device information
> is useful. However MISSING_CASE is about the *code*. That was the intent
> anyway. Perhaps there are cases where the device information might be useful,
> but for most cases probably not.

Thanks for clarification. Please ignore this patch series then.

Thanks,
Pankaj 
> 
> BR,
> Jani.
> 
> 
> --
> Jani Nikula, Intel Open Source Graphics Center
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Re: [Intel-gfx] [PATCH 01/10] drm/i915: Add i915 device based MISSING_CASE macro

[Laxminarayan Bharadiya, Pankaj]

> -----Original Message-----
> From: Jani Nikula <jani.nikula@linux.intel.com>
> Sent: 27 February 2020 14:00
> To: Laxminarayan Bharadiya, Pankaj
> <pankaj.laxminarayan.bharadiya@intel.com>; Chris Wilson <chris@chris-
> wilson.co.uk>
> Cc: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org; David Airlie
> <airlied@linux.ie>; Joonas Lahtinen <joonas.lahtinen@linux.intel.com>; Vivi,
> Rodrigo <rodrigo.vivi@intel.com>; daniel@ffwll.ch
> Subject: RE: [Intel-gfx][PATCH 01/10] drm/i915: Add i915 device based
> MISSING_CASE macro
> 
> On Thu, 27 Feb 2020, "Laxminarayan Bharadiya, Pankaj"
> 	<pankaj.laxminarayan.bharadiya@intel.com> wrote:
> > Hi Chris,
> >
> >> -----Original Message-----
> >> From: Chris Wilson <chris@chris-wilson.co.uk>
> >> Sent: 25 February 2020 19:32
> >> To: David Airlie <airlied@linux.ie>; Joonas Lahtinen
> >> <joonas.lahtinen@linux.intel.com>; Laxminarayan Bharadiya, Pankaj
> >> <pankaj.laxminarayan.bharadiya@intel.com>; Vivi, Rodrigo
> >> <rodrigo.vivi@intel.com>; daniel@ffwll.ch;
> >> dri-devel@lists.freedesktop.org; intel-gfx@lists.freedesktop.org;
> >> jani.nikula@linux.intel.com
> >> Cc: Laxminarayan Bharadiya, Pankaj
> >> <pankaj.laxminarayan.bharadiya@intel.com>
> >> Subject: Re: [Intel-gfx][PATCH 01/10] drm/i915: Add i915 device based
> >> MISSING_CASE macro
> >>
> >> Quoting Pankaj Bharadiya (2020-02-25 13:47:00)
> >> > Now that we have struct drm_device based drm_WARN, introduce struct
> >> > drm_i915_private based i915_MISSING_CASE macro which uses
> >> drm_WARN so
> >> > that device specific information will also get printed in backtrace.
> >> >
> >> > i915_MISSING_CASE macro should be preferred over MISSING_CASE,
> >> > wherever possible.
> >>
> >> Whatever for? MISSING_CASE() itself should be a complete picture for
> >> the forgotten code.
> >
> > Are you saying, no need to have a new device specific macro?
> >
> > We want convert all the calls of WARN* with device specific drm_WARN*
> > in i915, hence I introduced new i915_MISSING_CASE macro.
> >
> > Jani, Will you please share your opinion on this?
> 
> In general, many or most WARNs are device specific, and the device information
> is useful. However MISSING_CASE is about the *code*. That was the intent
> anyway. Perhaps there are cases where the device information might be useful,
> but for most cases probably not.

Thanks for clarification. Please ignore this patch series then.

Thanks,
Pankaj 
> 
> BR,
> Jani.
> 
> 
> --
> Jani Nikula, Intel Open Source Graphics Center
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