From: Haren Myneni <haren@linux.ibm.com> To: herbert@gondor.apana.org.au Cc: mpe@ellerman.id.au, mikey@neuling.org, sukadev@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org, linux-crypto@vger.kernel.org, npiggin@gmail.com Subject: [PATCH v3 7/9] crypto/nx: Enable and setup GZIP compresstion type Date: Fri, 06 Mar 2020 16:37:35 -0800 [thread overview] Message-ID: <1583541455.9256.47.camel@hbabu-laptop> (raw) In-Reply-To: <1583540877.9256.24.camel@hbabu-laptop> Changes to probe GZIP device-tree nodes, open RX windows and setup GZIP compression type. No plans to provide GZIP usage in kernel right now, but this patch enables GZIP for user space usage. Signed-off-by: Haren Myneni <haren@linux.ibm.com> --- drivers/crypto/nx/nx-common-powernv.c | 43 ++++++++++++++++++++++++++++++----- 1 file changed, 37 insertions(+), 6 deletions(-) diff --git a/drivers/crypto/nx/nx-common-powernv.c b/drivers/crypto/nx/nx-common-powernv.c index 82dfa60..f570691 100644 --- a/drivers/crypto/nx/nx-common-powernv.c +++ b/drivers/crypto/nx/nx-common-powernv.c @@ -65,6 +65,7 @@ struct nx_coproc { * Using same values as in skiboot or coprocessor type representing * in NX workbook. */ +#define NX_CT_GZIP (2) /* on P9 and later */ #define NX_CT_842 (3) static int (*nx842_powernv_exec)(const unsigned char *in, @@ -819,6 +820,9 @@ static int __init vas_cfg_coproc_info(struct device_node *dn, int chip_id, if (type == NX_CT_842) ret = nx_set_ct(coproc, priority, VAS_COP_TYPE_842_HIPRI, VAS_COP_TYPE_842); + else if (type == NX_CT_GZIP) + ret = nx_set_ct(coproc, priority, VAS_COP_TYPE_GZIP_HIPRI, + VAS_COP_TYPE_GZIP); if (ret) goto err_out; @@ -867,12 +871,16 @@ static int __init vas_cfg_coproc_info(struct device_node *dn, int chip_id, return ret; } -static int __init nx_coproc_init(int chip_id, int ct_842) +static int __init nx_coproc_init(int chip_id, int ct_842, int ct_gzip) { int ret = 0; if (opal_check_token(OPAL_NX_COPROC_INIT)) { ret = opal_nx_coproc_init(chip_id, ct_842); + + if (!ret) + ret = opal_nx_coproc_init(chip_id, ct_gzip); + if (ret) { ret = opal_error_code(ret); pr_err("Failed to initialize NX for chip(%d): %d\n", @@ -902,8 +910,8 @@ static int __init find_nx_device_tree(struct device_node *dn, int chip_id, static int __init nx_powernv_probe_vas(struct device_node *pn) { int chip_id, vasid, ret = 0; + int ct_842 = 0, ct_gzip = 0; struct device_node *dn; - int ct_842 = 0; chip_id = of_get_ibm_chip_id(pn); if (chip_id < 0) { @@ -920,19 +928,24 @@ static int __init nx_powernv_probe_vas(struct device_node *pn) for_each_child_of_node(pn, dn) { ret = find_nx_device_tree(dn, chip_id, vasid, NX_CT_842, "ibm,p9-nx-842", &ct_842); + + if (!ret) + ret = find_nx_device_tree(dn, chip_id, vasid, + NX_CT_GZIP, "ibm,p9-nx-gzip", &ct_gzip); + if (ret) return ret; } - if (!ct_842) { - pr_err("NX842 FIFO nodes are missing\n"); + if (!ct_842 || !ct_gzip) { + pr_err("NX FIFO nodes are missing\n"); return -EINVAL; } /* * Initialize NX instance for both high and normal priority FIFOs. */ - ret = nx_coproc_init(chip_id, ct_842); + ret = nx_coproc_init(chip_id, ct_842, ct_gzip); return ret; } @@ -1072,10 +1085,19 @@ static __init int nx_compress_powernv_init(void) nx842_powernv_exec = nx842_exec_icswx; } else { /* + * Register VAS user space API for NX GZIP so + * that user space can use GZIP engine. + * 842 compression is supported only in kernel. + */ + ret = vas_register_coproc_api(THIS_MODULE); + + /* * GZIP is not supported in kernel right now. * So open tx windows only for 842. */ - ret = nx_open_percpu_txwins(); + if (!ret) + ret = nx_open_percpu_txwins(); + if (ret) { nx_delete_coprocs(); return ret; @@ -1096,6 +1118,15 @@ static __init int nx_compress_powernv_init(void) static void __exit nx_compress_powernv_exit(void) { + /* + * GZIP engine is supported only in power9 or later and nx842_ct + * is used on power8 (icswx). + * VAS API for NX GZIP is registered during init for user space + * use. So delete this API use for GZIP engine. + */ + if (!nx842_ct) + vas_unregister_coproc_api(); + crypto_unregister_alg(&nx842_powernv_alg); nx_delete_coprocs(); -- 1.8.3.1
WARNING: multiple messages have this Message-ID (diff)
From: Haren Myneni <haren@linux.ibm.com> To: herbert@gondor.apana.org.au Cc: mikey@neuling.org, npiggin@gmail.com, linux-crypto@vger.kernel.org, sukadev@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org Subject: [PATCH v3 7/9] crypto/nx: Enable and setup GZIP compresstion type Date: Fri, 06 Mar 2020 16:37:35 -0800 [thread overview] Message-ID: <1583541455.9256.47.camel@hbabu-laptop> (raw) In-Reply-To: <1583540877.9256.24.camel@hbabu-laptop> Changes to probe GZIP device-tree nodes, open RX windows and setup GZIP compression type. No plans to provide GZIP usage in kernel right now, but this patch enables GZIP for user space usage. Signed-off-by: Haren Myneni <haren@linux.ibm.com> --- drivers/crypto/nx/nx-common-powernv.c | 43 ++++++++++++++++++++++++++++++----- 1 file changed, 37 insertions(+), 6 deletions(-) diff --git a/drivers/crypto/nx/nx-common-powernv.c b/drivers/crypto/nx/nx-common-powernv.c index 82dfa60..f570691 100644 --- a/drivers/crypto/nx/nx-common-powernv.c +++ b/drivers/crypto/nx/nx-common-powernv.c @@ -65,6 +65,7 @@ struct nx_coproc { * Using same values as in skiboot or coprocessor type representing * in NX workbook. */ +#define NX_CT_GZIP (2) /* on P9 and later */ #define NX_CT_842 (3) static int (*nx842_powernv_exec)(const unsigned char *in, @@ -819,6 +820,9 @@ static int __init vas_cfg_coproc_info(struct device_node *dn, int chip_id, if (type == NX_CT_842) ret = nx_set_ct(coproc, priority, VAS_COP_TYPE_842_HIPRI, VAS_COP_TYPE_842); + else if (type == NX_CT_GZIP) + ret = nx_set_ct(coproc, priority, VAS_COP_TYPE_GZIP_HIPRI, + VAS_COP_TYPE_GZIP); if (ret) goto err_out; @@ -867,12 +871,16 @@ static int __init vas_cfg_coproc_info(struct device_node *dn, int chip_id, return ret; } -static int __init nx_coproc_init(int chip_id, int ct_842) +static int __init nx_coproc_init(int chip_id, int ct_842, int ct_gzip) { int ret = 0; if (opal_check_token(OPAL_NX_COPROC_INIT)) { ret = opal_nx_coproc_init(chip_id, ct_842); + + if (!ret) + ret = opal_nx_coproc_init(chip_id, ct_gzip); + if (ret) { ret = opal_error_code(ret); pr_err("Failed to initialize NX for chip(%d): %d\n", @@ -902,8 +910,8 @@ static int __init find_nx_device_tree(struct device_node *dn, int chip_id, static int __init nx_powernv_probe_vas(struct device_node *pn) { int chip_id, vasid, ret = 0; + int ct_842 = 0, ct_gzip = 0; struct device_node *dn; - int ct_842 = 0; chip_id = of_get_ibm_chip_id(pn); if (chip_id < 0) { @@ -920,19 +928,24 @@ static int __init nx_powernv_probe_vas(struct device_node *pn) for_each_child_of_node(pn, dn) { ret = find_nx_device_tree(dn, chip_id, vasid, NX_CT_842, "ibm,p9-nx-842", &ct_842); + + if (!ret) + ret = find_nx_device_tree(dn, chip_id, vasid, + NX_CT_GZIP, "ibm,p9-nx-gzip", &ct_gzip); + if (ret) return ret; } - if (!ct_842) { - pr_err("NX842 FIFO nodes are missing\n"); + if (!ct_842 || !ct_gzip) { + pr_err("NX FIFO nodes are missing\n"); return -EINVAL; } /* * Initialize NX instance for both high and normal priority FIFOs. */ - ret = nx_coproc_init(chip_id, ct_842); + ret = nx_coproc_init(chip_id, ct_842, ct_gzip); return ret; } @@ -1072,10 +1085,19 @@ static __init int nx_compress_powernv_init(void) nx842_powernv_exec = nx842_exec_icswx; } else { /* + * Register VAS user space API for NX GZIP so + * that user space can use GZIP engine. + * 842 compression is supported only in kernel. + */ + ret = vas_register_coproc_api(THIS_MODULE); + + /* * GZIP is not supported in kernel right now. * So open tx windows only for 842. */ - ret = nx_open_percpu_txwins(); + if (!ret) + ret = nx_open_percpu_txwins(); + if (ret) { nx_delete_coprocs(); return ret; @@ -1096,6 +1118,15 @@ static __init int nx_compress_powernv_init(void) static void __exit nx_compress_powernv_exit(void) { + /* + * GZIP engine is supported only in power9 or later and nx842_ct + * is used on power8 (icswx). + * VAS API for NX GZIP is registered during init for user space + * use. So delete this API use for GZIP engine. + */ + if (!nx842_ct) + vas_unregister_coproc_api(); + crypto_unregister_alg(&nx842_powernv_alg); nx_delete_coprocs(); -- 1.8.3.1
next prev parent reply other threads:[~2020-03-07 0:37 UTC|newest] Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-03-07 0:27 [PATCH v3 0/9] crypto/nx: Enable GZIP engine and provide userpace API Haren Myneni 2020-03-07 0:32 ` [PATCH v3 1/9] powerpc/vas: Initialize window attributes for GZIP coprocessor type Haren Myneni 2020-03-07 0:32 ` Haren Myneni 2020-03-07 0:32 ` [PATCH v3 2/9] powerpc/vas: Define VAS_TX_WIN_OPEN ioctl API Haren Myneni 2020-03-07 0:32 ` Haren Myneni 2020-03-07 0:33 ` [PATCH v3 3/9] powerpc/vas: Add VAS user space API Haren Myneni 2020-03-07 0:33 ` Haren Myneni 2020-03-18 7:12 ` Daniel Axtens 2020-03-18 7:12 ` Daniel Axtens 2020-03-19 1:16 ` Daniel Axtens 2020-03-19 1:16 ` Daniel Axtens 2020-03-19 1:53 ` Haren Myneni 2020-03-19 1:53 ` Haren Myneni 2020-03-20 12:18 ` Daniel Axtens 2020-03-20 12:18 ` Daniel Axtens 2020-03-22 20:50 ` Haren Myneni 2020-03-22 20:50 ` Haren Myneni 2020-03-07 0:34 ` [PATCH v3 4/9] crypto/nx: Initialize coproc entry with kzalloc Haren Myneni 2020-03-07 0:34 ` Haren Myneni 2020-03-07 0:34 ` [PATCH v3 5/9] crypto/nx: Rename nx-842-powernv file name to nx-common-powernv Haren Myneni 2020-03-07 0:34 ` Haren Myneni 2020-03-07 0:36 ` [PATCH v3 6/9] crypto/NX: Make enable code generic to add new GZIP compression type Haren Myneni 2020-03-07 0:36 ` Haren Myneni 2020-03-07 0:37 ` Haren Myneni [this message] 2020-03-07 0:37 ` [PATCH v3 7/9] crypto/nx: Enable and setup GZIP compresstion type Haren Myneni 2020-03-07 0:38 ` [PATCH v3 8/9] crypto/nx: Remove 'pid' in vas_tx_win_attr struct Haren Myneni 2020-03-07 0:38 ` Haren Myneni 2020-03-07 0:39 ` [PATCH v3 9/9] Documentation/powerpc: VAS API Haren Myneni 2020-03-07 0:39 ` Haren Myneni 2020-03-20 12:24 ` Daniel Axtens 2020-03-20 12:24 ` Daniel Axtens 2020-03-23 0:54 ` Haren Myneni 2020-03-23 0:54 ` Haren Myneni 2020-03-23 8:32 ` Nicholas Piggin 2020-03-23 8:32 ` Nicholas Piggin 2020-03-16 13:04 ` [PATCH v3 0/9] crypto/nx: Enable GZIP engine and provide userpace API Daniel Axtens 2020-03-16 23:31 ` Haren Myneni 2020-03-16 23:31 ` Haren Myneni
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